From 248c43a545192a92b146285ce6708cebd0b892db Mon Sep 17 00:00:00 2001 From: Luke Wagner Date: Mon, 10 Apr 2017 14:09:55 -0500 Subject: [PATCH 001/378] Add proposals/simd/Overview.md placeholder --- simd/Overview.md | 1 + 1 file changed, 1 insertion(+) create mode 100644 simd/Overview.md diff --git a/simd/Overview.md b/simd/Overview.md new file mode 100644 index 0000000000..1333ed77b7 --- /dev/null +++ b/simd/Overview.md @@ -0,0 +1 @@ +TODO From 354103d8aa0239340b6920373116c6d506b4a90c Mon Sep 17 00:00:00 2001 From: Luke Wagner Date: Mon, 10 Apr 2017 14:11:59 -0500 Subject: [PATCH 002/378] Move placeholder to the right dir --- {simd => proposals/simd}/Overview.md | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename {simd => proposals/simd}/Overview.md (100%) diff --git a/simd/Overview.md b/proposals/simd/Overview.md similarity index 100% rename from simd/Overview.md rename to proposals/simd/Overview.md From 7033c5274c312d23d17914bd02bde2f82526def2 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 13 Apr 2017 15:11:16 -0700 Subject: [PATCH 003/378] Copy documents verbatim from portable-simd repo. Originals at https://github.com/stoklund/portable-simd --- proposals/simd/portable-simd.md | 1324 +++++++++++++++++++++++++ proposals/simd/webassembly-opcodes.md | 279 ++++++ 2 files changed, 1603 insertions(+) create mode 100644 proposals/simd/portable-simd.md create mode 100644 proposals/simd/webassembly-opcodes.md diff --git a/proposals/simd/portable-simd.md b/proposals/simd/portable-simd.md new file mode 100644 index 0000000000..3382096f17 --- /dev/null +++ b/proposals/simd/portable-simd.md @@ -0,0 +1,1324 @@ +# Portable SIMD + +This specification describes a *Single Instruction Multiple Data* (SIMD) +instruction set that can be implemented efficiently on current popular +instruction set architectures. It provides shared semantics for +[WebAssembly][wasm] and [SIMD.js][simdjs]. + +# Types + +The types used in this specification can be concrete or abstract. Concrete types +have a defined representation as a bit pattern, while abstract types are simply +a set of allowed values. + +## Scalar types + +The concrete scalar integer types are not interpreted as either signed or +unsigned integers. + +* `i8`: An 8-bit integer with bits numbered 0–7. +* `i16`: A 16-bit integer with bits numbered 0–15. +* `i32`: A 32-bit integer with bits numbered 0–31. +* `i64`: A 64-bit integer with bits numbered 0–63. + +The concrete scalar floating-point types follow the encoding and semantics of +the [IEEE 754-2008 standard for floating-point arithmetic][ieee754]. See the +[Floating-point semantics](#floating-point-semantics) section for details and +exceptions. + +* `f32`: A floating-point number in the [IEEE][ieee754] *binary32* interchange + format. +* `f64`: A floating-point number in the [IEEE][ieee754] *binary64* interchange + format. + +The following abstract types don't have a specified representation as a bit +pattern: + +* `boolean`: Either `true` or `false`. +* `LaneIdx2`: An integer in the range 0–1 identifying a lane. +* `LaneIdx4`: An integer in the range 0–3 identifying a lane. +* `LaneIdx8`: An integer in the range 0–7 identifying a lane. +* `LaneIdx16`: An integer in the range 0–15 identifying a lane. +* `LaneIdx32`: An integer in the range 0–31 identifying a lane. +* `RoundingMode`: Rounding mode for floating-point operations. One of + `TiesToEven`, `TowardPositive`, `TowardNegative`, and `TowardZero`. See + [Rounding modes](#rounding-modes). + +## SIMD types + +All of the numerical SIMD types have a concrete mapping to a 128-bit +representation. The boolean types do not have a bit-pattern representation. + +* `v128`: A 128-bit SIMD vector. Bits are numbered 0–127. +* `b8x16`: A vector of 16 `boolean` lanes numbered 0–15. +* `b16x8`: A vector of 8 `boolean` lanes numbered 0–7. +* `b32x4`: A vector of 4 `boolean` lanes numbered 0–3. +* `b64x2`: A vector of 2 `boolean` lanes numbered 0–1. + +The `v128` type corresponds to a vector register in a typical SIMD ISA. The +interpretation of the 128 bits in the vector register is provided by the +individual instructions. + +The abstract boolean vector types can be mapped to vector registers or predicate +registers by an implementation. They have a property `S.Lanes` which is used by +the pseudo-code below: + +| S | S.Lanes | +|---------|--------:| +| `b8x16` | 16 | +| `b16x8` | 8 | +| `b32x4` | 4 | +| `b64x2` | 2 | + +## Interpreting SIMD types + +The single `v128` SIMD type can represent packed data in multiple ways. +Instructions specify how the bits should be interpreted through a hierarchy of +*interpretations*. + +The boolean vector types only have the one interpretation given by their type. + +### Lane division interpretation + +The first level of interpretations of the `v128` type impose a lane structure on +the bits: + +* `v8x16 : v128`: 8-bit lanes numbered 0–15. Lane n corresponds to bits 8n – 8n+7. +* `v16x8 : v128`: 16-bit lanes numbered 0–7. Lane n corresponds to bits 16n – 16n+15. +* `v32x4 : v128`: 32-bit lanes numbered 0–3. Lane n corresponds to bits 32n – 32n+31. +* `v64x2 : v128`: 64-bit lanes numbered 0–1. Lane n corresponds to bits 64n – 64n+63. + +The lane dividing interpretations don't say anything about the semantics of the +bits in each lane. The interpretations have *properties* used by the semantic +specification pseudo-code below: + +| S | S.LaneBits | S.Lanes | S.BoolType | +|---------|-----------:|--------:|:----------:| +| `v8x16` | 8 | 16 | `b8x16` | +| `v16x8` | 16 | 8 | `b16x8` | +| `v32x4` | 32 | 4 | `b32x4` | +| `v64x2` | 64 | 2 | `b64x2` | + + +### Modulo integer interpretations + +The bits in a lane can be interpreted as integers with modulo arithmetic +semantics. Many arithmetic operations can be defined on these types which don't +impose a signed or unsigned integer interpretation. + +* `i8x16 : v8x16`: Each lane is an `i8`. +* `i16x8 : v16x8`: Each lane is an `i16`. +* `i32x4 : v32x4`: Each lane is an `i32`. +* `i64x2 : v64x2`: Each lane is an `i64`. + +Additional properties: + +| S | S.LaneType | +|---------|------------| +| `i8x16` | `i8` | +| `i16x8` | `i16` | +| `i32x4` | `i32` | +| `i64x2` | `i64` | + +### Signed integer interpretations + +Each lane is interpreted as a two's complement integer. + +* `s8x16 : i8x16`: Lane values in the range -2^7 – 2^7-1. +* `s16x8 : i16x8`: Lane values in the range -2^15 – 2^15-1. +* `s32x4 : i32x4`: Lane values in the range -2^31 – 2^31-1. +* `s64x2 : i64x2`: Lane values in the range -2^63 – 2^63-1. + +These interpretations get additional properties defining the range of values in +a lane: + +| S | S.Min | S.Max | +|---------|------:|-------:| +| `s8x16` | -2^7 | 2^7-1 | +| `s16x8` | -2^15 | 2^15-1 | +| `s32x4` | -2^31 | 2^31-1 | +| `s64x2` | -2^63 | 2^63-1 | + +### Unsigned integer interpretations + +Each lane is interpreted as an unsigned integer. + +* `u8x16 : i8x16`: Lane values in the range 0 – 2^8-1. +* `u16x8 : i16x8`: Lane values in the range 0 – 2^16-1. +* `u32x4 : i32x4`: Lane values in the range 0 – 2^32-1. +* `u64x2 : i64x2`: Lane values in the range 0 – 2^64-1. + +These interpretations get additional properties defining the range of values in +a lane: + +| S | S.Min | S.Max | +|---------|------:|-------:| +| `u8x16` | 0 | 2^8-1 | +| `u16x8` | 0 | 2^16-1 | +| `u32x4` | 0 | 2^32-1 | +| `u64x2` | 0 | 2^64-1 | + +### Floating-point interpretations + +Each lane is interpreted as an IEEE floating-point number. + +* `f32x4 : v32x4`: Each lane is an `f32`. +* `f64x2 : v64x2`: Each lane is an `f64`. + +Additional properties: + +| S | S.LaneType | +|---------|------------| +| `f32x4` | `f32` | +| `f64x2` | `f64` | + +# Floating-point semantics + +The floating-point operations in this specification aim to be conforming to +[IEEE 754-2008][ieee754] while being compatible with WebAssembly and JavaScript. +Some things which are left unspecified by the IEEE standard are given stricter +semantics by WebAssembly. + +## Rounding modes + +Floating-point operations that need a *rounding mode* take a `RoundingMode` +operand which provides the rounding mode to use for the operation. + +* `TiesToEven`: Round to nearest, ties towards even. +* `TowardPositive`: Round towards positive infinity. +* `TowardNegative`: Round towards negative infinity. +* `TowardZero`: Round towards zero. + +## Default NaN value + +When a floating-point operation needs to return a NaN and none of its operands +are NaN, it generates a default NaN value which is a quiet NaN with an all-zero +payload field. The sign of the default NaN is not specified: + +```python +def f32.default_nan(): + if unspecified_choice(): + bits = 0x7fc00000 + else: + bits = 0xffc00000 + return f32.from_bits(bits) + +def f64.default_nan(): + if unspecified_choice(): + bits = 0x7ff8000000000000 + else: + bits = 0xfff8000000000000 + return f64.from_bits(bits) +``` + +## Propagating NaN values + +When propagating a NaN value from an operand, all the bits of the NaN are +preserved, except a signaling NaN is quieted by setting the most significand +bit in the trailing significand field. + +```python +def canonicalize_nan(x): + assert isnan(x) + t = type(x) + assert t == f32 or t == f64 + bits = x.to_bits() + if t == f32: + bits |= (1 << 22) + else: + bits |= (1 << 51) + return t.from_bits(bits) +``` + +When two operands are NaN, one of them is propagated. Which one is not specified: + +```python +def propagate_nan(x, y): + assert isinan(x) or isnan(y) + if not isnan(x): + return canonicalize_nan(y) + if not isnan(y) + return canonicalize_nan(x) + # Both x and y are NaNs: pick one to propagate. + if unspecified_choice(): + return canonicalize_nan(x) + else: + return canonicalize_nan(y) +``` + +## Subnormal flushing + +An implementation is allowed to flush subnormals in arithmetic floating-point +operations. This means that any subnormal operand is treated as 0, and any +subnormal result is rounded to 0. + +Note that this differs from WebAssembly scalar floating-point semantics which +require correct subnormal handling. + +# Operations + +The SIMD operations described in this sections are generally named +`S.Op`, where `S` is either a SIMD type or one of the interpretations +of a SIMD type. + +Many operations are simply the lane-wise application of a scalar operation: + +```python +def S.lanewise_unary(func, a): + result = S.New() + for i in range(S.Lanes): + result[i] = func(a[i]) + return result + +def S.lanewise_binary(func, a, b): + result = S.New() + for i in range(S.Lanes): + result[i] = func(a[i], b[i]) + return result +``` + +Comparison operators produce a boolean vector: + +```python +def S.lanewise_comparison(func, a, b): + result = S.BoolType.New() + for i in range(S.Lanes): + result[i] = func(a[i], b[i]) + return result +``` + +## Constructing SIMD values + +### Build vector from individual lanes +* `b8x16.build(x: boolean[16]) -> b8x16` +* `b16x8.build(x: boolean[8]) -> b16x8` +* `b32x4.build(x: boolean[4]) -> b32x4` +* `b64x2.build(x: boolean[2]) -> b64x2` +* `i8x16.build(x: i8[16]) -> v128` +* `i16x8.build(x: i16[8]) -> v128` +* `i32x4.build(x: i32[4]) -> v128` +* `i64x2.build(x: i64[2]) -> v128` +* `f32x4.build(x: f32[4]) -> v128` +* `f64x2.build(x: f64[2]) -> v128` + +Construct a vector from an array of individual lane values. + +```python +def S.build(x): + result = S.New() + for i in range(S.Lanes): + result[i] = x[i] + return result +``` + +### Create vector with identical lanes +* `b8x16.splat(x: boolean) -> b8x16` +* `b16x8.splat(x: boolean) -> b16x8` +* `b32x4.splat(x: boolean) -> b32x4` +* `b64x2.splat(x: boolean) -> b64x2` +* `i8x16.splat(x: i8) -> v128` +* `i16x8.splat(x: i16) -> v128` +* `i32x4.splat(x: i32) -> v128` +* `i64x2.splat(x: i64) -> v128` +* `f32x4.splat(x: f32) -> v128` +* `f64x2.splat(x: f64) -> v128` + +Construct a vector with `x` replicated to all lanes: + +```python +def S.splat(x): + result = S.New() + for i in range(S.Lanes): + result[i] = x + return result +``` + +## Accessing lanes + +### Extract lane as a scalar +* `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> boolean` +* `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> boolean` +* `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> boolean` +* `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> boolean` +* `i8x16.extractLane(a: v128, i: LaneIdx16) -> i8` +* `i16x8.extractLane(a: v128, i: LaneIdx8) -> i16` +* `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` +* `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` +* `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` +* `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` + +Extract the value of lane `i` in `a`. + +```python +def S.extractLane(a, i): + return a[i] +``` + +### Replace lane value +* `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: boolean) -> b8x16` +* `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: boolean) -> b16x8` +* `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: boolean) -> b32x4` +* `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: boolean) -> b64x2` +* `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i8) -> v128` +* `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i16) -> v128` +* `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` +* `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` +* `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` +* `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` + +Return a new vector with lanes identical to `a`, except for lane `i` which has +the value `x`. + +```python +def S.replaceLane(a, i, x): + result = S.New() + for j in range(S.Lanes): + result[j] = a[j] + result[i] = x + return result +``` + +### Lane-wise select +* `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` +* `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` +* `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` +* `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` + +Use a boolean vector to select lanes from two numerical vectors. + +```python +def S.select(s, t, f): + result = S.New() + for i in range(S.Lanes): + if s[i]: + result[i] = t[i] + else + result[i] = f[i] + return result +``` + +### Swizzle lanes +* `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` +* `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` +* `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` +* `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` + +Create vector with lanes rearranged: + +```python +def S.swizzle(a, s): + result = S.New() + for i in range(S.Lanes): + result[i] = a[s[i]] + return result +``` + +### Shuffle lanes +* `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` +* `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` +* `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` +* `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` + +Create vector with lanes selected from the lanes of two input vectors: + +```python +def S.shuffle(a, b, s): + result = S.New() + for i in range(S.Lanes): + if s[i] < S.lanes: + result[i] = a[s[i]] + else: + result[i] = b[s[i] - S.lanes] + return result +``` + +## Integer arithmetic + +Wrapping integer arithmetic discards the high bits of the result. + +```python +def S.Reduce(x): + bitmask = (1 << S.LaneBits) - 1 + return x & bitmask +``` + +### Integer addition +* `i8x16.add(a: v128, b: v128) -> v128` +* `i16x8.add(a: v128, b: v128) -> v128` +* `i32x4.add(a: v128, b: v128) -> v128` +* `i64x2.add(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer addition: + +```python +def S.add(a, b): + def add(x, y): + return S.Reduce(x + y) + return S.lanewise_binary(add, a, b) +``` + +### Integer subtraction +* `i8x16.sub(a: v128, b: v128) -> v128` +* `i16x8.sub(a: v128, b: v128) -> v128` +* `i32x4.sub(a: v128, b: v128) -> v128` +* `i64x2.sub(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer subtraction: + +```python +def S.sub(a, b): + def sub(x, y): + return S.Reduce(x - y) + return S.lanewise_binary(sub, a, b) +``` + +### Integer multiplication +* `i8x16.mul(a: v128, b: v128) -> v128` +* `i16x8.mul(a: v128, b: v128) -> v128` +* `i32x4.mul(a: v128, b: v128) -> v128` +* `i64x2.mul(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer multiplication: + +```python +def S.mul(a, b): + def mul(x, y): + return S.Reduce(x * y) + return S.lanewise_binary(mul, a, b) +``` + +### Integer negation +* `i8x16.neg(a: v128) -> v128` +* `i16x8.neg(a: v128) -> v128` +* `i32x4.neg(a: v128) -> v128` +* `i64x2.neg(a: v128) -> v128` + +Lane-wise wrapping integer negation. In wrapping arithmetic, `y = -x` is the +unique value such that `x + y == 0`. + +```python +def S.neg(a): + def neg(x): + return S.Reduce(-x) + return S.lanewise_unary(neg, a) +``` + +## Saturating integer arithmetic + +Saturating integer arithmetic behaves differently on signed and unsigned types. +It is only defined for 8-bit and 16-bit integer lanes. + +```python +def S.Saturate(x): + if x < S.Min: + return S.Min + if x > S.Max: + return S.Max + return x +``` + +### Saturating integer addition +* `s8x16.addSaturate(a: v128, b: v128) -> v128` +* `s16x8.addSaturate(a: v128, b: v128) -> v128` +* `u8x16.addSaturate(a: v128, b: v128) -> v128` +* `u16x8.addSaturate(a: v128, b: v128) -> v128` + +Lane-wise saturating addition: + +```python +def S.addSaturate(a, b): + def addsat(x, y): + return S.Saturate(x + y) + return S.lanewise_binary(addsat, a, b) +``` + +### Saturating integer subtraction +* `s8x16.subSaturate(a: v128, b: v128) -> v128` +* `s16x8.subSaturate(a: v128, b: v128) -> v128` +* `u8x16.subSaturate(a: v128, b: v128) -> v128` +* `u16x8.subSaturate(a: v128, b: v128) -> v128` + +Lane-wise saturating subtraction: + +```python +def S.subSaturate(a, b): + def subsat(x, y): + return S.Saturate(x - y) + return S.lanewise_binary(subsat, a, b) +``` + +## Bit shifts + +### Left shift by scalar +* `i8x16.shiftLeftByScalar(a: v128, y: i8) -> v128` +* `i16x8.shiftLeftByScalar(a: v128, y: i8) -> v128` +* `i32x4.shiftLeftByScalar(a: v128, y: i8) -> v128` +* `i64x2.shiftLeftByScalar(a: v128, y: i8) -> v128` + +Shift the bits in each lane to the left by the same amount. Only the low bits of +the shift amount are used: + +```python +def S.shiftLeftByScalar(a, x): + # Number of bits to shift: 0 .. S.LaneBits - 1. + amount = y mod S.LaneBits + def shift(x): + return S.Reduce(x << amount) + return S.lanewise_unary(shift, a) +``` + +### Right shift by scalar +* `s8x16.shiftRightByScalar(a: v128, y: i8) -> v128` +* `s16x8.shiftRightByScalar(a: v128, y: i8) -> v128` +* `s32x4.shiftRightByScalar(a: v128, y: i8) -> v128` +* `s64x2.shiftRightByScalar(a: v128, y: i8) -> v128` +* `u8x16.shiftRightByScalar(a: v128, y: i8) -> v128` +* `u16x8.shiftRightByScalar(a: v128, y: i8) -> v128` +* `u32x4.shiftRightByScalar(a: v128, y: i8) -> v128` +* `u64x2.shiftRightByScalar(a: v128, y: i8) -> v128` + +Shift the bits in each lane to the right by the same amount. This is an +arithmetic right shift for the signed integer interpretations and a logical +right shift for the unsigned integer interpretations. + +```python +def S.shiftRightByScalar(a, y): + # Number of bits to shift: 0 .. S.LaneBits - 1. + amount = y mod S.LaneBits + def shift(x): + return x >> amount + return S.lanewise_unary(shift, a) +``` + +## Logical operations + +The logical operations are defined on the boolean SIMD types. See also the +[Bitwise operations](#bitwise-operations) below. + +### Logical and +* `b8x16.and(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.and(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.and(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.and(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.and(a, b): + def logical_and(x, y): + return x and y + return S.lanewise_binary(logical_and, a, b) +``` + +### Logical or +* `b8x16.or(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.or(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.or(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.or(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.or(a, b): + def logical_or(x, y): + return x or y + return S.lanewise_binary(logical_or, a, b) +``` + +### Logical xor +* `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.xor(a, b): + def logical_xor(x, y): + return x xor y + return S.lanewise_binary(logical_xor, a, b) +``` + +### Logical not +* `b8x16.not(a: b8x16) -> b8x16` +* `b16x8.not(a: b16x8) -> b16x8` +* `b32x4.not(a: b32x4) -> b32x4` +* `b64x2.not(a: b64x2) -> b64x2` + +```python +def S.not(a): + def logical_not(x): + return not x + return S.lanewise_unary(logical_not, a) +``` + +## Bitwise operations + +The same logical operations defined on the boolean types are also available on +the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, and +`~` operators work on an `unsigned` type. + +* `v128.and(a: v128, b: v128) -> v128` +* `v128.or(a: v128, b: v128) -> v128` +* `v128.xor(a: v128, b: v128) -> v128` +* `v128.not(a: v128) -> v128` + +## Boolean horizontal reductions + +These operations reduce all the lanes of a boolean vector to a single scalar +boolean value. + +### Any lane true +* `b8x16.anyTrue(a: b8x16) -> boolean` +* `b16x8.anyTrue(a: b16x8) -> boolean` +* `b32x4.anyTrue(a: b32x4) -> boolean` +* `b64x2.anyTrue(a: b64x2) -> boolean` + +These functions return true if any lane in `a` is true. + +```python +def S.anyTrue(a): + for i in range(S.Lanes): + if a[i]: + return true + return false +``` + +### All lanes true +* `b8x16.allTrue(a: b8x16) -> boolean` +* `b16x8.allTrue(a: b16x8) -> boolean` +* `b32x4.allTrue(a: b32x4) -> boolean` +* `b64x2.allTrue(a: b64x2) -> boolean` + +These functions return true if all lanes in `a` are true. + +```python +def S.allTrue(a): + for i in range(S.Lanes): + if not a[i]: + return false + return true +``` + +## Comparisons + +The comparison operations all compare two vectors lane-wise, and produce a +boolean vector with the same number of lanes as the input interpretation. + +### Equality +* `i8x16.equal(a: v128, b: v128) -> b8x16` +* `i16x8.equal(a: v128, b: v128) -> b16x8` +* `i32x4.equal(a: v128, b: v128) -> b32x4` +* `i64x2.equal(a: v128, b: v128) -> b64x2` +* `f32x4.equal(a: v128, b: v128) -> b32x4` +* `f64x2.equal(a: v128, b: v128) -> b64x2` + +Integer equality is independent of the signed/unsigned interpretation. Floating +point equality follows IEEE semantics, so a NaN lane compares not equal with +anything, including itself: + +```python +def S.equal(a, b): + def eq(x, y): + return x == y + return S.lanewise_comparison(eq, a, b) +``` + +### Non-equality +* `i8x16.notEqual(a: v128, b: v128) -> b8x16` +* `i16x8.notEqual(a: v128, b: v128) -> b16x8` +* `i32x4.notEqual(a: v128, b: v128) -> b32x4` +* `i64x2.notEqual(a: v128, b: v128) -> b64x2` +* `f32x4.notEqual(a: v128, b: v128) -> b32x4` +* `f64x2.notEqual(a: v128, b: v128) -> b64x2` + +The `notEqual` operations produce the inverse of their `equal` counterparts: + +```python +def S.notEqual(a, b): + def ne(x, y): + return x != y + return S.lanewise_comparison(ne, a, b) +``` + +### Less than +* `s8x16.lessThan(a: v128, b: v128) -> b8x16` +* `s16x8.lessThan(a: v128, b: v128) -> b16x8` +* `s32x4.lessThan(a: v128, b: v128) -> b32x4` +* `s64x2.lessThan(a: v128, b: v128) -> b64x2` +* `u8x16.lessThan(a: v128, b: v128) -> b8x16` +* `u16x8.lessThan(a: v128, b: v128) -> b16x8` +* `u32x4.lessThan(a: v128, b: v128) -> b32x4` +* `u64x2.lessThan(a: v128, b: v128) -> b64x2` +* `f32x4.lessThan(a: v128, b: v128) -> b32x4` +* `f64x2.lessThan(a: v128, b: v128) -> b64x2` + +Integer magnitude comparisons depend on the signed/unsigned interpretation of +the lanes. Floating point comparisons follow IEEE semantics: + +```python +def S.lessThan(a, b): + def lt(x, y): + return x < y + return S.lanewise_comparison(lt, a, b) +``` + +### Less than or equal +* `s8x16.lessThanOrEqual(a: v128, b: v128) -> b8x16` +* `s16x8.lessThanOrEqual(a: v128, b: v128) -> b16x8` +* `s32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` +* `s64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` +* `u8x16.lessThanOrEqual(a: v128, b: v128) -> b8x16` +* `u16x8.lessThanOrEqual(a: v128, b: v128) -> b16x8` +* `u32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` +* `u64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` +* `f32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` +* `f64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` + +```python +def S.lessThanOrEqual(a, b): + def le(x, y): + return x <= y + return S.lanewise_comparison(le, a, b) +``` + +### Greater than +* `s8x16.greaterThan(a: v128, b: v128) -> b8x16` +* `s16x8.greaterThan(a: v128, b: v128) -> b16x8` +* `s32x4.greaterThan(a: v128, b: v128) -> b32x4` +* `s64x2.greaterThan(a: v128, b: v128) -> b64x2` +* `u8x16.greaterThan(a: v128, b: v128) -> b8x16` +* `u16x8.greaterThan(a: v128, b: v128) -> b16x8` +* `u32x4.greaterThan(a: v128, b: v128) -> b32x4` +* `u64x2.greaterThan(a: v128, b: v128) -> b64x2` +* `f32x4.greaterThan(a: v128, b: v128) -> b32x4` +* `f64x2.greaterThan(a: v128, b: v128) -> b64x2` + +```python +def S.greaterThan(a, b): + def gt(x, y): + return x > y + return S.lanewise_comparison(gt, a, b) +``` + +### Greater than or equal +* `s8x16.greaterThanOrEqual(a: v128, b: v128) -> b8x16` +* `s16x8.greaterThanOrEqual(a: v128, b: v128) -> b16x8` +* `s32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` +* `s64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` +* `u8x16.greaterThanOrEqual(a: v128, b: v128) -> b8x16` +* `u16x8.greaterThanOrEqual(a: v128, b: v128) -> b16x8` +* `u32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` +* `u64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` +* `f32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` +* `f64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` + +```python +def S.greaterThanOrEqual(a, b): + def ge(x, y): + return x >= y + return S.lanewise_comparison(ge, a, b) +``` + +## Load and store + +Load and store operations are provided for `v128` vectors, but not for the +boolean vectors; we don't want to impose a bitwise representation of the boolean +vectors. + +The memory operations work on an abstract `Buffer` instance which can be +addressed by a `ByteOffset` type. Unaligned memory operations are allowed, but +they may be slower than aligned operations. + +This specification does not address bounds checking and trap handling for memory +operations. It is assumed that the range `addr .. addr+15` are valid offsets in +the buffer, and that computing `addr+15` does not overflow the `ByteOffset` +type. Bounds checking should be handled by the embedding specification. + +### Load + +* `v8x16.load(mem: Buffer, addr: ByteOffset) -> v128` +* `v16x8.load(mem: Buffer, addr: ByteOffset) -> v128` +* `v32x4.load(mem: Buffer, addr: ByteOffset) -> v128` +* `v64x2.load(mem: Buffer, addr: ByteOffset) -> v128` + +Load a `v128` vector from the given buffer and offset. + +```python +def S.load(mem, addr): + assert mem.in_range(addr, 16) + result = S.New() + lane_bytes = S.LaneBits / 8 + for i in range(S.Lanes): + result[i] = mem.load(S.LaneBits, addr + i * lane_bytes) + return result +``` + +### Store + +* `v8x16.store(mem: Buffer, addr: ByteOffset, data: v128)` +* `v16x8.store(mem: Buffer, addr: ByteOffset, data: v128)` +* `v32x4.store(mem: Buffer, addr: ByteOffset, data: v128)` +* `v64x2.store(mem: Buffer, addr: ByteOffset, data: v128)` + +Store a `v128` vector to the given buffer and offset. + +```python +def S.store(mem, addr, data): + assert mem.in_range(addr, 16) + lane_bytes = S.LaneBits / 8 + for i in range(S.Lanes): + mem.store(S.LaneBits, addr + i * lane_bytes, data[i]) +``` + +### Byte order and lane numbering + +The lane-wise load and store operations used above will read and write a lane +using the native byte order, so for example storing a vector with the `i32x4` +interpretation is equivalent to storing 4 `i32` values to memory. This +specification has some hard requirements for the lane and bit numbering: + +- The bits in a `v128` are numbered 0-127. +- Lanes are numbered in the same direction as the `v128` bits. +- Lanes are stored in memory in ascending addresses, so lane 0 gets the lowest + address. + +These hard requirements still leave multiple ways of mapping byte order to +vectors: + +- **Little-endian direct**: The bit with the lowest number in each lane is the + *least* significant bit. This is the natural mapping for Intel SSE and the + little-endian modes of ARM NEON and MIPS MSA. + +- **Big-endian direct**: The bit with the lowest number in each lane is the *most* + significant bit. This is the natural mapping for big-endian PowerPC. + +- **Big-endian hybrid**: The bit with the lowest number in each lane is the + *least* significant bit. This is the natural mapping for the big-endian modes + of ARM NEON and MIPS MSA. + +The mapping is visible when reinterpreting a vector: + +```python +a = i64x2.build([0x0123456789abcdef, 0x1122334455667788]) +x = i8x16.extractLane(a, 0) +``` + +The extracted lane, `x`, will be `0xef` in the little-endian direct and the +big-endian hybrid mappings, but `0x01` in the big-endian direct mapping. + +The big-endian hybrid mapping requires separate load and store instructions for +each lane width, while the direct mappings can use the same instruction for all +vectors. For example, the `a` vector above will be stored like this with the +big-endian hybrid mapping: + +``` +v64x2.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 +v32x4.store: 89 ab cd ef 01 23 45 67 55 66 77 88 11 22 33 44 +v16x8.store: cd ef 89 ab 45 67 01 23 77 88 55 66 33 44 11 22 +v8x16.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 +``` + +The big-endian direct mapping would write `a` like this: + +``` +v64x2.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 +v32x4.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 +v16x8.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 +v8x16.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 +``` + +The little-endian direct mapping would write `a` like this: + +``` +v64x2.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 +v32x4.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 +v16x8.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 +v8x16.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 +``` + +This specification doesn't address type conversions since there is only one +type, `v128`, but note that it is common for more fine-grained SIMD type systems +to specify 'bit casts' between different SIMD types of the same size as +equivalent to storing one type and loading another from the same address. Both +LLVM and SIMD.js specify bit casts that way. LLVM's ARM and MIPS targets use the +hybrid lane mapping in their big-endian modes and translate `bitcast` +instructions to shuffles. + +It would be possible for SIMD.js to use the big-endian direct mapping on ARM and +MIPS by numbering the lanes differently and using the `64x2` load/store +instructions for all memory operations. It would also be possible to use the +big-endian hybrid mapping by expanding bit casts into shuffles. + +WebAssembly is little-endian only. + +### Partial load + +* `v32x4.load1(mem: Buffer, addr: ByteOffset) -> v128` +* `v32x4.load2(mem: Buffer, addr: ByteOffset) -> v128` +* `v32x4.load3(mem: Buffer, addr: ByteOffset) -> v128` + +These functions load the first 1, 2, or 3 lanes from a buffer and sets the +remaining lanes to all zeroes. The partial loads are only defined for 4-lane +interpretations. + +```python +def partial_load(mem, addr, lanes): + result = v32x4.splat(0) + for i in range(lanes): + result[i] = mem.load(32, addr + i * 4) + return result + +def v32x4.load1(mem, addr): + assert mem.in_range(addr, 4) + return partial_load(mem, addr, 1) + +def v32x4.load2(mem, addr): + assert mem.in_range(addr, 8) + return partial_load(mem, addr, 2) + +def v32x4.load3(mem, addr): + assert mem.in_range(addr, 12) + return partial_load(mem, addr, 3) +``` + +### Partial store + +* `v32x4.store1(mem: Buffer, addr: ByteOffset, data: v128)` +* `v32x4.store2(mem: Buffer, addr: ByteOffset, data: v128)` +* `v32x4.store3(mem: Buffer, addr: ByteOffset, data: v128)` + +These functions store the first 1, 2, or 3 lanes to a buffer. They are only +defined for the 4-lane interpretations. + +```python +def partial_store(mem, addr, data, lanes): + for i in range(lanes): + mem.store(32, addr + i * 4, data[i]) + +def v32x4.store1(mem, addr, data): + assert mem.in_range(addr, 4) + partial_store(mem, addr, data, 1) + +def v32x4.store2(mem, addr, data): + assert mem.in_range(addr, 8) + partial_store(mem, addr, data, 2) + +def v32x4.store3(mem, addr, data): + assert mem.in_range(addr, 12) + partial_store(mem, addr, data, 3) +``` + +## Floating-point sign bit operations + +These floating point operations are simple manipulations of the sign bit. No +changes are made to the exponent or trailing significand bits, even for NaN +inputs. + +### Negation +* `f32x4.neg(a: v128) -> v128` +* `f64x2.neg(a: v128) -> v128` + +Apply the IEEE `negate(x)` function to each lane. This simply inverts the sign +bit, preserving all other bits. + +```python +def S.neg(a): + return S.lanewise_unary(ieee.negate, a) +``` + +### Absolute value +* `f32x4.abs(a: v128) -> v128` +* `f64x2.abs(a: v128) -> v128` + +Apply the IEEE `abs(x)` function to each lane. This simply clears the sign bit, +preserving all other bits. + +```python +def S.abs(a): + return S.lanewise_unary(ieee.abs, a) +``` + +## Floating-point min and max + +These operations are not part of the IEEE 754-2008 standard. Notably, the +`minNum` and `maxNum` operations defined here behave differently than the IEEE +`minNum` and `maxNum` operations when one operand is a signaling NaN. + +The minimum and maximum value of +0 and -0 is computed as if -0 < +0. + +### NaN-propagating minimum +* `f32x4.min(a: v128, b: v128) -> v128` +* `f64x2.min(a: v128, b: v128) -> v128` + +Lane-wise minimum value, propagating NaNs: + +```python +def S.min(a, b): + def min(x, y): + if isnan(x) or isnan(y): + return propagate_nan(x, y) + # Prefer -0 for min(-0, +0) and min(+0, -0). + if x == 0 and y == 0 and signbit(x) != signbit(y): + return -0.0 + if x < y: + return x + else: + return y + return S.lanewise_binary(min, a, b) +``` + +### NaN-propagating maximum +* `f32x4.max(a: v128, b: v128) -> v128` +* `f64x2.max(a: v128, b: v128) -> v128` + +Lane-wise maximum value, propagating NaNs: + +```python +def S.max(a, b): + def max(x, y): + if isnan(x) or isnan(y): + return propagate_nan(x, y) + # Prefer +0 for max(-0, +0) and max(+0, -0). + if x == 0 and y == 0 and signbit(x) != signbit(y): + return +0.0 + if x > y: + return x + else: + return y + return S.lanewise_binary(max, a, b) +``` + +### NaN-suppressing minimum +* `f32x4.minNum(a: v128, b: v128) -> v128` +* `f64x2.minNum(a: v128, b: v128) -> v128` + +Lane-wise minimum value, suppressing single NaNs: + +```python +def S.minNum(a, b): + def minNum(x, y): + if isnan(x) and isnan(y): + return propagate_nan(x, y) + if isnan(x): + return y + if isnan(y): + return x + # Prefer -0 for min(-0, +0) and min(+0, -0). + if x == 0 and y == 0 and signbit(x) != signbit(y): + return -0.0 + if x < y: + return x + else: + return y + return S.lanewise_binary(minNum, a, b) +``` + +Note that this function behaves differently than the IEEE 754 `minNum` function +when one of the operands is a signaling NaN. + +### NaN-suppressing maximum +* `f32x4.maxNum(a: v128, b: v128) -> v128` +* `f64x2.maxNum(a: v128, b: v128) -> v128` + +Lane-wise maximum value, suppressing single NaNs: + +```python +def S.maxNum(a, b): + def maxNum(a, b): + if isnan(x) and isnan(y): + return propagate_nan(x, y) + if isnan(x): + return y + if isnan(y): + return x + # Prefer +0 for max(-0, +0) and max(+0, -0). + if x == 0 and y == 0 and signbit(x) != signbit(y): + return +0.0 + if x > y: + return x + else: + return y + return S.lanewise_binary(maxNum, a, b) +``` + +Note that this function behaves differently than the IEEE 754 `maxNum` function +when one of the operands is a signaling NaN. + +## Floating-point arithmetic + +The floating-point arithmetic operations handle NaNs more strictly specified +than the IEEE standard: + +```python +def wrap_fp_unary(func, rmode): + def wrapped(x): + if isnan(x): + return canonicalize_nan(x) + result = func(x, rmode) + if isnan(result): + return type(result).default_nan() + else: + return result + return wrapped + +def wrap_fp_binary(func, rmode): + def wrapped(x, y): + if isnan(x) or isnan(y): + return propagate_nan(x, y) + result = func(x, y, rmode) + if isnan(result): + return type(result).default_nan() + else: + return result + return wrapped +``` + +### Addition +* `f32x4.add(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f64x2.add(a: v128, b: v128, rmode: RoundingMode) -> v128` + +Lane-wise IEEE `addition`. + +```python +def S.add(a, b, rmode): + return S.lanewise_binary(wrap_fp_binary(ieee.addition, rmode), a, b) +``` + +### Subtraction +* `f32x4.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f64x2.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` + +Lane-wise IEEE `subtraction`. + +```python +def S.sub(a, b, rmode): + return S.lanewise_binary(wrap_fp_binary(ieee.subtraction, rmode), a, b) +``` + +### Division +* `f32x4.div(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f64x2.div(a: v128, b: v128, rmode: RoundingMode) -> v128` + +Lane-wise IEEE `division`. + +```python +def S.div(a, b, rmode): + return S.lanewise_binary(wrap_fp_binary(ieee.division, rmode), a, b) +``` + +### Multiplication +* `f32x4.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f64x2.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` + +Lane-wise IEEE `multiplication`. + +```python +def S.mul(a, b, rmode): + return S.lanewise_binary(wrap_fp_binary(ieee.multiplication, rmode), a, b) +``` + +### Square root +* `f32x4.sqrt(a: v128, rmode: RoundingMode) -> v128` +* `f64x2.sqrt(a: v128, rmode: RoundingMode) -> v128` + +Lane-wise IEEE `squareRoot`. + +```python +def S.sqrt(a, rmode): + return S.lanewise_unary(wrap_fp_unary(ieee.squareRoot, rmode), a) +``` + +### Reciprocal approximation +* `f32x4.reciprocalApproximation(a: v128) -> v128` +* `f64x2.reciprocalApproximation(a: v128) -> v128` + +Implementation-dependent approximation to the reciprocal. + +```python +def S.reciprocalApproximation(a): + def recip_approx(x): + if isnan(x): + return canonicalize_nan(x) + if x == 0.0: + # +0.0 -> +Inf, -0.0 -> -Inf. + return 1/x + if isinf(x): + # +Inf -> +0.0, -Inf -> -0.0. + return 1/x + # The exact nature of the approximation is unspecified. + return implementation_dependent(x) + return S.lanewise_unary(recip_approx, a) +``` + +### Reciprocal square root approximation +* `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` +* `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` + +Implementation-dependent approximation to the reciprocal of the square root. + +```python +def S.reciprocalSqrtApproximation(a): + def recip_sqrt_approx(x): + if isnan(x): + return canonicalize_nan(x) + if x == 0: + # +0.0 -> +Inf, -0.0 -> -Inf. + return 1/x + if isinf(x): + # +Inf -> +0.0, -Inf -> -0.0. + return 1/x + # The exact nature of the approximation is unspecified. + return implementation_dependent(x) + return S.lanewise_unary(recip_sqrt_approx, a) +``` + +## Conversions +### Integer to floating point +* `f32x4.fromSignedInt(a: v128, rmode: RoundingMode) -> v128` +* `f64x2.fromSignedInt(a: v128, rmode: RoundingMode) -> v128` +* `f32x4.fromUnsignedInt(a: v128, rmode: RoundingMode) -> v128` +* `f64x2.fromUnsignedInt(a: v128, rmode: RoundingMode) -> v128` + +Lane-wise conversion from integer to floating point. Some integer values will be +rounded. + +```python +def S.fromSignedInt(a, rmode): + def convert(x): + return S.LaneType.convertFromInt(x, rmode) + return S.lanewise_unary(convert, a) + +def S.fromUnsignedInt(a, rmode): + def convert(x): + return S.LaneType.convertFromInt(x, rmode) + return S.lanewise_unary(convert, a) +``` + +### Floating point to integer +* `s32x4.fromFloat(a: v128) -> (result: v128, fail: boolean)` +* `s64x2.fromFloat(a: v128) -> (result: v128, fail: boolean)` +* `u32x4.fromFloat(a: v128) -> (result: v128, fail: boolean)` +* `u64x2.fromFloat(a: v128) -> (result: v128, fail: boolean)` + +Lane-wise conversion from floating point to integer using the IEEE +`convertToIntegerTowardZero` function. If any lane is a NaN or the rounded +integer value is outside the range of the destination type, return `fail = true` +and an unspecified `result`. + +```python +def S.fromFloat(a): + result = S.New() + fail = false + for i in range(S.Lanes): + r = ieee.roundToIntegralTowardZero(a[i]) + if isnan(r): + fail = true + elif S.Min <= r and r <= S.Max: + result[i] = r + else: + fail = true + if fail: + return (unspecified(), true) + else + return (result, false) +``` + +[wasm]: https://webassembly.github.io/ (WebAssembly) +[simdjs]: http://tc39.github.io/ecmascript_simd/ (SIMD.js specification) +[ieee754]: https://standards.ieee.org/findstds/standard/754-2008.html (754-2008 - IEEE Standard for Floating-Point Arithmetic) diff --git a/proposals/simd/webassembly-opcodes.md b/proposals/simd/webassembly-opcodes.md new file mode 100644 index 0000000000..db20638832 --- /dev/null +++ b/proposals/simd/webassembly-opcodes.md @@ -0,0 +1,279 @@ +# WebAssembly SIMD operations + +The SIMD operations are grouped according to the interpretation of the input +and output vectors: + +| Shape | Int | Float | Bool | +|:-----:|:---:|:-----:|:----:| +| [v8x16](#v8x16-operations) | [i8x16](#i8x16-operations) | - | [b8x16](#b8x16-operations) | +| [v16x8](#v16x8-operations) | [i16x8](#i16x8-operations) | - | [b16x8](#b16x8-operations) | +| [v32x4](#v32x4-operations) | [i32x4](#i32x4-operations) | [f32x4](#f32x4-operations) | [b32x4](#b32x4-operations) | +| [v64x2](#v64x2-operations) | [i64x2](#i64x2-operations) | [f64x2](#f64x2-operations) | [b64x2](#b64x2-operations) | + +## `v128` operations +| WebAssembly | Portable SIMD | +|:---------------------------------------|:--------------| +| `v128.and(a: v128, b: v128) -> v128` | [v128.and](portable-simd.md#bitwise-operations) | +| `v128.or(a: v128, b: v128) -> v128` | [v128.or](portable-simd.md#bitwise-operations) | +| `v128.xor(a: v128, b: v128) -> v128` | [v128.xor](portable-simd.md#bitwise-operations) | +| `v128.not(a: v128) -> v128` | [v128.not](portable-simd.md#bitwise-operations) | +| `v128.load(addr, offset) -> v128` | [v128.load](portable-simd.md#load) | +| `v128.store(addr, offset, data: v128)` | [v128.store](portable-simd.md#store) | + +## `v8x16` operations +| WebAssembly | Portable SIMD | +|:------------------------------------------------------------|:--------------| +| `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` | [v8x16.select](portable-simd.md#lane-wise-select) | +| `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` | [v8x16.swizzle](portable-simd.md#swizzle-lanes) | +| `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` | [v8x16.shuffle](portable-simd.md#shuffle-lanes) | + +## `i8x16` operations +| WebAssembly | Portable SIMD | +|:-----------------------------------------------------------|:--------------| +| `i8x16.build(x: i32[16]) -> v128` | [i8x16.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i8x16.splat(x: i32) -> v128` | [i8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i32) -> v128` | [i8x16.replaceLane](portable-simd.md#replace-lane-value) | +| `i8x16.add(a: v128, b: v128) -> v128` | [i8x16.add](portable-simd.md#integer-addition) | +| `i8x16.sub(a: v128, b: v128) -> v128` | [i8x16.sub](portable-simd.md#integer-subtraction) | +| `i8x16.mul(a: v128, b: v128) -> v128` | [i8x16.mul](portable-simd.md#integer-multiplication) | +| `i8x16.neg(a: v128) -> v128` | [i8x16.neg](portable-simd.md#integer-negation) | +| `i8x16.addSaturate_s(a: v128, b: v128) -> v128` | [s8x16.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i8x16.addSaturate_u(a: v128, b: v128) -> v128` | [u8x16.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i8x16.subSaturate_s(a: v128, b: v128) -> v128` | [s8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i8x16.subSaturate_u(a: v128, b: v128) -> v128` | [u8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i8x16.shl(a: v128, y: i32) -> v128` | [i8x16.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i8x16.shr_s(a: v128, y: i32) -> v128` | [s8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i8x16.shr_u(a: v128, y: i32) -> v128` | [u8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i8x16.eq(a: v128, b: v128) -> b8x16` | [i8x16.equal](portable-simd.md#equality) | +| `i8x16.ne(a: v128, b: v128) -> b8x16` | [i8x16.notEqual](portable-simd.md#non-equality) | +| `i8x16.lt_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThan](portable-simd.md#less-than) | +| `i8x16.lt_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThan](portable-simd.md#less-than) | +| `i8x16.le_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i8x16.le_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i8x16.gt_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThan](portable-simd.md#greater-than) | +| `i8x16.gt_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThan](portable-simd.md#greater-than) | +| `i8x16.ge_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i8x16.ge_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | + +## `v16x8` operations +| WebAssembly | Portable SIMD | +|:-----------------------------------------------------------|:--------------| +| `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` | [v16x8.select](portable-simd.md#lane-wise-select) | +| `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` | [v16x8.swizzle](portable-simd.md#swizzle-lanes) | +| `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` | [v16x8.shuffle](portable-simd.md#shuffle-lanes) | + +## `i16x8` operations +| WebAssembly | Portable SIMD | +|:----------------------------------------------------------|:--------------| +| `i16x8.build(x: i32[8]) -> v128` | [i16x8.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i16x8.splat(x: i32) -> v128` | [i16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i32) -> v128` | [i16x8.replaceLane](portable-simd.md#replace-lane-value) | +| `i16x8.add(a: v128, b: v128) -> v128` | [i16x8.add](portable-simd.md#integer-addition) | +| `i16x8.sub(a: v128, b: v128) -> v128` | [i16x8.sub](portable-simd.md#integer-subtraction) | +| `i16x8.mul(a: v128, b: v128) -> v128` | [i16x8.mul](portable-simd.md#integer-multiplication) | +| `i16x8.neg(a: v128) -> v128` | [i16x8.neg](portable-simd.md#integer-negation) | +| `i16x8.addSaturate_s(a: v128, b: v128) -> v128` | [s16x8.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i16x8.addSaturate_u(a: v128, b: v128) -> v128` | [u16x8.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i16x8.subSaturate_s(a: v128, b: v128) -> v128` | [s16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i16x8.subSaturate_u(a: v128, b: v128) -> v128` | [u16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i16x8.shl(a: v128, y: i32) -> v128` | [i16x8.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i16x8.shr_s(a: v128, y: i32) -> v128` | [s16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i16x8.shr_u(a: v128, y: i32) -> v128` | [u16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i16x8.eq(a: v128, b: v128) -> b16x8` | [i16x8.equal](portable-simd.md#equality) | +| `i16x8.ne(a: v128, b: v128) -> b16x8` | [i16x8.notEqual](portable-simd.md#non-equality) | +| `i16x8.lt_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThan](portable-simd.md#less-than) | +| `i16x8.lt_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThan](portable-simd.md#less-than) | +| `i16x8.le_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i16x8.le_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i16x8.gt_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThan](portable-simd.md#greater-than) | +| `i16x8.gt_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThan](portable-simd.md#greater-than) | +| `i16x8.ge_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i16x8.ge_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | + +## `v32x4` operations +| WebAssembly | Portable SIMD | +|:----------------------------------------------------------|:--------------| +| `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` | [v32x4.select](portable-simd.md#lane-wise-select) | +| `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` | [v32x4.swizzle](portable-simd.md#swizzle-lanes) | +| `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` | [v32x4.shuffle](portable-simd.md#shuffle-lanes) | +| `v32x4.load1(addr, offset) -> v128` | [v32x4.load1](portable-simd.md#partial-load) | +| `v32x4.load2(addr, offset) -> v128` | [v32x4.load2](portable-simd.md#partial-load) | +| `v32x4.load3(addr, offset) -> v128` | [v32x4.load3](portable-simd.md#partial-load) | +| `v32x4.store1(addr, offset, data: v128)` | [v32x4.store1](portable-simd.md#partial-store) | +| `v32x4.store2(addr, offset, data: v128)` | [v32x4.store2](portable-simd.md#partial-store) | +| `v32x4.store3(addr, offset, data: v128)` | [v32x4.store3](portable-simd.md#partial-store) | + +## `i32x4` operations +| WebAssembly | Portable SIMD | +|:----------------------------------------------------------|:--------------| +| `i32x4.build(x: i32[4]) -> v128` | [i32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i32x4.splat(x: i32) -> v128` | [i32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` | [i32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` | [i32x4.replaceLane](portable-simd.md#replace-lane-value) | +| `i32x4.add(a: v128, b: v128) -> v128` | [i32x4.add](portable-simd.md#integer-addition) | +| `i32x4.sub(a: v128, b: v128) -> v128` | [i32x4.sub](portable-simd.md#integer-subtraction) | +| `i32x4.mul(a: v128, b: v128) -> v128` | [i32x4.mul](portable-simd.md#integer-multiplication) | +| `i32x4.neg(a: v128) -> v128` | [i32x4.neg](portable-simd.md#integer-negation) | +| `i32x4.shl(a: v128, y: i32) -> v128` | [i32x4.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i32x4.shr_s(a: v128, y: i32) -> v128` | [s32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i32x4.shr_u(a: v128, y: i32) -> v128` | [u32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i32x4.eq(a: v128, b: v128) -> b32x4` | [i32x4.equal](portable-simd.md#equality) | +| `i32x4.ne(a: v128, b: v128) -> b32x4` | [i32x4.notEqual](portable-simd.md#non-equality) | +| `i32x4.lt_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThan](portable-simd.md#less-than) | +| `i32x4.lt_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThan](portable-simd.md#less-than) | +| `i32x4.le_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i32x4.le_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i32x4.gt_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThan](portable-simd.md#greater-than) | +| `i32x4.gt_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThan](portable-simd.md#greater-than) | +| `i32x4.ge_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i32x4.ge_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i32x4.trunc_s/f32x4(a: v128) -> v128` | [s32x4.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i32x4.trunc_u/f32x4(a: v128) -> v128` | [u32x4.fromFloat](portable-simd.md#floating-point-to-integer) | + +## `f32x4` operations +| WebAssembly | Portable SIMD | +|:--------------------------------------------------------------|:--------------| +| `f32x4.build(x: f32[4]) -> v128` | [f32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `f32x4.splat(x: f32) -> v128` | [f32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` | [f32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` | [f32x4.replaceLane](portable-simd.md#replace-lane-value) | +| `f32x4.add(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.add](portable-simd.md#addition) | +| `f32x4.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.sub](portable-simd.md#subtraction) | +| `f32x4.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.mul](portable-simd.md#multiplication) | +| `f32x4.neg(a: v128) -> v128` | [f32x4.neg](portable-simd.md#negation) | +| `f32x4.eq(a: v128, b: v128) -> b32x4` | [f32x4.equal](portable-simd.md#equality) | +| `f32x4.ne(a: v128, b: v128) -> b32x4` | [f32x4.notEqual](portable-simd.md#non-equality) | +| `f32x4.lt(a: v128, b: v128) -> b32x4` | [f32x4.lessThan](portable-simd.md#less-than) | +| `f32x4.le(a: v128, b: v128) -> b32x4` | [f32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `f32x4.gt(a: v128, b: v128) -> b32x4` | [f32x4.greaterThan](portable-simd.md#greater-than) | +| `f32x4.ge(a: v128, b: v128) -> b32x4` | [f32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `f32x4.abs(a: v128) -> v128` | [f32x4.abs](portable-simd.md#absolute-value) | +| `f32x4.min(a: v128, b: v128) -> v128` | [f32x4.min](portable-simd.md#nan-propagating-minimum) | +| `f32x4.max(a: v128, b: v128) -> v128` | [f32x4.max](portable-simd.md#nan-propagating-maximum) | +| `f32x4.div(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.div](portable-simd.md#division) | +| `f32x4.sqrt(a: v128, rmode: RoundingMode) -> v128` | [f32x4.sqrt](portable-simd.md#square-root) | +| `f32x4.reciprocalApproximation(a: v128) -> v128` | [f32x4.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | +| `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` | [f32x4.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | +| `f32x4.convert_s/i32x4(a: v128, rmode: RoundingMode) -> v128` | [f32x4.fromSignedInt](portable-simd.md#integer-to-floating-point) | +| `f32x4.convert_u/i32x4(a: v128, rmode: RoundingMode) -> v128` | [f32x4.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | + +## `v64x2` operations +| WebAssembly | Portable SIMD | +|:----------------------------------------------------------|:--------------| +| `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` | [v64x2.select](portable-simd.md#lane-wise-select) | +| `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` | [v64x2.swizzle](portable-simd.md#swizzle-lanes) | +| `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` | [v64x2.shuffle](portable-simd.md#shuffle-lanes) | + +## `i64x2` operations +| WebAssembly | Portable SIMD | +|:----------------------------------------------------------|:--------------| +| `i64x2.build(x: i64[2]) -> v128` | [i64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i64x2.splat(x: i64) -> v128` | [i64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` | [i64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` | [i64x2.replaceLane](portable-simd.md#replace-lane-value) | +| `i64x2.add(a: v128, b: v128) -> v128` | [i64x2.add](portable-simd.md#integer-addition) | +| `i64x2.sub(a: v128, b: v128) -> v128` | [i64x2.sub](portable-simd.md#integer-subtraction) | +| `i64x2.mul(a: v128, b: v128) -> v128` | [i64x2.mul](portable-simd.md#integer-multiplication) | +| `i64x2.neg(a: v128) -> v128` | [i64x2.neg](portable-simd.md#integer-negation) | +| `i64x2.shl(a: v128, y: i32) -> v128` | [i64x2.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i64x2.shr_s(a: v128, y: i32) -> v128` | [s64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i64x2.shr_u(a: v128, y: i32) -> v128` | [u64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i64x2.eq(a: v128, b: v128) -> b64x2` | [i64x2.equal](portable-simd.md#equality) | +| `i64x2.ne(a: v128, b: v128) -> b64x2` | [i64x2.notEqual](portable-simd.md#non-equality) | +| `i64x2.lt_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThan](portable-simd.md#less-than) | +| `i64x2.lt_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThan](portable-simd.md#less-than) | +| `i64x2.le_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i64x2.le_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i64x2.gt_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThan](portable-simd.md#greater-than) | +| `i64x2.gt_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThan](portable-simd.md#greater-than) | +| `i64x2.ge_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i64x2.ge_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i64x2.trunc_s/f64x2(a: v128) -> v128` | [s64x2.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i64x2.trunc_u/f64x2(a: v128) -> v128` | [u64x2.fromFloat](portable-simd.md#floating-point-to-integer) | + +## `f64x2` operations +| WebAssembly | Portable SIMD | +|:--------------------------------------------------------------|:--------------| +| `f64x2.build(x: f64[2]) -> v128` | [f64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `f64x2.splat(x: f64) -> v128` | [f64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` | [f64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` | [f64x2.replaceLane](portable-simd.md#replace-lane-value) | +| `f64x2.add(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.add](portable-simd.md#addition) | +| `f64x2.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.sub](portable-simd.md#subtraction) | +| `f64x2.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.mul](portable-simd.md#multiplication) | +| `f64x2.neg(a: v128) -> v128` | [f64x2.neg](portable-simd.md#negation) | +| `f64x2.eq(a: v128, b: v128) -> b64x2` | [f64x2.equal](portable-simd.md#equality) | +| `f64x2.ne(a: v128, b: v128) -> b64x2` | [f64x2.notEqual](portable-simd.md#non-equality) | +| `f64x2.lt(a: v128, b: v128) -> b64x2` | [f64x2.lessThan](portable-simd.md#less-than) | +| `f64x2.le(a: v128, b: v128) -> b64x2` | [f64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `f64x2.gt(a: v128, b: v128) -> b64x2` | [f64x2.greaterThan](portable-simd.md#greater-than) | +| `f64x2.ge(a: v128, b: v128) -> b64x2` | [f64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `f64x2.abs(a: v128) -> v128` | [f64x2.abs](portable-simd.md#absolute-value) | +| `f64x2.min(a: v128, b: v128) -> v128` | [f64x2.min](portable-simd.md#nan-propagating-minimum) | +| `f64x2.max(a: v128, b: v128) -> v128` | [f64x2.max](portable-simd.md#nan-propagating-maximum) | +| `f64x2.div(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.div](portable-simd.md#division) | +| `f64x2.sqrt(a: v128, rmode: RoundingMode) -> v128` | [f64x2.sqrt](portable-simd.md#square-root) | +| `f64x2.reciprocalApproximation(a: v128) -> v128` | [f64x2.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | +| `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` | [f64x2.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | +| `f64x2.convert_s/i64x2(a: v128, rmode: RoundingMode) -> v128` | [f64x2.fromSignedInt](portable-simd.md#integer-to-floating-point) | +| `f64x2.convert_u/i64x2(a: v128, rmode: RoundingMode) -> v128` | [f64x2.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | + +## `b8x16` operations +| WebAssembly | Portable SIMD | +|:-------------------------------------------------------------|:--------------| +| `b8x16.build(x: i32[16]) -> b8x16` | [b8x16.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b8x16.splat(x: i32) -> b8x16` | [b8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` | [b8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` | [b8x16.replaceLane](portable-simd.md#replace-lane-value) | +| `b8x16.and(a: b8x16, b: b8x16) -> b8x16` | [b8x16.and](portable-simd.md#logical-and) | +| `b8x16.or(a: b8x16, b: b8x16) -> b8x16` | [b8x16.or](portable-simd.md#logical-or) | +| `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` | [b8x16.xor](portable-simd.md#logical-xor) | +| `b8x16.not(a: b8x16) -> b8x16` | [b8x16.not](portable-simd.md#logical-not) | +| `b8x16.anyTrue(a: b8x16) -> i32` | [b8x16.anyTrue](portable-simd.md#any-lane-true) | +| `b8x16.allTrue(a: b8x16) -> i32` | [b8x16.allTrue](portable-simd.md#all-lanes-true) | + +## `b16x8` operations +| WebAssembly | Portable SIMD | +|:------------------------------------------------------------|:--------------| +| `b16x8.build(x: i32[8]) -> b16x8` | [b16x8.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b16x8.splat(x: i32) -> b16x8` | [b16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` | [b16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` | [b16x8.replaceLane](portable-simd.md#replace-lane-value) | +| `b16x8.and(a: b16x8, b: b16x8) -> b16x8` | [b16x8.and](portable-simd.md#logical-and) | +| `b16x8.or(a: b16x8, b: b16x8) -> b16x8` | [b16x8.or](portable-simd.md#logical-or) | +| `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` | [b16x8.xor](portable-simd.md#logical-xor) | +| `b16x8.not(a: b16x8) -> b16x8` | [b16x8.not](portable-simd.md#logical-not) | +| `b16x8.anyTrue(a: b16x8) -> i32` | [b16x8.anyTrue](portable-simd.md#any-lane-true) | +| `b16x8.allTrue(a: b16x8) -> i32` | [b16x8.allTrue](portable-simd.md#all-lanes-true) | + +## `b32x4` operations +| WebAssembly | Portable SIMD | +|:------------------------------------------------------------|:--------------| +| `b32x4.build(x: i32[4]) -> b32x4` | [b32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b32x4.splat(x: i32) -> b32x4` | [b32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` | [b32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` | [b32x4.replaceLane](portable-simd.md#replace-lane-value) | +| `b32x4.and(a: b32x4, b: b32x4) -> b32x4` | [b32x4.and](portable-simd.md#logical-and) | +| `b32x4.or(a: b32x4, b: b32x4) -> b32x4` | [b32x4.or](portable-simd.md#logical-or) | +| `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` | [b32x4.xor](portable-simd.md#logical-xor) | +| `b32x4.not(a: b32x4) -> b32x4` | [b32x4.not](portable-simd.md#logical-not) | +| `b32x4.anyTrue(a: b32x4) -> i32` | [b32x4.anyTrue](portable-simd.md#any-lane-true) | +| `b32x4.allTrue(a: b32x4) -> i32` | [b32x4.allTrue](portable-simd.md#all-lanes-true) | + +## `b64x2` operations +| WebAssembly | Portable SIMD | +|:------------------------------------------------------------|:--------------| +| `b64x2.build(x: i32[2]) -> b64x2` | [b64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b64x2.splat(x: i32) -> b64x2` | [b64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` | [b64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` | [b64x2.replaceLane](portable-simd.md#replace-lane-value) | +| `b64x2.and(a: b64x2, b: b64x2) -> b64x2` | [b64x2.and](portable-simd.md#logical-and) | +| `b64x2.or(a: b64x2, b: b64x2) -> b64x2` | [b64x2.or](portable-simd.md#logical-or) | +| `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` | [b64x2.xor](portable-simd.md#logical-xor) | +| `b64x2.not(a: b64x2) -> b64x2` | [b64x2.not](portable-simd.md#logical-not) | +| `b64x2.anyTrue(a: b64x2) -> i32` | [b64x2.anyTrue](portable-simd.md#any-lane-true) | +| `b64x2.allTrue(a: b64x2) -> i32` | [b64x2.allTrue](portable-simd.md#all-lanes-true) | From 1b5b92721161967af724233cd7bffd1118cea027 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 13 Apr 2017 16:10:58 -0700 Subject: [PATCH 004/378] Main document of SIMD proposal. --- proposals/simd/Overview.md | 128 ++++++++++++++++++++++++++++++++++++- 1 file changed, 127 insertions(+), 1 deletion(-) diff --git a/proposals/simd/Overview.md b/proposals/simd/Overview.md index 1333ed77b7..f40f014dfc 100644 --- a/proposals/simd/Overview.md +++ b/proposals/simd/Overview.md @@ -1 +1,127 @@ -TODO +# SIMD support for WebAssembly + +This proposal describes how 128-bit SIMD types and operations can be added to +WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 +ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the +[portable SIMD specification](https://github.com/stoklund/portable-simd) that +resulted. + +There are three parts to the proposal: + +1. [A specification of portable SIMD operations](portable-simd.md) that came + out of the SIMD.js work. +2. [A table of proposed WebAssembly operations](webassembly-opcodes.md) with + links to the portable specification. +3. This document which describes the mapping between WebAssembly and the + portable specification. + +Referencing a common specification of the portable SIMD semantics reduces the +work required to support both SIMD.js and WebAssembly SIMD in the same +implementation. + +# Mapping portable SIMD to WebAssembly + +The types and operations in the portable SIMD specification are relatively +straightforward to map to WebAssembly. This section describes the details of +the mapping. + +## New value types + +The following value types are added to the WebAssembly type system to support +128-bit SIMD operations. Each new WebAssembly value type corresponds to the +[portable SIMD type](portable-simd.md#simd-types) of the same name. + +* `v128`: A 128-bit SIMD vector. +* `b8x16`: A vector of 16 boolean lanes. +* `b16x8`: A vector of 8 boolean lanes. +* `b32x4`: A vector of 4 boolean lanes. +* `b64x2`: A vector of 2 boolean lanes. + +The 128 bits in a `v128` value are interpreted differently by different +operations. They can represent vectors of integers or IEEE floating point +numbers. + +The four boolean vector types do not have a prescribed representation in +memory; they can't be loaded or stored. This allows implementations to choose +the most efficient representation, whether as a predicate vector or some +variant of bits in a vector register. + +## Scalar type mapping + +Some operations in the portable SIMD specification use scalar types that don't +exist in WebAssembly. These types are mapped into WebAssembly as follows: + +* `i8` and `i16`: SIMD operations that take these types as an input are passed + a WebAssembly `i32` instead and use only the low bits, ignoring the high + bits. The `extractLane` operation can return these types; it is provided in + variants that either sign-extend or zero-extend to an `i32`. + +* `boolean`: SIMD operations with a boolean argument will accept a WebAssembly + `i32` instead and treat zero as false and non-zero values as true. SIMD + operations that return a boolean will return an `i32` with the value 0 or 1. + +* `LaneIdx2` through `LaneIdx32`: All lane indexes are encoded as `varuint7` + immediate operands. Dynamic lane indexes are not used anywhere. An + out-of-range lane index is a validation error. + +* `RoundingMode`: Rounding modes are encoded as `varuint7` immediate operands. + An out-of-range rounding mode is a validation error. + +## SIMD operations + +Most operation names are simply mapped from their portable SIMD versions. Some +are renamed to match existing conventions in WebAssembly. The integer +operations that distinguish between signed and unsigned integers are given `_s` +or `_u` suffixes. For example, `s32x4.greaterThan` becomes `i32x4.gt_s`, c.f. +the existing `i32.gt_s` WebAssembly operation. + +[The complete set of proposed opcodes](webassembly-opcodes.md) can be found in +a separate table. + +### Floating point conversions + +The `fromSignedInt` and `fromUnsignedInt` conversions to float never fail, so +they are simply renamed: + +* `f32x4.convert_s/i32x4(a: v128, rmode: RoundingMode) -> v128` +* `f64x2.convert_s/i64x2(a: v128, rmode: RoundingMode) -> v128` +* `f32x4.convert_u/i32x4(a: v128, rmode: RoundingMode) -> v128` +* `f64x2.convert_u/i64x2(a: v128, rmode: RoundingMode) -> v128` + +The float to integer conversions can fail. Conversion failure in any lane is +converted to a trap, same as the scalar WebAssembly conversions: + +* `i32x4.trunc_s/f32x4(a: v128) -> v128` +* `i64x2.trunc_s/f64x2(a: v128) -> v128` +* `i32x4.trunc_u/f32x4(a: v128) -> v128` +* `i64x2.trunc_u/f64x2(a: v128) -> v128` + +### Memory accesses + +The load and store operations use the same addressing and bounds checking as the +scalar WebAssembly memory instructions, and effective addresses are provided in +the same way by a dynamic address and an immediate offset operand. + +Since WebAssembly is always little-endian, the `load` and `store` instructions +are not dependent on the lane-wise interpretation of the vector being loaded or +stored. This means that there are only two instructions: + +* `v128.load(addr, offset) -> v128` +* `v128.store(addr, offset, data: v128)` + +The natural alignment of these instructions is 16 bytes; unaligned accesses are +supported in the same way as for WebAssembly's normal scalar load and store +instructions, including the alignment hint. + +The partial vector load/store instructions are specific to the 4-lane +interpretation: + +* `v32x4.load1(addr, offset) -> v128` +* `v32x4.load2(addr, offset) -> v128` +* `v32x4.load3(addr, offset) -> v128` +* `v32x4.store1(addr, offset, data: v128)` +* `v32x4.store2(addr, offset, data: v128)` +* `v32x4.store3(addr, offset, data: v128)` + +The natural alignment of these instructions is *4 bytes*, not the size of the +access. From 4c6fa4f5229d85cb1ccc83934467abdac19ea21e Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 17 Apr 2017 09:04:27 -0700 Subject: [PATCH 005/378] Update proposal after review comments. - Remove rounding modes from the portable specification and from the proposed WebAssembly opcodes. - Add a few minor comments. - Omit padding in Markdown table columns to avoid excessive diffs in the future. --- proposals/simd/portable-simd.md | 82 +++-- proposals/simd/webassembly-opcodes.md | 450 +++++++++++++------------- 2 files changed, 264 insertions(+), 268 deletions(-) diff --git a/proposals/simd/portable-simd.md b/proposals/simd/portable-simd.md index 3382096f17..7e839cabeb 100644 --- a/proposals/simd/portable-simd.md +++ b/proposals/simd/portable-simd.md @@ -40,9 +40,6 @@ pattern: * `LaneIdx8`: An integer in the range 0–7 identifying a lane. * `LaneIdx16`: An integer in the range 0–15 identifying a lane. * `LaneIdx32`: An integer in the range 0–31 identifying a lane. -* `RoundingMode`: Rounding mode for floating-point operations. One of - `TiesToEven`, `TowardPositive`, `TowardNegative`, and `TowardZero`. See - [Rounding modes](#rounding-modes). ## SIMD types @@ -181,13 +178,9 @@ semantics by WebAssembly. ## Rounding modes -Floating-point operations that need a *rounding mode* take a `RoundingMode` -operand which provides the rounding mode to use for the operation. - -* `TiesToEven`: Round to nearest, ties towards even. -* `TowardPositive`: Round towards positive infinity. -* `TowardNegative`: Round towards negative infinity. -* `TowardZero`: Round towards zero. +This specification does not yet provide a way of changing floating point +rounding modes. All floating point operations use the default *roundTiesToEven* +mode. ## Default NaN value @@ -442,6 +435,9 @@ def S.Reduce(x): return x & bitmask ``` +There is no integer division operation provided here. This operation is not +commonly part of bit 128-bit SIMD ISAs. + ### Integer addition * `i8x16.add(a: v128, b: v128) -> v128` * `i16x8.add(a: v128, b: v128) -> v128` @@ -710,7 +706,7 @@ boolean vector with the same number of lanes as the input interpretation. Integer equality is independent of the signed/unsigned interpretation. Floating point equality follows IEEE semantics, so a NaN lane compares not equal with -anything, including itself: +anything, including itself, and +0.0 is equal to -0.0: ```python def S.equal(a, b): @@ -1146,22 +1142,22 @@ The floating-point arithmetic operations handle NaNs more strictly specified than the IEEE standard: ```python -def wrap_fp_unary(func, rmode): +def wrap_fp_unary(func): def wrapped(x): if isnan(x): return canonicalize_nan(x) - result = func(x, rmode) + result = func(x) if isnan(result): return type(result).default_nan() else: return result return wrapped -def wrap_fp_binary(func, rmode): +def wrap_fp_binary(func): def wrapped(x, y): if isnan(x) or isnan(y): return propagate_nan(x, y) - result = func(x, y, rmode) + result = func(x, y) if isnan(result): return type(result).default_nan() else: @@ -1170,58 +1166,58 @@ def wrap_fp_binary(func, rmode): ``` ### Addition -* `f32x4.add(a: v128, b: v128, rmode: RoundingMode) -> v128` -* `f64x2.add(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f32x4.add(a: v128, b: v128) -> v128` +* `f64x2.add(a: v128, b: v128) -> v128` Lane-wise IEEE `addition`. ```python -def S.add(a, b, rmode): - return S.lanewise_binary(wrap_fp_binary(ieee.addition, rmode), a, b) +def S.add(a, b): + return S.lanewise_binary(wrap_fp_binary(ieee.addition), a, b) ``` ### Subtraction -* `f32x4.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` -* `f64x2.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f32x4.sub(a: v128, b: v128) -> v128` +* `f64x2.sub(a: v128, b: v128) -> v128` Lane-wise IEEE `subtraction`. ```python -def S.sub(a, b, rmode): - return S.lanewise_binary(wrap_fp_binary(ieee.subtraction, rmode), a, b) +def S.sub(a, b): + return S.lanewise_binary(wrap_fp_binary(ieee.subtraction), a, b) ``` ### Division -* `f32x4.div(a: v128, b: v128, rmode: RoundingMode) -> v128` -* `f64x2.div(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f32x4.div(a: v128, b: v128) -> v128` +* `f64x2.div(a: v128, b: v128) -> v128` Lane-wise IEEE `division`. ```python -def S.div(a, b, rmode): - return S.lanewise_binary(wrap_fp_binary(ieee.division, rmode), a, b) +def S.div(a, b): + return S.lanewise_binary(wrap_fp_binary(ieee.division), a, b) ``` ### Multiplication -* `f32x4.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` -* `f64x2.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` +* `f32x4.mul(a: v128, b: v128) -> v128` +* `f64x2.mul(a: v128, b: v128) -> v128` Lane-wise IEEE `multiplication`. ```python -def S.mul(a, b, rmode): - return S.lanewise_binary(wrap_fp_binary(ieee.multiplication, rmode), a, b) +def S.mul(a, b): + return S.lanewise_binary(wrap_fp_binary(ieee.multiplication), a, b) ``` ### Square root -* `f32x4.sqrt(a: v128, rmode: RoundingMode) -> v128` -* `f64x2.sqrt(a: v128, rmode: RoundingMode) -> v128` +* `f32x4.sqrt(a: v128) -> v128` +* `f64x2.sqrt(a: v128) -> v128` Lane-wise IEEE `squareRoot`. ```python -def S.sqrt(a, rmode): - return S.lanewise_unary(wrap_fp_unary(ieee.squareRoot, rmode), a) +def S.sqrt(a): + return S.lanewise_unary(wrap_fp_unary(ieee.squareRoot), a) ``` ### Reciprocal approximation @@ -1270,23 +1266,23 @@ def S.reciprocalSqrtApproximation(a): ## Conversions ### Integer to floating point -* `f32x4.fromSignedInt(a: v128, rmode: RoundingMode) -> v128` -* `f64x2.fromSignedInt(a: v128, rmode: RoundingMode) -> v128` -* `f32x4.fromUnsignedInt(a: v128, rmode: RoundingMode) -> v128` -* `f64x2.fromUnsignedInt(a: v128, rmode: RoundingMode) -> v128` +* `f32x4.fromSignedInt(a: v128) -> v128` +* `f64x2.fromSignedInt(a: v128) -> v128` +* `f32x4.fromUnsignedInt(a: v128) -> v128` +* `f64x2.fromUnsignedInt(a: v128) -> v128` Lane-wise conversion from integer to floating point. Some integer values will be rounded. ```python -def S.fromSignedInt(a, rmode): +def S.fromSignedInt(a): def convert(x): - return S.LaneType.convertFromInt(x, rmode) + return S.LaneType.convertFromInt(x) return S.lanewise_unary(convert, a) -def S.fromUnsignedInt(a, rmode): +def S.fromUnsignedInt(a): def convert(x): - return S.LaneType.convertFromInt(x, rmode) + return S.LaneType.convertFromInt(x) return S.lanewise_unary(convert, a) ``` diff --git a/proposals/simd/webassembly-opcodes.md b/proposals/simd/webassembly-opcodes.md index db20638832..51fd5beedb 100644 --- a/proposals/simd/webassembly-opcodes.md +++ b/proposals/simd/webassembly-opcodes.md @@ -11,269 +11,269 @@ and output vectors: | [v64x2](#v64x2-operations) | [i64x2](#i64x2-operations) | [f64x2](#f64x2-operations) | [b64x2](#b64x2-operations) | ## `v128` operations -| WebAssembly | Portable SIMD | -|:---------------------------------------|:--------------| -| `v128.and(a: v128, b: v128) -> v128` | [v128.and](portable-simd.md#bitwise-operations) | -| `v128.or(a: v128, b: v128) -> v128` | [v128.or](portable-simd.md#bitwise-operations) | -| `v128.xor(a: v128, b: v128) -> v128` | [v128.xor](portable-simd.md#bitwise-operations) | -| `v128.not(a: v128) -> v128` | [v128.not](portable-simd.md#bitwise-operations) | -| `v128.load(addr, offset) -> v128` | [v128.load](portable-simd.md#load) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `v128.and(a: v128, b: v128) -> v128` | [v128.and](portable-simd.md#bitwise-operations) | +| `v128.or(a: v128, b: v128) -> v128` | [v128.or](portable-simd.md#bitwise-operations) | +| `v128.xor(a: v128, b: v128) -> v128` | [v128.xor](portable-simd.md#bitwise-operations) | +| `v128.not(a: v128) -> v128` | [v128.not](portable-simd.md#bitwise-operations) | +| `v128.load(addr, offset) -> v128` | [v128.load](portable-simd.md#load) | | `v128.store(addr, offset, data: v128)` | [v128.store](portable-simd.md#store) | ## `v8x16` operations -| WebAssembly | Portable SIMD | -|:------------------------------------------------------------|:--------------| -| `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` | [v8x16.select](portable-simd.md#lane-wise-select) | -| `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` | [v8x16.swizzle](portable-simd.md#swizzle-lanes) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` | [v8x16.select](portable-simd.md#lane-wise-select) | +| `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` | [v8x16.swizzle](portable-simd.md#swizzle-lanes) | | `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` | [v8x16.shuffle](portable-simd.md#shuffle-lanes) | ## `i8x16` operations -| WebAssembly | Portable SIMD | -|:-----------------------------------------------------------|:--------------| -| `i8x16.build(x: i32[16]) -> v128` | [i8x16.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i8x16.splat(x: i32) -> v128` | [i8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `i8x16.build(x: i32[16]) -> v128` | [i8x16.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i8x16.splat(x: i32) -> v128` | [i8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i32) -> v128` | [i8x16.replaceLane](portable-simd.md#replace-lane-value) | -| `i8x16.add(a: v128, b: v128) -> v128` | [i8x16.add](portable-simd.md#integer-addition) | -| `i8x16.sub(a: v128, b: v128) -> v128` | [i8x16.sub](portable-simd.md#integer-subtraction) | -| `i8x16.mul(a: v128, b: v128) -> v128` | [i8x16.mul](portable-simd.md#integer-multiplication) | -| `i8x16.neg(a: v128) -> v128` | [i8x16.neg](portable-simd.md#integer-negation) | -| `i8x16.addSaturate_s(a: v128, b: v128) -> v128` | [s8x16.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i8x16.addSaturate_u(a: v128, b: v128) -> v128` | [u8x16.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i8x16.subSaturate_s(a: v128, b: v128) -> v128` | [s8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i8x16.subSaturate_u(a: v128, b: v128) -> v128` | [u8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i8x16.shl(a: v128, y: i32) -> v128` | [i8x16.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i8x16.shr_s(a: v128, y: i32) -> v128` | [s8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i8x16.shr_u(a: v128, y: i32) -> v128` | [u8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i8x16.eq(a: v128, b: v128) -> b8x16` | [i8x16.equal](portable-simd.md#equality) | -| `i8x16.ne(a: v128, b: v128) -> b8x16` | [i8x16.notEqual](portable-simd.md#non-equality) | -| `i8x16.lt_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThan](portable-simd.md#less-than) | -| `i8x16.lt_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThan](portable-simd.md#less-than) | -| `i8x16.le_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i8x16.le_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i8x16.gt_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThan](portable-simd.md#greater-than) | -| `i8x16.gt_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThan](portable-simd.md#greater-than) | -| `i8x16.ge_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i8x16.ge_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i8x16.add(a: v128, b: v128) -> v128` | [i8x16.add](portable-simd.md#integer-addition) | +| `i8x16.sub(a: v128, b: v128) -> v128` | [i8x16.sub](portable-simd.md#integer-subtraction) | +| `i8x16.mul(a: v128, b: v128) -> v128` | [i8x16.mul](portable-simd.md#integer-multiplication) | +| `i8x16.neg(a: v128) -> v128` | [i8x16.neg](portable-simd.md#integer-negation) | +| `i8x16.addSaturate_s(a: v128, b: v128) -> v128` | [s8x16.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i8x16.addSaturate_u(a: v128, b: v128) -> v128` | [u8x16.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i8x16.subSaturate_s(a: v128, b: v128) -> v128` | [s8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i8x16.subSaturate_u(a: v128, b: v128) -> v128` | [u8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i8x16.shl(a: v128, y: i32) -> v128` | [i8x16.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i8x16.shr_s(a: v128, y: i32) -> v128` | [s8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i8x16.shr_u(a: v128, y: i32) -> v128` | [u8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i8x16.eq(a: v128, b: v128) -> b8x16` | [i8x16.equal](portable-simd.md#equality) | +| `i8x16.ne(a: v128, b: v128) -> b8x16` | [i8x16.notEqual](portable-simd.md#non-equality) | +| `i8x16.lt_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThan](portable-simd.md#less-than) | +| `i8x16.lt_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThan](portable-simd.md#less-than) | +| `i8x16.le_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i8x16.le_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i8x16.gt_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThan](portable-simd.md#greater-than) | +| `i8x16.gt_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThan](portable-simd.md#greater-than) | +| `i8x16.ge_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i8x16.ge_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | ## `v16x8` operations -| WebAssembly | Portable SIMD | -|:-----------------------------------------------------------|:--------------| -| `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` | [v16x8.select](portable-simd.md#lane-wise-select) | -| `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` | [v16x8.swizzle](portable-simd.md#swizzle-lanes) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` | [v16x8.select](portable-simd.md#lane-wise-select) | +| `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` | [v16x8.swizzle](portable-simd.md#swizzle-lanes) | | `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` | [v16x8.shuffle](portable-simd.md#shuffle-lanes) | ## `i16x8` operations -| WebAssembly | Portable SIMD | -|:----------------------------------------------------------|:--------------| -| `i16x8.build(x: i32[8]) -> v128` | [i16x8.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i16x8.splat(x: i32) -> v128` | [i16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `i16x8.build(x: i32[8]) -> v128` | [i16x8.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i16x8.splat(x: i32) -> v128` | [i16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i32) -> v128` | [i16x8.replaceLane](portable-simd.md#replace-lane-value) | -| `i16x8.add(a: v128, b: v128) -> v128` | [i16x8.add](portable-simd.md#integer-addition) | -| `i16x8.sub(a: v128, b: v128) -> v128` | [i16x8.sub](portable-simd.md#integer-subtraction) | -| `i16x8.mul(a: v128, b: v128) -> v128` | [i16x8.mul](portable-simd.md#integer-multiplication) | -| `i16x8.neg(a: v128) -> v128` | [i16x8.neg](portable-simd.md#integer-negation) | -| `i16x8.addSaturate_s(a: v128, b: v128) -> v128` | [s16x8.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i16x8.addSaturate_u(a: v128, b: v128) -> v128` | [u16x8.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i16x8.subSaturate_s(a: v128, b: v128) -> v128` | [s16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i16x8.subSaturate_u(a: v128, b: v128) -> v128` | [u16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i16x8.shl(a: v128, y: i32) -> v128` | [i16x8.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i16x8.shr_s(a: v128, y: i32) -> v128` | [s16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i16x8.shr_u(a: v128, y: i32) -> v128` | [u16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i16x8.eq(a: v128, b: v128) -> b16x8` | [i16x8.equal](portable-simd.md#equality) | -| `i16x8.ne(a: v128, b: v128) -> b16x8` | [i16x8.notEqual](portable-simd.md#non-equality) | -| `i16x8.lt_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThan](portable-simd.md#less-than) | -| `i16x8.lt_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThan](portable-simd.md#less-than) | -| `i16x8.le_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i16x8.le_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i16x8.gt_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThan](portable-simd.md#greater-than) | -| `i16x8.gt_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThan](portable-simd.md#greater-than) | -| `i16x8.ge_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i16x8.ge_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i16x8.add(a: v128, b: v128) -> v128` | [i16x8.add](portable-simd.md#integer-addition) | +| `i16x8.sub(a: v128, b: v128) -> v128` | [i16x8.sub](portable-simd.md#integer-subtraction) | +| `i16x8.mul(a: v128, b: v128) -> v128` | [i16x8.mul](portable-simd.md#integer-multiplication) | +| `i16x8.neg(a: v128) -> v128` | [i16x8.neg](portable-simd.md#integer-negation) | +| `i16x8.addSaturate_s(a: v128, b: v128) -> v128` | [s16x8.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i16x8.addSaturate_u(a: v128, b: v128) -> v128` | [u16x8.addSaturate](portable-simd.md#saturating-integer-addition) | +| `i16x8.subSaturate_s(a: v128, b: v128) -> v128` | [s16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i16x8.subSaturate_u(a: v128, b: v128) -> v128` | [u16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | +| `i16x8.shl(a: v128, y: i32) -> v128` | [i16x8.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i16x8.shr_s(a: v128, y: i32) -> v128` | [s16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i16x8.shr_u(a: v128, y: i32) -> v128` | [u16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i16x8.eq(a: v128, b: v128) -> b16x8` | [i16x8.equal](portable-simd.md#equality) | +| `i16x8.ne(a: v128, b: v128) -> b16x8` | [i16x8.notEqual](portable-simd.md#non-equality) | +| `i16x8.lt_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThan](portable-simd.md#less-than) | +| `i16x8.lt_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThan](portable-simd.md#less-than) | +| `i16x8.le_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i16x8.le_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i16x8.gt_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThan](portable-simd.md#greater-than) | +| `i16x8.gt_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThan](portable-simd.md#greater-than) | +| `i16x8.ge_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i16x8.ge_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | ## `v32x4` operations -| WebAssembly | Portable SIMD | -|:----------------------------------------------------------|:--------------| -| `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` | [v32x4.select](portable-simd.md#lane-wise-select) | -| `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` | [v32x4.swizzle](portable-simd.md#swizzle-lanes) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` | [v32x4.select](portable-simd.md#lane-wise-select) | +| `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` | [v32x4.swizzle](portable-simd.md#swizzle-lanes) | | `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` | [v32x4.shuffle](portable-simd.md#shuffle-lanes) | -| `v32x4.load1(addr, offset) -> v128` | [v32x4.load1](portable-simd.md#partial-load) | -| `v32x4.load2(addr, offset) -> v128` | [v32x4.load2](portable-simd.md#partial-load) | -| `v32x4.load3(addr, offset) -> v128` | [v32x4.load3](portable-simd.md#partial-load) | -| `v32x4.store1(addr, offset, data: v128)` | [v32x4.store1](portable-simd.md#partial-store) | -| `v32x4.store2(addr, offset, data: v128)` | [v32x4.store2](portable-simd.md#partial-store) | -| `v32x4.store3(addr, offset, data: v128)` | [v32x4.store3](portable-simd.md#partial-store) | +| `v32x4.load1(addr, offset) -> v128` | [v32x4.load1](portable-simd.md#partial-load) | +| `v32x4.load2(addr, offset) -> v128` | [v32x4.load2](portable-simd.md#partial-load) | +| `v32x4.load3(addr, offset) -> v128` | [v32x4.load3](portable-simd.md#partial-load) | +| `v32x4.store1(addr, offset, data: v128)` | [v32x4.store1](portable-simd.md#partial-store) | +| `v32x4.store2(addr, offset, data: v128)` | [v32x4.store2](portable-simd.md#partial-store) | +| `v32x4.store3(addr, offset, data: v128)` | [v32x4.store3](portable-simd.md#partial-store) | ## `i32x4` operations -| WebAssembly | Portable SIMD | -|:----------------------------------------------------------|:--------------| -| `i32x4.build(x: i32[4]) -> v128` | [i32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i32x4.splat(x: i32) -> v128` | [i32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` | [i32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `i32x4.build(x: i32[4]) -> v128` | [i32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i32x4.splat(x: i32) -> v128` | [i32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` | [i32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` | [i32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `i32x4.add(a: v128, b: v128) -> v128` | [i32x4.add](portable-simd.md#integer-addition) | -| `i32x4.sub(a: v128, b: v128) -> v128` | [i32x4.sub](portable-simd.md#integer-subtraction) | -| `i32x4.mul(a: v128, b: v128) -> v128` | [i32x4.mul](portable-simd.md#integer-multiplication) | -| `i32x4.neg(a: v128) -> v128` | [i32x4.neg](portable-simd.md#integer-negation) | -| `i32x4.shl(a: v128, y: i32) -> v128` | [i32x4.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i32x4.shr_s(a: v128, y: i32) -> v128` | [s32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i32x4.shr_u(a: v128, y: i32) -> v128` | [u32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i32x4.eq(a: v128, b: v128) -> b32x4` | [i32x4.equal](portable-simd.md#equality) | -| `i32x4.ne(a: v128, b: v128) -> b32x4` | [i32x4.notEqual](portable-simd.md#non-equality) | -| `i32x4.lt_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThan](portable-simd.md#less-than) | -| `i32x4.lt_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThan](portable-simd.md#less-than) | -| `i32x4.le_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i32x4.le_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i32x4.gt_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThan](portable-simd.md#greater-than) | -| `i32x4.gt_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThan](portable-simd.md#greater-than) | -| `i32x4.ge_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i32x4.ge_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i32x4.trunc_s/f32x4(a: v128) -> v128` | [s32x4.fromFloat](portable-simd.md#floating-point-to-integer) | -| `i32x4.trunc_u/f32x4(a: v128) -> v128` | [u32x4.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i32x4.add(a: v128, b: v128) -> v128` | [i32x4.add](portable-simd.md#integer-addition) | +| `i32x4.sub(a: v128, b: v128) -> v128` | [i32x4.sub](portable-simd.md#integer-subtraction) | +| `i32x4.mul(a: v128, b: v128) -> v128` | [i32x4.mul](portable-simd.md#integer-multiplication) | +| `i32x4.neg(a: v128) -> v128` | [i32x4.neg](portable-simd.md#integer-negation) | +| `i32x4.shl(a: v128, y: i32) -> v128` | [i32x4.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i32x4.shr_s(a: v128, y: i32) -> v128` | [s32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i32x4.shr_u(a: v128, y: i32) -> v128` | [u32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i32x4.eq(a: v128, b: v128) -> b32x4` | [i32x4.equal](portable-simd.md#equality) | +| `i32x4.ne(a: v128, b: v128) -> b32x4` | [i32x4.notEqual](portable-simd.md#non-equality) | +| `i32x4.lt_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThan](portable-simd.md#less-than) | +| `i32x4.lt_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThan](portable-simd.md#less-than) | +| `i32x4.le_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i32x4.le_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i32x4.gt_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThan](portable-simd.md#greater-than) | +| `i32x4.gt_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThan](portable-simd.md#greater-than) | +| `i32x4.ge_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i32x4.ge_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i32x4.trunc_s/f32x4(a: v128) -> v128` | [s32x4.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i32x4.trunc_u/f32x4(a: v128) -> v128` | [u32x4.fromFloat](portable-simd.md#floating-point-to-integer) | ## `f32x4` operations -| WebAssembly | Portable SIMD | -|:--------------------------------------------------------------|:--------------| -| `f32x4.build(x: f32[4]) -> v128` | [f32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `f32x4.splat(x: f32) -> v128` | [f32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` | [f32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` | [f32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `f32x4.add(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.add](portable-simd.md#addition) | -| `f32x4.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.sub](portable-simd.md#subtraction) | -| `f32x4.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.mul](portable-simd.md#multiplication) | -| `f32x4.neg(a: v128) -> v128` | [f32x4.neg](portable-simd.md#negation) | -| `f32x4.eq(a: v128, b: v128) -> b32x4` | [f32x4.equal](portable-simd.md#equality) | -| `f32x4.ne(a: v128, b: v128) -> b32x4` | [f32x4.notEqual](portable-simd.md#non-equality) | -| `f32x4.lt(a: v128, b: v128) -> b32x4` | [f32x4.lessThan](portable-simd.md#less-than) | -| `f32x4.le(a: v128, b: v128) -> b32x4` | [f32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `f32x4.gt(a: v128, b: v128) -> b32x4` | [f32x4.greaterThan](portable-simd.md#greater-than) | -| `f32x4.ge(a: v128, b: v128) -> b32x4` | [f32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `f32x4.abs(a: v128) -> v128` | [f32x4.abs](portable-simd.md#absolute-value) | -| `f32x4.min(a: v128, b: v128) -> v128` | [f32x4.min](portable-simd.md#nan-propagating-minimum) | -| `f32x4.max(a: v128, b: v128) -> v128` | [f32x4.max](portable-simd.md#nan-propagating-maximum) | -| `f32x4.div(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f32x4.div](portable-simd.md#division) | -| `f32x4.sqrt(a: v128, rmode: RoundingMode) -> v128` | [f32x4.sqrt](portable-simd.md#square-root) | -| `f32x4.reciprocalApproximation(a: v128) -> v128` | [f32x4.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | -| `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` | [f32x4.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | -| `f32x4.convert_s/i32x4(a: v128, rmode: RoundingMode) -> v128` | [f32x4.fromSignedInt](portable-simd.md#integer-to-floating-point) | -| `f32x4.convert_u/i32x4(a: v128, rmode: RoundingMode) -> v128` | [f32x4.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `f32x4.build(x: f32[4]) -> v128` | [f32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `f32x4.splat(x: f32) -> v128` | [f32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` | [f32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` | [f32x4.replaceLane](portable-simd.md#replace-lane-value) | +| `f32x4.add(a: v128, b: v128) -> v128` | [f32x4.add](portable-simd.md#addition) | +| `f32x4.sub(a: v128, b: v128) -> v128` | [f32x4.sub](portable-simd.md#subtraction) | +| `f32x4.mul(a: v128, b: v128) -> v128` | [f32x4.mul](portable-simd.md#multiplication) | +| `f32x4.neg(a: v128) -> v128` | [f32x4.neg](portable-simd.md#negation) | +| `f32x4.eq(a: v128, b: v128) -> b32x4` | [f32x4.equal](portable-simd.md#equality) | +| `f32x4.ne(a: v128, b: v128) -> b32x4` | [f32x4.notEqual](portable-simd.md#non-equality) | +| `f32x4.lt(a: v128, b: v128) -> b32x4` | [f32x4.lessThan](portable-simd.md#less-than) | +| `f32x4.le(a: v128, b: v128) -> b32x4` | [f32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `f32x4.gt(a: v128, b: v128) -> b32x4` | [f32x4.greaterThan](portable-simd.md#greater-than) | +| `f32x4.ge(a: v128, b: v128) -> b32x4` | [f32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `f32x4.abs(a: v128) -> v128` | [f32x4.abs](portable-simd.md#absolute-value) | +| `f32x4.min(a: v128, b: v128) -> v128` | [f32x4.min](portable-simd.md#nan-propagating-minimum) | +| `f32x4.max(a: v128, b: v128) -> v128` | [f32x4.max](portable-simd.md#nan-propagating-maximum) | +| `f32x4.div(a: v128, b: v128) -> v128` | [f32x4.div](portable-simd.md#division) | +| `f32x4.sqrt(a: v128) -> v128` | [f32x4.sqrt](portable-simd.md#square-root) | +| `f32x4.reciprocalApproximation(a: v128) -> v128` | [f32x4.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | +| `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` | [f32x4.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | +| `f32x4.convert_s/i32x4(a: v128) -> v128` | [f32x4.fromSignedInt](portable-simd.md#integer-to-floating-point) | +| `f32x4.convert_u/i32x4(a: v128) -> v128` | [f32x4.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | ## `v64x2` operations -| WebAssembly | Portable SIMD | -|:----------------------------------------------------------|:--------------| -| `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` | [v64x2.select](portable-simd.md#lane-wise-select) | -| `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` | [v64x2.swizzle](portable-simd.md#swizzle-lanes) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` | [v64x2.select](portable-simd.md#lane-wise-select) | +| `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` | [v64x2.swizzle](portable-simd.md#swizzle-lanes) | | `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` | [v64x2.shuffle](portable-simd.md#shuffle-lanes) | ## `i64x2` operations -| WebAssembly | Portable SIMD | -|:----------------------------------------------------------|:--------------| -| `i64x2.build(x: i64[2]) -> v128` | [i64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i64x2.splat(x: i64) -> v128` | [i64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` | [i64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `i64x2.build(x: i64[2]) -> v128` | [i64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `i64x2.splat(x: i64) -> v128` | [i64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` | [i64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` | [i64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `i64x2.add(a: v128, b: v128) -> v128` | [i64x2.add](portable-simd.md#integer-addition) | -| `i64x2.sub(a: v128, b: v128) -> v128` | [i64x2.sub](portable-simd.md#integer-subtraction) | -| `i64x2.mul(a: v128, b: v128) -> v128` | [i64x2.mul](portable-simd.md#integer-multiplication) | -| `i64x2.neg(a: v128) -> v128` | [i64x2.neg](portable-simd.md#integer-negation) | -| `i64x2.shl(a: v128, y: i32) -> v128` | [i64x2.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i64x2.shr_s(a: v128, y: i32) -> v128` | [s64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i64x2.shr_u(a: v128, y: i32) -> v128` | [u64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i64x2.eq(a: v128, b: v128) -> b64x2` | [i64x2.equal](portable-simd.md#equality) | -| `i64x2.ne(a: v128, b: v128) -> b64x2` | [i64x2.notEqual](portable-simd.md#non-equality) | -| `i64x2.lt_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThan](portable-simd.md#less-than) | -| `i64x2.lt_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThan](portable-simd.md#less-than) | -| `i64x2.le_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i64x2.le_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i64x2.gt_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThan](portable-simd.md#greater-than) | -| `i64x2.gt_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThan](portable-simd.md#greater-than) | -| `i64x2.ge_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i64x2.ge_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i64x2.trunc_s/f64x2(a: v128) -> v128` | [s64x2.fromFloat](portable-simd.md#floating-point-to-integer) | -| `i64x2.trunc_u/f64x2(a: v128) -> v128` | [u64x2.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i64x2.add(a: v128, b: v128) -> v128` | [i64x2.add](portable-simd.md#integer-addition) | +| `i64x2.sub(a: v128, b: v128) -> v128` | [i64x2.sub](portable-simd.md#integer-subtraction) | +| `i64x2.mul(a: v128, b: v128) -> v128` | [i64x2.mul](portable-simd.md#integer-multiplication) | +| `i64x2.neg(a: v128) -> v128` | [i64x2.neg](portable-simd.md#integer-negation) | +| `i64x2.shl(a: v128, y: i32) -> v128` | [i64x2.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | +| `i64x2.shr_s(a: v128, y: i32) -> v128` | [s64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i64x2.shr_u(a: v128, y: i32) -> v128` | [u64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | +| `i64x2.eq(a: v128, b: v128) -> b64x2` | [i64x2.equal](portable-simd.md#equality) | +| `i64x2.ne(a: v128, b: v128) -> b64x2` | [i64x2.notEqual](portable-simd.md#non-equality) | +| `i64x2.lt_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThan](portable-simd.md#less-than) | +| `i64x2.lt_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThan](portable-simd.md#less-than) | +| `i64x2.le_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i64x2.le_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `i64x2.gt_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThan](portable-simd.md#greater-than) | +| `i64x2.gt_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThan](portable-simd.md#greater-than) | +| `i64x2.ge_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i64x2.ge_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `i64x2.trunc_s/f64x2(a: v128) -> v128` | [s64x2.fromFloat](portable-simd.md#floating-point-to-integer) | +| `i64x2.trunc_u/f64x2(a: v128) -> v128` | [u64x2.fromFloat](portable-simd.md#floating-point-to-integer) | ## `f64x2` operations -| WebAssembly | Portable SIMD | -|:--------------------------------------------------------------|:--------------| -| `f64x2.build(x: f64[2]) -> v128` | [f64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `f64x2.splat(x: f64) -> v128` | [f64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` | [f64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` | [f64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `f64x2.add(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.add](portable-simd.md#addition) | -| `f64x2.sub(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.sub](portable-simd.md#subtraction) | -| `f64x2.mul(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.mul](portable-simd.md#multiplication) | -| `f64x2.neg(a: v128) -> v128` | [f64x2.neg](portable-simd.md#negation) | -| `f64x2.eq(a: v128, b: v128) -> b64x2` | [f64x2.equal](portable-simd.md#equality) | -| `f64x2.ne(a: v128, b: v128) -> b64x2` | [f64x2.notEqual](portable-simd.md#non-equality) | -| `f64x2.lt(a: v128, b: v128) -> b64x2` | [f64x2.lessThan](portable-simd.md#less-than) | -| `f64x2.le(a: v128, b: v128) -> b64x2` | [f64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `f64x2.gt(a: v128, b: v128) -> b64x2` | [f64x2.greaterThan](portable-simd.md#greater-than) | -| `f64x2.ge(a: v128, b: v128) -> b64x2` | [f64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `f64x2.abs(a: v128) -> v128` | [f64x2.abs](portable-simd.md#absolute-value) | -| `f64x2.min(a: v128, b: v128) -> v128` | [f64x2.min](portable-simd.md#nan-propagating-minimum) | -| `f64x2.max(a: v128, b: v128) -> v128` | [f64x2.max](portable-simd.md#nan-propagating-maximum) | -| `f64x2.div(a: v128, b: v128, rmode: RoundingMode) -> v128` | [f64x2.div](portable-simd.md#division) | -| `f64x2.sqrt(a: v128, rmode: RoundingMode) -> v128` | [f64x2.sqrt](portable-simd.md#square-root) | -| `f64x2.reciprocalApproximation(a: v128) -> v128` | [f64x2.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | -| `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` | [f64x2.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | -| `f64x2.convert_s/i64x2(a: v128, rmode: RoundingMode) -> v128` | [f64x2.fromSignedInt](portable-simd.md#integer-to-floating-point) | -| `f64x2.convert_u/i64x2(a: v128, rmode: RoundingMode) -> v128` | [f64x2.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `f64x2.build(x: f64[2]) -> v128` | [f64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `f64x2.splat(x: f64) -> v128` | [f64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` | [f64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` | [f64x2.replaceLane](portable-simd.md#replace-lane-value) | +| `f64x2.add(a: v128, b: v128) -> v128` | [f64x2.add](portable-simd.md#addition) | +| `f64x2.sub(a: v128, b: v128) -> v128` | [f64x2.sub](portable-simd.md#subtraction) | +| `f64x2.mul(a: v128, b: v128) -> v128` | [f64x2.mul](portable-simd.md#multiplication) | +| `f64x2.neg(a: v128) -> v128` | [f64x2.neg](portable-simd.md#negation) | +| `f64x2.eq(a: v128, b: v128) -> b64x2` | [f64x2.equal](portable-simd.md#equality) | +| `f64x2.ne(a: v128, b: v128) -> b64x2` | [f64x2.notEqual](portable-simd.md#non-equality) | +| `f64x2.lt(a: v128, b: v128) -> b64x2` | [f64x2.lessThan](portable-simd.md#less-than) | +| `f64x2.le(a: v128, b: v128) -> b64x2` | [f64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | +| `f64x2.gt(a: v128, b: v128) -> b64x2` | [f64x2.greaterThan](portable-simd.md#greater-than) | +| `f64x2.ge(a: v128, b: v128) -> b64x2` | [f64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | +| `f64x2.abs(a: v128) -> v128` | [f64x2.abs](portable-simd.md#absolute-value) | +| `f64x2.min(a: v128, b: v128) -> v128` | [f64x2.min](portable-simd.md#nan-propagating-minimum) | +| `f64x2.max(a: v128, b: v128) -> v128` | [f64x2.max](portable-simd.md#nan-propagating-maximum) | +| `f64x2.div(a: v128, b: v128) -> v128` | [f64x2.div](portable-simd.md#division) | +| `f64x2.sqrt(a: v128) -> v128` | [f64x2.sqrt](portable-simd.md#square-root) | +| `f64x2.reciprocalApproximation(a: v128) -> v128` | [f64x2.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | +| `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` | [f64x2.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | +| `f64x2.convert_s/i64x2(a: v128) -> v128` | [f64x2.fromSignedInt](portable-simd.md#integer-to-floating-point) | +| `f64x2.convert_u/i64x2(a: v128) -> v128` | [f64x2.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | ## `b8x16` operations -| WebAssembly | Portable SIMD | -|:-------------------------------------------------------------|:--------------| -| `b8x16.build(x: i32[16]) -> b8x16` | [b8x16.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b8x16.splat(x: i32) -> b8x16` | [b8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` | [b8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `b8x16.build(x: i32[16]) -> b8x16` | [b8x16.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b8x16.splat(x: i32) -> b8x16` | [b8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` | [b8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` | [b8x16.replaceLane](portable-simd.md#replace-lane-value) | -| `b8x16.and(a: b8x16, b: b8x16) -> b8x16` | [b8x16.and](portable-simd.md#logical-and) | -| `b8x16.or(a: b8x16, b: b8x16) -> b8x16` | [b8x16.or](portable-simd.md#logical-or) | -| `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` | [b8x16.xor](portable-simd.md#logical-xor) | -| `b8x16.not(a: b8x16) -> b8x16` | [b8x16.not](portable-simd.md#logical-not) | -| `b8x16.anyTrue(a: b8x16) -> i32` | [b8x16.anyTrue](portable-simd.md#any-lane-true) | -| `b8x16.allTrue(a: b8x16) -> i32` | [b8x16.allTrue](portable-simd.md#all-lanes-true) | +| `b8x16.and(a: b8x16, b: b8x16) -> b8x16` | [b8x16.and](portable-simd.md#logical-and) | +| `b8x16.or(a: b8x16, b: b8x16) -> b8x16` | [b8x16.or](portable-simd.md#logical-or) | +| `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` | [b8x16.xor](portable-simd.md#logical-xor) | +| `b8x16.not(a: b8x16) -> b8x16` | [b8x16.not](portable-simd.md#logical-not) | +| `b8x16.anyTrue(a: b8x16) -> i32` | [b8x16.anyTrue](portable-simd.md#any-lane-true) | +| `b8x16.allTrue(a: b8x16) -> i32` | [b8x16.allTrue](portable-simd.md#all-lanes-true) | ## `b16x8` operations -| WebAssembly | Portable SIMD | -|:------------------------------------------------------------|:--------------| -| `b16x8.build(x: i32[8]) -> b16x8` | [b16x8.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b16x8.splat(x: i32) -> b16x8` | [b16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` | [b16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `b16x8.build(x: i32[8]) -> b16x8` | [b16x8.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b16x8.splat(x: i32) -> b16x8` | [b16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` | [b16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` | [b16x8.replaceLane](portable-simd.md#replace-lane-value) | -| `b16x8.and(a: b16x8, b: b16x8) -> b16x8` | [b16x8.and](portable-simd.md#logical-and) | -| `b16x8.or(a: b16x8, b: b16x8) -> b16x8` | [b16x8.or](portable-simd.md#logical-or) | -| `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` | [b16x8.xor](portable-simd.md#logical-xor) | -| `b16x8.not(a: b16x8) -> b16x8` | [b16x8.not](portable-simd.md#logical-not) | -| `b16x8.anyTrue(a: b16x8) -> i32` | [b16x8.anyTrue](portable-simd.md#any-lane-true) | -| `b16x8.allTrue(a: b16x8) -> i32` | [b16x8.allTrue](portable-simd.md#all-lanes-true) | +| `b16x8.and(a: b16x8, b: b16x8) -> b16x8` | [b16x8.and](portable-simd.md#logical-and) | +| `b16x8.or(a: b16x8, b: b16x8) -> b16x8` | [b16x8.or](portable-simd.md#logical-or) | +| `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` | [b16x8.xor](portable-simd.md#logical-xor) | +| `b16x8.not(a: b16x8) -> b16x8` | [b16x8.not](portable-simd.md#logical-not) | +| `b16x8.anyTrue(a: b16x8) -> i32` | [b16x8.anyTrue](portable-simd.md#any-lane-true) | +| `b16x8.allTrue(a: b16x8) -> i32` | [b16x8.allTrue](portable-simd.md#all-lanes-true) | ## `b32x4` operations -| WebAssembly | Portable SIMD | -|:------------------------------------------------------------|:--------------| -| `b32x4.build(x: i32[4]) -> b32x4` | [b32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b32x4.splat(x: i32) -> b32x4` | [b32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` | [b32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `b32x4.build(x: i32[4]) -> b32x4` | [b32x4.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b32x4.splat(x: i32) -> b32x4` | [b32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` | [b32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` | [b32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `b32x4.and(a: b32x4, b: b32x4) -> b32x4` | [b32x4.and](portable-simd.md#logical-and) | -| `b32x4.or(a: b32x4, b: b32x4) -> b32x4` | [b32x4.or](portable-simd.md#logical-or) | -| `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` | [b32x4.xor](portable-simd.md#logical-xor) | -| `b32x4.not(a: b32x4) -> b32x4` | [b32x4.not](portable-simd.md#logical-not) | -| `b32x4.anyTrue(a: b32x4) -> i32` | [b32x4.anyTrue](portable-simd.md#any-lane-true) | -| `b32x4.allTrue(a: b32x4) -> i32` | [b32x4.allTrue](portable-simd.md#all-lanes-true) | +| `b32x4.and(a: b32x4, b: b32x4) -> b32x4` | [b32x4.and](portable-simd.md#logical-and) | +| `b32x4.or(a: b32x4, b: b32x4) -> b32x4` | [b32x4.or](portable-simd.md#logical-or) | +| `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` | [b32x4.xor](portable-simd.md#logical-xor) | +| `b32x4.not(a: b32x4) -> b32x4` | [b32x4.not](portable-simd.md#logical-not) | +| `b32x4.anyTrue(a: b32x4) -> i32` | [b32x4.anyTrue](portable-simd.md#any-lane-true) | +| `b32x4.allTrue(a: b32x4) -> i32` | [b32x4.allTrue](portable-simd.md#all-lanes-true) | ## `b64x2` operations -| WebAssembly | Portable SIMD | -|:------------------------------------------------------------|:--------------| -| `b64x2.build(x: i32[2]) -> b64x2` | [b64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b64x2.splat(x: i32) -> b64x2` | [b64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` | [b64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | +| WebAssembly | Portable SIMD | +|:------------|:--------------| +| `b64x2.build(x: i32[2]) -> b64x2` | [b64x2.build](portable-simd.md#build-vector-from-individual-lanes) | +| `b64x2.splat(x: i32) -> b64x2` | [b64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | +| `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` | [b64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | | `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` | [b64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `b64x2.and(a: b64x2, b: b64x2) -> b64x2` | [b64x2.and](portable-simd.md#logical-and) | -| `b64x2.or(a: b64x2, b: b64x2) -> b64x2` | [b64x2.or](portable-simd.md#logical-or) | -| `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` | [b64x2.xor](portable-simd.md#logical-xor) | -| `b64x2.not(a: b64x2) -> b64x2` | [b64x2.not](portable-simd.md#logical-not) | -| `b64x2.anyTrue(a: b64x2) -> i32` | [b64x2.anyTrue](portable-simd.md#any-lane-true) | -| `b64x2.allTrue(a: b64x2) -> i32` | [b64x2.allTrue](portable-simd.md#all-lanes-true) | +| `b64x2.and(a: b64x2, b: b64x2) -> b64x2` | [b64x2.and](portable-simd.md#logical-and) | +| `b64x2.or(a: b64x2, b: b64x2) -> b64x2` | [b64x2.or](portable-simd.md#logical-or) | +| `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` | [b64x2.xor](portable-simd.md#logical-xor) | +| `b64x2.not(a: b64x2) -> b64x2` | [b64x2.not](portable-simd.md#logical-not) | +| `b64x2.anyTrue(a: b64x2) -> i32` | [b64x2.anyTrue](portable-simd.md#any-lane-true) | +| `b64x2.allTrue(a: b64x2) -> i32` | [b64x2.allTrue](portable-simd.md#all-lanes-true) | From 2ce1c719461ddf357e7467151b4eb11f6fe1c349 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 17 Apr 2017 09:13:38 -0700 Subject: [PATCH 006/378] Omit the reciprocal [sqrt] approximation operations. To be debated in #3. Add a complete list of omitted operations to Overview.md. --- proposals/simd/Overview.md | 11 +++++++---- proposals/simd/webassembly-opcodes.md | 4 ---- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/proposals/simd/Overview.md b/proposals/simd/Overview.md index f40f014dfc..f7f7f8e018 100644 --- a/proposals/simd/Overview.md +++ b/proposals/simd/Overview.md @@ -15,16 +15,19 @@ There are three parts to the proposal: 3. This document which describes the mapping between WebAssembly and the portable specification. -Referencing a common specification of the portable SIMD semantics reduces the -work required to support both SIMD.js and WebAssembly SIMD in the same -implementation. - # Mapping portable SIMD to WebAssembly The types and operations in the portable SIMD specification are relatively straightforward to map to WebAssembly. This section describes the details of the mapping. +The following operations are *not* provided in WebAssembly: + +- `f*.maxNum` and `f*.minNum`. These NaN-suppressing operations don't exist in + scalar WebAssembly versions either. The NaN-propagating versions are provided. +- `f*.reciprocalApproximation` and `f*.reciprocalSqrtApproximation` are omitted + from WebAssembly pending further discussion. + ## New value types The following value types are added to the WebAssembly type system to support diff --git a/proposals/simd/webassembly-opcodes.md b/proposals/simd/webassembly-opcodes.md index 51fd5beedb..91fb6f721e 100644 --- a/proposals/simd/webassembly-opcodes.md +++ b/proposals/simd/webassembly-opcodes.md @@ -156,8 +156,6 @@ and output vectors: | `f32x4.max(a: v128, b: v128) -> v128` | [f32x4.max](portable-simd.md#nan-propagating-maximum) | | `f32x4.div(a: v128, b: v128) -> v128` | [f32x4.div](portable-simd.md#division) | | `f32x4.sqrt(a: v128) -> v128` | [f32x4.sqrt](portable-simd.md#square-root) | -| `f32x4.reciprocalApproximation(a: v128) -> v128` | [f32x4.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | -| `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` | [f32x4.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | | `f32x4.convert_s/i32x4(a: v128) -> v128` | [f32x4.fromSignedInt](portable-simd.md#integer-to-floating-point) | | `f32x4.convert_u/i32x4(a: v128) -> v128` | [f32x4.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | @@ -217,8 +215,6 @@ and output vectors: | `f64x2.max(a: v128, b: v128) -> v128` | [f64x2.max](portable-simd.md#nan-propagating-maximum) | | `f64x2.div(a: v128, b: v128) -> v128` | [f64x2.div](portable-simd.md#division) | | `f64x2.sqrt(a: v128) -> v128` | [f64x2.sqrt](portable-simd.md#square-root) | -| `f64x2.reciprocalApproximation(a: v128) -> v128` | [f64x2.reciprocalApproximation](portable-simd.md#reciprocal-approximation) | -| `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` | [f64x2.reciprocalSqrtApproximation](portable-simd.md#reciprocal-square-root-approximation) | | `f64x2.convert_s/i64x2(a: v128) -> v128` | [f64x2.fromSignedInt](portable-simd.md#integer-to-floating-point) | | `f64x2.convert_u/i64x2(a: v128) -> v128` | [f64x2.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | From 5a3fd170fef20cca136291b3c68700bd585af3ef Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 24 Apr 2017 16:05:11 -0700 Subject: [PATCH 007/378] Fold documents into a single wasm-only spec. Fold the portable-simd.md specification and the WebAssembly mapping into a single SIMD.md document that is specific to WebAssembly. This is easier to read and avoids a lot of confusion. - Don't attempt to specify floating-point semantics again. Just refer to existing WebAssembly behavior. - Remove the minNum and maxNum operations which were never intended to be included in WebAssembly. - Clarify the trapping behavior of the float-to-int conversions. - Remove the descriptions of recipriocal [sqrt] approximations. See #3. - Rename all operations to use snake_case. - Add *.const instructions for all the new types. - Remove the partial load and store operators as suggested by @sunfishcode. They were removed from asm.js too. --- proposals/simd/Overview.md | 127 +-- proposals/simd/SIMD.md | 839 ++++++++++++++++ proposals/simd/portable-simd.md | 1320 ------------------------- proposals/simd/webassembly-opcodes.md | 275 ------ 4 files changed, 842 insertions(+), 1719 deletions(-) create mode 100644 proposals/simd/SIMD.md delete mode 100644 proposals/simd/portable-simd.md delete mode 100644 proposals/simd/webassembly-opcodes.md diff --git a/proposals/simd/Overview.md b/proposals/simd/Overview.md index f7f7f8e018..2b9233bd02 100644 --- a/proposals/simd/Overview.md +++ b/proposals/simd/Overview.md @@ -1,130 +1,9 @@ # SIMD support for WebAssembly -This proposal describes how 128-bit SIMD types and operations can be added to -WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 +This proposal describes how 128-bit packed SIMD types and operations can be +added to WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the [portable SIMD specification](https://github.com/stoklund/portable-simd) that resulted. -There are three parts to the proposal: - -1. [A specification of portable SIMD operations](portable-simd.md) that came - out of the SIMD.js work. -2. [A table of proposed WebAssembly operations](webassembly-opcodes.md) with - links to the portable specification. -3. This document which describes the mapping between WebAssembly and the - portable specification. - -# Mapping portable SIMD to WebAssembly - -The types and operations in the portable SIMD specification are relatively -straightforward to map to WebAssembly. This section describes the details of -the mapping. - -The following operations are *not* provided in WebAssembly: - -- `f*.maxNum` and `f*.minNum`. These NaN-suppressing operations don't exist in - scalar WebAssembly versions either. The NaN-propagating versions are provided. -- `f*.reciprocalApproximation` and `f*.reciprocalSqrtApproximation` are omitted - from WebAssembly pending further discussion. - -## New value types - -The following value types are added to the WebAssembly type system to support -128-bit SIMD operations. Each new WebAssembly value type corresponds to the -[portable SIMD type](portable-simd.md#simd-types) of the same name. - -* `v128`: A 128-bit SIMD vector. -* `b8x16`: A vector of 16 boolean lanes. -* `b16x8`: A vector of 8 boolean lanes. -* `b32x4`: A vector of 4 boolean lanes. -* `b64x2`: A vector of 2 boolean lanes. - -The 128 bits in a `v128` value are interpreted differently by different -operations. They can represent vectors of integers or IEEE floating point -numbers. - -The four boolean vector types do not have a prescribed representation in -memory; they can't be loaded or stored. This allows implementations to choose -the most efficient representation, whether as a predicate vector or some -variant of bits in a vector register. - -## Scalar type mapping - -Some operations in the portable SIMD specification use scalar types that don't -exist in WebAssembly. These types are mapped into WebAssembly as follows: - -* `i8` and `i16`: SIMD operations that take these types as an input are passed - a WebAssembly `i32` instead and use only the low bits, ignoring the high - bits. The `extractLane` operation can return these types; it is provided in - variants that either sign-extend or zero-extend to an `i32`. - -* `boolean`: SIMD operations with a boolean argument will accept a WebAssembly - `i32` instead and treat zero as false and non-zero values as true. SIMD - operations that return a boolean will return an `i32` with the value 0 or 1. - -* `LaneIdx2` through `LaneIdx32`: All lane indexes are encoded as `varuint7` - immediate operands. Dynamic lane indexes are not used anywhere. An - out-of-range lane index is a validation error. - -* `RoundingMode`: Rounding modes are encoded as `varuint7` immediate operands. - An out-of-range rounding mode is a validation error. - -## SIMD operations - -Most operation names are simply mapped from their portable SIMD versions. Some -are renamed to match existing conventions in WebAssembly. The integer -operations that distinguish between signed and unsigned integers are given `_s` -or `_u` suffixes. For example, `s32x4.greaterThan` becomes `i32x4.gt_s`, c.f. -the existing `i32.gt_s` WebAssembly operation. - -[The complete set of proposed opcodes](webassembly-opcodes.md) can be found in -a separate table. - -### Floating point conversions - -The `fromSignedInt` and `fromUnsignedInt` conversions to float never fail, so -they are simply renamed: - -* `f32x4.convert_s/i32x4(a: v128, rmode: RoundingMode) -> v128` -* `f64x2.convert_s/i64x2(a: v128, rmode: RoundingMode) -> v128` -* `f32x4.convert_u/i32x4(a: v128, rmode: RoundingMode) -> v128` -* `f64x2.convert_u/i64x2(a: v128, rmode: RoundingMode) -> v128` - -The float to integer conversions can fail. Conversion failure in any lane is -converted to a trap, same as the scalar WebAssembly conversions: - -* `i32x4.trunc_s/f32x4(a: v128) -> v128` -* `i64x2.trunc_s/f64x2(a: v128) -> v128` -* `i32x4.trunc_u/f32x4(a: v128) -> v128` -* `i64x2.trunc_u/f64x2(a: v128) -> v128` - -### Memory accesses - -The load and store operations use the same addressing and bounds checking as the -scalar WebAssembly memory instructions, and effective addresses are provided in -the same way by a dynamic address and an immediate offset operand. - -Since WebAssembly is always little-endian, the `load` and `store` instructions -are not dependent on the lane-wise interpretation of the vector being loaded or -stored. This means that there are only two instructions: - -* `v128.load(addr, offset) -> v128` -* `v128.store(addr, offset, data: v128)` - -The natural alignment of these instructions is 16 bytes; unaligned accesses are -supported in the same way as for WebAssembly's normal scalar load and store -instructions, including the alignment hint. - -The partial vector load/store instructions are specific to the 4-lane -interpretation: - -* `v32x4.load1(addr, offset) -> v128` -* `v32x4.load2(addr, offset) -> v128` -* `v32x4.load3(addr, offset) -> v128` -* `v32x4.store1(addr, offset, data: v128)` -* `v32x4.store2(addr, offset, data: v128)` -* `v32x4.store3(addr, offset, data: v128)` - -The natural alignment of these instructions is *4 bytes*, not the size of the -access. +The [proposed specification](SIMD.md) has the details. diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md new file mode 100644 index 0000000000..d0b4d2a17b --- /dev/null +++ b/proposals/simd/SIMD.md @@ -0,0 +1,839 @@ +# WebAssembly 128-bit packed SIMD Extension + +This specification describes a 128-bit packed *Single Instruction Multiple +Data* (SIMD) extension to WebAssembly that can be implemented efficiently on +current popular instruction set architectures. + +# Types + +WebAssembly is extended with five new value types and a number of new kinds of +immediate operands used by the SIMD instructions. + +## SIMD value types + +The `v128` type has a concrete mapping to a 128-bit representation. The boolean +types do not have a bit-pattern representation. + +* `v128`: A 128-bit SIMD vector. Bits are numbered 0–127. +* `b8x16`: A vector of 16 `boolean` lanes numbered 0–15. +* `b16x8`: A vector of 8 `boolean` lanes numbered 0–7. +* `b32x4`: A vector of 4 `boolean` lanes numbered 0–3. +* `b64x2`: A vector of 2 `boolean` lanes numbered 0–1. + +The `v128` type corresponds to a vector register in a typical SIMD ISA. The +interpretation of the 128 bits in the vector register is provided by the +individual instructions. When a `v128` value is represented as 16 bytes, bits +0-7 go in the first byte with bit 0 as the LSB, bits 8-15 go in the second +byte, etc. + +The abstract boolean vector types can be mapped to vector registers or predicate +registers by an implementation. They have a property `S.Lanes` which is used by +the pseudo-code below: + +| S | S.Lanes | +|---------|--------:| +| `b8x16` | 16 | +| `b16x8` | 8 | +| `b32x4` | 4 | +| `b64x2` | 2 | + +## Immediate operands + +Some of the new SIMD instructions defined here have immediate operands that are +encoded as individual bytes in the binary encoding. Many have a limited valid +range, and it is a validation error if the immediate operands are out of range. + +* `ImmBits2`: A byte with values in the range 0-3 used to initialize a `b64x2`. +* `ImmBits4`: A byte with values in the range 0-15 used to initialize a `b32x4`. +* `ImmByte`: A single unconstrained byte (0-255). +* `LaneIdx2`: A byte with values in the range 0–1 identifying a lane. +* `LaneIdx4`: A byte with values in the range 0–3 identifying a lane. +* `LaneIdx8`: A byte with values in the range 0–7 identifying a lane. +* `LaneIdx16`: A byte with values in the range 0–15 identifying a lane. +* `LaneIdx32`: A byte with values in the range 0–31 identifying a lane. + +## Interpreting SIMD value types + +The single `v128` SIMD type can represent packed data in multiple ways. +Instructions specify how the bits should be interpreted through a hierarchy of +*interpretations*. + +The boolean vector types only have the one interpretation given by their type. + +### Lane division interpretation + +The first level of interpretations of the `v128` type imposes a lane structure on +the bits: + +* `v8x16 : v128`: 8-bit lanes numbered 0–15. Lane n corresponds to bits 8n – 8n+7. +* `v16x8 : v128`: 16-bit lanes numbered 0–7. Lane n corresponds to bits 16n – 16n+15. +* `v32x4 : v128`: 32-bit lanes numbered 0–3. Lane n corresponds to bits 32n – 32n+31. +* `v64x2 : v128`: 64-bit lanes numbered 0–1. Lane n corresponds to bits 64n – 64n+63. + +The lane dividing interpretations don't say anything about the semantics of the +bits in each lane. The interpretations have *properties* used by the semantic +specification pseudo-code below: + +| S | S.LaneBits | S.Lanes | S.BoolType | +|---------|-----------:|--------:|:----------:| +| `v8x16` | 8 | 16 | `b8x16` | +| `v16x8` | 16 | 8 | `b16x8` | +| `v32x4` | 32 | 4 | `b32x4` | +| `v64x2` | 64 | 2 | `b64x2` | + +Since WebAssembly is little-endian, the least significant bit in each lane is +the bit with the lowest number. + +### Modulo integer interpretations + +The bits in a lane can be interpreted as integers with modulo arithmetic +semantics. Many arithmetic operations can be defined on these types which don't +impose a signed or unsigned integer interpretation. + +* `i8x16 : v8x16`: Each lane is an `i8`. +* `i16x8 : v16x8`: Each lane is an `i16`. +* `i32x4 : v32x4`: Each lane is an `i32`. +* `i64x2 : v64x2`: Each lane is an `i64`. + +Additional properties: + +| S | S.Smin | S.Smax | S.Umax | +|---------|--------:|-------:|-------:| +| `i8x16` | -2^7 | 2^7-1 | 2^8-1 | +| `i16x8` | -2^15 | 2^15-1 | 2^16-1 | +| `i32x4` | -2^31 | 2^31-1 | 2^32-1 | +| `i64x2` | -2^63 | 2^63-1 | 2^64-1 | + +Some operations interpret each lane specifically as a signed or unsigned +integer. These operations have `_s` and `_u` suffixes as is the convention is +WebAssembly. + +### Floating-point interpretations + +Each lane is interpreted as an IEEE floating-point number. + +* `f32x4 : v32x4`: Each lane is an `f32`. +* `f64x2 : v64x2`: Each lane is an `f64`. + +The floating-point operations in this specification aim to be compatible with +WebAssembly's scalar floating-point operations. In particular, the rules about +NaN propagation and default NaN values are the same, and all operations use the +default *roundTiesToEven* rounding mode. + +An implementation is allowed to flush subnormals in arithmetic floating-point +operations. This means that any subnormal operand is treated as 0, and any +subnormal result is rounded to 0. Note that this differs from WebAssembly +scalar floating-point semantics which require correct subnormal handling. + +# Operations + +The SIMD operations described in this sections are generally named +`S.Op`, where `S` is either a SIMD type or one of the interpretations +of a SIMD type. + +Many operations are simply the lane-wise application of a scalar operation: + +```python +def S.lanewise_unary(func, a): + result = S.New() + for i in range(S.Lanes): + result[i] = func(a[i]) + return result + +def S.lanewise_binary(func, a, b): + result = S.New() + for i in range(S.Lanes): + result[i] = func(a[i], b[i]) + return result +``` + +Comparison operators produce a boolean vector: + +```python +def S.lanewise_comparison(func, a, b): + result = S.BoolType.New() + for i in range(S.Lanes): + result[i] = func(a[i], b[i]) + return result +``` + +## Constructing SIMD values + +### Constants +* `v128.const(imm: ImmByte[16]) -> v128` +* `b8x16.const(imm: ImmByte[2]) -> b8x16` +* `b16x8.const(imm: ImmByte) -> b16x8` +* `b32x4.const(imm: ImmBits4) -> b32x4` +* `b64x2.const(imm: ImmBits2) -> b64x2` + +Materialize a constant SIMD value from the immediate operands. The `v128.const` +instruction is encoded with 16 immediate bytes which provide the bits of the +vector directly. The boolean constants are encoded with one bit per lane such +that lane 0 is the LSB of the first immediate byte. + +### Build vector from individual lanes +* `b8x16.build(x: i32[16]) -> b8x16` +* `b16x8.build(x: i32[8]) -> b16x8` +* `b32x4.build(x: i32[4]) -> b32x4` +* `b64x2.build(x: i32[2]) -> b64x2` +* `i8x16.build(x: i32[16]) -> v128` +* `i16x8.build(x: i32[8]) -> v128` +* `i32x4.build(x: i32[4]) -> v128` +* `i64x2.build(x: i64[2]) -> v128` +* `f32x4.build(x: f32[4]) -> v128` +* `f64x2.build(x: f64[2]) -> v128` + +Construct a vector from an array of individual lane values. + +```python +def S.build(x): + result = S.New() + for i in range(S.Lanes): + result[i] = x[i] + return result +``` + +The `i32[16]` array notation is a shorthand for a sequence of identically typed +arguments. So `b8x16.build` takes 16 `i32` arguments where a non-zero value is +interpreted as true. + +### Create vector with identical lanes +* `b8x16.splat(x: i32) -> b8x16` +* `b16x8.splat(x: i32) -> b16x8` +* `b32x4.splat(x: i32) -> b32x4` +* `b64x2.splat(x: i32) -> b64x2` +* `i8x16.splat(x: i32) -> v128` +* `i16x8.splat(x: i32) -> v128` +* `i32x4.splat(x: i32) -> v128` +* `i64x2.splat(x: i64) -> v128` +* `f32x4.splat(x: f32) -> v128` +* `f64x2.splat(x: f64) -> v128` + +Construct a vector with `x` replicated to all lanes: + +```python +def S.splat(x): + result = S.New() + for i in range(S.Lanes): + result[i] = x + return result +``` + +The boolean vector splats will create a vector with all false lanes if `x` is +zero, all true lanes otherwise. The `i8x16.splat` and `i16x8.splat` +instructions ignore the high bits of `x`. + +## Accessing lanes + +### Extract lane as a scalar +* `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` +* `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` +* `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` +* `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` +* `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` +* `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` +* `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` +* `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` +* `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` +* `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` +* `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` +* `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` + +Extract the value of lane `i` in `a`. + +```python +def S.extractLane(a, i): + return a[i] +``` + +The `_s` and `_u` variants will sign-extend or zero-extend the lane value to +`i32` respectively. Boolean lanes are returned as an `i32` with the value 0 or +1. + +### Replace lane value +* `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` +* `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` +* `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` +* `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` +* `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i32) -> v128` +* `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i32) -> v128` +* `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` +* `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` +* `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` +* `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` + +Return a new vector with lanes identical to `a`, except for lane `i` which has +the value `x`. + +```python +def S.replaceLane(a, i, x): + result = S.New() + for j in range(S.Lanes): + result[j] = a[j] + result[i] = x + return result +``` + +The input lane value, `x`, is interpreted the same way as for the splat +instructions. For the boolean vectors, non-zero means true; for the `i8` and +`i16` lanes, the high bits of `x` are ignored. + +### Lane-wise select +* `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` +* `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` +* `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` +* `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` + +Use a boolean vector to select lanes from two numerical vectors. + +```python +def S.select(s, t, f): + result = S.New() + for i in range(S.Lanes): + if s[i]: + result[i] = t[i] + else + result[i] = f[i] + return result +``` + +Note that the normal WebAssembly `select` instruction also works with vector +types. It selects between two whole vectors controlled by a scalar value, +rather than selecting lanes controlled by a boolean vector. + +### Swizzle lanes +* `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` +* `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` +* `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` +* `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` + +Create vector with lanes rearranged: + +```python +def S.swizzle(a, s): + result = S.New() + for i in range(S.Lanes): + result[i] = a[s[i]] + return result +``` + +### Shuffle lanes +* `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` +* `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` +* `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` +* `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` + +Create vector with lanes selected from the lanes of two input vectors: + +```python +def S.shuffle(a, b, s): + result = S.New() + for i in range(S.Lanes): + if s[i] < S.lanes: + result[i] = a[s[i]] + else: + result[i] = b[s[i] - S.lanes] + return result +``` + +## Integer arithmetic + +Wrapping integer arithmetic discards the high bits of the result. + +```python +def S.Reduce(x): + bitmask = (1 << S.LaneBits) - 1 + return x & bitmask +``` + +There is no integer division operation provided here. This operation is not +commonly part of bit 128-bit SIMD ISAs. + +### Integer addition +* `i8x16.add(a: v128, b: v128) -> v128` +* `i16x8.add(a: v128, b: v128) -> v128` +* `i32x4.add(a: v128, b: v128) -> v128` +* `i64x2.add(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer addition: + +```python +def S.add(a, b): + def add(x, y): + return S.Reduce(x + y) + return S.lanewise_binary(add, a, b) +``` + +### Integer subtraction +* `i8x16.sub(a: v128, b: v128) -> v128` +* `i16x8.sub(a: v128, b: v128) -> v128` +* `i32x4.sub(a: v128, b: v128) -> v128` +* `i64x2.sub(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer subtraction: + +```python +def S.sub(a, b): + def sub(x, y): + return S.Reduce(x - y) + return S.lanewise_binary(sub, a, b) +``` + +### Integer multiplication +* `i8x16.mul(a: v128, b: v128) -> v128` +* `i16x8.mul(a: v128, b: v128) -> v128` +* `i32x4.mul(a: v128, b: v128) -> v128` +* `i64x2.mul(a: v128, b: v128) -> v128` + +Lane-wise wrapping integer multiplication: + +```python +def S.mul(a, b): + def mul(x, y): + return S.Reduce(x * y) + return S.lanewise_binary(mul, a, b) +``` + +### Integer negation +* `i8x16.neg(a: v128) -> v128` +* `i16x8.neg(a: v128) -> v128` +* `i32x4.neg(a: v128) -> v128` +* `i64x2.neg(a: v128) -> v128` + +Lane-wise wrapping integer negation. In wrapping arithmetic, `y = -x` is the +unique value such that `x + y == 0`. + +```python +def S.neg(a): + def neg(x): + return S.Reduce(-x) + return S.lanewise_unary(neg, a) +``` + +## Saturating integer arithmetic + +Saturating integer arithmetic behaves differently on signed and unsigned lanes. +It is only defined here for 8-bit and 16-bit integer lanes. + +```python +def S.SignedSaturate(x): + if x < S.Smin: + return S.Smin + if x > S.Smax: + return S.Smax + return x + +def S.UnsignedSaturate(x): + if x > S.Umax: + return S.Umax + return x +``` + +### Saturating integer addition +* `i8x16.add_saturate_s(a: v128, b: v128) -> v128` +* `i8x16.add_saturate_u(a: v128, b: v128) -> v128` +* `i16x8.add_saturate_s(a: v128, b: v128) -> v128` +* `i16x8.add_saturate_u(a: v128, b: v128) -> v128` + +Lane-wise saturating addition: + +```python +def S.add_saturate_s(a, b): + def addsat(x, y): + return S.SignedSaturate(x + y) + return S.lanewise_binary(addsat, S.AsSigned(a), S.AsSigned(b)) + +def S.add_saturate_u(a, b): + def addsat(x, y): + return S.UnsignedSaturate(x + y) + return S.lanewise_binary(addsat, S.AsUnsigned(a), S.AsUnsigned(b)) +``` + +### Saturating integer subtraction +* `i8x16.sub_saturate_s(a: v128, b: v128) -> v128` +* `i8x16.sub_saturate_u(a: v128, b: v128) -> v128` +* `i16x8.sub_saturate_s(a: v128, b: v128) -> v128` +* `i16x8.sub_saturate_u(a: v128, b: v128) -> v128` + +Lane-wise saturating subtraction: + +```python +def S.sub_saturate_s(a, b): + def subsat(x, y): + return S.SignedSaturate(x - y) + return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b)) + +def S.sub_saturate_u(a, b): + def subsat(x, y): + return S.UnsignedSaturate(x - y) + return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b)) +``` + +## Bit shifts + +### Left shift by scalar +* `i8x16.shl(a: v128, y: i32) -> v128` +* `i16x8.shl(a: v128, y: i32) -> v128` +* `i32x4.shl(a: v128, y: i32) -> v128` +* `i64x2.shl(a: v128, y: i32) -> v128` + +Shift the bits in each lane to the left by the same amount. Only the low bits +of the shift amount are used: + +```python +def S.shl(a, x): + # Number of bits to shift: 0 .. S.LaneBits - 1. + amount = y mod S.LaneBits + def shift(x): + return S.Reduce(x << amount) + return S.lanewise_unary(shift, a) +``` + +### Right shift by scalar +* `i8x16.shr_s(a: v128, y: i32) -> v128` +* `i8x16.shr_u(a: v128, y: i32) -> v128` +* `i16x8.shr_s(a: v128, y: i32) -> v128` +* `i16x8.shr_u(a: v128, y: i32) -> v128` +* `i32x4.shr_s(a: v128, y: i32) -> v128` +* `i32x4.shr_u(a: v128, y: i32) -> v128` +* `i64x2.shr_s(a: v128, y: i32) -> v128` +* `i64x2.shr_u(a: v128, y: i32) -> v128` + +Shift the bits in each lane to the right by the same amount. This is an +arithmetic right shift for the `_s` variants and a logical right shift for the +`_u` variants. + +```python +def S.shl_s(a, y): + # Number of bits to shift: 0 .. S.LaneBits - 1. + amount = y mod S.LaneBits + def shift(x): + return x >> amount + return S.lanewise_unary(shift, S.AsSigned(a)) + +def S.shl_u(a, y): + # Number of bits to shift: 0 .. S.LaneBits - 1. + amount = y mod S.LaneBits + def shift(x): + return x >> amount + return S.lanewise_unary(shift, S.AsUnsigned(a)) +``` + +## Logical operations + +The logical operations are defined on the boolean SIMD types. See also the +[Bitwise operations](#bitwise-operations) below. + +### Logical and +* `b8x16.and(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.and(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.and(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.and(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.and(a, b): + def logical_and(x, y): + return x and y + return S.lanewise_binary(logical_and, a, b) +``` + +### Logical or +* `b8x16.or(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.or(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.or(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.or(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.or(a, b): + def logical_or(x, y): + return x or y + return S.lanewise_binary(logical_or, a, b) +``` + +### Logical xor +* `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` +* `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` +* `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` +* `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` + +```python +def S.xor(a, b): + def logical_xor(x, y): + return x xor y + return S.lanewise_binary(logical_xor, a, b) +``` + +### Logical not +* `b8x16.not(a: b8x16) -> b8x16` +* `b16x8.not(a: b16x8) -> b16x8` +* `b32x4.not(a: b32x4) -> b32x4` +* `b64x2.not(a: b64x2) -> b64x2` + +```python +def S.not(a): + def logical_not(x): + return not x + return S.lanewise_unary(logical_not, a) +``` + +## Bitwise operations + +The same logical operations defined on the boolean types are also available on +the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, and +`~` operators work on an `unsigned` type. + +* `v128.and(a: v128, b: v128) -> v128` +* `v128.or(a: v128, b: v128) -> v128` +* `v128.xor(a: v128, b: v128) -> v128` +* `v128.not(a: v128) -> v128` + +## Boolean horizontal reductions + +These operations reduce all the lanes of a boolean vector to a single scalar +boolean value. + +### Any lane true +* `b8x16.any_true(a: b8x16) -> i32` +* `b16x8.any_true(a: b16x8) -> i32` +* `b32x4.any_true(a: b32x4) -> i32` +* `b64x2.any_true(a: b64x2) -> i32` + +These functions return 1 if any lane in `a` is true, 0 otherwise. + +```python +def S.any_true(a): + for i in range(S.Lanes): + if a[i]: + return 1 + return 0 +``` + +### All lanes true +* `b8x16.all_true(a: b8x16) -> i32` +* `b16x8.all_true(a: b16x8) -> i32` +* `b32x4.all_true(a: b32x4) -> i32` +* `b64x2.all_true(a: b64x2) -> i32` + +These functions return 1 if all lanes in `a` are true, 0 otherwise. + +```python +def S.all_true(a): + for i in range(S.Lanes): + if not a[i]: + return 0 + return 1 +``` + +## Comparisons + +The comparison operations all compare two vectors lane-wise, and produce a +boolean vector with the same number of lanes as the input interpretation. + +### Equality +* `i8x16.eq(a: v128, b: v128) -> b8x16` +* `i16x8.eq(a: v128, b: v128) -> b16x8` +* `i32x4.eq(a: v128, b: v128) -> b32x4` +* `i64x2.eq(a: v128, b: v128) -> b64x2` +* `f32x4.eq(a: v128, b: v128) -> b32x4` +* `f64x2.eq(a: v128, b: v128) -> b64x2` + +Integer equality is independent of the signed/unsigned interpretation. Floating +point equality follows IEEE semantics, so a NaN lane compares not equal with +anything, including itself, and +0.0 is equal to -0.0: + +```python +def S.eq(a, b): + def eq(x, y): + return x == y + return S.lanewise_comparison(eq, a, b) +``` + +### Non-equality +* `i8x16.ne(a: v128, b: v128) -> b8x16` +* `i16x8.ne(a: v128, b: v128) -> b16x8` +* `i32x4.ne(a: v128, b: v128) -> b32x4` +* `i64x2.ne(a: v128, b: v128) -> b64x2` +* `f32x4.ne(a: v128, b: v128) -> b32x4` +* `f64x2.ne(a: v128, b: v128) -> b64x2` + +The `ne` operations produce the inverse of their `ne` counterparts: + +```python +def S.ne(a, b): + def ne(x, y): + return x != y + return S.lanewise_comparison(ne, a, b) +``` + +### Less than +* `i8x16.lt_s(a: v128, b: v128) -> b8x16` +* `i8x16.lt_u(a: v128, b: v128) -> b8x16` +* `i16x8.lt_s(a: v128, b: v128) -> b16x8` +* `i16x8.lt_u(a: v128, b: v128) -> b16x8` +* `i32x4.lt_s(a: v128, b: v128) -> b32x4` +* `i32x4.lt_u(a: v128, b: v128) -> b32x4` +* `i64x2.lt_s(a: v128, b: v128) -> b64x2` +* `i64x2.lt_u(a: v128, b: v128) -> b64x2` +* `f32x4.lt(a: v128, b: v128) -> b32x4` +* `f64x2.lt(a: v128, b: v128) -> b64x2` + +### Less than or equal +* `i8x16.le_s(a: v128, b: v128) -> b8x16` +* `i8x16.le_u(a: v128, b: v128) -> b8x16` +* `i16x8.le_s(a: v128, b: v128) -> b16x8` +* `i16x8.le_u(a: v128, b: v128) -> b16x8` +* `i32x4.le_s(a: v128, b: v128) -> b32x4` +* `i32x4.le_u(a: v128, b: v128) -> b32x4` +* `i64x2.le_s(a: v128, b: v128) -> b64x2` +* `i64x2.le_u(a: v128, b: v128) -> b64x2` +* `f32x4.le(a: v128, b: v128) -> b32x4` +* `f64x2.le(a: v128, b: v128) -> b64x2` + +### Greater than +* `i8x16.gt_s(a: v128, b: v128) -> b8x16` +* `i8x16.gt_u(a: v128, b: v128) -> b8x16` +* `i16x8.gt_s(a: v128, b: v128) -> b16x8` +* `i16x8.gt_u(a: v128, b: v128) -> b16x8` +* `i32x4.gt_s(a: v128, b: v128) -> b32x4` +* `i32x4.gt_u(a: v128, b: v128) -> b32x4` +* `i64x2.gt_s(a: v128, b: v128) -> b64x2` +* `i64x2.gt_u(a: v128, b: v128) -> b64x2` +* `f32x4.gt(a: v128, b: v128) -> b32x4` +* `f64x2.gt(a: v128, b: v128) -> b64x2` + +### Greater than or equal +* `i8x16.ge_s(a: v128, b: v128) -> b8x16` +* `i8x16.ge_u(a: v128, b: v128) -> b8x16` +* `i16x8.ge_s(a: v128, b: v128) -> b16x8` +* `i16x8.ge_u(a: v128, b: v128) -> b16x8` +* `i32x4.ge_s(a: v128, b: v128) -> b32x4` +* `i32x4.ge_u(a: v128, b: v128) -> b32x4` +* `i64x2.ge_s(a: v128, b: v128) -> b64x2` +* `i64x2.ge_u(a: v128, b: v128) -> b64x2` +* `f32x4.ge(a: v128, b: v128) -> b32x4` +* `f64x2.ge(a: v128, b: v128) -> b64x2` + +## Load and store + +Load and store operations are provided for `v128` vectors, but not for the +boolean vectors; we don't want to prescribe a bitwise representation of the +boolean vectors. + +The memory operations take the same arguments and have the same semantics as +the existing scalar WebAssembly load and store instructions. The difference is +that the memory access size is 16 bytes which is also the natural alignment. + +### Load + +* `v128.load(memarg) -> v128` + +Load a `v128` vector from the given heap address. + +### Store + +* `v128.store(memarg, data: v128)` + +Store a `v128` vector to the given heap address. + +## Floating-point sign bit operations + +These floating point operations are simple manipulations of the sign bit. No +changes are made to the exponent or trailing significand bits, even for NaN +inputs. + +### Negation +* `f32x4.neg(a: v128) -> v128` +* `f64x2.neg(a: v128) -> v128` + +Apply the IEEE `negate(x)` function to each lane. This simply inverts the sign +bit, preserving all other bits. + +```python +def S.neg(a): + return S.lanewise_unary(ieee.negate, a) +``` + +### Absolute value +* `f32x4.abs(a: v128) -> v128` +* `f64x2.abs(a: v128) -> v128` + +Apply the IEEE `abs(x)` function to each lane. This simply clears the sign bit, +preserving all other bits. + +```python +def S.abs(a): + return S.lanewise_unary(ieee.abs, a) +``` + +## Floating-point min and max + +These operations are not part of the IEEE 754-2008 standard. They are lane-wise +versions of the existing scalar WebAssembly operations. + +### NaN-propagating minimum +* `f32x4.min(a: v128, b: v128) -> v128` +* `f64x2.min(a: v128, b: v128) -> v128` + +Lane-wise minimum value, propagating NaNs. + +### NaN-propagating maximum +* `f32x4.max(a: v128, b: v128) -> v128` +* `f64x2.max(a: v128, b: v128) -> v128` + +Lane-wise maximum value, propagating NaNs. + +## Floating-point arithmetic + +The floating-point arithmetic operations are all lane-wise versions of the +existing scalar WebAssembly operations. + +### Addition +* `f32x4.add(a: v128, b: v128) -> v128` +* `f64x2.add(a: v128, b: v128) -> v128` + +Lane-wise IEEE `addition`. + +### Subtraction +* `f32x4.sub(a: v128, b: v128) -> v128` +* `f64x2.sub(a: v128, b: v128) -> v128` + +Lane-wise IEEE `subtraction`. + +### Division +* `f32x4.div(a: v128, b: v128) -> v128` +* `f64x2.div(a: v128, b: v128) -> v128` + +Lane-wise IEEE `division`. + +### Multiplication +* `f32x4.mul(a: v128, b: v128) -> v128` +* `f64x2.mul(a: v128, b: v128) -> v128` + +Lane-wise IEEE `multiplication`. + +### Square root +* `f32x4.sqrt(a: v128) -> v128` +* `f64x2.sqrt(a: v128) -> v128` + +Lane-wise IEEE `squareRoot`. + +## Conversions +### Integer to floating point +* `f32x4.convert_s/i32x4(a: v128) -> v128` +* `f32x4.convert_u/i32x4(a: v128) -> v128` +* `f64x2.convert_s/i64x2(a: v128) -> v128` +* `f64x2.convert_u/i64x2(a: v128) -> v128` + +Lane-wise conversion from integer to floating point. Some integer values will be +rounded. + +### Floating point to integer +* `i32x4.trunc_s/f32x4(a: v128) -> v128` +* `i32x4.trunc_u/f32x4(a: v128) -> v128` +* `i64x2.trunc_s/f64x2(a: v128) -> v128` +* `i64x2.trunc_u/f64x2(a: v128) -> v128` + +Lane-wise conversion from floating point to integer using the IEEE +`convertToIntegerTowardZero` function. If any lane is a NaN or the rounded +integer value is outside the range of the destination type, these instructions +trap. diff --git a/proposals/simd/portable-simd.md b/proposals/simd/portable-simd.md deleted file mode 100644 index 7e839cabeb..0000000000 --- a/proposals/simd/portable-simd.md +++ /dev/null @@ -1,1320 +0,0 @@ -# Portable SIMD - -This specification describes a *Single Instruction Multiple Data* (SIMD) -instruction set that can be implemented efficiently on current popular -instruction set architectures. It provides shared semantics for -[WebAssembly][wasm] and [SIMD.js][simdjs]. - -# Types - -The types used in this specification can be concrete or abstract. Concrete types -have a defined representation as a bit pattern, while abstract types are simply -a set of allowed values. - -## Scalar types - -The concrete scalar integer types are not interpreted as either signed or -unsigned integers. - -* `i8`: An 8-bit integer with bits numbered 0–7. -* `i16`: A 16-bit integer with bits numbered 0–15. -* `i32`: A 32-bit integer with bits numbered 0–31. -* `i64`: A 64-bit integer with bits numbered 0–63. - -The concrete scalar floating-point types follow the encoding and semantics of -the [IEEE 754-2008 standard for floating-point arithmetic][ieee754]. See the -[Floating-point semantics](#floating-point-semantics) section for details and -exceptions. - -* `f32`: A floating-point number in the [IEEE][ieee754] *binary32* interchange - format. -* `f64`: A floating-point number in the [IEEE][ieee754] *binary64* interchange - format. - -The following abstract types don't have a specified representation as a bit -pattern: - -* `boolean`: Either `true` or `false`. -* `LaneIdx2`: An integer in the range 0–1 identifying a lane. -* `LaneIdx4`: An integer in the range 0–3 identifying a lane. -* `LaneIdx8`: An integer in the range 0–7 identifying a lane. -* `LaneIdx16`: An integer in the range 0–15 identifying a lane. -* `LaneIdx32`: An integer in the range 0–31 identifying a lane. - -## SIMD types - -All of the numerical SIMD types have a concrete mapping to a 128-bit -representation. The boolean types do not have a bit-pattern representation. - -* `v128`: A 128-bit SIMD vector. Bits are numbered 0–127. -* `b8x16`: A vector of 16 `boolean` lanes numbered 0–15. -* `b16x8`: A vector of 8 `boolean` lanes numbered 0–7. -* `b32x4`: A vector of 4 `boolean` lanes numbered 0–3. -* `b64x2`: A vector of 2 `boolean` lanes numbered 0–1. - -The `v128` type corresponds to a vector register in a typical SIMD ISA. The -interpretation of the 128 bits in the vector register is provided by the -individual instructions. - -The abstract boolean vector types can be mapped to vector registers or predicate -registers by an implementation. They have a property `S.Lanes` which is used by -the pseudo-code below: - -| S | S.Lanes | -|---------|--------:| -| `b8x16` | 16 | -| `b16x8` | 8 | -| `b32x4` | 4 | -| `b64x2` | 2 | - -## Interpreting SIMD types - -The single `v128` SIMD type can represent packed data in multiple ways. -Instructions specify how the bits should be interpreted through a hierarchy of -*interpretations*. - -The boolean vector types only have the one interpretation given by their type. - -### Lane division interpretation - -The first level of interpretations of the `v128` type impose a lane structure on -the bits: - -* `v8x16 : v128`: 8-bit lanes numbered 0–15. Lane n corresponds to bits 8n – 8n+7. -* `v16x8 : v128`: 16-bit lanes numbered 0–7. Lane n corresponds to bits 16n – 16n+15. -* `v32x4 : v128`: 32-bit lanes numbered 0–3. Lane n corresponds to bits 32n – 32n+31. -* `v64x2 : v128`: 64-bit lanes numbered 0–1. Lane n corresponds to bits 64n – 64n+63. - -The lane dividing interpretations don't say anything about the semantics of the -bits in each lane. The interpretations have *properties* used by the semantic -specification pseudo-code below: - -| S | S.LaneBits | S.Lanes | S.BoolType | -|---------|-----------:|--------:|:----------:| -| `v8x16` | 8 | 16 | `b8x16` | -| `v16x8` | 16 | 8 | `b16x8` | -| `v32x4` | 32 | 4 | `b32x4` | -| `v64x2` | 64 | 2 | `b64x2` | - - -### Modulo integer interpretations - -The bits in a lane can be interpreted as integers with modulo arithmetic -semantics. Many arithmetic operations can be defined on these types which don't -impose a signed or unsigned integer interpretation. - -* `i8x16 : v8x16`: Each lane is an `i8`. -* `i16x8 : v16x8`: Each lane is an `i16`. -* `i32x4 : v32x4`: Each lane is an `i32`. -* `i64x2 : v64x2`: Each lane is an `i64`. - -Additional properties: - -| S | S.LaneType | -|---------|------------| -| `i8x16` | `i8` | -| `i16x8` | `i16` | -| `i32x4` | `i32` | -| `i64x2` | `i64` | - -### Signed integer interpretations - -Each lane is interpreted as a two's complement integer. - -* `s8x16 : i8x16`: Lane values in the range -2^7 – 2^7-1. -* `s16x8 : i16x8`: Lane values in the range -2^15 – 2^15-1. -* `s32x4 : i32x4`: Lane values in the range -2^31 – 2^31-1. -* `s64x2 : i64x2`: Lane values in the range -2^63 – 2^63-1. - -These interpretations get additional properties defining the range of values in -a lane: - -| S | S.Min | S.Max | -|---------|------:|-------:| -| `s8x16` | -2^7 | 2^7-1 | -| `s16x8` | -2^15 | 2^15-1 | -| `s32x4` | -2^31 | 2^31-1 | -| `s64x2` | -2^63 | 2^63-1 | - -### Unsigned integer interpretations - -Each lane is interpreted as an unsigned integer. - -* `u8x16 : i8x16`: Lane values in the range 0 – 2^8-1. -* `u16x8 : i16x8`: Lane values in the range 0 – 2^16-1. -* `u32x4 : i32x4`: Lane values in the range 0 – 2^32-1. -* `u64x2 : i64x2`: Lane values in the range 0 – 2^64-1. - -These interpretations get additional properties defining the range of values in -a lane: - -| S | S.Min | S.Max | -|---------|------:|-------:| -| `u8x16` | 0 | 2^8-1 | -| `u16x8` | 0 | 2^16-1 | -| `u32x4` | 0 | 2^32-1 | -| `u64x2` | 0 | 2^64-1 | - -### Floating-point interpretations - -Each lane is interpreted as an IEEE floating-point number. - -* `f32x4 : v32x4`: Each lane is an `f32`. -* `f64x2 : v64x2`: Each lane is an `f64`. - -Additional properties: - -| S | S.LaneType | -|---------|------------| -| `f32x4` | `f32` | -| `f64x2` | `f64` | - -# Floating-point semantics - -The floating-point operations in this specification aim to be conforming to -[IEEE 754-2008][ieee754] while being compatible with WebAssembly and JavaScript. -Some things which are left unspecified by the IEEE standard are given stricter -semantics by WebAssembly. - -## Rounding modes - -This specification does not yet provide a way of changing floating point -rounding modes. All floating point operations use the default *roundTiesToEven* -mode. - -## Default NaN value - -When a floating-point operation needs to return a NaN and none of its operands -are NaN, it generates a default NaN value which is a quiet NaN with an all-zero -payload field. The sign of the default NaN is not specified: - -```python -def f32.default_nan(): - if unspecified_choice(): - bits = 0x7fc00000 - else: - bits = 0xffc00000 - return f32.from_bits(bits) - -def f64.default_nan(): - if unspecified_choice(): - bits = 0x7ff8000000000000 - else: - bits = 0xfff8000000000000 - return f64.from_bits(bits) -``` - -## Propagating NaN values - -When propagating a NaN value from an operand, all the bits of the NaN are -preserved, except a signaling NaN is quieted by setting the most significand -bit in the trailing significand field. - -```python -def canonicalize_nan(x): - assert isnan(x) - t = type(x) - assert t == f32 or t == f64 - bits = x.to_bits() - if t == f32: - bits |= (1 << 22) - else: - bits |= (1 << 51) - return t.from_bits(bits) -``` - -When two operands are NaN, one of them is propagated. Which one is not specified: - -```python -def propagate_nan(x, y): - assert isinan(x) or isnan(y) - if not isnan(x): - return canonicalize_nan(y) - if not isnan(y) - return canonicalize_nan(x) - # Both x and y are NaNs: pick one to propagate. - if unspecified_choice(): - return canonicalize_nan(x) - else: - return canonicalize_nan(y) -``` - -## Subnormal flushing - -An implementation is allowed to flush subnormals in arithmetic floating-point -operations. This means that any subnormal operand is treated as 0, and any -subnormal result is rounded to 0. - -Note that this differs from WebAssembly scalar floating-point semantics which -require correct subnormal handling. - -# Operations - -The SIMD operations described in this sections are generally named -`S.Op`, where `S` is either a SIMD type or one of the interpretations -of a SIMD type. - -Many operations are simply the lane-wise application of a scalar operation: - -```python -def S.lanewise_unary(func, a): - result = S.New() - for i in range(S.Lanes): - result[i] = func(a[i]) - return result - -def S.lanewise_binary(func, a, b): - result = S.New() - for i in range(S.Lanes): - result[i] = func(a[i], b[i]) - return result -``` - -Comparison operators produce a boolean vector: - -```python -def S.lanewise_comparison(func, a, b): - result = S.BoolType.New() - for i in range(S.Lanes): - result[i] = func(a[i], b[i]) - return result -``` - -## Constructing SIMD values - -### Build vector from individual lanes -* `b8x16.build(x: boolean[16]) -> b8x16` -* `b16x8.build(x: boolean[8]) -> b16x8` -* `b32x4.build(x: boolean[4]) -> b32x4` -* `b64x2.build(x: boolean[2]) -> b64x2` -* `i8x16.build(x: i8[16]) -> v128` -* `i16x8.build(x: i16[8]) -> v128` -* `i32x4.build(x: i32[4]) -> v128` -* `i64x2.build(x: i64[2]) -> v128` -* `f32x4.build(x: f32[4]) -> v128` -* `f64x2.build(x: f64[2]) -> v128` - -Construct a vector from an array of individual lane values. - -```python -def S.build(x): - result = S.New() - for i in range(S.Lanes): - result[i] = x[i] - return result -``` - -### Create vector with identical lanes -* `b8x16.splat(x: boolean) -> b8x16` -* `b16x8.splat(x: boolean) -> b16x8` -* `b32x4.splat(x: boolean) -> b32x4` -* `b64x2.splat(x: boolean) -> b64x2` -* `i8x16.splat(x: i8) -> v128` -* `i16x8.splat(x: i16) -> v128` -* `i32x4.splat(x: i32) -> v128` -* `i64x2.splat(x: i64) -> v128` -* `f32x4.splat(x: f32) -> v128` -* `f64x2.splat(x: f64) -> v128` - -Construct a vector with `x` replicated to all lanes: - -```python -def S.splat(x): - result = S.New() - for i in range(S.Lanes): - result[i] = x - return result -``` - -## Accessing lanes - -### Extract lane as a scalar -* `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> boolean` -* `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> boolean` -* `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> boolean` -* `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> boolean` -* `i8x16.extractLane(a: v128, i: LaneIdx16) -> i8` -* `i16x8.extractLane(a: v128, i: LaneIdx8) -> i16` -* `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` -* `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` -* `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` -* `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` - -Extract the value of lane `i` in `a`. - -```python -def S.extractLane(a, i): - return a[i] -``` - -### Replace lane value -* `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: boolean) -> b8x16` -* `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: boolean) -> b16x8` -* `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: boolean) -> b32x4` -* `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: boolean) -> b64x2` -* `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i8) -> v128` -* `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i16) -> v128` -* `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` -* `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` -* `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` -* `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` - -Return a new vector with lanes identical to `a`, except for lane `i` which has -the value `x`. - -```python -def S.replaceLane(a, i, x): - result = S.New() - for j in range(S.Lanes): - result[j] = a[j] - result[i] = x - return result -``` - -### Lane-wise select -* `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` -* `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` -* `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` -* `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` - -Use a boolean vector to select lanes from two numerical vectors. - -```python -def S.select(s, t, f): - result = S.New() - for i in range(S.Lanes): - if s[i]: - result[i] = t[i] - else - result[i] = f[i] - return result -``` - -### Swizzle lanes -* `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` -* `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` -* `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` -* `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` - -Create vector with lanes rearranged: - -```python -def S.swizzle(a, s): - result = S.New() - for i in range(S.Lanes): - result[i] = a[s[i]] - return result -``` - -### Shuffle lanes -* `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` -* `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` -* `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` -* `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` - -Create vector with lanes selected from the lanes of two input vectors: - -```python -def S.shuffle(a, b, s): - result = S.New() - for i in range(S.Lanes): - if s[i] < S.lanes: - result[i] = a[s[i]] - else: - result[i] = b[s[i] - S.lanes] - return result -``` - -## Integer arithmetic - -Wrapping integer arithmetic discards the high bits of the result. - -```python -def S.Reduce(x): - bitmask = (1 << S.LaneBits) - 1 - return x & bitmask -``` - -There is no integer division operation provided here. This operation is not -commonly part of bit 128-bit SIMD ISAs. - -### Integer addition -* `i8x16.add(a: v128, b: v128) -> v128` -* `i16x8.add(a: v128, b: v128) -> v128` -* `i32x4.add(a: v128, b: v128) -> v128` -* `i64x2.add(a: v128, b: v128) -> v128` - -Lane-wise wrapping integer addition: - -```python -def S.add(a, b): - def add(x, y): - return S.Reduce(x + y) - return S.lanewise_binary(add, a, b) -``` - -### Integer subtraction -* `i8x16.sub(a: v128, b: v128) -> v128` -* `i16x8.sub(a: v128, b: v128) -> v128` -* `i32x4.sub(a: v128, b: v128) -> v128` -* `i64x2.sub(a: v128, b: v128) -> v128` - -Lane-wise wrapping integer subtraction: - -```python -def S.sub(a, b): - def sub(x, y): - return S.Reduce(x - y) - return S.lanewise_binary(sub, a, b) -``` - -### Integer multiplication -* `i8x16.mul(a: v128, b: v128) -> v128` -* `i16x8.mul(a: v128, b: v128) -> v128` -* `i32x4.mul(a: v128, b: v128) -> v128` -* `i64x2.mul(a: v128, b: v128) -> v128` - -Lane-wise wrapping integer multiplication: - -```python -def S.mul(a, b): - def mul(x, y): - return S.Reduce(x * y) - return S.lanewise_binary(mul, a, b) -``` - -### Integer negation -* `i8x16.neg(a: v128) -> v128` -* `i16x8.neg(a: v128) -> v128` -* `i32x4.neg(a: v128) -> v128` -* `i64x2.neg(a: v128) -> v128` - -Lane-wise wrapping integer negation. In wrapping arithmetic, `y = -x` is the -unique value such that `x + y == 0`. - -```python -def S.neg(a): - def neg(x): - return S.Reduce(-x) - return S.lanewise_unary(neg, a) -``` - -## Saturating integer arithmetic - -Saturating integer arithmetic behaves differently on signed and unsigned types. -It is only defined for 8-bit and 16-bit integer lanes. - -```python -def S.Saturate(x): - if x < S.Min: - return S.Min - if x > S.Max: - return S.Max - return x -``` - -### Saturating integer addition -* `s8x16.addSaturate(a: v128, b: v128) -> v128` -* `s16x8.addSaturate(a: v128, b: v128) -> v128` -* `u8x16.addSaturate(a: v128, b: v128) -> v128` -* `u16x8.addSaturate(a: v128, b: v128) -> v128` - -Lane-wise saturating addition: - -```python -def S.addSaturate(a, b): - def addsat(x, y): - return S.Saturate(x + y) - return S.lanewise_binary(addsat, a, b) -``` - -### Saturating integer subtraction -* `s8x16.subSaturate(a: v128, b: v128) -> v128` -* `s16x8.subSaturate(a: v128, b: v128) -> v128` -* `u8x16.subSaturate(a: v128, b: v128) -> v128` -* `u16x8.subSaturate(a: v128, b: v128) -> v128` - -Lane-wise saturating subtraction: - -```python -def S.subSaturate(a, b): - def subsat(x, y): - return S.Saturate(x - y) - return S.lanewise_binary(subsat, a, b) -``` - -## Bit shifts - -### Left shift by scalar -* `i8x16.shiftLeftByScalar(a: v128, y: i8) -> v128` -* `i16x8.shiftLeftByScalar(a: v128, y: i8) -> v128` -* `i32x4.shiftLeftByScalar(a: v128, y: i8) -> v128` -* `i64x2.shiftLeftByScalar(a: v128, y: i8) -> v128` - -Shift the bits in each lane to the left by the same amount. Only the low bits of -the shift amount are used: - -```python -def S.shiftLeftByScalar(a, x): - # Number of bits to shift: 0 .. S.LaneBits - 1. - amount = y mod S.LaneBits - def shift(x): - return S.Reduce(x << amount) - return S.lanewise_unary(shift, a) -``` - -### Right shift by scalar -* `s8x16.shiftRightByScalar(a: v128, y: i8) -> v128` -* `s16x8.shiftRightByScalar(a: v128, y: i8) -> v128` -* `s32x4.shiftRightByScalar(a: v128, y: i8) -> v128` -* `s64x2.shiftRightByScalar(a: v128, y: i8) -> v128` -* `u8x16.shiftRightByScalar(a: v128, y: i8) -> v128` -* `u16x8.shiftRightByScalar(a: v128, y: i8) -> v128` -* `u32x4.shiftRightByScalar(a: v128, y: i8) -> v128` -* `u64x2.shiftRightByScalar(a: v128, y: i8) -> v128` - -Shift the bits in each lane to the right by the same amount. This is an -arithmetic right shift for the signed integer interpretations and a logical -right shift for the unsigned integer interpretations. - -```python -def S.shiftRightByScalar(a, y): - # Number of bits to shift: 0 .. S.LaneBits - 1. - amount = y mod S.LaneBits - def shift(x): - return x >> amount - return S.lanewise_unary(shift, a) -``` - -## Logical operations - -The logical operations are defined on the boolean SIMD types. See also the -[Bitwise operations](#bitwise-operations) below. - -### Logical and -* `b8x16.and(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.and(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.and(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.and(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.and(a, b): - def logical_and(x, y): - return x and y - return S.lanewise_binary(logical_and, a, b) -``` - -### Logical or -* `b8x16.or(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.or(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.or(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.or(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.or(a, b): - def logical_or(x, y): - return x or y - return S.lanewise_binary(logical_or, a, b) -``` - -### Logical xor -* `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.xor(a, b): - def logical_xor(x, y): - return x xor y - return S.lanewise_binary(logical_xor, a, b) -``` - -### Logical not -* `b8x16.not(a: b8x16) -> b8x16` -* `b16x8.not(a: b16x8) -> b16x8` -* `b32x4.not(a: b32x4) -> b32x4` -* `b64x2.not(a: b64x2) -> b64x2` - -```python -def S.not(a): - def logical_not(x): - return not x - return S.lanewise_unary(logical_not, a) -``` - -## Bitwise operations - -The same logical operations defined on the boolean types are also available on -the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, and -`~` operators work on an `unsigned` type. - -* `v128.and(a: v128, b: v128) -> v128` -* `v128.or(a: v128, b: v128) -> v128` -* `v128.xor(a: v128, b: v128) -> v128` -* `v128.not(a: v128) -> v128` - -## Boolean horizontal reductions - -These operations reduce all the lanes of a boolean vector to a single scalar -boolean value. - -### Any lane true -* `b8x16.anyTrue(a: b8x16) -> boolean` -* `b16x8.anyTrue(a: b16x8) -> boolean` -* `b32x4.anyTrue(a: b32x4) -> boolean` -* `b64x2.anyTrue(a: b64x2) -> boolean` - -These functions return true if any lane in `a` is true. - -```python -def S.anyTrue(a): - for i in range(S.Lanes): - if a[i]: - return true - return false -``` - -### All lanes true -* `b8x16.allTrue(a: b8x16) -> boolean` -* `b16x8.allTrue(a: b16x8) -> boolean` -* `b32x4.allTrue(a: b32x4) -> boolean` -* `b64x2.allTrue(a: b64x2) -> boolean` - -These functions return true if all lanes in `a` are true. - -```python -def S.allTrue(a): - for i in range(S.Lanes): - if not a[i]: - return false - return true -``` - -## Comparisons - -The comparison operations all compare two vectors lane-wise, and produce a -boolean vector with the same number of lanes as the input interpretation. - -### Equality -* `i8x16.equal(a: v128, b: v128) -> b8x16` -* `i16x8.equal(a: v128, b: v128) -> b16x8` -* `i32x4.equal(a: v128, b: v128) -> b32x4` -* `i64x2.equal(a: v128, b: v128) -> b64x2` -* `f32x4.equal(a: v128, b: v128) -> b32x4` -* `f64x2.equal(a: v128, b: v128) -> b64x2` - -Integer equality is independent of the signed/unsigned interpretation. Floating -point equality follows IEEE semantics, so a NaN lane compares not equal with -anything, including itself, and +0.0 is equal to -0.0: - -```python -def S.equal(a, b): - def eq(x, y): - return x == y - return S.lanewise_comparison(eq, a, b) -``` - -### Non-equality -* `i8x16.notEqual(a: v128, b: v128) -> b8x16` -* `i16x8.notEqual(a: v128, b: v128) -> b16x8` -* `i32x4.notEqual(a: v128, b: v128) -> b32x4` -* `i64x2.notEqual(a: v128, b: v128) -> b64x2` -* `f32x4.notEqual(a: v128, b: v128) -> b32x4` -* `f64x2.notEqual(a: v128, b: v128) -> b64x2` - -The `notEqual` operations produce the inverse of their `equal` counterparts: - -```python -def S.notEqual(a, b): - def ne(x, y): - return x != y - return S.lanewise_comparison(ne, a, b) -``` - -### Less than -* `s8x16.lessThan(a: v128, b: v128) -> b8x16` -* `s16x8.lessThan(a: v128, b: v128) -> b16x8` -* `s32x4.lessThan(a: v128, b: v128) -> b32x4` -* `s64x2.lessThan(a: v128, b: v128) -> b64x2` -* `u8x16.lessThan(a: v128, b: v128) -> b8x16` -* `u16x8.lessThan(a: v128, b: v128) -> b16x8` -* `u32x4.lessThan(a: v128, b: v128) -> b32x4` -* `u64x2.lessThan(a: v128, b: v128) -> b64x2` -* `f32x4.lessThan(a: v128, b: v128) -> b32x4` -* `f64x2.lessThan(a: v128, b: v128) -> b64x2` - -Integer magnitude comparisons depend on the signed/unsigned interpretation of -the lanes. Floating point comparisons follow IEEE semantics: - -```python -def S.lessThan(a, b): - def lt(x, y): - return x < y - return S.lanewise_comparison(lt, a, b) -``` - -### Less than or equal -* `s8x16.lessThanOrEqual(a: v128, b: v128) -> b8x16` -* `s16x8.lessThanOrEqual(a: v128, b: v128) -> b16x8` -* `s32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` -* `s64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` -* `u8x16.lessThanOrEqual(a: v128, b: v128) -> b8x16` -* `u16x8.lessThanOrEqual(a: v128, b: v128) -> b16x8` -* `u32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` -* `u64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` -* `f32x4.lessThanOrEqual(a: v128, b: v128) -> b32x4` -* `f64x2.lessThanOrEqual(a: v128, b: v128) -> b64x2` - -```python -def S.lessThanOrEqual(a, b): - def le(x, y): - return x <= y - return S.lanewise_comparison(le, a, b) -``` - -### Greater than -* `s8x16.greaterThan(a: v128, b: v128) -> b8x16` -* `s16x8.greaterThan(a: v128, b: v128) -> b16x8` -* `s32x4.greaterThan(a: v128, b: v128) -> b32x4` -* `s64x2.greaterThan(a: v128, b: v128) -> b64x2` -* `u8x16.greaterThan(a: v128, b: v128) -> b8x16` -* `u16x8.greaterThan(a: v128, b: v128) -> b16x8` -* `u32x4.greaterThan(a: v128, b: v128) -> b32x4` -* `u64x2.greaterThan(a: v128, b: v128) -> b64x2` -* `f32x4.greaterThan(a: v128, b: v128) -> b32x4` -* `f64x2.greaterThan(a: v128, b: v128) -> b64x2` - -```python -def S.greaterThan(a, b): - def gt(x, y): - return x > y - return S.lanewise_comparison(gt, a, b) -``` - -### Greater than or equal -* `s8x16.greaterThanOrEqual(a: v128, b: v128) -> b8x16` -* `s16x8.greaterThanOrEqual(a: v128, b: v128) -> b16x8` -* `s32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` -* `s64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` -* `u8x16.greaterThanOrEqual(a: v128, b: v128) -> b8x16` -* `u16x8.greaterThanOrEqual(a: v128, b: v128) -> b16x8` -* `u32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` -* `u64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` -* `f32x4.greaterThanOrEqual(a: v128, b: v128) -> b32x4` -* `f64x2.greaterThanOrEqual(a: v128, b: v128) -> b64x2` - -```python -def S.greaterThanOrEqual(a, b): - def ge(x, y): - return x >= y - return S.lanewise_comparison(ge, a, b) -``` - -## Load and store - -Load and store operations are provided for `v128` vectors, but not for the -boolean vectors; we don't want to impose a bitwise representation of the boolean -vectors. - -The memory operations work on an abstract `Buffer` instance which can be -addressed by a `ByteOffset` type. Unaligned memory operations are allowed, but -they may be slower than aligned operations. - -This specification does not address bounds checking and trap handling for memory -operations. It is assumed that the range `addr .. addr+15` are valid offsets in -the buffer, and that computing `addr+15` does not overflow the `ByteOffset` -type. Bounds checking should be handled by the embedding specification. - -### Load - -* `v8x16.load(mem: Buffer, addr: ByteOffset) -> v128` -* `v16x8.load(mem: Buffer, addr: ByteOffset) -> v128` -* `v32x4.load(mem: Buffer, addr: ByteOffset) -> v128` -* `v64x2.load(mem: Buffer, addr: ByteOffset) -> v128` - -Load a `v128` vector from the given buffer and offset. - -```python -def S.load(mem, addr): - assert mem.in_range(addr, 16) - result = S.New() - lane_bytes = S.LaneBits / 8 - for i in range(S.Lanes): - result[i] = mem.load(S.LaneBits, addr + i * lane_bytes) - return result -``` - -### Store - -* `v8x16.store(mem: Buffer, addr: ByteOffset, data: v128)` -* `v16x8.store(mem: Buffer, addr: ByteOffset, data: v128)` -* `v32x4.store(mem: Buffer, addr: ByteOffset, data: v128)` -* `v64x2.store(mem: Buffer, addr: ByteOffset, data: v128)` - -Store a `v128` vector to the given buffer and offset. - -```python -def S.store(mem, addr, data): - assert mem.in_range(addr, 16) - lane_bytes = S.LaneBits / 8 - for i in range(S.Lanes): - mem.store(S.LaneBits, addr + i * lane_bytes, data[i]) -``` - -### Byte order and lane numbering - -The lane-wise load and store operations used above will read and write a lane -using the native byte order, so for example storing a vector with the `i32x4` -interpretation is equivalent to storing 4 `i32` values to memory. This -specification has some hard requirements for the lane and bit numbering: - -- The bits in a `v128` are numbered 0-127. -- Lanes are numbered in the same direction as the `v128` bits. -- Lanes are stored in memory in ascending addresses, so lane 0 gets the lowest - address. - -These hard requirements still leave multiple ways of mapping byte order to -vectors: - -- **Little-endian direct**: The bit with the lowest number in each lane is the - *least* significant bit. This is the natural mapping for Intel SSE and the - little-endian modes of ARM NEON and MIPS MSA. - -- **Big-endian direct**: The bit with the lowest number in each lane is the *most* - significant bit. This is the natural mapping for big-endian PowerPC. - -- **Big-endian hybrid**: The bit with the lowest number in each lane is the - *least* significant bit. This is the natural mapping for the big-endian modes - of ARM NEON and MIPS MSA. - -The mapping is visible when reinterpreting a vector: - -```python -a = i64x2.build([0x0123456789abcdef, 0x1122334455667788]) -x = i8x16.extractLane(a, 0) -``` - -The extracted lane, `x`, will be `0xef` in the little-endian direct and the -big-endian hybrid mappings, but `0x01` in the big-endian direct mapping. - -The big-endian hybrid mapping requires separate load and store instructions for -each lane width, while the direct mappings can use the same instruction for all -vectors. For example, the `a` vector above will be stored like this with the -big-endian hybrid mapping: - -``` -v64x2.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 -v32x4.store: 89 ab cd ef 01 23 45 67 55 66 77 88 11 22 33 44 -v16x8.store: cd ef 89 ab 45 67 01 23 77 88 55 66 33 44 11 22 -v8x16.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 -``` - -The big-endian direct mapping would write `a` like this: - -``` -v64x2.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 -v32x4.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 -v16x8.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 -v8x16.store: 01 23 45 67 89 ab cd ef 11 22 33 44 55 66 77 88 -``` - -The little-endian direct mapping would write `a` like this: - -``` -v64x2.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 -v32x4.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 -v16x8.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 -v8x16.store: ef cd ab 89 67 45 23 01 88 77 66 55 44 33 22 11 -``` - -This specification doesn't address type conversions since there is only one -type, `v128`, but note that it is common for more fine-grained SIMD type systems -to specify 'bit casts' between different SIMD types of the same size as -equivalent to storing one type and loading another from the same address. Both -LLVM and SIMD.js specify bit casts that way. LLVM's ARM and MIPS targets use the -hybrid lane mapping in their big-endian modes and translate `bitcast` -instructions to shuffles. - -It would be possible for SIMD.js to use the big-endian direct mapping on ARM and -MIPS by numbering the lanes differently and using the `64x2` load/store -instructions for all memory operations. It would also be possible to use the -big-endian hybrid mapping by expanding bit casts into shuffles. - -WebAssembly is little-endian only. - -### Partial load - -* `v32x4.load1(mem: Buffer, addr: ByteOffset) -> v128` -* `v32x4.load2(mem: Buffer, addr: ByteOffset) -> v128` -* `v32x4.load3(mem: Buffer, addr: ByteOffset) -> v128` - -These functions load the first 1, 2, or 3 lanes from a buffer and sets the -remaining lanes to all zeroes. The partial loads are only defined for 4-lane -interpretations. - -```python -def partial_load(mem, addr, lanes): - result = v32x4.splat(0) - for i in range(lanes): - result[i] = mem.load(32, addr + i * 4) - return result - -def v32x4.load1(mem, addr): - assert mem.in_range(addr, 4) - return partial_load(mem, addr, 1) - -def v32x4.load2(mem, addr): - assert mem.in_range(addr, 8) - return partial_load(mem, addr, 2) - -def v32x4.load3(mem, addr): - assert mem.in_range(addr, 12) - return partial_load(mem, addr, 3) -``` - -### Partial store - -* `v32x4.store1(mem: Buffer, addr: ByteOffset, data: v128)` -* `v32x4.store2(mem: Buffer, addr: ByteOffset, data: v128)` -* `v32x4.store3(mem: Buffer, addr: ByteOffset, data: v128)` - -These functions store the first 1, 2, or 3 lanes to a buffer. They are only -defined for the 4-lane interpretations. - -```python -def partial_store(mem, addr, data, lanes): - for i in range(lanes): - mem.store(32, addr + i * 4, data[i]) - -def v32x4.store1(mem, addr, data): - assert mem.in_range(addr, 4) - partial_store(mem, addr, data, 1) - -def v32x4.store2(mem, addr, data): - assert mem.in_range(addr, 8) - partial_store(mem, addr, data, 2) - -def v32x4.store3(mem, addr, data): - assert mem.in_range(addr, 12) - partial_store(mem, addr, data, 3) -``` - -## Floating-point sign bit operations - -These floating point operations are simple manipulations of the sign bit. No -changes are made to the exponent or trailing significand bits, even for NaN -inputs. - -### Negation -* `f32x4.neg(a: v128) -> v128` -* `f64x2.neg(a: v128) -> v128` - -Apply the IEEE `negate(x)` function to each lane. This simply inverts the sign -bit, preserving all other bits. - -```python -def S.neg(a): - return S.lanewise_unary(ieee.negate, a) -``` - -### Absolute value -* `f32x4.abs(a: v128) -> v128` -* `f64x2.abs(a: v128) -> v128` - -Apply the IEEE `abs(x)` function to each lane. This simply clears the sign bit, -preserving all other bits. - -```python -def S.abs(a): - return S.lanewise_unary(ieee.abs, a) -``` - -## Floating-point min and max - -These operations are not part of the IEEE 754-2008 standard. Notably, the -`minNum` and `maxNum` operations defined here behave differently than the IEEE -`minNum` and `maxNum` operations when one operand is a signaling NaN. - -The minimum and maximum value of +0 and -0 is computed as if -0 < +0. - -### NaN-propagating minimum -* `f32x4.min(a: v128, b: v128) -> v128` -* `f64x2.min(a: v128, b: v128) -> v128` - -Lane-wise minimum value, propagating NaNs: - -```python -def S.min(a, b): - def min(x, y): - if isnan(x) or isnan(y): - return propagate_nan(x, y) - # Prefer -0 for min(-0, +0) and min(+0, -0). - if x == 0 and y == 0 and signbit(x) != signbit(y): - return -0.0 - if x < y: - return x - else: - return y - return S.lanewise_binary(min, a, b) -``` - -### NaN-propagating maximum -* `f32x4.max(a: v128, b: v128) -> v128` -* `f64x2.max(a: v128, b: v128) -> v128` - -Lane-wise maximum value, propagating NaNs: - -```python -def S.max(a, b): - def max(x, y): - if isnan(x) or isnan(y): - return propagate_nan(x, y) - # Prefer +0 for max(-0, +0) and max(+0, -0). - if x == 0 and y == 0 and signbit(x) != signbit(y): - return +0.0 - if x > y: - return x - else: - return y - return S.lanewise_binary(max, a, b) -``` - -### NaN-suppressing minimum -* `f32x4.minNum(a: v128, b: v128) -> v128` -* `f64x2.minNum(a: v128, b: v128) -> v128` - -Lane-wise minimum value, suppressing single NaNs: - -```python -def S.minNum(a, b): - def minNum(x, y): - if isnan(x) and isnan(y): - return propagate_nan(x, y) - if isnan(x): - return y - if isnan(y): - return x - # Prefer -0 for min(-0, +0) and min(+0, -0). - if x == 0 and y == 0 and signbit(x) != signbit(y): - return -0.0 - if x < y: - return x - else: - return y - return S.lanewise_binary(minNum, a, b) -``` - -Note that this function behaves differently than the IEEE 754 `minNum` function -when one of the operands is a signaling NaN. - -### NaN-suppressing maximum -* `f32x4.maxNum(a: v128, b: v128) -> v128` -* `f64x2.maxNum(a: v128, b: v128) -> v128` - -Lane-wise maximum value, suppressing single NaNs: - -```python -def S.maxNum(a, b): - def maxNum(a, b): - if isnan(x) and isnan(y): - return propagate_nan(x, y) - if isnan(x): - return y - if isnan(y): - return x - # Prefer +0 for max(-0, +0) and max(+0, -0). - if x == 0 and y == 0 and signbit(x) != signbit(y): - return +0.0 - if x > y: - return x - else: - return y - return S.lanewise_binary(maxNum, a, b) -``` - -Note that this function behaves differently than the IEEE 754 `maxNum` function -when one of the operands is a signaling NaN. - -## Floating-point arithmetic - -The floating-point arithmetic operations handle NaNs more strictly specified -than the IEEE standard: - -```python -def wrap_fp_unary(func): - def wrapped(x): - if isnan(x): - return canonicalize_nan(x) - result = func(x) - if isnan(result): - return type(result).default_nan() - else: - return result - return wrapped - -def wrap_fp_binary(func): - def wrapped(x, y): - if isnan(x) or isnan(y): - return propagate_nan(x, y) - result = func(x, y) - if isnan(result): - return type(result).default_nan() - else: - return result - return wrapped -``` - -### Addition -* `f32x4.add(a: v128, b: v128) -> v128` -* `f64x2.add(a: v128, b: v128) -> v128` - -Lane-wise IEEE `addition`. - -```python -def S.add(a, b): - return S.lanewise_binary(wrap_fp_binary(ieee.addition), a, b) -``` - -### Subtraction -* `f32x4.sub(a: v128, b: v128) -> v128` -* `f64x2.sub(a: v128, b: v128) -> v128` - -Lane-wise IEEE `subtraction`. - -```python -def S.sub(a, b): - return S.lanewise_binary(wrap_fp_binary(ieee.subtraction), a, b) -``` - -### Division -* `f32x4.div(a: v128, b: v128) -> v128` -* `f64x2.div(a: v128, b: v128) -> v128` - -Lane-wise IEEE `division`. - -```python -def S.div(a, b): - return S.lanewise_binary(wrap_fp_binary(ieee.division), a, b) -``` - -### Multiplication -* `f32x4.mul(a: v128, b: v128) -> v128` -* `f64x2.mul(a: v128, b: v128) -> v128` - -Lane-wise IEEE `multiplication`. - -```python -def S.mul(a, b): - return S.lanewise_binary(wrap_fp_binary(ieee.multiplication), a, b) -``` - -### Square root -* `f32x4.sqrt(a: v128) -> v128` -* `f64x2.sqrt(a: v128) -> v128` - -Lane-wise IEEE `squareRoot`. - -```python -def S.sqrt(a): - return S.lanewise_unary(wrap_fp_unary(ieee.squareRoot), a) -``` - -### Reciprocal approximation -* `f32x4.reciprocalApproximation(a: v128) -> v128` -* `f64x2.reciprocalApproximation(a: v128) -> v128` - -Implementation-dependent approximation to the reciprocal. - -```python -def S.reciprocalApproximation(a): - def recip_approx(x): - if isnan(x): - return canonicalize_nan(x) - if x == 0.0: - # +0.0 -> +Inf, -0.0 -> -Inf. - return 1/x - if isinf(x): - # +Inf -> +0.0, -Inf -> -0.0. - return 1/x - # The exact nature of the approximation is unspecified. - return implementation_dependent(x) - return S.lanewise_unary(recip_approx, a) -``` - -### Reciprocal square root approximation -* `f32x4.reciprocalSqrtApproximation(a: v128) -> v128` -* `f64x2.reciprocalSqrtApproximation(a: v128) -> v128` - -Implementation-dependent approximation to the reciprocal of the square root. - -```python -def S.reciprocalSqrtApproximation(a): - def recip_sqrt_approx(x): - if isnan(x): - return canonicalize_nan(x) - if x == 0: - # +0.0 -> +Inf, -0.0 -> -Inf. - return 1/x - if isinf(x): - # +Inf -> +0.0, -Inf -> -0.0. - return 1/x - # The exact nature of the approximation is unspecified. - return implementation_dependent(x) - return S.lanewise_unary(recip_sqrt_approx, a) -``` - -## Conversions -### Integer to floating point -* `f32x4.fromSignedInt(a: v128) -> v128` -* `f64x2.fromSignedInt(a: v128) -> v128` -* `f32x4.fromUnsignedInt(a: v128) -> v128` -* `f64x2.fromUnsignedInt(a: v128) -> v128` - -Lane-wise conversion from integer to floating point. Some integer values will be -rounded. - -```python -def S.fromSignedInt(a): - def convert(x): - return S.LaneType.convertFromInt(x) - return S.lanewise_unary(convert, a) - -def S.fromUnsignedInt(a): - def convert(x): - return S.LaneType.convertFromInt(x) - return S.lanewise_unary(convert, a) -``` - -### Floating point to integer -* `s32x4.fromFloat(a: v128) -> (result: v128, fail: boolean)` -* `s64x2.fromFloat(a: v128) -> (result: v128, fail: boolean)` -* `u32x4.fromFloat(a: v128) -> (result: v128, fail: boolean)` -* `u64x2.fromFloat(a: v128) -> (result: v128, fail: boolean)` - -Lane-wise conversion from floating point to integer using the IEEE -`convertToIntegerTowardZero` function. If any lane is a NaN or the rounded -integer value is outside the range of the destination type, return `fail = true` -and an unspecified `result`. - -```python -def S.fromFloat(a): - result = S.New() - fail = false - for i in range(S.Lanes): - r = ieee.roundToIntegralTowardZero(a[i]) - if isnan(r): - fail = true - elif S.Min <= r and r <= S.Max: - result[i] = r - else: - fail = true - if fail: - return (unspecified(), true) - else - return (result, false) -``` - -[wasm]: https://webassembly.github.io/ (WebAssembly) -[simdjs]: http://tc39.github.io/ecmascript_simd/ (SIMD.js specification) -[ieee754]: https://standards.ieee.org/findstds/standard/754-2008.html (754-2008 - IEEE Standard for Floating-Point Arithmetic) diff --git a/proposals/simd/webassembly-opcodes.md b/proposals/simd/webassembly-opcodes.md deleted file mode 100644 index 91fb6f721e..0000000000 --- a/proposals/simd/webassembly-opcodes.md +++ /dev/null @@ -1,275 +0,0 @@ -# WebAssembly SIMD operations - -The SIMD operations are grouped according to the interpretation of the input -and output vectors: - -| Shape | Int | Float | Bool | -|:-----:|:---:|:-----:|:----:| -| [v8x16](#v8x16-operations) | [i8x16](#i8x16-operations) | - | [b8x16](#b8x16-operations) | -| [v16x8](#v16x8-operations) | [i16x8](#i16x8-operations) | - | [b16x8](#b16x8-operations) | -| [v32x4](#v32x4-operations) | [i32x4](#i32x4-operations) | [f32x4](#f32x4-operations) | [b32x4](#b32x4-operations) | -| [v64x2](#v64x2-operations) | [i64x2](#i64x2-operations) | [f64x2](#f64x2-operations) | [b64x2](#b64x2-operations) | - -## `v128` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `v128.and(a: v128, b: v128) -> v128` | [v128.and](portable-simd.md#bitwise-operations) | -| `v128.or(a: v128, b: v128) -> v128` | [v128.or](portable-simd.md#bitwise-operations) | -| `v128.xor(a: v128, b: v128) -> v128` | [v128.xor](portable-simd.md#bitwise-operations) | -| `v128.not(a: v128) -> v128` | [v128.not](portable-simd.md#bitwise-operations) | -| `v128.load(addr, offset) -> v128` | [v128.load](portable-simd.md#load) | -| `v128.store(addr, offset, data: v128)` | [v128.store](portable-simd.md#store) | - -## `v8x16` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` | [v8x16.select](portable-simd.md#lane-wise-select) | -| `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` | [v8x16.swizzle](portable-simd.md#swizzle-lanes) | -| `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` | [v8x16.shuffle](portable-simd.md#shuffle-lanes) | - -## `i8x16` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `i8x16.build(x: i32[16]) -> v128` | [i8x16.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i8x16.splat(x: i32) -> v128` | [i8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` | [i8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i32) -> v128` | [i8x16.replaceLane](portable-simd.md#replace-lane-value) | -| `i8x16.add(a: v128, b: v128) -> v128` | [i8x16.add](portable-simd.md#integer-addition) | -| `i8x16.sub(a: v128, b: v128) -> v128` | [i8x16.sub](portable-simd.md#integer-subtraction) | -| `i8x16.mul(a: v128, b: v128) -> v128` | [i8x16.mul](portable-simd.md#integer-multiplication) | -| `i8x16.neg(a: v128) -> v128` | [i8x16.neg](portable-simd.md#integer-negation) | -| `i8x16.addSaturate_s(a: v128, b: v128) -> v128` | [s8x16.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i8x16.addSaturate_u(a: v128, b: v128) -> v128` | [u8x16.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i8x16.subSaturate_s(a: v128, b: v128) -> v128` | [s8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i8x16.subSaturate_u(a: v128, b: v128) -> v128` | [u8x16.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i8x16.shl(a: v128, y: i32) -> v128` | [i8x16.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i8x16.shr_s(a: v128, y: i32) -> v128` | [s8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i8x16.shr_u(a: v128, y: i32) -> v128` | [u8x16.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i8x16.eq(a: v128, b: v128) -> b8x16` | [i8x16.equal](portable-simd.md#equality) | -| `i8x16.ne(a: v128, b: v128) -> b8x16` | [i8x16.notEqual](portable-simd.md#non-equality) | -| `i8x16.lt_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThan](portable-simd.md#less-than) | -| `i8x16.lt_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThan](portable-simd.md#less-than) | -| `i8x16.le_s(a: v128, b: v128) -> b8x16` | [s8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i8x16.le_u(a: v128, b: v128) -> b8x16` | [u8x16.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i8x16.gt_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThan](portable-simd.md#greater-than) | -| `i8x16.gt_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThan](portable-simd.md#greater-than) | -| `i8x16.ge_s(a: v128, b: v128) -> b8x16` | [s8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i8x16.ge_u(a: v128, b: v128) -> b8x16` | [u8x16.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | - -## `v16x8` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` | [v16x8.select](portable-simd.md#lane-wise-select) | -| `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` | [v16x8.swizzle](portable-simd.md#swizzle-lanes) | -| `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` | [v16x8.shuffle](portable-simd.md#shuffle-lanes) | - -## `i16x8` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `i16x8.build(x: i32[8]) -> v128` | [i16x8.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i16x8.splat(x: i32) -> v128` | [i16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` | [i16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i32) -> v128` | [i16x8.replaceLane](portable-simd.md#replace-lane-value) | -| `i16x8.add(a: v128, b: v128) -> v128` | [i16x8.add](portable-simd.md#integer-addition) | -| `i16x8.sub(a: v128, b: v128) -> v128` | [i16x8.sub](portable-simd.md#integer-subtraction) | -| `i16x8.mul(a: v128, b: v128) -> v128` | [i16x8.mul](portable-simd.md#integer-multiplication) | -| `i16x8.neg(a: v128) -> v128` | [i16x8.neg](portable-simd.md#integer-negation) | -| `i16x8.addSaturate_s(a: v128, b: v128) -> v128` | [s16x8.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i16x8.addSaturate_u(a: v128, b: v128) -> v128` | [u16x8.addSaturate](portable-simd.md#saturating-integer-addition) | -| `i16x8.subSaturate_s(a: v128, b: v128) -> v128` | [s16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i16x8.subSaturate_u(a: v128, b: v128) -> v128` | [u16x8.subSaturate](portable-simd.md#saturating-integer-subtraction) | -| `i16x8.shl(a: v128, y: i32) -> v128` | [i16x8.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i16x8.shr_s(a: v128, y: i32) -> v128` | [s16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i16x8.shr_u(a: v128, y: i32) -> v128` | [u16x8.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i16x8.eq(a: v128, b: v128) -> b16x8` | [i16x8.equal](portable-simd.md#equality) | -| `i16x8.ne(a: v128, b: v128) -> b16x8` | [i16x8.notEqual](portable-simd.md#non-equality) | -| `i16x8.lt_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThan](portable-simd.md#less-than) | -| `i16x8.lt_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThan](portable-simd.md#less-than) | -| `i16x8.le_s(a: v128, b: v128) -> b16x8` | [s16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i16x8.le_u(a: v128, b: v128) -> b16x8` | [u16x8.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i16x8.gt_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThan](portable-simd.md#greater-than) | -| `i16x8.gt_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThan](portable-simd.md#greater-than) | -| `i16x8.ge_s(a: v128, b: v128) -> b16x8` | [s16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i16x8.ge_u(a: v128, b: v128) -> b16x8` | [u16x8.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | - -## `v32x4` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` | [v32x4.select](portable-simd.md#lane-wise-select) | -| `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` | [v32x4.swizzle](portable-simd.md#swizzle-lanes) | -| `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` | [v32x4.shuffle](portable-simd.md#shuffle-lanes) | -| `v32x4.load1(addr, offset) -> v128` | [v32x4.load1](portable-simd.md#partial-load) | -| `v32x4.load2(addr, offset) -> v128` | [v32x4.load2](portable-simd.md#partial-load) | -| `v32x4.load3(addr, offset) -> v128` | [v32x4.load3](portable-simd.md#partial-load) | -| `v32x4.store1(addr, offset, data: v128)` | [v32x4.store1](portable-simd.md#partial-store) | -| `v32x4.store2(addr, offset, data: v128)` | [v32x4.store2](portable-simd.md#partial-store) | -| `v32x4.store3(addr, offset, data: v128)` | [v32x4.store3](portable-simd.md#partial-store) | - -## `i32x4` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `i32x4.build(x: i32[4]) -> v128` | [i32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i32x4.splat(x: i32) -> v128` | [i32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` | [i32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` | [i32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `i32x4.add(a: v128, b: v128) -> v128` | [i32x4.add](portable-simd.md#integer-addition) | -| `i32x4.sub(a: v128, b: v128) -> v128` | [i32x4.sub](portable-simd.md#integer-subtraction) | -| `i32x4.mul(a: v128, b: v128) -> v128` | [i32x4.mul](portable-simd.md#integer-multiplication) | -| `i32x4.neg(a: v128) -> v128` | [i32x4.neg](portable-simd.md#integer-negation) | -| `i32x4.shl(a: v128, y: i32) -> v128` | [i32x4.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i32x4.shr_s(a: v128, y: i32) -> v128` | [s32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i32x4.shr_u(a: v128, y: i32) -> v128` | [u32x4.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i32x4.eq(a: v128, b: v128) -> b32x4` | [i32x4.equal](portable-simd.md#equality) | -| `i32x4.ne(a: v128, b: v128) -> b32x4` | [i32x4.notEqual](portable-simd.md#non-equality) | -| `i32x4.lt_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThan](portable-simd.md#less-than) | -| `i32x4.lt_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThan](portable-simd.md#less-than) | -| `i32x4.le_s(a: v128, b: v128) -> b32x4` | [s32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i32x4.le_u(a: v128, b: v128) -> b32x4` | [u32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i32x4.gt_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThan](portable-simd.md#greater-than) | -| `i32x4.gt_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThan](portable-simd.md#greater-than) | -| `i32x4.ge_s(a: v128, b: v128) -> b32x4` | [s32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i32x4.ge_u(a: v128, b: v128) -> b32x4` | [u32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i32x4.trunc_s/f32x4(a: v128) -> v128` | [s32x4.fromFloat](portable-simd.md#floating-point-to-integer) | -| `i32x4.trunc_u/f32x4(a: v128) -> v128` | [u32x4.fromFloat](portable-simd.md#floating-point-to-integer) | - -## `f32x4` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `f32x4.build(x: f32[4]) -> v128` | [f32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `f32x4.splat(x: f32) -> v128` | [f32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` | [f32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` | [f32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `f32x4.add(a: v128, b: v128) -> v128` | [f32x4.add](portable-simd.md#addition) | -| `f32x4.sub(a: v128, b: v128) -> v128` | [f32x4.sub](portable-simd.md#subtraction) | -| `f32x4.mul(a: v128, b: v128) -> v128` | [f32x4.mul](portable-simd.md#multiplication) | -| `f32x4.neg(a: v128) -> v128` | [f32x4.neg](portable-simd.md#negation) | -| `f32x4.eq(a: v128, b: v128) -> b32x4` | [f32x4.equal](portable-simd.md#equality) | -| `f32x4.ne(a: v128, b: v128) -> b32x4` | [f32x4.notEqual](portable-simd.md#non-equality) | -| `f32x4.lt(a: v128, b: v128) -> b32x4` | [f32x4.lessThan](portable-simd.md#less-than) | -| `f32x4.le(a: v128, b: v128) -> b32x4` | [f32x4.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `f32x4.gt(a: v128, b: v128) -> b32x4` | [f32x4.greaterThan](portable-simd.md#greater-than) | -| `f32x4.ge(a: v128, b: v128) -> b32x4` | [f32x4.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `f32x4.abs(a: v128) -> v128` | [f32x4.abs](portable-simd.md#absolute-value) | -| `f32x4.min(a: v128, b: v128) -> v128` | [f32x4.min](portable-simd.md#nan-propagating-minimum) | -| `f32x4.max(a: v128, b: v128) -> v128` | [f32x4.max](portable-simd.md#nan-propagating-maximum) | -| `f32x4.div(a: v128, b: v128) -> v128` | [f32x4.div](portable-simd.md#division) | -| `f32x4.sqrt(a: v128) -> v128` | [f32x4.sqrt](portable-simd.md#square-root) | -| `f32x4.convert_s/i32x4(a: v128) -> v128` | [f32x4.fromSignedInt](portable-simd.md#integer-to-floating-point) | -| `f32x4.convert_u/i32x4(a: v128) -> v128` | [f32x4.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | - -## `v64x2` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` | [v64x2.select](portable-simd.md#lane-wise-select) | -| `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` | [v64x2.swizzle](portable-simd.md#swizzle-lanes) | -| `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` | [v64x2.shuffle](portable-simd.md#shuffle-lanes) | - -## `i64x2` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `i64x2.build(x: i64[2]) -> v128` | [i64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `i64x2.splat(x: i64) -> v128` | [i64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` | [i64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` | [i64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `i64x2.add(a: v128, b: v128) -> v128` | [i64x2.add](portable-simd.md#integer-addition) | -| `i64x2.sub(a: v128, b: v128) -> v128` | [i64x2.sub](portable-simd.md#integer-subtraction) | -| `i64x2.mul(a: v128, b: v128) -> v128` | [i64x2.mul](portable-simd.md#integer-multiplication) | -| `i64x2.neg(a: v128) -> v128` | [i64x2.neg](portable-simd.md#integer-negation) | -| `i64x2.shl(a: v128, y: i32) -> v128` | [i64x2.shiftLeftByScalar](portable-simd.md#left-shift-by-scalar) | -| `i64x2.shr_s(a: v128, y: i32) -> v128` | [s64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i64x2.shr_u(a: v128, y: i32) -> v128` | [u64x2.shiftRightByScalar](portable-simd.md#right-shift-by-scalar) | -| `i64x2.eq(a: v128, b: v128) -> b64x2` | [i64x2.equal](portable-simd.md#equality) | -| `i64x2.ne(a: v128, b: v128) -> b64x2` | [i64x2.notEqual](portable-simd.md#non-equality) | -| `i64x2.lt_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThan](portable-simd.md#less-than) | -| `i64x2.lt_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThan](portable-simd.md#less-than) | -| `i64x2.le_s(a: v128, b: v128) -> b64x2` | [s64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i64x2.le_u(a: v128, b: v128) -> b64x2` | [u64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `i64x2.gt_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThan](portable-simd.md#greater-than) | -| `i64x2.gt_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThan](portable-simd.md#greater-than) | -| `i64x2.ge_s(a: v128, b: v128) -> b64x2` | [s64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i64x2.ge_u(a: v128, b: v128) -> b64x2` | [u64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `i64x2.trunc_s/f64x2(a: v128) -> v128` | [s64x2.fromFloat](portable-simd.md#floating-point-to-integer) | -| `i64x2.trunc_u/f64x2(a: v128) -> v128` | [u64x2.fromFloat](portable-simd.md#floating-point-to-integer) | - -## `f64x2` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `f64x2.build(x: f64[2]) -> v128` | [f64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `f64x2.splat(x: f64) -> v128` | [f64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` | [f64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` | [f64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `f64x2.add(a: v128, b: v128) -> v128` | [f64x2.add](portable-simd.md#addition) | -| `f64x2.sub(a: v128, b: v128) -> v128` | [f64x2.sub](portable-simd.md#subtraction) | -| `f64x2.mul(a: v128, b: v128) -> v128` | [f64x2.mul](portable-simd.md#multiplication) | -| `f64x2.neg(a: v128) -> v128` | [f64x2.neg](portable-simd.md#negation) | -| `f64x2.eq(a: v128, b: v128) -> b64x2` | [f64x2.equal](portable-simd.md#equality) | -| `f64x2.ne(a: v128, b: v128) -> b64x2` | [f64x2.notEqual](portable-simd.md#non-equality) | -| `f64x2.lt(a: v128, b: v128) -> b64x2` | [f64x2.lessThan](portable-simd.md#less-than) | -| `f64x2.le(a: v128, b: v128) -> b64x2` | [f64x2.lessThanOrEqual](portable-simd.md#less-than-or-equal) | -| `f64x2.gt(a: v128, b: v128) -> b64x2` | [f64x2.greaterThan](portable-simd.md#greater-than) | -| `f64x2.ge(a: v128, b: v128) -> b64x2` | [f64x2.greaterThanOrEqual](portable-simd.md#greater-than-or-equal) | -| `f64x2.abs(a: v128) -> v128` | [f64x2.abs](portable-simd.md#absolute-value) | -| `f64x2.min(a: v128, b: v128) -> v128` | [f64x2.min](portable-simd.md#nan-propagating-minimum) | -| `f64x2.max(a: v128, b: v128) -> v128` | [f64x2.max](portable-simd.md#nan-propagating-maximum) | -| `f64x2.div(a: v128, b: v128) -> v128` | [f64x2.div](portable-simd.md#division) | -| `f64x2.sqrt(a: v128) -> v128` | [f64x2.sqrt](portable-simd.md#square-root) | -| `f64x2.convert_s/i64x2(a: v128) -> v128` | [f64x2.fromSignedInt](portable-simd.md#integer-to-floating-point) | -| `f64x2.convert_u/i64x2(a: v128) -> v128` | [f64x2.fromUnsignedInt](portable-simd.md#integer-to-floating-point) | - -## `b8x16` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `b8x16.build(x: i32[16]) -> b8x16` | [b8x16.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b8x16.splat(x: i32) -> b8x16` | [b8x16.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` | [b8x16.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` | [b8x16.replaceLane](portable-simd.md#replace-lane-value) | -| `b8x16.and(a: b8x16, b: b8x16) -> b8x16` | [b8x16.and](portable-simd.md#logical-and) | -| `b8x16.or(a: b8x16, b: b8x16) -> b8x16` | [b8x16.or](portable-simd.md#logical-or) | -| `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` | [b8x16.xor](portable-simd.md#logical-xor) | -| `b8x16.not(a: b8x16) -> b8x16` | [b8x16.not](portable-simd.md#logical-not) | -| `b8x16.anyTrue(a: b8x16) -> i32` | [b8x16.anyTrue](portable-simd.md#any-lane-true) | -| `b8x16.allTrue(a: b8x16) -> i32` | [b8x16.allTrue](portable-simd.md#all-lanes-true) | - -## `b16x8` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `b16x8.build(x: i32[8]) -> b16x8` | [b16x8.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b16x8.splat(x: i32) -> b16x8` | [b16x8.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` | [b16x8.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` | [b16x8.replaceLane](portable-simd.md#replace-lane-value) | -| `b16x8.and(a: b16x8, b: b16x8) -> b16x8` | [b16x8.and](portable-simd.md#logical-and) | -| `b16x8.or(a: b16x8, b: b16x8) -> b16x8` | [b16x8.or](portable-simd.md#logical-or) | -| `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` | [b16x8.xor](portable-simd.md#logical-xor) | -| `b16x8.not(a: b16x8) -> b16x8` | [b16x8.not](portable-simd.md#logical-not) | -| `b16x8.anyTrue(a: b16x8) -> i32` | [b16x8.anyTrue](portable-simd.md#any-lane-true) | -| `b16x8.allTrue(a: b16x8) -> i32` | [b16x8.allTrue](portable-simd.md#all-lanes-true) | - -## `b32x4` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `b32x4.build(x: i32[4]) -> b32x4` | [b32x4.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b32x4.splat(x: i32) -> b32x4` | [b32x4.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` | [b32x4.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` | [b32x4.replaceLane](portable-simd.md#replace-lane-value) | -| `b32x4.and(a: b32x4, b: b32x4) -> b32x4` | [b32x4.and](portable-simd.md#logical-and) | -| `b32x4.or(a: b32x4, b: b32x4) -> b32x4` | [b32x4.or](portable-simd.md#logical-or) | -| `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` | [b32x4.xor](portable-simd.md#logical-xor) | -| `b32x4.not(a: b32x4) -> b32x4` | [b32x4.not](portable-simd.md#logical-not) | -| `b32x4.anyTrue(a: b32x4) -> i32` | [b32x4.anyTrue](portable-simd.md#any-lane-true) | -| `b32x4.allTrue(a: b32x4) -> i32` | [b32x4.allTrue](portable-simd.md#all-lanes-true) | - -## `b64x2` operations -| WebAssembly | Portable SIMD | -|:------------|:--------------| -| `b64x2.build(x: i32[2]) -> b64x2` | [b64x2.build](portable-simd.md#build-vector-from-individual-lanes) | -| `b64x2.splat(x: i32) -> b64x2` | [b64x2.splat](portable-simd.md#create-vector-with-identical-lanes) | -| `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` | [b64x2.extractLane](portable-simd.md#extract-lane-as-a-scalar) | -| `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` | [b64x2.replaceLane](portable-simd.md#replace-lane-value) | -| `b64x2.and(a: b64x2, b: b64x2) -> b64x2` | [b64x2.and](portable-simd.md#logical-and) | -| `b64x2.or(a: b64x2, b: b64x2) -> b64x2` | [b64x2.or](portable-simd.md#logical-or) | -| `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` | [b64x2.xor](portable-simd.md#logical-xor) | -| `b64x2.not(a: b64x2) -> b64x2` | [b64x2.not](portable-simd.md#logical-not) | -| `b64x2.anyTrue(a: b64x2) -> i32` | [b64x2.anyTrue](portable-simd.md#any-lane-true) | -| `b64x2.allTrue(a: b64x2) -> i32` | [b64x2.allTrue](portable-simd.md#all-lanes-true) | From 8f861eb9dc76eab13ecf8ff6fb66f05e742e877d Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 9 May 2017 10:49:25 -0700 Subject: [PATCH 008/378] Saturate negative numbers to 0. This is relevant for the sub_saturate_u operations. Fixes #15. --- proposals/simd/SIMD.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d0b4d2a17b..edc831e7ef 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -424,6 +424,8 @@ def S.SignedSaturate(x): return x def S.UnsignedSaturate(x): + if x < 0: + return 0 if x > S.Umax: return S.Umax return x From b6262011b5d10b3dccb4b6952b771163c4d5051c Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 16 May 2017 16:18:46 -0700 Subject: [PATCH 009/378] Move the contents of Overview.md to the top-level README file. This makes it easier to find the proposed changes at a glance. --- README.md | 31 +++++++++++-------------------- proposals/simd/Overview.md | 9 --------- 2 files changed, 11 insertions(+), 29 deletions(-) delete mode 100644 proposals/simd/Overview.md diff --git a/README.md b/README.md index 4092be9ca2..8cf5255e76 100644 --- a/README.md +++ b/README.md @@ -1,23 +1,14 @@ -[![Build Status](https://travis-ci.org/WebAssembly/spec.svg?branch=master)](https://travis-ci.org/WebAssembly/spec) +# SIMD proposal for WebAssembly -# spec +This repository holds a proposal for adding 128-bit SIMD support to +WebAssembly. It is a copy of the +[WebAssembly/spec](https://github.com/WebAssembly/spec) repository with the +addition of a [proposals/simd](proposals/simd) directory. -This repository holds a prototypical reference implementation for WebAssembly, -which is currently serving as the official specification. Eventually, we expect -to produce a specification either written in human-readable prose or in a formal -specification language. +The proposal describes how 128-bit packed SIMD types and operations can be +added to WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 +ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the +[portable SIMD specification](https://github.com/stoklund/portable-simd) that +resulted. -It also holds the WebAssembly testsuite, which tests numerous aspects of -conformance to the spec. - -View the work-in-progress spec at [webassembly.github.io/spec](https://webassembly.github.io/spec/). - -At this time, the contents of this repository are under development and known -to be "incomplet and inkorrect". - -Participation is welcome. Discussions about new features, significant semantic -changes, or any specification change likely to generate substantial discussion -should take place in -[the WebAssembly design repository](https://github.com/WebAssembly/design) -first, so that this spec repository can remain focused. And please follow the -[guidelines for contributing](Contributing.md). +The [proposed specification](proposals/simd/SIMD.md) has the details. diff --git a/proposals/simd/Overview.md b/proposals/simd/Overview.md deleted file mode 100644 index 2b9233bd02..0000000000 --- a/proposals/simd/Overview.md +++ /dev/null @@ -1,9 +0,0 @@ -# SIMD support for WebAssembly - -This proposal describes how 128-bit packed SIMD types and operations can be -added to WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 -ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the -[portable SIMD specification](https://github.com/stoklund/portable-simd) that -resulted. - -The [proposed specification](SIMD.md) has the details. From 7e9490f702a20cb1da062506e8fcd73b629cf81e Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 23 May 2017 10:20:15 -0700 Subject: [PATCH 010/378] Change the lane access operations to snake_case. These got missed when the other operations were renamed. --- proposals/simd/SIMD.md | 48 +++++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index edc831e7ef..2d0a3265e4 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -226,23 +226,23 @@ instructions ignore the high bits of `x`. ## Accessing lanes ### Extract lane as a scalar -* `b8x16.extractLane(a: b8x16, i: LaneIdx16) -> i32` -* `b16x8.extractLane(a: b16x8, i: LaneIdx8) -> i32` -* `b32x4.extractLane(a: b32x4, i: LaneIdx4) -> i32` -* `b64x2.extractLane(a: b64x2, i: LaneIdx2) -> i32` -* `i8x16.extractLane_s(a: v128, i: LaneIdx16) -> i32` -* `i8x16.extractLane_u(a: v128, i: LaneIdx16) -> i32` -* `i16x8.extractLane_s(a: v128, i: LaneIdx8) -> i32` -* `i16x8.extractLane_u(a: v128, i: LaneIdx8) -> i32` -* `i32x4.extractLane(a: v128, i: LaneIdx4) -> i32` -* `i64x2.extractLane(a: v128, i: LaneIdx2) -> i64` -* `f32x4.extractLane(a: v128, i: LaneIdx4) -> f32` -* `f64x2.extractLane(a: v128, i: LaneIdx2) -> f64` +* `b8x16.extract_lane(a: b8x16, i: LaneIdx16) -> i32` +* `b16x8.extract_lane(a: b16x8, i: LaneIdx8) -> i32` +* `b32x4.extract_lane(a: b32x4, i: LaneIdx4) -> i32` +* `b64x2.extract_lane(a: b64x2, i: LaneIdx2) -> i32` +* `i8x16.extract_lane_s(a: v128, i: LaneIdx16) -> i32` +* `i8x16.extract_lane_u(a: v128, i: LaneIdx16) -> i32` +* `i16x8.extract_lane_s(a: v128, i: LaneIdx8) -> i32` +* `i16x8.extract_lane_u(a: v128, i: LaneIdx8) -> i32` +* `i32x4.extract_lane(a: v128, i: LaneIdx4) -> i32` +* `i64x2.extract_lane(a: v128, i: LaneIdx2) -> i64` +* `f32x4.extract_lane(a: v128, i: LaneIdx4) -> f32` +* `f64x2.extract_lane(a: v128, i: LaneIdx2) -> f64` Extract the value of lane `i` in `a`. ```python -def S.extractLane(a, i): +def S.extract_lane(a, i): return a[i] ``` @@ -251,22 +251,22 @@ The `_s` and `_u` variants will sign-extend or zero-extend the lane value to 1. ### Replace lane value -* `b8x16.replaceLane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` -* `b16x8.replaceLane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` -* `b32x4.replaceLane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` -* `b64x2.replaceLane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` -* `i8x16.replaceLane(a: v128, i: LaneIdx16, x: i32) -> v128` -* `i16x8.replaceLane(a: v128, i: LaneIdx8, x: i32) -> v128` -* `i32x4.replaceLane(a: v128, i: LaneIdx4, x: i32) -> v128` -* `i64x2.replaceLane(a: v128, i: LaneIdx2, x: i64) -> v128` -* `f32x4.replaceLane(a: v128, i: LaneIdx4, x: f32) -> v128` -* `f64x2.replaceLane(a: v128, i: LaneIdx2, x: f64) -> v128` +* `b8x16.replace_lane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` +* `b16x8.replace_lane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` +* `b32x4.replace_lane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` +* `b64x2.replace_lane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` +* `i8x16.replace_lane(a: v128, i: LaneIdx16, x: i32) -> v128` +* `i16x8.replace_lane(a: v128, i: LaneIdx8, x: i32) -> v128` +* `i32x4.replace_lane(a: v128, i: LaneIdx4, x: i32) -> v128` +* `i64x2.replace_lane(a: v128, i: LaneIdx2, x: i64) -> v128` +* `f32x4.replace_lane(a: v128, i: LaneIdx4, x: f32) -> v128` +* `f64x2.replace_lane(a: v128, i: LaneIdx2, x: f64) -> v128` Return a new vector with lanes identical to `a`, except for lane `i` which has the value `x`. ```python -def S.replaceLane(a, i, x): +def S.replace_lane(a, i, x): result = S.New() for j in range(S.Lanes): result[j] = a[j] From ce8771ae47edebacee2bdd13770e2cdf01900b5f Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sun, 4 Jun 2017 18:31:12 -0700 Subject: [PATCH 011/378] Added PDF with slides from the May 2017 CG meeting --- proposals/simd/WebAssembly-SIMD-May-2017.pdf | Bin 0 -> 128301 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 proposals/simd/WebAssembly-SIMD-May-2017.pdf diff --git a/proposals/simd/WebAssembly-SIMD-May-2017.pdf b/proposals/simd/WebAssembly-SIMD-May-2017.pdf new file mode 100644 index 0000000000000000000000000000000000000000..9b9fd29a55451545663df915779794afef1baadd GIT binary patch literal 128301 zcmbrlby!`?lP-*g;32pZ++BmayL)hFB9!7 z<2QbKAGyW;z&>W~WDb_yCm8Kq%0exp;8)Lh4NP>$o~|9YQyaxx==wfNOo?~|*FZ!Z z5#=5Q+)2e#y*S?`=9`7fE_w5B9a^oMbd0eA3h?GKq|6-oXXI?eR2k&Ri^MCRst|I1 z_V-ij>UxwV_eDT)52Ei*Q+Ty9ji3x1Z1k_R3O_j&sh79zUhh{o#dl^jxp1IK@yd;% zKy`S1;dIM|kW#NW}hc4Z;9hr}z7gM1K_gu1#4J zV+#WzfE$rE<9h=WBQq-z2Ro-O+`C5q7WAj%KbBB%02nEoI1y>TOA`?zVo))0b0X3u zVh{#c100m?42(>O{uoTyk%@@oukrc#-VOCG@~>tU6(%CiKh5u>|1sI$0+{|t{zt;! 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qLYkUEQNY_4$U=hne>eGCkIB^yczOTz&I@=3+~$b6x#iU5iT?-o)P$G- literal 0 HcmV?d00001 From d915056ebec687827bf62142b93a108103a31497 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 16 May 2017 16:28:15 -0700 Subject: [PATCH 012/378] Remove the S.build(...) constructors. Fixes #12. The effect of these dynamic constructors can be achieved with an S.const instruction followed by a sequence of S.replaceLane instructions. This is also what LLVM does. --- proposals/simd/SIMD.md | 26 -------------------------- 1 file changed, 26 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 2d0a3265e4..f843a5b230 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -171,32 +171,6 @@ instruction is encoded with 16 immediate bytes which provide the bits of the vector directly. The boolean constants are encoded with one bit per lane such that lane 0 is the LSB of the first immediate byte. -### Build vector from individual lanes -* `b8x16.build(x: i32[16]) -> b8x16` -* `b16x8.build(x: i32[8]) -> b16x8` -* `b32x4.build(x: i32[4]) -> b32x4` -* `b64x2.build(x: i32[2]) -> b64x2` -* `i8x16.build(x: i32[16]) -> v128` -* `i16x8.build(x: i32[8]) -> v128` -* `i32x4.build(x: i32[4]) -> v128` -* `i64x2.build(x: i64[2]) -> v128` -* `f32x4.build(x: f32[4]) -> v128` -* `f64x2.build(x: f64[2]) -> v128` - -Construct a vector from an array of individual lane values. - -```python -def S.build(x): - result = S.New() - for i in range(S.Lanes): - result[i] = x[i] - return result -``` - -The `i32[16]` array notation is a shorthand for a sequence of identically typed -arguments. So `b8x16.build` takes 16 `i32` arguments where a non-zero value is -interpreted as true. - ### Create vector with identical lanes * `b8x16.splat(x: i32) -> b8x16` * `b16x8.splat(x: i32) -> b16x8` From 33903012843f92a850467ad2d185f43042fc8920 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 10:50:39 -0700 Subject: [PATCH 013/378] Remove boolean types. The WebAssembly community group was not able to reach a consensus on whether boolean vector types should be included or not. In order to move forward with prototyping of the proposal, remove the boolean vector types along with supporting instructions. Change comparison instructions to return a v128 mask vector and replace the select instructions with a single v128.bitselect instruction. These semantics are simply to implement on all current instruction set architectures. --- proposals/simd/SIMD.md | 339 ++++++++++++++--------------------------- 1 file changed, 114 insertions(+), 225 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index f843a5b230..4217c6209c 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -6,45 +6,24 @@ current popular instruction set architectures. # Types -WebAssembly is extended with five new value types and a number of new kinds of -immediate operands used by the SIMD instructions. +WebAssembly is extended with a new `v128` value type and a number of new kinds +of immediate operands used by the SIMD instructions. -## SIMD value types +## SIMD value type -The `v128` type has a concrete mapping to a 128-bit representation. The boolean -types do not have a bit-pattern representation. - -* `v128`: A 128-bit SIMD vector. Bits are numbered 0–127. -* `b8x16`: A vector of 16 `boolean` lanes numbered 0–15. -* `b16x8`: A vector of 8 `boolean` lanes numbered 0–7. -* `b32x4`: A vector of 4 `boolean` lanes numbered 0–3. -* `b64x2`: A vector of 2 `boolean` lanes numbered 0–1. - -The `v128` type corresponds to a vector register in a typical SIMD ISA. The -interpretation of the 128 bits in the vector register is provided by the -individual instructions. When a `v128` value is represented as 16 bytes, bits -0-7 go in the first byte with bit 0 as the LSB, bits 8-15 go in the second +The `v128` value type has a concrete mapping to a 128-bit representation with bits +numbered 0–127. The `v128` type corresponds to a vector register in a typical +SIMD ISA. The interpretation of the 128 bits in the vector register is provided +by the individual instructions. When a `v128` value is represented as 16 bytes, +bits 0-7 go in the first byte with bit 0 as the LSB, bits 8-15 go in the second byte, etc. -The abstract boolean vector types can be mapped to vector registers or predicate -registers by an implementation. They have a property `S.Lanes` which is used by -the pseudo-code below: - -| S | S.Lanes | -|---------|--------:| -| `b8x16` | 16 | -| `b16x8` | 8 | -| `b32x4` | 4 | -| `b64x2` | 2 | - ## Immediate operands Some of the new SIMD instructions defined here have immediate operands that are encoded as individual bytes in the binary encoding. Many have a limited valid range, and it is a validation error if the immediate operands are out of range. -* `ImmBits2`: A byte with values in the range 0-3 used to initialize a `b64x2`. -* `ImmBits4`: A byte with values in the range 0-15 used to initialize a `b32x4`. * `ImmByte`: A single unconstrained byte (0-255). * `LaneIdx2`: A byte with values in the range 0–1 identifying a lane. * `LaneIdx4`: A byte with values in the range 0–3 identifying a lane. @@ -52,14 +31,12 @@ range, and it is a validation error if the immediate operands are out of range. * `LaneIdx16`: A byte with values in the range 0–15 identifying a lane. * `LaneIdx32`: A byte with values in the range 0–31 identifying a lane. -## Interpreting SIMD value types +## Interpreting the SIMD value type The single `v128` SIMD type can represent packed data in multiple ways. Instructions specify how the bits should be interpreted through a hierarchy of *interpretations*. -The boolean vector types only have the one interpretation given by their type. - ### Lane division interpretation The first level of interpretations of the `v128` type imposes a lane structure on @@ -74,12 +51,12 @@ The lane dividing interpretations don't say anything about the semantics of the bits in each lane. The interpretations have *properties* used by the semantic specification pseudo-code below: -| S | S.LaneBits | S.Lanes | S.BoolType | +| S | S.LaneBits | S.Lanes | S.MaskType | |---------|-----------:|--------:|:----------:| -| `v8x16` | 8 | 16 | `b8x16` | -| `v16x8` | 16 | 8 | `b16x8` | -| `v32x4` | 32 | 4 | `b32x4` | -| `v64x2` | 64 | 2 | `b64x2` | +| `v8x16` | 8 | 16 | `i8x16` | +| `v16x8` | 16 | 8 | `i16x8` | +| `v32x4` | 32 | 4 | `i32x4` | +| `v64x2` | 64 | 2 | `i64x2` | Since WebAssembly is little-endian, the least significant bit in each lane is the bit with the lowest number. @@ -147,35 +124,28 @@ def S.lanewise_binary(func, a, b): return result ``` -Comparison operators produce a boolean vector: +Comparison operators produce a mask vector where the bits in each lane are 0 +for false and all ones for true: ```python def S.lanewise_comparison(func, a, b): - result = S.BoolType.New() + all_ones = S.MaskType.Umax + result = S.MaskType.New() for i in range(S.Lanes): - result[i] = func(a[i], b[i]) + result[i] = all_ones if func(a[i], b[i]) else 0 return result ``` ## Constructing SIMD values -### Constants +### Constant * `v128.const(imm: ImmByte[16]) -> v128` -* `b8x16.const(imm: ImmByte[2]) -> b8x16` -* `b16x8.const(imm: ImmByte) -> b16x8` -* `b32x4.const(imm: ImmBits4) -> b32x4` -* `b64x2.const(imm: ImmBits2) -> b64x2` Materialize a constant SIMD value from the immediate operands. The `v128.const` instruction is encoded with 16 immediate bytes which provide the bits of the -vector directly. The boolean constants are encoded with one bit per lane such -that lane 0 is the LSB of the first immediate byte. +vector directly. ### Create vector with identical lanes -* `b8x16.splat(x: i32) -> b8x16` -* `b16x8.splat(x: i32) -> b16x8` -* `b32x4.splat(x: i32) -> b32x4` -* `b64x2.splat(x: i32) -> b64x2` * `i8x16.splat(x: i32) -> v128` * `i16x8.splat(x: i32) -> v128` * `i32x4.splat(x: i32) -> v128` @@ -193,17 +163,9 @@ def S.splat(x): return result ``` -The boolean vector splats will create a vector with all false lanes if `x` is -zero, all true lanes otherwise. The `i8x16.splat` and `i16x8.splat` -instructions ignore the high bits of `x`. - ## Accessing lanes ### Extract lane as a scalar -* `b8x16.extract_lane(a: b8x16, i: LaneIdx16) -> i32` -* `b16x8.extract_lane(a: b16x8, i: LaneIdx8) -> i32` -* `b32x4.extract_lane(a: b32x4, i: LaneIdx4) -> i32` -* `b64x2.extract_lane(a: b64x2, i: LaneIdx2) -> i32` * `i8x16.extract_lane_s(a: v128, i: LaneIdx16) -> i32` * `i8x16.extract_lane_u(a: v128, i: LaneIdx16) -> i32` * `i16x8.extract_lane_s(a: v128, i: LaneIdx8) -> i32` @@ -221,14 +183,9 @@ def S.extract_lane(a, i): ``` The `_s` and `_u` variants will sign-extend or zero-extend the lane value to -`i32` respectively. Boolean lanes are returned as an `i32` with the value 0 or -1. +`i32` respectively. ### Replace lane value -* `b8x16.replace_lane(a: b8x16, i: LaneIdx16, x: i32) -> b8x16` -* `b16x8.replace_lane(a: b16x8, i: LaneIdx8, x: i32) -> b16x8` -* `b32x4.replace_lane(a: b32x4, i: LaneIdx4, x: i32) -> b32x4` -* `b64x2.replace_lane(a: b64x2, i: LaneIdx2, x: i32) -> b64x2` * `i8x16.replace_lane(a: v128, i: LaneIdx16, x: i32) -> v128` * `i16x8.replace_lane(a: v128, i: LaneIdx8, x: i32) -> v128` * `i32x4.replace_lane(a: v128, i: LaneIdx4, x: i32) -> v128` @@ -249,31 +206,7 @@ def S.replace_lane(a, i, x): ``` The input lane value, `x`, is interpreted the same way as for the splat -instructions. For the boolean vectors, non-zero means true; for the `i8` and -`i16` lanes, the high bits of `x` are ignored. - -### Lane-wise select -* `v8x16.select(s: b8x16, t: v128, f: v128) -> v128` -* `v16x8.select(s: b16x8, t: v128, f: v128) -> v128` -* `v32x4.select(s: b32x4, t: v128, f: v128) -> v128` -* `v64x2.select(s: b64x2, t: v128, f: v128) -> v128` - -Use a boolean vector to select lanes from two numerical vectors. - -```python -def S.select(s, t, f): - result = S.New() - for i in range(S.Lanes): - if s[i]: - result[i] = t[i] - else - result[i] = f[i] - return result -``` - -Note that the normal WebAssembly `select` instruction also works with vector -types. It selects between two whole vectors controlled by a scalar value, -rather than selecting lanes controlled by a boolean vector. +instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. ### Swizzle lanes * `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` @@ -480,14 +413,14 @@ arithmetic right shift for the `_s` variants and a logical right shift for the `_u` variants. ```python -def S.shl_s(a, y): +def S.shr_s(a, y): # Number of bits to shift: 0 .. S.LaneBits - 1. amount = y mod S.LaneBits def shift(x): return x >> amount return S.lanewise_unary(shift, S.AsSigned(a)) -def S.shl_u(a, y): +def S.shr_u(a, y): # Number of bits to shift: 0 .. S.LaneBits - 1. amount = y mod S.LaneBits def shift(x): @@ -495,107 +428,66 @@ def S.shl_u(a, y): return S.lanewise_unary(shift, S.AsUnsigned(a)) ``` -## Logical operations - -The logical operations are defined on the boolean SIMD types. See also the -[Bitwise operations](#bitwise-operations) below. - -### Logical and -* `b8x16.and(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.and(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.and(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.and(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.and(a, b): - def logical_and(x, y): - return x and y - return S.lanewise_binary(logical_and, a, b) -``` - -### Logical or -* `b8x16.or(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.or(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.or(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.or(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.or(a, b): - def logical_or(x, y): - return x or y - return S.lanewise_binary(logical_or, a, b) -``` - -### Logical xor -* `b8x16.xor(a: b8x16, b: b8x16) -> b8x16` -* `b16x8.xor(a: b16x8, b: b16x8) -> b16x8` -* `b32x4.xor(a: b32x4, b: b32x4) -> b32x4` -* `b64x2.xor(a: b64x2, b: b64x2) -> b64x2` - -```python -def S.xor(a, b): - def logical_xor(x, y): - return x xor y - return S.lanewise_binary(logical_xor, a, b) -``` - -### Logical not -* `b8x16.not(a: b8x16) -> b8x16` -* `b16x8.not(a: b16x8) -> b16x8` -* `b32x4.not(a: b32x4) -> b32x4` -* `b64x2.not(a: b64x2) -> b64x2` - -```python -def S.not(a): - def logical_not(x): - return not x - return S.lanewise_unary(logical_not, a) -``` ## Bitwise operations -The same logical operations defined on the boolean types are also available on -the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, and -`~` operators work on an `unsigned` type. +Bitwise operations treat a `v128` value type as a vector of 128 independent bits. +### Bitwise logic * `v128.and(a: v128, b: v128) -> v128` * `v128.or(a: v128, b: v128) -> v128` * `v128.xor(a: v128, b: v128) -> v128` * `v128.not(a: v128) -> v128` +The logical operations defined on the scalar integer types are also available +on the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, +and `~` operators work on an `unsigned` type. + +### Bitwise select +* `v128.bitselect(v1: v128, v2: v128, c: v128) -> v128` + +Use the bits in the control mask `c` to select the corresponding bit from `v1` +when 1 and `v2` when 0. +This is the same as `v128.or(v128.and(v1, c), v128.and(v2, v128.not(c)))`. + +Note that the normal WebAssembly `select` instruction also works with vector +types. It selects between two whole vectors controlled by a single scalar value, +rather than selecting bits controlled by a control mask vector. + + ## Boolean horizontal reductions -These operations reduce all the lanes of a boolean vector to a single scalar -boolean value. +These operations reduce all the lanes of an integer vector to a single scalar +0 or 1 value. A lane is considered "true" if it is non-zero. ### Any lane true -* `b8x16.any_true(a: b8x16) -> i32` -* `b16x8.any_true(a: b16x8) -> i32` -* `b32x4.any_true(a: b32x4) -> i32` -* `b64x2.any_true(a: b64x2) -> i32` +* `i8x16.any_true(a: v128) -> i32` +* `i16x8.any_true(a: v128) -> i32` +* `i32x4.any_true(a: v128) -> i32` +* `i64x2.any_true(a: v128) -> i32` -These functions return 1 if any lane in `a` is true, 0 otherwise. +These functions return 1 if any lane in `a` is non-zero, 0 otherwise. ```python def S.any_true(a): for i in range(S.Lanes): - if a[i]: + if a[i] != 0: return 1 return 0 ``` ### All lanes true -* `b8x16.all_true(a: b8x16) -> i32` -* `b16x8.all_true(a: b16x8) -> i32` -* `b32x4.all_true(a: b32x4) -> i32` -* `b64x2.all_true(a: b64x2) -> i32` +* `i8x16.all_true(a: v128) -> i32` +* `i16x8.all_true(a: v128) -> i32` +* `i32x4.all_true(a: v128) -> i32` +* `i64x2.all_true(a: v128) -> i32` -These functions return 1 if all lanes in `a` are true, 0 otherwise. +These functions return 1 if all lanes in `a` are non-zero, 0 otherwise. ```python def S.all_true(a): for i in range(S.Lanes): - if not a[i]: + if a[i] == 0: return 0 return 1 ``` @@ -603,15 +495,15 @@ def S.all_true(a): ## Comparisons The comparison operations all compare two vectors lane-wise, and produce a -boolean vector with the same number of lanes as the input interpretation. +mask vector with the same number of lanes as the input interpretation. ### Equality -* `i8x16.eq(a: v128, b: v128) -> b8x16` -* `i16x8.eq(a: v128, b: v128) -> b16x8` -* `i32x4.eq(a: v128, b: v128) -> b32x4` -* `i64x2.eq(a: v128, b: v128) -> b64x2` -* `f32x4.eq(a: v128, b: v128) -> b32x4` -* `f64x2.eq(a: v128, b: v128) -> b64x2` +* `i8x16.eq(a: v128, b: v128) -> v128` +* `i16x8.eq(a: v128, b: v128) -> v128` +* `i32x4.eq(a: v128, b: v128) -> v128` +* `i64x2.eq(a: v128, b: v128) -> v128` +* `f32x4.eq(a: v128, b: v128) -> v128` +* `f64x2.eq(a: v128, b: v128) -> v128` Integer equality is independent of the signed/unsigned interpretation. Floating point equality follows IEEE semantics, so a NaN lane compares not equal with @@ -625,12 +517,12 @@ def S.eq(a, b): ``` ### Non-equality -* `i8x16.ne(a: v128, b: v128) -> b8x16` -* `i16x8.ne(a: v128, b: v128) -> b16x8` -* `i32x4.ne(a: v128, b: v128) -> b32x4` -* `i64x2.ne(a: v128, b: v128) -> b64x2` -* `f32x4.ne(a: v128, b: v128) -> b32x4` -* `f64x2.ne(a: v128, b: v128) -> b64x2` +* `i8x16.ne(a: v128, b: v128) -> v128` +* `i16x8.ne(a: v128, b: v128) -> v128` +* `i32x4.ne(a: v128, b: v128) -> v128` +* `i64x2.ne(a: v128, b: v128) -> v128` +* `f32x4.ne(a: v128, b: v128) -> v128` +* `f64x2.ne(a: v128, b: v128) -> v128` The `ne` operations produce the inverse of their `ne` counterparts: @@ -642,62 +534,59 @@ def S.ne(a, b): ``` ### Less than -* `i8x16.lt_s(a: v128, b: v128) -> b8x16` -* `i8x16.lt_u(a: v128, b: v128) -> b8x16` -* `i16x8.lt_s(a: v128, b: v128) -> b16x8` -* `i16x8.lt_u(a: v128, b: v128) -> b16x8` -* `i32x4.lt_s(a: v128, b: v128) -> b32x4` -* `i32x4.lt_u(a: v128, b: v128) -> b32x4` -* `i64x2.lt_s(a: v128, b: v128) -> b64x2` -* `i64x2.lt_u(a: v128, b: v128) -> b64x2` -* `f32x4.lt(a: v128, b: v128) -> b32x4` -* `f64x2.lt(a: v128, b: v128) -> b64x2` +* `i8x16.lt_s(a: v128, b: v128) -> v128` +* `i8x16.lt_u(a: v128, b: v128) -> v128` +* `i16x8.lt_s(a: v128, b: v128) -> v128` +* `i16x8.lt_u(a: v128, b: v128) -> v128` +* `i32x4.lt_s(a: v128, b: v128) -> v128` +* `i32x4.lt_u(a: v128, b: v128) -> v128` +* `i64x2.lt_s(a: v128, b: v128) -> v128` +* `i64x2.lt_u(a: v128, b: v128) -> v128` +* `f32x4.lt(a: v128, b: v128) -> v128` +* `f64x2.lt(a: v128, b: v128) -> v128` ### Less than or equal -* `i8x16.le_s(a: v128, b: v128) -> b8x16` -* `i8x16.le_u(a: v128, b: v128) -> b8x16` -* `i16x8.le_s(a: v128, b: v128) -> b16x8` -* `i16x8.le_u(a: v128, b: v128) -> b16x8` -* `i32x4.le_s(a: v128, b: v128) -> b32x4` -* `i32x4.le_u(a: v128, b: v128) -> b32x4` -* `i64x2.le_s(a: v128, b: v128) -> b64x2` -* `i64x2.le_u(a: v128, b: v128) -> b64x2` -* `f32x4.le(a: v128, b: v128) -> b32x4` -* `f64x2.le(a: v128, b: v128) -> b64x2` +* `i8x16.le_s(a: v128, b: v128) -> v128` +* `i8x16.le_u(a: v128, b: v128) -> v128` +* `i16x8.le_s(a: v128, b: v128) -> v128` +* `i16x8.le_u(a: v128, b: v128) -> v128` +* `i32x4.le_s(a: v128, b: v128) -> v128` +* `i32x4.le_u(a: v128, b: v128) -> v128` +* `i64x2.le_s(a: v128, b: v128) -> v128` +* `i64x2.le_u(a: v128, b: v128) -> v128` +* `f32x4.le(a: v128, b: v128) -> v128` +* `f64x2.le(a: v128, b: v128) -> v128` ### Greater than -* `i8x16.gt_s(a: v128, b: v128) -> b8x16` -* `i8x16.gt_u(a: v128, b: v128) -> b8x16` -* `i16x8.gt_s(a: v128, b: v128) -> b16x8` -* `i16x8.gt_u(a: v128, b: v128) -> b16x8` -* `i32x4.gt_s(a: v128, b: v128) -> b32x4` -* `i32x4.gt_u(a: v128, b: v128) -> b32x4` -* `i64x2.gt_s(a: v128, b: v128) -> b64x2` -* `i64x2.gt_u(a: v128, b: v128) -> b64x2` -* `f32x4.gt(a: v128, b: v128) -> b32x4` -* `f64x2.gt(a: v128, b: v128) -> b64x2` +* `i8x16.gt_s(a: v128, b: v128) -> v128` +* `i8x16.gt_u(a: v128, b: v128) -> v128` +* `i16x8.gt_s(a: v128, b: v128) -> v128` +* `i16x8.gt_u(a: v128, b: v128) -> v128` +* `i32x4.gt_s(a: v128, b: v128) -> v128` +* `i32x4.gt_u(a: v128, b: v128) -> v128` +* `i64x2.gt_s(a: v128, b: v128) -> v128` +* `i64x2.gt_u(a: v128, b: v128) -> v128` +* `f32x4.gt(a: v128, b: v128) -> v128` +* `f64x2.gt(a: v128, b: v128) -> v128` ### Greater than or equal -* `i8x16.ge_s(a: v128, b: v128) -> b8x16` -* `i8x16.ge_u(a: v128, b: v128) -> b8x16` -* `i16x8.ge_s(a: v128, b: v128) -> b16x8` -* `i16x8.ge_u(a: v128, b: v128) -> b16x8` -* `i32x4.ge_s(a: v128, b: v128) -> b32x4` -* `i32x4.ge_u(a: v128, b: v128) -> b32x4` -* `i64x2.ge_s(a: v128, b: v128) -> b64x2` -* `i64x2.ge_u(a: v128, b: v128) -> b64x2` -* `f32x4.ge(a: v128, b: v128) -> b32x4` -* `f64x2.ge(a: v128, b: v128) -> b64x2` +* `i8x16.ge_s(a: v128, b: v128) -> v128` +* `i8x16.ge_u(a: v128, b: v128) -> v128` +* `i16x8.ge_s(a: v128, b: v128) -> v128` +* `i16x8.ge_u(a: v128, b: v128) -> v128` +* `i32x4.ge_s(a: v128, b: v128) -> v128` +* `i32x4.ge_u(a: v128, b: v128) -> v128` +* `i64x2.ge_s(a: v128, b: v128) -> v128` +* `i64x2.ge_u(a: v128, b: v128) -> v128` +* `f32x4.ge(a: v128, b: v128) -> v128` +* `f64x2.ge(a: v128, b: v128) -> v128` ## Load and store -Load and store operations are provided for `v128` vectors, but not for the -boolean vectors; we don't want to prescribe a bitwise representation of the -boolean vectors. - -The memory operations take the same arguments and have the same semantics as -the existing scalar WebAssembly load and store instructions. The difference is -that the memory access size is 16 bytes which is also the natural alignment. +Load and store operations are provided for the `v128` vectors. The memory +operations take the same arguments and have the same semantics as the existing +scalar WebAssembly load and store instructions. The difference is that the +memory access size is 16 bytes which is also the natural alignment. ### Load From 8a1f98c4a3c153379ccd1a2bb666310220dda3d1 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 10:57:20 -0700 Subject: [PATCH 014/378] Keep only a single v8x16.shuffle instruction. Remove all other swizzle and shuffle instructions since they can be implemented in terms of the general v8x16.shuffle. We can add more compact encodings of popular shuffles later if needed. --- proposals/simd/SIMD.md | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4217c6209c..26f5007558 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -208,27 +208,8 @@ def S.replace_lane(a, i, x): The input lane value, `x`, is interpreted the same way as for the splat instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. -### Swizzle lanes -* `v8x16.swizzle(a: v128, s: LaneIdx16[16]) -> v128` -* `v16x8.swizzle(a: v128, s: LaneIdx8[8]) -> v128` -* `v32x4.swizzle(a: v128, s: LaneIdx4[4]) -> v128` -* `v64x2.swizzle(a: v128, s: LaneIdx2[2]) -> v128` - -Create vector with lanes rearranged: - -```python -def S.swizzle(a, s): - result = S.New() - for i in range(S.Lanes): - result[i] = a[s[i]] - return result -``` - ### Shuffle lanes * `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` -* `v16x8.shuffle(a: v128, b: v128, s: LaneIdx16[8]) -> v128` -* `v32x4.shuffle(a: v128, b: v128, s: LaneIdx8[4]) -> v128` -* `v64x2.shuffle(a: v128, b: v128, s: LaneIdx4[2]) -> v128` Create vector with lanes selected from the lanes of two input vectors: From 6edd8c2b9c818a19cca6599120941f28106ffc78 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 11:59:43 -0700 Subject: [PATCH 015/378] Remove controversial i64x2 operations. The CG consensus is to omit the following i64x2 operations: i64x2.mul, equalities, inequalities. Other i64x2 operations remain since they were supported by CG consensus. --- proposals/simd/SIMD.md | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 26f5007558..ca6dcc63d4 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -271,7 +271,6 @@ def S.sub(a, b): * `i8x16.mul(a: v128, b: v128) -> v128` * `i16x8.mul(a: v128, b: v128) -> v128` * `i32x4.mul(a: v128, b: v128) -> v128` -* `i64x2.mul(a: v128, b: v128) -> v128` Lane-wise wrapping integer multiplication: @@ -482,7 +481,6 @@ mask vector with the same number of lanes as the input interpretation. * `i8x16.eq(a: v128, b: v128) -> v128` * `i16x8.eq(a: v128, b: v128) -> v128` * `i32x4.eq(a: v128, b: v128) -> v128` -* `i64x2.eq(a: v128, b: v128) -> v128` * `f32x4.eq(a: v128, b: v128) -> v128` * `f64x2.eq(a: v128, b: v128) -> v128` @@ -501,7 +499,6 @@ def S.eq(a, b): * `i8x16.ne(a: v128, b: v128) -> v128` * `i16x8.ne(a: v128, b: v128) -> v128` * `i32x4.ne(a: v128, b: v128) -> v128` -* `i64x2.ne(a: v128, b: v128) -> v128` * `f32x4.ne(a: v128, b: v128) -> v128` * `f64x2.ne(a: v128, b: v128) -> v128` @@ -521,8 +518,6 @@ def S.ne(a, b): * `i16x8.lt_u(a: v128, b: v128) -> v128` * `i32x4.lt_s(a: v128, b: v128) -> v128` * `i32x4.lt_u(a: v128, b: v128) -> v128` -* `i64x2.lt_s(a: v128, b: v128) -> v128` -* `i64x2.lt_u(a: v128, b: v128) -> v128` * `f32x4.lt(a: v128, b: v128) -> v128` * `f64x2.lt(a: v128, b: v128) -> v128` @@ -533,8 +528,6 @@ def S.ne(a, b): * `i16x8.le_u(a: v128, b: v128) -> v128` * `i32x4.le_s(a: v128, b: v128) -> v128` * `i32x4.le_u(a: v128, b: v128) -> v128` -* `i64x2.le_s(a: v128, b: v128) -> v128` -* `i64x2.le_u(a: v128, b: v128) -> v128` * `f32x4.le(a: v128, b: v128) -> v128` * `f64x2.le(a: v128, b: v128) -> v128` @@ -545,8 +538,6 @@ def S.ne(a, b): * `i16x8.gt_u(a: v128, b: v128) -> v128` * `i32x4.gt_s(a: v128, b: v128) -> v128` * `i32x4.gt_u(a: v128, b: v128) -> v128` -* `i64x2.gt_s(a: v128, b: v128) -> v128` -* `i64x2.gt_u(a: v128, b: v128) -> v128` * `f32x4.gt(a: v128, b: v128) -> v128` * `f64x2.gt(a: v128, b: v128) -> v128` @@ -557,8 +548,6 @@ def S.ne(a, b): * `i16x8.ge_u(a: v128, b: v128) -> v128` * `i32x4.ge_s(a: v128, b: v128) -> v128` * `i32x4.ge_u(a: v128, b: v128) -> v128` -* `i64x2.ge_s(a: v128, b: v128) -> v128` -* `i64x2.ge_u(a: v128, b: v128) -> v128` * `f32x4.ge(a: v128, b: v128) -> v128` * `f64x2.ge(a: v128, b: v128) -> v128` From 5bd1db5faf521b48943785fe6812d65e4cdb6040 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 12:08:15 -0700 Subject: [PATCH 016/378] Saturating float-to-int conversions. The CG consensus was to replace the trapping conversion instructions with saturating semantics. --- proposals/simd/SIMD.md | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index ca6dcc63d4..ab2a99b826 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -662,13 +662,14 @@ Lane-wise IEEE `squareRoot`. Lane-wise conversion from integer to floating point. Some integer values will be rounded. -### Floating point to integer -* `i32x4.trunc_s/f32x4(a: v128) -> v128` -* `i32x4.trunc_u/f32x4(a: v128) -> v128` -* `i64x2.trunc_s/f64x2(a: v128) -> v128` -* `i64x2.trunc_u/f64x2(a: v128) -> v128` - -Lane-wise conversion from floating point to integer using the IEEE -`convertToIntegerTowardZero` function. If any lane is a NaN or the rounded -integer value is outside the range of the destination type, these instructions -trap. +### Floating point to integer with saturation +* `i32x4.trunc_s/f32x4:sat(a: v128) -> v128` +* `i32x4.trunc_u/f32x4:sat(a: v128) -> v128` +* `i64x2.trunc_s/f64x2:sat(a: v128) -> v128` +* `i64x2.trunc_u/f64x2:sat(a: v128) -> v128` + +Lane-wise saturating conversion from floating point to integer using the IEEE +`convertToIntegerTowardZero` function. If any input lane is a NaN, the +resulting lane is 0. If the rounded integer value of a lane is outside the +range of the destination type, the result is saturated to the nearest +representable integer value. From 9a169aec39563e935f7679bc7777b38a3575d0b9 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 13:08:27 -0700 Subject: [PATCH 017/378] Add a separate document for the binary encoding of SIMD. --- proposals/simd/BinarySIMD.md | 169 +++++++++++++++++++++++++++++++++++ proposals/simd/SIMD.md | 2 + 2 files changed, 171 insertions(+) create mode 100644 proposals/simd/BinarySIMD.md diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md new file mode 100644 index 0000000000..736266c34d --- /dev/null +++ b/proposals/simd/BinarySIMD.md @@ -0,0 +1,169 @@ +# Binary encoding of SIMD + +This document describes the binary encoding of the SIMD value type and +instructions. + +## SIMD value type + +The `v128` value type is encoded as 0x7b: + +``` +valtype ::= ... + | 0x7B => v128 +``` + +## SIMD instruction encodings + +All SIMD instructions are encoded as a 0xfd prefix byte followed by a +SIMD-specific opcode in LEB128 format: + +``` +instr ::= ... + | 0xFB simdop:varuint32 ... +``` + +Some SIMD instructions have additional immediate operands following `simdop`. +The `v8x16.shuffle` instruction has 16 bytes after `simdop`. + +| Instruction | `simdop` | Immediate operands | +| --------------------------|---------:|--------------------| +| `v128.const` | 0 | - | +| `v128.load` | 1 | m:memarg | +| `v128.store` | 2 | m:memarg | +| `i8x16.splat` | 3 | - | +| `i16x8.splat` | 4 | - | +| `i32x4.splat` | 5 | - | +| `i64x2.splat` | 6 | - | +| `f32x4.splat` | 7 | - | +| `f64x2.splat` | 8 | - | +| `i8x16.extract_lane_s` | 9 | i:LaneIdx16 | +| `i8x16.extract_lane_u` | 10 | i:LaneIdx16 | +| `i16x8.extract_lane_s` | 11 | i:LaneIdx8 | +| `i16x8.extract_lane_u` | 12 | i:LaneIdx8 | +| `i32x4.extract_lane` | 13 | i:LaneIdx4 | +| `i64x2.extract_lane` | 14 | i:LaneIdx2 | +| `f32x4.extract_lane` | 15 | i:LaneIdx4 | +| `f64x2.extract_lane` | 16 | i:LaneIdx2 | +| `i8x16.replace_lane` | 17 | i:LaneIdx16 | +| `i16x8.replace_lane` | 18 | i:LaneIdx8 | +| `i32x4.replace_lane` | 19 | i:LaneIdx4 | +| `i64x2.replace_lane` | 20 | i:LaneIdx2 | +| `f32x4.replace_lane` | 21 | i:LaneIdx4 | +| `f64x2.replace_lane` | 22 | i:LaneIdx2 | +| `v8x16.shuffle` | 23 | s:LaneIdx32[16] | +| `i8x16.add` | 24 | - | +| `i16x8.add` | 25 | - | +| `i32x4.add` | 26 | - | +| `i64x2.add` | 27 | - | +| `i8x16.sub` | 28 | - | +| `i16x8.sub` | 29 | - | +| `i32x4.sub` | 30 | - | +| `i64x2.sub` | 31 | - | +| `i8x16.mul` | 32 | - | +| `i16x8.mul` | 33 | - | +| `i32x4.mul` | 34 | - | +| `i8x16.neg` | 35 | - | +| `i16x8.neg` | 36 | - | +| `i32x4.neg` | 37 | - | +| `i64x2.neg` | 38 | - | +| `i8x16.add_saturate_s` | 39 | - | +| `i8x16.add_saturate_u` | 40 | - | +| `i16x8.add_saturate_s` | 41 | - | +| `i16x8.add_saturate_u` | 42 | - | +| `i8x16.sub_saturate_s` | 43 | - | +| `i8x16.sub_saturate_u` | 44 | - | +| `i16x8.sub_saturate_s` | 45 | - | +| `i16x8.sub_saturate_u` | 46 | - | +| `i8x16.shl` | 47 | - | +| `i16x8.shl` | 48 | - | +| `i32x4.shl` | 49 | - | +| `i64x2.shl` | 50 | - | +| `i8x16.shr_s` | 51 | - | +| `i8x16.shr_u` | 52 | - | +| `i16x8.shr_s` | 53 | - | +| `i16x8.shr_u` | 54 | - | +| `i32x4.shr_s` | 55 | - | +| `i32x4.shr_u` | 56 | - | +| `i64x2.shr_s` | 57 | - | +| `i64x2.shr_u` | 58 | - | +| `v128.and` | 59 | - | +| `v128.or` | 60 | - | +| `v128.xor` | 61 | - | +| `v128.not` | 62 | - | +| `v128.bitselect` | 63 | - | +| `i8x16.any_true` | 64 | - | +| `i16x8.any_true` | 65 | - | +| `i32x4.any_true` | 66 | - | +| `i64x2.any_true` | 67 | - | +| `i8x16.all_true` | 68 | - | +| `i16x8.all_true` | 69 | - | +| `i32x4.all_true` | 70 | - | +| `i64x2.all_true` | 71 | - | +| `i8x16.eq` | 72 | - | +| `i16x8.eq` | 73 | - | +| `i32x4.eq` | 74 | - | +| `f32x4.eq` | 75 | - | +| `f64x2.eq` | 76 | - | +| `i8x16.ne` | 77 | - | +| `i16x8.ne` | 78 | - | +| `i32x4.ne` | 79 | - | +| `f32x4.ne` | 80 | - | +| `f64x2.ne` | 81 | - | +| `i8x16.lt_s` | 82 | - | +| `i8x16.lt_u` | 83 | - | +| `i16x8.lt_s` | 84 | - | +| `i16x8.lt_u` | 85 | - | +| `i32x4.lt_s` | 86 | - | +| `i32x4.lt_u` | 87 | - | +| `f32x4.lt` | 88 | - | +| `f64x2.lt` | 89 | - | +| `i8x16.le_s` | 90 | - | +| `i8x16.le_u` | 91 | - | +| `i16x8.le_s` | 92 | - | +| `i16x8.le_u` | 93 | - | +| `i32x4.le_s` | 94 | - | +| `i32x4.le_u` | 95 | - | +| `f32x4.le` | 96 | - | +| `f64x2.le` | 97 | - | +| `i8x16.gt_s` | 98 | - | +| `i8x16.gt_u` | 99 | - | +| `i16x8.gt_s` | 100 | - | +| `i16x8.gt_u` | 101 | - | +| `i32x4.gt_s` | 102 | - | +| `i32x4.gt_u` | 103 | - | +| `f32x4.gt` | 104 | - | +| `f64x2.gt` | 105 | - | +| `i8x16.ge_s` | 106 | - | +| `i8x16.ge_u` | 107 | - | +| `i16x8.ge_s` | 108 | - | +| `i16x8.ge_u` | 109 | - | +| `i32x4.ge_s` | 110 | - | +| `i32x4.ge_u` | 111 | - | +| `f32x4.ge` | 112 | - | +| `f64x2.ge` | 113 | - | +| `f32x4.neg` | 114 | - | +| `f64x2.neg` | 115 | - | +| `f32x4.abs` | 116 | - | +| `f64x2.abs` | 117 | - | +| `f32x4.min` | 118 | - | +| `f64x2.min` | 119 | - | +| `f32x4.max` | 120 | - | +| `f64x2.max` | 121 | - | +| `f32x4.add` | 122 | - | +| `f64x2.add` | 123 | - | +| `f32x4.sub` | 124 | - | +| `f64x2.sub` | 125 | - | +| `f32x4.div` | 126 | - | +| `f64x2.div` | 127 | - | +| `f32x4.mul` | 128 | - | +| `f64x2.mul` | 129 | - | +| `f32x4.sqrt` | 130 | - | +| `f64x2.sqrt` | 131 | - | +| `f32x4.convert_s/i32x4` | 132 | - | +| `f32x4.convert_u/i32x4` | 133 | - | +| `f64x2.convert_s/i64x2` | 134 | - | +| `f64x2.convert_u/i64x2` | 135 | - | +| `i32x4.trunc_s/f32x4:sat` | 136 | - | +| `i32x4.trunc_u/f32x4:sat` | 137 | - | +| `i64x2.trunc_s/f64x2:sat` | 138 | - | +| `i64x2.trunc_u/f64x2:sat` | 139 | - | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index ab2a99b826..afcdc9c09d 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -4,6 +4,8 @@ This specification describes a 128-bit packed *Single Instruction Multiple Data* (SIMD) extension to WebAssembly that can be implemented efficiently on current popular instruction set architectures. +See also [The binary encoding of SIMD instructions](BinarySIMD.md). + # Types WebAssembly is extended with a new `v128` value type and a number of new kinds From 95388dcbdea3afa7ef75fcf5baaceab986d7fad9 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 6 Jun 2017 13:12:32 -0700 Subject: [PATCH 018/378] Typo --- proposals/simd/BinarySIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 736266c34d..06c0774f9d 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -19,7 +19,7 @@ SIMD-specific opcode in LEB128 format: ``` instr ::= ... - | 0xFB simdop:varuint32 ... + | 0xFD simdop:varuint32 ... ``` Some SIMD instructions have additional immediate operands following `simdop`. From 2286fffe8d39339a849b81036f33d45bdcd47c54 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 8 Jun 2017 09:33:00 -0700 Subject: [PATCH 019/378] Fix immediate operands for v128.const This instruction takes 16 bytes of immediate value. --- proposals/simd/BinarySIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 06c0774f9d..bd7483c48c 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -27,7 +27,7 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | Instruction | `simdop` | Immediate operands | | --------------------------|---------:|--------------------| -| `v128.const` | 0 | - | +| `v128.const` | 0 | i:ImmByte[16] | | `v128.load` | 1 | m:memarg | | `v128.store` | 2 | m:memarg | | `i8x16.splat` | 3 | - | From c6cc6d480c4de6f9fc90aade5257e680422b383f Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Tue, 18 Sep 2018 17:38:31 -0700 Subject: [PATCH 020/378] Update opcodes to include space for v2i64 comparison operations (#39) * Add v2i64 comparison operations * Add opcode space holes instead of new instructions * Strikethrough i64x2.mul * Strikethrough opcode numbers, too * Remove nonexistent instructions entirely --- proposals/simd/BinarySIMD.md | 210 +++++++++++++++++------------------ 1 file changed, 105 insertions(+), 105 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index bd7483c48c..02cb1b75c1 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -62,108 +62,108 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.mul` | 32 | - | | `i16x8.mul` | 33 | - | | `i32x4.mul` | 34 | - | -| `i8x16.neg` | 35 | - | -| `i16x8.neg` | 36 | - | -| `i32x4.neg` | 37 | - | -| `i64x2.neg` | 38 | - | -| `i8x16.add_saturate_s` | 39 | - | -| `i8x16.add_saturate_u` | 40 | - | -| `i16x8.add_saturate_s` | 41 | - | -| `i16x8.add_saturate_u` | 42 | - | -| `i8x16.sub_saturate_s` | 43 | - | -| `i8x16.sub_saturate_u` | 44 | - | -| `i16x8.sub_saturate_s` | 45 | - | -| `i16x8.sub_saturate_u` | 46 | - | -| `i8x16.shl` | 47 | - | -| `i16x8.shl` | 48 | - | -| `i32x4.shl` | 49 | - | -| `i64x2.shl` | 50 | - | -| `i8x16.shr_s` | 51 | - | -| `i8x16.shr_u` | 52 | - | -| `i16x8.shr_s` | 53 | - | -| `i16x8.shr_u` | 54 | - | -| `i32x4.shr_s` | 55 | - | -| `i32x4.shr_u` | 56 | - | -| `i64x2.shr_s` | 57 | - | -| `i64x2.shr_u` | 58 | - | -| `v128.and` | 59 | - | -| `v128.or` | 60 | - | -| `v128.xor` | 61 | - | -| `v128.not` | 62 | - | -| `v128.bitselect` | 63 | - | -| `i8x16.any_true` | 64 | - | -| `i16x8.any_true` | 65 | - | -| `i32x4.any_true` | 66 | - | -| `i64x2.any_true` | 67 | - | -| `i8x16.all_true` | 68 | - | -| `i16x8.all_true` | 69 | - | -| `i32x4.all_true` | 70 | - | -| `i64x2.all_true` | 71 | - | -| `i8x16.eq` | 72 | - | -| `i16x8.eq` | 73 | - | -| `i32x4.eq` | 74 | - | -| `f32x4.eq` | 75 | - | -| `f64x2.eq` | 76 | - | -| `i8x16.ne` | 77 | - | -| `i16x8.ne` | 78 | - | -| `i32x4.ne` | 79 | - | -| `f32x4.ne` | 80 | - | -| `f64x2.ne` | 81 | - | -| `i8x16.lt_s` | 82 | - | -| `i8x16.lt_u` | 83 | - | -| `i16x8.lt_s` | 84 | - | -| `i16x8.lt_u` | 85 | - | -| `i32x4.lt_s` | 86 | - | -| `i32x4.lt_u` | 87 | - | -| `f32x4.lt` | 88 | - | -| `f64x2.lt` | 89 | - | -| `i8x16.le_s` | 90 | - | -| `i8x16.le_u` | 91 | - | -| `i16x8.le_s` | 92 | - | -| `i16x8.le_u` | 93 | - | -| `i32x4.le_s` | 94 | - | -| `i32x4.le_u` | 95 | - | -| `f32x4.le` | 96 | - | -| `f64x2.le` | 97 | - | -| `i8x16.gt_s` | 98 | - | -| `i8x16.gt_u` | 99 | - | -| `i16x8.gt_s` | 100 | - | -| `i16x8.gt_u` | 101 | - | -| `i32x4.gt_s` | 102 | - | -| `i32x4.gt_u` | 103 | - | -| `f32x4.gt` | 104 | - | -| `f64x2.gt` | 105 | - | -| `i8x16.ge_s` | 106 | - | -| `i8x16.ge_u` | 107 | - | -| `i16x8.ge_s` | 108 | - | -| `i16x8.ge_u` | 109 | - | -| `i32x4.ge_s` | 110 | - | -| `i32x4.ge_u` | 111 | - | -| `f32x4.ge` | 112 | - | -| `f64x2.ge` | 113 | - | -| `f32x4.neg` | 114 | - | -| `f64x2.neg` | 115 | - | -| `f32x4.abs` | 116 | - | -| `f64x2.abs` | 117 | - | -| `f32x4.min` | 118 | - | -| `f64x2.min` | 119 | - | -| `f32x4.max` | 120 | - | -| `f64x2.max` | 121 | - | -| `f32x4.add` | 122 | - | -| `f64x2.add` | 123 | - | -| `f32x4.sub` | 124 | - | -| `f64x2.sub` | 125 | - | -| `f32x4.div` | 126 | - | -| `f64x2.div` | 127 | - | -| `f32x4.mul` | 128 | - | -| `f64x2.mul` | 129 | - | -| `f32x4.sqrt` | 130 | - | -| `f64x2.sqrt` | 131 | - | -| `f32x4.convert_s/i32x4` | 132 | - | -| `f32x4.convert_u/i32x4` | 133 | - | -| `f64x2.convert_s/i64x2` | 134 | - | -| `f64x2.convert_u/i64x2` | 135 | - | -| `i32x4.trunc_s/f32x4:sat` | 136 | - | -| `i32x4.trunc_u/f32x4:sat` | 137 | - | -| `i64x2.trunc_s/f64x2:sat` | 138 | - | -| `i64x2.trunc_u/f64x2:sat` | 139 | - | +| `i8x16.neg` | 36 | - | +| `i16x8.neg` | 37 | - | +| `i32x4.neg` | 38 | - | +| `i64x2.neg` | 39 | - | +| `i8x16.add_saturate_s` | 40 | - | +| `i8x16.add_saturate_u` | 41 | - | +| `i16x8.add_saturate_s` | 42 | - | +| `i16x8.add_saturate_u` | 43 | - | +| `i8x16.sub_saturate_s` | 44 | - | +| `i8x16.sub_saturate_u` | 45 | - | +| `i16x8.sub_saturate_s` | 46 | - | +| `i16x8.sub_saturate_u` | 47 | - | +| `i8x16.shl` | 48 | - | +| `i16x8.shl` | 49 | - | +| `i32x4.shl` | 50 | - | +| `i64x2.shl` | 51 | - | +| `i8x16.shr_s` | 52 | - | +| `i8x16.shr_u` | 53 | - | +| `i16x8.shr_s` | 54 | - | +| `i16x8.shr_u` | 55 | - | +| `i32x4.shr_s` | 56 | - | +| `i32x4.shr_u` | 57 | - | +| `i64x2.shr_s` | 58 | - | +| `i64x2.shr_u` | 59 | - | +| `v128.and` | 60 | - | +| `v128.or` | 61 | - | +| `v128.xor` | 62 | - | +| `v128.not` | 63 | - | +| `v128.bitselect` | 64 | - | +| `i8x16.any_true` | 65 | - | +| `i16x8.any_true` | 66 | - | +| `i32x4.any_true` | 67 | - | +| `i64x2.any_true` | 68 | - | +| `i8x16.all_true` | 69 | - | +| `i16x8.all_true` | 70 | - | +| `i32x4.all_true` | 71 | - | +| `i64x2.all_true` | 72 | - | +| `i8x16.eq` | 73 | - | +| `i16x8.eq` | 74 | - | +| `i32x4.eq` | 75 | - | +| `f32x4.eq` | 77 | - | +| `f64x2.eq` | 78 | - | +| `i8x16.ne` | 79 | - | +| `i16x8.ne` | 80 | - | +| `i32x4.ne` | 81 | - | +| `f32x4.ne` | 83 | - | +| `f64x2.ne` | 84 | - | +| `i8x16.lt_s` | 85 | - | +| `i8x16.lt_u` | 86 | - | +| `i16x8.lt_s` | 87 | - | +| `i16x8.lt_u` | 88 | - | +| `i32x4.lt_s` | 89 | - | +| `i32x4.lt_u` | 90 | - | +| `f32x4.lt` | 93 | - | +| `f64x2.lt` | 94 | - | +| `i8x16.le_s` | 95 | - | +| `i8x16.le_u` | 96 | - | +| `i16x8.le_s` | 97 | - | +| `i16x8.le_u` | 98 | - | +| `i32x4.le_s` | 99 | - | +| `i32x4.le_u` | 100 | - | +| `f32x4.le` | 103 | - | +| `f64x2.le` | 104 | - | +| `i8x16.gt_s` | 105 | - | +| `i8x16.gt_u` | 106 | - | +| `i16x8.gt_s` | 107 | - | +| `i16x8.gt_u` | 108 | - | +| `i32x4.gt_s` | 109 | - | +| `i32x4.gt_u` | 110 | - | +| `f32x4.gt` | 113 | - | +| `f64x2.gt` | 114 | - | +| `i8x16.ge_s` | 115 | - | +| `i8x16.ge_u` | 116 | - | +| `i16x8.ge_s` | 117 | - | +| `i16x8.ge_u` | 118 | - | +| `i32x4.ge_s` | 119 | - | +| `i32x4.ge_u` | 120 | - | +| `f32x4.ge` | 123 | - | +| `f64x2.ge` | 124 | - | +| `f32x4.neg` | 125 | - | +| `f64x2.neg` | 126 | - | +| `f32x4.abs` | 127 | - | +| `f64x2.abs` | 128 | - | +| `f32x4.min` | 129 | - | +| `f64x2.min` | 130 | - | +| `f32x4.max` | 131 | - | +| `f64x2.max` | 132 | - | +| `f32x4.add` | 133 | - | +| `f64x2.add` | 134 | - | +| `f32x4.sub` | 135 | - | +| `f64x2.sub` | 136 | - | +| `f32x4.div` | 137 | - | +| `f64x2.div` | 138 | - | +| `f32x4.mul` | 139 | - | +| `f64x2.mul` | 140 | - | +| `f32x4.sqrt` | 141 | - | +| `f64x2.sqrt` | 142 | - | +| `f32x4.convert_s/i32x4` | 143 | - | +| `f32x4.convert_u/i32x4` | 144 | - | +| `f64x2.convert_s/i64x2` | 145 | - | +| `f64x2.convert_u/i64x2` | 146 | - | +| `i32x4.trunc_s/f32x4:sat` | 147 | - | +| `i32x4.trunc_u/f32x4:sat` | 148 | - | +| `i64x2.trunc_s/f64x2:sat` | 149 | - | +| `i64x2.trunc_u/f64x2:sat` | 150 | - | From 2bbd9c18f3dc32e9e3519eb057343fbfb819479f Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Wed, 24 Oct 2018 13:36:20 +0200 Subject: [PATCH 021/378] State result value of comparisons (#47) --- proposals/simd/SIMD.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index afcdc9c09d..fc3b00d26c 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -476,8 +476,9 @@ def S.all_true(a): ## Comparisons -The comparison operations all compare two vectors lane-wise, and produce a -mask vector with the same number of lanes as the input interpretation. +The comparison operations all compare two vectors lane-wise, and produce a mask +vector with the same number of lanes as the input interpretation where the bits +in each lane are `0` for `false` and all ones for `true`. ### Equality * `i8x16.eq(a: v128, b: v128) -> v128` From a4ab55ffe1ebc94e229b0b0210450c0dbed9a2d2 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 5 Nov 2018 11:39:54 -0800 Subject: [PATCH 022/378] Reorganize opcodes by kind and type (#48) --- proposals/simd/BinarySIMD.md | 307 +++++++++++++++++++---------------- 1 file changed, 167 insertions(+), 140 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 02cb1b75c1..bb7a8e4270 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -27,143 +27,170 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | Instruction | `simdop` | Immediate operands | | --------------------------|---------:|--------------------| -| `v128.const` | 0 | i:ImmByte[16] | -| `v128.load` | 1 | m:memarg | -| `v128.store` | 2 | m:memarg | -| `i8x16.splat` | 3 | - | -| `i16x8.splat` | 4 | - | -| `i32x4.splat` | 5 | - | -| `i64x2.splat` | 6 | - | -| `f32x4.splat` | 7 | - | -| `f64x2.splat` | 8 | - | -| `i8x16.extract_lane_s` | 9 | i:LaneIdx16 | -| `i8x16.extract_lane_u` | 10 | i:LaneIdx16 | -| `i16x8.extract_lane_s` | 11 | i:LaneIdx8 | -| `i16x8.extract_lane_u` | 12 | i:LaneIdx8 | -| `i32x4.extract_lane` | 13 | i:LaneIdx4 | -| `i64x2.extract_lane` | 14 | i:LaneIdx2 | -| `f32x4.extract_lane` | 15 | i:LaneIdx4 | -| `f64x2.extract_lane` | 16 | i:LaneIdx2 | -| `i8x16.replace_lane` | 17 | i:LaneIdx16 | -| `i16x8.replace_lane` | 18 | i:LaneIdx8 | -| `i32x4.replace_lane` | 19 | i:LaneIdx4 | -| `i64x2.replace_lane` | 20 | i:LaneIdx2 | -| `f32x4.replace_lane` | 21 | i:LaneIdx4 | -| `f64x2.replace_lane` | 22 | i:LaneIdx2 | -| `v8x16.shuffle` | 23 | s:LaneIdx32[16] | -| `i8x16.add` | 24 | - | -| `i16x8.add` | 25 | - | -| `i32x4.add` | 26 | - | -| `i64x2.add` | 27 | - | -| `i8x16.sub` | 28 | - | -| `i16x8.sub` | 29 | - | -| `i32x4.sub` | 30 | - | -| `i64x2.sub` | 31 | - | -| `i8x16.mul` | 32 | - | -| `i16x8.mul` | 33 | - | -| `i32x4.mul` | 34 | - | -| `i8x16.neg` | 36 | - | -| `i16x8.neg` | 37 | - | -| `i32x4.neg` | 38 | - | -| `i64x2.neg` | 39 | - | -| `i8x16.add_saturate_s` | 40 | - | -| `i8x16.add_saturate_u` | 41 | - | -| `i16x8.add_saturate_s` | 42 | - | -| `i16x8.add_saturate_u` | 43 | - | -| `i8x16.sub_saturate_s` | 44 | - | -| `i8x16.sub_saturate_u` | 45 | - | -| `i16x8.sub_saturate_s` | 46 | - | -| `i16x8.sub_saturate_u` | 47 | - | -| `i8x16.shl` | 48 | - | -| `i16x8.shl` | 49 | - | -| `i32x4.shl` | 50 | - | -| `i64x2.shl` | 51 | - | -| `i8x16.shr_s` | 52 | - | -| `i8x16.shr_u` | 53 | - | -| `i16x8.shr_s` | 54 | - | -| `i16x8.shr_u` | 55 | - | -| `i32x4.shr_s` | 56 | - | -| `i32x4.shr_u` | 57 | - | -| `i64x2.shr_s` | 58 | - | -| `i64x2.shr_u` | 59 | - | -| `v128.and` | 60 | - | -| `v128.or` | 61 | - | -| `v128.xor` | 62 | - | -| `v128.not` | 63 | - | -| `v128.bitselect` | 64 | - | -| `i8x16.any_true` | 65 | - | -| `i16x8.any_true` | 66 | - | -| `i32x4.any_true` | 67 | - | -| `i64x2.any_true` | 68 | - | -| `i8x16.all_true` | 69 | - | -| `i16x8.all_true` | 70 | - | -| `i32x4.all_true` | 71 | - | -| `i64x2.all_true` | 72 | - | -| `i8x16.eq` | 73 | - | -| `i16x8.eq` | 74 | - | -| `i32x4.eq` | 75 | - | -| `f32x4.eq` | 77 | - | -| `f64x2.eq` | 78 | - | -| `i8x16.ne` | 79 | - | -| `i16x8.ne` | 80 | - | -| `i32x4.ne` | 81 | - | -| `f32x4.ne` | 83 | - | -| `f64x2.ne` | 84 | - | -| `i8x16.lt_s` | 85 | - | -| `i8x16.lt_u` | 86 | - | -| `i16x8.lt_s` | 87 | - | -| `i16x8.lt_u` | 88 | - | -| `i32x4.lt_s` | 89 | - | -| `i32x4.lt_u` | 90 | - | -| `f32x4.lt` | 93 | - | -| `f64x2.lt` | 94 | - | -| `i8x16.le_s` | 95 | - | -| `i8x16.le_u` | 96 | - | -| `i16x8.le_s` | 97 | - | -| `i16x8.le_u` | 98 | - | -| `i32x4.le_s` | 99 | - | -| `i32x4.le_u` | 100 | - | -| `f32x4.le` | 103 | - | -| `f64x2.le` | 104 | - | -| `i8x16.gt_s` | 105 | - | -| `i8x16.gt_u` | 106 | - | -| `i16x8.gt_s` | 107 | - | -| `i16x8.gt_u` | 108 | - | -| `i32x4.gt_s` | 109 | - | -| `i32x4.gt_u` | 110 | - | -| `f32x4.gt` | 113 | - | -| `f64x2.gt` | 114 | - | -| `i8x16.ge_s` | 115 | - | -| `i8x16.ge_u` | 116 | - | -| `i16x8.ge_s` | 117 | - | -| `i16x8.ge_u` | 118 | - | -| `i32x4.ge_s` | 119 | - | -| `i32x4.ge_u` | 120 | - | -| `f32x4.ge` | 123 | - | -| `f64x2.ge` | 124 | - | -| `f32x4.neg` | 125 | - | -| `f64x2.neg` | 126 | - | -| `f32x4.abs` | 127 | - | -| `f64x2.abs` | 128 | - | -| `f32x4.min` | 129 | - | -| `f64x2.min` | 130 | - | -| `f32x4.max` | 131 | - | -| `f64x2.max` | 132 | - | -| `f32x4.add` | 133 | - | -| `f64x2.add` | 134 | - | -| `f32x4.sub` | 135 | - | -| `f64x2.sub` | 136 | - | -| `f32x4.div` | 137 | - | -| `f64x2.div` | 138 | - | -| `f32x4.mul` | 139 | - | -| `f64x2.mul` | 140 | - | -| `f32x4.sqrt` | 141 | - | -| `f64x2.sqrt` | 142 | - | -| `f32x4.convert_s/i32x4` | 143 | - | -| `f32x4.convert_u/i32x4` | 144 | - | -| `f64x2.convert_s/i64x2` | 145 | - | -| `f64x2.convert_u/i64x2` | 146 | - | -| `i32x4.trunc_s/f32x4:sat` | 147 | - | -| `i32x4.trunc_u/f32x4:sat` | 148 | - | -| `i64x2.trunc_s/f64x2:sat` | 149 | - | -| `i64x2.trunc_u/f64x2:sat` | 150 | - | +| `v128.load` | `0x00`| m:memarg | +| `v128.store` | `0x01`| m:memarg | +| `v128.const` | `0x02`| i:ImmByte[16] | +| `v8x16.shuffle` | `0x03`| s:LaneIdx32[16] | +| `i8x16.splat` | `0x04`| - | +| `i8x16.extract_lane_s` | `0x05`| i:LaneIdx16 | +| `i8x16.extract_lane_u` | `0x06`| i:LaneIdx16 | +| `i8x16.replace_lane` | `0x07`| i:LaneIdx16 | +| `i16x8.splat` | `0x08`| - | +| `i16x8.extract_lane_s` | `0x09`| i:LaneIdx8 | +| `i16x8.extract_lane_u` | `0x0a`| i:LaneIdx8 | +| `i16x8.replace_lane` | `0x0b`| i:LaneIdx8 | +| `i32x4.splat` | `0x0c`| - | +| `i32x4.extract_lane` | `0x0d`| i:LaneIdx4 | +| `i32x4.replace_lane` | `0x0e`| i:LaneIdx4 | +| `i64x2.splat` | `0x0f`| - | +| `i64x2.extract_lane` | `0x10`| i:LaneIdx2 | +| `i64x2.replace_lane` | `0x11`| i:LaneIdx2 | +| `f32x4.splat` | `0x12`| - | +| `f32x4.extract_lane` | `0x13`| i:LaneIdx4 | +| `f32x4.replace_lane` | `0x14`| i:LaneIdx4 | +| `f64x2.splat` | `0x15`| - | +| `f64x2.extract_lane` | `0x16`| i:LaneIdx2 | +| `f64x2.replace_lane` | `0x17`| i:LaneIdx2 | +| `i8x16.eq` | `0x18`| - | +| `i8x16.ne` | `0x19`| - | +| `i8x16.lt_s` | `0x1a`| - | +| `i8x16.lt_u` | `0x1b`| - | +| `i8x16.gt_s` | `0x1c`| - | +| `i8x16.gt_u` | `0x1d`| - | +| `i8x16.le_s` | `0x1e`| - | +| `i8x16.le_u` | `0x1f`| - | +| `i8x16.ge_s` | `0x20`| - | +| `i8x16.ge_u` | `0x21`| - | +| `i16x8.eq` | `0x22`| - | +| `i16x8.ne` | `0x23`| - | +| `i16x8.lt_s` | `0x24`| - | +| `i16x8.lt_u` | `0x25`| - | +| `i16x8.gt_s` | `0x26`| - | +| `i16x8.gt_u` | `0x27`| - | +| `i16x8.le_s` | `0x28`| - | +| `i16x8.le_u` | `0x29`| - | +| `i16x8.ge_s` | `0x2a`| - | +| `i16x8.ge_u` | `0x2b`| - | +| `i32x4.eq` | `0x2c`| - | +| `i32x4.ne` | `0x2d`| - | +| `i32x4.lt_s` | `0x2e`| - | +| `i32x4.lt_u` | `0x2f`| - | +| `i32x4.gt_s` | `0x30`| - | +| `i32x4.gt_u` | `0x31`| - | +| `i32x4.le_s` | `0x32`| - | +| `i32x4.le_u` | `0x33`| - | +| `i32x4.ge_s` | `0x34`| - | +| `i32x4.ge_u` | `0x35`| - | +| - | `0x36`| - | +| - | `0x37`| - | +| - | `0x38`| - | +| - | `0x39`| - | +| - | `0x3a`| - | +| - | `0x3b`| - | +| - | `0x3c`| - | +| - | `0x3d`| - | +| - | `0x3e`| - | +| - | `0x3f`| - | +| `f32x4.eq` | `0x40`| - | +| `f32x4.ne` | `0x41`| - | +| `f32x4.lt` | `0x42`| - | +| `f32x4.gt` | `0x43`| - | +| `f32x4.le` | `0x44`| - | +| `f32x4.ge` | `0x45`| - | +| `f64x2.eq` | `0x46`| - | +| `f64x2.ne` | `0x47`| - | +| `f64x2.lt` | `0x48`| - | +| `f64x2.gt` | `0x49`| - | +| `f64x2.le` | `0x4a`| - | +| `f64x2.ge` | `0x4b`| - | +| `v128.and` | `0x4c`| - | +| `v128.or` | `0x4d`| - | +| `v128.xor` | `0x4e`| - | +| `v128.not` | `0x4f`| - | +| `v128.bitselect` | `0x50`| - | +| `i8x16.add` | `0x51`| - | +| `i8x16.add_saturate_s` | `0x52`| - | +| `i8x16.add_saturate_u` | `0x53`| - | +| `i8x16.sub` | `0x54`| - | +| `i8x16.sub_saturate_s` | `0x55`| - | +| `i8x16.sub_saturate_u` | `0x56`| - | +| `i8x16.mul` | `0x57`| - | +| - | `0x58`| - | +| - | `0x59`| - | +| `i8x16.shl` | `0x5a`| - | +| `i8x16.shr_s` | `0x5b`| - | +| `i8x16.shr_u` | `0x5c`| - | +| `i8x16.neg` | `0x5d`| - | +| `i8x16.any_true` | `0x5e`| - | +| `i8x16.all_true` | `0x5f`| - | +| `i16x8.add` | `0x60`| - | +| `i16x8.add_saturate_s` | `0x61`| - | +| `i16x8.add_saturate_u` | `0x62`| - | +| `i16x8.sub` | `0x63`| - | +| `i16x8.sub_saturate_s` | `0x64`| - | +| `i16x8.sub_saturate_u` | `0x65`| - | +| `i16x8.mul` | `0x66`| - | +| - | `0x67`| - | +| - | `0x68`| - | +| `i16x8.shl` | `0x69`| - | +| `i16x8.shr_s` | `0x6a`| - | +| `i16x8.shr_u` | `0x6b`| - | +| `i16x8.neg` | `0x6c`| - | +| `i16x8.any_true` | `0x6d`| - | +| `i16x8.all_true` | `0x6e`| - | +| `i32x4.add` | `0x6f`| - | +| - | `0x70`| - | +| - | `0x71`| - | +| `i32x4.sub` | `0x72`| - | +| - | `0x73`| - | +| - | `0x74`| - | +| `i32x4.mul` | `0x75`| - | +| - | `0x76`| - | +| - | `0x77`| - | +| `i32x4.shl` | `0x78`| - | +| `i32x4.shr_s` | `0x79`| - | +| `i32x4.shr_u` | `0x7a`| - | +| `i32x4.neg` | `0x7b`| - | +| `i32x4.any_true` | `0x7c`| - | +| `i32x4.all_true` | `0x7d`| - | +| `i64x2.add` | `0x7e`| - | +| - | `0x7f`| - | +| - | `0x80`| - | +| `i64x2.sub` | `0x81`| - | +| - | `0x82`| - | +| - | `0x83`| - | +| - | `0x84`| - | +| - | `0x85`| - | +| - | `0x86`| - | +| `i64x2.shl` | `0x87`| - | +| `i64x2.shr_s` | `0x88`| - | +| `i64x2.shr_u` | `0x89`| - | +| `i64x2.neg` | `0x8a`| - | +| `i64x2.any_true` | `0x8b`| - | +| `i64x2.all_true` | `0x8c`| - | +| `f32x4.add` | `0x8d`| - | +| `f32x4.sub` | `0x8e`| - | +| `f32x4.mul` | `0x8f`| - | +| `f32x4.div` | `0x90`| - | +| `f32x4.min` | `0x91`| - | +| `f32x4.max` | `0x92`| - | +| `f32x4.neg` | `0x93`| - | +| `f32x4.abs` | `0x94`| - | +| `f32x4.sqrt` | `0x95`| - | +| `f64x2.add` | `0x96`| - | +| `f64x2.sub` | `0x97`| - | +| `f64x2.mul` | `0x98`| - | +| `f64x2.div` | `0x99`| - | +| `f64x2.min` | `0x9a`| - | +| `f64x2.max` | `0x9b`| - | +| `f64x2.neg` | `0x9c`| - | +| `f64x2.abs` | `0x9d`| - | +| `f64x2.sqrt` | `0x9e`| - | +| `i32x4.trunc_s/f32x4:sat` | `0x9f`| - | +| `i32x4.trunc_u/f32x4:sat` | `0xa0`| - | +| `i64x2.trunc_s/f64x2:sat` | `0xa1`| - | +| `i64x2.trunc_u/f64x2:sat` | `0xa2`| - | +| `f32x4.convert_s/i32x4` | `0xa3`| - | +| `f32x4.convert_u/i32x4` | `0xa4`| - | +| `f64x2.convert_s/i64x2` | `0xa5`| - | +| `f64x2.convert_u/i64x2` | `0xa6`| - | From 326fa3bbec26c9bb9d87074b38efcdff36204a21 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Tue, 6 Nov 2018 13:35:05 -0800 Subject: [PATCH 023/378] More minor opcode fixups (#50) * More minor opcode fixups Reserve opcode space for signed, and unsigned min/max, floating point RecipApprox, and RecipSqrtApprox and remove explicit `-` for reserved opcodes for consistency. --- proposals/simd/BinarySIMD.md | 151 ++++++++++++++--------------------- 1 file changed, 62 insertions(+), 89 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index bb7a8e4270..1c0610fd09 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -81,16 +81,6 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.le_u` | `0x33`| - | | `i32x4.ge_s` | `0x34`| - | | `i32x4.ge_u` | `0x35`| - | -| - | `0x36`| - | -| - | `0x37`| - | -| - | `0x38`| - | -| - | `0x39`| - | -| - | `0x3a`| - | -| - | `0x3b`| - | -| - | `0x3c`| - | -| - | `0x3d`| - | -| - | `0x3e`| - | -| - | `0x3f`| - | | `f32x4.eq` | `0x40`| - | | `f32x4.ne` | `0x41`| - | | `f32x4.lt` | `0x42`| - | @@ -115,82 +105,65 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.sub_saturate_s` | `0x55`| - | | `i8x16.sub_saturate_u` | `0x56`| - | | `i8x16.mul` | `0x57`| - | -| - | `0x58`| - | -| - | `0x59`| - | -| `i8x16.shl` | `0x5a`| - | -| `i8x16.shr_s` | `0x5b`| - | -| `i8x16.shr_u` | `0x5c`| - | -| `i8x16.neg` | `0x5d`| - | -| `i8x16.any_true` | `0x5e`| - | -| `i8x16.all_true` | `0x5f`| - | -| `i16x8.add` | `0x60`| - | -| `i16x8.add_saturate_s` | `0x61`| - | -| `i16x8.add_saturate_u` | `0x62`| - | -| `i16x8.sub` | `0x63`| - | -| `i16x8.sub_saturate_s` | `0x64`| - | -| `i16x8.sub_saturate_u` | `0x65`| - | -| `i16x8.mul` | `0x66`| - | -| - | `0x67`| - | -| - | `0x68`| - | -| `i16x8.shl` | `0x69`| - | -| `i16x8.shr_s` | `0x6a`| - | -| `i16x8.shr_u` | `0x6b`| - | -| `i16x8.neg` | `0x6c`| - | -| `i16x8.any_true` | `0x6d`| - | -| `i16x8.all_true` | `0x6e`| - | -| `i32x4.add` | `0x6f`| - | -| - | `0x70`| - | -| - | `0x71`| - | -| `i32x4.sub` | `0x72`| - | -| - | `0x73`| - | -| - | `0x74`| - | -| `i32x4.mul` | `0x75`| - | -| - | `0x76`| - | -| - | `0x77`| - | -| `i32x4.shl` | `0x78`| - | -| `i32x4.shr_s` | `0x79`| - | -| `i32x4.shr_u` | `0x7a`| - | -| `i32x4.neg` | `0x7b`| - | -| `i32x4.any_true` | `0x7c`| - | -| `i32x4.all_true` | `0x7d`| - | -| `i64x2.add` | `0x7e`| - | -| - | `0x7f`| - | -| - | `0x80`| - | -| `i64x2.sub` | `0x81`| - | -| - | `0x82`| - | -| - | `0x83`| - | -| - | `0x84`| - | -| - | `0x85`| - | -| - | `0x86`| - | -| `i64x2.shl` | `0x87`| - | -| `i64x2.shr_s` | `0x88`| - | -| `i64x2.shr_u` | `0x89`| - | -| `i64x2.neg` | `0x8a`| - | -| `i64x2.any_true` | `0x8b`| - | -| `i64x2.all_true` | `0x8c`| - | -| `f32x4.add` | `0x8d`| - | -| `f32x4.sub` | `0x8e`| - | -| `f32x4.mul` | `0x8f`| - | -| `f32x4.div` | `0x90`| - | -| `f32x4.min` | `0x91`| - | -| `f32x4.max` | `0x92`| - | -| `f32x4.neg` | `0x93`| - | -| `f32x4.abs` | `0x94`| - | -| `f32x4.sqrt` | `0x95`| - | -| `f64x2.add` | `0x96`| - | -| `f64x2.sub` | `0x97`| - | -| `f64x2.mul` | `0x98`| - | -| `f64x2.div` | `0x99`| - | -| `f64x2.min` | `0x9a`| - | -| `f64x2.max` | `0x9b`| - | -| `f64x2.neg` | `0x9c`| - | -| `f64x2.abs` | `0x9d`| - | -| `f64x2.sqrt` | `0x9e`| - | -| `i32x4.trunc_s/f32x4:sat` | `0x9f`| - | -| `i32x4.trunc_u/f32x4:sat` | `0xa0`| - | -| `i64x2.trunc_s/f64x2:sat` | `0xa1`| - | -| `i64x2.trunc_u/f64x2:sat` | `0xa2`| - | -| `f32x4.convert_s/i32x4` | `0xa3`| - | -| `f32x4.convert_u/i32x4` | `0xa4`| - | -| `f64x2.convert_s/i64x2` | `0xa5`| - | -| `f64x2.convert_u/i64x2` | `0xa6`| - | +| `i8x16.shl` | `0x5c`| - | +| `i8x16.shr_s` | `0x5d`| - | +| `i8x16.shr_u` | `0x5e`| - | +| `i8x16.neg` | `0x5f`| - | +| `i8x16.any_true` | `0x60`| - | +| `i8x16.all_true` | `0x61`| - | +| `i16x8.add` | `0x62`| - | +| `i16x8.add_saturate_s` | `0x63`| - | +| `i16x8.add_saturate_u` | `0x64`| - | +| `i16x8.sub` | `0x65`| - | +| `i16x8.sub_saturate_s` | `0x66`| - | +| `i16x8.sub_saturate_u` | `0x67`| - | +| `i16x8.mul` | `0x68`| - | +| `i16x8.shl` | `0x6d`| - | +| `i16x8.shr_s` | `0x6e`| - | +| `i16x8.shr_u` | `0x6f`| - | +| `i16x8.neg` | `0x70`| - | +| `i16x8.any_true` | `0x71`| - | +| `i16x8.all_true` | `0x72`| - | +| `i32x4.add` | `0x73`| - | +| `i32x4.sub` | `0x76`| - | +| `i32x4.mul` | `0x79`| - | +| `i32x4.shl` | `0x7e`| - | +| `i32x4.shr_s` | `0x7f`| - | +| `i32x4.shr_u` | `0x80`| - | +| `i32x4.neg` | `0x81`| - | +| `i32x4.any_true` | `0x82`| - | +| `i32x4.all_true` | `0x83`| - | +| `i64x2.add` | `0x84`| - | +| `i64x2.sub` | `0x87`| - | +| `i64x2.shl` | `0x8f`| - | +| `i64x2.shr_s` | `0x90`| - | +| `i64x2.shr_u` | `0x91`| - | +| `i64x2.neg` | `0x92`| - | +| `i64x2.any_true` | `0x93`| - | +| `i64x2.all_true` | `0x94`| - | +| `f32x4.add` | `0x95`| - | +| `f32x4.sub` | `0x96`| - | +| `f32x4.mul` | `0x97`| - | +| `f32x4.div` | `0x98`| - | +| `f32x4.min` | `0x99`| - | +| `f32x4.max` | `0x9a`| - | +| `f32x4.neg` | `0x9b`| - | +| `f32x4.abs` | `0x9c`| - | +| `f32x4.sqrt` | `0x9d`| - | +| `f64x2.add` | `0xa0`| - | +| `f64x2.sub` | `0xa1`| - | +| `f64x2.mul` | `0xa2`| - | +| `f64x2.div` | `0xa3`| - | +| `f64x2.min` | `0xa4`| - | +| `f64x2.max` | `0xa5`| - | +| `f64x2.neg` | `0xa6`| - | +| `f64x2.abs` | `0xa7`| - | +| `f64x2.sqrt` | `0xa8`| - | +| `i32x4.trunc_s/f32x4:sat` | `0xab`| - | +| `i32x4.trunc_u/f32x4:sat` | `0xac`| - | +| `i64x2.trunc_s/f64x2:sat` | `0xad`| - | +| `i64x2.trunc_u/f64x2:sat` | `0xae`| - | +| `f32x4.convert_s/i32x4` | `0xaf`| - | +| `f32x4.convert_u/i32x4` | `0xb0`| - | +| `f64x2.convert_s/i64x2` | `0xb1`| - | +| `f64x2.convert_u/i64x2` | `0xb2`| - | From 36bbc08600a8d21b25ed9812dbc0689c621f9895 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Thu, 8 Nov 2018 11:21:40 -0800 Subject: [PATCH 024/378] Opcode adjustments (#51) * Move unary instructions before binary instructions. Fix order of floating point unary ops. * Move reserved spaces for reciprocal sqrt and approx reciprocal to the end of the unary op blocks. * Move shifts in between unary and binary ops since they are kind of hybrid. --- proposals/simd/BinarySIMD.md | 122 +++++++++++++++++------------------ 1 file changed, 61 insertions(+), 61 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 1c0610fd09..80dab1debf 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -98,67 +98,67 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `v128.xor` | `0x4e`| - | | `v128.not` | `0x4f`| - | | `v128.bitselect` | `0x50`| - | -| `i8x16.add` | `0x51`| - | -| `i8x16.add_saturate_s` | `0x52`| - | -| `i8x16.add_saturate_u` | `0x53`| - | -| `i8x16.sub` | `0x54`| - | -| `i8x16.sub_saturate_s` | `0x55`| - | -| `i8x16.sub_saturate_u` | `0x56`| - | -| `i8x16.mul` | `0x57`| - | -| `i8x16.shl` | `0x5c`| - | -| `i8x16.shr_s` | `0x5d`| - | -| `i8x16.shr_u` | `0x5e`| - | -| `i8x16.neg` | `0x5f`| - | -| `i8x16.any_true` | `0x60`| - | -| `i8x16.all_true` | `0x61`| - | -| `i16x8.add` | `0x62`| - | -| `i16x8.add_saturate_s` | `0x63`| - | -| `i16x8.add_saturate_u` | `0x64`| - | -| `i16x8.sub` | `0x65`| - | -| `i16x8.sub_saturate_s` | `0x66`| - | -| `i16x8.sub_saturate_u` | `0x67`| - | -| `i16x8.mul` | `0x68`| - | -| `i16x8.shl` | `0x6d`| - | -| `i16x8.shr_s` | `0x6e`| - | -| `i16x8.shr_u` | `0x6f`| - | -| `i16x8.neg` | `0x70`| - | -| `i16x8.any_true` | `0x71`| - | -| `i16x8.all_true` | `0x72`| - | -| `i32x4.add` | `0x73`| - | -| `i32x4.sub` | `0x76`| - | -| `i32x4.mul` | `0x79`| - | -| `i32x4.shl` | `0x7e`| - | -| `i32x4.shr_s` | `0x7f`| - | -| `i32x4.shr_u` | `0x80`| - | -| `i32x4.neg` | `0x81`| - | -| `i32x4.any_true` | `0x82`| - | -| `i32x4.all_true` | `0x83`| - | -| `i64x2.add` | `0x84`| - | -| `i64x2.sub` | `0x87`| - | -| `i64x2.shl` | `0x8f`| - | -| `i64x2.shr_s` | `0x90`| - | -| `i64x2.shr_u` | `0x91`| - | -| `i64x2.neg` | `0x92`| - | -| `i64x2.any_true` | `0x93`| - | -| `i64x2.all_true` | `0x94`| - | -| `f32x4.add` | `0x95`| - | -| `f32x4.sub` | `0x96`| - | -| `f32x4.mul` | `0x97`| - | -| `f32x4.div` | `0x98`| - | -| `f32x4.min` | `0x99`| - | -| `f32x4.max` | `0x9a`| - | -| `f32x4.neg` | `0x9b`| - | -| `f32x4.abs` | `0x9c`| - | -| `f32x4.sqrt` | `0x9d`| - | -| `f64x2.add` | `0xa0`| - | -| `f64x2.sub` | `0xa1`| - | -| `f64x2.mul` | `0xa2`| - | -| `f64x2.div` | `0xa3`| - | -| `f64x2.min` | `0xa4`| - | -| `f64x2.max` | `0xa5`| - | -| `f64x2.neg` | `0xa6`| - | -| `f64x2.abs` | `0xa7`| - | -| `f64x2.sqrt` | `0xa8`| - | +| `i8x16.neg` | `0x51`| - | +| `i8x16.any_true` | `0x52`| - | +| `i8x16.all_true` | `0x53`| - | +| `i8x16.shl` | `0x54`| - | +| `i8x16.shr_s` | `0x55`| - | +| `i8x16.shr_u` | `0x56`| - | +| `i8x16.add` | `0x57`| - | +| `i8x16.add_saturate_s` | `0x58`| - | +| `i8x16.add_saturate_u` | `0x59`| - | +| `i8x16.sub` | `0x5a`| - | +| `i8x16.sub_saturate_s` | `0x5b`| - | +| `i8x16.sub_saturate_u` | `0x5c`| - | +| `i8x16.mul` | `0x5d`| - | +| `i16x8.neg` | `0x62`| - | +| `i16x8.any_true` | `0x63`| - | +| `i16x8.all_true` | `0x64`| - | +| `i16x8.shl` | `0x65`| - | +| `i16x8.shr_s` | `0x66`| - | +| `i16x8.shr_u` | `0x67`| - | +| `i16x8.add` | `0x68`| - | +| `i16x8.add_saturate_s` | `0x69`| - | +| `i16x8.add_saturate_u` | `0x6a`| - | +| `i16x8.sub` | `0x6b`| - | +| `i16x8.sub_saturate_s` | `0x6c`| - | +| `i16x8.sub_saturate_u` | `0x6d`| - | +| `i16x8.mul` | `0x6e`| - | +| `i32x4.neg` | `0x73`| - | +| `i32x4.any_true` | `0x74`| - | +| `i32x4.all_true` | `0x75`| - | +| `i32x4.shl` | `0x76`| - | +| `i32x4.shr_s` | `0x77`| - | +| `i32x4.shr_u` | `0x78`| - | +| `i32x4.add` | `0x79`| - | +| `i32x4.sub` | `0x7c`| - | +| `i32x4.mul` | `0x7f`| - | +| `i64x2.neg` | `0x84`| - | +| `i64x2.any_true` | `0x85`| - | +| `i64x2.all_true` | `0x86`| - | +| `i64x2.shl` | `0x97`| - | +| `i64x2.shr_s` | `0x98`| - | +| `i64x2.shr_u` | `0x99`| - | +| `i64x2.add` | `0x8a`| - | +| `i64x2.sub` | `0x8d`| - | +| `f32x4.abs` | `0x95`| - | +| `f32x4.neg` | `0x96`| - | +| `f32x4.sqrt` | `0x97`| - | +| `f32x4.add` | `0x9a`| - | +| `f32x4.sub` | `0x9b`| - | +| `f32x4.mul` | `0x9c`| - | +| `f32x4.div` | `0x9d`| - | +| `f32x4.min` | `0x9e`| - | +| `f32x4.max` | `0x9f`| - | +| `f64x2.abs` | `0xa0`| - | +| `f64x2.neg` | `0xa1`| - | +| `f64x2.sqrt` | `0xa2`| - | +| `f64x2.add` | `0xa5`| - | +| `f64x2.sub` | `0xa6`| - | +| `f64x2.mul` | `0xa7`| - | +| `f64x2.div` | `0xa8`| - | +| `f64x2.min` | `0xa9`| - | +| `f64x2.max` | `0xaa`| - | | `i32x4.trunc_s/f32x4:sat` | `0xab`| - | | `i32x4.trunc_u/f32x4:sat` | `0xac`| - | | `i64x2.trunc_s/f64x2:sat` | `0xad`| - | From c7d08a97fb98ac6b2631596f914540d093f0e206 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Thu, 8 Nov 2018 13:13:01 -0800 Subject: [PATCH 025/378] Fix opcode typo (#53) --- proposals/simd/BinarySIMD.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 80dab1debf..1e98a6520c 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -136,9 +136,9 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i64x2.neg` | `0x84`| - | | `i64x2.any_true` | `0x85`| - | | `i64x2.all_true` | `0x86`| - | -| `i64x2.shl` | `0x97`| - | -| `i64x2.shr_s` | `0x98`| - | -| `i64x2.shr_u` | `0x99`| - | +| `i64x2.shl` | `0x87`| - | +| `i64x2.shr_s` | `0x88`| - | +| `i64x2.shr_u` | `0x89`| - | | `i64x2.add` | `0x8a`| - | | `i64x2.sub` | `0x8d`| - | | `f32x4.abs` | `0x95`| - | From 5613a7dd57c1b57a588ecc7b3e3325ca8940d200 Mon Sep 17 00:00:00 2001 From: Arun Date: Mon, 8 Oct 2018 12:35:01 -0700 Subject: [PATCH 026/378] JavaScript API and v128 --- proposals/simd/SIMD.md | 59 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index afcdc9c09d..83adeddbcd 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -104,6 +104,65 @@ operations. This means that any subnormal operand is treated as 0, and any subnormal result is rounded to 0. Note that this differs from WebAssembly scalar floating-point semantics which require correct subnormal handling. +# JavaScript API and SIMD Values + +Accessing WebAssembly module imports or exports containing SIMD Type from JavaScript will throw. + +### Module Function Imports + +Calling an imported function from JavaScript when the function arguments or result is of type v128 will cause the host function to immidiately throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror). + +### Exported Function Exotic Objects + +Invoking the [[Call]] method of an Exported Function Exotic Object when the function type of its [[Closure]] has an argument or result of type v128 will cause the host function to immidiately throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror). + + +## WebAssembly Module Instatiation + +Instantiating a WebAssembly Module from a Module moduleObject will throw a LinkError exception, when the global's valtype is v128 and the imported objects type is not WebAssembly.Global. + +## Exported Functions + +### Exported Function Call + +Calling an Exported Function will throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror), when parameters or results contains a v128. This error is thrown each time the [[Call]] method is invoked. + +### Creating a host function + +Creating a host function from JavaScript object will throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror), when the host function signature contains a v128. + +### Global constructor + +If Global(descriptor, v) constructor will throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror), when invoked with v of valuetype v128. + +## JavaScript coercion + +### ToJSValue + +The algorithm toJSValue(w) should have an assertion ensuring w is not of the form v128.const v128. + +### ToWebAssemblyValue + +The algorithm ToWebAssemblyValue(v, type) should have an assertion ensuring type is not v128. + +## JavaScript API Global Object algorithms + +### ToValueType + +The algorithm ToValueType(s) will return 'v128' if s equals "v128". + +### DefaultValue + +The algorithm DefaultValueType(valueType) will return v128.const 0. + +### GetGlobalValue + +The algorithm GetGlobalValue(Global global) will throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror), when type_global(store, global.[[Global]]) is of the form mut v128. + +### Global value attribute Setter + +The setter of the value attribute of Global will throw a [`TypeError`](https://tc39.github.io/ecma262/#sec-native-error-types-used-in-this-standard-typeerror), when invoked with a value v of valuetype v128. + # Operations The SIMD operations described in this sections are generally named From 92a8e44463eee53dfdb54d13eb7ae98a101f5f95 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Wed, 14 Nov 2018 16:31:40 -0800 Subject: [PATCH 027/378] Fix ordering for v128 operations (#54) --- proposals/simd/BinarySIMD.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 1e98a6520c..08dadda339 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -93,10 +93,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `f64x2.gt` | `0x49`| - | | `f64x2.le` | `0x4a`| - | | `f64x2.ge` | `0x4b`| - | -| `v128.and` | `0x4c`| - | -| `v128.or` | `0x4d`| - | -| `v128.xor` | `0x4e`| - | -| `v128.not` | `0x4f`| - | +| `v128.not` | `0x4c`| - | +| `v128.and` | `0x4d`| - | +| `v128.or` | `0x4e`| - | +| `v128.xor` | `0x4f`| - | | `v128.bitselect` | `0x50`| - | | `i8x16.neg` | `0x51`| - | | `i8x16.any_true` | `0x52`| - | From 8f49ab84db8bd88e3d48c26ca7d8939bb8181d7c Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+aretmr@users.noreply.github.com> Date: Sat, 8 Dec 2018 16:47:18 -0800 Subject: [PATCH 028/378] Adding reference to design issue Adding reference to design issue --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 8cf5255e76..878fb89c79 100644 --- a/README.md +++ b/README.md @@ -12,3 +12,5 @@ ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the resulted. The [proposed specification](proposals/simd/SIMD.md) has the details. + +[Design issue](https://github.com/WebAssembly/proposals/issues/1) From 81081fe73ac024467313afae84158d12a6cf3586 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Mon, 17 Dec 2018 11:06:25 -0800 Subject: [PATCH 029/378] Remove text about flushing of subnormals (#59) Default to full IEEE 754 support for now. The issue of handling subnormals needs to be addressed (possibly by a global FTZ flag or mode switching), but allowing platforms to behave differently on FTZ semantics should not be baked into the specification. --- proposals/simd/SIMD.md | 5 ----- 1 file changed, 5 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 30c96a814a..08c36cc15f 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -99,11 +99,6 @@ WebAssembly's scalar floating-point operations. In particular, the rules about NaN propagation and default NaN values are the same, and all operations use the default *roundTiesToEven* rounding mode. -An implementation is allowed to flush subnormals in arithmetic floating-point -operations. This means that any subnormal operand is treated as 0, and any -subnormal result is rounded to 0. Note that this differs from WebAssembly -scalar floating-point semantics which require correct subnormal handling. - # JavaScript API and SIMD Values Accessing WebAssembly module imports or exports containing SIMD Type from JavaScript will throw. From 324cfa1642228af9977234538eccd45516844a19 Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Tue, 18 Dec 2018 00:01:48 +0100 Subject: [PATCH 030/378] Rename LaneIdx{2,4,8,16,32} to ImmLaneIdx{2,4,8,16,32} (#34) * Rename LaneIdx{2,4,8,16,32} to ImmLaneIdx{2,4,8,16,32} This makes it clear everywhere that `ImmLaneIdx` is an immediate operand and also makes the nomenclature for immediate operands consistent (both `ImmByte` and `ImmLaneIdx` start with the prefix `Imm`) . See https://github.com/WebAssembly/simd/issues/33 . * further clarify the representation hierarchies and immediate mode operands * memarg is an immediate mode argument * reference scalar load/stores spec * Fix typo: floating-point value to integer-value * Fix memarg * Fix language in replace value * Update "hierarchy" of types paragraph --- proposals/simd/SIMD.md | 110 +++++++++++++++++++++++++---------------- 1 file changed, 68 insertions(+), 42 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 08c36cc15f..4df5f9a3d6 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -13,12 +13,13 @@ of immediate operands used by the SIMD instructions. ## SIMD value type -The `v128` value type has a concrete mapping to a 128-bit representation with bits -numbered 0–127. The `v128` type corresponds to a vector register in a typical -SIMD ISA. The interpretation of the 128 bits in the vector register is provided -by the individual instructions. When a `v128` value is represented as 16 bytes, -bits 0-7 go in the first byte with bit 0 as the LSB, bits 8-15 go in the second -byte, etc. +The `v128` value type is the _only_ type introduced in this extension. It has a +concrete mapping to a 128-bit representation with bits numbered 0–127. The +`v128` type corresponds to a vector register in a typical SIMD ISA. The +interpretation of the 128 bits in the vector register is provided by the +individual instructions. When a `v128` value is represented as 16 bytes, bits +0-7 go in the first byte with bit 0 as the LSB, bits 8-15 go in the second byte, +etc. ## Immediate operands @@ -27,17 +28,32 @@ encoded as individual bytes in the binary encoding. Many have a limited valid range, and it is a validation error if the immediate operands are out of range. * `ImmByte`: A single unconstrained byte (0-255). -* `LaneIdx2`: A byte with values in the range 0–1 identifying a lane. -* `LaneIdx4`: A byte with values in the range 0–3 identifying a lane. -* `LaneIdx8`: A byte with values in the range 0–7 identifying a lane. -* `LaneIdx16`: A byte with values in the range 0–15 identifying a lane. -* `LaneIdx32`: A byte with values in the range 0–31 identifying a lane. +* `ImmLaneIdx2`: A byte with values in the range 0–1 identifying a lane. +* `ImmLaneIdx4`: A byte with values in the range 0–3 identifying a lane. +* `ImmLaneIdx8`: A byte with values in the range 0–7 identifying a lane. +* `ImmLaneIdx16`: A byte with values in the range 0–15 identifying a lane. +* `ImmLaneIdx32`: A byte with values in the range 0–31 identifying a lane. -## Interpreting the SIMD value type +## Operations on the SIMD value type -The single `v128` SIMD type can represent packed data in multiple ways. -Instructions specify how the bits should be interpreted through a hierarchy of -*interpretations*. +The _single_ `v128` SIMD type can be used to represent different types of packed +data, e.g., it can represent four 32-bit floating point values, 8 16-bit signed +or unsigned integer values, etc. + +The instructions introduced in this specification are named according to the +following schema: `{interpretation}.{operation}`. Where the `{interpretation}` +prefix denotes how the bytes of the `v128` type are interpreted by the `{operation}`. + +For example, the instructions `f32x4.extract_lane` and `i64x2.extract_lane` +perform the same semantic operation: extracting the scalar value of a vector +lane. However, the `f32x4.extract_lane` instruction returns a 32-bit wide +floating point value, while the `i64x2.extract_lane` instruction returns a +64-bit wide integer value. + +The `v128` vector type interpretation interprets the vector as a bag of bits. +The `v{lane_width}x{n}` interpretations (e.g. `v32x4`) interpret the vector as +`n` lanes of `lane_width` bits. The `{t}{lane_width}x{n}` interpretations (e.g. +`i32x4` or `f32x4`) interpret the vector as `n` lanes of type `{t}{lane_width}`. ### Lane division interpretation @@ -162,7 +178,7 @@ The setter of the value attribute of Global will throw a [`TypeError`](https://t The SIMD operations described in this sections are generally named `S.Op`, where `S` is either a SIMD type or one of the interpretations -of a SIMD type. +of a SIMD type. Immediate mode operands are prefixed with `imm`. Many operations are simply the lane-wise application of a scalar operation: @@ -197,9 +213,9 @@ def S.lanewise_comparison(func, a, b): ### Constant * `v128.const(imm: ImmByte[16]) -> v128` -Materialize a constant SIMD value from the immediate operands. The `v128.const` -instruction is encoded with 16 immediate bytes which provide the bits of the -vector directly. +Materialize a constant `v128` SIMD value from the 16 immediate bytes in the +immediate mode operand `imm` . The `v128.const` instruction is encoded with 16 +immediate bytes which provide the bits of the vector directly. ### Create vector with identical lanes * `i8x16.splat(x: i32) -> v128` @@ -222,16 +238,18 @@ def S.splat(x): ## Accessing lanes ### Extract lane as a scalar -* `i8x16.extract_lane_s(a: v128, i: LaneIdx16) -> i32` -* `i8x16.extract_lane_u(a: v128, i: LaneIdx16) -> i32` -* `i16x8.extract_lane_s(a: v128, i: LaneIdx8) -> i32` -* `i16x8.extract_lane_u(a: v128, i: LaneIdx8) -> i32` -* `i32x4.extract_lane(a: v128, i: LaneIdx4) -> i32` -* `i64x2.extract_lane(a: v128, i: LaneIdx2) -> i64` -* `f32x4.extract_lane(a: v128, i: LaneIdx4) -> f32` -* `f64x2.extract_lane(a: v128, i: LaneIdx2) -> f64` - -Extract the value of lane `i` in `a`. +* `i8x16.extract_lane_s(a: v128, imm: ImmLaneIdx16) -> i32` +* `i8x16.extract_lane_u(a: v128, imm: ImmLaneIdx16) -> i32` +* `i16x8.extract_lane_s(a: v128, imm: ImmLaneIdx8) -> i32` +* `i16x8.extract_lane_u(a: v128, imm: ImmLaneIdx8) -> i32` +* `i32x4.extract_lane(a: v128, imm: ImmLaneIdx4) -> i32` +* `i64x2.extract_lane(a: v128, imm: ImmLaneIdx2) -> i64` +* `f32x4.extract_lane(a: v128, imm: ImmLaneIdx4) -> f32` +* `f64x2.extract_lane(a: v128, imm: ImmLaneIdx2) -> f64` + +Extract the scalar value of lane specified in the immediate mode operand `imm` +in `a`. The `{interpretation}.extract_lane{_s}{_u}` instructions are encoded +with one immediate byte providing the index of the lane to extract. ```python def S.extract_lane(a, i): @@ -242,15 +260,17 @@ The `_s` and `_u` variants will sign-extend or zero-extend the lane value to `i32` respectively. ### Replace lane value -* `i8x16.replace_lane(a: v128, i: LaneIdx16, x: i32) -> v128` -* `i16x8.replace_lane(a: v128, i: LaneIdx8, x: i32) -> v128` -* `i32x4.replace_lane(a: v128, i: LaneIdx4, x: i32) -> v128` -* `i64x2.replace_lane(a: v128, i: LaneIdx2, x: i64) -> v128` -* `f32x4.replace_lane(a: v128, i: LaneIdx4, x: f32) -> v128` -* `f64x2.replace_lane(a: v128, i: LaneIdx2, x: f64) -> v128` - -Return a new vector with lanes identical to `a`, except for lane `i` which has -the value `x`. +* `i8x16.replace_lane(a: v128, imm: ImmLaneIdx16, x: i32) -> v128` +* `i16x8.replace_lane(a: v128, imm: ImmLaneIdx8, x: i32) -> v128` +* `i32x4.replace_lane(a: v128, imm: ImmLaneIdx4, x: i32) -> v128` +* `i64x2.replace_lane(a: v128, imm: ImmLaneIdx2, x: i64) -> v128` +* `f32x4.replace_lane(a: v128, imm: ImmLaneIdx4, x: f32) -> v128` +* `f64x2.replace_lane(a: v128, imm: ImmLaneIdx2, x: f64) -> v128` + +Return a new vector with lanes identical to `a`, except for the lane specified +in the immediate mode operand `imm` which has the value `x`. The +`{interpretation}.replace_lane` instructions are encoded with an immediate byte +providing the index of the lane the value of which is to be replaced. ```python def S.replace_lane(a, i, x): @@ -265,9 +285,13 @@ The input lane value, `x`, is interpreted the same way as for the splat instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. ### Shuffle lanes -* `v8x16.shuffle(a: v128, b: v128, s: LaneIdx32[16]) -> v128` +* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` -Create vector with lanes selected from the lanes of two input vectors: +Returns a new vector with lanes selected from the lanes of the two input vectors +`a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This +instruction is encoded with 16 bytes providing the indices of the elements to +return. The indices `i` in range `[0, 15]` select the `i`-th element of `a`. The +indices in range `[16, 31]` select the `i - 16`-th element of `b`. ```python def S.shuffle(a, b, s): @@ -612,8 +636,10 @@ def S.ne(a, b): Load and store operations are provided for the `v128` vectors. The memory operations take the same arguments and have the same semantics as the existing -scalar WebAssembly load and store instructions. The difference is that the -memory access size is 16 bytes which is also the natural alignment. +scalar WebAssembly load and store instructions (see +[memarg](https://webassembly.github.io/spec/core/bikeshed/index.html#syntax-memarg). +The difference is that the memory access size is 16 bytes which is also the +natural alignment. ### Load From 54fdb4772dcca153d54ca6d072332e2bc79a253e Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 28 Jan 2019 15:22:21 -0800 Subject: [PATCH 031/378] v128.const text (#65) --- proposals/simd/TextSIMD.md | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 proposals/simd/TextSIMD.md diff --git a/proposals/simd/TextSIMD.md b/proposals/simd/TextSIMD.md new file mode 100644 index 0000000000..21b4272e85 --- /dev/null +++ b/proposals/simd/TextSIMD.md @@ -0,0 +1,21 @@ +# Text format for SIMD + +### v128.const + +The `v128.const` instruction has multiple valid text formats corresponding to +different lane interpretations. The valid text formats are + +``` +v128.const i8x16 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 +v128.const i16x8 i16 i16 i16 i16 i16 i16 i16 i16 +v128.const i32x4 i32 i32 i32 i32 +v128.const i64x2 i64 i64 +v128.const f32x4 f32 f32 f32 f32 +v128.const f64x2 f64 f64 +``` + +The canonical text format used for printing `v128.const` instructions is + +``` +v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN +``` From e347d9d820e1ee3b74c3ba54ba1f2beed2949ff3 Mon Sep 17 00:00:00 2001 From: Nathan Froyd Date: Wed, 30 Jan 2019 08:51:09 -0500 Subject: [PATCH 032/378] fix typo in not-equal comparison description --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4df5f9a3d6..bb8d1d4a75 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -583,7 +583,7 @@ def S.eq(a, b): * `f32x4.ne(a: v128, b: v128) -> v128` * `f64x2.ne(a: v128, b: v128) -> v128` -The `ne` operations produce the inverse of their `ne` counterparts: +The `ne` operations produce the inverse of their `eq` counterparts: ```python def S.ne(a, b): From a289c58fe40e42bb184ffa004b3800f2d2a9ba05 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 4 Mar 2019 18:09:27 -0800 Subject: [PATCH 033/378] Specify v8x16.shuffle text format (#67) Separate each lane index because they are always interpreted independently. --- proposals/simd/TextSIMD.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/proposals/simd/TextSIMD.md b/proposals/simd/TextSIMD.md index 21b4272e85..8ba2e4a7b6 100644 --- a/proposals/simd/TextSIMD.md +++ b/proposals/simd/TextSIMD.md @@ -19,3 +19,9 @@ The canonical text format used for printing `v128.const` instructions is ``` v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN ``` + +### v8x16.shuffle + +``` +v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 +``` From 7f4d54d4c9a525f6e04c7edcecdc1969f27e5d09 Mon Sep 17 00:00:00 2001 From: Arseny Kapoulkine Date: Wed, 27 Mar 2019 10:10:01 -0700 Subject: [PATCH 034/378] Add v8x16.shuffle1 instruction (#71) This change adds a variable shuffle instruction to SIMD proposal. When indices are out of range, the result is specified as 0 for each lane. This matches hardware behavior on ARM and RISCV architectures. On x86_64 and MIPS, the hardware provides instructions that can select 0 when the high bit is set to 1 (x86_64) or any of the two high bits are set to 1 (MIPS). On these architectures, the backend is expected to emit a pair of instructions, saturating add (saturate(x + (128 - 16)) for x86_64) and permute, to emulate the proposed behavior. To distinguish variable shuffles with immediate shuffles, existing v8x16.shuffle instruction is renamed to v8x16.shuffle2_imm to be explicit about the fact that it shuffles two vectors with an immediate argument. This naming scheme allows for adding variants like v8x16.shuffle2 and v8x16.shuffle1_imm in the future. Fixes #68. Contributes to #24. Fixes #11. --- proposals/simd/BinarySIMD.md | 5 +++-- proposals/simd/SIMD.md | 25 ++++++++++++++++++++++--- proposals/simd/TextSIMD.md | 4 ++-- 3 files changed, 27 insertions(+), 7 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 08dadda339..ff51a7f0f1 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -23,14 +23,13 @@ instr ::= ... ``` Some SIMD instructions have additional immediate operands following `simdop`. -The `v8x16.shuffle` instruction has 16 bytes after `simdop`. +The `v8x16.shuffle2_imm` instruction has 16 bytes after `simdop`. | Instruction | `simdop` | Immediate operands | | --------------------------|---------:|--------------------| | `v128.load` | `0x00`| m:memarg | | `v128.store` | `0x01`| m:memarg | | `v128.const` | `0x02`| i:ImmByte[16] | -| `v8x16.shuffle` | `0x03`| s:LaneIdx32[16] | | `i8x16.splat` | `0x04`| - | | `i8x16.extract_lane_s` | `0x05`| i:LaneIdx16 | | `i8x16.extract_lane_u` | `0x06`| i:LaneIdx16 | @@ -167,3 +166,5 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `f32x4.convert_u/i32x4` | `0xb0`| - | | `f64x2.convert_s/i64x2` | `0xb1`| - | | `f64x2.convert_u/i64x2` | `0xb2`| - | +| `v8x16.shuffle1` | `0xc0`| - | +| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] | \ No newline at end of file diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index bb8d1d4a75..4862364e8e 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -284,8 +284,8 @@ def S.replace_lane(a, i, x): The input lane value, `x`, is interpreted the same way as for the splat instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. -### Shuffle lanes -* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` +### Shuffling using immediate indices +* `v8x16.shuffle2_imm(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` Returns a new vector with lanes selected from the lanes of the two input vectors `a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This @@ -294,7 +294,7 @@ return. The indices `i` in range `[0, 15]` select the `i`-th element of `a`. The indices in range `[16, 31]` select the `i - 16`-th element of `b`. ```python -def S.shuffle(a, b, s): +def S.shuffle2_imm(a, b, s): result = S.New() for i in range(S.Lanes): if s[i] < S.lanes: @@ -304,6 +304,25 @@ def S.shuffle(a, b, s): return result ``` +### Shuffling using variable indices +* `v8x16.shuffle1(a: v128, s: v128) -> v128` + +Returns a new vector with lanes selected from the lanes of the first input +vector `a` specified in the second input vector `s`. The indices `i` in range +`[0, 15]` select the `i`-th element of `a`. For indices outside of the range +the resulting lane is 0. + +```python +def S.shuffle1(a, s): + result = S.New() + for i in range(S.Lanes): + if s[i] < S.lanes: + result[i] = a[s[i]] + else: + result[i] = 0 + return result +``` + ## Integer arithmetic Wrapping integer arithmetic discards the high bits of the result. diff --git a/proposals/simd/TextSIMD.md b/proposals/simd/TextSIMD.md index 8ba2e4a7b6..fc3a7e7d2c 100644 --- a/proposals/simd/TextSIMD.md +++ b/proposals/simd/TextSIMD.md @@ -20,8 +20,8 @@ The canonical text format used for printing `v128.const` instructions is v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN ``` -### v8x16.shuffle +### v8x16.shuffle2_imm ``` -v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 +v8x16.shuffle2_imm i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 ``` From ca03287debc5e60f082efa948706f46165b2a877 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 29 Apr 2019 21:10:38 -0700 Subject: [PATCH 035/378] ImplementationStatus.md (#73) A centralized location for seeing how up-to-date various implementations are. --- proposals/simd/ImplementationStatus.md | 147 +++++++++++++++++++++++++ 1 file changed, 147 insertions(+) create mode 100644 proposals/simd/ImplementationStatus.md diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md new file mode 100644 index 0000000000..cb402bcc7d --- /dev/null +++ b/proposals/simd/ImplementationStatus.md @@ -0,0 +1,147 @@ +| Instruction | LLVM[1] | V8[2] | +| --------------------------|---------------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | | +| `i64x2.extract_lane` | `-munimplemented-simd128` | | +| `i64x2.replace_lane` | `-munimplemented-simd128` | | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | | +| `f64x2.extract_lane` | `-munimplemented-simd128` | | +| `f64x2.replace_lane` | `-munimplemented-simd128` | | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | | +| `f64x2.ne` | `-munimplemented-simd128` | | +| `f64x2.lt` | `-munimplemented-simd128` | | +| `f64x2.gt` | `-munimplemented-simd128` | | +| `f64x2.le` | `-munimplemented-simd128` | | +| `f64x2.ge` | `-munimplemented-simd128` | | +| `v128.not` | `-msimd128` | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | | +| `i8x16.shr_s` | `-munimplemented-simd128` | | +| `i8x16.shr_u` | `-munimplemented-simd128` | | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | +| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | | +| `i16x8.shr_s` | `-munimplemented-simd128` | | +| `i16x8.shr_u` | `-munimplemented-simd128` | | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | | +| `i32x4.shr_s` | `-munimplemented-simd128` | | +| `i32x4.shr_u` | `-munimplemented-simd128` | | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | | +| `i64x2.any_true` | `-munimplemented-simd128` | | +| `i64x2.all_true` | `-munimplemented-simd128` | | +| `i64x2.shl` | `-munimplemented-simd128` | | +| `i64x2.shr_s` | `-munimplemented-simd128` | | +| `i64x2.shr_u` | `-munimplemented-simd128` | | +| `i64x2.add` | `-munimplemented-simd128` | | +| `i64x2.sub` | `-munimplemented-simd128` | | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | +| `f32x4.sqrt` | `-munimplemented-simd128` | | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | | +| `f64x2.neg` | `-munimplemented-simd128` | | +| `f64x2.sqrt` | `-munimplemented-simd128` | | +| `f64x2.add` | `-munimplemented-simd128` | | +| `f64x2.sub` | `-munimplemented-simd128` | | +| `f64x2.mul` | `-munimplemented-simd128` | | +| `f64x2.div` | `-munimplemented-simd128` | | +| `f64x2.min` | `-munimplemented-simd128` | | +| `f64x2.max` | `-munimplemented-simd128` | | +| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | +| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | +| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | +| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | +| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | +| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | +| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | +| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | +| `v8x16.shuffle1` | | | +| `v8x16.shuffle2_imm` | | | + +[1] Tip of tree LLVM as of April 24, 2019 + +[2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` From 0e9df42033019db8a1da3bbcb2c29355ca8a2e53 Mon Sep 17 00:00:00 2001 From: Arun Date: Tue, 30 Apr 2019 10:02:14 -0700 Subject: [PATCH 036/378] capturing sync notes in spec repo --- meetings/meeting-4-24-19.md | 104 ++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 meetings/meeting-4-24-19.md diff --git a/meetings/meeting-4-24-19.md b/meetings/meeting-4-24-19.md new file mode 100644 index 0000000000..4a07332f2f --- /dev/null +++ b/meetings/meeting-4-24-19.md @@ -0,0 +1,104 @@ +WebAssembly SIMD Meeting + +When: 4/23/2019 + +Attendees: +Deepti Gandluri (DG) +Peter Jensen (PJ) +Petr Penzin (PP) +Richard Winterton (RW) +Thomas Lively (TL) +Arun Purushan (AP) +Marat Dukhan (MD) + +Agenda: +SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 +C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 +SIMD Spec tests +CG F2F Simd topics +Future Meeting timings + + + + +Details: +SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 +TL: Versioning the proposal will be useful as there are multiple implementations, engines and toolchain. Churn on instructions are implemented/ buggy/ proposed etc. Early adopters expressed concern about mismatch in expectations. Toolchain and v8 has some ops missing. Tag versions of the proposal. Simple and lightweight. Examples: V1 v2 v3 etc saying latest version of llv matches v2 of spec through a tag. Latest version of v8 supports v2 etc. Feedback that proposal v8 centric. Can be changed. Looking for more feedback. +AP: There seems to be some precedence to this from JS. We need to consider that. Agree that implementer references needs to be taken out. Timing to start was an open. Suggest we start when the implementations catch up rather than dropping instr. +DG: Replace v8 with any implementor. Disagree to wait for implementor to catch up. Sooner is better. Ran into Dan Ernberg and had precedence to try to version based on spec version. Unclear on the issues, ccd him and we should await feedback. +TL: Waiting is nice but, Sooner is better. V8 might not be implementing i64/f64 soon. Waiting for v8 to catch up is saying we are not going to version. Wouldnt Make sense to chakra and v8 to point to the same version as they dont implement the same. May be versions dont need to be linear order. Create a tag in the repo etc.. +DG: May be it makes sense to stay away from implementer based tag. Implementor agnostic tag will be useful. 64x2 is yet to see test cases or use cases asking for it. Not sure if its a useful subset or not. +TL: Users might want to match toolchain-engine-doc. If different engine implement different subset, useful to have separate tags for separate subsets. +DG: Agree that we need different tags. Spec needs to be implementation agnostic. Users should be able to look up this info in a document may beThe details can reside in other documentation. Doesn't necessarily need to happen in the spec. v8/chakra release notes with ref to tags is better. Spec shouldnt have any implementation ref. +TL: Maybe we don't need to modify the spec at all, just have documentation capturing the support info. +DG: As long as we agree on what doc looks like, we dont need to version the spec. Versioning makes sense witht the branches. We need to have more conversations. For the time being we can have a document. +RW: As long as there is a mapping from implementers to the spec, that would do. As long as we can have a mapping to what's implemented, its useful. Ie. color scheme/venn diagram with versioning somewhere in the document. +TL: what if we check in a markdown file big table updated by all implementers. Ultra lightweight. + +AR: Tomas will create a PR with a V8 column. Arun/Petr update chakra column. +DG: has chakra implementation been tested? +PP: Tested against its own tests with wabt . Toolchain some experiments on going. +DG: Tomas has exhaustive tests on simd. May be its a good idea to run them in chakra. +RW: Its in the emscripten tests already. May be we can add intrinsics too. +TL : New Emscripten PR to add test mode for simd. Able to run entire emscriten test suite with simd enabled once it lands. I will cc some of you on that PR. +AP: OK, we will pick it up and test against chakra. + + +C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 +RW: Pretty much covered. Belongs in emscripten at some point. Probably could move over to clang. Open question is where does it reside long term, in Clang or Emscripten? We can move over to clang in some point in future. +TL: Are there any wasm pre existing headers in Clang? +PP: No, not yet. This is simd128, wasm will have more ops. Also, there are WASM memory operations that would need intrinsics at some point. Should those be in a separate header? +TL: We have compiler builtins for that stuff. No one has made any intrinsics TMK. That could go in there too. We might want separate header for them. Makes sense to keep simd intrinsics separate from memory intrinsics. +PP: Another difference bw emscripten and clang is clang doesn’t include tests for the intrinsics, only for builtins. +TL: Clang tests are compiled but not executed, they only check that code is produced. That is why I want the libs folder. directory with headers. We might need to have them in both places. +AP: Why is this needed to be duplicated? +TL: Not sure emscripten going to use clang headers, it will use its own libc. +AP: Why emscripten is not using it? +RW: If you use emscripten sdk you not going to get all clang headers with it. +TL: Switching to llvm backend in emscripten, once we have headers in clang, there will be an incentive to use clang headers. We might need to duplicate for now. +PP: What is the difference between clang in emscripten. Fastcom clang and actual. +TL: Fastcom is not based on trunk llvm, old llvm. And it has fastcomp backend compiles directly to llvm ir to js. It doesn't know anything about wasm. It transfers to asm js and then wasm. Working on deprecating that. +RW: To get simd support in Emscripten we have to pull down simd branch Tomas created. +TL: SIMD doesn't work with fastcomp. It works with the new backend. +TL: WASM simd intrinsics are not merged to upstream yet. If you just use emscripten from emsdk, it uses fastcomp and does not support simd at all. + +SIMD Spec tests +AP: We discussed internally and we might be able to help with simd spec tests +DG: Any help will be appreciated. Google already working on toolchain and implementation and this will help to move the proposal forward quicker. Do you have a timeline on when it can be started. +AP: Need to get back to you on this. They are already doing work on core spec and RW’s intrinsics. Need to sync and find out. +DG: Sounds good. Really encouraging to see you might be able to help. After the in person meeting, we will start looking into some of these. There is enough work, we can work together. We have ref interpreter work and spec tests. We can collaborate. +CG F2F Simd topics +AP: Any simd topics to discuss at the F2F forum. Can we push for stage 2? Anything else that we need to be prepared with. +DG: we are trying to get some FP numbers. So that we will include those in the spec tests. Confident that it is possible. Add agenda to simd proposal as an update to the simd proposal. Goal is pushing to Stage2. Who is attending? +AP: not confirmed yet. +PJ: Not going? +DG: I should be going. Sharing simd stuff there. +TL: will attend. +RW: Not attending. +PP: FP numbers ? We will think about getting some numbers. +DG: It was the feedback that we got from the community. We had integer data from Webp is a codec team at google. +AR: We may be able to look into some chakra data as well. +PP: Will consider it. +MD: Lack of FMA in simd proposal is a concern for ML applications. It can hit pref upto 2x +DG: WebP team has the same feedback. We are considering to add it. If you can put together a pr with results we will be happy to review that. +PP: We can prototype it. +MD: Did my basic experiemnts and there is significant speedup. +RW: I want to add sign extend and load extend. +DG: Please create a PR +AR: Rich to create a PR +MD: There is not a simple way to sore parts of a simd reg. Ie store only in 64bit simd, in wasm it needs to be done in a roundabout way. +RW: you want to store partial registers right? +MD: yes. Currently it can be done only through extract. +DG: Do you know how useful it is and how much overhead is causing? +MD: We use it often, hard to quantify impact. Prefer to have these explicitly. +PJ: SImdjs had load1, load2 load3 etc for partial load and store. +DG: Yes. +RW: Dont know the history of why we only wanted 128. Else we can just propose it. We seems to have a new list to add +DG: FMA already has an issue, load extension RW to follow up. We cna have a new issue for partial stores and loads. +Future Meeting timings +DG: Didnt hear from people in EU time zone with interest. Current slot seems to work for now. Let's continue until this is needed. + +Open: +RW: Fyi for TL . requested help with tianyou’s team with validation. + + From 41b0a298bbe5fc6e99e2d89f86591f4653eef936 Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+arunetm@users.noreply.github.com> Date: Tue, 30 Apr 2019 10:13:35 -0700 Subject: [PATCH 037/378] Update meeting-4-24-19.md --- meetings/meeting-4-24-19.md | 120 ++++++++++++++++++++++++++++-------- 1 file changed, 95 insertions(+), 25 deletions(-) diff --git a/meetings/meeting-4-24-19.md b/meetings/meeting-4-24-19.md index 4a07332f2f..6d4a4ffb96 100644 --- a/meetings/meeting-4-24-19.md +++ b/meetings/meeting-4-24-19.md @@ -1,101 +1,171 @@ -WebAssembly SIMD Meeting - -When: 4/23/2019 - -Attendees: -Deepti Gandluri (DG) -Peter Jensen (PJ) -Petr Penzin (PP) -Richard Winterton (RW) -Thomas Lively (TL) -Arun Purushan (AP) -Marat Dukhan (MD) - -Agenda: -SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 -C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 -SIMD Spec tests -CG F2F Simd topics -Future Meeting timings +# WebAssembly SIMD Meeting + +- **When:** 4/23/2019 + +## Attendees: + +- Deepti Gandluri (DG) +- Peter Jensen (PJ) +- Petr Penzin (PP) +- Richard Winterton (RW) +- Thomas Lively (TL) +- Arun Purushan (AP) +- Marat Dukhan (MD) + +## Agenda: +- SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 +- C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 +- SIMD Spec tests +- CG F2F Simd topics +- Future Meeting timings -Details: -SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 + +## Details: +*SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72* + TL: Versioning the proposal will be useful as there are multiple implementations, engines and toolchain. Churn on instructions are implemented/ buggy/ proposed etc. Early adopters expressed concern about mismatch in expectations. Toolchain and v8 has some ops missing. Tag versions of the proposal. Simple and lightweight. Examples: V1 v2 v3 etc saying latest version of llv matches v2 of spec through a tag. Latest version of v8 supports v2 etc. Feedback that proposal v8 centric. Can be changed. Looking for more feedback. + AP: There seems to be some precedence to this from JS. We need to consider that. Agree that implementer references needs to be taken out. Timing to start was an open. Suggest we start when the implementations catch up rather than dropping instr. + DG: Replace v8 with any implementor. Disagree to wait for implementor to catch up. Sooner is better. Ran into Dan Ernberg and had precedence to try to version based on spec version. Unclear on the issues, ccd him and we should await feedback. + TL: Waiting is nice but, Sooner is better. V8 might not be implementing i64/f64 soon. Waiting for v8 to catch up is saying we are not going to version. Wouldnt Make sense to chakra and v8 to point to the same version as they dont implement the same. May be versions dont need to be linear order. Create a tag in the repo etc.. + DG: May be it makes sense to stay away from implementer based tag. Implementor agnostic tag will be useful. 64x2 is yet to see test cases or use cases asking for it. Not sure if its a useful subset or not. + TL: Users might want to match toolchain-engine-doc. If different engine implement different subset, useful to have separate tags for separate subsets. + DG: Agree that we need different tags. Spec needs to be implementation agnostic. Users should be able to look up this info in a document may beThe details can reside in other documentation. Doesn't necessarily need to happen in the spec. v8/chakra release notes with ref to tags is better. Spec shouldnt have any implementation ref. + TL: Maybe we don't need to modify the spec at all, just have documentation capturing the support info. + DG: As long as we agree on what doc looks like, we dont need to version the spec. Versioning makes sense witht the branches. We need to have more conversations. For the time being we can have a document. + RW: As long as there is a mapping from implementers to the spec, that would do. As long as we can have a mapping to what's implemented, its useful. Ie. color scheme/venn diagram with versioning somewhere in the document. + TL: what if we check in a markdown file big table updated by all implementers. Ultra lightweight. + AR: Tomas will create a PR with a V8 column. Arun/Petr update chakra column. + DG: has chakra implementation been tested? + PP: Tested against its own tests with wabt . Toolchain some experiments on going. + DG: Tomas has exhaustive tests on simd. May be its a good idea to run them in chakra. + RW: Its in the emscripten tests already. May be we can add intrinsics too. + TL : New Emscripten PR to add test mode for simd. Able to run entire emscriten test suite with simd enabled once it lands. I will cc some of you on that PR. + AP: OK, we will pick it up and test against chakra. -C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 +*C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108* + RW: Pretty much covered. Belongs in emscripten at some point. Probably could move over to clang. Open question is where does it reside long term, in Clang or Emscripten? We can move over to clang in some point in future. + TL: Are there any wasm pre existing headers in Clang? + PP: No, not yet. This is simd128, wasm will have more ops. Also, there are WASM memory operations that would need intrinsics at some point. Should those be in a separate header? -TL: We have compiler builtins for that stuff. No one has made any intrinsics TMK. That could go in there too. We might want separate header for them. Makes sense to keep simd intrinsics separate from memory intrinsics. + +TL: We have compiler builtins for that stuff. No one has made any intrinsics TMK. That could go in there too. We might want separate +header for them. Makes sense to keep simd intrinsics separate from memory intrinsics. + PP: Another difference bw emscripten and clang is clang doesn’t include tests for the intrinsics, only for builtins. + TL: Clang tests are compiled but not executed, they only check that code is produced. That is why I want the libs folder. directory with headers. We might need to have them in both places. + AP: Why is this needed to be duplicated? + TL: Not sure emscripten going to use clang headers, it will use its own libc. + AP: Why emscripten is not using it? + RW: If you use emscripten sdk you not going to get all clang headers with it. + TL: Switching to llvm backend in emscripten, once we have headers in clang, there will be an incentive to use clang headers. We might need to duplicate for now. + PP: What is the difference between clang in emscripten. Fastcom clang and actual. + TL: Fastcom is not based on trunk llvm, old llvm. And it has fastcomp backend compiles directly to llvm ir to js. It doesn't know anything about wasm. It transfers to asm js and then wasm. Working on deprecating that. + RW: To get simd support in Emscripten we have to pull down simd branch Tomas created. + TL: SIMD doesn't work with fastcomp. It works with the new backend. + TL: WASM simd intrinsics are not merged to upstream yet. If you just use emscripten from emsdk, it uses fastcomp and does not support simd at all. -SIMD Spec tests +*SIMD Spec tests* + AP: We discussed internally and we might be able to help with simd spec tests + DG: Any help will be appreciated. Google already working on toolchain and implementation and this will help to move the proposal forward quicker. Do you have a timeline on when it can be started. + AP: Need to get back to you on this. They are already doing work on core spec and RW’s intrinsics. Need to sync and find out. + DG: Sounds good. Really encouraging to see you might be able to help. After the in person meeting, we will start looking into some of these. There is enough work, we can work together. We have ref interpreter work and spec tests. We can collaborate. -CG F2F Simd topics + +*CG F2F Simd topics* + AP: Any simd topics to discuss at the F2F forum. Can we push for stage 2? Anything else that we need to be prepared with. + DG: we are trying to get some FP numbers. So that we will include those in the spec tests. Confident that it is possible. Add agenda to simd proposal as an update to the simd proposal. Goal is pushing to Stage2. Who is attending? + AP: not confirmed yet. + PJ: Not going? + DG: I should be going. Sharing simd stuff there. + TL: will attend. + RW: Not attending. + PP: FP numbers ? We will think about getting some numbers. + DG: It was the feedback that we got from the community. We had integer data from Webp is a codec team at google. + AR: We may be able to look into some chakra data as well. + PP: Will consider it. + MD: Lack of FMA in simd proposal is a concern for ML applications. It can hit pref upto 2x + DG: WebP team has the same feedback. We are considering to add it. If you can put together a pr with results we will be happy to review that. + PP: We can prototype it. + MD: Did my basic experiemnts and there is significant speedup. + RW: I want to add sign extend and load extend. + DG: Please create a PR + AR: Rich to create a PR + MD: There is not a simple way to sore parts of a simd reg. Ie store only in 64bit simd, in wasm it needs to be done in a roundabout way. + RW: you want to store partial registers right? + MD: yes. Currently it can be done only through extract. + DG: Do you know how useful it is and how much overhead is causing? + MD: We use it often, hard to quantify impact. Prefer to have these explicitly. + PJ: SImdjs had load1, load2 load3 etc for partial load and store. + DG: Yes. + RW: Dont know the history of why we only wanted 128. Else we can just propose it. We seems to have a new list to add + DG: FMA already has an issue, load extension RW to follow up. We cna have a new issue for partial stores and loads. Future Meeting timings + DG: Didnt hear from people in EU time zone with interest. Current slot seems to work for now. Let's continue until this is needed. Open: From 7d6d8afdefa2d05c8b0eb6d6e60a5203bfb3d38d Mon Sep 17 00:00:00 2001 From: Andrew Scheidecker Date: Tue, 30 Apr 2019 17:02:57 -0400 Subject: [PATCH 038/378] Add WAVM SIMD instruction implementation status (#74) --- proposals/simd/ImplementationStatus.md | 288 +++++++++++++------------ 1 file changed, 145 insertions(+), 143 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index cb402bcc7d..5bfb133925 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,147 +1,149 @@ -| Instruction | LLVM[1] | V8[2] | -| --------------------------|---------------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | | -| `i64x2.extract_lane` | `-munimplemented-simd128` | | -| `i64x2.replace_lane` | `-munimplemented-simd128` | | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | | -| `f64x2.extract_lane` | `-munimplemented-simd128` | | -| `f64x2.replace_lane` | `-munimplemented-simd128` | | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | | -| `f64x2.ne` | `-munimplemented-simd128` | | -| `f64x2.lt` | `-munimplemented-simd128` | | -| `f64x2.gt` | `-munimplemented-simd128` | | -| `f64x2.le` | `-munimplemented-simd128` | | -| `f64x2.ge` | `-munimplemented-simd128` | | -| `v128.not` | `-msimd128` | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | | -| `i8x16.shr_s` | `-munimplemented-simd128` | | -| `i8x16.shr_u` | `-munimplemented-simd128` | | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | -| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | | -| `i16x8.shr_s` | `-munimplemented-simd128` | | -| `i16x8.shr_u` | `-munimplemented-simd128` | | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | | -| `i32x4.shr_s` | `-munimplemented-simd128` | | -| `i32x4.shr_u` | `-munimplemented-simd128` | | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | -| `i64x2.neg` | `-munimplemented-simd128` | | -| `i64x2.any_true` | `-munimplemented-simd128` | | -| `i64x2.all_true` | `-munimplemented-simd128` | | -| `i64x2.shl` | `-munimplemented-simd128` | | -| `i64x2.shr_s` | `-munimplemented-simd128` | | -| `i64x2.shr_u` | `-munimplemented-simd128` | | -| `i64x2.add` | `-munimplemented-simd128` | | -| `i64x2.sub` | `-munimplemented-simd128` | | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | -| `f32x4.sqrt` | `-munimplemented-simd128` | | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | | -| `f64x2.neg` | `-munimplemented-simd128` | | -| `f64x2.sqrt` | `-munimplemented-simd128` | | -| `f64x2.add` | `-munimplemented-simd128` | | -| `f64x2.sub` | `-munimplemented-simd128` | | -| `f64x2.mul` | `-munimplemented-simd128` | | -| `f64x2.div` | `-munimplemented-simd128` | | -| `f64x2.min` | `-munimplemented-simd128` | | -| `f64x2.max` | `-munimplemented-simd128` | | -| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | -| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | -| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | -| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | -| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | -| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | -| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | -| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | -| `v8x16.shuffle1` | | | -| `v8x16.shuffle2_imm` | | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | +| --------------------------|---------------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | +| `v8x16.shuffle1` | | | :heavy_check_mark: | +| `v8x16.shuffle2_imm` | | | :heavy_check_mark: | [1] Tip of tree LLVM as of April 24, 2019 [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` + +[3] Tip of tree WAVM as of April 30, 2019 \ No newline at end of file From f6e2cb4dd82a67be7a47d876740e465628c86cc5 Mon Sep 17 00:00:00 2001 From: Petr Penzin <41971413+penzn@users.noreply.github.com> Date: Wed, 1 May 2019 15:14:57 -0700 Subject: [PATCH 039/378] Add ChakraCore implementation status (#76) --- proposals/simd/ImplementationStatus.md | 290 +++++++++++++------------ 1 file changed, 146 insertions(+), 144 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 5bfb133925..7d612fee71 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,149 +1,151 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | -| --------------------------|---------------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | -| `v8x16.shuffle1` | | | :heavy_check_mark: | -| `v8x16.shuffle2_imm` | | | :heavy_check_mark: | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | +| --------------------------|---------------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v8x16.shuffle1` | | | :heavy_check_mark: | | +| `v8x16.shuffle2_imm` | | | :heavy_check_mark: | :heavy_check_mark: | [1] Tip of tree LLVM as of April 24, 2019 [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of April 30, 2019 \ No newline at end of file +[3] Tip of tree WAVM as of April 30, 2019 + +[4] Requires (case-insensitive) flag `-wasmsimd` From fa8af5fea81ccfb8eb4e6f9103ae109cb69f5004 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Thu, 18 Jul 2019 11:52:56 -0700 Subject: [PATCH 040/378] Add Load-And-Splat instructions (#82) --- proposals/simd/BinarySIMD.md | 6 +++++- proposals/simd/ImplementationStatus.md | 4 ++++ proposals/simd/SIMD.md | 9 +++++++++ 3 files changed, 18 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index ff51a7f0f1..8001d62034 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -167,4 +167,8 @@ The `v8x16.shuffle2_imm` instruction has 16 bytes after `simdop`. | `f64x2.convert_s/i64x2` | `0xb1`| - | | `f64x2.convert_u/i64x2` | `0xb2`| - | | `v8x16.shuffle1` | `0xc0`| - | -| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] | \ No newline at end of file +| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] | +| `i8x16.load_splat` | `0xc2`| - | +| `i16x8.load_splat` | `0xc3`| - | +| `i32x4.load_splat` | `0xc4`| - | +| `i64x2.load_splat` | `0xc5`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 7d612fee71..970fbc7b2b 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -4,14 +4,17 @@ | `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.load_splat` | | | | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load_splat` | | | | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.load_splat` | | | | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -21,6 +24,7 @@ | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.load_splat` | | | | | | `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4862364e8e..87d9b6be08 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -666,6 +666,15 @@ natural alignment. Load a `v128` vector from the given heap address. +### Load and Splat + +* `i8x16.load_splat(memarg) -> v128` +* `i16x8.load_splat(memarg) -> v128` +* `i32x4.load_splat(memarg) -> v128` +* `i64x2.load_splat(memarg) -> v128` + +Load a single element and splat to all lanes of a `v128` vector. + ### Store * `v128.store(memarg, data: v128)` From 0d3fafdba3a9539d1356b20010df51b22df8e15f Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Thu, 18 Jul 2019 15:20:42 -0700 Subject: [PATCH 041/378] Rename shuffles (#84) --- proposals/simd/BinarySIMD.md | 6 +++--- proposals/simd/ImplementationStatus.md | 4 ++-- proposals/simd/SIMD.md | 10 +++++----- proposals/simd/TextSIMD.md | 4 ++-- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 8001d62034..baa5fbd65b 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -23,7 +23,7 @@ instr ::= ... ``` Some SIMD instructions have additional immediate operands following `simdop`. -The `v8x16.shuffle2_imm` instruction has 16 bytes after `simdop`. +The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | Instruction | `simdop` | Immediate operands | | --------------------------|---------:|--------------------| @@ -166,8 +166,8 @@ The `v8x16.shuffle2_imm` instruction has 16 bytes after `simdop`. | `f32x4.convert_u/i32x4` | `0xb0`| - | | `f64x2.convert_s/i64x2` | `0xb1`| - | | `f64x2.convert_u/i64x2` | `0xb2`| - | -| `v8x16.shuffle1` | `0xc0`| - | -| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] | +| `v8x16.swizzle` | `0xc0`| - | +| `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | | `i8x16.load_splat` | `0xc2`| - | | `i16x8.load_splat` | `0xc3`| - | | `i32x4.load_splat` | `0xc4`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 970fbc7b2b..6e44cc0e55 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -143,8 +143,8 @@ | `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.shuffle1` | | | :heavy_check_mark: | | -| `v8x16.shuffle2_imm` | | | :heavy_check_mark: | :heavy_check_mark: | +| `v8x16.swizzle` | | | :heavy_check_mark: | | +| `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | [1] Tip of tree LLVM as of April 24, 2019 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 87d9b6be08..55e8edff78 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -285,7 +285,7 @@ The input lane value, `x`, is interpreted the same way as for the splat instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. ### Shuffling using immediate indices -* `v8x16.shuffle2_imm(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` +* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` Returns a new vector with lanes selected from the lanes of the two input vectors `a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This @@ -294,7 +294,7 @@ return. The indices `i` in range `[0, 15]` select the `i`-th element of `a`. The indices in range `[16, 31]` select the `i - 16`-th element of `b`. ```python -def S.shuffle2_imm(a, b, s): +def S.shuffle(a, b, s): result = S.New() for i in range(S.Lanes): if s[i] < S.lanes: @@ -304,8 +304,8 @@ def S.shuffle2_imm(a, b, s): return result ``` -### Shuffling using variable indices -* `v8x16.shuffle1(a: v128, s: v128) -> v128` +### Swizzling using variable indices +* `v8x16.swizzle(a: v128, s: v128) -> v128` Returns a new vector with lanes selected from the lanes of the first input vector `a` specified in the second input vector `s`. The indices `i` in range @@ -313,7 +313,7 @@ vector `a` specified in the second input vector `s`. The indices `i` in range the resulting lane is 0. ```python -def S.shuffle1(a, s): +def S.swizzle(a, s): result = S.New() for i in range(S.Lanes): if s[i] < S.lanes: diff --git a/proposals/simd/TextSIMD.md b/proposals/simd/TextSIMD.md index fc3a7e7d2c..8ba2e4a7b6 100644 --- a/proposals/simd/TextSIMD.md +++ b/proposals/simd/TextSIMD.md @@ -20,8 +20,8 @@ The canonical text format used for printing `v128.const` instructions is v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN ``` -### v8x16.shuffle2_imm +### v8x16.shuffle ``` -v8x16.shuffle2_imm i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 +v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 ``` From f44e3a652709c2141100ba02fb89b556f6b11fda Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 1 Aug 2019 16:01:54 -0700 Subject: [PATCH 042/378] Add integer widen/narrow conversions (#89) * Add integer widen/narrow conversions * Fix names, add explanation on signed/unsigned narrowing --- proposals/simd/BinarySIMD.md | 306 +++++++++++++------------ proposals/simd/ImplementationStatus.md | 306 +++++++++++++------------ proposals/simd/SIMD.md | 24 ++ 3 files changed, 342 insertions(+), 294 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index baa5fbd65b..13615d3635 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -25,150 +25,162 @@ instr ::= ... Some SIMD instructions have additional immediate operands following `simdop`. The `v8x16.shuffle` instruction has 16 bytes after `simdop`. -| Instruction | `simdop` | Immediate operands | -| --------------------------|---------:|--------------------| -| `v128.load` | `0x00`| m:memarg | -| `v128.store` | `0x01`| m:memarg | -| `v128.const` | `0x02`| i:ImmByte[16] | -| `i8x16.splat` | `0x04`| - | -| `i8x16.extract_lane_s` | `0x05`| i:LaneIdx16 | -| `i8x16.extract_lane_u` | `0x06`| i:LaneIdx16 | -| `i8x16.replace_lane` | `0x07`| i:LaneIdx16 | -| `i16x8.splat` | `0x08`| - | -| `i16x8.extract_lane_s` | `0x09`| i:LaneIdx8 | -| `i16x8.extract_lane_u` | `0x0a`| i:LaneIdx8 | -| `i16x8.replace_lane` | `0x0b`| i:LaneIdx8 | -| `i32x4.splat` | `0x0c`| - | -| `i32x4.extract_lane` | `0x0d`| i:LaneIdx4 | -| `i32x4.replace_lane` | `0x0e`| i:LaneIdx4 | -| `i64x2.splat` | `0x0f`| - | -| `i64x2.extract_lane` | `0x10`| i:LaneIdx2 | -| `i64x2.replace_lane` | `0x11`| i:LaneIdx2 | -| `f32x4.splat` | `0x12`| - | -| `f32x4.extract_lane` | `0x13`| i:LaneIdx4 | -| `f32x4.replace_lane` | `0x14`| i:LaneIdx4 | -| `f64x2.splat` | `0x15`| - | -| `f64x2.extract_lane` | `0x16`| i:LaneIdx2 | -| `f64x2.replace_lane` | `0x17`| i:LaneIdx2 | -| `i8x16.eq` | `0x18`| - | -| `i8x16.ne` | `0x19`| - | -| `i8x16.lt_s` | `0x1a`| - | -| `i8x16.lt_u` | `0x1b`| - | -| `i8x16.gt_s` | `0x1c`| - | -| `i8x16.gt_u` | `0x1d`| - | -| `i8x16.le_s` | `0x1e`| - | -| `i8x16.le_u` | `0x1f`| - | -| `i8x16.ge_s` | `0x20`| - | -| `i8x16.ge_u` | `0x21`| - | -| `i16x8.eq` | `0x22`| - | -| `i16x8.ne` | `0x23`| - | -| `i16x8.lt_s` | `0x24`| - | -| `i16x8.lt_u` | `0x25`| - | -| `i16x8.gt_s` | `0x26`| - | -| `i16x8.gt_u` | `0x27`| - | -| `i16x8.le_s` | `0x28`| - | -| `i16x8.le_u` | `0x29`| - | -| `i16x8.ge_s` | `0x2a`| - | -| `i16x8.ge_u` | `0x2b`| - | -| `i32x4.eq` | `0x2c`| - | -| `i32x4.ne` | `0x2d`| - | -| `i32x4.lt_s` | `0x2e`| - | -| `i32x4.lt_u` | `0x2f`| - | -| `i32x4.gt_s` | `0x30`| - | -| `i32x4.gt_u` | `0x31`| - | -| `i32x4.le_s` | `0x32`| - | -| `i32x4.le_u` | `0x33`| - | -| `i32x4.ge_s` | `0x34`| - | -| `i32x4.ge_u` | `0x35`| - | -| `f32x4.eq` | `0x40`| - | -| `f32x4.ne` | `0x41`| - | -| `f32x4.lt` | `0x42`| - | -| `f32x4.gt` | `0x43`| - | -| `f32x4.le` | `0x44`| - | -| `f32x4.ge` | `0x45`| - | -| `f64x2.eq` | `0x46`| - | -| `f64x2.ne` | `0x47`| - | -| `f64x2.lt` | `0x48`| - | -| `f64x2.gt` | `0x49`| - | -| `f64x2.le` | `0x4a`| - | -| `f64x2.ge` | `0x4b`| - | -| `v128.not` | `0x4c`| - | -| `v128.and` | `0x4d`| - | -| `v128.or` | `0x4e`| - | -| `v128.xor` | `0x4f`| - | -| `v128.bitselect` | `0x50`| - | -| `i8x16.neg` | `0x51`| - | -| `i8x16.any_true` | `0x52`| - | -| `i8x16.all_true` | `0x53`| - | -| `i8x16.shl` | `0x54`| - | -| `i8x16.shr_s` | `0x55`| - | -| `i8x16.shr_u` | `0x56`| - | -| `i8x16.add` | `0x57`| - | -| `i8x16.add_saturate_s` | `0x58`| - | -| `i8x16.add_saturate_u` | `0x59`| - | -| `i8x16.sub` | `0x5a`| - | -| `i8x16.sub_saturate_s` | `0x5b`| - | -| `i8x16.sub_saturate_u` | `0x5c`| - | -| `i8x16.mul` | `0x5d`| - | -| `i16x8.neg` | `0x62`| - | -| `i16x8.any_true` | `0x63`| - | -| `i16x8.all_true` | `0x64`| - | -| `i16x8.shl` | `0x65`| - | -| `i16x8.shr_s` | `0x66`| - | -| `i16x8.shr_u` | `0x67`| - | -| `i16x8.add` | `0x68`| - | -| `i16x8.add_saturate_s` | `0x69`| - | -| `i16x8.add_saturate_u` | `0x6a`| - | -| `i16x8.sub` | `0x6b`| - | -| `i16x8.sub_saturate_s` | `0x6c`| - | -| `i16x8.sub_saturate_u` | `0x6d`| - | -| `i16x8.mul` | `0x6e`| - | -| `i32x4.neg` | `0x73`| - | -| `i32x4.any_true` | `0x74`| - | -| `i32x4.all_true` | `0x75`| - | -| `i32x4.shl` | `0x76`| - | -| `i32x4.shr_s` | `0x77`| - | -| `i32x4.shr_u` | `0x78`| - | -| `i32x4.add` | `0x79`| - | -| `i32x4.sub` | `0x7c`| - | -| `i32x4.mul` | `0x7f`| - | -| `i64x2.neg` | `0x84`| - | -| `i64x2.any_true` | `0x85`| - | -| `i64x2.all_true` | `0x86`| - | -| `i64x2.shl` | `0x87`| - | -| `i64x2.shr_s` | `0x88`| - | -| `i64x2.shr_u` | `0x89`| - | -| `i64x2.add` | `0x8a`| - | -| `i64x2.sub` | `0x8d`| - | -| `f32x4.abs` | `0x95`| - | -| `f32x4.neg` | `0x96`| - | -| `f32x4.sqrt` | `0x97`| - | -| `f32x4.add` | `0x9a`| - | -| `f32x4.sub` | `0x9b`| - | -| `f32x4.mul` | `0x9c`| - | -| `f32x4.div` | `0x9d`| - | -| `f32x4.min` | `0x9e`| - | -| `f32x4.max` | `0x9f`| - | -| `f64x2.abs` | `0xa0`| - | -| `f64x2.neg` | `0xa1`| - | -| `f64x2.sqrt` | `0xa2`| - | -| `f64x2.add` | `0xa5`| - | -| `f64x2.sub` | `0xa6`| - | -| `f64x2.mul` | `0xa7`| - | -| `f64x2.div` | `0xa8`| - | -| `f64x2.min` | `0xa9`| - | -| `f64x2.max` | `0xaa`| - | -| `i32x4.trunc_s/f32x4:sat` | `0xab`| - | -| `i32x4.trunc_u/f32x4:sat` | `0xac`| - | -| `i64x2.trunc_s/f64x2:sat` | `0xad`| - | -| `i64x2.trunc_u/f64x2:sat` | `0xae`| - | -| `f32x4.convert_s/i32x4` | `0xaf`| - | -| `f32x4.convert_u/i32x4` | `0xb0`| - | -| `f64x2.convert_s/i64x2` | `0xb1`| - | -| `f64x2.convert_u/i64x2` | `0xb2`| - | -| `v8x16.swizzle` | `0xc0`| - | -| `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | -| `i8x16.load_splat` | `0xc2`| - | -| `i16x8.load_splat` | `0xc3`| - | -| `i32x4.load_splat` | `0xc4`| - | -| `i64x2.load_splat` | `0xc5`| - | +| Instruction | `simdop` | Immediate operands | +| ---------------------------|---------:|--------------------| +| `v128.load` | `0x00`| m:memarg | +| `v128.store` | `0x01`| m:memarg | +| `v128.const` | `0x02`| i:ImmByte[16] | +| `i8x16.splat` | `0x04`| - | +| `i8x16.extract_lane_s` | `0x05`| i:LaneIdx16 | +| `i8x16.extract_lane_u` | `0x06`| i:LaneIdx16 | +| `i8x16.replace_lane` | `0x07`| i:LaneIdx16 | +| `i16x8.splat` | `0x08`| - | +| `i16x8.extract_lane_s` | `0x09`| i:LaneIdx8 | +| `i16x8.extract_lane_u` | `0x0a`| i:LaneIdx8 | +| `i16x8.replace_lane` | `0x0b`| i:LaneIdx8 | +| `i32x4.splat` | `0x0c`| - | +| `i32x4.extract_lane` | `0x0d`| i:LaneIdx4 | +| `i32x4.replace_lane` | `0x0e`| i:LaneIdx4 | +| `i64x2.splat` | `0x0f`| - | +| `i64x2.extract_lane` | `0x10`| i:LaneIdx2 | +| `i64x2.replace_lane` | `0x11`| i:LaneIdx2 | +| `f32x4.splat` | `0x12`| - | +| `f32x4.extract_lane` | `0x13`| i:LaneIdx4 | +| `f32x4.replace_lane` | `0x14`| i:LaneIdx4 | +| `f64x2.splat` | `0x15`| - | +| `f64x2.extract_lane` | `0x16`| i:LaneIdx2 | +| `f64x2.replace_lane` | `0x17`| i:LaneIdx2 | +| `i8x16.eq` | `0x18`| - | +| `i8x16.ne` | `0x19`| - | +| `i8x16.lt_s` | `0x1a`| - | +| `i8x16.lt_u` | `0x1b`| - | +| `i8x16.gt_s` | `0x1c`| - | +| `i8x16.gt_u` | `0x1d`| - | +| `i8x16.le_s` | `0x1e`| - | +| `i8x16.le_u` | `0x1f`| - | +| `i8x16.ge_s` | `0x20`| - | +| `i8x16.ge_u` | `0x21`| - | +| `i16x8.eq` | `0x22`| - | +| `i16x8.ne` | `0x23`| - | +| `i16x8.lt_s` | `0x24`| - | +| `i16x8.lt_u` | `0x25`| - | +| `i16x8.gt_s` | `0x26`| - | +| `i16x8.gt_u` | `0x27`| - | +| `i16x8.le_s` | `0x28`| - | +| `i16x8.le_u` | `0x29`| - | +| `i16x8.ge_s` | `0x2a`| - | +| `i16x8.ge_u` | `0x2b`| - | +| `i32x4.eq` | `0x2c`| - | +| `i32x4.ne` | `0x2d`| - | +| `i32x4.lt_s` | `0x2e`| - | +| `i32x4.lt_u` | `0x2f`| - | +| `i32x4.gt_s` | `0x30`| - | +| `i32x4.gt_u` | `0x31`| - | +| `i32x4.le_s` | `0x32`| - | +| `i32x4.le_u` | `0x33`| - | +| `i32x4.ge_s` | `0x34`| - | +| `i32x4.ge_u` | `0x35`| - | +| `f32x4.eq` | `0x40`| - | +| `f32x4.ne` | `0x41`| - | +| `f32x4.lt` | `0x42`| - | +| `f32x4.gt` | `0x43`| - | +| `f32x4.le` | `0x44`| - | +| `f32x4.ge` | `0x45`| - | +| `f64x2.eq` | `0x46`| - | +| `f64x2.ne` | `0x47`| - | +| `f64x2.lt` | `0x48`| - | +| `f64x2.gt` | `0x49`| - | +| `f64x2.le` | `0x4a`| - | +| `f64x2.ge` | `0x4b`| - | +| `v128.not` | `0x4c`| - | +| `v128.and` | `0x4d`| - | +| `v128.or` | `0x4e`| - | +| `v128.xor` | `0x4f`| - | +| `v128.bitselect` | `0x50`| - | +| `i8x16.neg` | `0x51`| - | +| `i8x16.any_true` | `0x52`| - | +| `i8x16.all_true` | `0x53`| - | +| `i8x16.shl` | `0x54`| - | +| `i8x16.shr_s` | `0x55`| - | +| `i8x16.shr_u` | `0x56`| - | +| `i8x16.add` | `0x57`| - | +| `i8x16.add_saturate_s` | `0x58`| - | +| `i8x16.add_saturate_u` | `0x59`| - | +| `i8x16.sub` | `0x5a`| - | +| `i8x16.sub_saturate_s` | `0x5b`| - | +| `i8x16.sub_saturate_u` | `0x5c`| - | +| `i8x16.mul` | `0x5d`| - | +| `i16x8.neg` | `0x62`| - | +| `i16x8.any_true` | `0x63`| - | +| `i16x8.all_true` | `0x64`| - | +| `i16x8.shl` | `0x65`| - | +| `i16x8.shr_s` | `0x66`| - | +| `i16x8.shr_u` | `0x67`| - | +| `i16x8.add` | `0x68`| - | +| `i16x8.add_saturate_s` | `0x69`| - | +| `i16x8.add_saturate_u` | `0x6a`| - | +| `i16x8.sub` | `0x6b`| - | +| `i16x8.sub_saturate_s` | `0x6c`| - | +| `i16x8.sub_saturate_u` | `0x6d`| - | +| `i16x8.mul` | `0x6e`| - | +| `i32x4.neg` | `0x73`| - | +| `i32x4.any_true` | `0x74`| - | +| `i32x4.all_true` | `0x75`| - | +| `i32x4.shl` | `0x76`| - | +| `i32x4.shr_s` | `0x77`| - | +| `i32x4.shr_u` | `0x78`| - | +| `i32x4.add` | `0x79`| - | +| `i32x4.sub` | `0x7c`| - | +| `i32x4.mul` | `0x7f`| - | +| `i64x2.neg` | `0x84`| - | +| `i64x2.any_true` | `0x85`| - | +| `i64x2.all_true` | `0x86`| - | +| `i64x2.shl` | `0x87`| - | +| `i64x2.shr_s` | `0x88`| - | +| `i64x2.shr_u` | `0x89`| - | +| `i64x2.add` | `0x8a`| - | +| `i64x2.sub` | `0x8d`| - | +| `f32x4.abs` | `0x95`| - | +| `f32x4.neg` | `0x96`| - | +| `f32x4.sqrt` | `0x97`| - | +| `f32x4.add` | `0x9a`| - | +| `f32x4.sub` | `0x9b`| - | +| `f32x4.mul` | `0x9c`| - | +| `f32x4.div` | `0x9d`| - | +| `f32x4.min` | `0x9e`| - | +| `f32x4.max` | `0x9f`| - | +| `f64x2.abs` | `0xa0`| - | +| `f64x2.neg` | `0xa1`| - | +| `f64x2.sqrt` | `0xa2`| - | +| `f64x2.add` | `0xa5`| - | +| `f64x2.sub` | `0xa6`| - | +| `f64x2.mul` | `0xa7`| - | +| `f64x2.div` | `0xa8`| - | +| `f64x2.min` | `0xa9`| - | +| `f64x2.max` | `0xaa`| - | +| `i32x4.trunc_s/f32x4:sat` | `0xab`| - | +| `i32x4.trunc_u/f32x4:sat` | `0xac`| - | +| `i64x2.trunc_s/f64x2:sat` | `0xad`| - | +| `i64x2.trunc_u/f64x2:sat` | `0xae`| - | +| `f32x4.convert_s/i32x4` | `0xaf`| - | +| `f32x4.convert_u/i32x4` | `0xb0`| - | +| `f64x2.convert_s/i64x2` | `0xb1`| - | +| `f64x2.convert_u/i64x2` | `0xb2`| - | +| `v8x16.swizzle` | `0xc0`| - | +| `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | +| `i8x16.load_splat` | `0xc2`| - | +| `i16x8.load_splat` | `0xc3`| - | +| `i32x4.load_splat` | `0xc4`| - | +| `i64x2.load_splat` | `0xc5`| - | +| `i8x16.narrow_i16x8_s` | `0xc6`| - | +| `i8x16.narrow_i16x8_u` | `0xc7`| - | +| `i16x8.narrow_i32x4_s` | `0xc8`| - | +| `i16x8.narrow_i32x4_u` | `0xc9`| - | +| `i16x8.widen_low_i8x16_s` | `0xca`| - | +| `i16x8.widen_high_i8x16_s` | `0xcb`| - | +| `i16x8.widen_low_i8x16_u` | `0xcc`| - | +| `i16x8.widen_high_i8x16_u` | `0xcd`| - | +| `i32x4.widen_low_i16x8_s` | `0xce`| - | +| `i32x4.widen_high_i16x8_s` | `0xcf`| - | +| `i32x4.widen_low_i16x8_u` | `0xd0`| - | +| `i32x4.widen_high_i16x8_u` | `0xd1`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 6e44cc0e55..5e280688ff 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,150 +1,162 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | -| --------------------------|---------------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.load_splat` | | | | | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load_splat` | | | | | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.load_splat` | | | | | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.load_splat` | | | | | -| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.swizzle` | | | :heavy_check_mark: | | -| `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | +| ---------------------------|---------------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.load_splat` | | | | | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load_splat` | | | | | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.load_splat` | | | | | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.load_splat` | | | | | +| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v8x16.swizzle` | | | :heavy_check_mark: | | +| `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | | | +| `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | | | +| `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | | | +| `i16x8.narrow_i32x4_u` | | :heavy_check_mark: | | | +| `i16x8.widen_low_i8x16_s` | | :heavy_check_mark: | | | +| `i16x8.widen_high_i8x16_s` | | :heavy_check_mark: | | | +| `i16x8.widen_low_i8x16_u` | | :heavy_check_mark: | | | +| `i16x8.widen_high_i8x16_u` | | :heavy_check_mark: | | | +| `i32x4.widen_low_i16x8_s` | | :heavy_check_mark: | | | +| `i32x4.widen_high_i16x8_s` | | :heavy_check_mark: | | | +| `i32x4.widen_low_i16x8_u` | | :heavy_check_mark: | | | +| `i32x4.widen_high_i16x8_u` | | :heavy_check_mark: | | | [1] Tip of tree LLVM as of April 24, 2019 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 55e8edff78..41fb3f733c 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -784,3 +784,27 @@ Lane-wise saturating conversion from floating point to integer using the IEEE resulting lane is 0. If the rounded integer value of a lane is outside the range of the destination type, the result is saturated to the nearest representable integer value. + +### Integer to integer narrowing +* `i8x16.narrow_i16x8_s(a: v128, b: v128) -> v128` +* `i8x16.narrow_i16x8_u(a: v128, b: v128) -> v128` +* `i16x8.narrow_i32x4_s(a: v128, b: v128) -> v128` +* `i16x8.narrow_i32x4_u(a: v128, b: v128) -> v128` + +Converts two input vectors into a smaller lane vector by narrowing each lane, +signed or unsigned. The signed narrowing operation will use signed saturation +to handle overflow, 0x7f or 0x80 for i8x16, the unsigned narrowing operation +will use unsigned saturation to handle overflow, 0x00 or 0xff for i8x16. + +### Integer to integer widening +* `i16x8.widen_low_i8x16_s(a: v128) -> v128` +* `i16x8.widen_high_i8x16_s(a: v128) -> v128` +* `i16x8.widen_low_i8x16_u(a: v128) -> v128` +* `i16x8.widen_high_i8x16_u(a: v128) -> v128` +* `i32x4.widen_low_i16x8_s(a: v128) -> v128` +* `i32x4.widen_high_i16x8_s(a: v128) -> v128` +* `i32x4.widen_low_i16x8_u(a: v128) -> v128` +* `i32x4.widen_high_i16x8_u(a: v128) -> v128` + +Converts low or high half of the smaller lane vector to a larger lane vector, +sign extended or zero (unsigned) extended. From 4a082db2dc39047e540477455381f5fcd5050310 Mon Sep 17 00:00:00 2001 From: Akhil Indurti Date: Thu, 8 Aug 2019 21:12:31 -0400 Subject: [PATCH 043/378] Minor Documentation Fixes (#90) Issue in Shuffle s/result[i] = b[s[i] - S.lanes]/result[i] = b[s[i] - S.lanes Issue in Bit Shifts s/def S.shl(a, x):/def S.shl(a, y): --- proposals/simd/SIMD.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 41fb3f733c..fd47369461 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -300,7 +300,7 @@ def S.shuffle(a, b, s): if s[i] < S.lanes: result[i] = a[s[i]] else: - result[i] = b[s[i] - S.lanes] + result[i] = b[s[i] - S.lanes return result ``` @@ -469,7 +469,7 @@ Shift the bits in each lane to the left by the same amount. Only the low bits of the shift amount are used: ```python -def S.shl(a, x): +def S.shl(a, y): # Number of bits to shift: 0 .. S.LaneBits - 1. amount = y mod S.LaneBits def shift(x): From ffb7c0c02976a4a2272646541e542d48d9510442 Mon Sep 17 00:00:00 2001 From: Andrew Scheidecker Date: Sat, 10 Aug 2019 07:49:15 -0400 Subject: [PATCH 044/378] Update ImplementationStatus for WAVM --- proposals/simd/ImplementationStatus.md | 34 +++++++++++++------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 5e280688ff..a911adf894 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -4,17 +4,17 @@ | `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.load_splat` | | | | | +| `i8x16.load_splat` | | | :heavy_check_mark: | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load_splat` | | | | | +| `i16x8.load_splat` | | | :heavy_check_mark: | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.load_splat` | | | | | +| `i32x4.load_splat` | | | :heavy_check_mark: | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -24,7 +24,7 @@ | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.load_splat` | | | | | +| `i64x2.load_splat` | | | :heavy_check_mark: | | | `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -145,23 +145,23 @@ | `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | | | -| `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | | | -| `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | | | -| `i16x8.narrow_i32x4_u` | | :heavy_check_mark: | | | -| `i16x8.widen_low_i8x16_s` | | :heavy_check_mark: | | | -| `i16x8.widen_high_i8x16_s` | | :heavy_check_mark: | | | -| `i16x8.widen_low_i8x16_u` | | :heavy_check_mark: | | | -| `i16x8.widen_high_i8x16_u` | | :heavy_check_mark: | | | -| `i32x4.widen_low_i16x8_s` | | :heavy_check_mark: | | | -| `i32x4.widen_high_i16x8_s` | | :heavy_check_mark: | | | -| `i32x4.widen_low_i16x8_u` | | :heavy_check_mark: | | | -| `i32x4.widen_high_i16x8_u` | | :heavy_check_mark: | | | +| `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.narrow_i32x4_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_low_i8x16_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_high_i8x16_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_low_i8x16_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_high_i8x16_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_low_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_high_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_low_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_high_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | [1] Tip of tree LLVM as of April 24, 2019 [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of April 30, 2019 +[3] Tip of tree WAVM as of July 10, 2019. Requires flag `--enable prestd-simd` [4] Requires (case-insensitive) flag `-wasmsimd` From e4bd210d4d85ea4715273d638053e369cfb187d3 Mon Sep 17 00:00:00 2001 From: Andrew Scheidecker Date: Fri, 16 Aug 2019 06:50:51 -0400 Subject: [PATCH 045/378] Rename load-and-splat instructions from iNxM.load_splat to vNxM.load_splat --- proposals/simd/BinarySIMD.md | 8 ++++---- proposals/simd/ImplementationStatus.md | 8 ++++---- proposals/simd/SIMD.md | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 13615d3635..80514f9138 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -168,10 +168,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `f64x2.convert_u/i64x2` | `0xb2`| - | | `v8x16.swizzle` | `0xc0`| - | | `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | -| `i8x16.load_splat` | `0xc2`| - | -| `i16x8.load_splat` | `0xc3`| - | -| `i32x4.load_splat` | `0xc4`| - | -| `i64x2.load_splat` | `0xc5`| - | +| `v8x16.load_splat` | `0xc2`| - | +| `v16x8.load_splat` | `0xc3`| - | +| `v32x4.load_splat` | `0xc4`| - | +| `v64x2.load_splat` | `0xc5`| - | | `i8x16.narrow_i16x8_s` | `0xc6`| - | | `i8x16.narrow_i16x8_u` | `0xc7`| - | | `i16x8.narrow_i32x4_s` | `0xc8`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index a911adf894..7ef69ec398 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -4,17 +4,17 @@ | `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.load_splat` | | | :heavy_check_mark: | | +| `v8x16.load_splat` | | | :heavy_check_mark: | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load_splat` | | | :heavy_check_mark: | | +| `v16x8.load_splat` | | | :heavy_check_mark: | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.load_splat` | | | :heavy_check_mark: | | +| `v32x4.load_splat` | | | :heavy_check_mark: | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -24,7 +24,7 @@ | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.load_splat` | | | :heavy_check_mark: | | +| `v64x2.load_splat` | | | :heavy_check_mark: | | | `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index fd47369461..c8a4f0a23b 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -668,10 +668,10 @@ Load a `v128` vector from the given heap address. ### Load and Splat -* `i8x16.load_splat(memarg) -> v128` -* `i16x8.load_splat(memarg) -> v128` -* `i32x4.load_splat(memarg) -> v128` -* `i64x2.load_splat(memarg) -> v128` +* `v8x16.load_splat(memarg) -> v128` +* `v16x8.load_splat(memarg) -> v128` +* `v32x4.load_splat(memarg) -> v128` +* `v64x2.load_splat(memarg) -> v128` Load a single element and splat to all lanes of a `v128` vector. From 85e6e7ad9e0df11d9af42eff48e3a00cb0e1a02f Mon Sep 17 00:00:00 2001 From: Andrew Scheidecker Date: Fri, 9 Aug 2019 13:44:17 -0400 Subject: [PATCH 046/378] Clarify that the SIMD narrowing instructions interpret their inputs as signed integers. --- proposals/simd/SIMD.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index c8a4f0a23b..ac8c62c5fe 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -795,6 +795,8 @@ Converts two input vectors into a smaller lane vector by narrowing each lane, signed or unsigned. The signed narrowing operation will use signed saturation to handle overflow, 0x7f or 0x80 for i8x16, the unsigned narrowing operation will use unsigned saturation to handle overflow, 0x00 or 0xff for i8x16. +Regardless of the whether the operation is signed or unsigned, the input lanes +are interpreted as signed integers. ### Integer to integer widening * `i16x8.widen_low_i8x16_s(a: v128) -> v128` From a1a5749b57f2e5873ab117c881cd01778d613c2a Mon Sep 17 00:00:00 2001 From: Arun Date: Tue, 3 Sep 2019 19:14:24 -0700 Subject: [PATCH 047/378] Adding new spec tests --- test/core/simd/simd_address.wast | 151 + test/core/simd/simd_align.wast | 164 + test/core/simd/simd_const.wast | 676 +++ test/core/simd/simd_f32x4_cmp.wast | 7618 ++++++++++++++++++++++++++++ test/core/simd/simd_i16x8_cmp.wast | 1678 ++++++ test/core/simd/simd_i32x4_cmp.wast | 1698 +++++++ test/core/simd/simd_i8x16_cmp.wast | 1684 ++++++ test/core/simd/simd_lane.wast | 683 +++ test/core/simd/simd_load.wast | 188 + test/core/simd/simd_splat.wast | 258 + test/core/simd/simd_store.wast | 117 + 11 files changed, 14915 insertions(+) create mode 100644 test/core/simd/simd_address.wast create mode 100644 test/core/simd/simd_align.wast create mode 100644 test/core/simd/simd_const.wast create mode 100644 test/core/simd/simd_f32x4_cmp.wast create mode 100644 test/core/simd/simd_i16x8_cmp.wast create mode 100644 test/core/simd/simd_i32x4_cmp.wast create mode 100644 test/core/simd/simd_i8x16_cmp.wast create mode 100644 test/core/simd/simd_lane.wast create mode 100644 test/core/simd/simd_load.wast create mode 100644 test/core/simd/simd_splat.wast create mode 100644 test/core/simd/simd_store.wast diff --git a/test/core/simd/simd_address.wast b/test/core/simd/simd_address.wast new file mode 100644 index 0000000000..10c8d1a5c2 --- /dev/null +++ b/test/core/simd/simd_address.wast @@ -0,0 +1,151 @@ +;; Load/Store v128 data with different valid offset/alignment + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\10\11\12\13\14\15") + (data (offset (i32.const 65505)) "\16\17\18\19\20\21\22\23\24\25\26\27\28\29\30\31") + + (func (export "load_data_1") (param $i i32) (result v128) + (v128.load offset=0 (local.get $i)) ;; 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 + ) + (func (export "load_data_2") (param $i i32) (result v128) + (v128.load align=1 (local.get $i)) ;; 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 + ) + (func (export "load_data_3") (param $i i32) (result v128) + (v128.load offset=1 align=1 (local.get $i)) ;; 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 0x00 + ) + (func (export "load_data_4") (param $i i32) (result v128) + (v128.load offset=2 align=1 (local.get $i)) ;; 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 0x00 0x00 + ) + (func (export "load_data_5") (param $i i32) (result v128) + (v128.load offset=15 align=1 (local.get $i)) ;; 0x15 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + ) + + (func (export "store_data_0") (result v128) + (v128.store offset=0 (i32.const 0) (v128.const f32x4 0 1 2 3)) + (v128.load offset=0 (i32.const 0)) + ) + (func (export "store_data_1") (result v128) + (v128.store align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load align=1 (i32.const 0)) + ) + (func (export "store_data_2") (result v128) + (v128.store offset=1 align=1 (i32.const 0) (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.load offset=1 align=1 (i32.const 0)) + ) + (func (export "store_data_3") (result v128) + (v128.store offset=2 align=1 (i32.const 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.load offset=2 align=1 (i32.const 0)) + ) + (func (export "store_data_4") (result v128) + (v128.store offset=15 align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load offset=15 (i32.const 0)) + ) + (func (export "store_data_5") (result v128) + (v128.store offset=65520 align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load offset=65520 (i32.const 0)) + ) +) + +(assert_return (invoke "load_data_1" (i32.const 0)) (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "load_data_2" (i32.const 0)) (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "load_data_3" (i32.const 0)) (v128.const i32x4 0x04030201 0x08070605 0x12111009 0x00151413)) +(assert_return (invoke "load_data_4" (i32.const 0)) (v128.const i32x4 0x05040302 0x09080706 0x13121110 0x00001514)) +(assert_return (invoke "load_data_5" (i32.const 0)) (v128.const i32x4 0x00000015 0x00000000 0x00000000 0x00000000)) + +(assert_return (invoke "load_data_1" (i32.const 0)) (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x1110 0x1312 0x1514)) +(assert_return (invoke "load_data_2" (i32.const 0)) (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x1110 0x1312 0x1514)) +(assert_return (invoke "load_data_3" (i32.const 0)) (v128.const i16x8 0x0201 0x0403 0x0605 0x0807 0x1009 0x1211 0x1413 0x0015)) +(assert_return (invoke "load_data_4" (i32.const 0)) (v128.const i16x8 0x0302 0x0504 0x0706 0x0908 0x1110 0x1312 0x1514 0x0000)) +(assert_return (invoke "load_data_5" (i32.const 0)) (v128.const i16x8 0x0015 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + +(assert_return (invoke "load_data_1" (i32.const 0)) (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15)) +(assert_return (invoke "load_data_2" (i32.const 0)) (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15)) +(assert_return (invoke "load_data_3" (i32.const 0)) (v128.const i8x16 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 0x00)) +(assert_return (invoke "load_data_4" (i32.const 0)) (v128.const i8x16 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x11 0x12 0x13 0x14 0x15 0x00 0x00)) +(assert_return (invoke "load_data_5" (i32.const 0)) (v128.const i8x16 0x15 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + +(assert_return (invoke "load_data_1" (i32.const 65505)) (v128.const i32x4 0x19181716 0x23222120 0x27262524 0x31302928)) +(assert_return (invoke "load_data_2" (i32.const 65505)) (v128.const i32x4 0x19181716 0x23222120 0x27262524 0x31302928)) +(assert_return (invoke "load_data_3" (i32.const 65505)) (v128.const i32x4 0x20191817 0x24232221 0x28272625 0x00313029)) +(assert_return (invoke "load_data_4" (i32.const 65505)) (v128.const i32x4 0x21201918 0x25242322 0x29282726 0x00003130)) +(assert_return (invoke "load_data_5" (i32.const 65505)) (v128.const i32x4 0x00000031 0x00000000 0x00000000 0x00000000)) + +(assert_return (invoke "load_data_1" (i32.const 65505)) (v128.const i16x8 0x1716 0x1918 0x2120 0x2322 0x2524 0x2726 0x2928 0x3130)) +(assert_return (invoke "load_data_2" (i32.const 65505)) (v128.const i16x8 0x1716 0x1918 0x2120 0x2322 0x2524 0x2726 0x2928 0x3130)) +(assert_return (invoke "load_data_3" (i32.const 65505)) (v128.const i16x8 0x1817 0x2019 0x2221 0x2423 0x2625 0x2827 0x3029 0x0031)) +(assert_return (invoke "load_data_4" (i32.const 65505)) (v128.const i16x8 0x1918 0x2120 0x2322 0x2524 0x2726 0x2928 0x3130 0x0000)) +(assert_return (invoke "load_data_5" (i32.const 65505)) (v128.const i16x8 0x0031 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + +(assert_return (invoke "load_data_1" (i32.const 65505)) (v128.const i8x16 0x16 0x17 0x18 0x19 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x30 0x31)) +(assert_return (invoke "load_data_2" (i32.const 65505)) (v128.const i8x16 0x16 0x17 0x18 0x19 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x30 0x31)) +(assert_return (invoke "load_data_3" (i32.const 65505)) (v128.const i8x16 0x17 0x18 0x19 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x30 0x31 0x00)) +(assert_return (invoke "load_data_4" (i32.const 65505)) (v128.const i8x16 0x18 0x19 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x30 0x31 0x00 0x00)) +(assert_return (invoke "load_data_5" (i32.const 65505)) (v128.const i8x16 0x31 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + +(assert_trap (invoke "load_data_5" (i32.const 65506)) "out of bounds memory access") + +(assert_return (invoke "store_data_0") (v128.const f32x4 0 1 2 3)) +(assert_return (invoke "store_data_1") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "store_data_2") (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "store_data_3") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "store_data_4") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "store_data_5") (v128.const i32x4 0 1 2 3)) + + +;; Load/Store v128 data with invalid offset + +(module + (memory 1) + (func (export "v128.load_offset_65521") + (drop (v128.load offset=65521 (i32.const 0))) + ) +) +(assert_trap (invoke "v128.load_offset_65521") "out of bounds memory access") + +(assert_malformed + (module quote + "(memory 1)" + "(func" + " (drop (v128.load offset=-1 (i32.const 0)))" + ")" + ) + "unknown operator" +) + +(module + (memory 1) + (func (export "v128.store_offset_65521") + (v128.store offset=65521 (i32.const 0) (v128.const i32x4 0 0 0 0)) + ) +) +(assert_trap (invoke "v128.store_offset_65521") "out of bounds memory access") + +(assert_malformed + (module quote + "(memory 1)" + "(func" + " (v128.store offset=-1 (i32.const 0) (v128.const i32x4 0 0 0 0))" + ")" + ) + "unknown operator" +) + + +;; Offset constant out of range + +(assert_malformed + (module quote + "(memory 1)" + "(func (drop (v128.load offset=4294967296 (i32.const 0))))" + ) + "i32 constant" +) + +(assert_malformed + (module quote + "(memory 1)" + "(func (v128.store offset=4294967296 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "i32 constant" +) diff --git a/test/core/simd/simd_align.wast b/test/core/simd/simd_align.wast new file mode 100644 index 0000000000..1dc95c904d --- /dev/null +++ b/test/core/simd/simd_align.wast @@ -0,0 +1,164 @@ +;; Vaild alignment (align=1, 2, 4, 8, 16) + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\10\11\12\13\14\15") + + (func (export "v128.load_align_1") (result v128) + (v128.load align=1 (i32.const 0)) + ) + (func (export "v128.load_align_2") (result v128) + (v128.load align=2 (i32.const 0)) + ) + (func (export "v128.load_align_4") (result v128) + (v128.load align=4 (i32.const 0)) + ) + (func (export "v128.load_align_8") (result v128) + (v128.load align=8 (i32.const 0)) + ) + (func (export "v128.load_align_16") (result v128) + (v128.load align=16 (i32.const 0)) + ) + + (func (export "v128.store_align_1") (result v128) + (v128.store align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_align_2") (result v128) + (v128.store align=2 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_align_4") (result v128) + (v128.store align=4 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_align_8") (result v128) + (v128.store align=8 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_align_16") (result v128) + (v128.store align=16 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) +) + +(assert_return (invoke "v128.load_align_1") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "v128.load_align_2") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "v128.load_align_4") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "v128.load_align_8") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) +(assert_return (invoke "v128.load_align_16") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) + +(assert_return (invoke "v128.store_align_1") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_align_2") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_align_4") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_align_8") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_align_16") (v128.const i32x4 0 1 2 3)) + + +;; Invalid alignment + +(assert_invalid + (module + (memory 1) + (func (drop (v128.load align=32 (i32.const 0)))) + ) + "alignment must not be larger than natural" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (drop (v128.load align=-1 (i32.const 0))))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (drop (v128.load align=0 (i32.const 0))))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (drop (v128.load align=7 (i32.const 0))))" + ) + "alignment must be a power of two" +) + +(assert_invalid + (module + (memory 0) + (func(v128.store align=32 (i32.const 0) (v128.const i32x4 0 0 0 0))) + ) + "alignment must not be larger than natural" +) +(assert_malformed + (module quote + "(memory 1)" + " (func (v128.store align=-1 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 0)" + " (func (v128.store align=0 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 0)" + " (func (v128.store align=7 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "alignment must be a power of two" +) + +;; Test that misaligned SIMD loads/stores don't trap + +(module + (memory 1 1) + (func (export "v128.load align=16") (param $address i32) (result v128) + (v128.load align=16 (local.get $address)) + ) + (func (export "v128.store align=16") (param $address i32) (param $value v128) + (v128.store align=16 (local.get $address) (local.get $value)) + ) +) + +(assert_return (invoke "v128.load align=16" (i32.const 0)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "v128.load align=16" (i32.const 1)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "v128.store align=16" (i32.const 1) (v128.const i8x16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16))) +(assert_return (invoke "v128.load align=16" (i32.const 0)) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + +;; Test aligned and unaligned read/write + +(module + (memory 1) + (func (export "v128_unalign_read_and_write") (result v128) + (local v128) + (v128.store (i32.const 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.load (i32.const 0)) + ) + (func (export "v128_aligned_read_and_write") (result v128) + (local v128) + (v128.store align=2 (i32.const 0) (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.load align=2 (i32.const 0)) + ) + (func (export "v128_aligned_read_and_unalign_write") (result v128) + (local v128) + (v128.store (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load align=2 (i32.const 0)) + ) + (func (export "v128_unalign_read_and_aligned_write") (result v128) + (local v128) + (v128.store align=2 (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) +) + +(assert_return (invoke "v128_unalign_read_and_write") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "v128_aligned_read_and_write") (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "v128_aligned_read_and_unalign_write") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128_unalign_read_and_aligned_write") (v128.const i32x4 0 1 2 3)) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast new file mode 100644 index 0000000000..0f3e0cfe55 --- /dev/null +++ b/test/core/simd/simd_const.wast @@ -0,0 +1,676 @@ +;; v128.const normal parameter (e.g. (i8x16, i16x8 i32x4, f32x4)) + +(module (func (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) drop)) +(module (func (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) drop)) +(module (func (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) drop)) +(module (func (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) drop)) +(module (func (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) drop)) +(module (func (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) drop)) +(module (func (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) drop)) +(module (func (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) drop)) +(module (func (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) drop)) +(module (func (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) drop)) +(module (func (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) drop)) +(module (func (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) drop)) +(module (func (v128.const f32x4 0x1p127 0x1p127 0x1p127 0x1p127) drop)) +(module (func (v128.const f32x4 -0x1p127 -0x1p127 -0x1p127 -0x1p127) drop)) +(module (func (v128.const f32x4 1e38 1e38 1e38 1e38) drop)) +(module (func (v128.const f32x4 -1e38 -1e38 -1e38 -1e38) drop)) +(module (func (v128.const f32x4 340282356779733623858607532500980858880 340282356779733623858607532500980858880 + 340282356779733623858607532500980858880 340282356779733623858607532500980858880) drop)) +(module (func (v128.const f32x4 -340282356779733623858607532500980858880 -340282356779733623858607532500980858880 + -340282356779733623858607532500980858880 -340282356779733623858607532500980858880) drop)) +(module (func (v128.const f32x4 nan:0x1 nan:0x1 nan:0x1 nan:0x1) drop)) +(module (func (v128.const f32x4 nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff) drop)) + +;; Non-splat cases + +(module (func (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF + -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) drop)) +(module (func (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 255 255 255 255 + -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) drop)) +(module (func (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 255 255 255 255 + -0x80 -0x80 -0x80 -0x80 -128 -128 -128 -128) drop)) +(module (func (v128.const i16x8 0xFF 0xFF 0xFF 0xFF -0x8000 -0x8000 -0x8000 -0x8000) drop)) +(module (func (v128.const i16x8 0xFF 0xFF 65535 65535 -0x8000 -0x8000 -0x8000 -0x8000) drop)) +(module (func (v128.const i16x8 0xFF 0xFF 65535 65535 -0x8000 -0x8000 -32768 -32768) drop)) +(module (func (v128.const i32x4 0xffffffff 0xffffffff -0x80000000 -0x80000000) drop)) +(module (func (v128.const i32x4 0xffffffff 4294967295 -0x80000000 -0x80000000) drop)) +(module (func (v128.const i32x4 0xffffffff 4294967295 -0x80000000 -2147483648) drop)) + + +;; Constant out of range (int literal is too large) + +(module (memory 1)) +(assert_malformed + (module quote "(func (v128.const i8x16 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i8x16 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i8x16 256 256 256 256 256 256 256 256 256 256 256 256 256 256 256 256) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i8x16 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129 -129) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i16x8 0x10000 0x10000 0x10000 0x10000 0x10000 0x10000 0x10000 0x10000) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i16x8 -0x8001 -0x8001 -0x8001 -0x8001 -0x8001 -0x8001 -0x8001 -0x8001) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i16x8 65536 65536 65536 65536 65536 65536 65536 65536) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i16x8 -32769 -32769 -32769 -32769 -32769 -32769 -32769 -32769) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 0x100000000 0x100000000 0x100000000 0x100000000) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 -0x80000001 -0x80000001 -0x80000001 -0x80000001) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 4294967296 4294967296 4294967296 4294967296) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 -2147483649 -2147483649 -2147483649 -2147483649) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x1p128 0x1p128 0x1p128 0x1p128) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 -0x1p128 -0x1p128 -0x1p128 -0x1p128) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 1e39 1e39 1e39 1e39) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 -1e39 -1e39 -1e39 -1e39) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 340282356779733661637539395458142568448 340282356779733661637539395458142568448" + " 340282356779733661637539395458142568448 340282356779733661637539395458142568448) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 -340282356779733661637539395458142568448 -340282356779733661637539395458142568448" + " -340282356779733661637539395458142568448 -340282356779733661637539395458142568448) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f32x4 nan:1 nan:1 nan:1 nan:1) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const f32x4 nan:0x0 nan:0x0 nan:0x0 nan:0x0) drop)") + "constant out of range" +) + +(assert_malformed + (module quote "(func (v128.const f32x4 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000) drop)") + "constant out of range" +) + + +;; Rounding behaviour + +;; f32x4, small exponent +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.00000100000000000p-50 +0x1.00000100000000000p-50 +0x1.00000100000000000p-50 +0x1.00000100000000000p-50))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.00000100000000000p-50 -0x1.00000100000000000p-50 -0x1.00000100000000000p-50 -0x1.00000100000000000p-50))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.00000500000000001p-50 +0x1.00000500000000001p-50 +0x1.00000500000000001p-50 +0x1.00000500000000001p-50))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000006p-50 +0x1.000006p-50 +0x1.000006p-50 +0x1.000006p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.00000500000000001p-50 -0x1.00000500000000001p-50 -0x1.00000500000000001p-50 -0x1.00000500000000001p-50))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000006p-50 -0x1.000006p-50 -0x1.000006p-50 -0x1.000006p-50)) + +(module (func (export "f") (result v128) (v128.const f32x4 +0x4000.004000000p-64 +0x4000.004000000p-64 +0x4000.004000000p-64 +0x4000.004000000p-64))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x4000.004000000p-64 -0x4000.004000000p-64 -0x4000.004000000p-64 -0x4000.004000000p-64))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x4000.014000001p-64 +0x4000.014000001p-64 +0x4000.014000001p-64 +0x4000.014000001p-64))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000006p-50 +0x1.000006p-50 +0x1.000006p-50 +0x1.000006p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x4000.014000001p-64 -0x4000.014000001p-64 -0x4000.014000001p-64 -0x4000.014000001p-64))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000006p-50 -0x1.000006p-50 -0x1.000006p-50 -0x1.000006p-50)) + +(module (func (export "f") (result v128) (v128.const f32x4 +8.8817847263968443573e-16 +8.8817847263968443573e-16 +8.8817847263968443573e-16 +8.8817847263968443573e-16))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50 +0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -8.8817847263968443573e-16 -8.8817847263968443573e-16 -8.8817847263968443573e-16 -8.8817847263968443573e-16))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50 -0x1.000000p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 +8.8817857851880284253e-16 +8.8817857851880284253e-16 +8.8817857851880284253e-16 +8.8817857851880284253e-16))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000004p-50 +0x1.000004p-50 +0x1.000004p-50 +0x1.000004p-50)) +(module (func (export "f") (result v128) (v128.const f32x4 -8.8817857851880284253e-16 -8.8817857851880284253e-16 -8.8817857851880284253e-16 -8.8817857851880284253e-16))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000004p-50 -0x1.000004p-50 -0x1.000004p-50 -0x1.000004p-50)) + +;; f32x4, large exponent +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.00000100000000000p+50 +0x1.00000100000000000p+50 +0x1.00000100000000000p+50 +0x1.00000100000000000p+50))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.00000100000000000p+50 -0x1.00000100000000000p+50 -0x1.00000100000000000p+50 -0x1.00000100000000000p+50))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.00000500000000001p+50 +0x1.00000500000000001p+50 +0x1.00000500000000001p+50 +0x1.00000500000000001p+50))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000006p+50 +0x1.000006p+50 +0x1.000006p+50 +0x1.000006p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.00000500000000001p+50 -0x1.00000500000000001p+50 -0x1.00000500000000001p+50 -0x1.00000500000000001p+50))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000006p+50 -0x1.000006p+50 -0x1.000006p+50 -0x1.000006p+50)) + +(module (func (export "f") (result v128) (v128.const f32x4 +0x4000004000000 +0x4000004000000 +0x4000004000000 +0x4000004000000))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x4000004000000 -0x4000004000000 -0x4000004000000 -0x4000004000000))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x400000c000000 +0x400000c000000 +0x400000c000000 +0x400000c000000))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000004p+50 +0x1.000004p+50 +0x1.000004p+50 +0x1.000004p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x400000c000000 -0x400000c000000 -0x400000c000000 -0x400000c000000))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000004p+50 -0x1.000004p+50 -0x1.000004p+50 -0x1.000004p+50)) + +(module (func (export "f") (result v128) (v128.const f32x4 +1125899973951488 +1125899973951488 +1125899973951488 +1125899973951488))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50 +0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -1125899973951488 -1125899973951488 -1125899973951488 -1125899973951488))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50 -0x1.000000p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 +1125900108169216 +1125900108169216 +1125900108169216 +1125900108169216))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.000004p+50 +0x1.000004p+50 +0x1.000004p+50 +0x1.000004p+50)) +(module (func (export "f") (result v128) (v128.const f32x4 -1125900108169216 -1125900108169216 -1125900108169216 -1125900108169216))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.000004p+50 -0x1.000004p+50 -0x1.000004p+50 -0x1.000004p+50)) + +;; f32x4, subnormal +(module (func (export "f") (result v128) (v128.const f32x4 +0x0.00000100000000000p-126 +0x0.00000100000000000p-126 +0x0.00000100000000000p-126 +0x0.00000100000000000p-126))) +(assert_return (invoke "f") (v128.const f32x4 +0x0.000000p-126 +0x0.000000p-126 +0x0.000000p-126 +0x0.000000p-126)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x0.00000100000000000p-126 -0x0.00000100000000000p-126 -0x0.00000100000000000p-126 -0x0.00000100000000000p-126))) +(assert_return (invoke "f") (v128.const f32x4 -0x0.000000p-126 -0x0.000000p-126 -0x0.000000p-126 -0x0.000000p-126)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x0.00000500000000001p-126 +0x0.00000500000000001p-126 +0x0.00000500000000001p-126 +0x0.00000500000000001p-126))) +(assert_return (invoke "f") (v128.const f32x4 +0x0.000006p-126 +0x0.000006p-126 +0x0.000006p-126 +0x0.000006p-126)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x0.00000500000000001p-126 -0x0.00000500000000001p-126 -0x0.00000500000000001p-126 -0x0.00000500000000001p-126))) +(assert_return (invoke "f") (v128.const f32x4 -0x0.000006p-126 -0x0.000006p-126 -0x0.000006p-126 -0x0.000006p-126)) + +;; f32x4, round down at limit to infinity +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.fffffe8p127 +0x1.fffffe8p127 +0x1.fffffe8p127 +0x1.fffffe8p127))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.fffffep127 +0x1.fffffep127 +0x1.fffffep127 +0x1.fffffep127)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.fffffe8p127 -0x1.fffffe8p127 -0x1.fffffe8p127 -0x1.fffffe8p127))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127)) +(module (func (export "f") (result v128) (v128.const f32x4 +0x1.fffffefffffffffffp127 +0x1.fffffefffffffffffp127 +0x1.fffffefffffffffffp127 +0x1.fffffefffffffffffp127))) +(assert_return (invoke "f") (v128.const f32x4 +0x1.fffffep127 +0x1.fffffep127 +0x1.fffffep127 +0x1.fffffep127)) +(module (func (export "f") (result v128) (v128.const f32x4 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127))) +(assert_return (invoke "f") (v128.const f32x4 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127)) + + +;; As parameters of control constructs + +(module (memory 1) + (func (export "as-br-retval") (result v128) + (block (result v128) (br 0 (v128.const i32x4 0x03020100 0x07060504 0x0b0a0908 0x0f0e0d0c))) + ) + (func (export "as-br_if-retval") (result v128) + (block (result v128) + (br_if 0 (v128.const i32x4 0 1 2 3) (i32.const 1)) + ) + ) + (func (export "as-return-retval") (result v128) + (return (v128.const i32x4 0 1 2 3)) + ) + (func (export "as-if-then-retval") (result v128) + (if (result v128) (i32.const 1) + (then (v128.const i32x4 0 1 2 3)) (else (v128.const i32x4 3 2 1 0)) + ) + ) + (func (export "as-if-else-retval") (result v128) + (if (result v128) (i32.const 0) + (then (v128.const i32x4 0 1 2 3)) (else (v128.const i32x4 3 2 1 0)) + ) + ) + (func $f (param v128 v128 v128) (result v128) (v128.const i32x4 0 1 2 3)) + (func (export "as-call-param") (result v128) + (call $f (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3)) + ) + (type $sig (func (param v128 v128 v128) (result v128))) + (table funcref (elem $f)) + (func (export "as-call_indirect-param") (result v128) + (call_indirect (type $sig) + (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (i32.const 0) + ) + ) + (func (export "as-block-retval") (result v128) + (block (result v128) (v128.const i32x4 0 1 2 3)) + ) + (func (export "as-loop-retval") (result v128) + (loop (result v128) (v128.const i32x4 0 1 2 3)) + ) + (func (export "as-drop-operand") + (drop (v128.const i32x4 0 1 2 3)) + ) +) + +(assert_return (invoke "as-br-retval") (v128.const i32x4 0x03020100 0x07060504 0x0b0a0908 0x0f0e0d0c)) +(assert_return (invoke "as-br_if-retval") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-return-retval") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-if-then-retval") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-if-else-retval") (v128.const i32x4 3 2 1 0)) +(assert_return (invoke "as-call-param") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-call_indirect-param") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-block-retval") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-loop-retval") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "as-drop-operand")) + + +;; v128 locals + +(module (memory 1) + (func (export "as-local.set/get-value_0_0") (param $0 v128) (result v128) + (local v128 v128 v128 v128) + (local.set 0 (local.get $0)) + (local.get 0) + ) + (func (export "as-local.set/get-value_0_1") (param $0 v128) (result v128) + (local v128 v128 v128 v128) + (local.set 0 (local.get $0)) + (local.set 1 (local.get 0)) + (local.set 2 (local.get 1)) + (local.set 3 (local.get 2)) + (local.get 0) + ) + (func (export "as-local.set/get-value_3_0") (param $0 v128) (result v128) + (local v128 v128 v128 v128) + (local.set 0 (local.get $0)) + (local.set 1 (local.get 0)) + (local.set 2 (local.get 1)) + (local.set 3 (local.get 2)) + (local.get 3) + ) + (func (export "as-local.tee-value") (result v128) + (local v128) + (local.tee 0 (v128.const i32x4 0 1 2 3)) + ) +) + +(assert_return (invoke "as-local.set/get-value_0_0" (v128.const i32x4 0 0 0 0)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "as-local.set/get-value_0_1" (v128.const i32x4 1 1 1 1)) (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "as-local.set/get-value_3_0" (v128.const i32x4 2 2 2 2)) (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "as-local.tee-value") (v128.const i32x4 0 1 2 3)) + + +;; v128 globals + +(module (memory 1) + (global $g0 (mut v128) (v128.const i32x4 0 1 2 3)) + (global $g1 (mut v128) (v128.const i32x4 4 5 6 7)) + (global $g2 (mut v128) (v128.const i32x4 8 9 10 11)) + (global $g3 (mut v128) (v128.const i32x4 12 13 14 15)) + (global $g4 (mut v128) (v128.const i32x4 16 17 18 19)) + + (func $set_g0 (export "as-global.set_value_$g0") (param $0 v128) + (global.set $g0 (local.get $0)) + ) + (func $set_g1_g2 (export "as-global.set_value_$g1_$g2") (param $0 v128) (param $1 v128) + (global.set $g1 (local.get $0)) + (global.set $g2 (local.get $1)) + ) + (func $set_g0_g1_g2_g3 (export "as-global.set_value_$g0_$g1_$g2_$g3") (param $0 v128) (param $1 v128) (param $2 v128) (param $3 v128) + (call $set_g0 (local.get $0)) + (call $set_g1_g2 (local.get $1) (local.get $2)) + (global.set $g3 (local.get $3)) + ) + (func (export "global.get_g0") (result v128) + (global.get $g0) + ) + (func (export "global.get_g1") (result v128) + (global.get $g1) + ) + (func (export "global.get_g2") (result v128) + (global.get $g2) + ) + (func (export "global.get_g3") (result v128) + (global.get $g3) + ) +) + +(assert_return (invoke "as-global.set_value_$g0_$g1_$g2_$g3" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2) + (v128.const i32x4 3 3 3 3) + (v128.const i32x4 4 4 4 4))) +(assert_return (invoke "global.get_g0") (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "global.get_g1") (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "global.get_g2") (v128.const i32x4 3 3 3 3)) +(assert_return (invoke "global.get_g3") (v128.const i32x4 4 4 4 4)) + + +;; Test integer literal parsing. + +(module + (func (export "i32x4.test") (result v128) (return (v128.const i32x4 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D))) + (func (export "i32x4.smax") (result v128) (return (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff))) + (func (export "i32x4.neg_smax") (result v128) (return (v128.const i32x4 -0x7fffffff -0x7fffffff -0x7fffffff -0x7fffffff))) + (func (export "i32x4.inc_smin") (result v128) (return (i32x4.add (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 1 1 1 1)))) + (func (export "i32x4.neg_zero") (result v128) (return (v128.const i32x4 -0x0 -0x0 -0x0 -0x0))) + (func (export "i32x4.not_octal") (result v128) (return (v128.const i32x4 010 010 010 010))) + (func (export "i32x4.plus_sign") (result v128) (return (v128.const i32x4 +42 +42 +42 +42))) + + (func (export "i32x4-dec-sep1") (result v128) (v128.const i32x4 1_000_000 1_000_000 1_000_000 1_000_000)) + (func (export "i32x4-dec-sep2") (result v128) (v128.const i32x4 1_0_0_0 1_0_0_0 1_0_0_0 1_0_0_0)) + (func (export "i32x4-hex-sep1") (result v128) (v128.const i32x4 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99)) + (func (export "i32x4-hex-sep2") (result v128) (v128.const i32x4 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f)) +) + +(assert_return (invoke "i32x4.test") (v128.const i32x4 195940365 195940365 195940365 195940365)) +(assert_return (invoke "i32x4.smax") (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.neg_smax") (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.inc_smin") (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.neg_zero") (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.not_octal") (v128.const i32x4 10 10 10 10)) +(assert_return (invoke "i32x4.plus_sign") (v128.const i32x4 42 42 42 42)) + +(assert_return (invoke "i32x4-dec-sep1") (v128.const i32x4 1000000 1000000 1000000 1000000)) +(assert_return (invoke "i32x4-dec-sep2") (v128.const i32x4 1000 1000 1000 1000)) +(assert_return (invoke "i32x4-hex-sep1") (v128.const i32x4 0xa0f0099 0xa0f0099 0xa0f0099 0xa0f0099)) +(assert_return (invoke "i32x4-hex-sep2") (v128.const i32x4 0x1aa0f 0x1aa0f 0x1aa0f 0x1aa0f)) + +(assert_malformed + (module quote "(global v128 (v128.const i32x4 _100 _100 _100 _100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 +_100 +_100 +_100 +_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 -_100 -_100 -_100 -_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 99_ 99_ 99_ 99_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 1__000 1__000 1__000 1__000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 _0x100 _0x100 _0x100 _0x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 0_x100 0_x100 0_x100 0_x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 0x_100 0x_100 0x_100 0x_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 0x00_ 0x00_ 0x00_ 0x00_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i32x4 0xff__ffff 0xff__ffff 0xff__ffff 0xff__ffff))") + "unknown operator" +) + + +;; Test floating-point literal parsing. + +(module + (func (export "f32-dec-sep1") (result v128) (v128.const f32x4 1_000_000 1_000_000 1_000_000 1_000_000)) + (func (export "f32-dec-sep2") (result v128) (v128.const f32x4 1_0_0_0 1_0_0_0 1_0_0_0 1_0_0_0)) + (func (export "f32-dec-sep3") (result v128) (v128.const f32x4 100_3.141_592 100_3.141_592 100_3.141_592 100_3.141_592)) + (func (export "f32-dec-sep4") (result v128) (v128.const f32x4 99e+1_3 99e+1_3 99e+1_3 99e+1_3)) + (func (export "f32-dec-sep5") (result v128) (v128.const f32x4 122_000.11_3_54E0_2_3 122_000.11_3_54E0_2_3 122_000.11_3_54E0_2_3 122_000.11_3_54E0_2_3)) + (func (export "f32-hex-sep1") (result v128) (v128.const f32x4 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99)) + (func (export "f32-hex-sep2") (result v128) (v128.const f32x4 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f)) + (func (export "f32-hex-sep3") (result v128) (v128.const f32x4 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a)) + (func (export "f32-hex-sep4") (result v128) (v128.const f32x4 0xf0P+1_3 0xf0P+1_3 0xf0P+1_3 0xf0P+1_3)) + (func (export "f32-hex-sep5") (result v128) (v128.const f32x4 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3)) +) + +(assert_return (invoke "f32-dec-sep1") (v128.const f32x4 1000000 1000000 1000000 1000000)) +(assert_return (invoke "f32-dec-sep2") (v128.const f32x4 1000 1000 1000 1000)) +(assert_return (invoke "f32-dec-sep3") (v128.const f32x4 1003.141592 1003.141592 1003.141592 1003.141592)) +(assert_return (invoke "f32-dec-sep4") (v128.const f32x4 99e+13 99e+13 99e+13 99e+13)) +(assert_return (invoke "f32-dec-sep5") (v128.const f32x4 122000.11354e23 122000.11354e23 122000.11354e23 122000.11354e23)) +(assert_return (invoke "f32-hex-sep1") (v128.const f32x4 0xa0f0099 0xa0f0099 0xa0f0099 0xa0f0099)) +(assert_return (invoke "f32-hex-sep2") (v128.const f32x4 0x1aa0f 0x1aa0f 0x1aa0f 0x1aa0f)) +(assert_return (invoke "f32-hex-sep3") (v128.const f32x4 0xa0ff.f141a59a 0xa0ff.f141a59a 0xa0ff.f141a59a 0xa0ff.f141a59a)) +(assert_return (invoke "f32-hex-sep4") (v128.const f32x4 0xf0P+13 0xf0P+13 0xf0P+13 0xf0P+13)) +(assert_return (invoke "f32-hex-sep5") (v128.const f32x4 0x2af00a.1f3eep23 0x2af00a.1f3eep23 0x2af00a.1f3eep23 0x2af00a.1f3eep23)) + +(assert_malformed + (module quote "(global v128 (v128.const f32x4 _100 _100 _100 _100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 +_100 +_100 +_100 +_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 -_100 -_100 -_100 -_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 99_ 99_ 99_ 99_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1__000 1__000 1__000 1__000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 _1.0 _1.0 _1.0 _1.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0_ 1.0_ 1.0_ 1.0_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1_.0 1_.0 1_.0 1_.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1._0 1._0 1._0 1._0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 _1e1 _1e1 _1e1 _1e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1e1_ 1e1_ 1e1_ 1e1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1_e1 1_e1 1_e1 1_e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1e_1 1e_1 1e_1 1e_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 _1.0e1 _1.0e1 _1.0e1 _1.0e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0e1_ 1.0e1_ 1.0e1_ 1.0e1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0_e1 1.0_e1 1.0_e1 1.0_e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0e_1 1.0e_1 1.0e_1 1.0e_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0e+_1 1.0e+_1 1.0e+_1 1.0e+_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 1.0e_+1 1.0e_+1 1.0e_+1 1.0e_+1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 _0x100 _0x100 _0x100 _0x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0_x100 0_x100 0_x100 0_x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x_100 0x_100 0x_100 0x_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x00_ 0x00_ 0x00_ 0x00_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0xff__ffff 0xff__ffff 0xff__ffff 0xff__ffff))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x_1.0 0x_1.0 0x_1.0 0x_1.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0_ 0x1.0_ 0x1.0_ 0x1.0_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1_.0 0x1_.0 0x1_.0 0x1_.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1._0 0x1._0 0x1._0 0x1._0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x_1p1 0x_1p1 0x_1p1 0x_1p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1p1_ 0x1p1_ 0x1p1_ 0x1p1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1_p1 0x1_p1 0x1_p1 0x1_p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1p_1 0x1p_1 0x1p_1 0x1p_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x_1.0p1 0x_1.0p1 0x_1.0p1 0x_1.0p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0p1_ 0x1.0p1_ 0x1.0p1_ 0x1.0p1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0_p1 0x1.0_p1 0x1.0_p1 0x1.0_p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0p_1 0x1.0p_1 0x1.0p_1 0x1.0p_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0p+_1 0x1.0p+_1 0x1.0p+_1 0x1.0p+_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f32x4 0x1.0p_+1 0x1.0p_+1 0x1.0p_+1 0x1.0p_+1))") + "unknown operator" +) + + +;; Test parsing an integer from binary + +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\69\38\78\31\36\00\00" ;; export name (parse_i8x16) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\00\00\00\00" ;; data lane 0~3 (0, 0, 0, 0) + "\80\80\80\80" ;; data lane 4~7 (-128, -128, -128, -128) + "\ff\ff\ff\ff" ;; data lane 8~11 (0xff, 0xff, 0xff, 0xff) + "\ff\ff\ff\ff" ;; data lane 12~15 (255, 255, 255, 255) + "\0b" ;; end +) +(assert_return (invoke "parse_i8x16") (v128.const i8x16 0 0 0 0 -128 -128 -128 -128 0xff 0xff 0xff 0xff 255 255 255 255)) + +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\69\31\36\78\38\00\00" ;; export name (parse_i16x8) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\00\00\00\00" ;; data lane 0, 1 (0, 0) + "\00\80\00\80" ;; data lane 2, 3 (-32768, -32768) + "\ff\ff\ff\ff" ;; data lane 4, 5 (65535, 65535) + "\ff\ff\ff\ff" ;; data lane 6, 7 (0xffff, 0xffff) + "\0b" ;; end +) +(assert_return (invoke "parse_i16x8") (v128.const i16x8 0 0 -32768 -32768 65535 65535 0xffff 0xffff)) + +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\69\33\32\78\34\00\00" ;; export name (parse_i32x4) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\d1\ff\ff\ff" ;; data lane 0 (4294967249) + "\d1\ff\ff\ff" ;; data lane 1 (4294967249) + "\d1\ff\ff\ff" ;; data lane 2 (4294967249) + "\d1\ff\ff\ff" ;; data lane 3 (4294967249) + "\0b" ;; end +) +(assert_return (invoke "parse_i32x4") (v128.const i32x4 4294967249 4294967249 4294967249 4294967249)) + + +;; Test parsing a float from binary + +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\66\33\32\78\34\00\00" ;; export name (parse_f32x4) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\00\00\80\4f" ;; data lane 0 (4294967249) + "\00\00\80\4f" ;; data lane 1 (4294967249) + "\00\00\80\4f" ;; data lane 2 (4294967249) + "\00\00\80\4f" ;; data lane 3 (4294967249) + "\0b" ;; end +) +(assert_return (invoke "parse_f32x4") (v128.const f32x4 4294967249 4294967249 4294967249 4294967249)) diff --git a/test/core/simd/simd_f32x4_cmp.wast b/test/core/simd/simd_f32x4_cmp.wast new file mode 100644 index 0000000000..7811bd657e --- /dev/null +++ b/test/core/simd/simd_f32x4_cmp.wast @@ -0,0 +1,7618 @@ +;; Test all the f32x4 comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (f32x4.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (f32x4.ne (local.get $x) (local.get $y))) + (func (export "lt") (param $x v128) (param $y v128) (result v128) (f32x4.lt (local.get $x) (local.get $y))) + (func (export "le") (param $x v128) (param $y v128) (result v128) (f32x4.le (local.get $x) (local.get $y))) + (func (export "gt") (param $x v128) (param $y v128) (result v128) (f32x4.gt (local.get $x) (local.get $y))) + (func (export "ge") (param $x v128) (param $y v128) (result v128) (f32x4.ge (local.get $x) (local.get $y))) +) + +;; eq +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; ne +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) + +;; lt +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) + +;; le +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; gt +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) + +;; ge +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; eq + +;; f32x4.eq (f32x4) (i8x16) +(assert_return (invoke "eq" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 0 -1 0 0)) + +;; f32x4.eq (f32x4) (i16x8) +(assert_return (invoke "eq" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 0 -1 0 0)) + +;; f32x4.eq (f32x4) (i32x4) +(assert_return (invoke "eq" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 -1 -1 0 0 )) + +;; ne + +;; f32x4.ne (f32x4) (i8x16) +(assert_return (invoke "ne" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 -1 0 -1 -1)) + +;; f32x4.ne (f32x4) (i16x8) +(assert_return (invoke "ne" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 -1 0 -1 -1)) + +;; f32x4.ne (f32x4) (i32x4) +(assert_return (invoke "ne" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 0 0 -1 -1)) + +;; lt + +;; f32x4.lt (f32x4) (i8x16) +(assert_return (invoke "lt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 0 0 0 0)) + +;; f32x4.lt (f32x4) (i16x8) +(assert_return (invoke "lt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 0 0 0 0)) + +;; f32x4.lt (f32x4) (i32x4) +(assert_return (invoke "lt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 0 0 0 0)) + +;; le + +;; f32x4.le (f32x4) (i8x16) +(assert_return (invoke "le" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 0 -1 0 0)) + +;; f32x4.le (f32x4) (i16x8) +(assert_return (invoke "le" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 0 -1 0 0)) + +;; f32x4.le (f32x4) (i32x4) +(assert_return (invoke "le" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 -1 -1 0 0)) + +;; gt + +;; f32x4.gt (f32x4) (i8x16) +(assert_return (invoke "gt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 0 0 -1 -1)) + +;; f32x4.gt (f32x4) (i16x8) +(assert_return (invoke "gt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 0 0 -1 -1)) + +;; f32x4.gt (f32x4) (i32x4) +(assert_return (invoke "gt" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 0 0 -1 -1)) + +;; ge + +;; f32x4.ge (f32x4) (i8x16) +(assert_return (invoke "ge" (v128.const f32x4 -1 0 1 2.0) + (v128.const i8x16 -1 -1 -1 -1 0 0 0 0 1 1 1 1 2 2 2 2)) + (v128.const i32x4 0 -1 -1 -1)) + +;; f32x4.ge (f32x4) (i16x8) +(assert_return (invoke "ge" (v128.const f32x4 -1 0 1 2.0) + (v128.const i16x8 -1 -1 0 0 1 1 2 2)) + (v128.const i32x4 0 -1 -1 -1)) + +;; f32x4.ge (f32x4) (i32x4) +(assert_return (invoke "ge" (v128.const f32x4 -1 0 1 2.0) + (v128.const i32x4 3212836864 0 1 2)) + (v128.const i32x4 -1 -1 -1 -1)) + + +;; Type check + +(assert_invalid (module (func (result v128) (f32x4.eq (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.ge (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.gt (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.le (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.lt (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.ne (i64.const 0) (f64.const 0)))) "type mismatch") + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.eq (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.ge (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.gt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.le (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.lt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.ne (local.get $x) (local.get $y)))") "unknown operator") + + +;; Combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + (f32x4.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + (f32x4.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt-in-block") + (block + (drop + (block (result v128) + (f32x4.lt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le-in-block") + (block + (drop + (block (result v128) + (f32x4.le + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt-in-block") + (block + (drop + (block (result v128) + (f32x4.gt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge-in-block") + (block + (drop + (block (result v128) + (f32x4.ge + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + (f32x4.eq + (f32x4.eq + (f32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.eq + (f32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + (f32x4.ne + (f32x4.ne + (f32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ne + (f32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt") + (drop + (f32x4.lt + (f32x4.lt + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.lt + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le") + (drop + (f32x4.le + (f32x4.le + (f32x4.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.le + (f32x4.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt") + (drop + (f32x4.gt + (f32x4.gt + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.gt + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge") + (drop + (f32x4.ge + (f32x4.ge + (f32x4.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ge + (f32x4.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (f32x4.ge + (f32x4.eq + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ne + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) + +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt-in-block")) +(assert_return (invoke "le-in-block")) +(assert_return (invoke "gt-in-block")) +(assert_return (invoke "ge-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt")) +(assert_return (invoke "nested-le")) +(assert_return (invoke "nested-gt")) +(assert_return (invoke "nested-ge")) +(assert_return (invoke "as-param")) diff --git a/test/core/simd/simd_i16x8_cmp.wast b/test/core/simd/simd_i16x8_cmp.wast new file mode 100644 index 0000000000..b3e24e2e66 --- /dev/null +++ b/test/core/simd/simd_i16x8_cmp.wast @@ -0,0 +1,1678 @@ + +;; Test all the i16x8 comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (i16x8.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (i16x8.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) (i16x8.lt_s (local.get $x) (local.get $y))) + (func (export "lt_u") (param $x v128) (param $y v128) (result v128) (i16x8.lt_u (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) (i16x8.le_s (local.get $x) (local.get $y))) + (func (export "le_u") (param $x v128) (param $y v128) (result v128) (i16x8.le_u (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) (i16x8.gt_s (local.get $x) (local.get $y))) + (func (export "gt_u") (param $x v128) (param $y v128) (result v128) (i16x8.gt_u (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) (i16x8.ge_s (local.get $x) (local.get $y))) + (func (export "ge_u") (param $x v128) (param $y v128) (result v128) (i16x8.ge_u (local.get $x) (local.get $y))) +) + + +;; eq + +;; i16x8.eq (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "eq" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "eq" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "eq" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 -1 -1 0 0 0 0 -1 -1)) + +;; i16x8.eq (i16x8) (i8x16) +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 0 0 -1 -1 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; i16x8.eq (i16x8) (i32x4) +(assert_return (invoke "eq" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 0 0 1 1 32768 32768) + (v128.const i32x4 65535 0 1 32768)) + (v128.const i16x8 -1 0 -1 -1 -1 0 -1 0)) +(assert_return (invoke "eq" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; ne + +;; i16x8.ne (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "ne" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 255 255 255 255 255 255 255 255) + (v128.const i16x8 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 255 255 255 255 0 0 0 0) + (v128.const i16x8 255 255 255 255 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0 0 0 0 255 255 255 255) + (v128.const i16x8 0 0 0 0 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 255 32767 -0 0 1 2 65534 65535) + (v128.const i16x8 255 32767 0 0 1 2 -2 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "ne" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "ne" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 0x8081 0x8283 0xFDFE 0xFF00 0x0001 0x027F 0x80FD 0xFEFF) + (v128.const i16x8 65279 33021 639 1 65280 65022 33411 32897)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 128 129 130 131 -0 255 32766 32767) + (v128.const i16x8 32767 32766 255 -0 131 130 129 28)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.ne (i16x8) (i8x16) +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 -1 -1 0 0 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.ne (i16x8) (i32x4) +(assert_return (invoke "ne" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 0 -1 0 0 0 -1 0 -1)) +(assert_return (invoke "ne" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; lt_s + +;; i16x8.lt_s (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 255 255 255 255 255 255 255 255) + (v128.const i16x8 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 255 255 255 255 0 0 0 0) + (v128.const i16x8 255 255 255 255 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0 0 0 0 255 255 255 255) + (v128.const i16x8 0 0 0 0 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 255 32767 -0 0 1 2 65534 65535) + (v128.const i16x8 255 32767 0 0 1 2 -2 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 0 0 -1 0 0 0 0 -1)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x8081 0x8283 0xFDFE 0xFF00 0x0001 0x027F 0x80FD 0xFEFF) + (v128.const i16x8 65279 33021 639 1 65280 65022 33411 32897)) + (v128.const i16x8 -1 0 -1 -1 0 0 -1 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 128 129 130 131 -0 255 32766 32767) + (v128.const i16x8 32767 32766 255 -0 131 130 129 28)) + (v128.const i16x8 -1 -1 -1 0 -1 0 0 0)) + +;; i16x8.lt_s (i16x8) (i8x16) +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 0 0 0 0 -1 -1 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; i16x8.lt_s (i16x8) (i32x4) +(assert_return (invoke "lt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 0 -1 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; lt_u + +;; i16x8.lt_u (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 255 255 255 255 255 255 255 255) + (v128.const i16x8 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 255 255 255 255 0 0 0 0) + (v128.const i16x8 255 255 255 255 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0 0 0 0 255 255 255 255) + (v128.const i16x8 0 0 0 0 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 255 32767 -0 0 1 2 65534 65535) + (v128.const i16x8 255 32767 0 0 1 2 -2 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "lt_u" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 -1 -1 -1 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x8081 0x8283 0xFDFE 0xFF00 0x0001 0x027F 0x80FD 0xFEFF) + (v128.const i16x8 65279 33021 639 1 65280 65022 33411 32897)) + (v128.const i16x8 -1 0 0 0 -1 -1 -1 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 128 129 130 131 -0 255 32766 32767) + (v128.const i16x8 32767 32766 255 -0 131 130 129 28)) + (v128.const i16x8 -1 -1 -1 0 -1 0 0 0)) + +;; i16x8.lt_u (i16x8) (i8x16) +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.lt_u (i16x8) (i32x4) +(assert_return (invoke "lt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 0 -1 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; le_s + +;; i16x8.le_s (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_s" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 0 0 -1 0 0 0 0 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "le_s" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 -1 -1 -1 -1 0 0 -1 -1)) + +;; i16x8.le_s (i16x8) (i8x16) +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 0 0 -1 -1 -1 -1 0 0)) +(assert_return (invoke "le_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; i16x8.le_s (i16x8) (i32x4) +(assert_return (invoke "le_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 0 -1 0)) +(assert_return (invoke "le_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; le_u + +;; i16x8.le_u (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_u" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 -1 -1 -1 0 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 -1 -1 -1 0 -1 0 -1 -1)) + +;; i16x8.le_u (i16x8) (i8x16) +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 0 0 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.le_u (i16x8) (i32x4) +(assert_return (invoke "le_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 0 -1 0)) +(assert_return (invoke "le_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; gt_s + +;; i16x8.gt_s (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "gt_s" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 -1 -1 0 -1 -1 -1 -1 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 0 0 0 0 -1 -1 0 0)) + +;; i16x8.gt_s (i16x8) (i8x16) +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 -1 -1 0 0 0 0 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.gt_s (i16x8) (i32x4) +(assert_return (invoke "gt_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 65535 65535 0 0 1 1 32768 32768) + (v128.const i32x4 65535 0 1 32768)) + (v128.const i16x8 0 0 0 0 0 -1 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; gt_u + +;; i16x8.gt_u (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "eq" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "gt_u" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 0 0 0 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 0 0 0 -1 0 -1 0 0)) + +;; i16x8.gt_u (i16x8) (i8x16) +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 -1 -1 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; i16x8.gt_u (i16x8) (i32x4) +(assert_return (invoke "gt_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 0 0 0 0 0 -1 0 -1)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; ge_s + +;; i16x8.ge_s (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_s" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_s" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 -1 -1 0 -1 -1 -1 -1 0)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 -1 -1 0 0 -1 -1 -1 -1)) + +;; i16x8.ge_s (i16x8) (i8x16) +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 0 0 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; i16x8.ge_s (i16x8) (i32x4) +(assert_return (invoke "ge_s" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 65535 65535 0 0 1 1 32768 32768) + (v128.const i32x4 65535 0 1 32768)) + (v128.const i16x8 -1 0 -1 -1 -1 -1 -1 0)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; ge_u + +;; i16x8.ge_u (i16x8) (i16x8) + +;; hex vs hex +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB) + (v128.const i16x8 0x0100 0x0302 0x0904 0x1110 0x0A12 0x1A0B 0xAA1B 0xFFAB)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 32896 32896 32896 32896 32896 32896 32896 32896)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080) + (v128.const i16x8 -32640 -32640 -32640 -32640 -32640 -32640 -32640 -32640)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x8180 0x8382 0xFEFD 0x00FF 0x0100 0x7F02 0xFD80 0xFFFE) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 65535 65535 0 0 0 0) + (v128.const i16x8 65535 65535 65535 65535 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0 0 0 0 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 65535 65535 65535 65535)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 -32768 65534 -1 -0 0 1 2 65535) + (v128.const i16x8 32768 -2 -1 -0 0 1 2 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_u" (v128.const i16x8 0x0000 0xc300 0x0000 0xc2fe 0x0000 0xbf80 0x0000 0x0000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0000 0x3f80 0x0000 0x42fe 0x0000 0x4300 0x0000 0x437f) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_u" (v128.const i16x8 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F 0x0F0F) + (v128.const i16x8 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0 0xF0F0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0000 0x0000 0x0000 0x0000)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0001 0x0203 0x0409 0x1011 0x120A 0x0B1A 0x1BAA 0xABFF) + (v128.const i16x8 0xFFAB 0xAA1B 0x1A0B 0x0A12 0x1110 0x0904 0x0302 0x0100)) + (v128.const i16x8 0 0 0 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x8000 0x8001 0x8002 0x8003 0x8004 0x8005 0x8006 0x8007) + (v128.const i16x8 32775 32774 32773 32772 32771 32770 32769 32768)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 32768 32769 65534 65535 0 -1 -32767 -32768) + (v128.const i16x8 -32768 -32767 -1 0 65535 65534 32769 32768)) + (v128.const i16x8 -1 -1 0 -1 0 -1 -1 -1)) + +;; i16x8.ge_u (i16x8) (i8x16) +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 -128 -128 0 0 1 1 255 255) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "ge_u" (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i16x8.ge_u (i16x8) (i32x4) +(assert_return (invoke "ge_u" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 65535 65535 0 0 1 1 32768 32768) + (v128.const i32x4 -128 0 1 255)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + + +;; Type check + +(assert_invalid (module (func (result v128) (i16x8.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.ge_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.gt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.le_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.lt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.ne (i32.const 0) (f32.const 0)))) "type mismatch") + + +;; combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + (i16x8.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + (i16x8.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt_s-in-block") + (block + (drop + (block (result v128) + (i16x8.lt_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le_u-in-block") + (block + (drop + (block (result v128) + (i16x8.le_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt_u-in-block") + (block + (drop + (block (result v128) + (i16x8.gt_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge_s-in-block") + (block + (drop + (block (result v128) + (i16x8.ge_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + (i16x8.eq + (i16x8.eq + (i16x8.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.eq + (i16x8.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + (i16x8.ne + (i16x8.ne + (i16x8.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.ne + (i16x8.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt_s") + (drop + (i16x8.lt_s + (i16x8.lt_s + (i16x8.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.lt_s + (i16x8.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le_u") + (drop + (i16x8.le_u + (i16x8.le_u + (i16x8.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.le_u + (i16x8.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt_u") + (drop + (i16x8.gt_u + (i16x8.gt_u + (i16x8.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.gt_u + (i16x8.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge_s") + (drop + (i16x8.ge_s + (i16x8.ge_s + (i16x8.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.ge_s + (i16x8.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (i16x8.ge_u + (i16x8.eq + (i16x8.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i16x8.ne + (i16x8.gt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i16x8.lt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt_s-in-block")) +(assert_return (invoke "le_u-in-block")) +(assert_return (invoke "gt_u-in-block")) +(assert_return (invoke "ge_s-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt_s")) +(assert_return (invoke "nested-le_u")) +(assert_return (invoke "nested-gt_u")) +(assert_return (invoke "nested-ge_s")) +(assert_return (invoke "as-param")) + diff --git a/test/core/simd/simd_i32x4_cmp.wast b/test/core/simd/simd_i32x4_cmp.wast new file mode 100644 index 0000000000..dd07ee0e51 --- /dev/null +++ b/test/core/simd/simd_i32x4_cmp.wast @@ -0,0 +1,1698 @@ + +;; Test all the i32x4 comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (i32x4.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (i32x4.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) (i32x4.lt_s (local.get $x) (local.get $y))) + (func (export "lt_u") (param $x v128) (param $y v128) (result v128) (i32x4.lt_u (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) (i32x4.le_s (local.get $x) (local.get $y))) + (func (export "le_u") (param $x v128) (param $y v128) (result v128) (i32x4.le_u (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) (i32x4.gt_s (local.get $x) (local.get $y))) + (func (export "gt_u") (param $x v128) (param $y v128) (result v128) (i32x4.gt_u (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) (i32x4.ge_s (local.get $x) (local.get $y))) + (func (export "ge_u") (param $x v128) (param $y v128) (result v128) (i32x4.ge_u (local.get $x) (local.get $y))) +) + + +;; eq + +;; i32x4.eq (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "eq" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "eq" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "eq" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 -1 0 0 0)) + +;; i32x4.eq (i32x4) (i8x16) +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 0 -1 0 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 0 0 0 0)) + +;; i32x4.eq (i32x4) (i16x8) +(assert_return (invoke "eq" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 4294967295 0 1 65535) + (v128.const i16x8 65535 65535 0 0 1 0 65535 65535)) + (v128.const i32x4 -1 -1 -1 0)) +(assert_return (invoke "eq" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i32x4 0 0 0 0)) + +;; ne + +;; i32x4.ne (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "ne" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "ne" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 0 0 0 0)) + +;; not equal +(assert_return (invoke "ne" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 0 -1 -1 -1)) + +;; i32x4.ne (i32x4) (i8x16) +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 -1 0 -1 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.ne (i32x4) (i16x8) +(assert_return (invoke "ne" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 -1 0 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; lt_s + +;; i32x4.lt_s (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "lt_s" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 0 0 0 -1)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 0 0 0 -1)) + +;; i32x4.lt_s (i32x4) (i8x16) +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 0 0 -1 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 0 0 0 0)) + +;; i32x4.lt_s (i32x4) (i16x8) +(assert_return (invoke "lt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; lt_u + +;; i32x4.lt_u (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "lt_u" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 0 -1 -1 0)) + +;; i32x4.lt_u (i32x4) (i8x16) +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 0 0 -1 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.lt_u (i32x4) (i16x8) +(assert_return (invoke "lt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 0 0 0 0)) + +;; le_s + +;; i32x4.le_s (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_s" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 0 0 0 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "le_s" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 -1 0 0 -1)) + +;; i32x4.le_s (i32x4)(i8x16) +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 0 0 0 0)) + +;; i32x4.le_s (i32x4) (i16x8) +(assert_return (invoke "le_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; le_u + +;; i32x4.le_u (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_u" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "le_u" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "le_u" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "le_u" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 -1 -1 -1 0)) + +;; i32x4.le_u (i32x4) (i8x16) +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.le_u (i32x4) (i16x8) +(assert_return (invoke "le_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 0 0 0 0)) + +;; gt_s + +;; i32x4.gt_s (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "gt_s" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 -1 -1 -1 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 0 -1 -1 0)) + +;; i32x4.gt_s (i32x4) (i8x16) +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.gt_s (i32x4) (i16x8) +(assert_return (invoke "gt_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 65535 0 1 32768) + (v128.const i16x8 65535 65535 0 0 1 1 32768 32768)) + (v128.const i32x4 -1 0 0 -1)) +(assert_return (invoke "gt_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 0 0 0 0)) + +;; gt_u + +;; i32x4.gt_u (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "gt_u" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 0 0 0 -1)) + +;; i32x4.gt_u (i32x4) (i8x16) +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (v128.const i32x4 0 0 0 0)) + +;; i32x4.gt_u (i32x4) (i16x8) +(assert_return (invoke "gt_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; ge_s + +;; i32x4.ge_s (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_s" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_s" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 0 0)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 -1 -1 -1 0)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 -1 -1 -1 0)) + +;; i32x4.ge_s (i32x4) (i8x16) +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 -1 -1 0 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.ge_s (i32x4) (i16x8) +(assert_return (invoke "ge_s" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 65535 0 1 32768) + (v128.const i16x8 65535 65535 0 0 1 1 32768 32768)) + (v128.const i32x4 -1 -1 0 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 0 0 0 0)) + +;; ge_u + +;; i32x4.ge_u (i32x4) (i32x4) + +;; hex vs hex +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B) + (v128.const i32x4 0x03020100 0x11100904 0x1A0B0A12 0xFFABAA1B)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 2155905152 2155905152 2155905152 2155905152)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080) + (v128.const i32x4 -2139062144 -2139062144 -2139062144 -2139062144)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x83828180 0x00FFFEFD 0x7F020100 0xFFFEFD80) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 4294967295 4294967295 0 0) + (v128.const i32x4 4294967295 4294967295 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0 0 4294967295 4294967295) + (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 -2147483647 4294967295 0 -1) + (v128.const i32x4 2147483649 -1 0 -1)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_u" (v128.const i32x4 0xc3000000 0xc2fe0000 0xbf800000 0x00000000) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x3f800000 0x42fe0000 0x43000000 0x437f0000) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_u" (v128.const i32x4 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i32x4 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x00000000 0x00000000 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0x00000000 0x00000000)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x02030001 0x10110409 0x0B1A120A 0xABFF1BAA) + (v128.const i32x4 0xAA1BFFAB 0x0A121A0B 0x09041110 0x01000302)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x80018000 0x80038002 0x80058004 0x80078006) + (v128.const i32x4 2147975174 2147844100 2147713026 2147581952)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 2147483648 2147483647 0 -1) + (v128.const i32x4 -2147483648 -2147483647 -1 0)) + (v128.const i32x4 -1 0 0 -1)) + +;; i32x4.ge_u (i32x4) (i8x16) +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 -8323200 0 1 4294967295) + (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255)) + (v128.const i32x4 -1 -1 0 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (v128.const i32x4 -1 -1 -1 -1)) + +;; i32x4.ge_u (i32x4) (i16x8) +(assert_return (invoke "ge_u" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 2206368128 16776957 2130837760 4294901120) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 -128 0 1 255) + (v128.const i16x8 65535 65535 0 0 1 1 32768 32768)) + (v128.const i32x4 0 -1 0 0)) +(assert_return (invoke "ge_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) + (v128.const i32x4 -1 -1 -1 -1)) + + +;; Type check + +(assert_invalid (module (func (result v128) (i32x4.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.ge_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.gt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.le_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.lt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.ne (i32.const 0) (f32.const 0)))) "type mismatch") + + +;; combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + (i32x4.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + (i32x4.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt_s-in-block") + (block + (drop + (block (result v128) + (i32x4.lt_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le_u-in-block") + (block + (drop + (block (result v128) + (i32x4.le_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt_u-in-block") + (block + (drop + (block (result v128) + (i32x4.gt_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge_s-in-block") + (block + (drop + (block (result v128) + (i32x4.ge_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + (i32x4.eq + (i32x4.eq + (i32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.eq + (i32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + (i32x4.ne + (i32x4.ne + (i32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.ne + (i32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt_s") + (drop + (i32x4.lt_s + (i32x4.lt_s + (i32x4.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.lt_s + (i32x4.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le_u") + (drop + (i32x4.le_u + (i32x4.le_u + (i32x4.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.le_u + (i32x4.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt_u") + (drop + (i32x4.gt_u + (i32x4.gt_u + (i32x4.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.gt_u + (i32x4.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge_s") + (drop + (i32x4.ge_s + (i32x4.ge_s + (i32x4.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.ge_s + (i32x4.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (i32x4.ge_u + (i32x4.eq + (i32x4.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i32x4.ne + (i32x4.gt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i32x4.lt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt_s-in-block")) +(assert_return (invoke "le_u-in-block")) +(assert_return (invoke "gt_u-in-block")) +(assert_return (invoke "ge_s-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt_s")) +(assert_return (invoke "nested-le_u")) +(assert_return (invoke "nested-gt_u")) +(assert_return (invoke "nested-ge_s")) +(assert_return (invoke "as-param")) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.eq (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ne (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.lt_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.lt_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.le_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.le_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_u (local.get $x) (local.get $y)))") "unknown operator") + diff --git a/test/core/simd/simd_i8x16_cmp.wast b/test/core/simd/simd_i8x16_cmp.wast new file mode 100644 index 0000000000..64cf871faa --- /dev/null +++ b/test/core/simd/simd_i8x16_cmp.wast @@ -0,0 +1,1684 @@ + +;; Test all the i8x16 comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (i8x16.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (i8x16.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) (i8x16.lt_s (local.get $x) (local.get $y))) + (func (export "lt_u") (param $x v128) (param $y v128) (result v128) (i8x16.lt_u (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) (i8x16.le_s (local.get $x) (local.get $y))) + (func (export "le_u") (param $x v128) (param $y v128) (result v128) (i8x16.le_u (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) (i8x16.gt_s (local.get $x) (local.get $y))) + (func (export "gt_u") (param $x v128) (param $y v128) (result v128) (i8x16.gt_u (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) (i8x16.ge_s (local.get $x) (local.get $y))) + (func (export "ge_u") (param $x v128) (param $y v128) (result v128) (i8x16.ge_u (local.get $x) (local.get $y))) +) + + +;; eq + +;; i8x16.eq (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "eq" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "eq" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 -1 -1 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 -1 -1 0 0 0 0 0 0 0)) + +;; i8x16.eq (i8x16) (i16x8) +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 -1 0 -1 0 -1 -1 -1 -1 -1 0 -1 0 -1 0 -1 0)) +(assert_return (invoke "eq" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i8x16.eq (i8x16) (i32x4) +(assert_return (invoke "eq" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 -1 0 0 0 -1 -1 -1 -1 -1 0 0 0 -1 0 0 0)) +(assert_return (invoke "eq" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; ne + +;; i8x16.ne (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "ne" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "ne" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 0 0 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 0 0 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.ne (i8x16) (i16x8) +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 0 -1 0 -1 0 0 0 0 0 -1 0 -1 0 -1 0 -1)) +(assert_return (invoke "ne" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.ne (i8x16) (i32x4) +(assert_return (invoke "ne" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 0 -1 -1 -1 0 0 0 0 0 -1 -1 -1 0 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; lt_s + +;; i8x16.lt_s (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 0 0 0 -1 -1 -1 0 -1 0 -1 0 0 0 -1 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 -1 -1 -1 0 0 0 0 0 -1 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 -1 -1 -1 0 0 0 0 0 -1 0 0 0)) + +;; i8x16.lt_s (i8x16) (i16x8) +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 0 -1 0 -1 0 0 0 0 0 0 0 0 0 -1 0 -1)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i8x16.lt_s (i8x16) (i32x4) +(assert_return (invoke "lt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 0 -1 -1 -1 0 0 0 0 0 0 0 0 0 -1 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; lt_u + +;; i8x16.lt_u (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "lt_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 0 -1 0 -1 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 0 0 0 0 0 -1 -1 -1 -1 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 0 0 0 0 0 -1 -1 -1 -1 0 0 0)) + +;; i8x16.lt_u (i8x16) (i16x8) +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 0 -1 0 -1 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.lt_u (i8x16) (i32x4) +(assert_return (invoke "lt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 0 -1 -1 -1 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; le_s + +;; i8x16.le_s (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 0 0 0 -1 -1 -1 0 -1 0 -1 0 0 0 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 -1 -1 -1 -1 -1 0 0 0 -1 0 0 0)) +(assert_return (invoke "le_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 -1 -1 -1 -1 -1 0 0 0 -1 0 0 0)) + +;; i8x16.le_s (i8x16) (i16x8) +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 -1 0 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i8x16.le_s (i8x16) (i32x4) +(assert_return (invoke "le_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; le_u + +;; i8x16.le_u (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "le_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 0 -1 0 -1 0 0 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 0 0 0 -1 -1 -1 -1 -1 -1 0 0 0)) +(assert_return (invoke "le_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 -1 -1 -1 0 0 0 0 -1 -1 -1 -1 -1 -1 0 0 0)) + +;; i8x16.le_u (i8x16) (i16x8) +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 -1 0 -1 0 -1 0)) +(assert_return (invoke "le_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.le_u (i8x16) (i32x4) +(assert_return (invoke "le_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 -1 0 0 0)) +(assert_return (invoke "le_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; gt_s + +;; i8x16.gt_s (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 -1 -1 -1 0 0 0 -1 0 -1 0 -1 -1 -1 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 0 0 0 0 0 -1 -1 -1 0 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 0 0 0 0 0 -1 -1 -1 0 -1 -1 -1)) + +;; i8x16.gt_s (i8x16) (i16x8) +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 -1 0 -1 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.gt_s (i8x16) (i32x4) +(assert_return (invoke "gt_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; gt_u + +;; i8x16.gt_u (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; hex vs float +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; not equal +(assert_return (invoke "gt_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 0 0 0 0 0 0 -1 0 -1 0 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 -1 -1 -1 0 0 0 0 0 0 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 -1 -1 -1 0 0 0 0 0 0 -1 -1 -1)) + +;; i8x16.gt_u (i8x16) (i16x8) +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 -1 0 -1 0 -1 0 -1)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i8x16.gt_u (i8x16) (i32x4) +(assert_return (invoke "gt_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 -1 -1 -1 0 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; ge_s + +;; i8x16.ge_s (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_s" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 -1 -1 -1 0 0 0 -1 0 -1 0 -1 -1 -1 0 0 0)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 0 0 0 -1 -1 -1 -1 -1 0 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 0 0 0 -1 -1 -1 -1 -1 0 -1 -1 -1)) + +;; i8x16.ge_s (i8x16) (i16x8) +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 -1 0 -1 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 -1 0)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; i8x16.ge_s (i8x16) (i32x4) +(assert_return (invoke "ge_s" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 -1 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0)) +(assert_return (invoke "ge_s" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; ge_u + +;; i8x16.ge_u (i8x16) (i8x16) + +;; hex vs hex +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0) + (v128.const i8x16 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 -0 0 1 2 127 128 253 254 255)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x00 0x00 0xc3 0x00 0x00 0xfe 0xc2 0x00 0x00 0x80 0xbf 0x00 0x00 0x00 0x00) + (v128.const f32x4 -128.0 -127.0 -1.0 0.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x00 0x80 0x3f 0x00 0x00 0xfe 0x42 0x00 0x00 0x00 0x43 0x00 0x00 0x7f 0x43) + (v128.const f32x4 1.0 127.0 128.0 255.0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + +;; not equal +(assert_return (invoke "ge_u" (v128.const i8x16 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F 0x0F) + (v128.const i8x16 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0 0xF0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x09 0x10 0x11 0x12 0x0A 0x0B 0x1A 0x1B 0xAA 0xAB 0xFF) + (v128.const i8x16 0xFF 0xAB 0xAA 0x1B 0x1A 0x0B 0x0A 0x12 0x11 0x10 0x09 0x04 0x03 0x02 0x01 0x00)) + (v128.const i8x16 0 0 0 0 0 0 -1 0 -1 0 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x80 0x81 0x82 0x83 0xFD 0xFE 0xFF 0x00 0x00 0x01 0x02 0x7F 0x80 0xFD 0xFE 0xFF) + (v128.const i8x16 255 254 253 128 127 2 1 0 0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 -1 -1 -1 -1 -1 0 0 0 0 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 128 129 130 131 253 254 255 -0 0 1 2 127 128 253 254 255) + (v128.const i8x16 255 254 253 128 127 2 1 0 -0 -1 -2 -3 -125 -126 -127 -128)) + (v128.const i8x16 0 0 0 -1 -1 -1 -1 -1 -1 0 0 0 0 -1 -1 -1)) + +;; i8x16.ge_u (i8x16) (i16x8) +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0B0A 0x0D0C 0x0F0E)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i16x8 33152 33666 65277 255 256 32514 64896 65534)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i16x8 -128 -128 0 0 1 1 255 255)) + (v128.const i8x16 -1 0 -1 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i8x16.ge_u (i8x16) (i32x4) +(assert_return (invoke "ge_u" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F) + (v128.const i32x4 0x03020100 0x07060504 0x0B0A0908 0x0F0E0D0C)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 -128 -127 -126 -125 -3 -2 -1 0 0 1 2 127 128 253 254 255) + (v128.const i32x4 2206368128 16776957 2130837760 4294901120)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 1 1 1 1 255 255 255 255) + (v128.const i32x4 -128 0 1 255)) + (v128.const i8x16 -1 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + + +;; Type check + +(assert_invalid (module (func (result v128) (i8x16.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.ge_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.gt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.le_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.lt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.ne (i32.const 0) (f32.const 0)))) "type mismatch") + + +;; combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + (i8x16.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + (i8x16.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt_s-in-block") + (block + (drop + (block (result v128) + (i8x16.lt_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le_u-in-block") + (block + (drop + (block (result v128) + (i8x16.le_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt_u-in-block") + (block + (drop + (block (result v128) + (i8x16.gt_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge_s-in-block") + (block + (drop + (block (result v128) + (i8x16.ge_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + (i8x16.eq + (i8x16.eq + (i8x16.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.eq + (i8x16.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + (i8x16.ne + (i8x16.ne + (i8x16.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.ne + (i8x16.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt_s") + (drop + (i8x16.lt_s + (i8x16.lt_s + (i8x16.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.lt_s + (i8x16.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le_u") + (drop + (i8x16.le_u + (i8x16.le_u + (i8x16.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.le_u + (i8x16.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt_u") + (drop + (i8x16.gt_u + (i8x16.gt_u + (i8x16.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.gt_u + (i8x16.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge_s") + (drop + (i8x16.ge_s + (i8x16.ge_s + (i8x16.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.ge_s + (i8x16.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (i8x16.ge_u + (i8x16.eq + (i8x16.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (i8x16.ne + (i8x16.gt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (i8x16.lt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt_s-in-block")) +(assert_return (invoke "le_u-in-block")) +(assert_return (invoke "gt_u-in-block")) +(assert_return (invoke "ge_s-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt_s")) +(assert_return (invoke "nested-le_u")) +(assert_return (invoke "nested-gt_u")) +(assert_return (invoke "nested-ge_s")) +(assert_return (invoke "as-param")) + diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast new file mode 100644 index 0000000000..ce2ce1b3d6 --- /dev/null +++ b/test/core/simd/simd_lane.wast @@ -0,0 +1,683 @@ +;; Tests for the extract_lane, replace_lane, swizzle and shuffle group instructions + + +(module + (func (export "i8x16_extract_lane_s-first") (param v128) (result i32) + (i8x16.extract_lane_s 0 (local.get 0))) + (func (export "i8x16_extract_lane_s-last") (param v128) (result i32) + (i8x16.extract_lane_s 15 (local.get 0))) + (func (export "i8x16_extract_lane_u-first") (param v128) (result i32) + (i8x16.extract_lane_u 0 (local.get 0))) + (func (export "i8x16_extract_lane_u-last") (param v128) (result i32) + (i8x16.extract_lane_u 15 (local.get 0))) + (func (export "i16x8_extract_lane_s-first") (param v128) (result i32) + (i16x8.extract_lane_s 0 (local.get 0))) + (func (export "i16x8_extract_lane_s-last") (param v128) (result i32) + (i16x8.extract_lane_s 7 (local.get 0))) + (func (export "i16x8_extract_lane_u-first") (param v128) (result i32) + (i16x8.extract_lane_u 0 (local.get 0))) + (func (export "i16x8_extract_lane_u-last") (param v128) (result i32) + (i16x8.extract_lane_u 7 (local.get 0))) + (func (export "i32x4_extract_lane-first") (param v128) (result i32) + (i32x4.extract_lane 0 (local.get 0))) + (func (export "i32x4_extract_lane-last") (param v128) (result i32) + (i32x4.extract_lane 3 (local.get 0))) + (func (export "f32x4_extract_lane-first") (param v128) (result f32) + (f32x4.extract_lane 0 (local.get 0))) + (func (export "f32x4_extract_lane-last") (param v128) (result f32) + (f32x4.extract_lane 3 (local.get 0))) + (func (export "i8x16_replace_lane-first") (param v128 i32) (result v128) + (i8x16.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "i8x16_replace_lane-last") (param v128 i32) (result v128) + (i8x16.replace_lane 15 (local.get 0) (local.get 1))) + (func (export "i16x8_replace_lane-first") (param v128 i32) (result v128) + (i16x8.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "i16x8_replace_lane-last") (param v128 i32) (result v128) + (i16x8.replace_lane 7 (local.get 0) (local.get 1))) + (func (export "i32x4_replace_lane-first") (param v128 i32) (result v128) + (i32x4.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "i32x4_replace_lane-last") (param v128 i32) (result v128) + (i32x4.replace_lane 3 (local.get 0) (local.get 1))) + (func (export "f32x4_replace_lane-first") (param v128 f32) (result v128) + (f32x4.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "f32x4_replace_lane-last") (param v128 f32) (result v128) + (f32x4.replace_lane 3 (local.get 0) (local.get 1))) + + ;; Swizzle and shuffle + (func (export "v8x16_swizzle") (param v128 v128) (result v128) + (v8x16.swizzle (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-1") (param v128 v128) (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-2") (param v128 v128) (result v128) + (v8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-3") (param v128 v128) (result v128) + (v8x16.shuffle 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-4") (param v128 v128) (result v128) + (v8x16.shuffle 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-5") (param v128 v128) (result v128) + (v8x16.shuffle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-6") (param v128 v128) (result v128) + (v8x16.shuffle 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) + (func (export "v8x16_shuffle-7") (param v128 v128) (result v128) + (v8x16.shuffle 0 0 0 0 0 0 0 0 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) +) + +(assert_return (invoke "i8x16_extract_lane_s-first" (v128.const i8x16 127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 127)) +(assert_return (invoke "i8x16_extract_lane_s-first" (v128.const i8x16 0x7f 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 127)) +(assert_return (invoke "i8x16_extract_lane_s-first" (v128.const i8x16 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const -1)) +(assert_return (invoke "i8x16_extract_lane_s-first" (v128.const i8x16 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const -1)) +(assert_return (invoke "i8x16_extract_lane_u-first" (v128.const i8x16 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_u-first" (v128.const i8x16 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (i32.const -128)) +(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (i32.const -128)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (i32.const 128)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (i32.const 128)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -128)) +(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i32x4 0 0 0 0x7f000000)) (i32.const 127)) +(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const f32x4 0 0 0 1.0)) (i32.const 63)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0xff00)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i32x4 0 0 0 0xff000000)) (i32.const 255)) +(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const f32x4 0 0 0 2.0)) (i32.const 64)) + +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 32767 0 0 0 0 0 0 0)) (i32.const 32767)) +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 0x7fff 0 0 0 0 0 0 0)) (i32.const 32767)) +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 65535 0 0 0 0 0 0 0)) (i32.const -1)) +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 0xffff 0 0 0 0 0 0 0)) (i32.const -1)) +(assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 65535 0 0 0 0 0 0 0)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 0xffff 0 0 0 0 0 0 0)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 -32768)) (i32.const -32768)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -32768)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 -1)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0xffff)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 -32768)) (i32.const 32768)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const 32768)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (i32.const -32768)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i32x4 0 0 0 0x7fff0000)) (i32.const 32767)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const f32x4 0 0 0 3.0)) (i32.const 0x4040)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff 0xff)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i32x4 0 0 0 0xffffffff)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const f32x4 0 0 0 4.0)) (i32.const 0x4080)) + +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 2147483647 0 0 0)) (i32.const 2147483647)) +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 0x7fffffff 0 0 0)) (i32.const 2147483647)) +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 4294967295 0 0 0)) (i32.const -1)) +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 0xffffffff 0 0 0)) (i32.const -1)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 -2147483648)) (i32.const -2147483648)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x80000000)) (i32.const -2147483648)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 -1)) (i32.const -1)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 0xffffffff)) (i32.const -1)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0x7f)) (i32.const 2147483647)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -2147483648)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const f32x4 0 0 0 5.0)) (i32.const 0x40a00000)) + +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 -5.0 0.0 0.0 0.0)) (f32.const -5.0)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 1e38 0.0 0.0 0.0)) (f32.const 1e38)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0x1.fffffep127 0.0 0.0 0.0)) (f32.const 0x1.fffffep127)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0x1p127 0.0 0.0 0.0)) (f32.const 0x1p127)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0)) (f32.const inf)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 nan inf 0.0 0.0)) (f32.const nan)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -1e38)) (f32.const -1e38)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -0x1.fffffep127)) (f32.const -0x1.fffffep127)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -0x1p127)) (f32.const -0x1p127)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf)) (f32.const -inf)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 -inf nan)) (f32.const nan)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (f32.const 0)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (f32.const -0)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x3f80)) (f32.const 1.0)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0xbf80)) (f32.const -1.0)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0xffff 0x7f7f)) (f32.const 0x1.fffffep+127)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x80)) (f32.const 0x1.000000p-126)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0xffff 0x7f)) (f32.const 0x1.fffffcp-127)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 1 0)) (f32.const 0x0.000004p-127)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x7f800000)) (f32.const inf)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0xff800000)) (f32.const -inf)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x7fc00000)) (f32.const nan)) + +(assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 127)) (v128.const i8x16 127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 128)) (v128.const i8x16 -128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 255)) (v128.const i8x16 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 256)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const -128)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const -129)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const -32768)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) +(assert_return (invoke "i8x16_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) + +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i16x8 32767 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 32768)) (v128.const i16x8 -32768 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65535)) (v128.const i16x8 -1 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65536)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -32768)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -32769)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x7fffffff)) (v128.const i16x8 0 0 0 0 0 0 0 0xffff)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80000000)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) + +(assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 2147483647 0 0 0)) +(assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const 4294967295)) (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 2147483648)) (v128.const i32x4 0 0 0 2147483648)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const -2147483648)) (v128.const i32x4 0 0 0 -2147483648)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80000000)) (v128.const i32x4 0 0 0 -2147483648)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x80000000)) (v128.const i32x4 0 0 0 -2147483648)) + +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 53.0)) (v128.const f32x4 53.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const i32x4 0 0 0 0 ) (f32.const 53.0)) (v128.const f32x4 53.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const nan)) (v128.const f32x4 nan 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const inf)) (v128.const f32x4 inf 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 nan 0.0 0.0 0.0) (f32.const 3.14)) (v128.const f32x4 3.14 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 1e38)) (v128.const f32x4 1e38 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 0x1.fffffep127)) (v128.const f32x4 0x1.fffffep127 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 0x1p127)) (v128.const f32x4 0x1p127 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const -53.0)) (v128.const f32x4 0.0 0.0 0.0 -53.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (f32.const -53.0)) (v128.const f32x4 0.0 0.0 0.0 -53.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const nan)) (v128.const f32x4 0.0 0.0 0.0 nan)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const -inf)) (v128.const f32x4 0.0 0.0 0.0 -inf)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 nan) (f32.const 3.14)) (v128.const f32x4 0.0 0.0 0.0 3.14)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -1e38)) (v128.const f32x4 0.0 0.0 0.0 -1e38)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -0x1.fffffep127)) (v128.const f32x4 0.0 0.0 0.0 -0x1.fffffep127)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -0x1p127)) (v128.const f32x4 0.0 0.0 0.0 -0x1p127)) +;; Use other v128 interpretations as arguments +(assert_return (invoke "f32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) + +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 -8 -7 -6 -5 -4 -3 -2 -1 16 17 18 19 20 21 22 23)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) + (v128.const i8x16 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115) + (v128.const i8x16 -1 1 -2 2 -3 3 -4 4 -5 5 -6 6 -7 7 -8 8)) + (v128.const i8x16 0 101 0 102 0 103 0 104 0 105 0 106 0 107 0 108)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115) + (v128.const i8x16 9 16 10 17 11 18 12 19 13 20 14 21 15 22 16 23)) + (v128.const i8x16 109 0 110 0 111 0 112 0 113 0 114 0 115 0 0 0)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i8x16 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73) + (v128.const i8x16 9 16 10 17 11 18 12 19 13 20 14 21 15 22 16 23)) + (v128.const i8x16 0x6d 0 0x6e 0 0x6f 0 0x70 0 0x71 0 0x72 0 0x73 0 0 0)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i16x8 0x6465 0x6667 0x6869 0x6a6b 0x6c6d 0x6e6f 0x7071 0x7273) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i16x8 0x6465 0x6667 0x6869 0x6a6b 0x6c6d 0x6e6f 0x7071 0x7273)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i32x4 0x64656667 0x68696a6b 0x6c6d6e6f 0x70717273) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) + (v128.const i32x4 0x73727170 0x6f6e6d6c 0x6b6a6968 0x67666564)) +(assert_return (invoke "v8x16_swizzle" + (v128.const f32x4 nan -nan inf -inf) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i32x4 0x7fc00000 0xffc00000 0x7f800000 0xff800000)) +(assert_return (invoke "v8x16_swizzle" + (v128.const i32x4 0x67666564 0x6b6a6968 0x6f6e6d5c 0x73727170) + (v128.const f32x4 0.0 -0.0 inf -inf)) + (v128.const i32x4 0x64646464 0x00646464 0x00006464 0x00006464)) + +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "v8x16_shuffle-2" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) +(assert_return (invoke "v8x16_shuffle-3" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16)) +(assert_return (invoke "v8x16_shuffle-4" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) +(assert_return (invoke "v8x16_shuffle-5" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16_shuffle-6" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16 -16)) +(assert_return (invoke "v8x16_shuffle-7" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -16 -16 -16 -16 -16 -16 -16 -16)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i8x16 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73) + (v128.const i8x16 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff)) + (v128.const i8x16 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0b0a 0x0d0c 0x0f0e) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1)) + (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0b0a 0x0d0c 0x0f0e)) +(assert_return (invoke "v8x16_shuffle-2" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i32x4 0xf3f2f1f0 0xf7f6f5f4 0xfbfaf9f8 0xfffefdfc)) + (v128.const i32x4 0xf3f2f1f0 0xf7f6f5f4 0xfbfaf9f8 0xfffefdfc)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i32x4 0x10203 0x4050607 0x8090a0b 0xc0d0e0f) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i32x4 0x10203 0x4050607 0x8090a0b 0xc0d0e0f)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const f32x4 1.0 nan inf -inf) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i32x4 0x3f800000 0x7fc00000 0x7f800000 0xff800000)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i32x4 0x10203 0x4050607 0x8090a0b 0xc0d0e0f) + (v128.const f32x4 -0.0 nan inf -inf)) + (v128.const i32x4 0x10203 0x4050607 0x8090a0b 0xc0d0e0f)) + +;; Invalid lane index value + +(assert_invalid (module (func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_s 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_u 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_s 8 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_u 8 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i32x4.extract_lane 4 (v128.const i32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f32) (f32x4.extract_lane 4 (v128.const f32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i8x16.replace_lane 16 (v128.const ii8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 8 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") + +;; Lane index is determined by the instruction's interpretation only. + +(assert_invalid (module (func (result i32) (i16x8.extract_lane_s 8 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_u 8 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i32x4.extract_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (f32x4.extract_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f16x8.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") + + +;; Invalid parameters: required v128 but pass other types + +(assert_invalid (module (func (result i32) (i8x16.extract_lane_s 0 (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_u 0 (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_s 0 (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_u 0 (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i32x4.extract_lane 0 (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result f32) (f32x4.extract_lane 0 (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.replace_lane 0 (i32.const 0) (i32.const 1)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 0 (i64.const 0) (i32.const 1)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 0 (i32.const 0) (i32.const 1)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 0 (f32.const 0.0) (i32.const 1)))) "type mismatch") + +;; Invalid type for the replaced value + +(assert_invalid (module (func (result v128) (i8x16.replace_lane 0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f32.const 1.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 0 (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const 1.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 0 (v128.const i32x4 0 0 0 0) (f32.const 1.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 0 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "type mismatch") + +;; Invalid type for swizzle and shuffle value + +(assert_invalid (module (func (result v128) + (v8x16.swizzle (i32.const 1) (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") +(assert_invalid (module (func (result v128) + (v8x16.swizzle (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (i32.const 2)))) "type mismatch") +(assert_invalid (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (f32.const 3.0) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") +(assert_invalid (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") + +;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 + +(assert_invalid (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane length") +(assert_invalid (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane length") +(assert_invalid (module (func (result v128) + (v8x16.shuffle -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") +(assert_invalid (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 32 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") + + +;; Possible wrong instruction names that'd be used + +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane 0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane 0 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane_s 0 (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane_u 0 (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; Old shuffle instruction names should not work + +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle1 (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") + "unknown operator") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle2_imm 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)))") + "unknown operator") + +;; v8x16 not i8x16 + +(assert_malformed (module quote "(func (result v128) " + "(i8x16.swizzle (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") + "unknown operator") +(assert_malformed (module quote "(func (result v128) " + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)))") + "unknown operator") + + +;; Malformed lane index + +;; Pass params as the lane index + +(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_s (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_u (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_s (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_u (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (i32x4.extract_lane (local.get 0) (v128.const i32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (f32x4.extract_lane (local.get 0) (v128.const f32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (i8x16.replace_lane (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (i16x8.replace_lane (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (i32x4.replace_lane (local.get 0) (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (f32x4.replace_lane (local.get 0) (v128.const f32x4 0 0 0 0) (f32.const 1.0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param v128) (result v128) " + "(v8x16.shuffle (local.get 0) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + +;; Pass non-literal as the lane index + +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u nan (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane nan (v128.const i32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (f32x4.extract_lane nan (v128.const f32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -2.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane nan (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane inf (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -inf (v128.const f32x4 0 0 0 0) (f32.const 1.1)))") "expected i8 literal") + +;; v8x16.shuffle expects a 16-byte literals as first argument + +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15.0) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle 0.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle -inf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 inf) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) " + "(v8x16.shuffle nan 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + + +;; Combination with each other + +(module + ;; as *.replace_lane's operand + (func (export "i8x16_extract_lane_s") (param v128 v128) (result v128) + (i8x16.replace_lane 0 (local.get 0) (i8x16.extract_lane_s 0 (local.get 1)))) + (func (export "i8x16_extract_lane_u") (param v128 v128) (result v128) + (i8x16.replace_lane 0 (local.get 0) (i8x16.extract_lane_u 0 (local.get 1)))) + (func (export "i16x8_extract_lane_s") (param v128 v128) (result v128) + (i16x8.replace_lane 0 (local.get 0) (i16x8.extract_lane_s 0 (local.get 1)))) + (func (export "i16x8_extract_lane_u") (param v128 v128) (result v128) + (i16x8.replace_lane 0 (local.get 0) (i16x8.extract_lane_u 0 (local.get 1)))) + (func (export "i32x4_extract_lane") (param v128 v128) (result v128) + (i32x4.replace_lane 0 (local.get 0) (i32x4.extract_lane 0 (local.get 1)))) + (func (export "f32x4_extract_lane") (param v128 v128) (result v128) + (i32x4.replace_lane 0 (local.get 0) (i32x4.extract_lane 0 (local.get 1)))) + + ;; as *.extract_lane's operand + (func (export "i8x16_replace_lane-s") (param v128 i32) (result i32) + (i8x16.extract_lane_s 15 (i8x16.replace_lane 15 (local.get 0) (local.get 1)))) + (func (export "i8x16_replace_lane-u") (param v128 i32) (result i32) + (i8x16.extract_lane_u 15 (i8x16.replace_lane 15 (local.get 0) (local.get 1)))) + (func (export "i16x8_replace_lane-s") (param v128 i32) (result i32) + (i16x8.extract_lane_s 7 (i16x8.replace_lane 7 (local.get 0) (local.get 1)))) + (func (export "i16x8_replace_lane-u") (param v128 i32) (result i32) + (i16x8.extract_lane_u 7 (i16x8.replace_lane 7 (local.get 0) (local.get 1)))) + (func (export "i32x4_replace_lane") (param v128 i32) (result i32) + (i32x4.extract_lane 3 (i32x4.replace_lane 3 (local.get 0) (local.get 1)))) + (func (export "f32x4_replace_lane") (param v128 f32) (result f32) + (f32x4.extract_lane 3 (f32x4.replace_lane 3 (local.get 0) (local.get 1)))) + + ;; i8x16.replace outputs as shuffle operand + (func (export "as-v8x16_swizzle-operand") (param v128 i32 v128) (result v128) + (v8x16.swizzle (i8x16.replace_lane 0 (local.get 0) (local.get 1)) (local.get 2))) + (func (export "as-v8x16_shuffle-operands") (param v128 i32 v128 i32) (result v128) + (v8x16.shuffle 16 1 18 3 20 5 22 7 24 9 26 11 28 13 30 15 + (i8x16.replace_lane 0 (local.get 0) (local.get 1)) + (i8x16.replace_lane 15 (local.get 2) (local.get 3)))) +) + +(assert_return (invoke "i8x16_extract_lane_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16_extract_lane_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_extract_lane_s" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i16x8 -1 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_extract_lane_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i16x8 65535 0 0 0 0 0 0 0)) +(assert_return (invoke "i32x4_extract_lane" (v128.const i32x4 0 0 0 0) (v128.const i32x4 0x10000 -1 -1 -1)) (v128.const i32x4 65536 0 0 0)) +(assert_return (invoke "f32x4_extract_lane" (v128.const f32x4 0 0 0 0) (v128.const f32x4 1e38 nan nan nan)) (v128.const f32x4 1e38 0 0 0)) +(assert_return (invoke "i8x16_replace_lane-s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 255)) (i32.const -1)) +(assert_return (invoke "i8x16_replace_lane-u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 255)) (i32.const 255)) +(assert_return (invoke "i16x8_replace_lane-s" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65535)) (i32.const -1)) +(assert_return (invoke "i16x8_replace_lane-u" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65535)) (i32.const 65535)) +(assert_return (invoke "i32x4_replace_lane" (v128.const i32x4 0 0 0 0) (i32.const -1)) (i32.const -1)) +(assert_return (invoke "f32x4_replace_lane" (v128.const f32x4 0 0 0 0) (f32.const 1.25)) (f32.const 1.25)) + +(assert_return (invoke "as-v8x16_swizzle-operand" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) (i32.const 255) + (v128.const i8x16 -1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1)) + (v128.const i8x16 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1)) +(assert_return (invoke "as-v8x16_shuffle-operands" + (v128.const i8x16 0 255 0 255 15 255 0 255 255 255 0 255 127 255 0 255) (i32.const 1) + (v128.const i8x16 0x55 0 0x55 0 0x55 0 0x55 0 0x55 0 0x55 0 0x55 1 0x55 -1) (i32.const 0)) + (v128.const i8x16 0x55 0xff 0x55 0xff 0x55 0xff 0x55 0xff 0x55 0xff 0x55 0xff 0x55 0xff 0x55 0xff)) + +;; Combination with other SIMD instructions + +(module + ;; Constructing SIMD values + (func (export "as-i8x16_splat-operand") (param v128) (result v128) + (i8x16.splat (i8x16.extract_lane_s 0 (local.get 0)))) + (func (export "as-i16x8_splat-operand") (param v128) (result v128) + (i16x8.splat (i16x8.extract_lane_u 0 (local.get 0)))) + (func (export "as-i32x4_splat-operand") (param v128) (result v128) + (i32x4.splat (i32x4.extract_lane 0 (local.get 0)))) + (func (export "as-f32x4_splat-operand") (param v128) (result v128) + (f32x4.splat (f32x4.extract_lane 0 (local.get 0)))) + + ;; Integer arithmetic + (func (export "as-i8x16_add-operands") (param v128 i32 v128 i32) (result v128) + (i8x16.add (i8x16.replace_lane 0 (local.get 0) (local.get 1)) (i8x16.replace_lane 15 (local.get 2) (local.get 3)))) + (func (export "as-i16x8_add-operands") (param v128 i32 v128 i32) (result v128) + (i16x8.add (i16x8.replace_lane 0 (local.get 0) (local.get 1)) (i16x8.replace_lane 7 (local.get 2) (local.get 3)))) + (func (export "as-i32x4_add-operands") (param v128 i32 v128 i32) (result v128) + (i32x4.add (i32x4.replace_lane 0 (local.get 0) (local.get 1)) (i32x4.replace_lane 3 (local.get 2) (local.get 3)))) + + (func (export "swizzle-as-i8x16_add-operands") (param v128 v128 v128 v128) (result v128) + (i8x16.add (v8x16.swizzle (local.get 0) (local.get 1)) (v8x16.swizzle (local.get 2) (local.get 3)))) + (func (export "shuffle-as-i8x16_sub-operands") (param v128 v128 v128 v128) (result v128) + (i8x16.sub (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)) + (v8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 2) (local.get 3)))) + + ;; Boolean horizontal reductions + (func (export "as-i8x16_any_true-operand") (param v128 i32) (result i32) + (i8x16.any_true (i8x16.replace_lane 0 (local.get 0) (local.get 1)))) + (func (export "as-i16x8_any_true-operand") (param v128 i32) (result i32) + (i16x8.any_true (i16x8.replace_lane 0 (local.get 0) (local.get 1)))) + (func (export "as-i32x4_any_true-operand") (param v128 i32) (result i32) + (i32x4.any_true (i32x4.replace_lane 0 (local.get 0) (local.get 1)))) + + (func (export "swizzle-as-i8x16_all_true-operands") (param v128 v128) (result i32) + (i8x16.all_true (v8x16.swizzle (local.get 0) (local.get 1)))) + (func (export "shuffle-as-i8x16_any_true-operands") (param v128 v128) (result i32) + (i8x16.any_true (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)))) +) + +(assert_return (invoke "as-i8x16_splat-operand" (v128.const i8x16 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "as-i16x8_splat-operand" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "as-i32x4_splat-operand" (v128.const i32x4 0x10000 0 0 0)) (v128.const i32x4 65536 65536 65536 65536)) +(assert_return (invoke "as-f32x4_splat-operand" (v128.const f32x4 3.14 nan nan nan)) (v128.const f32x4 3.14 3.14 3.14 3.14)) +(assert_return (invoke "as-i8x16_add-operands" + (v128.const i8x16 0xff 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) (i32.const 1) + (v128.const i8x16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0xff) (i32.const 1)) + (v128.const i8x16 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17)) +(assert_return (invoke "as-i16x8_add-operands" + (v128.const i16x8 -1 4 9 16 25 36 49 64) (i32.const 1) + (v128.const i16x8 64 49 36 25 16 9 4 -1) (i32.const 1)) + (v128.const i16x8 65 53 45 41 41 45 53 65)) +(assert_return (invoke "as-i32x4_add-operands" + (v128.const i32x4 -1 8 27 64) (i32.const 1) (v128.const i32x4 64 27 8 -1) (i32.const 1)) (v128.const i32x4 65 35 35 65)) + +(assert_return (invoke "swizzle-as-i8x16_add-operands" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "shuffle-as-i8x16_sub-operands" + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) + (v128.const i8x16 -15 -13 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 13 15)) + +(assert_return (invoke "as-i8x16_any_true-operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) (i32.const 1)) +(assert_return (invoke "as-i16x8_any_true-operand" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)) (i32.const 1)) +(assert_return (invoke "as-i32x4_any_true-operand" (v128.const i32x4 1 0 0 0) (i32.const 0)) (i32.const 0)) + +(assert_return (invoke "swizzle-as-i8x16_all_true-operands" + (v128.const i8x16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (i32.const 1)) +(assert_return (invoke "swizzle-as-i8x16_all_true-operands" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16)) (i32.const 0)) +(assert_return (invoke "shuffle-as-i8x16_any_true-operands" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (i32.const 1)) + +;; Load and store + +(module + (memory 1) + (func (export "as-v128_store-operand-1") (param v128 i32) (result v128) + (v128.store (i32.const 0) (i8x16.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-2") (param v128 i32) (result v128) + (v128.store (i32.const 0) (i16x8.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-3") (param v128 i32) (result v128) + (v128.store (i32.const 0) (i32x4.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-4") (param v128 f32) (result v128) + (v128.store (i32.const 0) (f32x4.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) +) + +(assert_return (invoke "as-v128_store-operand-1" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) (v128.const i8x16 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-v128_store-operand-2" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 256)) (v128.const i16x8 0x100 0 0 0 0 0 0 0)) +(assert_return (invoke "as-v128_store-operand-3" (v128.const i32x4 0 0 0 0)(i32.const 0xffffffff)) (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "as-v128_store-operand-4" (v128.const f32x4 0 0 0 0)(f32.const 3.14)) (v128.const f32x4 3.14 0 0 0)) + +;; As the argument of wasm core ops + +(module + (global $g (mut v128) (v128.const f32x4 0.0 0.0 0.0 0.0)) + (global $h (mut v128) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (func (export "as-if-condition-value") (param v128) (result i32) + (if (result i32) (i8x16.extract_lane_s 0 (local.get 0)) (then (i32.const 0xff)) (else (i32.const 0)))) + (func (export "as-return-value-1") (param v128 i32) (result v128) + (return (i16x8.replace_lane 0 (local.get 0) (local.get 1)))) + (func (export "as-local_set-value") (param v128) (result i32) (local i32) + (local.set 1 (i32x4.extract_lane 0 (local.get 0))) + (return (local.get 1))) + (func (export "as-global_set-value-1") (param v128 f32) (result v128) + (global.set $g (f32x4.replace_lane 0 (local.get 0) (local.get 1))) + (return (global.get $g))) + + (func (export "as-return-value-2") (param v128 v128) (result v128) + (return (v8x16.swizzle (local.get 0) (local.get 1)))) + (func (export "as-global_set-value-2") (param v128 v128) (result v128) + (global.set $h (v8x16.shuffle 0 1 2 3 4 5 6 7 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) + (return (global.get $h))) +) + +(assert_return (invoke "as-if-condition-value" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 0)) +(assert_return (invoke "as-return-value-1" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)) (v128.const i16x8 1 0 0 0 0 0 0 0)) +(assert_return (invoke "as-local_set-value" (v128.const i32x4 -1 -1 -1 -1)) (i32.const -1)) +(assert_return (invoke "as-global_set-value-1" (v128.const f32x4 0 0 0 0)(f32.const 3.14)) (v128.const f32x4 3.14 0 0 0)) + +(assert_return (invoke "as-return-value-2" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)) + (v128.const i8x16 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16)) +(assert_return (invoke "as-global_set-value-2" + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) + (v128.const i8x16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1)) + (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 8 7 6 5 4 3 2 1)) diff --git a/test/core/simd/simd_load.wast b/test/core/simd/simd_load.wast new file mode 100644 index 0000000000..da4426e93b --- /dev/null +++ b/test/core/simd/simd_load.wast @@ -0,0 +1,188 @@ +;; v128.load operater with normal argument (e.g. (i8x16, i16x8 i32x4)) + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") + (func (export "v128.load") (result v128) + (v128.load (i32.const 0)) + ) +) + +(assert_return (invoke "v128.load") (v128.const i8x16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f)) +(assert_return (invoke "v128.load") (v128.const i16x8 0x0100 0x0302 0x0504 0x0706 0x0908 0x0b0a 0x0d0c 0x0f0e)) +(assert_return (invoke "v128.load") (v128.const i32x4 0x03020100 0x07060504 0x0b0a0908 0x0f0e0d0c)) + + +;; v128.load operater as the argument of other SIMD instructions + +(module (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") + (func (export "as-i8x16_extract_lane_s-value/0") (result i32) + (i8x16.extract_lane_s 0 (v128.load (i32.const 0))) + ) +) +(assert_return (invoke "as-i8x16_extract_lane_s-value/0") (i32.const 0x00)) + +(module (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") + (func (export "as-i8x16.eq-operand") (result v128) + (i8x16.eq (v128.load offset=0 (i32.const 0)) (v128.load offset=16 (i32.const 0))) + ) +) +(assert_return (invoke "as-i8x16.eq-operand") (v128.const i32x4 0xffffffff 0x00000000 0x00000000 0x00000000)) + +(module (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") + (func (export "as-v128.not-operand") (result v128) + (v128.not (v128.load (i32.const 0))) + ) + (func (export "as-i8x16.all_true-operand") (result i32) + (i8x16.all_true (v128.load (i32.const 0))) + ) +) +(assert_return (invoke "as-v128.not-operand") (v128.const i32x4 0xfcfdfeff 0xf8f9fafb 0xf4f5f6f7 0xf0f1f2f3)) +(assert_return (invoke "as-i8x16.all_true-operand") (i32.const 0)) + +(module (memory 1) + (data (offset (i32.const 0)) "\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA") + (data (offset (i32.const 16)) "\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB\BB") + (data (offset (i32.const 32)) "\F0\F0\F0\F0\FF\FF\FF\FF\00\00\00\00\FF\00\FF\00") + (func (export "as-v128.bitselect-operand") (result v128) + (v128.bitselect (v128.load (i32.const 0)) (v128.load (i32.const 16)) (v128.load (i32.const 32))) + ) +) +(assert_return (invoke "as-v128.bitselect-operand") (v128.const i32x4 0xabababab 0xaaaaaaaa 0xbbbbbbbb 0xbbaabbaa)) + +(module (memory 1) + (data (offset (i32.const 0)) "\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA") + (func (export "as-i8x16.shl-operand") (result v128) + (i8x16.shl (v128.load (i32.const 0)) (i32.const 1)) + ) +) +(assert_return (invoke "as-i8x16.shl-operand") (v128.const i32x4 0x54545454 0x54545454 0x54545454 0x54545454)) ;; 1010 1000 << 1010 1010 + +(module (memory 1) + (data (offset (i32.const 0)) "\02\00\00\00\02\00\00\00\02\00\00\00\02\00\00\00") + (data (offset (i32.const 16)) "\03\00\00\00\03\00\00\00\03\00\00\00\03\00\00\00") + (func (export "as-add/sub/sul-operand") (result v128) + ;; 2 2 2 2 + 3 3 3 3 = 5 5 5 5 + ;; 5 5 5 5 + 3 3 3 3 = 2 2 2 2 + ;; 2 2 2 2 * 3 3 3 3 = 6 6 6 6 + (i8x16.mul + (i8x16.sub + (i8x16.add (v128.load (i32.const 0)) (v128.load (i32.const 16))) + (v128.load (i32.const 16)) + ) + (v128.load (i32.const 16)) + ) + ) +) +(assert_return (invoke "as-add/sub/sul-operand") (v128.const i32x4 6 6 6 6)) + +(module (memory 1) + (data (offset (i32.const 0)) "\00\00\00\43\00\00\80\3f\66\66\e6\3f\00\00\80\bf") ;; 128 1.0 1.8 -1 + (data (offset (i32.const 16)) "\00\00\00\40\00\00\00\40\00\00\00\40\00\00\00\40") ;; 2.0 2.0 2.0 2.0 + (func (export "as-f32x4.mul-operand") (result v128) + (f32x4.mul (v128.load (i32.const 0)) (v128.load (i32.const 16))) + ) +) +(assert_return (invoke "as-f32x4.mul-operand") (v128.const f32x4 256 2 3.6 -2)) + +(module (memory 1) + (data (offset (i32.const 0)) "\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff\ff") ;; 1111 ... + (func (export "as-f32x4.abs-operand") (result v128) + (f32x4.abs (v128.load (i32.const 0))) + ) +) +(assert_return (invoke "as-f32x4.abs-operand") (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) ;; 1111 -> 0111 + +(module (memory 1) + (data (offset (i32.const 0)) "\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA\AA") + (data (offset (i32.const 16)) "\02\00\00\00\02\00\00\00\02\00\00\00\02\00\00\00") + (func (export "as-f32x4.min-operand") (result v128) + (f32x4.min (v128.load (i32.const 0)) (v128.load offset=16 (i32.const 1))) + ) +) +(assert_return (invoke "as-f32x4.min-operand") (v128.const i32x4 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa)) ;; signed 1010 < 0010 + +(module (memory 1) + (data (offset (i32.const 0)) "\00\00\00\43\00\00\80\3f\66\66\e6\3f\00\00\80\bf") ;; 128 1.0 1.8 -1 + (func (export "as-i32x4.trunc_sat_f32x4_s-operand") (result v128) + (i32x4.trunc_sat_f32x4_s (v128.load (i32.const 0))) + ) +) +(assert_return (invoke "as-i32x4.trunc_sat_f32x4_s-operand") (v128.const i32x4 128 1 1 -1)) ;; 128 1.0 1.8 -1 -> 128 1 1 -1 + +(module (memory 1) + (data (offset (i32.const 0)) "\02\00\00\00\02\00\00\00\02\00\00\00\02\00\00\00") + (func (export "as-f32x4.convert_i32x4_u-operand") (result v128) + (f32x4.convert_i32x4_u (v128.load (i32.const 0))) + ) +) +(assert_return (invoke "as-f32x4.convert_i32x4_u-operand") (v128.const f32x4 2 2 2 2)) + +(module (memory 1) + (data (offset (i32.const 0)) "\64\65\66\67\68\69\6a\6b\6c\6d\6e\6f\70\71\72\73") ;; 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 + (data (offset (i32.const 16)) "\0f\0e\0d\0c\0b\0a\09\08\07\06\05\04\03\02\01\00") ;; 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 + (func (export "as-v8x16.swizzle-operand") (result v128) + (v8x16.swizzle (v128.load (i32.const 0)) (v128.load offset=15 (i32.const 1))) + ) +) +(assert_return(invoke "as-v8x16.swizzle-operand") (v128.const i8x16 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100)) + +(module (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") + (func (export "as-br-value") (result v128) + (block (result v128) (br 0 (v128.load (i32.const 0)))) + ) +) +(assert_return (invoke "as-br-value") (v128.const i32x4 0x03020100 0x07060504 0x0b0a0908 0x0f0e0d0c)) + + +;; Unknown operator(e.g. v128.load8, v128.load16, v128.load32) + +(assert_malformed + (module quote + "(memory 1)" + "(func (local v128) (drop (v128.load8 (i32.const 0))))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (local v128) (drop (v128.load16 (i32.const 0))))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (local v128) (drop (v128.load32 (i32.const 0))))" + ) + "unknown operator" +) + + +;; Type mismatched (e.g. v128.load(f32.const 0), type address empty) + +(assert_invalid + (module (memory 1) (func (local v128) (drop (v128.load (f32.const 0))))) + "type mismatch" +) +(assert_invalid + (module (memory 1) (func (local v128) (block (br_if 0 (v128.load (i32.const 0)))))) + "type mismatch" +) +(assert_invalid + (module (memory 1) (func (local v128) (v128.load (i32.const 0)))) + "type mismatch" +) + + +;; Type address empty + +(assert_invalid + (module (memory 1) (func (drop (v128.load (local.get 2))))) + "unknown local 2" +) diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast new file mode 100644 index 0000000000..1ea72e1bf3 --- /dev/null +++ b/test/core/simd/simd_splat.wast @@ -0,0 +1,258 @@ +(module + (func (export "i8x16.splat") (param i32) (result v128) (i8x16.splat (local.get 0))) + (func (export "i16x8.splat") (param i32) (result v128) (i16x8.splat (local.get 0))) + (func (export "i32x4.splat") (param i32) (result v128) (i32x4.splat (local.get 0))) + (func (export "f32x4.splat") (param f32) (result v128) (f32x4.splat (local.get 0))) +) + +(assert_return (invoke "i8x16.splat" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.splat" (i32.const 5)) (v128.const i8x16 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5)) +(assert_return (invoke "i8x16.splat" (i32.const -5)) (v128.const i8x16 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5 -5)) +(assert_return (invoke "i8x16.splat" (i32.const 257)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.splat" (i32.const 0xff)) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.splat" (i32.const -128)) (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.splat" (i32.const 127)) (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.splat" (i32.const -129)) (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.splat" (i32.const 128)) (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.splat" (i32.const 0xff7f)) (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.splat" (i32.const 0x80)) (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.splat" (i32.const 0xAB)) (v128.const i32x4 0xABABABAB 0xABABABAB 0xABABABAB 0xABABABAB)) + +(assert_return (invoke "i16x8.splat" (i32.const 0)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.splat" (i32.const 5)) (v128.const i16x8 5 5 5 5 5 5 5 5)) +(assert_return (invoke "i16x8.splat" (i32.const -5)) (v128.const i16x8 -5 -5 -5 -5 -5 -5 -5 -5)) +(assert_return (invoke "i16x8.splat" (i32.const 65537)) (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.splat" (i32.const 0xffff)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.splat" (i32.const -32768)) (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.splat" (i32.const 32767)) (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.splat" (i32.const -32769)) (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.splat" (i32.const 32768)) (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.splat" (i32.const 0xffff7fff)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.splat" (i32.const 0x8000)) (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.splat" (i32.const 0xABCD)) (v128.const i32x4 0xABCDABCD 0xABCDABCD 0xABCDABCD 0xABCDABCD)) + +(assert_return (invoke "i32x4.splat" (i32.const 0)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.splat" (i32.const 5)) (v128.const i32x4 5 5 5 5)) +(assert_return (invoke "i32x4.splat" (i32.const -5)) (v128.const i32x4 -5 -5 -5 -5)) +(assert_return (invoke "i32x4.splat" (i32.const 0xffffffff)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.splat" (i32.const 4294967295)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.splat" (i32.const -2147483648)) (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.splat" (i32.const 2147483647)) (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) +(assert_return (invoke "i32x4.splat" (i32.const 2147483648)) (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + +(assert_return (invoke "f32x4.splat" (f32.const 0.0)) (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.splat" (f32.const 1.1)) (v128.const f32x4 1.1 1.1 1.1 1.1)) +(assert_return (invoke "f32x4.splat" (f32.const -1.1)) (v128.const f32x4 -1.1 -1.1 -1.1 -1.1)) +(assert_return (invoke "f32x4.splat" (f32.const 1e38)) (v128.const f32x4 1e38 1e38 1e38 1e38)) +(assert_return (invoke "f32x4.splat" (f32.const -1e38)) (v128.const f32x4 -1e38 -1e38 -1e38 -1e38)) +(assert_return (invoke "f32x4.splat" (f32.const 0x1.fffffep127)) (v128.const f32x4 0x1.fffffep127 0x1.fffffep127 0x1.fffffep127 0x1.fffffep127)) +(assert_return (invoke "f32x4.splat" (f32.const -0x1.fffffep127)) (v128.const f32x4 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127)) +(assert_return (invoke "f32x4.splat" (f32.const 0x1p127)) (v128.const f32x4 0x1p127 0x1p127 0x1p127 0x1p127)) +(assert_return (invoke "f32x4.splat" (f32.const -0x1p127)) (v128.const f32x4 -0x1p127 -0x1p127 -0x1p127 -0x1p127)) +(assert_return (invoke "f32x4.splat" (f32.const inf)) (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.splat" (f32.const -inf)) (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.splat" (f32.const nan)) (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.splat" (f32.const nan:0x1)) (v128.const f32x4 nan:0x1 nan:0x1 nan:0x1 nan:0x1)) +(assert_return (invoke "f32x4.splat" (f32.const nan:0x7f_ffff)) (v128.const f32x4 nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff)) + + +;; Unknown operator + +(assert_malformed (module quote "(func (result v128) (v128.splat (i32.const 0)))") "unknown operator") + + +;; Type mismatched + +(assert_invalid (module (func (result v128) i8x16.splat (i64.const 0))) "type mismatch") +(assert_invalid (module (func (result v128) i8x16.splat (f32.const 0.0))) "type mismatch") +(assert_invalid (module (func (result v128) i8x16.splat (f64.const 0.0))) "type mismatch") +(assert_invalid (module (func (result v128) i16x8.splat (i64.const 1))) "type mismatch") +(assert_invalid (module (func (result v128) i16x8.splat (f32.const 1.0))) "type mismatch") +(assert_invalid (module (func (result v128) i16x8.splat (f64.const 1.0))) "type mismatch") +(assert_invalid (module (func (result v128) i32x4.splat (i64.const 2))) "type mismatch") +(assert_invalid (module (func (result v128) i32x4.splat (f32.const 2.0))) "type mismatch") +(assert_invalid (module (func (result v128) i32x4.splat (f64.const 2.0))) "type mismatch") +(assert_invalid (module (func (result v128) f32x4.splat (i32.const 4))) "type mismatch") +(assert_invalid (module (func (result v128) f32x4.splat (i64.const 4))) "type mismatch") +(assert_invalid (module (func (result v128) f32x4.splat (f64.const 4.0))) "type mismatch") + + +;; V128 splat operators as the argument of other SIMD instructions + +;; v128.store +(module (memory 1) + (func (export "as-v128_store-value-1") (param i32) (result v128) + (v128.store (i32.const 0) (i8x16.splat (local.get 0))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-value-2") (param i32) (result v128) + (v128.store (i32.const 0) (i16x8.splat (local.get 0))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-value-3") (param i32) (result v128) + (v128.store (i32.const 0) (i32x4.splat (local.get 0))) + (v128.load (i32.const 0))) +) +(assert_return (invoke "as-v128_store-value-1" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "as-v128_store-value-2" (i32.const 256)) (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) +(assert_return (invoke "as-v128_store-value-3" (i32.const 0xffffffff)) (v128.const i32x4 -1 -1 -1 -1)) + +(module + ;; Accessing lane + (func (export "as-i8x16_extract_lane_s-operand-first") (param i32) (result i32) + (i8x16.extract_lane_s 0 (i8x16.splat (local.get 0)))) + (func (export "as-i8x16_extract_lane_s-operand-last") (param i32) (result i32) + (i8x16.extract_lane_s 15 (i8x16.splat (local.get 0)))) + (func (export "as-i16x8_extract_lane_s-operand-first") (param i32) (result i32) + (i16x8.extract_lane_s 0 (i16x8.splat (local.get 0)))) + (func (export "as-i16x8_extract_lane_s-operand-last") (param i32) (result i32) + (i16x8.extract_lane_s 7 (i16x8.splat (local.get 0)))) + (func (export "as-i32x4_extract_lane_s-operand-first") (param i32) (result i32) + (i32x4.extract_lane 0 (i32x4.splat (local.get 0)))) + (func (export "as-i32x4_extract_lane_s-operand-last") (param i32) (result i32) + (i32x4.extract_lane 3 (i32x4.splat (local.get 0)))) + (func (export "as-f32x4_extract_lane_s-operand-first") (param f32) (result f32) + (f32x4.extract_lane 0 (f32x4.splat (local.get 0)))) + (func (export "as-f32x4_extract_lane_s-operand-last") (param f32) (result f32) + (f32x4.extract_lane 3 (f32x4.splat (local.get 0)))) + (func (export "as-v8x16_swizzle-operands") (param i32) (param i32) (result v128) + (v8x16.swizzle (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + + ;; Integer arithmetic + (func (export "as-i8x16_add_sub_mul-operands") (param i32 i32 i32 i32) (result v128) + (i8x16.add (i8x16.splat (local.get 0)) + (i8x16.sub (i8x16.splat (local.get 1)) + (i8x16.mul (i8x16.splat (local.get 2)) (i8x16.splat (local.get 3)))))) + (func (export "as-i16x8_add_sub_mul-operands") (param i32 i32 i32 i32) (result v128) + (i16x8.add (i16x8.splat (local.get 0)) + (i16x8.sub (i16x8.splat (local.get 1)) + (i16x8.mul (i16x8.splat (local.get 2)) (i16x8.splat (local.get 3)))))) + (func (export "as-i32x4_add_sub_mul-operands") (param i32 i32 i32 i32) (result v128) + (i32x4.add (i32x4.splat (local.get 0)) + (i32x4.sub (i32x4.splat (local.get 1)) + (i32x4.mul (i32x4.splat (local.get 2)) (i32x4.splat (local.get 3)))))) + + ;; Saturating integer arithmetic + (func (export "as-i8x16_add_saturate_s-operands") (param i32 i32) (result v128) + (i8x16.add_saturate_s (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i16x8_add_saturate_s-operands") (param i32 i32) (result v128) + (i16x8.add_saturate_s (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + (func (export "as-i8x16_sub_saturate_u-operands") (param i32 i32) (result v128) + (i8x16.sub_saturate_u (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i16x8_sub_saturate_u-operands") (param i32 i32) (result v128) + (i16x8.sub_saturate_u (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + + ;; Bit shifts + (func (export "as-i8x16_shr_s-operand") (param i32 i32) (result v128) + (i8x16.shr_s (i8x16.splat (local.get 0)) (local.get 1))) + (func (export "as-i16x8_shr_s-operand") (param i32 i32) (result v128) + (i16x8.shr_s (i16x8.splat (local.get 0)) (local.get 1))) + (func (export "as-i32x4_shr_s-operand") (param i32 i32) (result v128) + (i32x4.shr_s (i32x4.splat (local.get 0)) (local.get 1))) + + ;; Bitwise operantions + (func (export "as-v128_and-operands") (param i32 i32) (result v128) + (v128.and (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-v128_or-operands") (param i32 i32) (result v128) + (v128.or (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + (func (export "as-v128_xor-operands") (param i32 i32) (result v128) + (v128.xor (i32x4.splat (local.get 0)) (i32x4.splat (local.get 1)))) + + ;; Boolean horizontal reductions + (func (export "as-i8x16_all_true-operand") (param i32) (result i32) + (i8x16.all_true (i8x16.splat (local.get 0)))) + (func (export "as-i16x8_all_true-operand") (param i32) (result i32) + (i16x8.all_true (i16x8.splat (local.get 0)))) + (func (export "as-i32x4_all_true-operand") (param i32) (result i32) + (i32x4.all_true (i32x4.splat (local.get 0)))) + + ;; Comparisons + (func (export "as-i8x16_eq-operands") (param i32 i32) (result v128) + (i8x16.eq (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i16x8_eq-operands") (param i32 i32) (result v128) + (i16x8.eq (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + (func (export "as-i32x4_eq-operands") (param i32 i32) (result v128) + (i32x4.eq (i32x4.splat (local.get 0)) (i32x4.splat (local.get 1)))) + (func (export "as-f32x4_eq-operands") (param f32 f32) (result v128) + (f32x4.eq (f32x4.splat (local.get 0)) (f32x4.splat (local.get 1)))) + + ;; Floating-point sign bit operations + (func (export "as-f32x4_abs-operand") (param f32) (result v128) + (f32x4.abs (f32x4.splat (local.get 0)))) + + ;; Floating-point min + (func (export "as-f32x4_min-operands") (param f32 f32) (result v128) + (f32x4.min (f32x4.splat (local.get 0)) (f32x4.splat (local.get 1)))) + + ;; Floating-point arithmetic + (func (export "as-f32x4_div-operands") (param f32 f32) (result v128) + (f32x4.div (f32x4.splat (local.get 0)) (f32x4.splat (local.get 1)))) + + ;; Conversions + (func (export "as-f32x4_convert_s_i32x4-operand") (param i32) (result v128) + (f32x4.convert_i32x4_s (i32x4.splat (local.get 0)))) + (func (export "as-i32x4_trunc_s_f32x4_sat-operand") (param f32) (result v128) + (i32x4.trunc_sat_f32x4_s (f32x4.splat (local.get 0)))) +) + +(assert_return (invoke "as-i8x16_extract_lane_s-operand-first" (i32.const 42)) (i32.const 42)) +(assert_return (invoke "as-i8x16_extract_lane_s-operand-last" (i32.const -42)) (i32.const -42)) +(assert_return (invoke "as-i16x8_extract_lane_s-operand-first" (i32.const 0xffff7fff)) (i32.const 32767)) +(assert_return (invoke "as-i16x8_extract_lane_s-operand-last" (i32.const 0x8000)) (i32.const -32768)) +(assert_return (invoke "as-i32x4_extract_lane_s-operand-first" (i32.const 0x7fffffff)) (i32.const 2147483647)) +(assert_return (invoke "as-i32x4_extract_lane_s-operand-last" (i32.const 0x80000000)) (i32.const -2147483648)) +(assert_return (invoke "as-f32x4_extract_lane_s-operand-first" (f32.const 1.5)) (f32.const 1.5)) +(assert_return (invoke "as-f32x4_extract_lane_s-operand-last" (f32.const -0.25)) (f32.const -0.25)) +(assert_return (invoke "as-v8x16_swizzle-operands" (i32.const 1) (i32.const -1)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +(assert_return (invoke "as-i8x16_add_sub_mul-operands" (i32.const 3) (i32.const 2) (i32.const 1) (i32.const 3)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "as-i16x8_add_sub_mul-operands" (i32.const 257) (i32.const 128) (i32.const 16) (i32.const 16)) (v128.const i16x8 129 129 129 129 129 129 129 129)) +(assert_return (invoke "as-i32x4_add_sub_mul-operands" (i32.const 65535) (i32.const 65537) (i32.const 256) (i32.const 256)) (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) +(assert_return (invoke "as-i8x16_add_saturate_s-operands" (i32.const 0x7f) (i32.const 1)) (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "as-i16x8_add_saturate_s-operands" (i32.const 0x7fff) (i32.const 1)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "as-i8x16_sub_saturate_u-operands" (i32.const 0x7f) (i32.const 0xff)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-i16x8_sub_saturate_u-operands" (i32.const 0x7fff) (i32.const 0xffff)) (v128.const i16x8 0 0 0 0 0 0 0 0)) + +(assert_return (invoke "as-i8x16_shr_s-operand" (i32.const 0xf0) (i32.const 3)) (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "as-i16x8_shr_s-operand" (i32.const 0x100) (i32.const 4)) (v128.const i16x8 16 16 16 16 16 16 16 16)) +(assert_return (invoke "as-i32x4_shr_s-operand" (i32.const -1) (i32.const 16)) (v128.const i32x4 -1 -1 -1 -1)) + +(assert_return (invoke "as-v128_and-operands" (i32.const 0x11) (i32.const 0xff)) (v128.const i8x16 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17)) +(assert_return (invoke "as-v128_or-operands" (i32.const 0) (i32.const 0xffff)) (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "as-v128_xor-operands" (i32.const 0xf0f0f0f0) (i32.const 0xffffffff)) (v128.const i32x4 0xf0f0f0f 0xf0f0f0f 0xf0f0f0f 0xf0f0f0f)) + +(assert_return (invoke "as-i8x16_all_true-operand" (i32.const 0)) (i32.const 0)) +(assert_return (invoke "as-i16x8_all_true-operand" (i32.const 0xffff)) (i32.const 1)) +(assert_return (invoke "as-i32x4_all_true-operand" (i32.const 0xf0f0f0f0)) (i32.const 1)) + +(assert_return (invoke "as-i8x16_eq-operands" (i32.const 1) (i32.const 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-i16x8_eq-operands" (i32.const -1) (i32.const 65535)) (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "as-i32x4_eq-operands" (i32.const -1) (i32.const 0xffffffff)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "as-f32x4_eq-operands" (f32.const +0.0) (f32.const -0.0)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + +(assert_return (invoke "as-f32x4_abs-operand" (f32.const -1.125)) (v128.const f32x4 1.125 1.125 1.125 1.125)) +(assert_return (invoke "as-f32x4_min-operands" (f32.const 0.25) (f32.const 1e-38)) (v128.const f32x4 1e-38 1e-38 1e-38 1e-38)) +(assert_return (invoke "as-f32x4_div-operands" (f32.const 1.0) (f32.const 8.0)) (v128.const f32x4 0.125 0.125 0.125 0.125)) + +(assert_return (invoke "as-f32x4_convert_s_i32x4-operand" (i32.const 12345)) (v128.const f32x4 12345.0 12345.0 12345.0 12345.0)) +(assert_return (invoke "as-i32x4_trunc_s_f32x4_sat-operand" (f32.const 1.1)) (v128.const i32x4 1 1 1 1)) + + +;; As the argument of control constructs and WASM instructions + +(module + (global $g (mut v128) (v128.const f32x4 0.0 0.0 0.0 0.0)) + (func (export "as-br-value") (param i32) (result v128) + (block (result v128) (br 0 (i8x16.splat (local.get 0))))) + (func (export "as-return-value") (param i32) (result v128) + (return (i16x8.splat (local.get 0)))) + (func (export "as-local_set-value") (param i32) (result v128) (local v128) + (local.set 1 (i32x4.splat (local.get 0))) + (return (local.get 1))) + (func (export "as-global_set-value") (param f32) (result v128) + (global.set $g (f32x4.splat (local.get 0))) + (return (global.get $g))) +) + +(assert_return (invoke "as-br-value" (i32.const 0xAB)) (v128.const i8x16 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) +(assert_return (invoke "as-return-value" (i32.const 0xABCD)) (v128.const i16x8 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD)) +(assert_return (invoke "as-local_set-value" (i32.const 0x10000)) (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) +(assert_return (invoke "as-global_set-value" (f32.const 1.0)) (v128.const f32x4 1.0 1.0 1.0 1.0)) diff --git a/test/core/simd/simd_store.wast b/test/core/simd/simd_store.wast new file mode 100644 index 0000000000..0996c7015c --- /dev/null +++ b/test/core/simd/simd_store.wast @@ -0,0 +1,117 @@ +;; v128.store operater with normal argument (e.g. (i8x16, i16x8, i32x4, f32x4)) + +(module + (memory 1) + (func (export "v128.store_i8x16") (result v128) + (v128.store (i32.const 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_i16x8") (result v128) + (v128.store (i32.const 0) (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_i32x4") (result v128) + (v128.store (i32.const 0) (v128.const i32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_f32x4") (result v128) + (v128.store (i32.const 0) (v128.const f32x4 0 1 2 3)) + (v128.load (i32.const 0)) + ) +) + +(assert_return (invoke "v128.store_i8x16") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "v128.store_i16x8") (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "v128.store_i32x4") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_f32x4") (v128.const f32x4 0 1 2 3)) + + +;; v128.store operator as the argument of control constructs and instructions + +(module + (memory 1) + (func (export "as-block-value") + (block (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0))) + ) + (func (export "as-loop-value") + (loop (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0))) + ) + (func (export "as-br-value") + (block (br 0 (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) + ) + (func (export "as-br_if-value") + (block + (br_if 0 (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)) (i32.const 1)) + ) + ) + (func (export "as-br_if-value-cond") + (block + (br_if 0 (i32.const 6) (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0))) + ) + ) + (func (export "as-br_table-value") + (block + (br_table 0 (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)) (i32.const 1)) + ) + ) + (func (export "as-return-value") + (return (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0))) + ) + (func (export "as-if-then") + (if (i32.const 1) (then (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) + ) + (func (export "as-if-else") + (if (i32.const 0) (then) (else (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) + ) +) + +(assert_return (invoke "as-block-value")) +(assert_return (invoke "as-loop-value")) +(assert_return (invoke "as-br-value")) +(assert_return (invoke "as-br_if-value")) +(assert_return (invoke "as-br_if-value-cond")) +(assert_return (invoke "as-br_table-value")) +(assert_return (invoke "as-return-value")) +(assert_return (invoke "as-if-then")) +(assert_return (invoke "as-if-else")) + + +;; Unknown operator(e.g. v128.store8, v128.store16, v128.store32) + +(assert_malformed + (module quote + "(memory 1)" + "(func (v128.store8 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (v128.store16 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "unknown operator" +) +(assert_malformed + (module quote + "(memory 1)" + "(func (v128.store32 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + ) + "unknown operator" +) + + +;; Type mismatched (e.g. v128.load(f32.const 0), type address empty) + +(assert_invalid + (module (memory 1) (func (v128.store (f32.const 0) (v128.const i32x4 0 0 0 0)))) + "type mismatch" +) +(assert_invalid + (module (memory 1) (func (local v128) (block (br_if 0 (v128.store))))) + "type mismatch" +) +(assert_invalid + (module (memory 1) (func (result v128) (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) + "type mismatch" +) From 72cf738983f98170d589faafb45c68dc30d80998 Mon Sep 17 00:00:00 2001 From: Arun Date: Wed, 4 Sep 2019 09:27:50 -0700 Subject: [PATCH 048/378] Includig scripts for generating simd tests --- test/core/simd/meta/README.md | 18 + test/core/simd/meta/gen_tests.py | 47 ++ test/core/simd/meta/simd.py | 66 +++ test/core/simd/meta/simd_compare.py | 385 ++++++++++++ test/core/simd/meta/simd_f32x4_cmp.py | 492 +++++++++++++++ test/core/simd/meta/simd_i16x8_cmp.py | 803 +++++++++++++++++++++++++ test/core/simd/meta/simd_i32x4_cmp.py | 805 +++++++++++++++++++++++++ test/core/simd/meta/simd_i8x16_cmp.py | 823 ++++++++++++++++++++++++++ test/core/simd/meta/test_assert.py | 56 ++ 9 files changed, 3495 insertions(+) create mode 100644 test/core/simd/meta/README.md create mode 100644 test/core/simd/meta/gen_tests.py create mode 100644 test/core/simd/meta/simd.py create mode 100644 test/core/simd/meta/simd_compare.py create mode 100644 test/core/simd/meta/simd_f32x4_cmp.py create mode 100644 test/core/simd/meta/simd_i16x8_cmp.py create mode 100644 test/core/simd/meta/simd_i32x4_cmp.py create mode 100644 test/core/simd/meta/simd_i8x16_cmp.py create mode 100644 test/core/simd/meta/test_assert.py diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md new file mode 100644 index 0000000000..74caa18a4e --- /dev/null +++ b/test/core/simd/meta/README.md @@ -0,0 +1,18 @@ +# Generated SIMD Spec Tests from gen_tests.py + +`gen_tests.py` builds partial SIMD spec tests using templates in `simd_*.py`. +Currently it only support following simd test files generation. + +- 'simd_i8x16_cmp.wast' +- 'simd_i16x8_cmp.wast' +- 'simd_i32x4_cmp.wast' +- 'simd_f32x4_cmp.wast' + + +Usage: + +``` +$ python gen_tests.py -a +``` + +More details documented in `gen_tests.py`. diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py new file mode 100644 index 0000000000..1df5b11eba --- /dev/null +++ b/test/core/simd/meta/gen_tests.py @@ -0,0 +1,47 @@ +#!/usr/bin/env python3 + +""" +This script is used for generating WebAssembly SIMD test cases. +""" +import sys +import argparse +import importlib + + +SUBMODULES = ( + 'simd_i8x16_cmp', + 'simd_i16x8_cmp', + 'simd_i32x4_cmp', + 'simd_f32x4_cmp', +) + + +def gen_group_tests(mod_name): + """mod_name is the back-end script name without the.py extension. + There must be a gen_test_cases() function in each module.""" + mod = importlib.import_module(mod_name) + mod.gen_test_cases() + + +def main(): + parser = argparse.ArgumentParser( + description='Front-end script to call other modules to generate SIMD tests') + parser.add_argument('-a', '--all', dest='gen_all', action='store_true', + default=False, help='Generate all the tests') + parser.add_argument('-i', '--inst', dest='inst_group', choices=SUBMODULES, + help='Back-end scripts that generate the SIMD tests') + args = parser.parse_args() + + if len(sys.argv) < 2: + parser.print_help() + + if args.inst_group: + gen_group_tests(args.inst_group) + if args.gen_all: + for mod_name in SUBMODULES: + gen_group_tests(mod_name) + + +if __name__ == '__main__': + main() + print('Done.') diff --git a/test/core/simd/meta/simd.py b/test/core/simd/meta/simd.py new file mode 100644 index 0000000000..43e805b9df --- /dev/null +++ b/test/core/simd/meta/simd.py @@ -0,0 +1,66 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- + +""" +This python file is a tool class for SIMD and +currently only supports generating v128 const constant data. +""" + + +class SIMD(object): + + # v128 Constant template + V128_CONST = '(v128.const {} {})' + + # Params: + # val: constant data, string or list, + # lane_type: lane type, [i8x16, i16x8, i32x4, f32x4] + def v128_const(self, val, lane_type): + + lane_cnt = int(lane_type[1:].split('x')[1]) + + # val is a string type, generating constant data + # of val according to the number of lanes + if isinstance(val, str): + data_elem = [val] * lane_cnt + + # If val is type of list, generate constant data + # according to combination of list contents and number of lanes + elif isinstance(val, list): + + # If it is an empty list, generate all constant data with 0x00 + if len(val) == 0: + return self.v128_const('0x00', lane_type) + + data_elem = [] + + # Calculate the number of times each element in val is copied + times = lane_cnt // len(val) + + # Calculate whether the data needs to be filled according to + # the number of elements in the val list and the number of lanes. + complement = lane_cnt % len(val) + complement_item = '' + + # If the number of elements in the val list is greater than the number of lanes, + # paste data with the number of lanes from the val list. + if times == 0: + times = 1 + complement = 0 + + val = val[0:lane_cnt] + + # Copy data + for item in val: + data_elem.extend([item] * times) + complement_item = item + + # Fill in the data + if complement > 0: + data_elem.extend([complement_item] * complement) + + # Get string + data_elem = ' '.join(data_elem) + + # Returns v128 constant text + return self.V128_CONST.format(lane_type, data_elem) diff --git a/test/core/simd/meta/simd_compare.py b/test/core/simd/meta/simd_compare.py new file mode 100644 index 0000000000..127d22849d --- /dev/null +++ b/test/core/simd/meta/simd_compare.py @@ -0,0 +1,385 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- + +""" +This class is used to generate common tests for SIMD comparison instructions. +Defines the test template to generate corresponding test file(simd_*_cmp.wast) +via using variable test data set and subclass from sub test template +""" + +import abc +from simd import SIMD +from test_assert import AssertReturn + + +# Generate common comparison tests +class SimdCmpCase(object): + + __metaclass__ = abc.ABCMeta + + # Test case template + CASE_TXT = """ +;; Test all the {lane_type} comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) ({lane_type}.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) ({lane_type}.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.lt_s (local.get $x) (local.get $y))) + (func (export "lt_u") (param $x v128) (param $y v128) (result v128) ({lane_type}.lt_u (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.le_s (local.get $x) (local.get $y))) + (func (export "le_u") (param $x v128) (param $y v128) (result v128) ({lane_type}.le_u (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.gt_s (local.get $x) (local.get $y))) + (func (export "gt_u") (param $x v128) (param $y v128) (result v128) ({lane_type}.gt_u (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.ge_s (local.get $x) (local.get $y))) + (func (export "ge_u") (param $x v128) (param $y v128) (result v128) ({lane_type}.ge_u (local.get $x) (local.get $y))) +) + +{normal_case} + + +;; Type check + +(assert_invalid (module (func (result v128) ({lane_type}.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.ge_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.gt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.le_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.lt_u (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.ne (i32.const 0) (f32.const 0)))) "type mismatch") + + +;; combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + ({lane_type}.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + ({lane_type}.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt_s-in-block") + (block + (drop + (block (result v128) + ({lane_type}.lt_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le_u-in-block") + (block + (drop + (block (result v128) + ({lane_type}.le_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt_u-in-block") + (block + (drop + (block (result v128) + ({lane_type}.gt_u + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge_s-in-block") + (block + (drop + (block (result v128) + ({lane_type}.ge_s + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + ({lane_type}.eq + ({lane_type}.eq + ({lane_type}.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.eq + ({lane_type}.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + ({lane_type}.ne + ({lane_type}.ne + ({lane_type}.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.ne + ({lane_type}.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt_s") + (drop + ({lane_type}.lt_s + ({lane_type}.lt_s + ({lane_type}.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.lt_s + ({lane_type}.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.lt_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le_u") + (drop + ({lane_type}.le_u + ({lane_type}.le_u + ({lane_type}.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.le_u + ({lane_type}.le_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt_u") + (drop + ({lane_type}.gt_u + ({lane_type}.gt_u + ({lane_type}.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.gt_u + ({lane_type}.gt_u + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.gt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge_s") + (drop + ({lane_type}.ge_s + ({lane_type}.ge_s + ({lane_type}.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.ge_s + ({lane_type}.ge_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.ge_s + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + ({lane_type}.ge_u + ({lane_type}.eq + ({lane_type}.lt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.le_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ({lane_type}.ne + ({lane_type}.gt_s + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ({lane_type}.lt_u + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt_s-in-block")) +(assert_return (invoke "le_u-in-block")) +(assert_return (invoke "gt_u-in-block")) +(assert_return (invoke "ge_s-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt_s")) +(assert_return (invoke "nested-le_u")) +(assert_return (invoke "nested-gt_u")) +(assert_return (invoke "nested-ge_s")) +(assert_return (invoke "as-param")) + +""" + + # lane type [e.g. i8x16, i16x8, i32x4, f32x4] + LANE_TYPE = 'i8x16' + + def __init__(self): + super(SimdCmpCase, self).__init__() + + def __str__(self): + return self.get_all_cases() + + # This method requires subclass overloading with its own type of test data. + @abc.abstractmethod + def get_case_data(self): + pass + + # Generate normal case with test datas + def get_normal_case(self): + + s = SIMD() + + case_data = self.get_case_data() + + cases = [] + + for item in case_data: + # Recognize '#' as a commentary + if item[0] == '#': + cases.append('\n;; {}'.format(item[1])) + continue + + """ + Generate assert_return + Params: instruction: instruction name; + param: param for instruction; + ret: excepted result; + lane_type: lane type + """ + instruction, param, ret, lane_type = item + cases.append(str(AssertReturn(instruction, + [s.v128_const(param[0], lane_type[0]), + s.v128_const(param[1], lane_type[1])], + s.v128_const(ret, lane_type[2])))) + + return '\n'.join(cases) + + # Generate all test cases + def get_all_cases(self): + + case_data = {'normal_case': self.get_normal_case(), + 'lane_type': self.LANE_TYPE} + + # Generate tests using the test template + return self.CASE_TXT.format(**case_data) + + # Generate test case file + def gen_test_cases(self): + with open('../simd_{}_cmp.wast'.format(self.LANE_TYPE), 'w+') as f_out: + f_out.write(self.get_all_cases()) + f_out.close() diff --git a/test/core/simd/meta/simd_f32x4_cmp.py b/test/core/simd/meta/simd_f32x4_cmp.py new file mode 100644 index 0000000000..41eb6d9fd9 --- /dev/null +++ b/test/core/simd/meta/simd_f32x4_cmp.py @@ -0,0 +1,492 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating simd_f32x4_cmp.wast file. +Which inherites from `SimdCmpCase` class, overloads +the `get_test_cases` method, and reset the Test Case template. +The reason why this is different from other cmp files is that +f32x4 only has 6 comparison instructions but with amounts of +test datas. +""" + +from simd_compare import SimdCmpCase + + +# Generate f32x4 test case +class Simdf32x4CmpCase(SimdCmpCase): + + LANE_TYPE = 'f32x4' + # Test template, using this template to generate tests with variable test datas. + CASE_TXT = """;; Test all the {lane_type} comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (f32x4.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (f32x4.ne (local.get $x) (local.get $y))) + (func (export "lt") (param $x v128) (param $y v128) (result v128) (f32x4.lt (local.get $x) (local.get $y))) + (func (export "le") (param $x v128) (param $y v128) (result v128) (f32x4.le (local.get $x) (local.get $y))) + (func (export "gt") (param $x v128) (param $y v128) (result v128) (f32x4.gt (local.get $x) (local.get $y))) + (func (export "ge") (param $x v128) (param $y v128) (result v128) (f32x4.ge (local.get $x) (local.get $y))) +) +{normal_case} + + +;; Type check + +(assert_invalid (module (func (result v128) (f32x4.eq (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.ge (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.gt (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.le (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.lt (i64.const 0) (f64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.ne (i64.const 0) (f64.const 0)))) "type mismatch") + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.eq (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.ge (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.gt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.le (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.lt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f4x32.ne (local.get $x) (local.get $y)))") "unknown operator") + + +;; Combination + +(module (memory 1) + (func (export "eq-in-block") + (block + (drop + (block (result v128) + (f32x4.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ne-in-block") + (block + (drop + (block (result v128) + (f32x4.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "lt-in-block") + (block + (drop + (block (result v128) + (f32x4.lt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "le-in-block") + (block + (drop + (block (result v128) + (f32x4.le + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "gt-in-block") + (block + (drop + (block (result v128) + (f32x4.gt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "ge-in-block") + (block + (drop + (block (result v128) + (f32x4.ge + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-eq") + (drop + (f32x4.eq + (f32x4.eq + (f32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.eq + (f32x4.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ne") + (drop + (f32x4.ne + (f32x4.ne + (f32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ne + (f32x4.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-lt") + (drop + (f32x4.lt + (f32x4.lt + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.lt + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-le") + (drop + (f32x4.le + (f32x4.le + (f32x4.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.le + (f32x4.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-gt") + (drop + (f32x4.gt + (f32x4.gt + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.gt + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-ge") + (drop + (f32x4.ge + (f32x4.ge + (f32x4.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ge + (f32x4.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (f32x4.ge + (f32x4.eq + (f32x4.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f32x4.ne + (f32x4.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f32x4.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) + +(assert_return (invoke "eq-in-block")) +(assert_return (invoke "ne-in-block")) +(assert_return (invoke "lt-in-block")) +(assert_return (invoke "le-in-block")) +(assert_return (invoke "gt-in-block")) +(assert_return (invoke "ge-in-block")) +(assert_return (invoke "nested-eq")) +(assert_return (invoke "nested-ne")) +(assert_return (invoke "nested-lt")) +(assert_return (invoke "nested-le")) +(assert_return (invoke "nested-gt")) +(assert_return (invoke "nested-ge")) +(assert_return (invoke "as-param")) +""" + + # Overloads base class method and sets test data for f32x4. + def get_case_data(self): + + case_data = [] + + operand1 = ('nan', '0x1p-149', '-nan:0x200000', '-inf', '0x1.921fb6p+2', + '0x1p+0', '-0x1.fffffep+127', '-0x0p+0', '-0x1p-1', '0x1.fffffep+127', + '-nan', '-0x1p-149', '-0x1p-126', '0x1p-1', '-0x1.921fb6p+2', + 'nan:0x200000', '0x0p+0', 'inf', '-0x1p+0', '0x1p-126') + operand2 = ('nan', '0x1p-149', '-nan:0x200000', '-inf', '0x1.921fb6p+2', + '0x1p+0', '-0x1.fffffep+127', '-0x0p+0', '-0x1p-1', '0x1.fffffep+127', + '-nan', '-0x1p-149', '-0x1p-126', '0x1p-1', '-0x1.921fb6p+2', + 'nan:0x200000', '0x0p+0', 'inf', '-0x1p+0', '0x1p-126') + + Ops = ('eq', 'ne', 'lt', 'le', 'gt', 'ge') + + # Combinations between operand1 and operand2 + for op in Ops: + case_data.append(['#', op]) + for param1 in operand1: + for param2 in operand2: + case_data.append([op, [param1, param2], self.operate(op, param1, param2), ['f32x4', 'f32x4', 'i32x4']]) + # eq + case_data.append(['#', 'eq']) + + # f32x4.eq (f32x4) (i8x16) + case_data.append(['#', 'f32x4.eq (f32x4) (i8x16)']) + case_data.append(['eq', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['0', '-1', '0', '0'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.eq (f32x4) (i16x8) + case_data.append(['#', 'f32x4.eq (f32x4) (i16x8)']) + case_data.append(['eq', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['0', '-1', '0', '0'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.eq (f32x4) (i32x4) + case_data.append(['#', 'f32x4.eq (f32x4) (i32x4)']) + case_data.append(['eq', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['-1 -1', '0', '0', ''], ['f32x4', 'i32x4', 'i32x4']]) + + # ne + case_data.append(['#', 'ne']) + + # f32x4.ne (f32x4) (i8x16) + case_data.append(['#', 'f32x4.ne (f32x4) (i8x16)']) + case_data.append(['ne', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['-1', '0', '-1', '-1'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.ne (f32x4) (i16x8) + case_data.append(['#', 'f32x4.ne (f32x4) (i16x8)']) + case_data.append(['ne', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['-1', '0', '-1', '-1'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.ne (f32x4) (i32x4) + case_data.append(['#', 'f32x4.ne (f32x4) (i32x4)']) + case_data.append(['ne', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['0', '0', '-1', '-1'], ['f32x4', 'i32x4', 'i32x4']]) + + # lt + case_data.append(['#', 'lt']) + + # f32x4.lt (f32x4) (i8x16) + case_data.append(['#', 'f32x4.lt (f32x4) (i8x16)']) + case_data.append(['lt', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['0', '0', '0', '0'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.lt (f32x4) (i16x8) + case_data.append(['#', 'f32x4.lt (f32x4) (i16x8)']) + case_data.append(['lt', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['0', '0', '0', '0'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.lt (f32x4) (i32x4) + case_data.append(['#', 'f32x4.lt (f32x4) (i32x4)']) + case_data.append(['lt', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['0', '0', '0', '0'], ['f32x4', 'i32x4', 'i32x4']]) + + # le + case_data.append(['#', 'le']) + + # f32x4.le (f32x4) (i8x16) + case_data.append(['#', 'f32x4.le (f32x4) (i8x16)']) + case_data.append(['le', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['0', '-1', '0', '0'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.le (f32x4) (i16x8) + case_data.append(['#', 'f32x4.le (f32x4) (i16x8)']) + case_data.append(['le', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['0', '-1', '0', '0'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.le (f32x4) (i32x4) + case_data.append(['#', 'f32x4.le (f32x4) (i32x4)']) + case_data.append(['le', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['-1', '-1', '0', '0'], ['f32x4', 'i32x4', 'i32x4']]) + + # gt + case_data.append(['#', 'gt']) + + # f32x4.gt (f32x4) (i8x16) + case_data.append(['#', 'f32x4.gt (f32x4) (i8x16)']) + case_data.append(['gt', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['0', '0', '-1', '-1'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.gt (f32x4) (i16x8) + case_data.append(['#', 'f32x4.gt (f32x4) (i16x8)']) + case_data.append(['gt', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['0', '0', '-1', '-1'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.gt (f32x4) (i32x4) + case_data.append(['#', 'f32x4.gt (f32x4) (i32x4)']) + case_data.append(['gt', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['0', '0', '-1', '-1'], ['f32x4', 'i32x4', 'i32x4']]) + + # ge + case_data.append(['#', 'ge']) + + # f32x4.ge (f32x4) (i8x16) + case_data.append(['#', 'f32x4.ge (f32x4) (i8x16)']) + case_data.append(['ge', [['-1', '0', '1', '2.0'], ['-1', '-1', '-1', '-1', '0', '0', '0', '0', '1', '1', '1', '1', '2', '2', '2']], ['0', '-1', '-1', '-1'], ['f32x4', 'i8x16', 'i32x4']]) + + # f32x4.ge (f32x4) (i16x8) + case_data.append(['#', 'f32x4.ge (f32x4) (i16x8)']) + case_data.append(['ge', [['-1', '0', '1', '2.0'], ['-1', '-1', '0', '0', '1', '1', '2']], ['0', '-1', '-1', '-1'], ['f32x4', 'i16x8', 'i32x4']]) + + # f32x4.ge (f32x4) (i32x4) + case_data.append(['#', 'f32x4.ge (f32x4) (i32x4)']) + case_data.append(['ge', [['-1', '0', '1', '2.0'], ['3212836864', '0', '1', '2']], ['-1', '-1', '-1', '-1'], ['f32x4', 'i32x4', 'i32x4']]) + + return case_data + + def special_float2dec(self, p): + if p in ('0x0p+0', '-0x0p+0'): + return 0.0 + if p == 'inf': + return float(340282366920938463463374607431768211456) + if p == '-inf': + return -float(340282366920938463463374607431768211456) + + return float.fromhex(p) + + def operate(self, op, p1, p2): + for p in (p1, p2): + if 'nan' in p: + if op == 'ne': + return '-1' + else: + return '0' + + num1 = self.special_float2dec(p1) + num2 = self.special_float2dec(p2) + + if op == 'eq': + if num1 == num2: + return '-1' + + if op == 'ne': + if num1 != num2: + return '-1' + if op == 'lt': + if num1 < num2: + return '-1' + if op == 'le': + if num1 <= num2: + return '-1' + if op == 'gt': + if num1 > num2: + return '-1' + if op == 'ge': + if num1 >= num2: + return '-1' + + return '0' + + +def gen_test_cases(): + f32x4 = Simdf32x4CmpCase() + f32x4.gen_test_cases() + + +if __name__ == '__main__': + f32x4 = Simdf32x4CmpCase() + f32x4.gen_test_cases() diff --git a/test/core/simd/meta/simd_i16x8_cmp.py b/test/core/simd/meta/simd_i16x8_cmp.py new file mode 100644 index 0000000000..d4f55abea0 --- /dev/null +++ b/test/core/simd/meta/simd_i16x8_cmp.py @@ -0,0 +1,803 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating i16x8 related test cases +which inherites from the 'SimdCmpCase' class and overloads +with the 'get_test_cases' method. +""" + +from simd_compare import SimdCmpCase + + +# Generate i16x8 test case +class Simdi16x8CmpCase(SimdCmpCase): + + LANE_TYPE = 'i16x8' + + # Overloads base class method and sets test data for i16x8. + def get_case_data(self): + + case_data = [] + + # eq + # i16x8.eq (i16x8) (i16x8) + case_data.append(['#', 'eq']) + case_data.append(['#', 'i16x8.eq (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['eq', ['0xFFFF', '0xFFFF'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0x0000', '0x0000'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0xF0F0', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0x0F0F', '0x0F0F'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['eq', ['0xFFFF', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0xFFFF', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0x8080', '32896'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0x8080', '-32640'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['eq', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], + ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['eq', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['eq', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['eq', ['0x0F0F', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['-1', '-1', '0', '0', '0', '0', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.eq (i16x8) (i8x16) + case_data.append(['#', 'i16x8.eq (i16x8) (i8x16)']) + case_data.append(['eq', ['0xFFFF', '0xFF'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', ['65535', '255'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', ['0', '0'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', [['-128', '-128', '0', '0', '1', '1', '255', '255'], + ['-128', '0', '1', '255']], ['0', '0', '-1', '-1', '0', '0', '0', '0'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['eq', ['0x5555', '0xAA'], '0', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.eq (i16x8) (i32x4) + case_data.append(['#', 'i16x8.eq (i16x8) (i32x4)']) + case_data.append(['eq', ['0xFFFF', '0xFFFFFFFF'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', ['65535', '4294967295'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', ['0', '0'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['-1', '0', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + + # ne + # i16x8.ne (i16x8) (i16x8) + case_data.append(['#', 'ne']) + case_data.append(['#', 'i16x8.ne (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ne', ['0xFFFF', '0xFFFF'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0x0000', '0x0000'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0xF0F0', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0x0F0F', '0x0F0F'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ne', ['0xFFFF', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0xFFFF', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0x8080', '32896'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0x8080', '-32640'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ne', ['-1', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0', '0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['255', '255'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['65535', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['255', '0'], ['255', '0']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0', '255'], ['0', '255']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['255', '32767', '-0', '0', '1', '2', '65534', '65535'], + ['255', '32767', '0', '0', '1', '2', '-2', '-1']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ne', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['ne', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ne', ['0x0F0F', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['0x8081', '0x8283', '0xFDFE', '0xFF00', '0x0001', '0x027F', '0x80FD', '0xFEFF'], + ['65279', '33021', '639', '1', '65280', '65022', '33411', '32897']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', [['128', '129', '130', '131', '-0', '255', '32766', '32767'], + ['32767', '32766', '255', '-0', '131', '130', '129', '28']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.ne (i16x8) (i8x16) + case_data.append(['#', 'i16x8.ne (i16x8) (i8x16)']) + case_data.append(['ne', ['0xFFFF', '0xFF'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', ['65535', '255'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', ['0', '0'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', [['-128', '-128', '0', '0', '1', '1', '255', '255'], ['-128', '0', '1', '255']], + ['-1', '-1', '0', '0', '-1', '-1', '-1', '-1'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ne', ['0x5555', '0xAA'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.ne (i16x8) (i32x4) + case_data.append(['#', 'i16x8.ne (i16x8) (i32x4)']) + case_data.append(['ne', ['0xFFFF', '0xFFFFFFFF'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', ['65535', '4294967295'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', ['0', '0'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '0', '0', '0', '-1', '0', '-1'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + + # lt_s + # i16x8.lt_s (i16x8) (i16x8) + case_data.append(['#', 'lt_s']) + case_data.append(['#', 'i16x8.lt_s (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_s', ['0xFFFF', '0xFFFF'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0x0000', '0x0000'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0xF0F0', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0x0F0F', '0x0F0F'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0xFFFF', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0xFFFF', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0x8080', '32896'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0x8080', '-32640'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['-1', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['255', '255'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['65535', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['255', '0'], ['255', '0']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0', '255'], ['0', '255']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['255', '32767', '-0', '0', '1', '2', '65534', '65535'], ['255', '32767', '0', '0', '1', '2', '-2', '-1']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['lt_s', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_s', ['0x0F0F', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['0', '0', '-1', '0', '0', '0', '0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['0x8081', '0x8283', '0xFDFE', '0xFF00', '0x0001', '0x027F', '0x80FD', '0xFEFF'], + ['65279', '33021', '639', '1', '65280', '65022', '33411', '32897']], ['-1', '0', '-1', '-1', '0', '0', '-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', [['128', '129', '130', '131', '-0', '255', '32766', '32767'], + ['32767', '32766', '255', '-0', '131', '130', '129', '28']], ['-1', '-1', '-1', '0', '-1', '0', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.lt_s (i16x8) (i8x16) + case_data.append(['#', 'i16x8.lt_s (i16x8) (i8x16)']) + case_data.append(['lt_s', ['0xFFFF', '0xFF'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', ['65535', '255'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', [['-128', '-128', '0', '0', '1', '1', '255', '255'], ['-128', '0', '1', '255']], + ['0', '0', '0', '0', '-1', '-1', '0', '0'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_s', ['0x5555', '0xAA'], '0', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.lt_s (i16x8) (i32x4) + case_data.append(['#', 'i16x8.lt_s (i16x8) (i32x4)']) + case_data.append(['lt_s', ['0xFFFF', '0xFFFFFFFF'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', ['65535', '4294967295'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '0', '0', '0', '0', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + + # lt_u + # i16x8.lt_u (i16x8) (i16x8) + case_data.append(['#', 'lt_u']) + case_data.append(['#', 'i16x8.lt_u (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_u', ['0xFFFF', '0xFFFF'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0x0000', '0x0000'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0xF0F0', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0x0F0F', '0x0F0F'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_u', ['0xFFFF', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0xFFFF', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0x8080', '32896'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0x8080', '-32640'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_u', ['-1', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['255', '255'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['65535', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['255', '0'], ['255', '0']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0', '255'], ['0', '255']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['255', '32767', '-0', '0', '1', '2', '65534', '65535'], + ['255', '32767', '0', '0', '1', '2', '-2', '-1']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_u', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['lt_u', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_u', ['0x0F0F', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['-1', '-1', '-1', '0', '0', '0', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['0x8081', '0x8283', '0xFDFE', '0xFF00', '0x0001', '0x027F', '0x80FD', '0xFEFF'], + ['65279', '33021', '639', '1', '65280', '65022', '33411', '32897']], ['-1', '0', '0', '0', '-1', '-1', '-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', [['128', '129', '130', '131', '-0', '255', '32766', '32767'], + ['32767', '32766', '255', '-0', '131', '130', '129', '28']], ['-1', '-1', '-1', '0', '-1', '0', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.lt_u (i16x8) (i8x16) + case_data.append(['#', 'i16x8.lt_u (i16x8) (i8x16)']) + case_data.append(['lt_u', ['0xFFFF', '0xFF'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', ['65535', '255'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', [['-128', '-128', '0', '0', '1', '1', '255', '255'], ['-128', '0', '1', '255']], ['0', '-1'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['lt_u', ['0x5555', '0xAA'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.lt_u (i16x8) (i32x4) + case_data.append(['#', 'i16x8.lt_u (i16x8) (i32x4)']) + case_data.append(['lt_u', ['0xFFFF', '0xFFFFFFFF'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', ['65535', '4294967295'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], + ['0', '-1', '0', '0', '0', '0', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + + # le_s + # i16x8.le_s (i16x8) (i16x8) + case_data.append(['#', 'le_s']) + case_data.append(['#', 'i16x8.le_s (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_s', ['0xFFFF', '0xFFFF'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0x0000', '0x0000'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0xF0F0', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0x0F0F', '0x0F0F'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_s', ['0xFFFF', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0xFFFF', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0x8080', '32896'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0x8080', '-32640'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_s', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], + ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_s', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['le_s', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_s', ['0x0F0F', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['0', '0', '-1', '0', '0', '0', '0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['-1', '-1', '-1', '-1', '0', '0', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.le_s (i16x8) (i8x16) + case_data.append(['#', 'i16x8.le_s (i16x8) (i8x16)']) + case_data.append(['le_s', ['0xFFFF', '0xFF'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', ['65535', '255'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', [['-128', '-128', '0', '0', '1', '1', '255', '255'], ['-128', '0', '1', '255']], + ['0', '0', '-1', '-1', '-1', '-1', '0', '0'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_s', ['0x5555', '0xAA'], '0', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.le_s (i16x8) (i32x4) + case_data.append(['#', 'i16x8.le_s (i16x8) (i32x4)']) + case_data.append(['le_s', ['0xFFFF', '0xFFFFFFFF'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', ['65535', '4294967295'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '-1', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + + # le_u + # i16x8.le_u (i16x8) (i16x8) + case_data.append(['#', 'le_u']) + case_data.append(['#', 'i16x8.le_u (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_u', ['0xFFFF', '0xFFFF'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0x0000', '0x0000'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0xF0F0', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0x0F0F', '0x0F0F'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_u', ['0xFFFF', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0xFFFF', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0x8080', '32896'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0x8080', '-32640'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_u', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_u', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['le_u', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_u', ['0x0F0F', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['-1', '-1', '-1', '0', '0', '0', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['-1', '-1', '-1', '0', '-1', '0', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.le_u (i16x8) (i8x16) + case_data.append(['#', 'i16x8.le_u (i16x8) (i8x16)']) + case_data.append(['le_u', ['0xFFFF', '0xFF'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', ['65535', '255'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '-1', '-1', '-1', '-1', '-1', '-1'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['le_u', ['0x5555', '0xAA'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.le_u (i16x8) (i32x4) + case_data.append(['#', 'i16x8.le_u (i16x8) (i32x4)']) + case_data.append(['le_u', ['0xFFFF', '0xFFFFFFFF'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', ['65535', '4294967295'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '-1', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + + # gt_s + # i16x8.gt_s (i16x8) (i16x8) + case_data.append(['#', 'gt_s']) + case_data.append(['#', 'i16x8.gt_s (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_s', ['0xFFFF', '0xFFFF'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0x0000', '0x0000'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0xF0F0', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0x0F0F', '0x0F0F'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_s', ['0xFFFF', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0xFFFF', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0x8080', '32896'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0x8080', '-32640'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_s', ['-1', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['65535', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['65535', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['65535', '0'], ['65535', '0']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0', '65535'], ['0', '65535']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_s', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['gt_s', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_s', ['0x0F0F', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['-1', '-1', '0', '-1', '-1', '-1', '-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['0', '0', '0', '0', '-1', '-1', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.gt_s (i16x8) (i8x16) + case_data.append(['#', 'i16x8.gt_s (i16x8) (i8x16)']) + case_data.append(['gt_s', ['0xFFFF', '0xFF'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', ['65535', '255'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '0', '-1'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_s', ['0x5555', '0xAA'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.gt_s (i16x8) (i32x4) + case_data.append(['#', 'i16x8.gt_s (i16x8) (i32x4)']) + case_data.append(['gt_s', ['0xFFFF', '0xFFFFFFFF'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', ['65535', '4294967295'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['0', '0', '0', '0', '0', '-1', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + + # gt_u + # i16x8.gt_u (i16x8) (i16x8) + case_data.append(['#', 'gt_u']) + case_data.append(['#', 'i16x8.gt_u (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_u', ['0xFFFF', '0xFFFF'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0x0000', '0x0000'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0xF0F0', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0x0F0F', '0x0F0F'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_u', ['0xFFFF', '65535'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0xFFFF', '-1'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0x8080', '32896'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0x8080', '-32640'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['eq', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], + ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_u', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['gt_u', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_u', ['0x0F0F', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['0', '0', '0', '-1', '-1', '-1', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['0', '0', '0', '-1', '0', '-1', '0', '0'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.gt_u (i16x8) (i8x16) + case_data.append(['#', 'i16x8.gt_u (i16x8) (i8x16)']) + case_data.append(['gt_u', ['0xFFFF', '0xFF'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', ['65535', '255'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '0', '0'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['gt_u', ['0x5555', '0xAA'], '0', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.gt_u (i16x8) (i32x4) + case_data.append(['#', 'i16x8.gt_u (i16x8) (i32x4)']) + case_data.append(['gt_u', ['0xFFFF', '0xFFFFFFFF'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', ['65535', '4294967295'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '0', '0', '0', '-1', '0', '-1'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + + # ge_s + # i16x8.ge_s (i16x8) (i16x8) + case_data.append(['#', 'ge_s']) + case_data.append(['#', 'i16x8.ge_s (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_s', ['0xFFFF', '0xFFFF'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0x0000', '0x0000'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0xF0F0', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0x0F0F', '0x0F0F'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_s', ['0xFFFF', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0xFFFF', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0x8080', '32896'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0x8080', '-32640'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_s', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_s', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['ge_s', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_s', ['0x0F0F', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['-1', '-1', '0', '-1', '-1', '-1', '-1', '0'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['-1', '-1', '0', '0', '-1', '-1', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.ge_s (i16x8) (i8x16) + case_data.append(['#', 'i16x8.ge_s (i16x8) (i8x16)']) + case_data.append(['ge_s', ['0xFFFF', '0xFF'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', ['65535', '255'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '-1', '-1', '-1', '0', '0', '-1', '-1'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_s', ['0xAAAA', '0x55'], '0', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.ge_s (i16x8) (i32x4) + case_data.append(['#', 'i16x8.ge_s (i16x8) (i32x4)']) + case_data.append(['ge_s', ['0xFFFF', '0xFFFFFFFF'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', ['65535', '4294967295'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['-1', '0', '-1', '-1', '-1', '-1', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + + # ge_u + # i16x8.ge_u (i16x8) (i16x8) + case_data.append(['#', 'ge_u']) + case_data.append(['#', 'i16x8.ge_u (i16x8) (i16x8)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_u', ['0xFFFF', '0xFFFF'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0x0000', '0x0000'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0xF0F0', '0xF0F0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0x0F0F', '0x0F0F'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0xFFFF', '0x0000'], ['0xFFFF', '0x0000']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x0000', '0xFFFF'], ['0x0000', '0xFFFF']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB'], + ['0x0100', '0x0302', '0x0904', '0x1110', '0x0A12', '0x1A0B', '0xAA1B', '0xFFAB']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_u', ['0xFFFF', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0xFFFF', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0x8080', '32896'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0x8080', '-32640'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x8180', '0x8382', '0xFEFD', '0x00FF', '0x0100', '0x7F02', '0xFD80', '0xFFFE'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_u', ['-1', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['65535', '65535'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['65535', '-1'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['65535', '0'], ['65535', '0']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0', '65535'], ['0', '65535']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['-32768', '65534', '-1', '-0', '0', '1', '2', '65535'], ['32768', '-2', '-1', '-0', '0', '1', '2', '-1']], '-1', ['i16x8', 'i16x8', 'i16x8']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_u', [['0x0000', '0xc300', '0x0000', '0xc2fe', '0x0000', '0xbf80', '0x0000', '0x0000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + case_data.append(['ge_u', [['0x0000', '0x3f80', '0x0000', '0x42fe', '0x0000', '0x4300', '0x0000', '0x437f'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i16x8', 'f32x4', 'i16x8']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_u', ['0x0F0F', '0xF0F0'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x0000', '0xFFFF'], ['0xFFFF', '0x0000']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x0001', '0x0203', '0x0409', '0x1011', '0x120A', '0x0B1A', '0x1BAA', '0xABFF'], + ['0xFFAB', '0xAA1B', '0x1A0B', '0x0A12', '0x1110', '0x0904', '0x0302', '0x0100']], ['0', '0', '0', '-1', '-1', '-1', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['0x8000', '0x8001', '0x8002', '0x8003', '0x8004', '0x8005', '0x8006', '0x8007'], + ['32775', '32774', '32773', '32772', '32771', '32770', '32769', '32768']], ['0', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', [['32768', '32769', '65534', '65535', '0', '-1', '-32767', '-32768'], + ['-32768', '-32767', '-1', '0', '65535', '65534', '32769', '32768']], ['-1', '-1', '0', '-1', '0', '-1', '-1', '-1'], ['i16x8', 'i16x8', 'i16x8']]) + + # i16x8.ge_u (i16x8) (i8x16) + case_data.append(['#', 'i16x8.ge_u (i16x8) (i8x16)']) + case_data.append(['ge_u', ['0xFFFF', '0xFF'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', ['65535', '255'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', [['-128', '-128', '0', '0', '1', '1', '255', '255'], ['-128', '0', '1', '255']], ['-1', '0'], ['i16x8', 'i8x16', 'i16x8']]) + case_data.append(['ge_u', ['0xAAAA', '0x55'], '-1', ['i16x8', 'i8x16', 'i16x8']]) + + # i16x8.ge_u (i16x8) (i32x4) + case_data.append(['#', 'i16x8.ge_u (i16x8) (i32x4)']) + case_data.append(['ge_u', ['0xFFFF', '0xFFFFFFFF'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', ['65535', '4294967295'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', [['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', [['33152', '33666', '65277', '255', '256', '32514', '64896', '65534'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', [['65535', '0', '1', '32768'], ['-128', '0', '1', '255']], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + + return case_data + + +def gen_test_cases(): + i16x8 = Simdi16x8CmpCase() + i16x8.gen_test_cases() + + +if __name__ == '__main__': + i16x8 = Simdi16x8CmpCase() + i16x8.gen_test_cases() diff --git a/test/core/simd/meta/simd_i32x4_cmp.py b/test/core/simd/meta/simd_i32x4_cmp.py new file mode 100644 index 0000000000..09b789e561 --- /dev/null +++ b/test/core/simd/meta/simd_i32x4_cmp.py @@ -0,0 +1,805 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating i32x4 related test cases +which inherites from the 'SimdCmpCase' class and overloads +with the 'get_test_cases' method. +""" + +from simd_compare import SimdCmpCase + + +# Generate i32x4 test case +class Simdi32x4CmpCase(SimdCmpCase): + + LANE_TYPE = 'i32x4' + + # Overload base class method and set test data for i32x4. + def get_case_data(self): + + case_data = [] + + # eq + # i32x4.eq (i32x4) (i32x4) + case_data.append(['#', 'eq']) + case_data.append(['#', 'i32x4.eq (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['eq', ['0xFFFFFFFF', '0xFFFFFFFF'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0x00000000', '0x00000000'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0xF0F0F0F0', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0x0F0F0F0F', '0x0F0F0F0F'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['eq', ['0xFFFFFFFF', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0xFFFFFFFF', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0x80808080', '2155905152'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0x80808080', '-2139062144'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['eq', ['-1', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0', '0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['4294967295', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['4294967295', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['4294967295', '0'], ['4294967295', '0']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0', '4294967295'], ['0', '4294967295']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['eq', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['eq', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['eq', ['0x0F0F0F0F', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['-1', '0', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.eq (i32x4) (i8x16) + case_data.append(['#', 'i32x4.eq (i32x4) (i8x16)']) + case_data.append(['eq', ['0xFFFFFFFF', '0xFF'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', ['4294967295', '255'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', ['0', '0'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['0', '-1', '0', '-1'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['eq', ['0x55555555', '0xAA'], '0', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.eq (i32x4) (i16x8) + case_data.append(['#', 'i32x4.eq (i32x4) (i16x8)']) + case_data.append(['eq', ['0xFFFFFFFF', '0xFFFF'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', ['4294967295', '65535'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', ['0', '0'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', [['4294967295', '0', '1', '65535'], ['65535', '65535', '0', '0', '1', '0', '65535', '65535']], ['-1', '-1', '-1', '0'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', ['0x55555555', '0xAAAA'], '0', ['i32x4', 'i16x8', 'i32x4']]) + + # ne + # i32x4.ne (i32x4) (i32x4) + case_data.append(['#', 'ne']) + case_data.append(['#', 'i32x4.ne (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ne', ['0xFFFFFFFF', '0xFFFFFFFF'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0x00000000', '0x00000000'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0xF0F0F0F0', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0x0F0F0F0F', '0x0F0F0F0F'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ne', ['0xFFFFFFFF', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0xFFFFFFFF', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0x80808080', '2155905152'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0x80808080', '-2139062144'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ne', ['-1', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0', '0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['4294967295', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['4294967295', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['4294967295', '0'], ['4294967295', '0']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0', '4294967295'], ['0', '4294967295']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ne', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['ne', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ne', ['0x0F0F0F0F', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['0', '-1', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.ne (i32x4) (i8x16) + case_data.append(['#', 'i32x4.ne (i32x4) (i8x16)']) + case_data.append(['ne', ['0xFFFFFFFF', '0xFF'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', ['4294967295', '255'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', ['0', '0'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['-1', '0', '-1', '0'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ne', ['0x55555555', '0xAA'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.ne (i32x4) (i16x8) + case_data.append(['#', 'i32x4.ne (i32x4) (i16x8)']) + case_data.append(['ne', ['0xFFFFFFFF', '0xFFFF'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', ['4294967295', '65535'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', ['0', '0'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', ['0xAAAAAAAA', '0x5555'], ['-1', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + + # lt_s + # i32x4.lt_s (i32x4) (i32x4) + case_data.append(['#', 'lt_s']) + case_data.append(['#', 'i32x4.lt_s (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_s', ['0xFFFFFFFF', '0xFFFFFFFF'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0x00000000', '0x00000000'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0xF0F0F0F0', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0x0F0F0F0F', '0x0F0F0F0F'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_s', ['0xFFFFFFFF', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0xFFFFFFFF', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0x80808080', '2155905152'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0x80808080', '-2139062144'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_s', ['-1', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['4294967295', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['4294967295', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['4294967295', '0'], ['4294967295', '0']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0', '4294967295'], ['0', '4294967295']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['-2147483647', '4294967295', '0', '-1'], + ['2147483649', '-1', '0', '-1']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_s', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_s', ['0x0F0F0F0F', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['0', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['0', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.lt_s (i32x4) (i8x16) + case_data.append(['#', 'i32x4.lt_s (i32x4) (i8x16)']) + case_data.append(['lt_s', ['0xFFFFFFFF', '0xFF'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', ['4294967295', '255'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['0', '0', '-1', '0'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_s', ['0x55555555', '0xAA'], '0', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.lt_s (i32x4) (i16x8) + case_data.append(['#', 'i32x4.lt_s (i32x4) (i16x8)']) + case_data.append(['lt_s', ['0xFFFFFFFF', '0xFFFF'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', ['4294967295', '65535'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + + # lt_u + # i32x4.lt_u (i32x4) (i32x4) + case_data.append(['#', 'lt_u']) + case_data.append(['#', 'i32x4.lt_u (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_u', ['0xFFFFFFFF', '0xFFFFFFFF'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0x00000000', '0x00000000'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0xF0F0F0F0', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0x0F0F0F0F', '0x0F0F0F0F'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_u', ['0xFFFFFFFF', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0xFFFFFFFF', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0x80808080', '2155905152'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0x80808080', '-2139062144'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_u', ['-1', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['4294967295', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['4294967295', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['4294967295', '0'], ['4294967295', '0']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0', '4294967295'], ['0', '4294967295']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_u', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_u', ['0x0F0F0F0F', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['-1', '0', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['0', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.lt_u (i32x4) (i8x16) + case_data.append(['#', 'i32x4.lt_u (i32x4) (i8x16)']) + case_data.append(['lt_u', ['0xFFFFFFFF', '0xFF'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', ['4294967295', '255'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['0', '0', '-1', '0'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['lt_u', ['0x55555555', '0xAA'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.lt_u (i32x4) (i16x8) + case_data.append(['#', 'i32x4.lt_u (i32x4) (i16x8)']) + case_data.append(['lt_u', ['0xFFFFFFFF', '0xFFFF'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', ['4294967295', '65535'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + + # le_s + # i32x4.le_s (i32x4) (i32x4) + case_data.append(['#', 'le_s']) + + case_data.append(['#', 'i32x4.le_s (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_s', ['0xFFFFFFFF', '0xFFFFFFFF'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0x00000000', '0x00000000'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0xF0F0F0F0', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0x0F0F0F0F', '0x0F0F0F0F'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_s', ['0xFFFFFFFF', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0xFFFFFFFF', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0x80808080', '2155905152'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0x80808080', '-2139062144'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_s', ['-1', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['4294967295', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['4294967295', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['4294967295', '0'], ['4294967295', '0']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0', '4294967295'], ['0', '4294967295']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['-2147483647', '4294967295', '0', '-1'], + ['2147483649', '-1', '0', '-1']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_s', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['le_s', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_s', ['0x0F0F0F0F', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['0', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['-1', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.le_s (i32x4)(i8x16) + case_data.append(['#', 'i32x4.le_s (i32x4)(i8x16)']) + case_data.append(['le_s', ['0xFFFFFFFF', '0xFF'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', ['4294967295', '255'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_s', ['0x55555555', '0xAA'], '0', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.le_s (i32x4) (i16x8) + case_data.append(['#', 'i32x4.le_s (i32x4) (i16x8)']) + case_data.append(['le_s', ['0xFFFFFFFF', '0xFFFF'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', ['4294967295', '65535'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + + # le_u + # i32x4.le_u (i32x4) (i32x4) + case_data.append(['#', 'le_u']) + + case_data.append(['#', 'i32x4.le_u (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_u', ['0xFFFFFFFF', '0xFFFFFFFF'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0x00000000', '0x00000000'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0xF0F0F0F0', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0x0F0F0F0F', '0x0F0F0F0F'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_u', ['0xFFFFFFFF', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0xFFFFFFFF', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0x80808080', '2155905152'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0x80808080', '-2139062144'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_u', ['-1', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['4294967295', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['4294967295', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['4294967295', '0'], ['4294967295', '0']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0', '4294967295'], ['0', '4294967295']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_u', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['le_u', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_u', ['0x0F0F0F0F', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['-1', '0', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['-1', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.le_u (i32x4) (i8x16) + case_data.append(['#', 'i32x4.le_u (i32x4) (i8x16)']) + case_data.append(['le_u', ['0xFFFFFFFF', '0xFF'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', ['4294967295', '255'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['le_u', ['0x55555555', '0xAA'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.le_u (i32x4) (i16x8) + case_data.append(['#', 'i32x4.le_u (i32x4) (i16x8)']) + case_data.append(['le_u', ['0xFFFFFFFF', '0xFFFF'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', ['4294967295', '65535'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + + # gt_s + # i32x4.gt_s (i32x4) (i32x4) + case_data.append(['#', 'gt_s']) + + case_data.append(['#', 'i32x4.gt_s (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_s', ['0xFFFFFFFF', '0xFFFFFFFF'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0x00000000', '0x00000000'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0xF0F0F0F0', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0x0F0F0F0F', '0x0F0F0F0F'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_s', ['0xFFFFFFFF', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0xFFFFFFFF', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0x80808080', '2155905152'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0x80808080', '-2139062144'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_s', ['-1', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['4294967295', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['4294967295', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['4294967295', '0'], ['4294967295', '0']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0', '4294967295'], ['0', '4294967295']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_s', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_s', ['0x0F0F0F0F', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['-1', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['0', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.gt_s (i32x4) (i8x16) + case_data.append(['#', 'i32x4.gt_s (i32x4) (i8x16)']) + case_data.append(['gt_s', ['0xFFFFFFFF', '0xFF'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', ['4294967295', '255'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['-1', '0', '0', '0'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_s', ['0x55555555', '0xAA'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.gt_s (i32x4) (i16x8) + case_data.append(['#', 'i32x4.gt_s (i32x4) (i16x8)']) + case_data.append(['gt_s', ['0xFFFFFFFF', '0xFFFF'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', ['4294967295', '65535'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', [['65535', '0', '1', '32768'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['-1', '0', '0', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + + # gt_u + # i32x4.gt_u (i32x4) (i32x4) + case_data.append(['#', 'gt_u']) + + case_data.append(['#', 'i32x4.gt_u (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_u', ['0xFFFFFFFF', '0xFFFFFFFF'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0x00000000', '0x00000000'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0xF0F0F0F0', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0x0F0F0F0F', '0x0F0F0F0F'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_u', ['0xFFFFFFFF', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0xFFFFFFFF', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0x80808080', '2155905152'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0x80808080', '-2139062144'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_u', ['-1', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['4294967295', '4294967295'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['4294967295', '-1'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['4294967295', '0'], ['4294967295', '0']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0', '4294967295'], ['0', '4294967295']], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '0', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_u', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '0', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_u', ['0x0F0F0F0F', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['0', '-1', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['0', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.gt_u (i32x4) (i8x16) + case_data.append(['#', 'i32x4.gt_u (i32x4) (i8x16)']) + case_data.append(['gt_u', ['0xFFFFFFFF', '0xFF'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', ['4294967295', '255'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['-1', '0', '0', '0'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['gt_u', ['0x55555555', '0xAA'], '0', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.gt_u (i32x4) (i16x8) + case_data.append(['#', 'i32x4.gt_u (i32x4) (i16x8)']) + case_data.append(['gt_u', ['0xFFFFFFFF', '0xFFFF'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', ['4294967295', '65535'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], ['0', '0', '0', '0'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '0', '0'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + + # ge_s + # i32x4.ge_s (i32x4) (i32x4) + case_data.append(['#', 'ge_s']) + + case_data.append(['#', 'i32x4.ge_s (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_s', ['0xFFFFFFFF', '0xFFFFFFFF'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0x00000000', '0x00000000'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0xF0F0F0F0', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0x0F0F0F0F', '0x0F0F0F0F'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_s', ['0xFFFFFFFF', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0xFFFFFFFF', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0x80808080', '2155905152'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0x80808080', '-2139062144'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_s', ['-1', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['4294967295', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['4294967295', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['4294967295', '0'], ['4294967295', '0']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0', '4294967295'], ['0', '4294967295']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_s', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_s', ['0x0F0F0F0F', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['-1', '-1', '0', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['-1', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['-1', '-1', '-1', '0'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.ge_s (i32x4) (i8x16) + case_data.append(['#', 'i32x4.ge_s (i32x4) (i8x16)']) + case_data.append(['ge_s', ['0xFFFFFFFF', '0xFF'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', ['4294967295', '255'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], ['-1', '-1', '0', '-1'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_s', ['0x55555555', '0x55'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.ge_s (i32x4) (i16x8) + case_data.append(['#', 'i32x4.ge_s (i32x4) (i16x8)']) + case_data.append(['ge_s', ['0xFFFFFFFF', '0xFFFF'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', ['4294967295', '65535'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', [['65535', '0', '1', '32768'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['-1', '-1', '0', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + + # ge_u + # i32x4.ge_u (i32x4) (i32x4) + case_data.append(['#', 'ge_u']) + + case_data.append(['#', 'i32x4.ge_u (i32x4) (i32x4)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_u', ['0xFFFFFFFF', '0xFFFFFFFF'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0x00000000', '0x00000000'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0xF0F0F0F0', '0xF0F0F0F0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0x0F0F0F0F', '0x0F0F0F0F'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0xFFFFFFFF', '0x00000000'], ['0xFFFFFFFF', '0x00000000']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x00000000', '0xFFFFFFFF'], ['0x00000000', '0xFFFFFFFF']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_u', ['0xFFFFFFFF', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0xFFFFFFFF', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0x80808080', '2155905152'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0x80808080', '-2139062144'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x83828180', '0x00FFFEFD', '0x7F020100', '0xFFFEFD80'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_u', ['-1', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['4294967295', '4294967295'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['4294967295', '-1'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['4294967295', '0'], ['4294967295', '0']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0', '4294967295'], ['0', '4294967295']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['-2147483647', '4294967295', '0', '-1'], ['2147483649', '-1', '0', '-1']], '-1', ['i32x4', 'i32x4', 'i32x4']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_u', [['0xc3000000', '0xc2fe0000', '0xbf800000', '0x00000000'], ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x3f800000', '0x42fe0000', '0x43000000', '0x437f0000'], ['1.0', '127.0', '128.0', '255.0']], '-1', ['i32x4', 'f32x4', 'i32x4']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_u', ['0x0F0F0F0F', '0xF0F0F0F0'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x00000000', '0xFFFFFFFF'], ['0xFFFFFFFF', '0x00000000']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x02030001', '0x10110409', '0x0B1A120A', '0xABFF1BAA'], + ['0xAA1BFFAB', '0x0A121A0B', '0x09041110', '0x01000302']], ['0', '-1', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['0x80018000', '0x80038002', '0x80058004', '0x80078006'], + ['2147975174', '2147844100', '2147713026', '2147581952']], ['0', '0', '-1', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', [['2147483648', '2147483647', '0', '-1'], ['-2147483648', '-2147483647', '-1', '0']], ['-1', '0', '0', '-1'], ['i32x4', 'i32x4', 'i32x4']]) + + # i32x4.ge_u (i32x4) (i8x16) + case_data.append(['#', 'i32x4.ge_u (i32x4) (i8x16)']) + case_data.append(['ge_u', ['0xFFFFFFFF', '0xFF'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', ['4294967295', '255'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', [['-8323200', '0', '1', '4294967295'], ['-128', '0', '1', '255']], + ['-1', '-1', '0', '-1'], ['i32x4', 'i8x16', 'i32x4']]) + case_data.append(['ge_u', ['0xAAAAAAAA', '0x55'], '-1', ['i32x4', 'i8x16', 'i32x4']]) + + # i32x4.ge_u (i32x4) (i16x8) + case_data.append(['#', 'i32x4.ge_u (i32x4) (i16x8)']) + case_data.append(['ge_u', ['0xFFFFFFFF', '0xFFFF'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', ['4294967295', '65535'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', [['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', [['2206368128', '16776957', '2130837760', '4294901120'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', [['-128', '0', '1', '255'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['0', '-1', '0', '0'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', ['0xAAAAAAAA', '0x5555'], ['-1', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + + return case_data + + # generate all test cases + def get_all_cases(self): + + # Add tests for unkonow operators for i32x4 + return SimdCmpCase.get_all_cases(self) + """ +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.eq (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ne (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.lt_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.lt_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.le_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.le_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_u (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_s (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_u (local.get $x) (local.get $y)))") "unknown operator") + +""" + + +def gen_test_cases(): + i32x4 = Simdi32x4CmpCase() + i32x4.gen_test_cases() + + +if __name__ == '__main__': + i32x4 = Simdi32x4CmpCase() + i32x4.gen_test_cases() diff --git a/test/core/simd/meta/simd_i8x16_cmp.py b/test/core/simd/meta/simd_i8x16_cmp.py new file mode 100644 index 0000000000..035507d6bd --- /dev/null +++ b/test/core/simd/meta/simd_i8x16_cmp.py @@ -0,0 +1,823 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating i8x16 related test cases +which inherites from the 'SimdCmpCase' class and overloads +with the 'get_test_cases' method. +""" + +from simd_compare import SimdCmpCase + + +# Generate i8x16 test case +class Simdi8x16CmpCase(SimdCmpCase): + + # set lane type + LANE_TYPE = 'i8x16' + + # Overload base class method and set test data for i32x4. + def get_case_data(self): + + case_data = [] + + # i8x16.eq (i8x16) (i8x16) + # hex vs hex + case_data.append(['#', 'eq']) + case_data.append(['#', 'i8x16.eq (i8x16) (i8x16)']) + case_data.append(['#', 'hex vs hex']) + case_data.append(['eq', ['0xFF', '0xFF'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0x00', '0x00'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0xF0', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0x0F', '0x0F'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0xFF', '0x00'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x00', '0xFF'], ['0x00', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['eq', ['0xFF', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0xFF', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0x80', '128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0x80', '-128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['eq', ['-1', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['0', '0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['255', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', ['255', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['255', '0'], ['255', '0']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0', '255'], ['0', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['eq', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['eq', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['eq', ['0x0F', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x00', '0xFF'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '0', '0', '0', '0', '-1', '-1', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['eq', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '0', '0', '0', '0', '-1', '-1', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + + # i8x16.eq (i8x16) (i16x8) + case_data.append(['#', 'i8x16.eq (i8x16) (i16x8)']) + case_data.append(['eq', ['0xFF', '0xFFFF'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', ['255', '65535'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', ['0', '0'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], ['-1', '0', '-1', '0', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '-1', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['eq', ['0x55', '0xAAAA'], '0', ['i8x16', 'i16x8', 'i8x16']]) + + # i8x16.eq (i8x16) (i32x4) + case_data.append(['#', 'i8x16.eq (i8x16) (i32x4)']) + case_data.append(['eq', ['0xFF', '0xFFFFFFFF'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', ['255', '4294967295'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', ['0', '0'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '0', '1', '255']], ['-1', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['eq', ['0x55', '0xAAAAAAAA'], '0', ['i8x16', 'i32x4', 'i8x16']]) + + # ne + # i8x16.ne (i8x16) (i8x16) + case_data.append(['#', 'ne']) + case_data.append(['#', 'i8x16.ne (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ne', ['0xFF', '0xFF'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0x00', '0x00'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0xF0', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0x0F', '0x0F'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0xFF', '0x00'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x00', '0xFF'], ['0x00', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ne', ['0xFF', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0xFF', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0x80', '128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0x80', '-128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ne', ['-1', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['0', '0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['255', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', ['255', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['255', '0'], ['255', '0']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0', '255'], ['0', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ne', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['ne', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ne', ['0x0F', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x00', '0xFF'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ne', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + + # i8x16.ne (i8x16) (i16x8) + case_data.append(['#', 'i8x16.ne (i8x16) (i16x8)']) + case_data.append(['ne', ['0xFF', '0xFFFF'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', ['255', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', ['0', '0'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], ['0', '-1', '0', '-1', '0', '0', '0', '0', '0', '-1', '0', '-1', '0', '-1', '0', '-1'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ne', ['0x55', '0xAAAA'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + + # i8x16.ne (i8x16) (i32x4) + case_data.append(['#', 'i8x16.ne (i8x16) (i32x4)']) + case_data.append(['ne', ['0xFF', '0xFFFFFFFF'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', ['255', '4294967295'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', ['0', '0'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['0', '-1', '-1', '-1', '0', '0', '0', '0', '0', '-1', '-1', '-1', '0', '-1', '-1', '-1'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ne', ['0x55', '0xAAAAAAAA'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + + # lt_s + case_data.append(['#', 'lt_s']) + case_data.append(['#', 'i8x16.lt_s (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_s', ['0xFF', '0xFF'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0x00', '0x00'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0xF0', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0x0F', '0x0F'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0xFF', '0x00'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0xFF'], ['0x00', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_s', ['0xFF', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0xFF', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0x80', '128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0x80', '-128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_s', ['-1', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['255', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', ['255', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['255', '0'], ['255', '0']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0', '255'], ['0', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_s', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_s', ['0x0F', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0xFF'], ['0xFF', '0x00']], ['0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['0', '0', '0', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '-1', '-1', '-1', '0', '0', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '-1', '-1', '-1', '0', '0', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.lt_s (i8x16) (i16x8)']) + case_data.append(['lt_s', ['0xFF', '0xFFFF'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', ['255', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '-128', '0', '0', '1', '1', '255', '255']], + ['0', '-1', '0', '-1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '0', '-1'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_s', ['0x55', '0xAAAA'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.lt_s (i8x16) (i32x4)']) + case_data.append(['lt_s', ['0xFF', '0xFFFFFFFF'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', ['255', '4294967295'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['0', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_s', ['0x55', '0xAAAAAAAA'], '0', ['i8x16', 'i32x4', 'i8x16']]) + + # lt_u + case_data.append(['#', 'lt_u']) + case_data.append(['#', 'i8x16.lt_u (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_u', ['0xFF', '0xFF'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0x00', '0x00'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0xF0', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0x0F', '0x0F'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0xFF', '0x00'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0xFF'], ['0x00', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_u', ['0xFF', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0xFF', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0x80', '128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0x80', '-128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_u', ['-1', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['255', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', ['255', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['255', '0'], ['255', '0']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0', '255'], ['0', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_u', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['lt_u', ['0x0F', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0xFF'], ['0xFF', '0x00']], ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['-1', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['lt_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.lt_u (i8x16) (i16x8)']) + case_data.append(['lt_u', ['0xFF', '0xFFFF'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', ['255', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], ['0', '-1', '0', '-1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['lt_u', ['0x55', '0xAAAA'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.lt_u (i8x16) (i32x4)']) + case_data.append(['lt_u', ['0xFF', '0xFFFFFFFF'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', ['255', '4294967295'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', ['0', '0'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['lt_u', ['0x55', '0xAAAAAAAA'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + + # le_s + case_data.append(['#', 'le_s']) + case_data.append(['#', 'i8x16.le_s (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_s', ['0xFF', '0xFF'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0x00', '0x00'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0xF0', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0x0F', '0x0F'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0xFF', '0x00'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0xFF'], ['0x00', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_s', ['0xFF', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0xFF', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0x80', '128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0x80', '-128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_s', ['-1', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['255', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', ['255', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['255', '0'], ['255', '0']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0', '255'], ['0', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_s', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_s', ['0x0F', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0xFF'], ['0xFF', '0x00']], ['0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['0', '0', '0', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.le_s (i8x16) (i16x8)']) + case_data.append(['le_s', ['0xFF', '0xFFFF'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', ['255', '65535'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], + ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0', '-1', '-1', '-1', '-1'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_s', ['0x55', '0xAAAA'], ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.le_s (i8x16) (i32x4)']) + case_data.append(['le_s', ['0xFF', '0xFFFFFFFF'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', ['255', '4294967295'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '-1', '-1', '-1', '-1'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_s', ['0x55', '0xAAAAAAAA'], '0', ['i8x16', 'i32x4', 'i8x16']]) + + # le_u + case_data.append(['#', 'le_u']) + case_data.append(['#', 'i8x16.le_u (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_u', ['0xFF', '0xFF'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0x00', '0x00'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0xF0', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0x0F', '0x0F'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0xFF', '0x00'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0xFF'], ['0x00', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_u', ['0xFF', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0xFF', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0x80', '128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0x80', '-128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_u', ['-1', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['255', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', ['255', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['255', '0'], ['255', '0']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0', '255'], ['0', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_u', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['le_u', ['0x0F', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0xFF'], ['0xFF', '0x00']], ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['-1', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['le_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['-1', '-1', '-1', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.le_u (i8x16) (i16x8)']) + case_data.append(['le_u', ['0xFF', '0xFFFF'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', ['255', '65535'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0', '-1', '0', '-1', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['le_u', ['0x55', '0xAAAA'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.le_u (i8x16) (i32x4)']) + case_data.append(['le_u', ['0xFF', '0xFFFFFFFF'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', ['255', '4294967295'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', ['0', '0'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '-1', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['le_u', ['0x55', '0xAAAAAAAA'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + + # gt_s + case_data.append(['#', 'gt_s']) + case_data.append(['#', 'i8x16.gt_s (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_s', ['0xFF', '0xFF'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0x00', '0x00'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0xF0', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0x0F', '0x0F'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0xFF', '0x00'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0xFF'], ['0x00', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_s', ['0xFF', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0xFF', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0x80', '128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0x80', '-128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_s', ['-1', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['255', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', ['255', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['255', '0'], ['255', '0']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0', '255'], ['0', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_s', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_s', ['0x0F', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0xFF'], ['0xFF', '0x00']], ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['-1', '-1', '-1', '0', '0', '0', '-1', '0', '-1', '0', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '0', '0', '0', '0', '0', '-1', '-1', '-1', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '0', '0', '0', '0', '0', '-1', '-1', '-1', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.gt_s (i8x16) (i16x8)']) + case_data.append(['gt_s', ['0xFF', '0xFFFF'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', ['255', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '-128', '0', '0', '1', '1', '255', '255']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '0', '-1', '0', '0', '0', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_s', ['0x55', '0xAAAA'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.gt_s (i8x16) (i32x4)']) + case_data.append(['gt_s', ['0xFF', '0xFFFFFFFF'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', ['255', '4294967295'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], ['2206368128', '16776957', '2130837760', '4294901120']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_s', ['0x55', '0xAAAAAAAA'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + + # gt_u + case_data.append(['#', 'gt_u']) + case_data.append(['#', 'i8x16.gt_u (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_u', ['0xFF', '0xFF'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0x00', '0x00'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0xF0', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0x0F', '0x0F'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0xFF', '0x00'], ['0xFF', '0x00']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0xFF'], ['0x00', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_u', ['0xFF', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0xFF', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0x80', '128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0x80', '-128'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_u', ['-1', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['255', '255'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', ['255', '-1'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['255', '0'], ['255', '0']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0', '255'], ['0', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '0', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_u', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '0', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['gt_u', ['0x0F', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0xFF'], ['0xFF', '0x00']], ['0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['0', '0', '0', '0', '0', '0', '-1', '0', '-1', '0', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['gt_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.gt_u (i8x16) (i16x8)']) + case_data.append(['gt_u', ['0xFF', '0xFFFF'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', ['255', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '-128', '0', '0', '1', '1', '255', '255']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '0', '-1', '0', '-1', '0', '-1'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['gt_u', ['0x55', '0xAAAA'], '0', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.gt_u (i8x16) (i32x4)']) + case_data.append(['gt_u', ['0xFF', '0xFFFFFFFF'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', ['255', '4294967295'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', ['0', '0'], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '0', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], ['2206368128', '16776957', '2130837760', '4294901120']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['0', '0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '0', '-1', '-1', '-1'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['gt_u', ['0x55', '0xAAAAAAAA'], ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + + # ge_s + case_data.append(['#', 'ge_s']) + case_data.append(['#', 'i8x16.ge_s (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_s', ['0xFF', '0xFF'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0x00', '0x00'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0xF0', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0x0F', '0x0F'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0xFF', '0x00'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0xFF'], ['0x00', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_s', ['0xFF', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0xFF', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0x80', '128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0x80', '-128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_s', ['-1', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['255', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', ['255', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['255', '0'], ['255', '0']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0', '255'], ['0', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_s', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_s', ['0x0F', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0xFF'], ['0xFF', '0x00']], ['-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['-1', '-1', '-1', '0', '0', '0', '-1', '0', '-1', '0', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_s', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '0', '-1', '-1', '-1'], + ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['#', 'i8x16.ge_s (i8x16) (i16x8)']) + case_data.append(['ge_s', ['0xFF', '0xFFFF'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', ['255', '65535'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '-128', '0', '0', '1', '1', '255', '255']], + ['-1', '0', '-1', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '-1', '0'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_s', ['0x55', '0xAAAA'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['#', 'i8x16.ge_s (i8x16) (i32x4)']) + case_data.append(['ge_s', ['0xFF', '0xFFFFFFFF'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', ['255', '4294967295'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], ['-128', '0', '1', '255']], + ['-1', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_s', ['0x55', '0xAAAAAAAA'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + + # ge_u + # i8x16.ge_u (i8x16) (i8x16) + case_data.append(['#', 'ge_u']) + case_data.append(['#', 'i8x16.ge_u (i8x16) (i8x16)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_u', ['0xFF', '0xFF'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0x00', '0x00'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0xF0', '0xF0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0x0F', '0x0F'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0xFF', '0x00'], ['0xFF', '0x00']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0xFF'], ['0x00', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_u', ['0xFF', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0xFF', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0x80', '128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0x80', '-128'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_u', ['-1', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['255', '255'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', ['255', '-1'], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['255', '0'], ['255', '0']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0', '255'], ['0', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['-128', '-127', '-126', '-125', '-3', '-2', '-1', '-0', '0', '1', '2', '127', '128', '253', '254', '255']], '-1', ['i8x16', 'i8x16', 'i8x16']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_u', [['0x00', '0x00', '0x00', '0xc3', '0x00', '0x00', '0xfe', '0xc2', '0x00', '0x00', '0x80', '0xbf', '0x00', '0x00', '0x00', '0x00'], + ['-128.0', '-127.0', '-1.0', '0.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0x00', '0x80', '0x3f', '0x00', '0x00', '0xfe', '0x42', '0x00', '0x00', '0x00', '0x43', '0x00', '0x00', '0x7f', '0x43'], + ['1.0', '127.0', '128.0', '255.0']], '-1', ['i8x16', 'f32x4', 'i8x16']]) + + # not equal + case_data.append(['#', 'not equal']) + case_data.append(['ge_u', ['0x0F', '0xF0'], '0', ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0xFF'], ['0xFF', '0x00']], ['0', '0', '0', '0', '0', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x09', '0x10', '0x11', '0x12', '0x0A', '0x0B', '0x1A', '0x1B', '0xAA', '0xAB', '0xFF'], + ['0xFF', '0xAB', '0xAA', '0x1B', '0x1A', '0x0B', '0x0A', '0x12', '0x11', '0x10', '0x09', '0x04', '0x03', '0x02', '0x01', '0x00']], + ['0', '0', '0', '0', '0', '0', '-1', '0', '-1', '0', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['0x80', '0x81', '0x82', '0x83', '0xFD', '0xFE', '0xFF', '0x00', '0x00', '0x01', '0x02', '0x7F', '0x80', '0xFD', '0xFE', '0xFF'], + ['255', '254', '253', '128', '127', '2', '1', '0', '0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + case_data.append(['ge_u', [['128', '129', '130', '131', '253', '254', '255', '-0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['255', '254', '253', '128', '127', '2', '1', '0', '-0', '-1', '-2', '-3', '-125', '-126', '-127', '-128']], + ['0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '0', '0', '0', '0', '-1', '-1', '-1'], ['i8x16', 'i8x16', 'i8x16']]) + + # i8x16.ge_u (i8x16) (i16x8) + case_data.append(['#', 'i8x16.ge_u (i8x16) (i16x8)']) + case_data.append(['ge_u', ['0xFF', '0xFFFF'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', ['255', '65535'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x0100', '0x0302', '0x0504', '0x0706', '0x0908', '0x0B0A', '0x0D0C', '0x0F0E']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['33152', '33666', '65277', '255', '256', '32514', '64896', '65534']], '-1', ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '-128', '0', '0', '1', '1', '255', '255']], ['-1', '0', '-1', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i16x8', 'i8x16']]) + case_data.append(['ge_u', ['0x55', '0xAAAA'], ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i16x8', 'i8x16']]) + + # i8x16.ge_u (i8x16) (i32x4) + case_data.append(['#', 'i8x16.ge_u (i8x16) (i32x4)']) + case_data.append(['ge_u', ['0xFF', '0xFFFFFFFF'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', ['255', '4294967295'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', ['0', '0'], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', [['0x00', '0x01', '0x02', '0x03', '0x04', '0x05', '0x06', '0x07', '0x08', '0x09', '0x0A', '0x0B', '0x0C', '0x0D', '0x0E', '0x0F'], + ['0x03020100', '0x07060504', '0x0B0A0908', '0x0F0E0D0C']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', [['-128', '-127', '-126', '-125', '-3', '-2', '-1', '0', '0', '1', '2', '127', '128', '253', '254', '255'], + ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', [['-128', '-128', '-128', '-128', '0', '0', '0', '0', '1', '1', '1', '1', '255', '255', '255', '255'], + ['-128', '0', '1', '255']], ['-1', '0', '0', '0', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1', '-1'], ['i8x16', 'i32x4', 'i8x16']]) + case_data.append(['ge_u', ['0x55', '0xAAAAAAAA'], ['0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0'], ['i8x16', 'i32x4', 'i8x16']]) + + return case_data + + +def gen_test_cases(): + i8x16 = Simdi8x16CmpCase() + i8x16.gen_test_cases() + + +if __name__ == '__main__': + i8x16 = Simdi8x16CmpCase() + i8x16.gen_test_cases() diff --git a/test/core/simd/meta/test_assert.py b/test/core/simd/meta/test_assert.py new file mode 100644 index 0000000000..48a057576f --- /dev/null +++ b/test/core/simd/meta/test_assert.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- + +""" +This python file is a tool class for test generation. +Currently only the 'AssertReturn' class that is used +to generate the 'assert_return' assertion. +TODO: Add more assertions +""" + + +# Generate assert_return to test +class AssertReturn(object): + + instruction = '' + instruction_param = '' + expected_result = '' + + def __init__(self, instruction, instruction_param, expected_result): + super(AssertReturn, self).__init__() + + # Check the init parameters + if not instruction or not instruction_param or not expected_result: + raise Exception('AssertReturn: wrong param.') + + # Convert to list if got str + if isinstance(instruction_param, str): + instruction_param = [instruction_param] + if isinstance(expected_result, str): + expected_result = [expected_result] + + self.instruction = instruction + self.instruction_param = instruction_param + self.expected_result = expected_result + + def __str__(self): + assert_return = '(assert_return (invoke "{}"'.format(self.instruction) + + head_len = len(assert_return) + + # Add write space to make the test case easier to read + params = [] + for param in self.instruction_param: + white_space = ' ' + if len(params) != 0: + white_space = '\n ' + ' ' * head_len + params.append(white_space + param) + + results = [] + for result in self.expected_result: + white_space = ' ' + if len(result) != 0: + white_space = '\n ' + ' ' * head_len + results.append(white_space + result) + + return '{}{}){})'.format(assert_return, ''.join(params), ''.join(results)) From 52ec9ca1ae636061083b934aa6e9d02b0d15cbdc Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 11 Sep 2019 15:11:39 -0700 Subject: [PATCH 049/378] Clarify that shift count is modulo lane width Fixes #100. --- proposals/simd/SIMD.md | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index ac8c62c5fe..b5aa9c0b61 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -465,8 +465,8 @@ def S.sub_saturate_u(a, b): * `i32x4.shl(a: v128, y: i32) -> v128` * `i64x2.shl(a: v128, y: i32) -> v128` -Shift the bits in each lane to the left by the same amount. Only the low bits -of the shift amount are used: +Shift the bits in each lane to the left by the same amount. The shift count is +taken modulo lane width: ```python def S.shl(a, y): @@ -487,9 +487,9 @@ def S.shl(a, y): * `i64x2.shr_s(a: v128, y: i32) -> v128` * `i64x2.shr_u(a: v128, y: i32) -> v128` -Shift the bits in each lane to the right by the same amount. This is an -arithmetic right shift for the `_s` variants and a logical right shift for the -`_u` variants. +Shift the bits in each lane to the right by the same amount. The shift count is +taken modulo lane width. This is an arithmetic right shift for the `_s` +variants and a logical right shift for the `_u` variants. ```python def S.shr_s(a, y): From 36a8199bd7c7eecd6a328a1641197e03835bb61c Mon Sep 17 00:00:00 2001 From: Petr Penzin <41971413+penzn@users.noreply.github.com> Date: Thu, 12 Sep 2019 17:33:59 -0700 Subject: [PATCH 050/378] Introduce Load and Extend (#98) And remove i8x16.mul, as documented in #28 and #98. --- proposals/simd/BinarySIMD.md | 7 ++++++- proposals/simd/ImplementationStatus.md | 7 ++++++- proposals/simd/SIMD.md | 12 +++++++++++- 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 80514f9138..a9a5897205 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -109,7 +109,6 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.sub` | `0x5a`| - | | `i8x16.sub_saturate_s` | `0x5b`| - | | `i8x16.sub_saturate_u` | `0x5c`| - | -| `i8x16.mul` | `0x5d`| - | | `i16x8.neg` | `0x62`| - | | `i16x8.any_true` | `0x63`| - | | `i16x8.all_true` | `0x64`| - | @@ -184,3 +183,9 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.widen_high_i16x8_s` | `0xcf`| - | | `i32x4.widen_low_i16x8_u` | `0xd0`| - | | `i32x4.widen_high_i16x8_u` | `0xd1`| - | +| `i16x8.load8x8_u` | `0xd2`| m:memarg | +| `i16x8.load8x8_s` | `0xd3`| m:memarg | +| `i32x4.load16x4_u` | `0xd4`| m:memarg | +| `i32x4.load16x4_s` | `0xd5`| m:memarg | +| `i64x2.load32x2_u` | `0xd6`| m:memarg | +| `i64x2.load32x2_s` | `0xd7`| m:memarg | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 7ef69ec398..3ced5d8618 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -86,7 +86,6 @@ | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -145,6 +144,12 @@ | `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load8x8_u` | | | | | +| `i16x8.load8x8_s` | | | | | +| `i32x4.load16x4_u` | | | | | +| `i32x4.load16x4_s` | | | | | +| `i64x2.load32x2_u` | | | | | +| `i64x2.load32x2_s` | | | | | | `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | :heavy_check_mark: | | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index b5aa9c0b61..4f9e073f6d 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -367,7 +367,6 @@ def S.sub(a, b): ``` ### Integer multiplication -* `i8x16.mul(a: v128, b: v128) -> v128` * `i16x8.mul(a: v128, b: v128) -> v128` * `i32x4.mul(a: v128, b: v128) -> v128` @@ -675,6 +674,17 @@ Load a `v128` vector from the given heap address. Load a single element and splat to all lanes of a `v128` vector. +### Load and Extend + +* `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane +* `i16x8.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane +* `i32x4.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane +* `i32x4.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane +* `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane +* `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane + +Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. + ### Store * `v128.store(memarg, data: v128)` From ef23dfb656d7773c0638f2e6496caa46dfaab424 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 13 Sep 2019 10:24:26 -0700 Subject: [PATCH 051/378] Fix pseudocode, was causing syntax highlight issues --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4f9e073f6d..d69f34b0c2 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -300,7 +300,7 @@ def S.shuffle(a, b, s): if s[i] < S.lanes: result[i] = a[s[i]] else: - result[i] = b[s[i] - S.lanes + result[i] = b[s[i]] - S.lanes return result ``` From dfda738c01852dbde5b83713badd12df049cd316 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 13 Sep 2019 10:58:06 -0700 Subject: [PATCH 052/378] Fix closing bracket --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d69f34b0c2..00e7838a44 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -300,7 +300,7 @@ def S.shuffle(a, b, s): if s[i] < S.lanes: result[i] = a[s[i]] else: - result[i] = b[s[i]] - S.lanes + result[i] = b[s[i] - S.lanes] return result ``` From fb7b68b669b3bb4ac9e866fb8e42b522ede6644f Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Fri, 13 Sep 2019 13:25:42 -0700 Subject: [PATCH 053/378] Add pseudocode for widening and narrowing operations (#105) Clarifies that low lanes are lanes [0, n/2) and high lanes are [n/2, n) and that the order of arguments to the narrowing ops are (low, high). This matches the current implementation in V8. --- proposals/simd/SIMD.md | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 00e7838a44..16277829df 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -808,6 +808,24 @@ will use unsigned saturation to handle overflow, 0x00 or 0xff for i8x16. Regardless of the whether the operation is signed or unsigned, the input lanes are interpreted as signed integers. +```python +def S.narrow_T_s(a, b): + result = S.New() + for i in range(T.Lanes): + result[i] = S.SignedSaturate(a[i]) + for i in range(T.Lanes): + result[T.Lanes + i] = S.SignedSaturate(b[i]) + return result + +def S.narrow_T_u(a, b): + result = S.New() + for i in range(T.Lanes): + result[i] = S.UnsignedSaturate(a[i]) + for i in range(T.Lanes): + result[T.Lanes + i] = S.UnsignedSaturate(b[i]) + return result +``` + ### Integer to integer widening * `i16x8.widen_low_i8x16_s(a: v128) -> v128` * `i16x8.widen_high_i8x16_s(a: v128) -> v128` @@ -820,3 +838,27 @@ are interpreted as signed integers. Converts low or high half of the smaller lane vector to a larger lane vector, sign extended or zero (unsigned) extended. + +```python +def S.widen_low_T(ext, a): + result = S.New() + for i in range(S.Lanes): + result[i] = ext(a[i]) + +def S.widen_high_T(ext, a): + result = S.New() + for i in range(S.Lanes): + result[i] = ext(a[S.Lanes + i]) + +def S.widen_low_T_s(a): + return S.widen_low_T(Sext, a) + +def S.widen_high_T_s(a): + return S.widen_high_T(Sext, a) + +def S.widen_low_T_u(a): + return S.widen_low_T(Zext, a) + +def S.widen_high_T_u(a): + return S.widen_high_T(Zext, a) +``` From 8f2ec1c321c6898336b2d5171ca544157c1e568e Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 13 Sep 2019 13:36:37 -0700 Subject: [PATCH 054/378] Introduce semantics for simple loads and stores --- proposals/simd/SIMD.md | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 16277829df..b4fa674aea 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -665,6 +665,11 @@ natural alignment. Load a `v128` vector from the given heap address. +```python +def S.load(memarg): + return S.New(memory.bytes[memarg.start:memarg.start + 16]) +``` + ### Load and Splat * `v8x16.load_splat(memarg) -> v128` @@ -691,6 +696,11 @@ Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up Store a `v128` vector to the given heap address. +```python +def S.store(memarg, a): + memory.bytes[memarg.start:memarg.start + 16] = S.bytes +``` + ## Floating-point sign bit operations These floating point operations are simple manipulations of the sign bit. No From 34959e01c51e6382906fddb66d7e692bbb09ac8e Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 13 Sep 2019 13:42:10 -0700 Subject: [PATCH 055/378] Add semantics for Load and Splat --- proposals/simd/SIMD.md | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index b4fa674aea..bf40b2df8e 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -679,6 +679,13 @@ def S.load(memarg): Load a single element and splat to all lanes of a `v128` vector. +```python +def S.load_splat(memarg): + result = S.New() + val = memory.bytes[memarg.start:memarg.start + S.LaneBytes]) + for i in range(S.Lanes): + S.bytes[i:i + S.LaneBytes] = val +``` ### Load and Extend * `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane From 8a010fc63352e29487c65db44a354ed5743c86c0 Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 13 Sep 2019 13:57:37 -0700 Subject: [PATCH 056/378] Add semantics to Load and Extend Also fix typo in Load and Splat semantics --- proposals/simd/SIMD.md | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index bf40b2df8e..d111d7dc47 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -685,6 +685,7 @@ def S.load_splat(memarg): val = memory.bytes[memarg.start:memarg.start + S.LaneBytes]) for i in range(S.Lanes): S.bytes[i:i + S.LaneBytes] = val + return result ``` ### Load and Extend @@ -697,6 +698,21 @@ def S.load_splat(memarg): Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. +```python +def S.load_extend(ext, memarg): + result = S.New() + bytes = memory.bytes[memarg.start:memarg.start + 8]) + for i in range(S.Lanes): + result[i] = ext(S.LaneType.from_byte(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)])) + return result + +def S.load_extend_s(memarg): + return S.load_extend(Sext, memarg) + +def S.load_extend_u(memarg): + return S.load_extend(Zext, memarg) +``` + ### Store * `v128.store(memarg, data: v128)` From b36ca0275f14254c3bc799ebef8f8910a744e04d Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Fri, 13 Sep 2019 14:56:51 -0700 Subject: [PATCH 057/378] Update conversion op names (#108) * Update conversion op names This renaming was decided on in https://github.com/WebAssembly/spec/issues/884. --- proposals/simd/BinarySIMD.md | 16 ++++++++-------- proposals/simd/ImplementationStatus.md | 16 ++++++++-------- proposals/simd/SIMD.md | 16 ++++++++-------- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index a9a5897205..77cfa18207 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -157,14 +157,14 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `f64x2.div` | `0xa8`| - | | `f64x2.min` | `0xa9`| - | | `f64x2.max` | `0xaa`| - | -| `i32x4.trunc_s/f32x4:sat` | `0xab`| - | -| `i32x4.trunc_u/f32x4:sat` | `0xac`| - | -| `i64x2.trunc_s/f64x2:sat` | `0xad`| - | -| `i64x2.trunc_u/f64x2:sat` | `0xae`| - | -| `f32x4.convert_s/i32x4` | `0xaf`| - | -| `f32x4.convert_u/i32x4` | `0xb0`| - | -| `f64x2.convert_s/i64x2` | `0xb1`| - | -| `f64x2.convert_u/i64x2` | `0xb2`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xab`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xac`| - | +| `i64x2.trunc_sat_f64x2_s` | `0xad`| - | +| `i64x2.trunc_sat_f64x2_u` | `0xae`| - | +| `f32x4.convert_i32x4_s` | `0xaf`| - | +| `f32x4.convert_i32x4_u` | `0xb0`| - | +| `f64x2.convert_i64x2_s` | `0xb1`| - | +| `f64x2.convert_i64x2_u` | `0xb2`| - | | `v8x16.swizzle` | `0xc0`| - | | `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | | `v8x16.load_splat` | `0xc2`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 3ced5d8618..4409fc35a5 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -134,14 +134,14 @@ | `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_s/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_u/f32x4:sat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_s/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_u/f64x2:sat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_s/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_sat_f64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_sat_f64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_i64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.load8x8_u` | | | | | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 16277829df..c7239b7aa0 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -775,19 +775,19 @@ Lane-wise IEEE `squareRoot`. ## Conversions ### Integer to floating point -* `f32x4.convert_s/i32x4(a: v128) -> v128` -* `f32x4.convert_u/i32x4(a: v128) -> v128` -* `f64x2.convert_s/i64x2(a: v128) -> v128` -* `f64x2.convert_u/i64x2(a: v128) -> v128` +* `f32x4.convert_i32x4_s(a: v128) -> v128` +* `f32x4.convert_i32x4_u(a: v128) -> v128` +* `f64x2.convert_i64x2_s(a: v128) -> v128` +* `f64x2.convert_i64x2_u(a: v128) -> v128` Lane-wise conversion from integer to floating point. Some integer values will be rounded. ### Floating point to integer with saturation -* `i32x4.trunc_s/f32x4:sat(a: v128) -> v128` -* `i32x4.trunc_u/f32x4:sat(a: v128) -> v128` -* `i64x2.trunc_s/f64x2:sat(a: v128) -> v128` -* `i64x2.trunc_u/f64x2:sat(a: v128) -> v128` +* `i32x4.trunc_sat_f32x4_s(a: v128) -> v128` +* `i32x4.trunc_sat_f32x4_u(a: v128) -> v128` +* `i64x2.trunc_sat_f64x2_s(a: v128) -> v128` +* `i64x2.trunc_sat_f64x2_u(a: v128) -> v128` Lane-wise saturating conversion from floating point to integer using the IEEE `convertToIntegerTowardZero` function. If any input lane is a NaN, the From f6144c76c8f19e18e57b348d382f097c9416d9ab Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 13 Sep 2019 16:04:41 -0700 Subject: [PATCH 058/378] Use python `bytes` for binary representation Change semantics for memory operations to use `from_bytes` to get the lane or vector values from byte array (assume that it would work on `S` type). Change `memory.bytes` -> `memory`, use `bytes(a)` as a way to convert a value to a bytestring. --- proposals/simd/SIMD.md | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d111d7dc47..d16c2351c3 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -667,7 +667,7 @@ Load a `v128` vector from the given heap address. ```python def S.load(memarg): - return S.New(memory.bytes[memarg.start:memarg.start + 16]) + return S.from_bytes(memory[memarg.start:memarg.start + 16]) ``` ### Load and Splat @@ -682,9 +682,9 @@ Load a single element and splat to all lanes of a `v128` vector. ```python def S.load_splat(memarg): result = S.New() - val = memory.bytes[memarg.start:memarg.start + S.LaneBytes]) + val = memory[memarg.start:memarg.start + S.LaneBytes]) for i in range(S.Lanes): - S.bytes[i:i + S.LaneBytes] = val + result[i] = S.LaneType.from_bytes(val) return result ``` ### Load and Extend @@ -701,9 +701,9 @@ Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up ```python def S.load_extend(ext, memarg): result = S.New() - bytes = memory.bytes[memarg.start:memarg.start + 8]) + bytes = memory[memarg.start:memarg.start + 8]) for i in range(S.Lanes): - result[i] = ext(S.LaneType.from_byte(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)])) + result[i] = ext(S.LaneType.from_bytes(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)])) return result def S.load_extend_s(memarg): @@ -721,7 +721,7 @@ Store a `v128` vector to the given heap address. ```python def S.store(memarg, a): - memory.bytes[memarg.start:memarg.start + 16] = S.bytes + memory[memarg.start:memarg.start + 16] = bytes(a) ``` ## Floating-point sign bit operations From c6b20dabf1f7c9bb11e7d78a1b39924084c11ad5 Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 13 Sep 2019 16:32:20 -0700 Subject: [PATCH 059/378] Semantics: use S.splat in S.load_splat --- proposals/simd/SIMD.md | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d16c2351c3..d3a309fab9 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -681,12 +681,10 @@ Load a single element and splat to all lanes of a `v128` vector. ```python def S.load_splat(memarg): - result = S.New() val = memory[memarg.start:memarg.start + S.LaneBytes]) - for i in range(S.Lanes): - result[i] = S.LaneType.from_bytes(val) - return result + return S.splat(S.LaneType.from_bytes(val)) ``` + ### Load and Extend * `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane From 5dbd09f81e890808804120b751c03d79516f429a Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Mon, 16 Sep 2019 09:37:23 -0700 Subject: [PATCH 060/378] Clarify Load and Splat --- proposals/simd/SIMD.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d3a309fab9..a419bbc036 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -681,8 +681,8 @@ Load a single element and splat to all lanes of a `v128` vector. ```python def S.load_splat(memarg): - val = memory[memarg.start:memarg.start + S.LaneBytes]) - return S.splat(S.LaneType.from_bytes(val)) + val_bytes = memory[memarg.start:memarg.start + S.LaneBytes]) + return S.splat(S.LaneType.from_bytes(val_bytes)) ``` ### Load and Extend From 7c2cfddf74b20851e0dde397d4a3a76b18c5ce63 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 23 Sep 2019 17:13:03 -0700 Subject: [PATCH 061/378] Reorder extending loads to have signed variants first (#111) This is consistent with the ordering for all other instructions that have signed and unsigned variants. This does renumber these instructions, but no engine or toolchain has documented support for these instructions yet, so that should be ok. --- proposals/simd/BinarySIMD.md | 12 ++++++------ proposals/simd/ImplementationStatus.md | 6 +++--- proposals/simd/SIMD.md | 6 +++--- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 77cfa18207..bf973cf210 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -183,9 +183,9 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.widen_high_i16x8_s` | `0xcf`| - | | `i32x4.widen_low_i16x8_u` | `0xd0`| - | | `i32x4.widen_high_i16x8_u` | `0xd1`| - | -| `i16x8.load8x8_u` | `0xd2`| m:memarg | -| `i16x8.load8x8_s` | `0xd3`| m:memarg | -| `i32x4.load16x4_u` | `0xd4`| m:memarg | -| `i32x4.load16x4_s` | `0xd5`| m:memarg | -| `i64x2.load32x2_u` | `0xd6`| m:memarg | -| `i64x2.load32x2_s` | `0xd7`| m:memarg | +| `i16x8.load8x8_s` | `0xd2`| m:memarg | +| `i16x8.load8x8_u` | `0xd3`| m:memarg | +| `i32x4.load16x4_s` | `0xd4`| m:memarg | +| `i32x4.load16x4_u` | `0xd5`| m:memarg | +| `i64x2.load32x2_s` | `0xd6`| m:memarg | +| `i64x2.load32x2_u` | `0xd7`| m:memarg | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 4409fc35a5..12be744f50 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -144,12 +144,12 @@ | `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load8x8_u` | | | | | | `i16x8.load8x8_s` | | | | | -| `i32x4.load16x4_u` | | | | | +| `i16x8.load8x8_u` | | | | | | `i32x4.load16x4_s` | | | | | -| `i64x2.load32x2_u` | | | | | +| `i32x4.load16x4_u` | | | | | | `i64x2.load32x2_s` | | | | | +| `i64x2.load32x2_u` | | | | | | `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | :heavy_check_mark: | | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index c7239b7aa0..35984004c5 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -676,12 +676,12 @@ Load a single element and splat to all lanes of a `v128` vector. ### Load and Extend -* `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane * `i16x8.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane -* `i32x4.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane +* `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane * `i32x4.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane -* `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane +* `i32x4.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane * `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane +* `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. From b2f7a4c9a63ac179fa3e87cfb5987ed66bcfcd94 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Tue, 10 Sep 2019 10:31:18 -0700 Subject: [PATCH 062/378] ANDNOT operation --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/SIMD.md | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index bf973cf210..19766a5ac5 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -189,3 +189,4 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.load16x4_u` | `0xd5`| m:memarg | | `i64x2.load32x2_s` | `0xd6`| m:memarg | | `i64x2.load32x2_u` | `0xd7`| m:memarg | +| `v128.andnot` | `0xd8`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 12be744f50..eecc5292ad 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -71,6 +71,7 @@ | `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.andnot` | | | | | | `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 35984004c5..6768aba8b5 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -521,6 +521,12 @@ The logical operations defined on the scalar integer types are also available on the `v128` type where they operate bitwise the same way C's `&`, `|`, `^`, and `~` operators work on an `unsigned` type. +### Bitwise AND-NOT + +* `v128.andnot(a: v128, b: v128) -> v128` + +Bitwise AND of bits of `a` and the logical inverse of bits of `b`. This operation is equivalent to `v128.and(a, v128.not(b))`. + ### Bitwise select * `v128.bitselect(v1: v128, v2: v128, c: v128) -> v128` From 2a0eb8215f6a644bd23011842d834cec94acd5cd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 24 Sep 2019 15:05:43 -0700 Subject: [PATCH 063/378] Surface ImplementationStatus.md more publicly (#113) --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 6fb4d7b54e..82945ae4de 100644 --- a/README.md +++ b/README.md @@ -12,6 +12,8 @@ resulted. The [proposed specification](proposals/simd/SIMD.md) has the details. +Note: this proposal is still being worked out, and rate of changes is high, please consult the [implementation status document](proposals/simd/ImplementationStatus.md) to get an idea of the state of implementation across toolchains and embedders. + [Design issue](https://github.com/WebAssembly/proposals/issues/1) From 527d02515f41f5dede8879aabec51899fa6c871f Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Tue, 1 Oct 2019 15:17:01 -0700 Subject: [PATCH 064/378] Update LLVM implementation status (#114) --- proposals/simd/ImplementationStatus.md | 334 +++++++++++++------------ 1 file changed, 168 insertions(+), 166 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index eecc5292ad..ed358e57b5 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,173 +1,175 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | -| ---------------------------|---------------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.load_splat` | | | :heavy_check_mark: | | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v16x8.load_splat` | | | :heavy_check_mark: | | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v32x4.load_splat` | | | :heavy_check_mark: | | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v64x2.load_splat` | | | :heavy_check_mark: | | -| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | | | | | -| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_sat_f64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_sat_f64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_i64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.swizzle` | | | :heavy_check_mark: | | -| `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load8x8_s` | | | | | -| `i16x8.load8x8_u` | | | | | -| `i32x4.load16x4_s` | | | | | -| `i32x4.load16x4_u` | | | | | -| `i64x2.load32x2_s` | | | | | -| `i64x2.load32x2_u` | | | | | -| `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.narrow_i32x4_u` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_low_i8x16_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_high_i8x16_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_low_i8x16_u` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_high_i8x16_u` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_low_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_high_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_low_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_high_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | +| ---------------------------|---------------------------|-----------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v8x16.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v16x8.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v32x4.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v64x2.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.andnot` | `-munimplemented-simd128` | | | | +| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_sat_f64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.trunc_sat_f64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_i64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `v8x16.swizzle` | | | :heavy_check_mark: | | +| `v8x16.shuffle` | `-msimd128`[5] | :white_check_mark:[5] | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load8x8_s` | `-munimplemented-simd128` | | | | +| `i16x8.load8x8_u` | `-munimplemented-simd128` | | | | +| `i32x4.load16x4_s` | `-munimplemented-simd128` | | | | +| `i32x4.load16x4_u` | `-munimplemented-simd128` | | | | +| `i64x2.load32x2_s` | `-munimplemented-simd128` | | | | +| `i64x2.load32x2_u` | `-munimplemented-simd128` | | | | +| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -[1] Tip of tree LLVM as of April 24, 2019 +[1] Tip of tree LLVM as of September 30, 2019 [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` [3] Tip of tree WAVM as of July 10, 2019. Requires flag `--enable prestd-simd` [4] Requires (case-insensitive) flag `-wasmsimd` + +[5] Uses older `v8x16.shuffle` opcode `0xfd 0x03` From e9dc9e7c69d797d1ccb49ae58ba069dd83248e18 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 1 Oct 2019 10:50:52 -0700 Subject: [PATCH 065/378] Update 64x2 instructions A poll was held at CG meeting today, the consensus was for Option 3 of https://github.com/WebAssembly/simd/issues/101. This means we have all the f64x2 instructions, and some of the more common i64x2 that have been benchmarked. This change reflects that option in the proposal text, binary text, and implementation status. Fixes #101. --- proposals/simd/BinarySIMD.md | 3 +-- proposals/simd/ImplementationStatus.md | 3 +-- proposals/simd/SIMD.md | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 19766a5ac5..919dd767b4 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -132,12 +132,11 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.sub` | `0x7c`| - | | `i32x4.mul` | `0x7f`| - | | `i64x2.neg` | `0x84`| - | -| `i64x2.any_true` | `0x85`| - | -| `i64x2.all_true` | `0x86`| - | | `i64x2.shl` | `0x87`| - | | `i64x2.shr_s` | `0x88`| - | | `i64x2.shr_u` | `0x89`| - | | `i64x2.add` | `0x8a`| - | +| `i64x2.mul` | `0x8c`| - | | `i64x2.sub` | `0x8d`| - | | `f32x4.abs` | `0x95`| - | | `f32x4.neg` | `0x96`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index ed358e57b5..fea23d7bf9 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -110,13 +110,12 @@ | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.mul` | | | | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 6768aba8b5..0f13792079 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -369,6 +369,7 @@ def S.sub(a, b): ### Integer multiplication * `i16x8.mul(a: v128, b: v128) -> v128` * `i32x4.mul(a: v128, b: v128) -> v128` +* `i64x2.mul(a: v128, b: v128) -> v128` Lane-wise wrapping integer multiplication: @@ -548,7 +549,6 @@ These operations reduce all the lanes of an integer vector to a single scalar * `i8x16.any_true(a: v128) -> i32` * `i16x8.any_true(a: v128) -> i32` * `i32x4.any_true(a: v128) -> i32` -* `i64x2.any_true(a: v128) -> i32` These functions return 1 if any lane in `a` is non-zero, 0 otherwise. @@ -564,7 +564,6 @@ def S.any_true(a): * `i8x16.all_true(a: v128) -> i32` * `i16x8.all_true(a: v128) -> i32` * `i32x4.all_true(a: v128) -> i32` -* `i64x2.all_true(a: v128) -> i32` These functions return 1 if all lanes in `a` are non-zero, 0 otherwise. From 5aabc6dfc92a86de36c047364aa2de21e8065f24 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 4 Oct 2019 10:21:00 -0700 Subject: [PATCH 066/378] Update i64x2.mul opcode --- proposals/simd/BinarySIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 919dd767b4..4f0d890419 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -136,7 +136,7 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i64x2.shr_s` | `0x88`| - | | `i64x2.shr_u` | `0x89`| - | | `i64x2.add` | `0x8a`| - | -| `i64x2.mul` | `0x8c`| - | +| `i64x2.mul` | `0x90`| - | | `i64x2.sub` | `0x8d`| - | | `f32x4.abs` | `0x95`| - | | `f32x4.neg` | `0x96`| - | From 277738f5fd094cc3118064a93be02a03f8c83716 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 4 Oct 2019 10:27:46 -0700 Subject: [PATCH 067/378] Fix ordering --- proposals/simd/BinarySIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 4f0d890419..8617d725d2 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -136,8 +136,8 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i64x2.shr_s` | `0x88`| - | | `i64x2.shr_u` | `0x89`| - | | `i64x2.add` | `0x8a`| - | -| `i64x2.mul` | `0x90`| - | | `i64x2.sub` | `0x8d`| - | +| `i64x2.mul` | `0x90`| - | | `f32x4.abs` | `0x95`| - | | `f32x4.neg` | `0x96`| - | | `f32x4.sqrt` | `0x97`| - | From e99a8504f2acfb132fa5038f357d60df97a14a55 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Sat, 19 Oct 2019 09:28:31 +0800 Subject: [PATCH 068/378] Integrate latest spec tests from WAVM Tests have been verified through WAVM CI. --- test/core/simd/meta/README.md | 9 + test/core/simd/meta/gen_tests.py | 14 +- test/core/simd/meta/simd.py | 27 +- test/core/simd/meta/simd_arithmetic.py | 416 ++ test/core/simd/meta/simd_bitwise.py | 402 ++ test/core/simd/meta/simd_f32x4.py | 489 ++ test/core/simd/meta/simd_f32x4_arith.py | 377 ++ test/core/simd/meta/simd_f64x2_cmp.py | 314 + test/core/simd/meta/simd_i16x8_arith.py | 158 + test/core/simd/meta/simd_i32x4_arith.py | 158 + test/core/simd/meta/simd_i8x16_arith.py | 148 + test/core/simd/meta/simd_sat_arith.py | 421 ++ test/core/simd/meta/test_assert.py | 10 +- test/core/simd/simd_bit_shift.wast | 943 +++ test/core/simd/simd_bitwise.wast | 566 ++ test/core/simd/simd_boolean.wast | 950 +++ test/core/simd/simd_conversions.wast | 1156 ++++ test/core/simd/simd_f32x4.wast | 2430 +++++++ test/core/simd/simd_f32x4_arith.wast | 4441 ++++++++++++ test/core/simd/simd_f64x2_cmp.wast | 7788 ++++++++++++++++++++++ test/core/simd/simd_i16x8_arith.wast | 557 ++ test/core/simd/simd_i16x8_sat_arith.wast | 627 ++ test/core/simd/simd_i32x4_arith.wast | 557 ++ test/core/simd/simd_i8x16_arith.wast | 383 ++ test/core/simd/simd_i8x16_sat_arith.wast | 651 ++ test/core/simd/simd_lane.wast | 210 +- test/core/simd/simd_load.wast | 16 +- test/core/simd/simd_load_splat.wast | 220 + test/core/simd/simd_splat.wast | 145 +- 29 files changed, 24519 insertions(+), 64 deletions(-) create mode 100644 test/core/simd/meta/simd_arithmetic.py create mode 100644 test/core/simd/meta/simd_bitwise.py create mode 100644 test/core/simd/meta/simd_f32x4.py create mode 100644 test/core/simd/meta/simd_f32x4_arith.py create mode 100644 test/core/simd/meta/simd_f64x2_cmp.py create mode 100644 test/core/simd/meta/simd_i16x8_arith.py create mode 100644 test/core/simd/meta/simd_i32x4_arith.py create mode 100644 test/core/simd/meta/simd_i8x16_arith.py create mode 100644 test/core/simd/meta/simd_sat_arith.py create mode 100644 test/core/simd/simd_bit_shift.wast create mode 100644 test/core/simd/simd_bitwise.wast create mode 100644 test/core/simd/simd_boolean.wast create mode 100644 test/core/simd/simd_conversions.wast create mode 100644 test/core/simd/simd_f32x4.wast create mode 100644 test/core/simd/simd_f32x4_arith.wast create mode 100644 test/core/simd/simd_f64x2_cmp.wast create mode 100644 test/core/simd/simd_i16x8_arith.wast create mode 100644 test/core/simd/simd_i16x8_sat_arith.wast create mode 100644 test/core/simd/simd_i32x4_arith.wast create mode 100644 test/core/simd/simd_i8x16_arith.wast create mode 100644 test/core/simd/simd_i8x16_sat_arith.wast create mode 100644 test/core/simd/simd_load_splat.wast diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index 74caa18a4e..d4c202994a 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -7,6 +7,15 @@ Currently it only support following simd test files generation. - 'simd_i16x8_cmp.wast' - 'simd_i32x4_cmp.wast' - 'simd_f32x4_cmp.wast' +- 'simd_f64x2_cmp.wast' +- 'simd_i8x16_arith.wast' +- 'simd_i16x8_arith.wast' +- 'simd_i32x4_arith.wast' +- 'simd_f32x4_arith.wast' +- 'simd_bitwise.wast' +- 'simd_i8x16_sat_arith.wast' +- 'simd_i16x8_sat_arith.wast' +- 'simd_f32x4.wast' Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 1df5b11eba..b9f17a7409 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -13,6 +13,14 @@ 'simd_i16x8_cmp', 'simd_i32x4_cmp', 'simd_f32x4_cmp', + 'simd_f64x2_cmp', + 'simd_i8x16_arith', + 'simd_i16x8_arith', + 'simd_i32x4_arith', + 'simd_f32x4_arith', + 'simd_sat_arith', + 'simd_bitwise', + 'simd_f32x4', ) @@ -24,6 +32,10 @@ def gen_group_tests(mod_name): def main(): + """ + Default program entry + """ + parser = argparse.ArgumentParser( description='Front-end script to call other modules to generate SIMD tests') parser.add_argument('-a', '--all', dest='gen_all', action='store_true', @@ -44,4 +56,4 @@ def main(): if __name__ == '__main__': main() - print('Done.') + print('Done.') \ No newline at end of file diff --git a/test/core/simd/meta/simd.py b/test/core/simd/meta/simd.py index 43e805b9df..3c2784d715 100644 --- a/test/core/simd/meta/simd.py +++ b/test/core/simd/meta/simd.py @@ -1,5 +1,4 @@ #!/usr/bin/env python3 -# -*- coding: utf-8 -*- """ This python file is a tool class for SIMD and @@ -9,13 +8,31 @@ class SIMD(object): + # Constant template + CONST = '({}.const {})' + # v128 Constant template V128_CONST = '(v128.const {} {})' - # Params: - # val: constant data, string or list, - # lane_type: lane type, [i8x16, i16x8, i32x4, f32x4] + def const(self, val, lane_type): + """ + generation constant data, [e.g. i32, i64, f32, f64] + Params: + val: constant data, string or list, + lane_type: lane type, [i32, i64, f32, f64] + """ + return self.CONST.format(lane_type, ''.join(val)) + def v128_const(self, val, lane_type): + """ + generation v128 constant data, [e.g. i8x16, i16x8, i32x4, f32x4] + Params: + val: constant data, string or list, + lane_type: lane type, [e.g. i8x16, i16x8, i32x4, f32x4] + """ + + if lane_type.lower().find('x') == -1: + return self.const(val, lane_type) lane_cnt = int(lane_type[1:].split('x')[1]) @@ -63,4 +80,4 @@ def v128_const(self, val, lane_type): data_elem = ' '.join(data_elem) # Returns v128 constant text - return self.V128_CONST.format(lane_type, data_elem) + return self.V128_CONST.format(lane_type, data_elem) \ No newline at end of file diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py new file mode 100644 index 0000000000..ea349238ee --- /dev/null +++ b/test/core/simd/meta/simd_arithmetic.py @@ -0,0 +1,416 @@ +#!/usr/bin/env python3 + +"""Base class for generating cases integer and floating-point numbers +arithmetic and saturate arithmetic operations. + +Class SimdArithmeticCase is the base class of all kinds of arithmetic +operation cases. It provides a skeleton to generate the normal, invalid and +combined cases. Subclasses only provide the test data sets. In some special +cases, you may need to override the methods in base class to fulfill your +case generation. + +Class LaneNumber and ArithmeticOp are used for calculating the results of +these arithmetic and saturate arithmetic operations. +""" + +from simd import SIMD +from test_assert import AssertReturn + + +class LaneNumber: + """This class stands for the number represented by a line in v128. + Suppose a bit length of the lane is n, then: + For signed integer: + minimum = -pow(2, n - 1), maximum = pow(2, n - 1) - 1 + For unsigned integer: + minimum = 0, maximum = pow(2, n) - 1 + The bit length of the lane can be 8, 16, 32, 64""" + def __init__(self, length): + """length: bit number of each lane in SIMD v128""" + self.lane_len = length + + @property + def min(self): + return -pow(2, self.lane_len - 1) + + @property + def max(self): + return pow(2, self.lane_len - 1) - 1 + + @property + def mask(self): + return pow(2, self.lane_len) - 1 + + @property + def mod(self): + return pow(2, self.lane_len) + + @property + def quarter(self): + return pow(2, self.lane_len - 2) + + +i8 = LaneNumber(8) +i16 = LaneNumber(16) +i32 = LaneNumber(32) +i64 = LaneNumber(64) + + +class ArithmeticOp: + """This class stands for an SIMD integer operator, with one or + more operands. The methods are some kind of arithmetic with the + operands. + """ + def __init__(self, op): + self.op = op + + @staticmethod + def get_valid_lane(value, lane): + """Get the valid integer number of value in the specified lane size. + """ + value &= lane.mask + if value > lane.max: + return value - lane.mod + if value < lane.min: + return value + lane.mod + return value + + def saturate(self, p1, p2, lane): + """Get the result of saturate arithmetic operation of 2 operands. + Supports both signed and unsigned number. + """ + if self.op.endswith('saturate_s'): + if p1 > lane.max: + p1 -= lane.mod + if p2 > lane.max: + p2 -= lane.mod + + if self.op.startswith('add'): + value = p1 + p2 + if self.op.startswith('sub'): + value = p1 - p2 + + if value > lane.max: + return lane.max + if value < lane.min: + return lane.min + + if self.op.endswith('saturate_u'): + if p1 < 0: + p1 += lane.mod + if p2 < 0: + p2 += lane.mod + if self.op.startswith('add'): + value = p1 + p2 + if self.op.startswith('sub'): + value = p1 - p2 + + if value > lane.mask: + return lane.mask + if value < 0: + return 0 + + return value + + def unary_op(self, p, lane): + """General unary arithmetic operation.""" + if isinstance(p, str) and '0x' in p: + p = int(p, base=16) + if self.op == 'neg': + value = -p + return self.get_valid_lane(value, lane) + + def binary_op(self, p1, p2, lane, float_repr=False): + """General binary arithmetic operation for 2 numbers.""" + if isinstance(p1, str) and '0x' in p1: + p1 = int(p1, base=16) + if isinstance(p2, str) and '0x' in p2: + p2 = int(p2, base=16) + + if float_repr: + p2 &= lane.mask + + if self.op == 'add': + value = (p1 + p2) + elif self.op == 'sub': + value = (p1 - p2) + elif self.op == 'mul': + value = (p1 * p2) + elif 'saturate' in self.op: + return self.saturate(p1, p2, lane) + else: + raise Exception('Unsupported operator: %s' % self.op) + + return self.get_valid_lane(value, lane) + + +class SimdArithmeticCase: + + UNARY_OPS = ('neg',) + BINARY_OPS = ('add', 'sub', 'mul') + LANE_NUMBER = {'i8x16': i8, 'i16x8': i16, 'i32x4': i32, 'i64x2': i64} + + def __str__(self): + return self.get_all_cases() + + @property + def lane(self): + return self.LANE_NUMBER.get(self.LANE_TYPE) + + @property + def normal_unary_op_test_data(self): + lane = self.lane + return [0, 1, -1, lane.max - 1, lane.min + 1, lane.min, lane.max, lane.mask] + + @property + def normal_binary_op_test_data(self): + lane = self.lane + return [ + (0, 0), + (0, 1), + (1, 1), + (0, -1), + (1, -1), + (-1, -1), + (lane.quarter - 1, lane.quarter), + (lane.quarter, lane.quarter), + (-lane.quarter + 1, -lane.quarter), + (-lane.quarter, -lane.quarter), + (-lane.quarter - 1, -lane.quarter), + (lane.max - 2, 1), + (lane.max - 1, 1), + (-lane.min, 1), + (lane.min + 2, -1), + (lane.min + 1, -1), + (lane.min, -1), + (lane.max, lane.max), + (lane.min, lane.min), + (lane.min, lane.min + 1), + (lane.mask, 0), + (lane.mask, 1), + (lane.mask, -1), + (lane.mask, lane.max), + (lane.mask, lane.min), + (lane.mask, lane.mask) + ] + + @property + def bin_test_data(self): + return [ + (self.normal_binary_op_test_data, [self.LANE_TYPE] * 3), + (self.hex_binary_op_test_data, [self.LANE_TYPE] * 3) + ] + + @property + def unary_test_data(self): + return [ + (self.normal_unary_op_test_data, [self.LANE_TYPE] * 2), + (self.hex_unary_op_test_data, [self.LANE_TYPE] * 2) + ] + + @property + def combine_ternary_arith_test_data(self): + return { + 'add-sub': [ + [str(i) for i in range(self.LANE_LEN)], + [str(i * 2) for i in range(self.LANE_LEN)], + [str(i * 2) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)] + ], + 'sub-add': [ + [str(i) for i in range(self.LANE_LEN)], + [str(i * 2) for i in range(self.LANE_LEN)], + [str(i * 2) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)] + ], + 'mul-add': [ + [str(i) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)], + ['2'] * self.LANE_LEN, + [str(i * 4) for i in range(self.LANE_LEN)] + ], + 'mul-sub': [ + [str(i * 2) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)], + [str(pow(i, 2)) for i in range(self.LANE_LEN)] + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'add-neg': [ + [str(i) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)], + ['0'] * self.LANE_LEN + ], + 'sub-neg': [ + [str(i) for i in range(self.LANE_LEN)], + [str(i) for i in range(self.LANE_LEN)], + [str(-i * 2) for i in range(self.LANE_LEN)] + ], + 'mul-neg': [ + [str(i) for i in range(self.LANE_LEN)], + ['2'] * self.LANE_LEN, + [str(-i * 2) for i in range(self.LANE_LEN)] + ] + } + + def gen_test_fn_template(self): + template = [ + ';; Tests for {} arithmetic operations on major boundary values and all special values.\n\n'.format( + self.LANE_TYPE), '(module'] + + for op in self.BINARY_OPS: + template.append(' (func (export "{lane_type}.%s") (param v128 v128) (result v128) ' + '({lane_type}.%s (local.get 0) (local.get 1)))' % (op, op)) + for op in self.UNARY_OPS: + template.append(' (func (export "{lane_type}.%s") (param v128) (result v128) ' + '({lane_type}.%s (local.get 0)))' % (op, op)) + + template.append(')\n') + return template + + def gen_test_template(self): + template = self.gen_test_fn_template() + + template.append('{normal_cases}') + template.append('\n{invalid_cases}') + template.append('\n{combine_cases}') + + return '\n'.join(template) + + def get_case_data(self): + case_data = [] + + # i8x16.op (i8x16) (i8x16) + for op in self.BINARY_OPS: + o = ArithmeticOp(op) + op_name = self.LANE_TYPE + '.' + op + case_data.append(['#', op_name]) + for data_group, v128_forms in self.bin_test_data: + for data in data_group: + case_data.append([op_name, [str(data[0]), str(data[1])], + str(o.binary_op(data[0], data[1], self.lane)), + v128_forms]) + for data_group in self.full_bin_test_data: + for data in data_group.get(op_name): + case_data.append([op_name, *data]) + + for op in self.UNARY_OPS: + o = ArithmeticOp(op) + op_name = self.LANE_TYPE + '.' + op + case_data.append(['#', op_name]) + for data_group, v128_forms in self.unary_test_data: + for data in data_group: + case_data.append([op_name, [str(data)], + str(o.unary_op(data, self.lane)), + v128_forms]) + + return case_data + + def get_invalid_cases(self): + invalid_cases = [';; type check'] + unary_template = '(assert_invalid (module (func (result v128) '\ + '({}.{} ({})))) "type mismatch")' + binary_template = '(assert_invalid (module (func (result v128) '\ + '({}.{} ({}) ({})))) "type mismatch")' + + for op in self.UNARY_OPS: + invalid_cases.append(unary_template.format(self.LANE_TYPE, op, + 'i32.const 0')) + for op in self.BINARY_OPS: + invalid_cases.append(binary_template.format(self.LANE_TYPE, op, + 'i32.const 0', + 'f32.const 0.0')) + + return '\n'.join(invalid_cases) + + def get_combine_cases(self): + combine_cases = [';; combination\n(module'] + ternary_fn_template = ' (func (export "{fn}") (param v128 v128 v128) (result v128)\n' \ + ' ({lane}.{op1} ({lane}.{op2} (local.get 0) (local.get 1))'\ + '(local.get 2)))' + for fn_name in sorted(self.combine_ternary_arith_test_data): + fn_parts = fn_name.split('-') + combine_cases.append(ternary_fn_template.format(fn=fn_name, + lane=self.LANE_TYPE, + op1=fn_parts[0], + op2=fn_parts[1])) + binary_fn_template = ' (func (export "{fn}") (param v128 v128) (result v128)\n'\ + ' ({lane}.{op1} ({lane}.{op2} (local.get 0)) (local.get 1)))' + for fn_name in sorted(self.combine_binary_arith_test_data): + fn_parts = fn_name.split('-') + combine_cases.append(binary_fn_template.format(fn=fn_name, + lane=self.LANE_TYPE, + op1=fn_parts[0], + op2=fn_parts[1])) + combine_cases.append(')\n') + ternary_case_template = ('(assert_return (invoke "{}" ', + '(v128.const {} {})', + '(v128.const {} {})', + '(v128.const {} {}))', + '(v128.const {} {}))') + for fn_name, test in sorted(self.combine_ternary_arith_test_data.items()): + line_head = ternary_case_template[0].format(fn_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + combine_cases.append('\n'.join([ + line_head + ternary_case_template[1].format( + self.LANE_TYPE, ' '.join(test[0])), + blank_head + ternary_case_template[2].format( + self.LANE_TYPE, ' '.join(test[1])), + blank_head + ternary_case_template[3].format( + self.LANE_TYPE, ' '.join(test[2])), + blank_head + ternary_case_template[4].format( + self.LANE_TYPE, ' '.join(test[3]))])) + binary_case_template = ('(assert_return (invoke "{}" ', + '(v128.const {} {})', + '(v128.const {} {}))', + '(v128.const {} {}))') + for fn_name, test in sorted(self.combine_binary_arith_test_data.items()): + line_head = binary_case_template[0].format(fn_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + combine_cases.append('\n'.join([ + line_head + binary_case_template[1].format( + self.LANE_TYPE, ' '.join(test[0])), + blank_head + binary_case_template[2].format( + self.LANE_TYPE, ' '.join(test[1])), + blank_head + binary_case_template[3].format( + self.LANE_TYPE, ' '.join(test[2]))])) + return '\n'.join(combine_cases) + + def get_normal_case(self): + s = SIMD() + case_data = self.get_case_data() + cases = [] + + for item in case_data: + # Recognize '#' as a commentary + if item[0] == '#': + cases.append('\n;; {}'.format(item[1])) + continue + + instruction, param, ret, lane_type = item + v128_result = s.v128_const(ret, lane_type[-1]) + v128_params = [] + for i, p in enumerate(param): + v128_params.append(s.v128_const(p, lane_type[i])) + cases.append(str(AssertReturn(instruction, v128_params, v128_result))) + + return '\n'.join(cases) + + def get_all_cases(self): + case_data = {'lane_type': self.LANE_TYPE, + 'normal_cases': self.get_normal_case(), + 'invalid_cases': self.get_invalid_cases(), + 'combine_cases': self.get_combine_cases() + } + return self.gen_test_template().format(**case_data) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}_arith.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) \ No newline at end of file diff --git a/test/core/simd/meta/simd_bitwise.py b/test/core/simd/meta/simd_bitwise.py new file mode 100644 index 0000000000..f4563453cb --- /dev/null +++ b/test/core/simd/meta/simd_bitwise.py @@ -0,0 +1,402 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating bitwise test cases +""" + +from simd import SIMD +from test_assert import AssertReturn + + +class SimdBitWise(SIMD): + """ + Generate common tests + """ + + # Test case template + CASE_TXT = """;; Test all the bitwise operators on major boundary values and all special values. + +(module + (func (export "not") (param $0 v128) (result v128) (v128.not (local.get $0))) + (func (export "and") (param $0 v128) (param $1 v128) (result v128) (v128.and (local.get $0) (local.get $1))) + (func (export "or") (param $0 v128) (param $1 v128) (result v128) (v128.or (local.get $0) (local.get $1))) + (func (export "xor") (param $0 v128) (param $1 v128) (result v128) (v128.xor (local.get $0) (local.get $1))) + (func (export "bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (v128.bitselect (local.get $0) (local.get $1) (local.get $2)) + ) +) +{normal_case}""" + + @staticmethod + def init_case_data(case_data): + """ + Rearrange const data into standard format + e.g. [0][i32x4] => (v128.const i32x4 0 0 0 0) + [0][i32] => (i32.const 0) + """ + + s_i = SIMD() + + lst_i_p_r = [] + + for item in case_data: + # Recognize '#' as a commentary + if item[0] == '#': + comment = '\n' if len(item[1]) == 0 else '\n;; {}'.format(item[1]) + lst_i_p_r.append(['#', comment]) + continue + + # Params: instruction: instruction name; + # params: param for instruction; + # rets: excepted result; + # lane_type: lane type for param and ret + instruction, params, rets, lane_type = item + + p_const_list = [] + for idx, param in enumerate(params): + p_const_list.append(s_i.v128_const(param, lane_type[idx])) + + r_const_list = [] + for idx, ret in enumerate(rets): + r_const_list.append(s_i.v128_const(ret, lane_type[idx + len(params)])) + + lst_i_p_r.append([instruction, p_const_list, r_const_list]) + + return lst_i_p_r + + # Generate normal case with test datas + def get_normal_case(self): + """ + Generate normal case with test data + """ + + lst_i_p_r = self.init_case_data(self.get_case_data()) + + cases = [] + for ipr in lst_i_p_r: + + if ipr[0] == '#': + cases.append(ipr[1]) + continue + + cases.append(str(AssertReturn(ipr[0], + ipr[1], + ipr[2]))) + + return '\n'.join(cases) + + def get_invalid_case(self): + """ + Generate invalid case with test data + """ + + case_data = [ + # i8x16 + ['#', 'Type check'], + ['#', ''], + + ['#', 'not'], + ["v128.not", ['0'], [], ['i32']], + + ['#', 'and'], + ["v128.and", ['0', '0'], [], ['i32', 'i32x4']], + ["v128.and", ['0', '0'], [], ['i32x4', 'i32']], + ["v128.and", ['0', '0'], [], ['i32', 'i32']], + + ['#', 'or'], + ["v128.or", ['0', '0'], [], ['i32', 'i32x4']], + ["v128.or", ['0', '0'], [], ['i32x4', 'i32']], + ["v128.or", ['0', '0'], [], ['i32', 'i32']], + + ['#', 'xor'], + ["v128.xor", ['0', '0'], [], ['i32', 'i32x4']], + ["v128.xor", ['0', '0'], [], ['i32x4', 'i32']], + ["v128.xor", ['0', '0'], [], ['i32', 'i32']], + + ['#', 'bitselect'], + ["v128.bitselect", ['0', '0', '0'], [], ['i32', 'i32x4', 'i32x4']], + ["v128.bitselect", ['0', '0', '0'], [], ['i32x4', 'i32x4', 'i32']], + ["v128.bitselect", ['0', '0', '0'], [], ['i32', 'i32', 'i32']] + ] + + lst_ipr = self.init_case_data(case_data) + + str_invalid_case_func_tpl = '\n(assert_invalid (module (func (result v128)' \ + ' ({} {}))) "type mismatch")' + + lst_invalid_case_func = [] + + for ipr in lst_ipr: + + if ipr[0] == '#': + lst_invalid_case_func.append(ipr[1]) + continue + else: + lst_invalid_case_func.append( + str_invalid_case_func_tpl.format(ipr[0], ' '.join(ipr[1])) + ) + + return '\n{}\n'.format(''.join(lst_invalid_case_func)) + + def get_combination_case(self): + """ + Generate combination case with test data + """ + + str_in_block_case_func_tpl = '\n (func (export "{}-in-block")' \ + '\n (block' \ + '\n (drop' \ + '\n (block (result v128)' \ + '\n ({}' \ + '{}' \ + '\n )' \ + '\n )' \ + '\n )' \ + '\n )' \ + '\n )' + str_nested_case_func_tpl = '\n (func (export "nested-{}")' \ + '\n (drop' \ + '\n ({}' \ + '{}' \ + '\n )' \ + '\n )' \ + '\n )' + + case_data = [ + ["v128.not", ['0'], [], ['i32']], + ["v128.and", ['0', '1'], [], ['i32', 'i32']], + ["v128.or", ['0', '1'], [], ['i32', 'i32']], + ["v128.xor", ['0', '1'], [], ['i32', 'i32']], + ["v128.bitselect", ['0', '1', '2'], [], ['i32', 'i32', 'i32']], + ] + lst_ipr = self.init_case_data(case_data) + + lst_in_block_case_func = [] + lst_nested_case_func = [] + lst_in_block_case_assert = [] + lst_nested_case_assert = [] + + for ipr in lst_ipr: + + lst_block = ['\n (block (result v128) (v128.load {}))'.format(x) for x in ipr[1]] + lst_in_block_case_func.append( + str_in_block_case_func_tpl.format(ipr[0], ipr[0], ''.join(lst_block)) + ) + + tpl_1 = '\n ({}' \ + '{}' \ + '\n )' + tpl_2 = '\n ({}' \ + '{}' \ + '\n )' + tpl_3 = '\n (v128.load {})' + + lst_tpl_3 = [tpl_3.format(x) for x in ipr[1]] + lst_tpl_2 = [tpl_2.format(ipr[0], ''.join(lst_tpl_3))] * len(ipr[1]) + lst_tpl_1 = [tpl_1.format(ipr[0], ''.join(lst_tpl_2))] * len(ipr[1]) + + lst_nested_case_func.append( + str_nested_case_func_tpl.format(ipr[0], ipr[0], ''.join(lst_tpl_1)) + ) + + lst_in_block_case_assert.append('\n(assert_return (invoke "{}-in-block"))'.format(ipr[0])) + lst_nested_case_assert.append('\n(assert_return (invoke "nested-{}"))'.format(ipr[0])) + + return '\n;; Combination\n' \ + '\n(module (memory 1)' \ + '{}' \ + '{}' \ + '\n (func (export "as-param")' \ + '\n (drop' \ + '\n (v128.or' \ + '\n (v128.and' \ + '\n (v128.not' \ + '\n (v128.load (i32.const 0))' \ + '\n )' \ + '\n (v128.not' \ + '\n (v128.load (i32.const 1))' \ + '\n )' \ + '\n )' \ + '\n (v128.xor' \ + '\n (v128.bitselect' \ + '\n (v128.load (i32.const 0))' \ + '\n (v128.load (i32.const 1))' \ + '\n (v128.load (i32.const 2))' \ + '\n )' \ + '\n (v128.bitselect' \ + '\n (v128.load (i32.const 0))' \ + '\n (v128.load (i32.const 1))' \ + '\n (v128.load (i32.const 2))' \ + '\n )' \ + '\n )' \ + '\n )' \ + '\n )' \ + '\n )' \ + '\n)' \ + '{}' \ + '{}' \ + '\n(assert_return (invoke "as-param"))\n'.format(''.join(lst_in_block_case_func), + ''.join(lst_nested_case_func), + ''.join(lst_in_block_case_assert), + ''.join(lst_nested_case_assert)) + + def get_all_cases(self): + """ + generate all test cases + """ + + case_data = {'normal_case': self.get_normal_case()} + + # Add tests for unkonow operators for i32x4 + return self.CASE_TXT.format(**case_data) + self.get_invalid_case() + self.get_combination_case() + + def get_case_data(self): + """ + Overload base class method and set test data for bitwise. + """ + return [ + # i32x4 + ['#', 'i32x4'], + ["not", ['0'], ['-1'], ['i32x4', 'i32x4']], + ["not", ['-1'], ['0'], ['i32x4', 'i32x4']], + ["not", [['-1', '0', '-1', '0']], [['0', '-1', '0', '-1']], ['i32x4', 'i32x4']], + ["not", [['0', '-1', '0', '-1']], [['-1', '0', '-1', '0']], ['i32x4', 'i32x4']], + ["not", ['0x55555555'], ['0xAAAAAAAA'], ['i32x4', 'i32x4']], + ["not", ['3435973836'], ['858993459'], ['i32x4', 'i32x4']], + ["and", [['0', '-1'], ['0', '-1', '0', '-1']], [['0', '0', '0', '-1']], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0', '-1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0', '0xFFFFFFFF'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['1', '1'], ['1'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['255', '85'], ['85'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['255', '128'], ['128'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['2863311530', ['10', '128', '5', '165']], [['10', '128', '0', '160']], + ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0xFFFFFFFF', '0x55555555'], ['0x55555555'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0xFFFFFFFF', '0xAAAAAAAA'], ['0xAAAAAAAA'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0xFFFFFFFF', '0x0'], ['0x0'], ['i32x4', 'i32x4', 'i32x4']], + ["and", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], ['0x5555'], + ['i32x4', 'i32x4', 'i32x4']], + ["or", [['0', '0', '-1', '-1'], ['0', '-1', '0', '-1']], [['0', '-1', '-1', '-1']], + ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0', '-1'], ['-1'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0', '0xFFFFFFFF'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['1', '1'], ['1'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['255', '85'], ['255'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['255', '128'], ['255'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['2863311530', ['10', '128', '5', '165']], [['2863311530', '2863311535']], + ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0xFFFFFFFF', '0x55555555'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0xFFFFFFFF', '0xAAAAAAAA'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0xFFFFFFFF', '0x0'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["or", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], + [['0x55555555', '0x5555ffff', '0x555555ff', '0x55555fff']], + ['i32x4', 'i32x4', 'i32x4']], + ["xor", [['0', '0', '-1', '-1'], ['0', '-1', '0', '-1']], [['0', '-1', '-1', '0']], + ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0', '-1'], ['-1'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0', '0xFFFFFFFF'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['1', '1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['255', '85'], ['170'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['255', '128'], ['127'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['2863311530', ['10', '128', '5', '165']], + [['2863311520', '2863311402', '2863311535', '2863311375']], + ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0xFFFFFFFF', '0x55555555'], ['0xAAAAAAAA'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0xFFFFFFFF', '0xAAAAAAAA'], ['0x55555555'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0xFFFFFFFF', '0x0'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["xor", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], + [['0x55550000', '0x5555AAAA', '0x555500AA', '0x55550AAA']], + ['i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0xBBBBBBBB', + ['0x00112345', '0xF00FFFFF', '0x10112021', '0xBBAABBAA']], + [['0xBBAABABA', '0xABBAAAAA', '0xABAABBBA', '0xAABBAABB']], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0xBBBBBBBB', '0x00000000'], ['0xBBBBBBBB'], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0xBBBBBBBB', '0x11111111'], ['0xAAAAAAAA'], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0xBBBBBBBB', + ['0x01234567', '0x89ABCDEF', '0xFEDCBA98', '0x76543210']], + [['0xBABABABA', '0xABABABAB']], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0x55555555', + ['0x01234567', '0x89ABCDEF', '0xFEDCBA98', '0x76543210']], + [['0x54761032', '0xDCFE98BA', '0xAB89EFCD', '0x23016745']], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["bitselect", ['0xAAAAAAAA', '0x55555555', + ['0x55555555', '0xAAAAAAAA', '0x00000000', '0xFFFFFFFF']], + [['0x00000000', '0xFFFFFFFF', '0x55555555', '0xAAAAAAAA']], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + + ['#', 'for float special data [e.g. -nan nan -inf inf]'], + ["not", ['-nan'], ['5.87747e-39'], ['f32x4', 'f32x4']], + ["not", ['nan'], ['-5.87747e-39'], ['f32x4', 'f32x4']], + ["not", ['-inf'], ['0x007fffff'], ['f32x4', 'i32x4']], + ["not", ['inf'], ['0x807fffff'], ['f32x4', 'i32x4']], + + ["and", ['-nan', '-nan'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["and", ['-nan', 'nan'], ['nan'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['-nan', '-inf'], ['-inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['-nan', 'inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['nan', 'nan'], ['nan'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['nan', '-inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['nan', 'inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['-inf', '-inf'], ['-inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['-inf', 'inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + ["and", ['inf', 'inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + + ["or", ['-nan', '-nan'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["or", ['-nan', 'nan'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["or", ['-nan', '-inf'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["or", ['-nan', 'inf'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["or", ['nan', 'nan'], ['nan'], ['f32x4', 'f32x4', 'f32x4']], + ["or", ['nan', '-inf'], ['0xffc00000'], ['f32x4', 'f32x4', 'i32x4']], + ["or", ['nan', 'inf'], ['nan'], ['f32x4', 'f32x4', 'f32x4']], + ["or", ['-inf', '-inf'], ['-inf'], ['f32x4', 'f32x4', 'f32x4']], + ["or", ['-inf', 'inf'], ['-inf'], ['f32x4', 'f32x4', 'f32x4']], + ["or", ['inf', 'inf'], ['inf'], ['f32x4', 'f32x4', 'f32x4']], + + ["xor", ['-nan', '-nan'], ['0'], ['f32x4', 'f32x4', 'f32x4']], + ["xor", ['-nan', 'nan'], ['-0'], ['f32x4', 'f32x4', 'f32x4']], + ["xor", ['-nan', '-inf'], ['0x00400000'], ['f32x4', 'f32x4', 'i32x4']], + ["xor", ['-nan', 'inf'], ['0x80400000'], ['f32x4', 'f32x4', 'i32x4']], + ["xor", ['nan', 'nan'], ['0'], ['f32x4', 'f32x4', 'f32x4']], + ["xor", ['nan', '-inf'], ['0x80400000'], ['f32x4', 'f32x4', 'i32x4']], + ["xor", ['nan', 'inf'], ['0x00400000'], ['f32x4', 'f32x4', 'i32x4']], + ["xor", ['-inf', '-inf'], ['0'], ['f32x4', 'f32x4', 'f32x4']], + ["xor", ['-inf', 'inf'], ['0x80000000'], ['f32x4', 'f32x4', 'i32x4']], + ["xor", ['inf', 'inf'], ['0'], ['f32x4', 'f32x4', 'f32x4']], + + ["bitselect", ['-nan', '-nan','0xA5A5A5A5'], ['0xffc00000'], ['f32x4', 'f32x4', 'f32x4', 'i32x4']], + ["bitselect", ['-nan', 'nan','0xA5A5A5A5'], ['nan'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['-nan', '-inf','0xA5A5A5A5'], ['-inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['-nan', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['nan', 'nan','0xA5A5A5A5'], ['nan'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['nan', '-inf','0xA5A5A5A5'], ['-inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['nan', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['-inf', '-inf','0xA5A5A5A5'], ['-inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['-inf', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + ["bitselect", ['inf', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']] + ] + + def gen_test_cases(self): + """ + Generate test case file + """ + with open('../simd_bitwise.wast', 'w+') as f_out: + f_out.write(self.get_all_cases()) + + +def gen_test_cases(): + """ + Generate test case file + """ + bit_wise = SimdBitWise() + bit_wise.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py new file mode 100644 index 0000000000..653df97b4e --- /dev/null +++ b/test/core/simd/meta/simd_f32x4.py @@ -0,0 +1,489 @@ +#!/usr/bin/env python3 + +""" +Generate f32x4 [abs, min, max] cases. +""" + +from simd_f32x4_arith import Simdf32x4ArithmeticCase +from simd import SIMD +from test_assert import AssertReturn + + +def binary_op(op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: min, max, + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + + if '-nan' in [p1, p2] and 'nan' in [p1, p2]: + return p1 + + if 'nan' in [p1, p2]: + return 'nan' + + if '-nan' in [p1, p2]: + return '-nan' + + if op == 'min': + if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: + return '-0x0p+0' + result = min(f1, f2) + + elif op == 'max': + if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: + return '0x0p+0' + result = max(f1, f2) + + else: + raise Exception('Unknown binary operation: {}'.format(op)) + + return result.hex() + + +def unary_op(op: str, p1: str) -> str: + """Unnary operation on p1 with the operation specified by op + + :param op: abs, + :param p1: float number in hex + :return: + """ + f1 = float.fromhex(p1) + if op == 'abs': + return abs(f1).hex() + + raise Exception('Unknown unary operation: {}'.format(op)) + + +class Simdf32x4Case(Simdf32x4ArithmeticCase): + UNARY_OPS = ('abs',) + BINARY_OPS = ('min', 'max',) + + FLOAT_NUMBERS = ( + '0x0p+0', '-0x0p+0', '0x1p-149', '-0x1p-149', '0x1p-126', '-0x1p-126', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', + '0x1.921fb6p+2', '-0x1.921fb6p+2', '0x1.fffffep+127', '-0x1.fffffep+127', 'inf', '-inf' + ) + + NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') + binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') + unary_param_template = ('({} (invoke "{}" ', '{})', '{})') + binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') + unary_nan_template = ('({} (invoke "{}" ', '{}))') + + def full_op_name(self, op_name): + return self.LANE_TYPE + '.' + op_name + + @staticmethod + def v128_const(lane, val): + + return SIMD().v128_const(val, lane) + + def gen_test_fn_template(self): + + # Get function code + template = Simdf32x4ArithmeticCase.gen_test_fn_template(self) + + # Function template + tpl_func = ' (func (export "{}"){} (result v128) ({} {}{}))' + + # Const data for min and max + lst_instr_with_const = [ + [ + [['0', '1', '2', '-3'], ['0', '2', '1', '3']], + [['0', '1', '1', '-3'], ['0', '2', '2', '3']] + ], + [ + [['0', '1', '2', '3'], ['0', '1', '2', '3']], + [['0', '1', '2', '3'], ['0', '1', '2', '3']] + ], + [ + [['0x00', '0x01', '0x02', '0x80000000'], ['0x00', '0x02', '0x01', '2147483648']], + [['0x00', '0x01', '0x01', '0x80000000'], ['0x00', '0x02', '0x02', '2147483648']] + ], + [ + [['0x00', '0x01', '0x02', '0x80000000'], ['0x00', '0x01', '0x02', '0x80000000']], + [['0x00', '0x01', '0x02', '0x80000000'], ['0x00', '0x01', '0x02', '0x80000000']] + ] + ] + + # Assert data + lst_oprt_with_const_assert = {} + + # Generate func and assert + for op in self.BINARY_OPS: + + op_name = self.full_op_name(op) + + # Add comment for the case script " ;; [f32x4.min, f32x4.max] const vs const" + template.insert(len(template)-1, ' ;; {} const vs const'.format(op_name)) + + # Add const vs const cases + for case_data in lst_instr_with_const: + + func_name = "{}_with_const_{}".format(op_name, len(template)-7) + template.insert(len(template)-1, + tpl_func.format(func_name, '', op_name, + self.v128_const('f32x4', case_data[0][0]), + ' ' + self.v128_const('f32x4', case_data[0][1]))) + + ret_idx = 0 if op == 'min' else 1 + + if op not in lst_oprt_with_const_assert: + lst_oprt_with_const_assert[op] = [] + + lst_oprt_with_const_assert[op].append([func_name, case_data[1][ret_idx]]) + + # Add comment for the case script " ;; [f32x4.min, f32x4.max] param vs const" + template.insert(len(template)-1, ' ;; {} param vs const'.format(op_name)) + + case_cnt = 0 + + # Add param vs const cases + for case_data in lst_instr_with_const: + + func_name = "{}_with_const_{}".format(op_name, len(template)-7) + + # Cross parameters and constants + if case_cnt in (0, 3): + func_param_0 = '(local.get 0)' + func_param_1 = self.v128_const('f32x4', case_data[0][0]) + else: + func_param_0 = self.v128_const('f32x4', case_data[0][0]) + func_param_1 = '(local.get 0)' + + template.insert(len(template)-1, + tpl_func.format(func_name, '(param v128)', op_name, func_param_0, ' ' + func_param_1)) + + ret_idx = 0 if op == 'min' else 1 + + if op not in lst_oprt_with_const_assert: + lst_oprt_with_const_assert[op] = [] + + lst_oprt_with_const_assert[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) + + case_cnt += 1 + + # Generate func for abs + op_name = self.full_op_name('abs') + func_name = "{}_with_const".format(op_name) + template.insert(len(template)-1, '') + template.insert(len(template)-1, + tpl_func.format(func_name, '', op_name, + self.v128_const('f32x4', ['-0', '-1', '-2', '-3']), '')) + + # Test different lanes go through different if-then clauses + lst_diff_lane_vs_clause = [ + [ + 'f32x4.min', + [['nan', '0', '0', '1'], ['0', '-nan', '1', '0']], + [['nan', '-nan', '0', '0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.min', + [['nan', '0', '0', '0'], ['0', '-nan', '1', '0']], + [['nan', '-nan', '0', '0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.max', + [['nan', '0', '0', '1'], ['0', '-nan', '1', '0']], + [['nan', '-nan', '1', '1']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.max', + [['nan', '0', '0', '0'], ['0', '-nan', '1', '0']], + [['nan', '-nan', '1', '0']], + ['f32x4', 'f32x4', 'f32x4'] + ] + ] + + # Case number + case_cnt = 0 + + # Template for func name to extract a lane + tpl_func_name_by_lane = 'call_indirect_vv_v_f32x4_extract_lane_{}' + + # Template for assert + tpl_assert = '({}\n' \ + ' (invoke "{}"\n' \ + ' {}\n' \ + ' {}\n' \ + ' {}\n' \ + ' )\n' \ + '{}' \ + ')' + + lst_diff_lane_vs_clause_assert = [] + + # Add comment in wast script + lst_diff_lane_vs_clause_assert.append('') + lst_diff_lane_vs_clause_assert.append(';; Test different lanes go through different if-then clauses') + + template.insert(len(template)-1, '') + template.insert(len(template)-1, ' ;; Test different lanes go through different if-then clauses') + + # Add test case for test different lanes go through different if-then clauses + template.insert(len(template)-1, ' (type $vv_v (func (param v128 v128) (result v128)))\n' + ' (table funcref (elem $f32x4_min $f32x4_max))\n' + '\n' + ' (func $f32x4_min (type $vv_v)\n' + ' (f32x4.min (local.get 0) (local.get 1))\n' + ' )\n' + '\n' + ' (func $f32x4_max (type $vv_v)\n' + ' (f32x4.max (local.get 0) (local.get 1))\n' + ' )\n' + '\n' + ' (func (export "call_indirect_vv_v_f32x4_extract_lane_0")\n' + ' (param v128 v128 i32) (result f32)\n' + ' (f32x4.extract_lane 0\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )\n' + ' (func (export "call_indirect_vv_v_f32x4_extract_lane_1")\n' + ' (param v128 v128 i32) (result f32)\n' + ' (f32x4.extract_lane 1\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )\n' + ' (func (export "call_indirect_vv_v_f32x4_extract_lane_2")\n' + ' (param v128 v128 i32) (result f32)\n' + ' (f32x4.extract_lane 2\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )\n' + ' (func (export "call_indirect_vv_v_f32x4_extract_lane_3")\n' + ' (param v128 v128 i32) (result f32)\n' + ' (f32x4.extract_lane 3\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )') + + for case_data in lst_diff_lane_vs_clause: + + lst_diff_lane_vs_clause_assert.append(';; {} {}'.format(case_data[0], case_cnt)) + + # generate assert for every data lane + for lane_idx in range(0, len(case_data[2][0])): + + # get the result by lane + ret = case_data[2][0][lane_idx] + + idx_func = '0' if 'min' in case_data[0] else '1' + + # append assert + if 'nan' in ret: + + lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return_canonical_nan', + tpl_func_name_by_lane.format(lane_idx), + self.v128_const('f32x4', case_data[1][0]), + self.v128_const('f32x4', case_data[1][1]), + self.v128_const('i32', idx_func), + '')) + else: + + lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return', + tpl_func_name_by_lane.format(lane_idx), + self.v128_const('f32x4', case_data[1][0]), + self.v128_const('f32x4', case_data[1][1]), + self.v128_const('i32', idx_func), + ' '+self.v128_const('f32', ret)+'\n')) + + case_cnt += 1 + if case_cnt == 2: + case_cnt = 0 + + lst_diff_lane_vs_clause_assert.append('') + + # Add test for operations with constant operands + for key in lst_oprt_with_const_assert: + + case_cnt = 0 + for case_data in lst_oprt_with_const_assert[key]: + + # Add comment for the param combination + if case_cnt == 0: + template.append(';; {} const vs const'.format(op_name)) + if case_cnt == 4: + template.append(';; {} param vs const'.format(op_name)) + + # Cross parameters and constants + if case_cnt < 4: + template.append(str(AssertReturn(case_data[0], [], self.v128_const('f32x4', case_data[1])))) + else: + template.append(str(AssertReturn(case_data[0], [self.v128_const('f32x4', case_data[1])], self.v128_const('f32x4', case_data[2])))) + case_cnt += 1 + + # Generate and append f32x4.abs assert + op_name = self.full_op_name('abs') + func_name = "{}_with_const".format(op_name) + template.append('') + template.append(str(AssertReturn(func_name, [], self.v128_const('f32x4', ['0', '1', '2', '3'])))) + + template.extend(lst_diff_lane_vs_clause_assert) + + return template + + @property + def combine_ternary_arith_test_data(self): + return { + 'min-max': [ + ['1.125'] * 4, ['0.25'] * 4, ['0.125'] * 4, ['0.125'] * 4 + ], + 'max-min': [ + ['1.125'] * 4, ['0.25'] * 4, ['0.125'] * 4, ['0.25'] * 4 + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'min-abs': [ + ['-1.125'] * 4, ['0.125'] * 4, ['0.125'] * 4 + ], + 'max-abs': [ + ['-1.125'] * 4, ['0.125'] * 4, ['1.125'] * 4 + ] + } + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests, 4 assert statements: + assert_return + assert_return_canonical_nan + assert_return_arithmetic_nan + assert_malformed + """ + cases = [] + binary_test_data = [] + unary_test_data = [] + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for p1 in self.FLOAT_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + result = binary_op(op, p1, p2) + if 'nan' not in result: + # Normal floating point numbers as the results + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + else: + # Since the results contain the 'nan' string, it should be in the + # assert_return_canonical_nan statements + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + + # assert_return_canonical_nan and assert_return_arithmetic_nan cases + for p1 in self.NAN_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + if 'nan:' in p1 or 'nan:' in p2: + # When the arguments contain 'nan:', always use assert_return_arithmetic_nan + # statements for the cases. Since there 2 parameters for binary operation and + # the order of the parameters matter. Different order makes different cases. + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p2, p1]) + else: + # No 'nan' string found, then it should be assert_return_canonical_nan. + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p2, p1]) + for p2 in self.NAN_NUMBERS: + # Both parameters contain 'nan', then there must be no assert_return. + if 'nan:' in p1 or 'nan:' in p2: + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + else: + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + + for case in binary_test_data: + cases.append(self.single_binary_test(case)) + + # Test opposite signs of zero + lst_oppo_signs_0 = [ + '\n;; Test opposite signs of zero', + [ + 'f32x4.min', + [['0', '0', '-0', '+0'], ['+0', '-0', '+0', '-0']], + [['0', '-0', '-0', '-0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.min', + [['-0', '-0', '-0', '-0'], ['+0', '+0', '+0', '+0']], + [['-0', '-0', '-0', '-0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.max', + [['0', '0', '-0', '+0'], ['+0', '-0', '+0', '-0']], + [['0', '0', '0', '0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + [ + 'f32x4.max', + [['-0', '-0', '-0', '-0'], ['+0', '+0', '+0', '+0']], + [['+0', '+0', '+0', '+0']], + ['f32x4', 'f32x4', 'f32x4'] + ], + '\n' + ] + + # Generate test case for opposite signs of zero + for case_data in lst_oppo_signs_0: + + if isinstance(case_data, str): + cases.append(case_data) + continue + + cases.append(str(AssertReturn(case_data[0], + [self.v128_const(case_data[3][0], case_data[1][0]), + self.v128_const(case_data[3][1], case_data[1][1])], + self.v128_const(case_data[3][2], case_data[2][0])))) + + for p in self.FLOAT_NUMBERS: + op_name = self.full_op_name('abs') + result = unary_op('abs', p) + # Abs operation is valid for all the floating point numbers + unary_test_data.append(['assert_return', op_name, p, result]) + + for case in unary_test_data: + cases.append(self.single_unary_test(case)) + + self.get_unknown_operator_case(cases) + + return '\n'.join(cases) + + def get_unknown_operator_case(self, cases): + """Unknown operator cases. + """ + + tpl_assert = "(assert_malformed (module quote \"(memory 1) (func (result v128) " \ + "({}.{} {}))\") \"unknown operator\")" + + unknown_op_cases = ['\n\n;; Unknown operators\n'] + cases.extend(unknown_op_cases) + + for lane_type in ['i8x16', 'i16x8', 'i32x4']: + + for op in self.UNARY_OPS: + cases.append(tpl_assert.format(lane_type, op, self.v128_const('i32x4', '0'))) + + for op in self.BINARY_OPS: + cases.append(tpl_assert.format(lane_type, op, ' '.join([self.v128_const('i32x4', '0')]*2))) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + txt_test_case = self.get_all_cases() + txt_test_case = txt_test_case.replace('f32x4 arithmetic', 'f32x4 [abs, min, max]') + fp.write(txt_test_case) + + +def gen_test_cases(): + simd_f32x4_case = Simdf32x4Case() + simd_f32x4_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py new file mode 100644 index 0000000000..cd98cf289a --- /dev/null +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -0,0 +1,377 @@ +#!/usr/bin/env python3 + +""" +Generate f32x4 floating-point arithmetic operation cases. +""" + +import math +from simd_arithmetic import SimdArithmeticCase + + +def binary_op(op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: add, sub, mul, + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + if op == 'add': + if 'inf' in p1 and 'inf' in p2 and p1 != p2: + return '-nan' + result = f1 + f2 + + elif op == 'sub': + if 'inf' in p1 and 'inf' in p2 and p1 == p2: + return '-nan' + result = f1 - f2 + + elif op == 'mul': + if '0x0p+0' in p1 and 'inf' in p2 or 'inf' in p1 and '0x0p+0' in p2: + return '-nan' + result = f1 * f2 + + elif op == 'div': + if '0x0p+0' in p1 and '0x0p+0' in p2: + return '-nan' + if 'inf' in p1 and 'inf' in p2: + return '-nan' + + try: + result = f1 / f2 + return get_valid_float(result) + except ZeroDivisionError: + if p1[0] == p2[0]: + return 'inf' + elif p1 == 'inf' and p2 == '0x0p+0': + return 'inf' + else: + return '-inf' + + else: + raise Exception('Unknown binary operation') + + return get_valid_float(result) + + +def get_valid_float(value): + if value > float.fromhex('0x1.fffffep+127'): + return 'inf' + if value < float.fromhex('-0x1.fffffep+127'): + return '-inf' + return value.hex() + + +def float_sqrt(p): + if p == '-0x0p+0': + return '-0x0p+0' + + try: + p = float.fromhex(p) + result = float.hex(math.sqrt(p)) + except ValueError: + result = '-nan' + + return result + + +def float_neg(p): + if p == 'nan': + return '-nan' + try: + p = float.fromhex(p) + result = float.hex(-p) + except ValueError: + if p.startswith('nan:'): + return '-' + p + if p.startswith('-nan:'): + return p[1:] + + return result + + +class Simdf32x4ArithmeticCase(SimdArithmeticCase): + LANE_LEN = 4 + LANE_TYPE = 'f32x4' + + UNARY_OPS = ('neg', 'sqrt') + BINARY_OPS = ('add', 'sub', 'mul', 'div',) + + FLOAT_NUMBERS = ( + '0x0p+0', '-0x0p+0', '0x1p-149', '-0x1p-149', '0x1p-126', '-0x1p-126', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', + '0x1.921fb6p+2', '-0x1.921fb6p+2', '0x1.fffffep+127', '-0x1.fffffep+127', 'inf', '-inf' + ) + + NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') + binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') + unary_param_template = ('({} (invoke "{}" ', '{})', '{})') + binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') + unary_nan_template = ('({} (invoke "{}" ', '{}))') + + def full_op_name(self, op_name): + return self.LANE_TYPE + '.' + op_name + + @staticmethod + def v128_const(lane, val): + return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * 4)) + + @property + def combine_ternary_arith_test_data(self): + return { + 'add-sub': [ + ['1.125'] * 4, ['0.25'] * 4, ['0.125'] * 4, ['1.0'] * 4 + ], + 'sub-add': [ + ['1.125'] * 4, ['0.25'] * 4, ['0.125'] * 4, ['1.25'] * 4 + ], + 'mul-add': [ + ['1.25'] * 4, ['0.25'] * 4, ['0.25'] * 4, ['0.375'] * 4 + ], + 'mul-sub': [ + ['1.125'] * 4, ['0.125'] * 4, ['0.25'] * 4, ['0.25'] * 4 + ], + 'div-add': [ + ['1.125'] * 4, ['0.125'] * 4, ['0.25'] * 4, ['5.0'] * 4 + ], + 'div-sub': [ + ['1.125'] * 4, ['0.125'] * 4, ['0.25'] * 4, ['4.0'] * 4 + ], + 'mul-div': [ + ['1.125'] * 4, ['0.125'] * 4, ['0.25'] * 4, ['2.25'] * 4 + ], + 'div-mul': [ + ['1.125'] * 4, ['4'] * 4, ['0.25'] * 4, ['18.0'] * 4 + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'add-neg': [ + ['1.125'] * 4, ['0.125'] * 4, ['-1.0'] * 4 + ], + 'sub-neg': [ + ['1.125'] * 4, ['0.125'] * 4, ['-1.25'] * 4 + ], + 'mul-neg': [ + ['1.5'] * 4, ['0.25'] * 4, ['-0.375'] * 4 + ], + 'div-neg': [ + ['1.5'] * 4, ['0.25'] * 4, ['-6'] * 4 + ], + 'add-sqrt': [ + ['2.25'] * 4, ['0.25'] * 4, ['1.75'] * 4 + ], + 'sub-sqrt': [ + ['2.25'] * 4, ['0.25'] * 4, ['1.25'] * 4 + ], + 'mul-sqrt': [ + ['2.25'] * 4, ['0.25'] * 4, ['0.375'] * 4 + ], + 'div-sqrt': [ + ['2.25'] * 4, ['0.25'] * 4, ['6'] * 4 + ] + } + + def single_binary_test(self, case): + """Format a test case in 2 or 3 lines + + :param case: list of elements about the test case + :return: test cases with 2 v128.const f32x4 operands, 3 lines at most + """ + op_name = case[1] + arg1 = self.v128_const(self.LANE_TYPE, case[2]) + arg2 = self.v128_const(self.LANE_TYPE, case[3]) + + if len(case) == 4: + line_head = self.binary_nan_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + lines = [ + line_head + self.binary_nan_template[1].format(arg1), + blank_head + self.binary_nan_template[2].format(arg2) + ] + elif len(case) == 5: + line_head = self.binary_params_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + result = self.v128_const(self.LANE_TYPE, case[-1]) + lines = [ + line_head + self.binary_params_template[1].format(arg1), + blank_head + self.binary_params_template[2].format(arg2), + blank_head + self.binary_params_template[3].format(result) + ] + else: + raise Exception('Invalid format for the test case!') + + return '\n'.join(lines) + + def single_unary_test(self, case): + """Format a test case in 1 line or 2 lines + + :param case: list of elements about the test case + :return: test cases with 2 v128.const f32x4 operands, 2 lines at most + """ + op_name = case[1] + arg = self.v128_const(self.LANE_TYPE, case[2]) + + if len(case) == 3: + line_head = self.unary_nan_template[0].format(case[0], op_name) + lines = [ + line_head + self.unary_nan_template[1].format(arg) + ] + elif len(case) == 4: + line_head = self.unary_param_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + result = self.v128_const(self.LANE_TYPE, case[-1]) + lines = [ + line_head + self.unary_param_template[1].format(arg), + blank_head + self.unary_param_template[2].format(result) + ] + else: + raise Exception('Invalid format for the test case!') + + return '\n'.join(lines) + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests, 3 assert statements: + assert_return + assert_return_canonical_nan + assert_return_arithmetic_nan + """ + cases = [] + binary_test_data = [] + unary_test_data = [] + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for p1 in self.FLOAT_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + result = binary_op(op, p1, p2) + if 'nan' not in result: + # Normal floating point numbers as the results + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + else: + # Since the results contain the 'nan' string, it should be in the + # assert_return_canonical_nan statements + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + + # assert_return_canonical_nan and assert_return_arithmetic_nan cases + for p1 in self.NAN_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + if 'nan:' in p1 or 'nan:' in p2: + # When the arguments contain 'nan:', always use assert_return_arithmetic_nan + # statements for the cases. Since there 2 parameters for binary operation and + # the order of the parameters matter. Different order makes different cases. + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p2, p1]) + else: + # No 'nan' string found, then it should be assert_return_canonical_nan. + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p2, p1]) + for p2 in self.NAN_NUMBERS: + # Both parameters contain 'nan', then there must be no assert_return. + if 'nan:' in p1 or 'nan:' in p2: + binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + else: + binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + + for case in binary_test_data: + cases.append(self.single_binary_test(case)) + + for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS: + if 'nan:' in p: + unary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p]) + elif 'nan' in p: + unary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p]) + else: + # Normal floating point numbers for sqrt operation + op_name = self.full_op_name('sqrt') + result = float_sqrt(p) + if 'nan' not in result: + # Get the sqrt value correctly + unary_test_data.append(['assert_return', op_name, p, result]) + else: + # + unary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p]) + + for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS: + op_name = self.full_op_name('neg') + result = float_neg(p) + # Neg operation is valid for all the floating point numbers + unary_test_data.append(['assert_return', op_name, p, result]) + + for case in unary_test_data: + cases.append(self.single_unary_test(case)) + + self.mixed_nan_test(cases) + + return '\n'.join(cases) + + @property + def mixed_sqrt_nan_test_data(self): + return { + "canon": [ + '-1.0 nan 4.0 9.0', + ('nan', 'nan', '2.0', '3.0') + ], + 'arith': [ + 'nan:0x200000 -nan:0x200000 16.0 25.0', + ('nan', 'nan', '4.0', '5.0') + ], + 'mixed': [ + '-inf nan:0x200000 36.0 49.0', + ('canon', 'arith', '6.0', '7.0') + ] + } + + def mixed_nan_test(self, cases): + """Mixed f32x4 tests when only expects canonical NaNs in a subset of lanes. + """ + mixed_cases = ['\n\n;; Mixed f32x4 tests when some lanes are NaNs', '(module\n'] + cases.extend(mixed_cases) + for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): + func = [' (func $f32x4_sqrt_{} (result v128)'.format(test_type), + ' v128.const f32x4 {}'.format(test_data[0]), + ' f32x4.sqrt)'] + cases.extend(func) + for i, test in enumerate(test_data[1]): + test = [' (func (export "f32x4_extract_lane_{}_{}") (result f32)'.format( + test_type, i), + ' (f32x4.extract_lane {} (call $f32x4_sqrt_{})))'.format( + i, test_type)] + cases.extend(test) + cases.append('') + cases.append(')\n') + + for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): + template = '({} (invoke "f32x4_extract_lane_{}_{}"))' + for i, result in enumerate(test_data[1]): + if test_type == 'canon' and result == 'nan': + cases.append(template.format( + 'assert_return_canonical_nan', test_type, i)) + elif test_type == 'arith' and result == 'nan': + cases.append(template.format( + 'assert_return_arithmetic_nan', test_type, i)) + elif result == 'canon': + cases.append(template.format( + 'assert_return_canonical_nan', test_type, i)) + elif result == 'arith': + cases.append(template.format( + 'assert_return_arithmetic_nan', test_type, i)) + else: + cases.append('({} (invoke "f32x4_extract_lane_{}_{}") '.format( + 'assert_return', test_type, i) + + '(f32.const {}))'.format(result)) + + +def gen_test_cases(): + simd_f32x4_arith = Simdf32x4ArithmeticCase() + simd_f32x4_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f64x2_cmp.py b/test/core/simd/meta/simd_f64x2_cmp.py new file mode 100644 index 0000000000..a286f3fe26 --- /dev/null +++ b/test/core/simd/meta/simd_f64x2_cmp.py @@ -0,0 +1,314 @@ +#!/usr/bin/env python3 + +""" +This file is used for generating simd_f64x2_cmp.wast file. +Which inherites from `SimdArithmeticCase` class, overloads +the `get_test_cases` method, and reset the Test Case template. +The reason why this is different from other cmp files is that +f64x2 only has 6 comparison instructions but with amounts of +test datas. +""" + +from simd_arithmetic import SimdArithmeticCase + + +def binary_op(op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: eq, ne, lt, le, gt, ge + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + + # ne + # if either p1 or p2 is a NaN, then return True + if op == 'ne' and ('nan' in p1.lower() or 'nan' in p2.lower()): + return '-1' + + # other instructions + # if either p1 or p2 is a NaN, then return False + if 'nan' in p1.lower() or 'nan' in p2.lower(): + return '0' + + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + + if op == 'eq': + return '-1' if f1 == f2 else '0' + + elif op == 'ne': + return '-1' if f1 != f2 else '0' + + elif op == 'lt': + return '-1' if f1 < f2 else '0' + + elif op == 'le': + return '-1' if f1 <= f2 else '0' + + elif op == 'gt': + return '-1' if f1 > f2 else '0' + + elif op == 'ge': + return '-1' if f1 >= f2 else '0' + else: + raise Exception('Unknown binary operation') + + +class Simdf64x2CmpCase(SimdArithmeticCase): + LANE_LEN = 4 + LANE_TYPE = 'f64x2' + + UNARY_OPS = () + BINARY_OPS = ('eq', 'ne', 'lt', 'le', 'gt', 'ge',) + + FLOAT_NUMBERS_SPECIAL = ('0x1p-1074', '-inf', '0x1.921fb54442d18p+2', + '0x1p+0', '-0x1.fffffffffffffp+1023', '-0x0p+0', '-0x1p-1', '0x1.fffffffffffffp+1023', + '-0x1p-1074', '-0x1p-1022', '0x1p-1', '-0x1.921fb54442d18p+2', + '0x0p+0', 'inf', '-0x1p+0', '0x1p-1022' + ) + + FLOAT_NUMBERS_NORMAL = ('-1', '0', '1', '2.0') + + NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') + + binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') + unary_param_template = ('({} (invoke "{}" ', '{})', '{})') + binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') + unary_nan_template = ('({} (invoke "{}" ', '{}))') + + def full_op_name(self, op_name): + return self.LANE_TYPE + '.' + op_name + + @staticmethod + def v128_const(lane, val): + lane_cnt = 2 if lane in ['f64x2', 'i64x2'] else 4 + return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * lane_cnt)) + + @property + def combine_ternary_arith_test_data(self): + return {} + + @property + def combine_binary_arith_test_data(self): + return ['f64x2.eq', 'f64x2.ne', 'f64x2.lt', 'f64x2.le', 'f64x2.gt', 'f64x2.ge'] + + def single_binary_test(self, case): + """Format a test case in 2 or 3 lines + + :param case: list of elements about the test case + :return: test cases with 2 v128.const f64x2 operands, 3 lines at most + """ + op_name = case[1] + arg1 = self.v128_const(self.LANE_TYPE, case[2]) + arg2 = self.v128_const(self.LANE_TYPE, case[3]) + + if len(case) == 4: + line_head = self.binary_nan_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + lines = [ + line_head + self.binary_nan_template[1].format(arg1), + blank_head + self.binary_nan_template[2].format(arg2) + ] + elif len(case) == 5: + line_head = self.binary_params_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + result = self.v128_const('i64x2', case[-1]) + lines = [ + line_head + self.binary_params_template[1].format(arg1), + blank_head + self.binary_params_template[2].format(arg2), + blank_head + self.binary_params_template[3].format(result) + ] + else: + raise Exception('Invalid format for the test case!') + + return '\n'.join(lines) + + def single_unary_test(self, case): + """Format a test case in 1 line or 2 lines + + :param case: list of elements about the test case + :return: test cases with 2 v128.const f64x2 operands, 2 lines at most + """ + op_name = case[1] + arg = self.v128_const(self.LANE_TYPE, case[2]) + + if len(case) == 3: + line_head = self.unary_nan_template[0].format(case[0], op_name) + lines = [ + line_head + self.unary_nan_template[1].format(arg) + ] + elif len(case) == 4: + line_head = self.unary_param_template[0].format(case[0], op_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + result = self.v128_const(self.LANE_TYPE, case[-1]) + lines = [ + line_head + self.unary_param_template[1].format(arg), + blank_head + self.unary_param_template[2].format(result) + ] + else: + raise Exception('Invalid format for the test case!') + + return '\n'.join(lines) + + def get_combine_cases(self): + combine_cases = [';; combination\n(module (memory 1)'] + + # append funcs + binary_fn_template = ' (func (export "{}-in-block")\n' \ + ' (block\n' \ + ' (drop\n' \ + ' (block (result v128)\n' \ + ' ({}\n' \ + ' (block (result v128) (v128.load (i32.const 0)))\n' \ + ' (block (result v128) (v128.load (i32.const 1)))\n' \ + ' )\n' \ + ' )\n' \ + ' )\n' \ + ' )\n' \ + ' )' + for fn_name in self.combine_binary_arith_test_data: + combine_cases.append(binary_fn_template.format(fn_name, fn_name)) + + binary_fn_template = ' (func (export "nested-{fn}")\n' \ + ' (drop\n' \ + ' ({fn}\n' \ + ' ({fn}\n' \ + ' ({fn}\n' \ + ' (v128.load (i32.const 0))\n' \ + ' (v128.load (i32.const 1))\n' \ + ' )\n' \ + ' ({fn}\n' \ + ' (v128.load (i32.const 2))\n' \ + ' (v128.load (i32.const 3))\n' \ + ' )\n' \ + ' )\n' \ + ' ({fn}\n' \ + ' ({fn}\n' \ + ' (v128.load (i32.const 0))\n' \ + ' (v128.load (i32.const 1))\n' \ + ' )\n' \ + ' ({fn}\n' \ + ' (v128.load (i32.const 2))\n' \ + ' (v128.load (i32.const 3))\n' \ + ' )\n' \ + ' )\n' \ + ' )\n' \ + ' )\n' \ + ' )' \ + + for fn_name in self.combine_binary_arith_test_data: + combine_cases.append(binary_fn_template.format(fn=fn_name)) + + combine_cases.append(' (func (export "as-param")\n' + ' (drop\n' + ' (f64x2.eq\n' + ' (f64x2.ne\n' + ' (f64x2.lt\n' + ' (v128.load (i32.const 0))\n' + ' (v128.load (i32.const 1))\n' + ' )\n' + ' (f64x2.le\n' + ' (v128.load (i32.const 2))\n' + ' (v128.load (i32.const 3))\n' + ' )\n' + ' )\n' + ' (f64x2.gt\n' + ' (f64x2.ge\n' + ' (v128.load (i32.const 0))\n' + ' (v128.load (i32.const 1))\n' + ' )\n' + ' (f64x2.eq\n' + ' (v128.load (i32.const 2))\n' + ' (v128.load (i32.const 3))\n' + ' )\n' + ' )\n' + ' )\n' + ' )\n' + ' )') + + combine_cases.append(')') + + # append assert + binary_case_template = ('(assert_return (invoke "{fn}-in-block"))') + for fn_name in self.combine_binary_arith_test_data: + combine_cases.append(binary_case_template.format(fn=fn_name)) + + binary_case_template = ('(assert_return (invoke "nested-{fn}"))') + for fn_name in self.combine_binary_arith_test_data: + combine_cases.append(binary_case_template.format(fn=fn_name)) + + combine_cases.append('(assert_return (invoke "as-param"))\n') + + return '\n'.join(combine_cases) + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests + """ + cases = [] + binary_test_data = [] + unary_test_data = [] + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for p1 in self.FLOAT_NUMBERS_SPECIAL: + for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: + result = binary_op(op, p1, p2) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + + for p1 in self.NAN_NUMBERS: + for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: + result = binary_op(op, p1, p2) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for p1 in self.FLOAT_NUMBERS_NORMAL: + for p2 in self.FLOAT_NUMBERS_NORMAL: + result = binary_op(op, p1, p2) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + + for case in binary_test_data: + cases.append(self.single_binary_test(case)) + + for case in unary_test_data: + cases.append(self.single_unary_test(case)) + + self.get_unknown_operator_case(cases) + + return '\n'.join(cases) + + def get_unknown_operator_case(self, cases): + """Unknown operator cases. + """ + + tpl_assert = "(assert_malformed (module quote \"(memory 1) (func " \ + " (param $x v128) (param $y v128) (result v128) " \ + "({}.{} (local.get $x) (local.get $y)))\") \"unknown operator\")" + + cases.append('\n\n;; unknown operators') + + for lane_type in ['f2x64']: + for op in self.BINARY_OPS: + cases.append(tpl_assert.format(lane_type, + op, + ' '.join([self.v128_const('i32x4', '0')]*2))) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}_cmp.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + txt_test_case = self.get_all_cases() + txt_test_case = txt_test_case.replace('f64x2 arithmetic', 'f64x2 comparison') + fp.write(txt_test_case) + + +def gen_test_cases(): + simd_f64x2_cmp = Simdf64x2CmpCase() + simd_f64x2_cmp.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_i16x8_arith.py b/test/core/simd/meta/simd_i16x8_arith.py new file mode 100644 index 0000000000..2c750b0c50 --- /dev/null +++ b/test/core/simd/meta/simd_i16x8_arith.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python3 + +""" +Generate i16x8 integer arithmetic operation cases. +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdI16x8ArithmeticCase(SimdArithmeticCase): + + LANE_LEN = 8 + LANE_TYPE = 'i16x8' + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3fff', '0x4000'), + ('0x4000', '0x4000'), + ('-0x3fff', '-0x4000'), + ('-0x4000', '-0x4000'), + ('-0x4000', '-0x4001'), + ('0x7fff', '0x7fff'), + ('0x7fff', '0x01'), + ('0x8000', '-0x01'), + ('0x7fff', '0x8000'), + ('0x8000', '0x8000'), + ('0xffff', '0x01'), + ('0xffff', '0xffff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x8000', '-0x7fff', '0x7fff', '0x8000', '0xffff'] + + @property + def i16x8_i8x16_test_data(self): + return { + 'i16x8.add': [ + [['0x7fff', ['0', '0x80'] * 8], '-1', ['i16x8', 'i8x16', 'i16x8']], + [['1', '255'], '0', ['i16x8', 'i8x16', 'i16x8']] + ], + 'i16x8.sub': [ + [['0x7fff', ['0', '0x80'] * 8], '-1', ['i16x8', 'i8x16', 'i16x8']], + [['1', '255'], '0x02', ['i16x8', 'i8x16', 'i16x8']] + ], + 'i16x8.mul': [ + [['0x1000', '0x10'], '0', ['i16x8', 'i8x16', 'i16x8']], + [['65535', '255'], '0x01', ['i16x8', 'i8x16', 'i16x8']] + ] + } + + @property + def i16x8_i32x4_test_data(self): + return { + 'i16x8.add': [ + [['0x7fff', '0x80008000'], '-1', ['i16x8', 'i32x4', 'i16x8']], + [['1', '0xffffffff'], '0', ['i16x8', 'i32x4', 'i16x8']] + ], + 'i16x8.sub': [ + [['0x7fff', '0x80008000'], '-1', ['i16x8', 'i32x4', 'i16x8']], + [['1', '0xffffffff'], '0x02', ['i16x8', 'i32x4', 'i16x8']] + ], + 'i16x8.mul': [ + [['0x8000', '0x00020002'], '0', ['i16x8', 'i32x4', 'i16x8']], + [['65535', '0xffffffff'], '0x01', ['i16x8', 'i32x4', 'i16x8']] + ] + } + + @property + def i16x8_f32x4_test_data(self): + return { + 'i16x8.add': [ + [['0x8000', '+0.0'], '0x8000', ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '1.0'], ['0x8000', '0xbf80'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-1.0'], ['0x8000', '0x3f80'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0x7f81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0xff81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + 'i16x8.sub': [ + [['0x8000', '+0.0'], '0x8000', ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '1.0'], ['0x8000', '0x4080'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-1.0'], ['0x8000', '0xc080'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0x8081'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0x81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x8041'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + 'i16x8.mul': [ + [['0x8000', '+0.0'], '0', ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-0.0'], '0', ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '1.0'], '0', ['i16x8', 'f32x4', 'i16x8']], + [['0x8000', '-1.0'], '0', ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0', '0x7f80'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0', '0xff80'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0', '0x7fc0'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ] + } + + @property + def combine_dec_hex_test_data(self): + return { + 'i16x8.add': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0'] * 8, ['i16x8'] * 3] + ], + 'i16x8.sub': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0', '0x02', '0x04', '0x06', '0x08', '0x0a', '0x0c', '0x0e'], ['i16x8'] * 3] + ], + 'i16x8.mul': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0', '0xffff', '0xfffc', '0xfff7', '0xfff0', '0xffe7', '0xffdc', '0xffcf'], + ['i16x8'] * 3] + ] + } + + @property + def range_test_data(self): + return { + 'i16x8.add': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + [str(i * 3) for i in range(8)], ['i16x8'] * 3] + ], + 'i16x8.sub': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + [str(-i) for i in range(8)], ['i16x8'] * 3] + ], + 'i16x8.mul': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + ['0', '0x02', '0x08', '0x12', '0x20', '0x32', '0x48', '0x62'], + ['i16x8'] * 3] + ] + } + + @property + def full_bin_test_data(self): + return [ + self.i16x8_i8x16_test_data, + self.i16x8_i32x4_test_data, + self.i16x8_f32x4_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + +def gen_test_cases(): + simd_i16x8_arith = SimdI16x8ArithmeticCase() + simd_i16x8_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_i32x4_arith.py b/test/core/simd/meta/simd_i32x4_arith.py new file mode 100644 index 0000000000..5f2dfc19c6 --- /dev/null +++ b/test/core/simd/meta/simd_i32x4_arith.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python3 + +""" +Generate i32x4 integer arithmetic operation cases. +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdI32x4ArithmeticCase(SimdArithmeticCase): + + LANE_LEN = 4 + LANE_TYPE = 'i32x4' + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3fffffff', '0x40000000'), + ('0x40000000', '0x40000000'), + ('-0x3fffffff', '-0x40000000'), + ('-0x40000000', '-0x40000000'), + ('-0x40000000', '-0x40000001'), + ('0x7fffffff', '0x7fffffff'), + ('0x7fffffff', '0x01'), + ('0x80000000', '-0x01'), + ('0x7fffffff', '0x80000000'), + ('0x80000000', '0x80000000'), + ('0xffffffff', '0x01'), + ('0xffffffff', '0xffffffff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x80000000', '-0x7fffffff', '0x7fffffff', '0x80000000', '0xffffffff'] + + @property + def i32x4_i8x16_test_data(self): + return { + 'i32x4.add': [ + [['0x7fffffff', ['0', '0', '0', '0x80'] * 4], '-1', ['i32x4', 'i8x16', 'i32x4']], + [['1', '255'], '0', ['i32x4', 'i8x16', 'i32x4']] + ], + 'i32x4.sub': [ + [['0x7fffffff', ['0', '0', '0', '0x80'] * 4], '-1', ['i32x4', 'i8x16', 'i32x4']], + [['1', '255'], '2', ['i32x4', 'i8x16', 'i32x4']] + ], + 'i32x4.mul': [ + [['0x10000000', '0x10'], '0', ['i32x4', 'i8x16', 'i32x4']], + [['0xffffffff', '255'], '1', ['i32x4', 'i8x16', 'i32x4']] + ] + } + + @property + def i32x4_i16x8_test_data(self): + return { + 'i32x4.add': [ + [['0x7fffffff', ['0', '0x8000'] * 4], '-1', ['i32x4', 'i16x8', 'i32x4']], + [['1', '0xffff'], '0', ['i32x4', 'i16x8', 'i32x4']] + ], + 'i32x4.sub': [ + [['0x7fffffff', ['0', '0x8000'] * 4], '-1', ['i32x4', 'i16x8', 'i32x4']], + [['1', '0xffff'], '0x02', ['i32x4', 'i16x8', 'i32x4']] + ], + 'i32x4.mul': [ + [['0x80000000', ['0', '0x02'] * 4], '0', ['i32x4', 'i16x8', 'i32x4']], + [['0xffffffff', '0xffff'], '1', ['i32x4', 'i16x8', 'i32x4']] + ] + } + + @property + def i32x4_f32x4_test_data(self): + return { + 'i32x4.add': [ + [['0x80000000', '+0.0'], '0x80000000', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '-0.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '1.0'], '0xbf800000', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '-1.0'], '0x3f800000', ['i32x4', 'f32x4', 'i32x4']], + [['1', '+inf'], '0x7f800001', ['i32x4', 'f32x4', 'i32x4']], + [['1', '-inf'], '0xff800001', ['i32x4', 'f32x4', 'i32x4']], + [['1', 'nan'], '0x7fc00001', ['i32x4', 'f32x4', 'i32x4']] + ], + 'i32x4.sub': [ + [['0x80000000', '+0.0'], '0x80000000', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '-0.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '1.0'], '0x40800000', ['i32x4', 'f32x4', 'i32x4']], + [['0x80000000', '-1.0'], '0xc0800000', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', '+inf'], '0x80800001', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', '-inf'], '0x00800001', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', 'nan'], '0x80400001', ['i32x4', 'f32x4', 'i32x4']] + ], + 'i32x4.mul': [ + [['0x8000', '+0.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x8000', '-0.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x8000', '1.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x8000', '-1.0'], '0', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', '+inf'], '0x7f800000', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', '-inf'], '0xff800000', ['i32x4', 'f32x4', 'i32x4']], + [['0x1', 'nan'], '0x7fc00000', ['i32x4', 'f32x4', 'i32x4']] + ] + } + + @property + def combine_dec_hex_test_data(self): + return { + 'i32x4.add': [ + [[['0', '1', '2', '3'], + ['0', '0xffffffff', '0xfffffffe', '0xfffffffd']], + ['0'] * 16, ['i32x4'] * 3] + ], + 'i32x4.sub': [ + [[['0', '1', '2', '3'], + ['0', '0xffffffff', '0xfffffffe', '0xfffffffd']], + ['0', '0x02', '0x04', '0x06'], ['i32x4'] * 3] + ], + 'i32x4.mul': [ + [[['0', '1', '2', '3'], + ['0', '0xffffffff', '0xfffffffe', '0xfffffffd']], + ['0', '0xffffffff', '0xfffffffc', '0xfffffff7'], + ['i32x4'] * 3] + ] + } + + @property + def range_test_data(self): + return { + 'i32x4.add': [ + [[[str(i) for i in range(4)], [str(i * 2) for i in range(4)]], + [str(i * 3) for i in range(4)], ['i32x4'] * 3] + ], + 'i32x4.sub': [ + [[[str(i) for i in range(4)], [str(i * 2) for i in range(4)]], + [str(-i) for i in range(4)], ['i32x4'] * 3] + ], + 'i32x4.mul': [ + [[[str(i) for i in range(4)], [str(i * 2) for i in range(4)]], + ['0', '0x02', '0x08', '0x12'], + ['i32x4'] * 3] + ] + } + + @property + def full_bin_test_data(self): + return [ + self.i32x4_i8x16_test_data, + self.i32x4_i16x8_test_data, + self.i32x4_f32x4_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + +def gen_test_cases(): + simd_i32x4_arith = SimdI32x4ArithmeticCase() + simd_i32x4_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_i8x16_arith.py b/test/core/simd/meta/simd_i8x16_arith.py new file mode 100644 index 0000000000..9639d04a87 --- /dev/null +++ b/test/core/simd/meta/simd_i8x16_arith.py @@ -0,0 +1,148 @@ +#!/usr/bin/env python3 + +""" +Generate i8x16 integer arithmetic operation cases. +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdI8x16ArithmeticCase(SimdArithmeticCase): + + LANE_LEN = 16 + LANE_TYPE = 'i8x16' + BINARY_OPS = ('add', 'sub') + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3f', '0x40'), + ('0x40', '0x40'), + ('-0x3f', '-0x40'), + ('-0x40', '-0x40'), + ('-0x40', '-0x41'), + ('0x7f', '0x7f'), + ('0x7f', '0x01'), + ('0x80', '-0x01'), + ('0x7f', '0x80'), + ('0x80', '0x80'), + ('0xff', '0x01'), + ('0xff', '0xff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x80', '-0x7f', '0x7f', '0x80', '0xff'] + + @property + def i8x16_i16x8_test_data(self): + return { + 'i8x16.add': [ + [['0x7f', '0x8080'], '-1', ['i8x16', 'i16x8', 'i8x16']], + [['1', '65535'], '0', ['i8x16', 'i16x8', 'i8x16']] + ], + 'i8x16.sub': [ + [['0x7f', '0x8080'], '-1', ['i8x16', 'i16x8', 'i8x16']], + [['1', '65535'], '2', ['i8x16', 'i16x8', 'i8x16']] + ] + } + + @property + def i8x16_i32x4_test_data(self): + return { + 'i8x16.add': [ + [['0x7f', '0x80808080'], '-1', ['i8x16', 'i32x4', 'i8x16']], + [['1', '0xffffffff'], '0', ['i8x16', 'i32x4', 'i8x16']] + ], + 'i8x16.sub': [ + [['0x7f', '0x80808080'], '-1', ['i8x16', 'i32x4', 'i8x16']], + [['1', '0xffffffff'], '2', ['i8x16', 'i32x4', 'i8x16']] + ] + } + + @property + def i8x16_f32x4_test_data(self): + return { + 'i8x16.add': [ + [['0x80', '+0.0'], '0x80', ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '1.0'], ['0x80', '0x80', '0', '0xbf'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '-1.0'], ['0x80', '0x80', '0', '0x3f'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0x81', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0x81', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0xc1', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']] + ], + 'i8x16.sub': [ + [['0x80', '+0.0'], '0x80', ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '1.0'], ['0x80', '0x80', '0', '0x41'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['0x80', '-1.0'], ['0x80', '0x80', '0', '0xc1'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0x81', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0x81', '0x02'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0x41', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']] + ] + } + + @property + def combine_dec_hex_test_data(self): + return { + 'i8x16.add': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0'] * 16, ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0', '0x02', '0x04', '0x06', '0x08', '0x0a', '0x0c', '0x0e', '0x10', '0x12', '0x14', '0x16', + '0x18', '0x1a', '0x1c', '0x1e'], + ['i8x16', 'i8x16', 'i8x16']] + ] + } + + @property + def range_test_data(self): + return { + 'i8x16.add': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + [str(i * 3) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + [str(-i) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] + ] + } + + @property + def combine_ternary_arith_test_data(self): + test_data = super().combine_ternary_arith_test_data + test_data.pop('mul-add') + test_data.pop('mul-sub') + return test_data + + @property + def combine_binary_arith_test_data(self): + test_data = super().combine_binary_arith_test_data + test_data.pop('mul-neg') + return test_data + + @property + def full_bin_test_data(self): + return [ + self.i8x16_i16x8_test_data, + self.i8x16_i32x4_test_data, + self.i8x16_f32x4_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + +def gen_test_cases(): + simd_i8x16_arith = SimdI8x16ArithmeticCase() + simd_i8x16_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py new file mode 100644 index 0000000000..bee6744fc9 --- /dev/null +++ b/test/core/simd/meta/simd_sat_arith.py @@ -0,0 +1,421 @@ +#!/usr/bin/env python3 + +""" +Generate saturating integer arithmetic operation cases. +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdSaturateArithmeticCases(SimdArithmeticCase): + UNARY_OPS = () + BINARY_OPS = ('add_saturate_s', 'add_saturate_u', + 'sub_saturate_s', 'sub_saturate_u') + malformed_template = '(assert_malformed (module quote\n "(func (result v128) ' \ + '({}.{} ({}) ({})))")\n "unknown operator")' + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}_sat_arith.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + + def gen_test_template(self): + return super().gen_test_template().replace('{invalid_cases}', + '{malformed_cases}\n\n{invalid_cases}') + + def v128_const(self, lane, val, lane_len=None): + if not lane_len: + lane_len = self.LANE_LEN + + return 'v128.const {} {}'.format(lane, ' '.join([str(val)] * lane_len)) + + def get_malformed_cases(self): + malformed_cases = [';; Malformed cases: non-existent op names'] + inst_ops = ['add', 'sub', 'mul', 'div'] + + # The op names should contain _s or _u suffixes, there is no mul or div + # for saturating integer arithmetic operation + for op in inst_ops: + malformed_cases.append(self.malformed_template.format( + self.LANE_TYPE, '_'.join([op, 'saturate']), + self.v128_const(self.LANE_TYPE, '1'), self.v128_const(self.LANE_TYPE, '2'))) + + return '\n'.join(malformed_cases) + + def get_all_cases(self): + case_data = {'lane_type': self.LANE_TYPE, + 'normal_cases': self.get_normal_case(), + 'malformed_cases': self.get_malformed_cases(), + 'invalid_cases': self.get_invalid_cases(), + 'combine_cases': self.get_combine_cases() + } + return self.gen_test_template().format(**case_data) + + @property + def combine_ternary_arith_test_data(self): + return { + 'sat-add_s-sub_s': [ + [str(self.lane.quarter)] * self.LANE_LEN, + [str(self.lane.max)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN + ], + 'sat-add_s-sub_u': [ + [str(self.lane.mask)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN, + ['-1'] * self.LANE_LEN + ], + 'sat-add_u-sub_s': [ + [str(self.lane.max)] * self.LANE_LEN, + ['-1'] * self.LANE_LEN, + [str(self.lane.max)] * self.LANE_LEN, + [str(self.lane.mask - 1)] * self.LANE_LEN + ], + 'sat-add_u-sub_u': [ + [str(self.lane.mask)] * self.LANE_LEN, + ['0'] * self.LANE_LEN, + ['1'] * self.LANE_LEN, + [str(self.lane.mask)] * self.LANE_LEN + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'sat-add_s-neg': [ + [str(self.lane.min)] * self.LANE_LEN, + [str(self.lane.max)] * self.LANE_LEN, + ['-1'] * self.LANE_LEN + ], + 'sat-add_u-neg': [ + [str(self.lane.max)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN, + [str(self.lane.mask)] * self.LANE_LEN + ], + 'sat-sub_s-neg': [ + [str(self.lane.min)] * self.LANE_LEN, + [str(self.lane.max)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN + ], + 'sat-sub_u-neg': [ + [str(self.lane.max)] * self.LANE_LEN, + [str(self.lane.min)] * self.LANE_LEN, + ['1'] * self.LANE_LEN + ] + } + + def get_combine_cases(self): + combine_cases = [';; combination\n(module'] + ternary_fn_template = ' (func (export "{fn}") (param v128 v128 v128) (result v128)\n' \ + ' ({lane}.{op1} ({lane}.{op2} (local.get 0) (local.get 1))'\ + '(local.get 2)))' + for fn_name in sorted(self.combine_ternary_arith_test_data): + fn_parts = fn_name.split('-') + operator1 = fn_parts[1].replace('_', '_saturate_') + operator2 = fn_parts[2].replace('_', '_saturate_') + combine_cases.append(ternary_fn_template.format(fn=fn_name, + lane=self.LANE_TYPE, + op1=operator1, + op2=operator2)) + binary_fn_template = ' (func (export "{fn}") (param v128 v128) (result v128)\n'\ + ' ({lane}.{op1} ({lane}.{op2} (local.get 0)) (local.get 1)))' + for fn_name in sorted(self.combine_binary_arith_test_data): + fn_parts = fn_name.split('-') + operator1 = fn_parts[1].replace('_', '_saturate_') + combine_cases.append(binary_fn_template.format(fn=fn_name, + lane=self.LANE_TYPE, + op1=operator1, + op2=fn_parts[2])) + combine_cases.append(')\n') + ternary_case_template = ('(assert_return (invoke "{}" ', + '(v128.const {} {})', + '(v128.const {} {})', + '(v128.const {} {}))', + '(v128.const {} {}))') + for fn_name, test in sorted(self.combine_ternary_arith_test_data.items()): + line_head = ternary_case_template[0].format(fn_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + combine_cases.append('\n'.join([ + line_head + ternary_case_template[1].format( + self.LANE_TYPE, ' '.join(test[0])), + blank_head + ternary_case_template[2].format( + self.LANE_TYPE, ' '.join(test[1])), + blank_head + ternary_case_template[3].format( + self.LANE_TYPE, ' '.join(test[2])), + blank_head + ternary_case_template[4].format( + self.LANE_TYPE, ' '.join(test[3]))])) + binary_case_template = ('(assert_return (invoke "{}" ', + '(v128.const {} {})', + '(v128.const {} {}))', + '(v128.const {} {}))') + for fn_name, test in sorted(self.combine_binary_arith_test_data.items()): + line_head = binary_case_template[0].format(fn_name) + line_head_len = len(line_head) + blank_head = ' ' * line_head_len + combine_cases.append('\n'.join([ + line_head + binary_case_template[1].format( + self.LANE_TYPE, ' '.join(test[0])), + blank_head + binary_case_template[2].format( + self.LANE_TYPE, ' '.join(test[1])), + blank_head + binary_case_template[3].format( + self.LANE_TYPE, ' '.join(test[2]))])) + return '\n'.join(combine_cases) + + +class SimdI8x16SaturateArithmeticCases(SimdSaturateArithmeticCases): + LANE_LEN = 16 + LANE_TYPE = 'i8x16' + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3f', '0x40'), + ('0x40', '0x40'), + ('-0x3f', '-0x40'), + ('-0x40', '-0x40'), + ('-0x40', '-0x41'), + ('0x7f', '0x7f'), + ('0x7f', '0x01'), + ('0x80', '-0x01'), + ('0x7f', '0x80'), + ('0x80', '0x80'), + ('0xff', '0x01'), + ('0xff', '0xff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x80', '-0x7f', '0x7f', '0x80', '0xff'] + + @property + def i8x16_f32x4_test_data(self): + return { + 'i8x16.add_saturate_s': [ + [['0x80', '-0.0'], '0x80', ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0x81', '0x7f'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0x81', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0xc1', '0x7f'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-nan'], ['0x01', '0x01', '0xc1', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']] + ], + 'i8x16.add_saturate_u': [ + [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0x81', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0x81', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0xc1', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-nan'], ['0x01', '0x01', '0xc1', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], + ], + 'i8x16.sub_saturate_s': [ + [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0x7f', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0x7f', '0x02'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0x41', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-nan'], ['0x01', '0x01', '0x41', '0x02'] * 4, ['i8x16', 'f32x4', 'i8x16']], + ], + 'i8x16.sub_saturate_u': [ + [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '+inf'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-inf'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', 'nan'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + [['1', '-nan'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], + ] + } + + @property + def combine_dec_hex_test_data(self): + return { + 'i8x16.add_saturate_s': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0'] * 16, ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.add_saturate_u': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0'] + ['0xff'] * 15, ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub_saturate_s': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0', '0x02', '0x04', '0x06', '0x08', '0x0a', '0x0c', '0x0e', '0x10', '0x12', '0x14', '0x16', + '0x18', '0x1a', '0x1c', '0x1e'], + ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub_saturate_u': [ + [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], + ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', + '0xf4', '0xf3', '0xf2', '0xf1']], + ['0'] * 16, + ['i8x16', 'i8x16', 'i8x16']] + ], + } + + @property + def range_test_data(self): + return { + 'i8x16.add_saturate_s': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + [str(i * 3) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.add_saturate_u': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + [str(i * 3) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub_saturate_s': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + [str(-i) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] + ], + 'i8x16.sub_saturate_u': [ + [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], + ['0'] * 16, ['i8x16', 'i8x16', 'i8x16']] + ], + } + + @property + def full_bin_test_data(self): + return [ + self.i8x16_f32x4_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + def get_malformed_cases(self): + malformed_cases = [] + # There is no saturating integer arithmetic operation for i32x4 or f32x4. + for prefix in ['i32x4', 'f32x4']: + for op in ['add', 'sub']: + for suffix in ['s', 'u']: + malformed_cases.append(self.malformed_template.format( + prefix, '_'.join([op, 'saturate', suffix]), + self.v128_const(prefix, '0', lane_len=4), + self.v128_const(prefix, '0', lane_len=4) + )) + return super().get_malformed_cases() + '\n' + '\n'.join(malformed_cases) + + +class SimdI16x8SaturateArithmeticCases(SimdSaturateArithmeticCases): + LANE_LEN = 8 + LANE_TYPE = 'i16x8' + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3fff', '0x4000'), + ('0x4000', '0x4000'), + ('-0x3fff', '-0x4000'), + ('-0x4000', '-0x4000'), + ('-0x4000', '-0x4001'), + ('0x7fff', '0x7fff'), + ('0x7fff', '0x01'), + ('0x8000', '-0x01'), + ('0x7fff', '0x8000'), + ('0x8000', '0x8000'), + ('0xffff', '0x01'), + ('0xffff', '0xffff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x8000', '-0x7fff', '0x7fff', '0x8000', '0xffff'] + + @property + def i16x8_f32x4_test_data(self): + return { + 'i16x8.add_saturate_s': [ + [['0x8000', '-0.0'], '0x8000', ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0x7f81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0xff81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-nan'], ['0x01', '0xffc1'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + 'i16x8.add_saturate_u': [ + [['0x8000', '-0.0'], ['0x8000', '0xffff'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0x7f81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0xff81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + 'i16x8.sub_saturate_s': [ + [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0x8081'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0x81'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0x8041'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-nan'], ['0x01', '0x41'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + 'i16x8.sub_saturate_u': [ + [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '+inf'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-inf'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', 'nan'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], + [['1', '-nan'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']] + ], + } + + @property + def combine_dec_hex_test_data(self): + return { + 'i16x8.add_saturate_s': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0'] * 8, ['i16x8'] * 3] + ], + 'i16x8.add_saturate_u': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0'] + ['0xffff'] * 7, ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_s': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0', '2', '4', '6', '8', '10', '12', '14'], ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_u': [ + [[['0', '1', '2', '3', '4', '5', '6', '7'], + ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], + ['0'] * 8, ['i16x8'] * 3] + ] + } + + @property + def range_test_data(self): + return { + 'i16x8.add_saturate_s': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + [str(i * 3) for i in range(8)], ['i16x8'] * 3] + ], + 'i16x8.add_saturate_u': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + [str(i * 3) for i in range(8)], ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_s': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + [str(-i) for i in range(8)], ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_u': [ + [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], + ['0'] * 8, ['i16x8'] * 3] + ] + } + + @property + def full_bin_test_data(self): + return [ + self.i16x8_f32x4_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + +def gen_test_cases(): + simd_i8x16_sat_arith = SimdI8x16SaturateArithmeticCases() + simd_i8x16_sat_arith.gen_test_cases() + simd_i16x8_sat_arith = SimdI16x8SaturateArithmeticCases() + simd_i16x8_sat_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/test_assert.py b/test/core/simd/meta/test_assert.py index 48a057576f..bbc2580388 100644 --- a/test/core/simd/meta/test_assert.py +++ b/test/core/simd/meta/test_assert.py @@ -10,7 +10,7 @@ # Generate assert_return to test -class AssertReturn(object): +class AssertReturn: instruction = '' instruction_param = '' @@ -19,10 +19,6 @@ class AssertReturn(object): def __init__(self, instruction, instruction_param, expected_result): super(AssertReturn, self).__init__() - # Check the init parameters - if not instruction or not instruction_param or not expected_result: - raise Exception('AssertReturn: wrong param.') - # Convert to list if got str if isinstance(instruction_param, str): instruction_param = [instruction_param] @@ -49,8 +45,8 @@ def __str__(self): results = [] for result in self.expected_result: white_space = ' ' - if len(result) != 0: + if len(params) != 0 or len(results) != 0: white_space = '\n ' + ' ' * head_len results.append(white_space + result) - return '{}{}){})'.format(assert_return, ''.join(params), ''.join(results)) + return '{}{}){})'.format(assert_return, ''.join(params), ''.join(results)) \ No newline at end of file diff --git a/test/core/simd/simd_bit_shift.wast b/test/core/simd/simd_bit_shift.wast new file mode 100644 index 0000000000..95b8140e41 --- /dev/null +++ b/test/core/simd/simd_bit_shift.wast @@ -0,0 +1,943 @@ +;; Test all the bit shift operators on major boundary values and all special values. + +(module + (func (export "i8x16.shl") (param $0 v128) (param $1 i32) (result v128) (i8x16.shl (local.get $0) (local.get $1))) + (func (export "i8x16.shr_s") (param $0 v128) (param $1 i32) (result v128) (i8x16.shr_s (local.get $0) (local.get $1))) + (func (export "i8x16.shr_u") (param $0 v128) (param $1 i32) (result v128) (i8x16.shr_u (local.get $0) (local.get $1))) + + (func (export "i16x8.shl") (param $0 v128) (param $1 i32) (result v128) (i16x8.shl (local.get $0) (local.get $1))) + (func (export "i16x8.shr_s") (param $0 v128) (param $1 i32) (result v128) (i16x8.shr_s (local.get $0) (local.get $1))) + (func (export "i16x8.shr_u") (param $0 v128) (param $1 i32) (result v128) (i16x8.shr_u (local.get $0) (local.get $1))) + + (func (export "i32x4.shl") (param $0 v128) (param $1 i32) (result v128) (i32x4.shl (local.get $0) (local.get $1))) + (func (export "i32x4.shr_s") (param $0 v128) (param $1 i32) (result v128) (i32x4.shr_s (local.get $0) (local.get $1))) + (func (export "i32x4.shr_u") (param $0 v128) (param $1 i32) (result v128) (i32x4.shr_u (local.get $0) (local.get $1))) + + (func (export "i64x2.shl") (param $0 v128) (param $1 i32) (result v128) (i64x2.shl (local.get $0) (local.get $1))) + (func (export "i64x2.shr_s") (param $0 v128) (param $1 i32) (result v128) (i64x2.shr_s (local.get $0) (local.get $1))) + (func (export "i64x2.shr_u") (param $0 v128) (param $1 i32) (result v128) (i64x2.shr_u (local.get $0) (local.get $1))) + + ;; shifting by a constant amount + ;; i8x16 + (func (export "i8x16.shl_1") (param $0 v128) (result v128) (i8x16.shl (local.get $0) (i32.const 1))) + (func (export "i8x16.shr_u_8") (param $0 v128) (result v128) (i8x16.shr_u (local.get $0) (i32.const 8))) + (func (export "i8x16.shr_s_9") (param $0 v128) (result v128) (i8x16.shr_s (local.get $0) (i32.const 9))) + + ;; i16x8 + (func (export "i16x8.shl_1") (param $0 v128) (result v128) (i16x8.shl (local.get $0) (i32.const 1))) + (func (export "i16x8.shr_u_16") (param $0 v128) (result v128) (i16x8.shr_u (local.get $0) (i32.const 16))) + (func (export "i16x8.shr_s_17") (param $0 v128) (result v128) (i16x8.shr_s (local.get $0) (i32.const 17))) + + ;; i32x4 + (func (export "i32x4.shl_1") (param $0 v128) (result v128) (i32x4.shl (local.get $0) (i32.const 1))) + (func (export "i32x4.shr_u_32") (param $0 v128) (result v128) (i32x4.shr_u (local.get $0) (i32.const 32))) + (func (export "i32x4.shr_s_33") (param $0 v128) (result v128) (i32x4.shr_s (local.get $0) (i32.const 33))) + + ;; i64x2 + (func (export "i64x2.shl_1") (param $0 v128) (result v128) (i64x2.shl (local.get $0) (i32.const 1))) + (func (export "i64x2.shr_u_64") (param $0 v128) (result v128) (i64x2.shr_u (local.get $0) (i32.const 64))) + (func (export "i64x2.shr_s_65") (param $0 v128) (result v128) (i64x2.shr_s (local.get $0) (i32.const 65))) +) + +;; i8x16 shl +;; amount less than lane width +(assert_return (invoke "i8x16.shl" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 1)) + (v128.const i8x16 0 -128 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0xAA 0xBB 0xCC 0xDD 0xEE 0xFF 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 0x0A 0x0B 0x0C 0x0D) + (i32.const 4)) + (v128.const i8x16 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 0x00 0x00 0x00 0x00 0x00 0x00 0xA0 0xB0 0xC0 0xD0)) +;; amount is multiple of lane width +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 8)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 32)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 128)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 256)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i8x16.shl" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 9)) + (v128.const i8x16 0 -128 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 9)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 17)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 33)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 129)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 257)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 513)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shl" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 514)) + (v128.const i8x16 0 4 8 12 16 20 24 28 32 36 0x28 0x2C 0x30 0x34 0x38 0x3C)) +;; i8x16 shr_u +;; amount less than lane width +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 1)) + (v128.const i8x16 64 96 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0xAA 0xBB 0xCC 0xDD 0xEE 0xFF 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 0x0A 0x0B 0x0C 0x0D) + (i32.const 4)) + (v128.const i8x16 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0x00 0x00 0x00)) +;; amount is multiple of lane width +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 8)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 32)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 128)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 256)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 9)) + (v128.const i8x16 64 96 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 9)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 17)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 33)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 129)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 257)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 513)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 514)) + (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 0x02 0x02 0x03 0x03 0x03 0x03)) +;; i8x16 shr_s +;; amount less than lane width +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 1)) + (v128.const i8x16 192 224 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0xAA 0xBB 0xCC 0xDD 0xEE 0xFF 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 0x0A 0x0B 0x0C 0x0D) + (i32.const 4)) + (v128.const i8x16 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF 0x00 0x00 0x00 0x00)) +;; amount is multiple of lane width +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 8)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 32)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 128)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 256)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 -128 -64 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D) + (i32.const 9)) + (v128.const i8x16 192 224 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 9)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 17)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 33)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 129)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 257)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 513)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) +(assert_return (invoke "i8x16.shr_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F) + (i32.const 514)) + (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 0x02 0x02 0x03 0x03 0x03 0x03)) +;; shifting by a constant amount +(assert_return (invoke "i8x16.shl_1" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 0x14 0x16 0x18 0x1A 0x1C 0x1E)) +(assert_return (invoke "i8x16.shr_u_8" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) +(assert_return (invoke "i8x16.shr_s_9" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 0x0A 0x0B 0x0C 0x0D 0x0e 0x0F)) + (v128.const i8x16 0 0 1 1 2 2 3 3 4 4 0x05 0x05 0x06 0x06 0x07 0x07)) + +;; i16x8 shl +;; amount less than lane width +(assert_return (invoke "i16x8.shl" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 1)) + (v128.const i16x8 65280 65408 0 2 4 6 8 10)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) + (i32.const 4)) + (v128.const i16x8 0xABB0 0xCDD0 0xEFF0 0xB00 0xD00 0xF00 0xA0B0 0xC0D0)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 8)) + (v128.const i16x8 0 256 512 768 1024 1280 1536 1792)) +;; amount is multiple of lane width +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 32)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 128)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 256)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i16x8.shl" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 17)) + (v128.const i16x8 65280 65408 0 2 4 6 8 10)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 17)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 33)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 129)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 257)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 513)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 514)) + (v128.const i16x8 0 4 8 12 16 20 24 28)) +;; i16x8 shr_u +;; amount less than lane width +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 1)) + (v128.const i16x8 32704 32736 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) + (i32.const 4)) + (v128.const i16x8 0xAAB 0xCCD 0xEEF 0xA0B 0xC0D 0xE0F 0x0A0 0x0C0)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 8)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +;; amount is multiple of lane width +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 32)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 128)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 256)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 17)) + (v128.const i16x8 32704 32736 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 17)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 33)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 129)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 257)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 513)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 514)) + (v128.const i16x8 0 0 0 0 1 1 1 1)) +;; i16x8 shr_s +;; amount less than lane width +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 1)) + (v128.const i16x8 65472 65504 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) + (i32.const 4)) + (v128.const i16x8 0xFAAB 0xFCCD 0xFEEF 0xFA0B 0xFC0D 0xFE0F 0x00A0 0x00C0)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 8)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +;; amount is multiple of lane width +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 32)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 128)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 256)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 -128 -64 0 1 2 3 4 5) + (i32.const 17)) + (v128.const i16x8 65472 65504 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 17)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 33)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 129)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 257)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 513)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (i32.const 514)) + (v128.const i16x8 0 0 0 0 1 1 1 1)) +;; shifting by a constant amount +(assert_return (invoke "i16x8.shl_1" (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.shr_u_16" (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "i16x8.shr_s_17" (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 0 1 1 2 2 3 3)) + +;; i32x4 shl +;; amount less than lane width +(assert_return (invoke "i32x4.shl" (v128.const i32x4 -2147483648 -32768 0 0x0A0B0C0D) + (i32.const 1)) + (v128.const i32x4 0 4294901760 0 0x1416181A)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) + (i32.const 4)) + (v128.const i32x4 0xABBCCDD0 0xEFFA0B00 0x0D0E0F00 0xA0B0C0D0)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 8)) + (v128.const i32x4 0 256 0x00000E00 0x00000F00)) +;; amount is multiple of lane width +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 32)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 128)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 256)) + (v128.const i32x4 0 1 0x0E 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i32x4.shl" (v128.const i32x4 -2147483648 -32768 0 0x0A0B0C0D) + (i32.const 33)) + (v128.const i32x4 0 4294901760 0 0x1416181A)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 33)) + (v128.const i32x4 0 2 0x1C 0x1E)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 65)) + (v128.const i32x4 0 2 0x1C 0x1E)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 129)) + (v128.const i32x4 0 2 0x1C 0x1E)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 257)) + (v128.const i32x4 0 2 0x1C 0x1E)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 513)) + (v128.const i32x4 0 2 0x1C 0x1E)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 514)) + (v128.const i32x4 0 4 0x38 0x3C)) +;; i32x4 shr_u +;; amount less than lane width +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 -2147483648 -32768 0x0000000C 0x0000000D) + (i32.const 1)) + (v128.const i32x4 1073741824 2147467264 0x00000006 0x00000006)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) + (i32.const 4)) + (v128.const i32x4 0x0AABBCCD 0x0EEFFA0B 0x0C0D0E0F 0x00A0B0C0)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 8)) + (v128.const i32x4 0 0 0x00000000 0x00000000)) +;; amount is multiple of lane width +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 32)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 128)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 256)) + (v128.const i32x4 0 1 0x0E 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 -2147483648 -32768 0x0000000C 0x0000000D) + (i32.const 33)) + (v128.const i32x4 1073741824 2147467264 0x00000006 0x00000006)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 33)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 65)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 129)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 257)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 513)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 514)) + (v128.const i32x4 0 0 0x03 0x03)) +;; i32x4 shr_s +;; amount less than lane width +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 -2147483648 -32768 0x0C 0x0D) + (i32.const 1)) + (v128.const i32x4 3221225472 4294950912 0x06 0x06)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) + (i32.const 4)) + (v128.const i32x4 0xfaabbccd 0xFEEFFA0B 0xFC0D0E0F 0x00A0B0C0)) +;; amount is multiple of lane width +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 8)) + (v128.const i32x4 0 0 0x00000000 0x00000000)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 32)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 128)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 256)) + (v128.const i32x4 0 1 0x0E 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 -2147483648 -32768 0x0C 0x0D) + (i32.const 33)) + (v128.const i32x4 3221225472 4294950912 0x06 0x06)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 33)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 65)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 129)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 257)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 513)) + (v128.const i32x4 0 0 0x07 0x07)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0 1 0x0E 0x0F) + (i32.const 514)) + (v128.const i32x4 0 0 0x03 0x03)) + +;; shifting by a constant amount +(assert_return (invoke "i32x4.shl_1" (v128.const i32x4 0 1 0x0E 0x0F)) + (v128.const i32x4 0 2 28 30)) +(assert_return (invoke "i32x4.shr_u_32" (v128.const i32x4 0 1 0x0E 0x0F)) + (v128.const i32x4 0 1 0x0E 0x0F)) +(assert_return (invoke "i32x4.shr_s_33" (v128.const i32x4 0 1 0x0E 0x0F)) + (v128.const i32x4 0 0 7 7)) + +;; i64x2 shl +;; amount less than lane width +(assert_return (invoke "i64x2.shl" (v128.const i64x2 -9223372036854775808 -2147483648) + (i32.const 1)) + (v128.const i64x2 0 18446744069414584320)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) + (i32.const 4)) + (v128.const i64x2 0xABBCCDDEEFFA0B00 0xD0E0F00A0B0C0D0)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) + (i32.const 8)) + (v128.const i64x2 0xBBCCDDEEFFA0B000 0xD0E0F00A0B0C0D00)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 16)) + (v128.const i64x2 65536 0xF0000)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 32)) + (v128.const i64x2 4294967296 0xF00000000)) +;; amount is multiple of lane width +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 128)) + (v128.const i64x2 1 0x0F)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 256)) + (v128.const i64x2 1 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 65)) + (v128.const i64x2 2 0x1E)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 129)) + (v128.const i64x2 2 0x1E)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 257)) + (v128.const i64x2 2 0x1E)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 513)) + (v128.const i64x2 2 0x1E)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) + (i32.const 514)) + (v128.const i64x2 4 0x3C)) +;; i64x2 shr_u +;; amount less than lane width +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 -9223372036854775808 -2147483648) + (i32.const 1)) + (v128.const i64x2 4611686018427387904 9223372035781033984)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) + (i32.const 4)) + (v128.const i64x2 0xAABBCCDDEEFFA0B 0xC0D0E0F00A0B0C0)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) + (i32.const 8)) + (v128.const i64x2 0xAABBCCDDEEFFA0 0xC0D0E0F00A0B0C)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 16)) + (v128.const i64x2 0 0x00)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 32)) + (v128.const i64x2 0 0x00)) +;; amount is multiple of lane width +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 128)) + (v128.const i64x2 1 0x0F)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 256)) + (v128.const i64x2 1 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 65)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 129)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 257)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 1 0x0F) + (i32.const 513)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0 0x0F) + (i32.const 514)) + (v128.const i64x2 0 0x03)) +;; i64x2 shr_s +;; amount less than lane width +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 -9223372036854775808 -2147483648) + (i32.const 1)) + (v128.const i64x2 13835058055282163712 18446744072635809792)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) + (i32.const 4)) + (v128.const i64x2 0xFAABBCCDDEEFFA0B 0xFC0D0E0F00A0B0C0)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 0xFFAABBCCDDEEFFA0 0xC0D0E0F00A0B0C0D) + (i32.const 8)) + (v128.const i64x2 0xFFFFAABBCCDDEEFF 0xFFC0D0E0F00A0B0C)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 16)) + (v128.const i64x2 0 0x00)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 32)) + (v128.const i64x2 0 0x00)) +;; amount is multiple of lane width +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 128)) + (v128.const i64x2 1 0x0F)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 256)) + (v128.const i64x2 1 0x0F)) +;; amount greater than but not a multiple of lane width +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 -9223372036854775808 -2147483648) + (i32.const 65)) + (v128.const i64x2 13835058055282163712 18446744072635809792)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 0x0C 0x0D) + (i32.const 65)) + (v128.const i64x2 0x06 0x06)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 129)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 257)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 513)) + (v128.const i64x2 0 0x07)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) + (i32.const 514)) + (v128.const i64x2 0 0x03)) +;; shifting by a constant amount +(assert_return (invoke "i64x2.shl_1" (v128.const i64x2 1 0x0F)) + (v128.const i64x2 2 0x1E)) +(assert_return (invoke "i64x2.shr_u_64" (v128.const i64x2 1 0x0F)) + (v128.const i64x2 1 0x0F)) +(assert_return (invoke "i64x2.shr_s_65" (v128.const i64x2 1 0x0F)) + (v128.const i64x2 0 0x07)) + +;; Combination + +(module (memory 1) + (func (export "i8x16.shl-in-block") + (block + (drop + (block (result v128) + (i8x16.shl + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i8x16.shr_s-in-block") + (block + (drop + (block (result v128) + (i8x16.shr_s + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i8x16.shr_u-in-block") + (block + (drop + (block (result v128) + (i8x16.shr_u + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i16x8.shl-in-block") + (block + (drop + (block (result v128) + (i16x8.shl + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i16x8.shr_s-in-block") + (block + (drop + (block (result v128) + (i16x8.shr_s + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i16x8.shr_u-in-block") + (block + (drop + (block (result v128) + (i16x8.shr_u + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i32x4.shl-in-block") + (block + (drop + (block (result v128) + (i32x4.shl + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i32x4.shr_s-in-block") + (block + (drop + (block (result v128) + (i32x4.shr_s + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i32x4.shr_u-in-block") + (block + (drop + (block (result v128) + (i32x4.shr_u + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i64x2.shl-in-block") + (block + (drop + (block (result v128) + (i64x2.shl + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i64x2.shr_s-in-block") + (block + (drop + (block (result v128) + (i64x2.shr_s + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "i64x2.shr_u-in-block") + (block + (drop + (block (result v128) + (i64x2.shr_u + (block (result v128) (v128.load (i32.const 0))) (i32.const 1) + ) + ) + ) + ) + ) + (func (export "nested-i8x16.shl") + (drop + (i8x16.shl + (i8x16.shl + (i8x16.shl + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i8x16.shr_s") + (drop + (i8x16.shr_s + (i8x16.shr_s + (i8x16.shr_s + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i8x16.shr_u") + (drop + (i8x16.shr_u + (i8x16.shr_u + (i8x16.shr_u + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i16x8.shl") + (drop + (i16x8.shl + (i16x8.shl + (i16x8.shl + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i16x8.shr_s") + (drop + (i16x8.shr_s + (i16x8.shr_s + (i16x8.shr_s + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i16x8.shr_u") + (drop + (i16x8.shr_u + (i16x8.shr_u + (i16x8.shr_u + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i32x4.shl") + (drop + (i32x4.shl + (i32x4.shl + (i32x4.shl + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i32x4.shr_s") + (drop + (i32x4.shr_s + (i32x4.shr_s + (i32x4.shr_s + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i32x4.shr_u") + (drop + (i32x4.shr_u + (i32x4.shr_u + (i32x4.shr_u + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i64x2.shl") + (drop + (i64x2.shl + (i64x2.shl + (i64x2.shl + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i64x2.shr_s") + (drop + (i64x2.shr_s + (i64x2.shr_s + (i64x2.shr_s + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) + (func (export "nested-i64x2.shr_u") + (drop + (i64x2.shr_u + (i64x2.shr_u + (i64x2.shr_u + (v128.load (i32.const 0)) (i32.const 1) + ) + (i32.const 1) + ) + (i32.const 1) + ) + ) + ) +) + +(assert_return (invoke "i8x16.shl-in-block")) +(assert_return (invoke "i8x16.shr_s-in-block")) +(assert_return (invoke "i8x16.shr_u-in-block")) +(assert_return (invoke "i16x8.shl-in-block")) +(assert_return (invoke "i16x8.shr_s-in-block")) +(assert_return (invoke "i16x8.shr_u-in-block")) +(assert_return (invoke "i32x4.shl-in-block")) +(assert_return (invoke "i32x4.shr_s-in-block")) +(assert_return (invoke "i32x4.shr_u-in-block")) +(assert_return (invoke "i64x2.shl-in-block")) +(assert_return (invoke "i64x2.shr_s-in-block")) +(assert_return (invoke "i64x2.shr_u-in-block")) +(assert_return (invoke "nested-i8x16.shl")) +(assert_return (invoke "nested-i8x16.shr_s")) +(assert_return (invoke "nested-i8x16.shr_u")) +(assert_return (invoke "nested-i16x8.shl")) +(assert_return (invoke "nested-i16x8.shr_s")) +(assert_return (invoke "nested-i16x8.shr_u")) +(assert_return (invoke "nested-i32x4.shl")) +(assert_return (invoke "nested-i32x4.shr_s")) +(assert_return (invoke "nested-i32x4.shr_u")) +(assert_return (invoke "nested-i64x2.shl")) +(assert_return (invoke "nested-i64x2.shr_s")) +(assert_return (invoke "nested-i64x2.shr_u")) + +;; Type check + +(assert_invalid (module (func (result v128) (i8x16.shl (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.shr_s (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.shr_u (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.shl (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.shr_s (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.shr_u (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.shl (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.shr_s (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.shr_u (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.shl (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.shr_s (i32.const 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.shr_u (i32.const 0) (i32.const 0)))) "type mismatch") + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.shl_s (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.shl_r (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.shr (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.shl_s (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.shl_r (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.shr (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.shl_s (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.shl_r (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.shr (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.shl_s (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.shl_r (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.shr (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shl (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shr_s (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shr_u (v128.const i32x4 0 0 0 0)))") "unknown operator") \ No newline at end of file diff --git a/test/core/simd/simd_bitwise.wast b/test/core/simd/simd_bitwise.wast new file mode 100644 index 0000000000..f018c09497 --- /dev/null +++ b/test/core/simd/simd_bitwise.wast @@ -0,0 +1,566 @@ +;; Test all the bitwise operators on major boundary values and all special values. + +(module + (func (export "not") (param $0 v128) (result v128) (v128.not (local.get $0))) + (func (export "and") (param $0 v128) (param $1 v128) (result v128) (v128.and (local.get $0) (local.get $1))) + (func (export "or") (param $0 v128) (param $1 v128) (result v128) (v128.or (local.get $0) (local.get $1))) + (func (export "xor") (param $0 v128) (param $1 v128) (result v128) (v128.xor (local.get $0) (local.get $1))) + (func (export "bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (v128.bitselect (local.get $0) (local.get $1) (local.get $2)) + ) +) + +;; i32x4 +(assert_return (invoke "not" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "not" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "not" (v128.const i32x4 -1 0 -1 0)) + (v128.const i32x4 0 -1 0 -1)) +(assert_return (invoke "not" (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 -1 0 -1 0)) +(assert_return (invoke "not" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) +(assert_return (invoke "not" (v128.const i32x4 3435973836 3435973836 3435973836 3435973836)) + (v128.const i32x4 858993459 858993459 858993459 858993459)) +(assert_return (invoke "and" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 0 0 -1)) +(assert_return (invoke "and" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "and" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "and" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "and" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "and" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 85 85 85 85)) + (v128.const i32x4 85 85 85 85)) +(assert_return (invoke "and" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 128 128 128 128)) +(assert_return (invoke "and" (v128.const i32x4 2863311530 2863311530 2863311530 2863311530) + (v128.const i32x4 10 128 5 165)) + (v128.const i32x4 10 128 0 160)) +(assert_return (invoke "and" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) +(assert_return (invoke "and" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) +(assert_return (invoke "and" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x0 0x0 0x0 0x0)) + (v128.const i32x4 0x0 0x0 0x0 0x0)) +(assert_return (invoke "and" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) + (v128.const i32x4 0x5555 0x5555 0x5555 0x5555)) +(assert_return (invoke "or" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "or" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "or" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "or" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "or" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "or" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 85 85 85 85)) + (v128.const i32x4 255 255 255 255)) +(assert_return (invoke "or" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 255 255 255 255)) +(assert_return (invoke "or" (v128.const i32x4 2863311530 2863311530 2863311530 2863311530) + (v128.const i32x4 10 128 5 165)) + (v128.const i32x4 2863311530 2863311530 2863311535 2863311535)) +(assert_return (invoke "or" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "or" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "or" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x0 0x0 0x0 0x0)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "or" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) + (v128.const i32x4 0x55555555 0x5555ffff 0x555555ff 0x55555fff)) +(assert_return (invoke "xor" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 -1 -1 0)) +(assert_return (invoke "xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "xor" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 85 85 85 85)) + (v128.const i32x4 170 170 170 170)) +(assert_return (invoke "xor" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 127 127 127 127)) +(assert_return (invoke "xor" (v128.const i32x4 2863311530 2863311530 2863311530 2863311530) + (v128.const i32x4 10 128 5 165)) + (v128.const i32x4 2863311520 2863311402 2863311535 2863311375)) +(assert_return (invoke "xor" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) +(assert_return (invoke "xor" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) +(assert_return (invoke "xor" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x0 0x0 0x0 0x0)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "xor" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) + (v128.const i32x4 0x55550000 0x5555AAAA 0x555500AA 0x55550AAA)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB) + (v128.const i32x4 0x00112345 0xF00FFFFF 0x10112021 0xBBAABBAA)) + (v128.const i32x4 0xBBAABABA 0xABBAAAAA 0xABAABBBA 0xAABBAABB)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) + (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB) + (v128.const i32x4 0x11111111 0x11111111 0x11111111 0x11111111)) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB) + (v128.const i32x4 0x01234567 0x89ABCDEF 0xFEDCBA98 0x76543210)) + (v128.const i32x4 0xBABABABA 0xBABABABA 0xABABABAB 0xABABABAB)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x01234567 0x89ABCDEF 0xFEDCBA98 0x76543210)) + (v128.const i32x4 0x54761032 0xDCFE98BA 0xAB89EFCD 0x23016745)) +(assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x55555555 0xAAAAAAAA 0x00000000 0xFFFFFFFF)) + (v128.const i32x4 0x00000000 0xFFFFFFFF 0x55555555 0xAAAAAAAA)) + +;; for float special data [e.g. -nan nan -inf inf] +(assert_return (invoke "not" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 5.87747e-39 5.87747e-39 5.87747e-39 5.87747e-39)) +(assert_return (invoke "not" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -5.87747e-39 -5.87747e-39 -5.87747e-39 -5.87747e-39)) +(assert_return (invoke "not" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x007fffff 0x007fffff 0x007fffff 0x007fffff)) +(assert_return (invoke "not" (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x807fffff 0x807fffff 0x807fffff 0x807fffff)) +(assert_return (invoke "and" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "and" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "and" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "and" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "and" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "and" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "and" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "and" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "and" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "and" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "or" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "or" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "or" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "or" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "or" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "or" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "or" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "or" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "or" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "or" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "xor" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0 -0 -0 -0)) +(assert_return (invoke "xor" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x00400000 0x00400000 0x00400000 0x00400000)) +(assert_return (invoke "xor" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x80400000 0x80400000 0x80400000 0x80400000)) +(assert_return (invoke "xor" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x80400000 0x80400000 0x80400000 0x80400000)) +(assert_return (invoke "xor" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x00400000 0x00400000 0x00400000 0x00400000)) +(assert_return (invoke "xor" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "xor" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0 0 0 0)) +(assert_return (invoke "bitselect" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const i32x4 0xffc00000 0xffc00000 0xffc00000 0xffc00000)) +(assert_return (invoke "bitselect" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "bitselect" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "bitselect" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "bitselect" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) + (v128.const f32x4 inf inf inf inf)) + +;; Type check + +;; not +(assert_invalid (module (func (result v128) (v128.not (i32.const 0)))) "type mismatch") +;; and +(assert_invalid (module (func (result v128) (v128.and (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.and (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.and (i32.const 0) (i32.const 0)))) "type mismatch") +;; or +(assert_invalid (module (func (result v128) (v128.or (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.or (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.or (i32.const 0) (i32.const 0)))) "type mismatch") +;; xor +(assert_invalid (module (func (result v128) (v128.xor (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.xor (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.xor (i32.const 0) (i32.const 0)))) "type mismatch") +;; bitselect +(assert_invalid (module (func (result v128) (v128.bitselect (i32.const 0) (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.bitselect (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.bitselect (i32.const 0) (i32.const 0) (i32.const 0)))) "type mismatch") + +;; Combination + +(module (memory 1) + (func (export "v128.not-in-block") + (block + (drop + (block (result v128) + (v128.not + (block (result v128) (v128.load (i32.const 0))) + ) + ) + ) + ) + ) + (func (export "v128.and-in-block") + (block + (drop + (block (result v128) + (v128.and + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "v128.or-in-block") + (block + (drop + (block (result v128) + (v128.or + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "v128.xor-in-block") + (block + (drop + (block (result v128) + (v128.xor + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "v128.bitselect-in-block") + (block + (drop + (block (result v128) + (v128.bitselect + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + (block (result v128) (v128.load (i32.const 2))) + ) + ) + ) + ) + ) + (func (export "nested-v128.not") + (drop + (v128.not + (v128.not + (v128.not + (v128.load (i32.const 0)) + ) + ) + ) + ) + ) + (func (export "nested-v128.and") + (drop + (v128.and + (v128.and + (v128.and + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.and + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + (v128.and + (v128.and + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.and + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + ) + ) + ) + (func (export "nested-v128.or") + (drop + (v128.or + (v128.or + (v128.or + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.or + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + (v128.or + (v128.or + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.or + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + ) + ) + ) + (func (export "nested-v128.xor") + (drop + (v128.xor + (v128.xor + (v128.xor + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.xor + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + (v128.xor + (v128.xor + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.xor + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + ) + ) + ) + (func (export "nested-v128.bitselect") + (drop + (v128.bitselect + (v128.bitselect + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + ) + (v128.bitselect + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + ) + (v128.bitselect + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (v128.or + (v128.and + (v128.not + (v128.load (i32.const 0)) + ) + (v128.not + (v128.load (i32.const 1)) + ) + ) + (v128.xor + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + (v128.bitselect + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + (v128.load (i32.const 2)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "v128.not-in-block")) +(assert_return (invoke "v128.and-in-block")) +(assert_return (invoke "v128.or-in-block")) +(assert_return (invoke "v128.xor-in-block")) +(assert_return (invoke "v128.bitselect-in-block")) +(assert_return (invoke "nested-v128.not")) +(assert_return (invoke "nested-v128.and")) +(assert_return (invoke "nested-v128.or")) +(assert_return (invoke "nested-v128.xor")) +(assert_return (invoke "nested-v128.bitselect")) +(assert_return (invoke "as-param")) \ No newline at end of file diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast new file mode 100644 index 0000000000..402c0c9840 --- /dev/null +++ b/test/core/simd/simd_boolean.wast @@ -0,0 +1,950 @@ +;; Test all the boolean operators on major boundary values and all special values. + +(module + (func (export "i8x16.any_true") (param $0 v128) (result i32) (i8x16.any_true (local.get $0))) + (func (export "i8x16.all_true") (param $0 v128) (result i32) (i8x16.all_true (local.get $0))) + + (func (export "i16x8.any_true") (param $0 v128) (result i32) (i16x8.any_true (local.get $0))) + (func (export "i16x8.all_true") (param $0 v128) (result i32) (i16x8.all_true (local.get $0))) + + (func (export "i32x4.any_true") (param $0 v128) (result i32) (i32x4.any_true (local.get $0))) + (func (export "i32x4.all_true") (param $0 v128) (result i32) (i32x4.all_true (local.get $0))) +) + +;; i8x16 +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 -1 0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD 0xF)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i8x16.any_true" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 1)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 -1 0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD 0xF)) + (i32.const 0)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i8x16.all_true" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 1)) + +;; i16x8 +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 -1 0 1 2 0xB 0xC 0xD 0xF)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 1)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 -1 0 1 2 0xB 0xC 0xD 0xF)) + (i32.const 0)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 1)) + +;; i32x4 +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 -1 0 1 0xF)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0x55 0x55 0x55 0x55)) + (i32.const 1)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 -1 0 1 0xF)) + (i32.const 0)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0x00 0x00 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0xFF 0xFF 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0xAB 0xAB 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0x55 0x55 0x55 0x55)) + (i32.const 1)) + + +;; Combination + +(module (memory 1) + ;; as if condition + (func (export "i8x16_any_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i8x16.any_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + (func (export "i16x8_any_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i16x8.any_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + (func (export "i32x4_any_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i32x4.any_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + (func (export "i8x16_all_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i8x16.all_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + (func (export "i16x8_all_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i16x8.all_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + (func (export "i32x4_all_true_as_if_cond") (param v128) (result i32) + (if (result i32) (i32x4.all_true (local.get 0)) + (then (i32.const 1)) + (else (i32.const 0)) + ) + ) + ;; any_true as select condition + (func (export "i8x16_any_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i8x16.any_true (local.get 0))) + ) + (func (export "i16x8_any_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i16x8.any_true (local.get 0))) + ) + (func (export "i32x4_any_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i32x4.any_true (local.get 0))) + ) + ;; all_true as select condition + (func (export "i8x16_all_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i8x16.all_true (local.get 0))) + ) + (func (export "i16x8_all_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i16x8.all_true (local.get 0))) + ) + (func (export "i32x4_all_true_as_select_cond") (param v128) (result i32) + (select (i32.const 1) (i32.const 0) (i32x4.all_true (local.get 0))) + ) + ;; any_true as br_if condition + (func (export "i8x16_any_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i8x16.any_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + (func (export "i16x8_any_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i16x8.any_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + (func (export "i32x4_any_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i32x4.any_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + ;; all_true as br_if condition + (func (export "i8x16_all_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i8x16.all_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + (func (export "i16x8_all_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i16x8.all_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + (func (export "i32x4_all_true_as_br_if_cond") (param $0 v128) (result i32) + (local $1 i32) + (local.set $1 (i32.const 2)) + (block + (local.set $1 (i32.const 1)) + (br_if 0 (i32x4.all_true (local.get $0))) + (local.set $1 (i32.const 0)) + ) + (local.get $1) + ) + ;; any_true as i32.and operand + (func (export "i8x16_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + ) + (func (export "i16x8_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + ) + (func (export "i32x4_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + ) + ;; any_true as i32.or operand + (func (export "i8x16_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + ) + (func (export "i16x8_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + ) + (func (export "i32x4_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + ) + ;; any_true as i32.xor operand + (func (export "i8x16_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + ) + (func (export "i16x8_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + ) + (func (export "i32x4_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + ) + ;; all_true as i32.and operand + (func (export "i8x16_all_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i8x16.all_true (local.get $0)) (i8x16.all_true (local.get $1))) + ) + (func (export "i16x8_all_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i16x8.all_true (local.get $0)) (i16x8.all_true (local.get $1))) + ) + (func (export "i32x4_all_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.and (i32x4.all_true (local.get $0)) (i32x4.all_true (local.get $1))) + ) + ;; all_true as i32.or operand + (func (export "i8x16_all_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i8x16.all_true (local.get $0)) (i8x16.all_true (local.get $1))) + ) + (func (export "i16x8_all_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i16x8.all_true (local.get $0)) (i16x8.all_true (local.get $1))) + ) + (func (export "i32x4_all_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.or (i32x4.all_true (local.get $0)) (i32x4.all_true (local.get $1))) + ) + ;; all_true as i32.xor operand + (func (export "i8x16_all_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i8x16.all_true (local.get $0)) (i8x16.all_true (local.get $1))) + ) + (func (export "i16x8_all_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i16x8.all_true (local.get $0)) (i16x8.all_true (local.get $1))) + ) + (func (export "i32x4_all_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) + (i32.xor (i32x4.all_true (local.get $0)) (i32x4.all_true (local.get $1))) + ) + ;; any_true with v128.not + (func (export "i8x16_any_true_with_v128.not") (param $0 v128) (result i32) + (i8x16.any_true (v128.not (local.get $0))) + ) + (func (export "i16x8_any_true_with_v128.not") (param $0 v128) (result i32) + (i16x8.any_true (v128.not (local.get $0))) + ) + (func (export "i32x4_any_true_with_v128.not") (param $0 v128) (result i32) + (i32x4.any_true (v128.not (local.get $0))) + ) + ;; any_true with v128.and + (func (export "i8x16_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i8x16.any_true (v128.and (local.get $0) (local.get $1))) + ) + (func (export "i16x8_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i16x8.any_true (v128.and (local.get $0) (local.get $1))) + ) + (func (export "i32x4_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i32x4.any_true (v128.and (local.get $0) (local.get $1))) + ) + ;; any_true with v128.or + (func (export "i8x16_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i8x16.any_true (v128.or (local.get $0) (local.get $1))) + ) + (func (export "i16x8_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i16x8.any_true (v128.or (local.get $0) (local.get $1))) + ) + (func (export "i32x4_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i32x4.any_true (v128.or (local.get $0) (local.get $1))) + ) + ;; any_true with v128.xor + (func (export "i8x16_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i8x16.any_true (v128.xor (local.get $0) (local.get $1))) + ) + (func (export "i16x8_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i16x8.any_true (v128.xor (local.get $0) (local.get $1))) + ) + (func (export "i32x4_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i32x4.any_true (v128.xor (local.get $0) (local.get $1))) + ) + ;; any_true with v128.bitselect + (func (export "i8x16_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i8x16.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) + (func (export "i16x8_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i16x8.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) + (func (export "i32x4_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i32x4.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) + ;; all_true with v128.not + (func (export "i8x16_all_true_with_v128.not") (param $0 v128) (result i32) + (i8x16.all_true (v128.not (local.get $0))) + ) + (func (export "i16x8_all_true_with_v128.not") (param $0 v128) (result i32) + (i16x8.all_true (v128.not (local.get $0))) + ) + (func (export "i32x4_all_true_with_v128.not") (param $0 v128) (result i32) + (i32x4.all_true (v128.not (local.get $0))) + ) + ;; all_true with v128.and + (func (export "i8x16_all_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i8x16.all_true (v128.and (local.get $0) (local.get $1))) + ) + (func (export "i16x8_all_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i16x8.all_true (v128.and (local.get $0) (local.get $1))) + ) + (func (export "i32x4_all_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) + (i32x4.all_true (v128.and (local.get $0) (local.get $1))) + ) + ;; all_true with v128.or + (func (export "i8x16_all_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i8x16.all_true (v128.or (local.get $0) (local.get $1))) + ) + (func (export "i16x8_all_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i16x8.all_true (v128.or (local.get $0) (local.get $1))) + ) + (func (export "i32x4_all_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) + (i32x4.all_true (v128.or (local.get $0) (local.get $1))) + ) + ;; all_true with v128.xor + (func (export "i8x16_all_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i8x16.all_true (v128.xor (local.get $0) (local.get $1))) + ) + (func (export "i16x8_all_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i16x8.all_true (v128.xor (local.get $0) (local.get $1))) + ) + (func (export "i32x4_all_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) + (i32x4.all_true (v128.xor (local.get $0) (local.get $1))) + ) + ;; all_true with v128.bitselect + (func (export "i8x16_all_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i8x16.all_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) + (func (export "i16x8_all_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i16x8.all_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) + (func (export "i32x4_all_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) + (i32x4.all_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + ) +) + +;; 'any_true' as 'if' condition +;; i8x16 +(assert_return (invoke "i8x16_any_true_as_if_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_if_cond" (v128.const i8x16 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_as_if_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +;; i16x8 +(assert_return (invoke "i16x8_any_true_as_if_cond" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_if_cond" (v128.const i16x8 0 0 1 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_if_cond" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +;; i32x4 +(assert_return (invoke "i32x4_any_true_as_if_cond" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_if_cond" (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_if_cond" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) + +;; 'all_true' as 'if' condition +;; i8x16 +(assert_return (invoke "i8x16_all_true_as_if_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_as_if_cond" (v128.const i8x16 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_as_if_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +;; i16x8 +(assert_return (invoke "i16x8_all_true_as_if_cond" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_if_cond" (v128.const i16x8 1 1 1 0 1 1 1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_if_cond" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +;; i32x4 +(assert_return (invoke "i32x4_all_true_as_if_cond" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_if_cond" (v128.const i32x4 1 1 1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_if_cond" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) + +;; any_true as select condition +(assert_return (invoke "i8x16_any_true_as_select_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_select_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_select_cond" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_select_cond" (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_select_cond" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_select_cond" (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +;; all_true as select condition +(assert_return (invoke "i8x16_all_true_as_select_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_select_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_select_cond" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_select_cond" (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_select_cond" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_select_cond" (v128.const i32x4 1 1 0 1)) + (i32.const 0)) +;; any_true as br_if condition +(assert_return (invoke "i8x16_any_true_as_br_if_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_br_if_cond" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_br_if_cond" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_br_if_cond" (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_br_if_cond" (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_br_if_cond" (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +;; all_true as br_if condition +(assert_return (invoke "i8x16_all_true_as_br_if_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_br_if_cond" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_br_if_cond" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_br_if_cond" (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_br_if_cond" (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_br_if_cond" (v128.const i32x4 1 1 0 1)) + (i32.const 0)) +;; any_true as and operand +(assert_return (invoke "i8x16_any_true_as_i32.and_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_i32.and_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_i32.and_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_i32.and_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_i32.and_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_i32.and_operand" (v128.const i16x8 0 0 0 0 0 0 1 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_i32.and_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_i32.and_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_i32.and_operand" (v128.const i32x4 0 0 1 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +;; any_true as or operand +(assert_return (invoke "i8x16_any_true_as_i32.or_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_i32.or_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_as_i32.or_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_i32.or_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_i32.or_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_i32.or_operand" (v128.const i16x8 0 0 0 0 0 0 1 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_i32.or_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_i32.or_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_i32.or_operand" (v128.const i32x4 0 0 1 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +;; any_true as xor operand +(assert_return (invoke "i8x16_any_true_as_i32.xor_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_as_i32.xor_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_as_i32.xor_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_i32.xor_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_as_i32.xor_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_as_i32.xor_operand" (v128.const i16x8 0 0 0 0 0 0 1 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_i32.xor_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_as_i32.xor_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_as_i32.xor_operand" (v128.const i32x4 0 0 1 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 0)) +;; all_true as and operand +(assert_return (invoke "i8x16_all_true_as_i32.and_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_i32.and_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_as_i32.and_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_i32.and_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_i32.and_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_i32.and_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_i32.and_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_i32.and_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 0 1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_i32.and_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 1 0)) + (i32.const 0)) +;; all_true as or operand +(assert_return (invoke "i8x16_all_true_as_i32.or_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_i32.or_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_i32.or_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_i32.or_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_i32.or_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_i32.or_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_i32.or_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_i32.or_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_i32.or_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +;; all_true as xor operand +(assert_return (invoke "i8x16_all_true_as_i32.xor_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_as_i32.xor_operand" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_as_i32.xor_operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_i32.xor_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_as_i32.xor_operand" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_as_i32.xor_operand" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_i32.xor_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_as_i32.xor_operand" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 0 1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_as_i32.xor_operand" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +;; any_true with v128.not +(assert_return (invoke "i8x16_any_true_with_v128.not" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_with_v128.not" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.not" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.not" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.not" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.not" (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.not" (v128.const i32x4 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.not" (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.not" (v128.const i32x4 0 0 -1 0)) + (i32.const 1)) +;; any_true with v128.and +(assert_return (invoke "i8x16_any_true_with_v128.and" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.and" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_with_v128.and" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.and" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.and" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.and" (v128.const i16x8 0 0 0 0 0 0 -1 0) + (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.and" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.and" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.and" (v128.const i32x4 0 0 -1 0) + (v128.const i32x4 0 0 -1 0)) + (i32.const 1)) +;; any_true with v128.or +(assert_return (invoke "i8x16_any_true_with_v128.or" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.or" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i8x16_any_true_with_v128.or" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.or" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.or" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.or" (v128.const i16x8 0 0 0 0 0 0 -1 0) + (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.or" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.or" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.or" (v128.const i32x4 0 0 -1 0) + (v128.const i32x4 0 0 -1 0)) + (i32.const 1)) +;; any_true with v128.xor +(assert_return (invoke "i8x16_any_true_with_v128.xor" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.xor" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.xor" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.xor" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.xor" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.xor" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.xor" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 -1 0)) + (i32.const 1)) +;; any_true with v128.bitselect +(assert_return (invoke "i8x16_any_true_with_v128.bitselect" (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i8x16_any_true_with_v128.bitselect" (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0xFF 0x55)) + (i32.const 1)) +(assert_return (invoke "i16x8_any_true_with_v128.bitselect" (v128.const i16x8 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i16x8_any_true_with_v128.bitselect" (v128.const i16x8 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0xFF 0x55)) + (i32.const 1)) +(assert_return (invoke "i32x4_any_true_with_v128.bitselect" (v128.const i32x4 0xAA 0xAA 0xAA 0xAA) + (v128.const i32x4 0x55 0x55 0x55 0x55) + (v128.const i32x4 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i32x4_any_true_with_v128.bitselect" (v128.const i32x4 0xAA 0xAA 0xAA 0xAA) + (v128.const i32x4 0x55 0x55 0x55 0x55) + (v128.const i32x4 0x55 0x55 0xFF 0x55)) + (i32.const 1)) +;; all_true with v128.not +(assert_return (invoke "i8x16_all_true_with_v128.not" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_with_v128.not" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.not" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.not" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_with_v128.not" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.not" (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.not" (v128.const i32x4 0 0 0 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_with_v128.not" (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.not" (v128.const i32x4 0 0 -1 0)) + (i32.const 0)) +;; all_true with v128.and +(assert_return (invoke "i8x16_all_true_with_v128.and" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.and" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_with_v128.and" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.and" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.and" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_with_v128.and" (v128.const i16x8 0 0 0 0 0 0 -1 0) + (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.and" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.and" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_with_v128.and" (v128.const i32x4 0 0 -1 0) + (v128.const i32x4 0 0 -1 0)) + (i32.const 0)) +;; all_true with v128.or +(assert_return (invoke "i8x16_all_true_with_v128.or" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.or" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i8x16_all_true_with_v128.or" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.or" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.or" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_with_v128.or" (v128.const i16x8 0 0 0 0 0 0 -1 0) + (v128.const i16x8 0 0 0 0 0 0 -1 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.or" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.or" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_with_v128.or" (v128.const i32x4 0 0 -1 0) + (v128.const i32x4 0 0 -1 0)) + (i32.const 0)) +;; all_true with v128.xor +(assert_return (invoke "i8x16_all_true_with_v128.xor" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.xor" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.xor" (v128.const i8x16 0 -1 0 -1 0 -1 0 -1 0 -1 0 -1 0 -1 0 -1) + (v128.const i8x16 -1 0 -1 0 -1 0 -1 0 -1 0 -1 0 -1 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_with_v128.xor" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.xor" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.xor" (v128.const i16x8 0 -1 0 -1 0 -1 0 -1) + (v128.const i16x8 -1 0 -1 0 -1 0 -1 0)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_with_v128.xor" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.xor" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.xor" (v128.const i32x4 0 -1 0 -1) + (v128.const i32x4 -1 0 -1 0)) + (i32.const 1)) +;; all_true with v128.bitselect +(assert_return (invoke "i8x16_all_true_with_v128.bitselect" (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i8x16_all_true_with_v128.bitselect" (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i8x16 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (i32.const 1)) +(assert_return (invoke "i16x8_all_true_with_v128.bitselect" (v128.const i16x8 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i16x8_all_true_with_v128.bitselect" (v128.const i16x8 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA) + (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55) + (v128.const i16x8 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA)) + (i32.const 1)) +(assert_return (invoke "i32x4_all_true_with_v128.bitselect" (v128.const i32x4 0xAA 0xAA 0xAA 0xAA) + (v128.const i32x4 0x55 0x55 0x55 0x55) + (v128.const i32x4 0x55 0x55 0x55 0x55)) + (i32.const 0)) +(assert_return (invoke "i32x4_all_true_with_v128.bitselect" (v128.const i32x4 0xAA 0xAA 0xAA 0xAA) + (v128.const i32x4 0x55 0x55 0x55 0x55) + (v128.const i32x4 0xAA 0xAA 0xAA 0xAA)) + (i32.const 1)) + +;; Type check + +(assert_invalid (module (func (result i32) (i8x16.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i8x16.all_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i16x8.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i16x8.all_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i32x4.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (i32x4.all_true (i32.const 0)))) "type mismatch") + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result i32) (f32x4.any_true (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result i32) (f32x4.all_true (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result i32) (f64x2.any_true (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result i32) (f64x2.all_true (v128.const i32x4 0 0 0 0)))") "unknown operator") \ No newline at end of file diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast new file mode 100644 index 0000000000..21b9a16dbe --- /dev/null +++ b/test/core/simd/simd_conversions.wast @@ -0,0 +1,1156 @@ +;; Web Assembly SIMD-related type conversion tests + +(module + ;; Floating point to integer with saturation + (func (export "i32x4.trunc_sat_f32x4_s") (param v128) (result v128) + (i32x4.trunc_sat_f32x4_s (local.get 0))) + (func (export "i32x4.trunc_sat_f32x4_u") (param v128) (result v128) + (i32x4.trunc_sat_f32x4_u (local.get 0))) + + ;; Integer to floating point + (func (export "f32x4.convert_i32x4_s") (param v128) (result v128) + (f32x4.convert_i32x4_s (local.get 0))) + (func (export "f32x4.convert_i32x4_u") (param v128) (result v128) + (f32x4.convert_i32x4_u (local.get 0))) + + ;; Integer to integer narrowing + (func (export "i8x16.narrow_i16x8_s") (param v128 v128) (result v128) + (i8x16.narrow_i16x8_s (local.get 0) (local.get 1))) + (func (export "i8x16.narrow_i16x8_u") (param v128 v128) (result v128) + (i8x16.narrow_i16x8_u (local.get 0) (local.get 1))) + (func (export "i16x8.narrow_i32x4_s") (param v128 v128) (result v128) + (i16x8.narrow_i32x4_s (local.get 0) (local.get 1))) + (func (export "i16x8.narrow_i32x4_u") (param v128 v128) (result v128) + (i16x8.narrow_i32x4_u (local.get 0)(local.get 1))) + + ;; Integer to integer widening + (func (export "i16x8.widen_high_i8x16_s") (param v128) (result v128) + (i16x8.widen_high_i8x16_s (local.get 0))) + (func (export "i16x8.widen_high_i8x16_u") (param v128) (result v128) + (i16x8.widen_high_i8x16_u (local.get 0))) + (func (export "i16x8.widen_low_i8x16_s") (param v128) (result v128) + (i16x8.widen_low_i8x16_s (local.get 0))) + (func (export "i16x8.widen_low_i8x16_u") (param v128) (result v128) + (i16x8.widen_low_i8x16_u (local.get 0))) + (func (export "i32x4.widen_high_i16x8_s") (param v128) (result v128) + (i32x4.widen_high_i16x8_s (local.get 0))) + (func (export "i32x4.widen_high_i16x8_u") (param v128) (result v128) + (i32x4.widen_high_i16x8_u (local.get 0))) + (func (export "i32x4.widen_low_i16x8_s") (param v128) (result v128) + (i32x4.widen_low_i16x8_s (local.get 0))) + (func (export "i32x4.widen_low_i16x8_u") (param v128) (result v128) + (i32x4.widen_low_i16x8_u (local.get 0))) +) + + +;; Floating point to integer with saturation +;; i32x4.trunc_sat_f32x4_s + +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0.0 0.0 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.5 1.5 1.5 1.5)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.9 1.9 1.9 1.9)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2.0 2.0 2.0 2.0)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483520.0 2147483520.0 2147483520.0 2147483520.0)) + (v128.const i32x4 2147483520 2147483520 2147483520 2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483520.0 -2147483520.0 -2147483520.0 -2147483520.0)) + (v128.const i32x4 -2147483520 -2147483520 -2147483520 -2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 3000000000.0 3000000000.0 3000000000.0 3000000000.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -3000000000.0 -3000000000.0 -3000000000.0 -3000000000.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483647.0 -2147483647.0 -2147483647.0 -2147483647.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -6 -6 -6 -6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +nan +nan +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 42 nan inf -inf)) + (v128.const i32x4 42 0 2147483647 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -42 3.14 nan inf)) + (v128.const i32x4 -42 3 0 2147483647)) + +;; i32x4.trunc_sat_f32x4_u + +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0.0 0.0 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.5 1.5 1.5 1.5)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.9 1.9 1.9 1.9)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2.0 2.0 2.0 2.0)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 3000000000.0 3000000000.0 3000000000.0 3000000000.0)) + (v128.const i32x4 3000000000 3000000000 3000000000 3000000000)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -3000000000.0 -3000000000.0 -3000000000.0 -3000000000.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967295.0 4294967295.0 4294967295.0 4294967295.0)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967296.0 4294967296.0 4294967296.0 4294967296.0)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967040.0 4294967040.0 4294967040.0 4294967040.0)) + (v128.const i32x4 -256 -256 -256 -256)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +nan +nan +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 42 nan inf -inf)) + (v128.const i32x4 42 0 0xffffffff 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -42 3.14 nan inf)) + (v128.const i32x4 0 3 0 0xffffffff)) + + +;; Integer to floating point +;; f32x4.convert_i32x4_s + +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 1 1 1 1)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 1234567890 1234567890 1234567890 1234567890)) + (v128.const f32x4 0x1.26580cp+30 0x1.26580cp+30 0x1.26580cp+30 0x1.26580cp+30)) +;; Test rounding directions. + +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 16777217 16777217 16777217 16777217)) + (v128.const f32x4 16777216.0 16777216.0 16777216.0 16777216.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 -16777217 -16777217 -16777217 -16777217)) + (v128.const f32x4 -16777216.0 -16777216.0 -16777216.0 -16777216.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 16777219 16777219 16777219 16777219)) + (v128.const f32x4 16777220.0 16777220.0 16777220.0 16777220.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 -16777219 -16777219 -16777219 -16777219)) + (v128.const f32x4 -16777220.0 -16777220.0 -16777220.0 -16777220.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) + (v128.const f32x4 0.0 -1.0 2147483647.0 -2147483648.0)) + +;; f32x4.convert_i32x4_u + +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 1 1 1 1)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const f32x4 4294967295.0 4294967295.0 4294967295.0 4294967295.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const f32x4 0x1.234568p+28 0x1.234568p+28 0x1.234568p+28 0x1.234568p+28)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0x80000080 0x80000080 0x80000080 0x80000080)) + (v128.const f32x4 0x1.000000p+31 0x1.000000p+31 0x1.000000p+31 0x1.000000p+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0x80000081 0x80000081 0x80000081 0x80000081)) + (v128.const f32x4 0x1.000002p+31 0x1.000002p+31 0x1.000002p+31 0x1.000002p+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0x80000082 0x80000082 0x80000082 0x80000082)) + (v128.const f32x4 0x1.000002p+31 0x1.000002p+31 0x1.000002p+31 0x1.000002p+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0xfffffe80 0xfffffe80 0xfffffe80 0xfffffe80)) + (v128.const f32x4 0x1.fffffcp+31 0x1.fffffcp+31 0x1.fffffcp+31 0x1.fffffcp+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0xfffffe81 0xfffffe81 0xfffffe81 0xfffffe81)) + (v128.const f32x4 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0xfffffe82 0xfffffe82 0xfffffe82 0xfffffe82)) + (v128.const f32x4 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31)) +;; Test rounding directions. + +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 16777217 16777217 16777217 16777217)) + (v128.const f32x4 16777216.0 16777216.0 16777216.0 16777216.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 16777219 16777219 16777219 16777219)) + (v128.const f32x4 16777220.0 16777220.0 16777220.0 16777220.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) + (v128.const f32x4 0.0 4294967295.0 2147483647.0 2147483648.0)) + + +;; Integer to integer narrowing +;; i8x16.narrow_i16x8_s + +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f) + (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81) + (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81) + (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81 -0x81) + (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + +;; i8x16.narrow_i16x8_u + +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i16x8 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe 0xfe)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100) + (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; i16x8.narrow_i32x4_s + +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i16x8 0 0 0 0 1 1 1 1)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0xffff 0xffff 0xffff 0xffff) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x7fff -0x7fff -0x7fff -0x7fff) + (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i16x8 0x8001 0x8001 0x8001 0x8001 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8001 0x8001 0x8001 0x8001)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001) + (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001) + (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000 -0x8000 -0x8000 -0x8000) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8001 -0x8001 -0x8001 -0x8001) + (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000000 -0x8000000 -0x8000000 -0x8000000) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0xffff 0xffff 0xffff 0xffff)) + +;; i16x8.narrow_i32x4_u + +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i16x8 0 0 0 0 1 1 1 1)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 1 1 1 1)) + (v128.const i16x8 0 0 0 0 1 1 1 1)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0xfffe 0xfffe 0xfffe 0xfffe) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0xfffe 0xfffe 0xfffe 0xfffe 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0xffff 0xffff 0xffff 0xffff) + (v128.const i32x4 0xfffe 0xfffe 0xfffe 0xfffe)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xfffe 0xfffe 0xfffe 0xfffe)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0xffff 0xffff 0xffff 0xffff) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0x10000 0x10000 0x10000 0x10000) + (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0xffff 0xffff 0xffff 0xffff) + (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0x10000 0x10000 0x10000 0x10000) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) + (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) + (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + + +;; Integer to integer widening +;; i16x8.widen_low_i8x16_s + +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) + +;; i16x8.widen_high_i8x16_s + +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i16x8 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + +;; i16x8.widen_low_i8x16_u + +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + +;; i16x8.widen_high_i8x16_u + +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) + (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i16x8 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + +;; i32x4.widen_low_i16x8_s + +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0xffff8001 0xffff8001 0xffff8001 0xffff8001)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) + +;; i32x4.widen_high_i16x8_s + +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) + (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i32x4 0xffff8001 0xffff8001 0xffff8001 0xffff8001)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + +;; i32x4.widen_low_i16x8_u + +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0x8001 0x8001 0x8001 0x8001)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) + +;; i32x4.widen_high_i16x8_u + +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) + (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i32x4 0x8001 0x8001 0x8001 0x8001)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) + + +;; Unknown operator + +(assert_malformed (module quote + "(func (result v128) (i32x4.trunc_sat_f32x4 (v128.const f32x4 0.0 0.0 0.0 0.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.trunc_s_sat_f32x4 (v128.const f32x4 -2.0 -1.0 0 1.0 2.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.trunc_u_sat_f32x4 (v128.const f32x4 -2.0 -1.0 0 1.0 2.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.convert_f32x4 (v128.const f32x4 -1 0 1 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.convert_s_f32x4 (v128.const f32x4 -1 0 1 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.convert_u_f32x4 (v128.const f32x4 -1 0 1 2)))") + "unknown operator") + +(assert_malformed (module quote + "(func (result v128) (i8x16.narrow_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.narrow_i8x16 (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.narrow_i8x16_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.narrow_i8x16_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.narrow_i32x4 (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.narrow_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.narrow_i16x8_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.narrow_i16x8_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") + +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_low_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.widen_low_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.widen_low_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_high_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.widen_high_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.widen_high_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.widen_low_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_low_i32x4_s (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_low_i32x4_u (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.widen_high_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_high_i32x4_s (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.widen_high_i32x4_u (v128.const i32x4 0 0 0 0)))") + "unknown operator") + + +;; Type mismatch + +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_s (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_u (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i64.const 0)))) "type mismatch") + +(assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_s (i32.const 0) (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_u (i32.const 0) (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.narrow_i32x4_s (f32.const 0.0) (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.narrow_i32x4_s (f32.const 0.0) (f64.const 0.0)))) "type mismatch") + +(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_s (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_s (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_u (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_u (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_s (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_s (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_u (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_u (f32.const 0.0)))) "type mismatch") + + +;; Combinations + +(module + (func (export "f32x4_convert_i32x4_s_add") (param v128 v128) (result v128) + (f32x4.convert_i32x4_s (i32x4.add (local.get 0) (local.get 1)))) + (func (export "f32x4_convert_i32x4_s_sub") (param v128 v128) (result v128) + (f32x4.convert_i32x4_s (i32x4.sub (local.get 0) (local.get 1)))) + (func (export "f32x4_convert_i32x4_u_mul") (param v128 v128) (result v128) + (f32x4.convert_i32x4_u (i32x4.mul (local.get 0) (local.get 1)))) + + (func (export "i16x8_low_widen_narrow_ss") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_low_widen_narrow_su") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_high_widen_narrow_ss") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_high_widen_narrow_su") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_low_widen_narrow_uu") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_low_widen_narrow_us") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_high_widen_narrow_uu") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_high_widen_narrow_us") (param v128 v128) (result v128) + (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + + (func (export "i32x4_low_widen_narrow_ss") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_low_widen_narrow_su") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_high_widen_narrow_ss") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_high_widen_narrow_su") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_low_widen_narrow_uu") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_low_widen_narrow_us") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_high_widen_narrow_uu") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_high_widen_narrow_us") (param v128 v128) (result v128) + (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) +) + +(assert_return (invoke "f32x4_convert_i32x4_s_add" (v128.const i32x4 1 2 3 4) + (v128.const i32x4 2 3 4 5)) + (v128.const f32x4 3.0 5.0 7.0 9.0)) +(assert_return (invoke "f32x4_convert_i32x4_s_sub" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 1 1 1 1)) + (v128.const f32x4 -1.0 0.0 1.0 2.0)) +(assert_return (invoke "f32x4_convert_i32x4_u_mul" (v128.const i32x4 1 2 3 4) + (v128.const i32x4 1 2 3 4)) + (v128.const f32x4 1.0 4.0 9.0 16.0)) + + +(assert_return (invoke "i16x8_low_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0xff80 0xff80 0x7f 0xff80 0xff80 0xff80 0x7f 0xff80)) +(assert_return (invoke "i16x8_low_widen_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) + (v128.const i16x8 0 0 0xffff 0 0 0 0xffff 0)) +(assert_return (invoke "i16x8_high_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0xff80 0xff80 0x7f 0xff80 0xff80 0xff80 0x7f 0xff80)) +(assert_return (invoke "i16x8_high_widen_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) + (v128.const i16x8 0 0 0xffff 0 0 0 0xffff 0)) +(assert_return (invoke "i16x8_low_widen_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_low_widen_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0x80 0x80 0x7f 0x80 0x80 0x80 0x7f 0x80)) +(assert_return (invoke "i16x8_high_widen_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) + (v128.const i16x8 0 0 0xff 0 0 0 0xff 0)) +(assert_return (invoke "i16x8_high_widen_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0x80 0x80 0x7f 0x80 0x80 0x80 0x7f 0x80)) + +(assert_return (invoke "i32x4_low_widen_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0xffff8000 0xffff8000 0x7fff 0x7fff)) +(assert_return (invoke "i32x4_low_widen_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffffffff 0)) +(assert_return (invoke "i32x4_high_widen_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0xffff8000 0xffff8000 0x7fff 0x7fff)) +(assert_return (invoke "i32x4_high_widen_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffffffff 0)) +(assert_return (invoke "i32x4_low_widen_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffff 0)) +(assert_return (invoke "i32x4_low_widen_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) +(assert_return (invoke "i32x4_high_widen_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffff 0)) +(assert_return (invoke "i32x4_high_widen_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) \ No newline at end of file diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast new file mode 100644 index 0000000000..ed2500ed31 --- /dev/null +++ b/test/core/simd/simd_f32x4.wast @@ -0,0 +1,2430 @@ +;; Tests for f32x4 [abs, min, max] operations on major boundary values and all special values. + + +(module + (func (export "f32x4.min") (param v128 v128) (result v128) (f32x4.min (local.get 0) (local.get 1))) + (func (export "f32x4.max") (param v128 v128) (result v128) (f32x4.max (local.get 0) (local.get 1))) + (func (export "f32x4.abs") (param v128) (result v128) (f32x4.abs (local.get 0))) + ;; f32x4.min const vs const + (func (export "f32x4.min_with_const_0") (result v128) (f32x4.min (v128.const f32x4 0 1 2 -3) (v128.const f32x4 0 2 1 3))) + (func (export "f32x4.min_with_const_1") (result v128) (f32x4.min (v128.const f32x4 0 1 2 3) (v128.const f32x4 0 1 2 3))) + (func (export "f32x4.min_with_const_2") (result v128) (f32x4.min (v128.const f32x4 0x00 0x01 0x02 0x80000000) (v128.const f32x4 0x00 0x02 0x01 2147483648))) + (func (export "f32x4.min_with_const_3") (result v128) (f32x4.min (v128.const f32x4 0x00 0x01 0x02 0x80000000) (v128.const f32x4 0x00 0x01 0x02 0x80000000))) + ;; f32x4.min param vs const + (func (export "f32x4.min_with_const_5")(param v128) (result v128) (f32x4.min (local.get 0) (v128.const f32x4 0 1 2 -3))) + (func (export "f32x4.min_with_const_6")(param v128) (result v128) (f32x4.min (v128.const f32x4 0 1 2 3) (local.get 0))) + (func (export "f32x4.min_with_const_7")(param v128) (result v128) (f32x4.min (v128.const f32x4 0x00 0x01 0x02 0x80000000) (local.get 0))) + (func (export "f32x4.min_with_const_8")(param v128) (result v128) (f32x4.min (local.get 0) (v128.const f32x4 0x00 0x01 0x02 0x80000000))) + ;; f32x4.max const vs const + (func (export "f32x4.max_with_const_10") (result v128) (f32x4.max (v128.const f32x4 0 1 2 -3) (v128.const f32x4 0 2 1 3))) + (func (export "f32x4.max_with_const_11") (result v128) (f32x4.max (v128.const f32x4 0 1 2 3) (v128.const f32x4 0 1 2 3))) + (func (export "f32x4.max_with_const_12") (result v128) (f32x4.max (v128.const f32x4 0x00 0x01 0x02 0x80000000) (v128.const f32x4 0x00 0x02 0x01 2147483648))) + (func (export "f32x4.max_with_const_13") (result v128) (f32x4.max (v128.const f32x4 0x00 0x01 0x02 0x80000000) (v128.const f32x4 0x00 0x01 0x02 0x80000000))) + ;; f32x4.max param vs const + (func (export "f32x4.max_with_const_15")(param v128) (result v128) (f32x4.max (local.get 0) (v128.const f32x4 0 1 2 -3))) + (func (export "f32x4.max_with_const_16")(param v128) (result v128) (f32x4.max (v128.const f32x4 0 1 2 3) (local.get 0))) + (func (export "f32x4.max_with_const_17")(param v128) (result v128) (f32x4.max (v128.const f32x4 0x00 0x01 0x02 0x80000000) (local.get 0))) + (func (export "f32x4.max_with_const_18")(param v128) (result v128) (f32x4.max (local.get 0) (v128.const f32x4 0x00 0x01 0x02 0x80000000))) + + (func (export "f32x4.abs_with_const") (result v128) (f32x4.abs (v128.const f32x4 -0 -1 -2 -3))) + + ;; Test different lanes go through different if-then clauses + (type $vv_v (func (param v128 v128) (result v128))) + (table funcref (elem $f32x4_min $f32x4_max)) + + (func $f32x4_min (type $vv_v) + (f32x4.min (local.get 0) (local.get 1)) + ) + + (func $f32x4_max (type $vv_v) + (f32x4.max (local.get 0) (local.get 1)) + ) + + (func (export "call_indirect_vv_v_f32x4_extract_lane_0") + (param v128 v128 i32) (result f32) + (f32x4.extract_lane 0 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) + (func (export "call_indirect_vv_v_f32x4_extract_lane_1") + (param v128 v128 i32) (result f32) + (f32x4.extract_lane 1 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) + (func (export "call_indirect_vv_v_f32x4_extract_lane_2") + (param v128 v128 i32) (result f32) + (f32x4.extract_lane 2 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) + (func (export "call_indirect_vv_v_f32x4_extract_lane_3") + (param v128 v128 i32) (result f32) + (f32x4.extract_lane 3 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) +) + +;; f32x4.abs const vs const +(assert_return (invoke "f32x4.min_with_const_0") (v128.const f32x4 0 1 1 -3)) +(assert_return (invoke "f32x4.min_with_const_1") (v128.const f32x4 0 1 2 3)) +(assert_return (invoke "f32x4.min_with_const_2") (v128.const f32x4 0x00 0x01 0x01 0x80000000)) +(assert_return (invoke "f32x4.min_with_const_3") (v128.const f32x4 0x00 0x01 0x02 0x80000000)) +;; f32x4.abs param vs const +(assert_return (invoke "f32x4.min_with_const_5" (v128.const f32x4 0 2 1 3)) + (v128.const f32x4 0 1 1 -3)) +(assert_return (invoke "f32x4.min_with_const_6" (v128.const f32x4 0 1 2 3)) + (v128.const f32x4 0 1 2 3)) +(assert_return (invoke "f32x4.min_with_const_7" (v128.const f32x4 0x00 0x02 0x01 2147483648)) + (v128.const f32x4 0x00 0x01 0x01 0x80000000)) +(assert_return (invoke "f32x4.min_with_const_8" (v128.const f32x4 0x00 0x01 0x02 0x80000000)) + (v128.const f32x4 0x00 0x01 0x02 0x80000000)) +;; f32x4.abs const vs const +(assert_return (invoke "f32x4.max_with_const_10") (v128.const f32x4 0 2 2 3)) +(assert_return (invoke "f32x4.max_with_const_11") (v128.const f32x4 0 1 2 3)) +(assert_return (invoke "f32x4.max_with_const_12") (v128.const f32x4 0x00 0x02 0x02 2147483648)) +(assert_return (invoke "f32x4.max_with_const_13") (v128.const f32x4 0x00 0x01 0x02 0x80000000)) +;; f32x4.abs param vs const +(assert_return (invoke "f32x4.max_with_const_15" (v128.const f32x4 0 2 1 3)) + (v128.const f32x4 0 2 2 3)) +(assert_return (invoke "f32x4.max_with_const_16" (v128.const f32x4 0 1 2 3)) + (v128.const f32x4 0 1 2 3)) +(assert_return (invoke "f32x4.max_with_const_17" (v128.const f32x4 0x00 0x02 0x01 2147483648)) + (v128.const f32x4 0x00 0x02 0x02 2147483648)) +(assert_return (invoke "f32x4.max_with_const_18" (v128.const f32x4 0x00 0x01 0x02 0x80000000)) + (v128.const f32x4 0x00 0x01 0x02 0x80000000)) + +(assert_return (invoke "f32x4.abs_with_const") (v128.const f32x4 0 1 2 3)) + +;; Test different lanes go through different if-then clauses +;; f32x4.min 0 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_0" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) +) +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_1" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) + (f32.const 0) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) + (f32.const 0) +) +;; f32x4.min 1 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_0" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) +) +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_1" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) + (f32.const 0) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 0) + ) + (f32.const 0) +) +;; f32x4.max 0 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_0" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) +) +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_1" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) + (f32.const 1) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (v128.const f32x4 nan 0 0 1) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) + (f32.const 1) +) +;; f32x4.max 1 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_0" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) +) +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f32x4_extract_lane_1" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) + (f32.const 1) +) +(assert_return + (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (v128.const f32x4 nan 0 0 0) + (v128.const f32x4 0 -nan 1 0) + (i32.const 1) + ) + (f32.const 0) +) + +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) + +;; Test opposite signs of zero +(assert_return (invoke "f32x4.min" (v128.const f32x4 0 0 -0 +0) + (v128.const f32x4 +0 -0 +0 -0)) + (v128.const f32x4 0 -0 -0 -0)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0 -0 -0 -0) + (v128.const f32x4 +0 +0 +0 +0)) + (v128.const f32x4 -0 -0 -0 -0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0 0 -0 +0) + (v128.const f32x4 +0 -0 +0 -0)) + (v128.const f32x4 0 0 0 0)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0 -0 -0 -0) + (v128.const f32x4 +0 +0 +0 +0)) + (v128.const f32x4 +0 +0 +0 +0)) + + +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f32x4.abs (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.min (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.max (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "max-min") (param v128 v128 v128) (result v128) + (f32x4.max (f32x4.min (local.get 0) (local.get 1))(local.get 2))) + (func (export "min-max") (param v128 v128 v128) (result v128) + (f32x4.min (f32x4.max (local.get 0) (local.get 1))(local.get 2))) + (func (export "max-abs") (param v128 v128) (result v128) + (f32x4.max (f32x4.abs (local.get 0)) (local.get 1))) + (func (export "min-abs") (param v128 v128) (result v128) + (f32x4.min (f32x4.abs (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "max-min" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.25 0.25 0.25 0.25) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 0.25 0.25 0.25 0.25)) +(assert_return (invoke "min-max" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.25 0.25 0.25 0.25) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 0.125 0.125 0.125 0.125)) +(assert_return (invoke "max-abs" (v128.const f32x4 -1.125 -1.125 -1.125 -1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 1.125 1.125 1.125 1.125)) +(assert_return (invoke "min-abs" (v128.const f32x4 -1.125 -1.125 -1.125 -1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 0.125 0.125 0.125 0.125)) \ No newline at end of file diff --git a/test/core/simd/simd_f32x4_arith.wast b/test/core/simd/simd_f32x4_arith.wast new file mode 100644 index 0000000000..9804879479 --- /dev/null +++ b/test/core/simd/simd_f32x4_arith.wast @@ -0,0 +1,4441 @@ +;; Tests for f32x4 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "f32x4.add") (param v128 v128) (result v128) (f32x4.add (local.get 0) (local.get 1))) + (func (export "f32x4.sub") (param v128 v128) (result v128) (f32x4.sub (local.get 0) (local.get 1))) + (func (export "f32x4.mul") (param v128 v128) (result v128) (f32x4.mul (local.get 0) (local.get 1))) + (func (export "f32x4.div") (param v128 v128) (result v128) (f32x4.div (local.get 0) (local.get 1))) + (func (export "f32x4.neg") (param v128) (result v128) (f32x4.neg (local.get 0))) + (func (export "f32x4.sqrt") (param v128) (result v128) (f32x4.sqrt (local.get 0))) +) + +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf))) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127 0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126 0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126 -0x1.0000020000000p-126)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127 -0x1.fffffc0000000p-127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2 0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2 0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2 0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2 0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2 -0x1.b21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2 -0x1.721fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2 -0x1.d21fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2 -0x1.521fb60000000p+2)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf))) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-298 0x1.0000000000000p-298 0x1.0000000000000p-298 0x1.0000000000000p-298)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-298 -0x1.0000000000000p-298 -0x1.0000000000000p-298 -0x1.0000000000000p-298)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-298 -0x1.0000000000000p-298 -0x1.0000000000000p-298 -0x1.0000000000000p-298)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-298 0x1.0000000000000p-298 0x1.0000000000000p-298 0x1.0000000000000p-298)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-252 0x1.0000000000000p-252 0x1.0000000000000p-252 0x1.0000000000000p-252)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-252 -0x1.0000000000000p-252 -0x1.0000000000000p-252 -0x1.0000000000000p-252)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275 -0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275 0x1.0000000000000p-275)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-252 -0x1.0000000000000p-252 -0x1.0000000000000p-252 -0x1.0000000000000p-252)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-252 0x1.0000000000000p-252 0x1.0000000000000p-252 0x1.0000000000000p-252)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-2 0x1.0000000000000p-2 0x1.0000000000000p-2 0x1.0000000000000p-2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-2 -0x1.0000000000000p-2 -0x1.0000000000000p-2 -0x1.0000000000000p-2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150 -0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150 0x1.0000000000000p-150)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127 -0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127 0x1.0000000000000p-127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-2 -0x1.0000000000000p-2 -0x1.0000000000000p-2 -0x1.0000000000000p-2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-2 0x1.0000000000000p-2 0x1.0000000000000p-2 0x1.0000000000000p-2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147 -0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147 0x1.921fb60000000p-147)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124 -0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124 0x1.921fb60000000p-124)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1 -0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1 0x1.921fb60000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5 -0x1.3bd3cdc2cab20p+5)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5 0x1.3bd3cdc2cab20p+5)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22 -0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22 0x1.fffffe0000000p-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1 -0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1 0x1.fffffe0000000p+1)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126 -0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126 0x1.fffffe0000000p+126)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-23 0x1.0000000000000p-23 0x1.0000000000000p-23 0x1.0000000000000p-23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-23 -0x1.0000000000000p-23 -0x1.0000000000000p-23 -0x1.0000000000000p-23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-277 0x1.0000010000010p-277 0x1.0000010000010p-277 0x1.0000010000010p-277)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-277 -0x1.0000010000010p-277 -0x1.0000010000010p-277 -0x1.0000010000010p-277)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-23 -0x1.0000000000000p-23 -0x1.0000000000000p-23 -0x1.0000000000000p-23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-23 0x1.0000000000000p-23 0x1.0000000000000p-23 0x1.0000000000000p-23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148 -0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148 0x1.0000000000000p-148)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152 -0x1.45f306446f9b4p-152)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152 0x1.45f306446f9b4p-152)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-277 -0x1.0000010000010p-277 -0x1.0000010000010p-277 -0x1.0000010000010p-277)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-277 0x1.0000010000010p-277 0x1.0000010000010p-277 0x1.0000010000010p-277)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+23 0x1.0000000000000p+23 0x1.0000000000000p+23 0x1.0000000000000p+23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+23 -0x1.0000000000000p+23 -0x1.0000000000000p+23 -0x1.0000000000000p+23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-254 0x1.0000010000010p-254 0x1.0000010000010p-254 0x1.0000010000010p-254)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-254 -0x1.0000010000010p-254 -0x1.0000010000010p-254 -0x1.0000010000010p-254)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+23 -0x1.0000000000000p+23 -0x1.0000000000000p+23 -0x1.0000000000000p+23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+23 0x1.0000000000000p+23 0x1.0000000000000p+23 0x1.0000000000000p+23)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125 -0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125 0x1.0000000000000p-125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129 -0x1.45f306446f9b4p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129 0x1.45f306446f9b4p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-254 -0x1.0000010000010p-254 -0x1.0000010000010p-254 -0x1.0000010000010p-254)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-254 0x1.0000010000010p-254 0x1.0000010000010p-254 0x1.0000010000010p-254)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+125 0x1.0000000000000p+125 0x1.0000000000000p+125 0x1.0000000000000p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+125 -0x1.0000000000000p+125 -0x1.0000000000000p+125 -0x1.0000000000000p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-129 0x1.0000010000010p-129 0x1.0000010000010p-129 0x1.0000010000010p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-129 -0x1.0000010000010p-129 -0x1.0000010000010p-129 -0x1.0000010000010p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+125 -0x1.0000000000000p+125 -0x1.0000000000000p+125 -0x1.0000000000000p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+125 0x1.0000000000000p+125 0x1.0000000000000p+125 0x1.0000000000000p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4 -0x1.45f306446f9b4p-4)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4 0x1.45f306446f9b4p-4)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-129 -0x1.0000010000010p-129 -0x1.0000010000010p-129 -0x1.0000010000010p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-129 0x1.0000010000010p-129 0x1.0000010000010p-129 0x1.0000010000010p-129)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+126 0x1.0000000000000p+126 0x1.0000000000000p+126 0x1.0000000000000p+126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+126 -0x1.0000000000000p+126 -0x1.0000000000000p+126 -0x1.0000000000000p+126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-128 0x1.0000010000010p-128 0x1.0000010000010p-128 0x1.0000010000010p-128)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-128 -0x1.0000010000010p-128 -0x1.0000010000010p-128 -0x1.0000010000010p-128)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+126 -0x1.0000000000000p+126 -0x1.0000000000000p+126 -0x1.0000000000000p+126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+126 0x1.0000000000000p+126 0x1.0000000000000p+126 0x1.0000000000000p+126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3 -0x1.45f306446f9b4p-3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3 0x1.45f306446f9b4p-3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000010000010p-128 -0x1.0000010000010p-128 -0x1.0000010000010p-128 -0x1.0000010000010p-128)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000010000010p-128 0x1.0000010000010p-128 0x1.0000010000010p-128 0x1.0000010000010p-128)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3 -0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3 0x1.921fb60000000p+3)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126 -0x1.921fb7921fb79p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126 0x1.921fb7921fb79p-126)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125 -0x1.45f304fe7c950p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125 0x1.45f304fe7c950p+125)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-63 0x1.0000000000000p-63 0x1.0000000000000p-63 0x1.0000000000000p-63)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 nan nan nan nan))) +(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan -nan -nan -nan))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) +(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + + +;; Mixed f32x4 tests when some lanes are NaNs +(module + + (func $f32x4_sqrt_arith (result v128) + v128.const f32x4 nan:0x200000 -nan:0x200000 16.0 25.0 + f32x4.sqrt) + (func (export "f32x4_extract_lane_arith_0") (result f32) + (f32x4.extract_lane 0 (call $f32x4_sqrt_arith))) + (func (export "f32x4_extract_lane_arith_1") (result f32) + (f32x4.extract_lane 1 (call $f32x4_sqrt_arith))) + (func (export "f32x4_extract_lane_arith_2") (result f32) + (f32x4.extract_lane 2 (call $f32x4_sqrt_arith))) + (func (export "f32x4_extract_lane_arith_3") (result f32) + (f32x4.extract_lane 3 (call $f32x4_sqrt_arith))) + + (func $f32x4_sqrt_canon (result v128) + v128.const f32x4 -1.0 nan 4.0 9.0 + f32x4.sqrt) + (func (export "f32x4_extract_lane_canon_0") (result f32) + (f32x4.extract_lane 0 (call $f32x4_sqrt_canon))) + (func (export "f32x4_extract_lane_canon_1") (result f32) + (f32x4.extract_lane 1 (call $f32x4_sqrt_canon))) + (func (export "f32x4_extract_lane_canon_2") (result f32) + (f32x4.extract_lane 2 (call $f32x4_sqrt_canon))) + (func (export "f32x4_extract_lane_canon_3") (result f32) + (f32x4.extract_lane 3 (call $f32x4_sqrt_canon))) + + (func $f32x4_sqrt_mixed (result v128) + v128.const f32x4 -inf nan:0x200000 36.0 49.0 + f32x4.sqrt) + (func (export "f32x4_extract_lane_mixed_0") (result f32) + (f32x4.extract_lane 0 (call $f32x4_sqrt_mixed))) + (func (export "f32x4_extract_lane_mixed_1") (result f32) + (f32x4.extract_lane 1 (call $f32x4_sqrt_mixed))) + (func (export "f32x4_extract_lane_mixed_2") (result f32) + (f32x4.extract_lane 2 (call $f32x4_sqrt_mixed))) + (func (export "f32x4_extract_lane_mixed_3") (result f32) + (f32x4.extract_lane 3 (call $f32x4_sqrt_mixed))) + +) + +(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_arith_0")) +(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_arith_1")) +(assert_return (invoke "f32x4_extract_lane_arith_2") (f32.const 4.0)) +(assert_return (invoke "f32x4_extract_lane_arith_3") (f32.const 5.0)) +(assert_return_canonical_nan (invoke "f32x4_extract_lane_canon_0")) +(assert_return_canonical_nan (invoke "f32x4_extract_lane_canon_1")) +(assert_return (invoke "f32x4_extract_lane_canon_2") (f32.const 2.0)) +(assert_return (invoke "f32x4_extract_lane_canon_3") (f32.const 3.0)) +(assert_return_canonical_nan (invoke "f32x4_extract_lane_mixed_0")) +(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_mixed_1")) +(assert_return (invoke "f32x4_extract_lane_mixed_2") (f32.const 6.0)) +(assert_return (invoke "f32x4_extract_lane_mixed_3") (f32.const 7.0)) + +;; type check +(assert_invalid (module (func (result v128) (f32x4.neg (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.sqrt (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.add (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.div (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (f32x4.add (f32x4.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-add") (param v128 v128 v128) (result v128) + (f32x4.div (f32x4.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-mul") (param v128 v128 v128) (result v128) + (f32x4.div (f32x4.mul (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-sub") (param v128 v128 v128) (result v128) + (f32x4.div (f32x4.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-add") (param v128 v128 v128) (result v128) + (f32x4.mul (f32x4.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-div") (param v128 v128 v128) (result v128) + (f32x4.mul (f32x4.div (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-sub") (param v128 v128 v128) (result v128) + (f32x4.mul (f32x4.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (f32x4.sub (f32x4.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (f32x4.add (f32x4.neg (local.get 0)) (local.get 1))) + (func (export "add-sqrt") (param v128 v128) (result v128) + (f32x4.add (f32x4.sqrt (local.get 0)) (local.get 1))) + (func (export "div-neg") (param v128 v128) (result v128) + (f32x4.div (f32x4.neg (local.get 0)) (local.get 1))) + (func (export "div-sqrt") (param v128 v128) (result v128) + (f32x4.div (f32x4.sqrt (local.get 0)) (local.get 1))) + (func (export "mul-neg") (param v128 v128) (result v128) + (f32x4.mul (f32x4.neg (local.get 0)) (local.get 1))) + (func (export "mul-sqrt") (param v128 v128) (result v128) + (f32x4.mul (f32x4.sqrt (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (f32x4.sub (f32x4.neg (local.get 0)) (local.get 1))) + (func (export "sub-sqrt") (param v128 v128) (result v128) + (f32x4.sub (f32x4.sqrt (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.25 0.25 0.25 0.25) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "div-add" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 5.0 5.0 5.0 5.0)) +(assert_return (invoke "div-mul" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 4 4 4 4) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 18.0 18.0 18.0 18.0)) +(assert_return (invoke "div-sub" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 4.0 4.0 4.0 4.0)) +(assert_return (invoke "mul-add" (v128.const f32x4 1.25 1.25 1.25 1.25) + (v128.const f32x4 0.25 0.25 0.25 0.25) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 0.375 0.375 0.375 0.375)) +(assert_return (invoke "mul-div" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 2.25 2.25 2.25 2.25)) +(assert_return (invoke "mul-sub" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 0.25 0.25 0.25 0.25)) +(assert_return (invoke "sub-add" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.25 0.25 0.25 0.25) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 1.25 1.25 1.25 1.25)) +(assert_return (invoke "add-neg" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) +(assert_return (invoke "add-sqrt" (v128.const f32x4 2.25 2.25 2.25 2.25) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 1.75 1.75 1.75 1.75)) +(assert_return (invoke "div-neg" (v128.const f32x4 1.5 1.5 1.5 1.5) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 -6 -6 -6 -6)) +(assert_return (invoke "div-sqrt" (v128.const f32x4 2.25 2.25 2.25 2.25) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 6 6 6 6)) +(assert_return (invoke "mul-neg" (v128.const f32x4 1.5 1.5 1.5 1.5) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 -0.375 -0.375 -0.375 -0.375)) +(assert_return (invoke "mul-sqrt" (v128.const f32x4 2.25 2.25 2.25 2.25) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 0.375 0.375 0.375 0.375)) +(assert_return (invoke "sub-neg" (v128.const f32x4 1.125 1.125 1.125 1.125) + (v128.const f32x4 0.125 0.125 0.125 0.125)) + (v128.const f32x4 -1.25 -1.25 -1.25 -1.25)) +(assert_return (invoke "sub-sqrt" (v128.const f32x4 2.25 2.25 2.25 2.25) + (v128.const f32x4 0.25 0.25 0.25 0.25)) + (v128.const f32x4 1.25 1.25 1.25 1.25)) \ No newline at end of file diff --git a/test/core/simd/simd_f64x2_cmp.wast b/test/core/simd/simd_f64x2_cmp.wast new file mode 100644 index 0000000000..c3727bf020 --- /dev/null +++ b/test/core/simd/simd_f64x2_cmp.wast @@ -0,0 +1,7788 @@ +;; Tests for f64x2 comparison operations on major boundary values and all special values. + + +(module + (func (export "f64x2.eq") (param v128 v128) (result v128) (f64x2.eq (local.get 0) (local.get 1))) + (func (export "f64x2.ne") (param v128 v128) (result v128) (f64x2.ne (local.get 0) (local.get 1))) + (func (export "f64x2.lt") (param v128 v128) (result v128) (f64x2.lt (local.get 0) (local.get 1))) + (func (export "f64x2.le") (param v128 v128) (result v128) (f64x2.le (local.get 0) (local.get 1))) + (func (export "f64x2.gt") (param v128 v128) (result v128) (f64x2.gt (local.get 0) (local.get 1))) + (func (export "f64x2.ge") (param v128 v128) (result v128) (f64x2.ge (local.get 0) (local.get 1))) +) + +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -1 -1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -1 -1) + (v128.const f64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -1 -1) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 -1 -1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0 0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0 0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0 0) + (v128.const f64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0 0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 1 1) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 1 1) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 1 1) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 1 1) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 2.0 2.0) + (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 -1 -1)) + + +;; unknown operators +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.eq (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.ne (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.lt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.le (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.gt (local.get $x) (local.get $y)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (f2x64.ge (local.get $x) (local.get $y)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f64x2.eq (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.ne (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.lt (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.le (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.gt (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.ge (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module (memory 1) + (func (export "f64x2.eq-in-block") + (block + (drop + (block (result v128) + (f64x2.eq + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "f64x2.ne-in-block") + (block + (drop + (block (result v128) + (f64x2.ne + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "f64x2.lt-in-block") + (block + (drop + (block (result v128) + (f64x2.lt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "f64x2.le-in-block") + (block + (drop + (block (result v128) + (f64x2.le + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "f64x2.gt-in-block") + (block + (drop + (block (result v128) + (f64x2.gt + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "f64x2.ge-in-block") + (block + (drop + (block (result v128) + (f64x2.ge + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.eq") + (drop + (f64x2.eq + (f64x2.eq + (f64x2.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.eq + (f64x2.eq + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.ne") + (drop + (f64x2.ne + (f64x2.ne + (f64x2.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.ne + (f64x2.ne + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.ne + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.lt") + (drop + (f64x2.lt + (f64x2.lt + (f64x2.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.lt + (f64x2.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.lt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.le") + (drop + (f64x2.le + (f64x2.le + (f64x2.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.le + (f64x2.le + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.gt") + (drop + (f64x2.gt + (f64x2.gt + (f64x2.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.gt + (f64x2.gt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.gt + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "nested-f64x2.ge") + (drop + (f64x2.ge + (f64x2.ge + (f64x2.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.ge + (f64x2.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.ge + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) + (func (export "as-param") + (drop + (f64x2.eq + (f64x2.ne + (f64x2.lt + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.le + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + (f64x2.gt + (f64x2.ge + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (f64x2.eq + (v128.load (i32.const 2)) + (v128.load (i32.const 3)) + ) + ) + ) + ) + ) +) +(assert_return (invoke "f64x2.eq-in-block")) +(assert_return (invoke "f64x2.ne-in-block")) +(assert_return (invoke "f64x2.lt-in-block")) +(assert_return (invoke "f64x2.le-in-block")) +(assert_return (invoke "f64x2.gt-in-block")) +(assert_return (invoke "f64x2.ge-in-block")) +(assert_return (invoke "nested-f64x2.eq")) +(assert_return (invoke "nested-f64x2.ne")) +(assert_return (invoke "nested-f64x2.lt")) +(assert_return (invoke "nested-f64x2.le")) +(assert_return (invoke "nested-f64x2.gt")) +(assert_return (invoke "nested-f64x2.ge")) +(assert_return (invoke "as-param")) \ No newline at end of file diff --git a/test/core/simd/simd_i16x8_arith.wast b/test/core/simd/simd_i16x8_arith.wast new file mode 100644 index 0000000000..78b5dc7e20 --- /dev/null +++ b/test/core/simd/simd_i16x8_arith.wast @@ -0,0 +1,557 @@ +;; Tests for i16x8 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i16x8.add") (param v128 v128) (result v128) (i16x8.add (local.get 0) (local.get 1))) + (func (export "i16x8.sub") (param v128 v128) (result v128) (i16x8.sub (local.get 0) (local.get 1))) + (func (export "i16x8.mul") (param v128 v128) (result v128) (i16x8.mul (local.get 0) (local.get 1))) + (func (export "i16x8.neg") (param v128) (result v128) (i16x8.neg (local.get 0))) +) + + +;; i16x8.add +(assert_return (invoke "i16x8.add" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i8x16 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0x80008000 0x80008000 0x80008000 0x80008000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i16x8 0x8000 0xbf80 0x8000 0xbf80 0x8000 0xbf80 0x8000 0xbf80)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i16x8 0x8000 0x3f80 0x8000 0x3f80 0x8000 0x3f80 0x8000 0x3f80)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 3 6 9 12 15 18 21)) + +;; i16x8.sub +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32765 -32765 -32765 -32765 -32765 -32765 -32765 -32765)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i8x16 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80 0 0x80)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i32x4 0x80008000 0x80008000 0x80008000 0x80008000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i16x8 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i16x8 0x8000 0x4080 0x8000 0x4080 0x8000 0x4080 0x8000 0x4080)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i16x8 0x8000 0xc080 0x8000 0xc080 0x8000 0xc080 0x8000 0xc080)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x8081 0x01 0x8081 0x01 0x8081 0x01 0x8081)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0x81 0x01 0x81 0x01 0x81 0x01 0x81)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x8041 0x01 0x8041 0x01 0x8041 0x01 0x8041)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0x02 0x04 0x06 0x08 0x0a 0x0c 0x0e)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) + +;; i16x8.mul +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x1000 0x1000 0x1000 0x1000 0x1000 0x1000 0x1000 0x1000) + (v128.const i8x16 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i32x4 0x00020002 0x00020002 0x00020002 0x00020002)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0 0x7f80 0 0x7f80 0 0x7f80 0 0x7f80)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0 0xff80 0 0xff80 0 0xff80 0 0xff80)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0 0x7fc0 0 0x7fc0 0 0x7fc0 0 0x7fc0)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0xffff 0xfffc 0xfff7 0xfff0 0xffe7 0xffdc 0xffcf)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 0x02 0x08 0x12 0x20 0x32 0x48 0x62)) + +;; i16x8.neg +(assert_return (invoke "i16x8.neg" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) + (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x7fff -0x7fff -0x7fff -0x7fff)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.neg" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + +;; type check +(assert_invalid (module (func (result v128) (i16x8.neg (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.add (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (i16x8.add (i16x8.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-add") (param v128 v128 v128) (result v128) + (i16x8.mul (i16x8.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-sub") (param v128 v128 v128) (result v128) + (i16x8.mul (i16x8.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (i16x8.sub (i16x8.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (i16x8.add (i16x8.neg (local.get 0)) (local.get 1))) + (func (export "mul-neg") (param v128 v128) (result v128) + (i16x8.mul (i16x8.neg (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (i16x8.sub (i16x8.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "mul-add" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 4 8 12 16 20 24 28)) +(assert_return (invoke "mul-sub" (v128.const i16x8 0 2 4 6 8 10 12 14) + (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 1 4 9 16 25 36 49)) +(assert_return (invoke "sub-add" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "add-neg" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "mul-neg" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 -2 -4 -6 -8 -10 -12 -14)) +(assert_return (invoke "sub-neg" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 1 2 3 4 5 6 7)) + (v128.const i16x8 0 -2 -4 -6 -8 -10 -12 -14)) \ No newline at end of file diff --git a/test/core/simd/simd_i16x8_sat_arith.wast b/test/core/simd/simd_i16x8_sat_arith.wast new file mode 100644 index 0000000000..8f3e086373 --- /dev/null +++ b/test/core/simd/simd_i16x8_sat_arith.wast @@ -0,0 +1,627 @@ +;; Tests for i16x8 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i16x8.add_saturate_s") (param v128 v128) (result v128) (i16x8.add_saturate_s (local.get 0) (local.get 1))) + (func (export "i16x8.add_saturate_u") (param v128 v128) (result v128) (i16x8.add_saturate_u (local.get 0) (local.get 1))) + (func (export "i16x8.sub_saturate_s") (param v128 v128) (result v128) (i16x8.sub_saturate_s (local.get 0) (local.get 1))) + (func (export "i16x8.sub_saturate_u") (param v128 v128) (result v128) (i16x8.sub_saturate_u (local.get 0) (local.get 1))) +) + + +;; i16x8.add_saturate_s +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 3 6 9 12 15 18 21)) + +;; i16x8.add_saturate_u +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32769 32769 32769 32769 32769 32769 32769 32769)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 3 6 9 12 15 18 21)) + +;; i16x8.sub_saturate_s +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32765 -32765 -32765 -32765 -32765 -32765 -32765 -32765)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x8081 0x01 0x8081 0x01 0x8081 0x01 0x8081)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0x81 0x01 0x81 0x01 0x81 0x01 0x81)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x8041 0x01 0x8041 0x01 0x8041 0x01 0x8041)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0x41 0x01 0x41 0x01 0x41 0x01 0x41)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) + +;; i16x8.sub_saturate_u +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; Malformed cases: non-existent op names +(assert_malformed (module quote + "(func (result v128) (i16x8.add_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.sub_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.mul_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i16x8.div_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (i16x8.add_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.add_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) + (i16x8.add_saturate_s (i16x8.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_s-sub_u") (param v128 v128 v128) (result v128) + (i16x8.add_saturate_s (i16x8.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_u-sub_s") (param v128 v128 v128) (result v128) + (i16x8.add_saturate_u (i16x8.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_u-sub_u") (param v128 v128 v128) (result v128) + (i16x8.add_saturate_u (i16x8.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_s-neg") (param v128 v128) (result v128) + (i16x8.add_saturate_s (i16x8.neg (local.get 0)) (local.get 1))) + (func (export "sat-add_u-neg") (param v128 v128) (result v128) + (i16x8.add_saturate_u (i16x8.neg (local.get 0)) (local.get 1))) + (func (export "sat-sub_s-neg") (param v128 v128) (result v128) + (i16x8.sub_saturate_s (i16x8.neg (local.get 0)) (local.get 1))) + (func (export "sat-sub_u-neg") (param v128 v128) (result v128) + (i16x8.sub_saturate_u (i16x8.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "sat-add_s-sub_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "sat-add_s-sub_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "sat-add_u-sub_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "sat-add_u-sub_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "sat-add_s-neg" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "sat-add_u-neg" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "sat-sub_s-neg" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "sat-sub_u-neg" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) \ No newline at end of file diff --git a/test/core/simd/simd_i32x4_arith.wast b/test/core/simd/simd_i32x4_arith.wast new file mode 100644 index 0000000000..7fe81070c3 --- /dev/null +++ b/test/core/simd/simd_i32x4_arith.wast @@ -0,0 +1,557 @@ +;; Tests for i32x4 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i32x4.add") (param v128 v128) (result v128) (i32x4.add (local.get 0) (local.get 1))) + (func (export "i32x4.sub") (param v128 v128) (result v128) (i32x4.sub (local.get 0) (local.get 1))) + (func (export "i32x4.mul") (param v128 v128) (result v128) (i32x4.mul (local.get 0) (local.get 1))) + (func (export "i32x4.neg") (param v128) (result v128) (i32x4.neg (local.get 0))) +) + + +;; i32x4.add +(assert_return (invoke "i32x4.add" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x3fffffff 0x3fffffff 0x3fffffff 0x3fffffff) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -0x3fffffff -0x3fffffff -0x3fffffff -0x3fffffff) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000001 -0x40000001 -0x40000001 -0x40000001)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -0x01 -0x01 -0x01 -0x01)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i8x16 0 0 0 0x80 0 0 0 0x80 0 0 0 0x80 0 0 0 0x80)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i16x8 0 0x8000 0 0x8000 0 0x8000 0 0x8000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i32x4 0xbf800000 0xbf800000 0xbf800000 0xbf800000)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i32x4 0x3f800000 0x3f800000 0x3f800000 0x3f800000)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 0x7f800001 0x7f800001 0x7f800001 0x7f800001)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0xff800001 0xff800001 0xff800001 0xff800001)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0x7fc00001 0x7fc00001 0x7fc00001 0x7fc00001)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 0xffffffff 0xfffffffe 0xfffffffd)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 2 4 6)) + (v128.const i32x4 0 3 6 9)) + +;; i32x4.sub +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483644 2147483644 2147483644 2147483644)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483645 2147483645 2147483645 2147483645)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483645 -2147483645 -2147483645 -2147483645)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x3fffffff 0x3fffffff 0x3fffffff 0x3fffffff) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -0x3fffffff -0x3fffffff -0x3fffffff -0x3fffffff) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000001 -0x40000001 -0x40000001 -0x40000001)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -0x01 -0x01 -0x01 -0x01)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i8x16 0 0 0 0x80 0 0 0 0x80 0 0 0 0x80 0 0 0 0x80)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1 1 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i16x8 0 0x8000 0 0x8000 0 0x8000 0 0x8000)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 1 1 1 1) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 0x02 0x02 0x02 0x02)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i32x4 0x40800000 0x40800000 0x40800000 0x40800000)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i32x4 0xc0800000 0xc0800000 0xc0800000 0xc0800000)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 0x80800001 0x80800001 0x80800001 0x80800001)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x00800001 0x00800001 0x00800001 0x00800001)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0x80400001 0x80400001 0x80400001 0x80400001)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 0xffffffff 0xfffffffe 0xfffffffd)) + (v128.const i32x4 0 0x02 0x04 0x06)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 2 4 6)) + (v128.const i32x4 0 -1 -2 -3)) + +;; i32x4.mul +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483645 2147483645 2147483645 2147483645)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x3fffffff 0x3fffffff 0x3fffffff 0x3fffffff) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000) + (v128.const i32x4 0x40000000 0x40000000 0x40000000 0x40000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -0x3fffffff -0x3fffffff -0x3fffffff -0x3fffffff) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 -0x40000000 -0x40000000 -0x40000000 -0x40000000) + (v128.const i32x4 -0x40000001 -0x40000001 -0x40000001 -0x40000001)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -0x01 -0x01 -0x01 -0x01)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x10000000 0x10000000 0x10000000 0x10000000) + (v128.const i8x16 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i16x8 0 0x02 0 0x02 0 0x02 0 0x02)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 0x7f800000 0x7f800000 0x7f800000 0x7f800000)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0xff800000 0xff800000 0xff800000 0xff800000)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x1 0x1 0x1 0x1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i32x4 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 0xffffffff 0xfffffffe 0xfffffffd)) + (v128.const i32x4 0 0xffffffff 0xfffffffc 0xfffffff7)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 2 4 6)) + (v128.const i32x4 0 0x02 0x08 0x12)) + +;; i32x4.neg +(assert_return (invoke "i32x4.neg" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646)) + (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 0x01 0x01 0x01 0x01)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -0x01 -0x01 -0x01 -0x01)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 -0x7fffffff -0x7fffffff -0x7fffffff -0x7fffffff)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.neg" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 1 1 1 1)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.neg (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.add (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (i32x4.add (i32x4.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-add") (param v128 v128 v128) (result v128) + (i32x4.mul (i32x4.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-sub") (param v128 v128 v128) (result v128) + (i32x4.mul (i32x4.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (i32x4.sub (i32x4.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (i32x4.add (i32x4.neg (local.get 0)) (local.get 1))) + (func (export "mul-neg") (param v128 v128) (result v128) + (i32x4.mul (i32x4.neg (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (i32x4.sub (i32x4.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 2 4 6) + (v128.const i32x4 0 2 4 6)) + (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "mul-add" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 1 2 3) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 4 8 12)) +(assert_return (invoke "mul-sub" (v128.const i32x4 0 2 4 6) + (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 1 2 3)) + (v128.const i32x4 0 1 4 9)) +(assert_return (invoke "sub-add" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 2 4 6) + (v128.const i32x4 0 2 4 6)) + (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "add-neg" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 1 2 3)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "mul-neg" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 -2 -4 -6)) +(assert_return (invoke "sub-neg" (v128.const i32x4 0 1 2 3) + (v128.const i32x4 0 1 2 3)) + (v128.const i32x4 0 -2 -4 -6)) \ No newline at end of file diff --git a/test/core/simd/simd_i8x16_arith.wast b/test/core/simd/simd_i8x16_arith.wast new file mode 100644 index 0000000000..1042233f18 --- /dev/null +++ b/test/core/simd/simd_i8x16_arith.wast @@ -0,0 +1,383 @@ +;; Tests for i8x16 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i8x16.add") (param v128 v128) (result v128) (i8x16.add (local.get 0) (local.get 1))) + (func (export "i8x16.sub") (param v128 v128) (result v128) (i8x16.sub (local.get 0) (local.get 1))) + (func (export "i8x16.neg") (param v128) (result v128) (i8x16.neg (local.get 0))) +) + + +;; i8x16.add +(assert_return (invoke "i8x16.add" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i8x16 0x80 0x80 0 0xbf 0x80 0x80 0 0xbf 0x80 0x80 0 0xbf 0x80 0x80 0 0xbf)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i8x16 0x80 0x80 0 0x3f 0x80 0x80 0 0x3f 0x80 0x80 0 0x3f 0x80 0x80 0 0x3f)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) + +;; i8x16.sub +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i16x8 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080 0x8080)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i32x4 0x80808080 0x80808080 0x80808080 0x80808080)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 +0.0 +0.0 +0.0 +0.0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const i8x16 0x80 0x80 0 0x41 0x80 0x80 0 0x41 0x80 0x80 0 0x41 0x80 0x80 0 0x41)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const i8x16 0x80 0x80 0 0xc1 0x80 0x80 0 0xc1 0x80 0x80 0 0xc1 0x80 0x80 0 0xc1)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x82 0x01 0x01 0x81 0x82 0x01 0x01 0x81 0x82 0x01 0x01 0x81 0x82)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0x02 0x01 0x01 0x81 0x02 0x01 0x01 0x81 0x02 0x01 0x01 0x81 0x02)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0x02 0x04 0x06 0x08 0x0a 0x0c 0x0e 0x10 0x12 0x14 0x16 0x18 0x1a 0x1c 0x1e)) +(assert_return (invoke "i8x16.sub" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15)) + +;; i8x16.neg +(assert_return (invoke "i8x16.neg" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) + (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.neg" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + +;; type check +(assert_invalid (module (func (result v128) (i8x16.neg (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.add (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (i8x16.add (i8x16.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (i8x16.sub (i8x16.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (i8x16.add (i8x16.neg (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (i8x16.sub (i8x16.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "sub-add" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "add-neg" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "sub-neg" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i8x16 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30)) \ No newline at end of file diff --git a/test/core/simd/simd_i8x16_sat_arith.wast b/test/core/simd/simd_i8x16_sat_arith.wast new file mode 100644 index 0000000000..2ea780922e --- /dev/null +++ b/test/core/simd/simd_i8x16_sat_arith.wast @@ -0,0 +1,651 @@ +;; Tests for i8x16 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i8x16.add_saturate_s") (param v128 v128) (result v128) (i8x16.add_saturate_s (local.get 0) (local.get 1))) + (func (export "i8x16.add_saturate_u") (param v128 v128) (result v128) (i8x16.add_saturate_u (local.get 0) (local.get 1))) + (func (export "i8x16.sub_saturate_s") (param v128 v128) (result v128) (i8x16.sub_saturate_s (local.get 0) (local.get 1))) + (func (export "i8x16.sub_saturate_u") (param v128 v128) (result v128) (i8x16.sub_saturate_u (local.get 0) (local.get 1))) +) + + +;; i8x16.add_saturate_s +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) + +;; i8x16.add_saturate_u +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) + +;; i8x16.sub_saturate_s +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0x02 0x04 0x06 0x08 0x0a 0x0c 0x0e 0x10 0x12 0x14 0x16 0x18 0x1a 0x1c 0x1e)) +(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15)) + +;; i8x16.sub_saturate_u +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; Malformed cases: non-existent op names +(assert_malformed (module quote + "(func (result v128) (i8x16.add_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.sub_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.mul_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i8x16.div_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.add_saturate_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.add_saturate_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.sub_saturate_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i32x4.sub_saturate_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f32x4.add_saturate_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f32x4.add_saturate_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f32x4.sub_saturate_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f32x4.sub_saturate_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (i8x16.add_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.add_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) + (i8x16.add_saturate_s (i8x16.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_s-sub_u") (param v128 v128 v128) (result v128) + (i8x16.add_saturate_s (i8x16.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_u-sub_s") (param v128 v128 v128) (result v128) + (i8x16.add_saturate_u (i8x16.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_u-sub_u") (param v128 v128 v128) (result v128) + (i8x16.add_saturate_u (i8x16.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "sat-add_s-neg") (param v128 v128) (result v128) + (i8x16.add_saturate_s (i8x16.neg (local.get 0)) (local.get 1))) + (func (export "sat-add_u-neg") (param v128 v128) (result v128) + (i8x16.add_saturate_u (i8x16.neg (local.get 0)) (local.get 1))) + (func (export "sat-sub_s-neg") (param v128 v128) (result v128) + (i8x16.sub_saturate_s (i8x16.neg (local.get 0)) (local.get 1))) + (func (export "sat-sub_u-neg") (param v128 v128) (result v128) + (i8x16.sub_saturate_u (i8x16.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "sat-add_s-sub_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "sat-add_s-sub_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "sat-add_u-sub_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "sat-add_u-sub_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "sat-add_s-neg" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "sat-add_u-neg" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "sat-sub_s-neg" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "sat-sub_u-neg" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) \ No newline at end of file diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index ce2ce1b3d6..24b2d5a67c 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -42,6 +42,22 @@ (f32x4.replace_lane 0 (local.get 0) (local.get 1))) (func (export "f32x4_replace_lane-last") (param v128 f32) (result v128) (f32x4.replace_lane 3 (local.get 0) (local.get 1))) + (func (export "i64x2_extract_lane-first") (param v128) (result i64) + (i64x2.extract_lane 0 (local.get 0))) + (func (export "i64x2_extract_lane-last") (param v128) (result i64) + (i64x2.extract_lane 1 (local.get 0))) + (func (export "f64x2_extract_lane-first") (param v128) (result f64) + (f64x2.extract_lane 0 (local.get 0))) + (func (export "f64x2_extract_lane-last") (param v128) (result f64) + (f64x2.extract_lane 1 (local.get 0))) + (func (export "i64x2_replace_lane-first") (param v128 i64) (result v128) + (i64x2.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "i64x2_replace_lane-last") (param v128 i64) (result v128) + (i64x2.replace_lane 1 (local.get 0) (local.get 1))) + (func (export "f64x2_replace_lane-first") (param v128 f64) (result v128) + (f64x2.replace_lane 0 (local.get 0) (local.get 1))) + (func (export "f64x2_replace_lane-last") (param v128 f64) (result v128) + (f64x2.replace_lane 1 (local.get 0) (local.get 1))) ;; Swizzle and shuffle (func (export "v8x16_swizzle") (param v128 v128) (result v128) @@ -115,6 +131,18 @@ (assert_return (invoke "i32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -2147483648)) (assert_return (invoke "i32x4_extract_lane-last" (v128.const f32x4 0 0 0 5.0)) (i32.const 0x40a00000)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 9223372036854775807 0)) (i64.const 9223372036854775807)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 0x7ffffffffffffffe 0)) (i64.const 0x7ffffffffffffffe)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 18446744073709551615 0)) (i64.const -1)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 0xffffffffffffffff 0)) (i64.const -1)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 9223372036854775808)) (i64.const -9223372036854775808)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 0x8000000000000000)) (i64.const -0x8000000000000000)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 0x8000000000000000)) (i64.const 0x8000000000000000)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f)) (i64.const 9223372036854775807)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i64.const -9223372036854775808)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i32x4 0 0 0xffffffff 0x7fffffff)) (i64.const 9223372036854775807)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const f64x2 -inf +inf)) (i64.const 0x7ff0000000000000)) + (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 -5.0 0.0 0.0 0.0)) (f32.const -5.0)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 1e38 0.0 0.0 0.0)) (f32.const 1e38)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0x1.fffffep127 0.0 0.0 0.0)) (f32.const 0x1.fffffep127)) @@ -139,6 +167,36 @@ (assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0xff800000)) (f32.const -inf)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x7fc00000)) (f32.const nan)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -1.5 0.0)) (f64.const -1.5)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 1.5 0.0)) (f64.const 1.5)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -1.7976931348623157e-308 0x0p+0)) (f64.const -1.7976931348623157e-308)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 1.7976931348623157e-308 0x0p-0)) (f64.const 1.7976931348623157e-308)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -0x1.fffffffffffffp-1023 0x0p+0)) (f64.const -0x1.fffffffffffffp-1023)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 0x1.fffffffffffffp-1023 0x0p-0)) (f64.const 0x1.fffffffffffffp-1023)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -inf 0.0)) (f64.const -inf)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 inf 0.0)) (f64.const inf)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -nan -0.0)) (f64.const -nan)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 nan 0.0)) (f64.const nan)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 2.25)) (f64.const 2.25)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 -2.25)) (f64.const -2.25)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0x0p-0 -1.7976931348623157e+308)) (f64.const -1.7976931348623157e+308)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0x0p+0 1.7976931348623157e+308)) (f64.const 1.7976931348623157e+308)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0x0p-0 -0x1.fffffffffffffp+1023)) (f64.const -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0x0p+0 0x1.fffffffffffffp+1023)) (f64.const 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 -0.0 -inf)) (f64.const -inf)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 inf)) (f64.const inf)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 -0.0 -nan)) (f64.const -nan)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 nan)) (f64.const nan)) + +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (f64.const 0.0)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (f64.const -0.0)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x4000)) (f64.const 2.0)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0xc000)) (f64.const -2.0)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i32x4 0 0 0xffffffff 0x7fefffff)) (f64.const 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i32x4 0 0 0 0x00100000)) (f64.const 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i32x4 0 0 0xffffffff 0x000fffff)) (f64.const 0x1.ffffffffffffep-1023)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const i32x4 0 0 1 0)) (f64.const 0x0.0000000000002p-1023)) + (assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 127)) (v128.const i8x16 127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 128)) (v128.const i8x16 -128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16_replace_lane-first" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 255)) (v128.const i8x16 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) @@ -177,7 +235,7 @@ (assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const -2147483648)) (v128.const i32x4 0 0 0 -2147483648)) ;; Use other v128 interpretations as arguments (assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483648)) (v128.const i32x4 0 0 0 -2147483648)) (assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) (assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80000000)) (v128.const i32x4 0 0 0 -2147483648)) (assert_return (invoke "i32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) @@ -204,6 +262,54 @@ (assert_return (invoke "f32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) +(assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 9223372036854775807)) (v128.const i64x2 9223372036854775807 0)) +(assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 18446744073709551615)) (v128.const i64x2 -1 0)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 9223372036854775808)) (v128.const i64x2 0 9223372036854775808)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 9223372036854775808)) (v128.const i64x2 0 -9223372036854775808)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i64.const 1)) (v128.const i64x2 0 1)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i64.const -1)) (v128.const i64x2 0 0xffffffffffffffff)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 9223372036854775807)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 -9223372036854775808)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 0x7fffffffffffffff)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 -0x8000000000000000)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 0x7fffffffffffffff)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 0x8000000000000000)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 inf) (i64.const 1)) (v128.const i64x2 0 1)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 nan) (i64.const -1)) (v128.const i64x2 0 -1)) + +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 1.0 1.0) (f64.const 0x0p+0)) (v128.const f64x2 0.0 1.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 -1.0 -1.0) (f64.const -0x0p-0)) (v128.const f64x2 -0.0 -1.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const 1.25)) (v128.const f64x2 1.25 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const -1.25)) (v128.const f64x2 -1.25 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 -nan 0.0) (f64.const -1.7976931348623157e+308)) (v128.const f64x2 -1.7976931348623157e+308 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 nan 0.0) (f64.const 1.7976931348623157e+308)) (v128.const f64x2 1.7976931348623157e+308 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 -inf 0.0) (f64.const -0x1.fffffffffffffp-1023)) (v128.const f64x2 -0x1.fffffffffffffp-1023 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 inf 0.0) (f64.const 0x1.fffffffffffffp-1023)) (v128.const f64x2 0x1.fffffffffffffp-1023 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const -nan)) (v128.const f64x2 -nan 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const nan)) (v128.const f64x2 nan 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const -inf)) (v128.const f64x2 -inf 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const inf)) (v128.const f64x2 inf 0.0)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 2.0 2.0) (f64.const 0.0)) (v128.const f64x2 2.0 0.0)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 -2.0 -2.0) (f64.const -0.0)) (v128.const f64x2 -2.0 -0.0)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 2.25)) (v128.const f64x2 0.0 2.25)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const -2.25)) (v128.const f64x2 0.0 -2.25)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 -nan) (f64.const -1.7976931348623157e+308)) (v128.const f64x2 0.0 -1.7976931348623157e+308)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 nan) (f64.const 1.7976931348623157e+308)) (v128.const f64x2 0.0 1.7976931348623157e+308)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 -inf) (f64.const -0x1.fffffffffffffp-1023)) (v128.const f64x2 0.0 -0x1.fffffffffffffp-1023)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 inf) (f64.const 0x1.fffffffffffffp-1023)) (v128.const f64x2 0.0 0x1.fffffffffffffp-1023)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const -nan)) (v128.const f64x2 0.0 -nan)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const nan)) (v128.const f64x2 0.0 nan)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const -inf)) (v128.const f64x2 0.0 -inf)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const inf)) (v128.const f64x2 0.0 inf)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f64.const -0x1p-1022)) (v128.const f64x2 0 -0x1p-1022)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f64.const 0x1p-1022)) (v128.const f64x2 0 0x1p-1022)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const -4.9406564584124654e-324)) (v128.const f64x2 0 -4.9406564584124654e-324)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const 4.9406564584124654e-324)) (v128.const f64x2 0 4.9406564584124654e-324)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (f64.const -inf)) (v128.const f64x2 0 -inf)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (f64.const inf)) (v128.const f64x2 0 inf)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i64x2 0 0) (f64.const -nan)) (v128.const f64x2 0 -nan)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const i64x2 0 0) (f64.const nan)) (v128.const f64x2 0 nan)) + (assert_return (invoke "v8x16_swizzle" (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) @@ -320,6 +426,14 @@ (assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i64) (i64x2.extract_lane 2 (v128.const i64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f64) (f64x2.extract_lane 2 (v128.const f64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i64x2.replace_lane 2 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0) (f64.const 1.0)))) "invalid lane index") ;; Lane index is determined by the instruction's interpretation only. @@ -327,10 +441,13 @@ (assert_invalid (module (func (result i32) (i16x8.extract_lane_u 8 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i32x4.extract_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (f32x4.extract_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result v128) (f16x8.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 8 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") - +(assert_invalid (module (func (result i64) (i64x2.extract_lane 2 (v128.const i64x2 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f64) (f64x2.extract_lane 2 (v128.const f64x2 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i64x2.replace_lane 2 (v128.const i64x2 0 0 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0 0 0) (f64.const 1.0)))) "invalid lane index") ;; Invalid parameters: required v128 but pass other types @@ -344,16 +461,22 @@ (assert_invalid (module (func (result v128) (i16x8.replace_lane 0 (i64.const 0) (i32.const 1)))) "type mismatch") (assert_invalid (module (func (result v128) (i32x4.replace_lane 0 (i32.const 0) (i32.const 1)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.replace_lane 0 (f32.const 0.0) (i32.const 1)))) "type mismatch") +(assert_invalid (module (func (result i64) (i64x2.extract_lane 0 (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result f64) (f64x2.extract_lane 0 (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 0 (i32.const 0) (i32.const 1)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 0 (f32.const 0.0) (i32.const 1)))) "type mismatch") -;; Invalid type for the replaced value +;; Invalid types for the replaced value (assert_invalid (module (func (result v128) (i8x16.replace_lane 0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f32.const 1.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.replace_lane 0 (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const 1.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i32x4.replace_lane 0 (v128.const i32x4 0 0 0 0) (f32.const 1.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.replace_lane 0 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "type mismatch") -;; Invalid type for swizzle and shuffle value +(assert_invalid (module (func (result v128) (i64x2.replace_lane 0 (v128.const i64x2 0 0) (f64.const 1.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 0 (v128.const f64x2 0 0) (i64.const 1)))) "type mismatch") +;; Invalid types for swizzle and shuffle values (assert_invalid (module (func (result v128) (v8x16.swizzle (i32.const 1) (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") (assert_invalid (module (func (result v128) @@ -366,7 +489,6 @@ (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") ;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 - (assert_invalid (module (func (result v128) (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) @@ -384,16 +506,17 @@ (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") - ;; Possible wrong instruction names that'd be used (assert_malformed (module quote "(func (result i32) (i8x16.extract_lane 0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(func (result i32) (i16x8.extract_lane 0 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(func (result i32) (i32x4.extract_lane_s 0 (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(func (result i32) (i32x4.extract_lane_u 0 (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(func (result i32) (i64x2.extract_lane_s 0 (v128.const i64x2 0 0)))") "unknown operator") +(assert_malformed (module quote "(func (result i32) (i64x2.extract_lane_u 0 (v128.const i64x2 0 0)))") "unknown operator") -;; Old shuffle instruction names should not work +;; Old shuffle instruction names will not work (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle1 (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") @@ -403,9 +526,7 @@ "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)))") "unknown operator") - ;; v8x16 not i8x16 - (assert_malformed (module quote "(func (result v128) " "(i8x16.swizzle (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") @@ -426,7 +547,7 @@ (assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_s (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_u (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (param i32) (result i32) (i32x4.extract_lane (local.get 0) (v128.const i32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result i32) (f32x4.extract_lane (local.get 0) (v128.const f32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result f32) (f32x4.extract_lane (local.get 0) (v128.const f32x4 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (param i32) (result v128) (i8x16.replace_lane (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") (assert_malformed (module quote "(func (param i32) (result v128) (i16x8.replace_lane (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") (assert_malformed (module quote "(func (param i32) (result v128) (i32x4.replace_lane (local.get 0) (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") @@ -436,6 +557,11 @@ "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i64) (i64x2.extract_lane (local.get 0) (v128.const i64x2 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result f64) (f64x2.extract_lane (local.get 0) (v128.const f64x2 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (i64x2.replace_lane (local.get 0) (v128.const i64x2 0 0) (i64.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result v128) (f64x2.replace_lane (local.get 0) (v128.const f64x2 0 0) (f64.const 1.0)))") "expected i8 literal") + ;; Pass non-literal as the lane index (assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") @@ -443,14 +569,18 @@ (assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (result i32) (i32x4.extract_lane nan (v128.const i32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result i32) (f32x4.extract_lane nan (v128.const f32x4 0 0 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane nan (v128.const f32x4 0 0 0 0)))") "expected i8 literal") (assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -2.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") (assert_malformed (module quote "(func (result v128) (i16x8.replace_lane nan (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") (assert_malformed (module quote "(func (result v128) (i32x4.replace_lane inf (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") (assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -inf (v128.const f32x4 0 0 0 0) (f32.const 1.1)))") "expected i8 literal") -;; v8x16.shuffle expects a 16-byte literals as first argument +(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane nan (v128.const i64x2 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane nan (v128.const f64x2 0 0)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane inf (v128.const i64x2 0 0) (i64.const 1)))") "expected i8 literal") +(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane -inf (v128.const f64x2 0 0) (f64.const 1.1)))") "expected i8 literal") +;; v8x16.shuffle expects a 16-byte literals as first argument (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " @@ -493,6 +623,10 @@ (i32x4.replace_lane 0 (local.get 0) (i32x4.extract_lane 0 (local.get 1)))) (func (export "f32x4_extract_lane") (param v128 v128) (result v128) (i32x4.replace_lane 0 (local.get 0) (i32x4.extract_lane 0 (local.get 1)))) + (func (export "i64x2_extract_lane") (param v128 v128) (result v128) + (i64x2.replace_lane 0 (local.get 0) (i64x2.extract_lane 0 (local.get 1)))) + (func (export "f64x2_extract_lane") (param v128 v128) (result v128) + (f64x2.replace_lane 0 (local.get 0) (f64x2.extract_lane 0 (local.get 1)))) ;; as *.extract_lane's operand (func (export "i8x16_replace_lane-s") (param v128 i32) (result i32) @@ -507,6 +641,10 @@ (i32x4.extract_lane 3 (i32x4.replace_lane 3 (local.get 0) (local.get 1)))) (func (export "f32x4_replace_lane") (param v128 f32) (result f32) (f32x4.extract_lane 3 (f32x4.replace_lane 3 (local.get 0) (local.get 1)))) + (func (export "i64x2_replace_lane") (param v128 i64) (result i64) + (i64x2.extract_lane 1 (i64x2.replace_lane 1 (local.get 0) (local.get 1)))) + (func (export "f64x2_replace_lane") (param v128 f64) (result f64) + (f64x2.extract_lane 1 (f64x2.replace_lane 1 (local.get 0) (local.get 1)))) ;; i8x16.replace outputs as shuffle operand (func (export "as-v8x16_swizzle-operand") (param v128 i32 v128) (result v128) @@ -530,6 +668,11 @@ (assert_return (invoke "i32x4_replace_lane" (v128.const i32x4 0 0 0 0) (i32.const -1)) (i32.const -1)) (assert_return (invoke "f32x4_replace_lane" (v128.const f32x4 0 0 0 0) (f32.const 1.25)) (f32.const 1.25)) +(assert_return (invoke "i64x2_extract_lane" (v128.const i64x2 0 0) (v128.const i64x2 0xffffffffffffffff -1)) (v128.const i64x2 0xffffffffffffffff 0)) +(assert_return (invoke "f64x2_extract_lane" (v128.const f64x2 0 0) (v128.const f64x2 1e308 nan)) (v128.const f64x2 1e308 0)) +(assert_return (invoke "i64x2_replace_lane" (v128.const i64x2 0 0) (i64.const -1)) (i64.const -1)) +(assert_return (invoke "f64x2_replace_lane" (v128.const f64x2 0 0) (f64.const 2.5)) (f64.const 2.5)) + (assert_return (invoke "as-v8x16_swizzle-operand" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) (i32.const 255) (v128.const i8x16 -1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1)) @@ -551,6 +694,10 @@ (i32x4.splat (i32x4.extract_lane 0 (local.get 0)))) (func (export "as-f32x4_splat-operand") (param v128) (result v128) (f32x4.splat (f32x4.extract_lane 0 (local.get 0)))) + (func (export "as-i64x2_splat-operand") (param v128) (result v128) + (i64x2.splat (i64x2.extract_lane 0 (local.get 0)))) + (func (export "as-f64x2_splat-operand") (param v128) (result v128) + (f64x2.splat (f64x2.extract_lane 0 (local.get 0)))) ;; Integer arithmetic (func (export "as-i8x16_add-operands") (param v128 i32 v128 i32) (result v128) @@ -558,7 +705,9 @@ (func (export "as-i16x8_add-operands") (param v128 i32 v128 i32) (result v128) (i16x8.add (i16x8.replace_lane 0 (local.get 0) (local.get 1)) (i16x8.replace_lane 7 (local.get 2) (local.get 3)))) (func (export "as-i32x4_add-operands") (param v128 i32 v128 i32) (result v128) - (i32x4.add (i32x4.replace_lane 0 (local.get 0) (local.get 1)) (i32x4.replace_lane 3 (local.get 2) (local.get 3)))) + (i32x4.add (i32x4.replace_lane 0 (local.get 0) (local.get 1)) (i32x4.replace_lane 3 (local.get 2) (local.get 3)))) + (func (export "as-i64x2_add-operands") (param v128 i64 v128 i64) (result v128) + (i64x2.add (i64x2.replace_lane 0 (local.get 0) (local.get 1)) (i64x2.replace_lane 1 (local.get 2) (local.get 3)))) (func (export "swizzle-as-i8x16_add-operands") (param v128 v128 v128 v128) (result v128) (i8x16.add (v8x16.swizzle (local.get 0) (local.get 1)) (v8x16.swizzle (local.get 2) (local.get 3)))) @@ -571,8 +720,10 @@ (i8x16.any_true (i8x16.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "as-i16x8_any_true-operand") (param v128 i32) (result i32) (i16x8.any_true (i16x8.replace_lane 0 (local.get 0) (local.get 1)))) - (func (export "as-i32x4_any_true-operand") (param v128 i32) (result i32) + (func (export "as-i32x4_any_true-operand1") (param v128 i32) (result i32) (i32x4.any_true (i32x4.replace_lane 0 (local.get 0) (local.get 1)))) + (func (export "as-i32x4_any_true-operand2") (param v128 i64) (result i32) + (i32x4.any_true (i64x2.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "swizzle-as-i8x16_all_true-operands") (param v128 v128) (result i32) (i8x16.all_true (v8x16.swizzle (local.get 0) (local.get 1)))) @@ -584,6 +735,8 @@ (assert_return (invoke "as-i16x8_splat-operand" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) (assert_return (invoke "as-i32x4_splat-operand" (v128.const i32x4 0x10000 0 0 0)) (v128.const i32x4 65536 65536 65536 65536)) (assert_return (invoke "as-f32x4_splat-operand" (v128.const f32x4 3.14 nan nan nan)) (v128.const f32x4 3.14 3.14 3.14 3.14)) +(assert_return (invoke "as-i64x2_splat-operand" (v128.const i64x2 -1 0)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "as-f64x2_splat-operand" (v128.const f64x2 inf nan)) (v128.const f64x2 inf inf)) (assert_return (invoke "as-i8x16_add-operands" (v128.const i8x16 0xff 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) (i32.const 1) (v128.const i8x16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0xff) (i32.const 1)) @@ -594,6 +747,8 @@ (v128.const i16x8 65 53 45 41 41 45 53 65)) (assert_return (invoke "as-i32x4_add-operands" (v128.const i32x4 -1 8 27 64) (i32.const 1) (v128.const i32x4 64 27 8 -1) (i32.const 1)) (v128.const i32x4 65 35 35 65)) +(assert_return (invoke "as-i64x2_add-operands" + (v128.const i64x2 -1 8) (i64.const 1) (v128.const i64x2 64 27) (i64.const 1)) (v128.const i64x2 65 9)) (assert_return (invoke "swizzle-as-i8x16_add-operands" (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) @@ -610,7 +765,8 @@ (assert_return (invoke "as-i8x16_any_true-operand" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) (i32.const 1)) (assert_return (invoke "as-i16x8_any_true-operand" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)) (i32.const 1)) -(assert_return (invoke "as-i32x4_any_true-operand" (v128.const i32x4 1 0 0 0) (i32.const 0)) (i32.const 0)) +(assert_return (invoke "as-i32x4_any_true-operand1" (v128.const i32x4 1 0 0 0) (i32.const 0)) (i32.const 0)) +(assert_return (invoke "as-i32x4_any_true-operand2" (v128.const i64x2 1 0) (i64.const 0)) (i32.const 0)) (assert_return (invoke "swizzle-as-i8x16_all_true-operands" (v128.const i8x16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) @@ -638,12 +794,20 @@ (func (export "as-v128_store-operand-4") (param v128 f32) (result v128) (v128.store (i32.const 0) (f32x4.replace_lane 0 (local.get 0) (local.get 1))) (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-5") (param v128 i64) (result v128) + (v128.store (i32.const 0) (i64x2.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-6") (param v128 f64) (result v128) + (v128.store (i32.const 0) (f64x2.replace_lane 0 (local.get 0) (local.get 1))) + (v128.load (i32.const 0))) ) (assert_return (invoke "as-v128_store-operand-1" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) (v128.const i8x16 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "as-v128_store-operand-2" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 256)) (v128.const i16x8 0x100 0 0 0 0 0 0 0)) -(assert_return (invoke "as-v128_store-operand-3" (v128.const i32x4 0 0 0 0)(i32.const 0xffffffff)) (v128.const i32x4 -1 0 0 0)) -(assert_return (invoke "as-v128_store-operand-4" (v128.const f32x4 0 0 0 0)(f32.const 3.14)) (v128.const f32x4 3.14 0 0 0)) +(assert_return (invoke "as-v128_store-operand-3" (v128.const i32x4 0 0 0 0) (i32.const 0xffffffff)) (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "as-v128_store-operand-4" (v128.const f32x4 0 0 0 0) (f32.const 3.14)) (v128.const f32x4 3.14 0 0 0)) +(assert_return (invoke "as-v128_store-operand-5" (v128.const i64x2 0 0) (i64.const 0xffffffffffffffff)) (v128.const i64x2 -1 0)) +(assert_return (invoke "as-v128_store-operand-6" (v128.const f64x2 0 0) (f64.const 3.14)) (v128.const f64x2 3.14 0)) ;; As the argument of wasm core ops @@ -666,6 +830,13 @@ (func (export "as-global_set-value-2") (param v128 v128) (result v128) (global.set $h (v8x16.shuffle 0 1 2 3 4 5 6 7 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) (return (global.get $h))) + + (func (export "as-local_set-value-1") (param v128) (result i64) (local i64) + (local.set 1 (i64x2.extract_lane 0 (local.get 0))) + (return (local.get 1))) + (func (export "as-global_set-value-3") (param v128 f64) (result v128) + (global.set $g (f64x2.replace_lane 0 (local.get 0) (local.get 1))) + (return (global.get $g))) ) (assert_return (invoke "as-if-condition-value" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 0)) @@ -681,3 +852,6 @@ (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1) (v128.const i8x16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1)) (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 8 7 6 5 4 3 2 1)) + +(assert_return (invoke "as-local_set-value-1" (v128.const i64x2 -1 -1)) (i64.const -1)) +(assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) \ No newline at end of file diff --git a/test/core/simd/simd_load.wast b/test/core/simd/simd_load.wast index da4426e93b..ad85a7c624 100644 --- a/test/core/simd/simd_load.wast +++ b/test/core/simd/simd_load.wast @@ -64,20 +64,16 @@ (module (memory 1) (data (offset (i32.const 0)) "\02\00\00\00\02\00\00\00\02\00\00\00\02\00\00\00") (data (offset (i32.const 16)) "\03\00\00\00\03\00\00\00\03\00\00\00\03\00\00\00") - (func (export "as-add/sub/sul-operand") (result v128) + (func (export "as-add/sub-operand") (result v128) ;; 2 2 2 2 + 3 3 3 3 = 5 5 5 5 - ;; 5 5 5 5 + 3 3 3 3 = 2 2 2 2 - ;; 2 2 2 2 * 3 3 3 3 = 6 6 6 6 - (i8x16.mul - (i8x16.sub - (i8x16.add (v128.load (i32.const 0)) (v128.load (i32.const 16))) - (v128.load (i32.const 16)) - ) + ;; 5 5 5 5 - 3 3 3 3 = 2 2 2 2 + (i8x16.sub + (i8x16.add (v128.load (i32.const 0)) (v128.load (i32.const 16))) (v128.load (i32.const 16)) ) ) ) -(assert_return (invoke "as-add/sub/sul-operand") (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "as-add/sub-operand") (v128.const i32x4 2 2 2 2)) (module (memory 1) (data (offset (i32.const 0)) "\00\00\00\43\00\00\80\3f\66\66\e6\3f\00\00\80\bf") ;; 128 1.0 1.8 -1 @@ -185,4 +181,4 @@ (assert_invalid (module (memory 1) (func (drop (v128.load (local.get 2))))) "unknown local 2" -) +) \ No newline at end of file diff --git a/test/core/simd/simd_load_splat.wast b/test/core/simd/simd_load_splat.wast new file mode 100644 index 0000000000..a9faf21614 --- /dev/null +++ b/test/core/simd/simd_load_splat.wast @@ -0,0 +1,220 @@ +;; Tests for the load_splat instructions + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") + (data (i32.const 65520) "\10\11\12\13\14\15\16\17\18\19\1A\1B\1C\1D\1E\1F") + + (func (export "v8x16.load_splat") (param $address i32) (result v128) (v8x16.load_splat (local.get $address))) + (func (export "v16x8.load_splat") (param $address i32) (result v128) (v16x8.load_splat (local.get $address))) + (func (export "v32x4.load_splat") (param $address i32) (result v128) (v32x4.load_splat (local.get $address))) + (func (export "v64x2.load_splat") (param $address i32) (result v128) (v64x2.load_splat (local.get $address))) + + ;; Load data with different offset/align arguments + (func (export "v8x16.offset0") (param $address i32) (result v128) (v8x16.load_splat offset=0 (local.get $address))) + (func (export "v8x16.align1") (param $address i32) (result v128) (v8x16.load_splat align=1 (local.get $address))) + (func (export "v8x16.offset1_align1") (param $address i32) (result v128) (v8x16.load_splat offset=1 align=1 (local.get $address))) + (func (export "v8x16.offset2_align1") (param $address i32) (result v128) (v8x16.load_splat offset=2 align=1 (local.get $address))) + (func (export "v8x16.offset15_align1") (param $address i32) (result v128) (v8x16.load_splat offset=15 align=1 (local.get $address))) + + (func (export "v16x8.offset0") (param $address i32) (result v128) (v16x8.load_splat offset=0 (local.get $address))) + (func (export "v16x8.align1") (param $address i32) (result v128) (v16x8.load_splat align=1 (local.get $address))) + (func (export "v16x8.offset1_align1") (param $address i32) (result v128) (v16x8.load_splat offset=1 align=1 (local.get $address))) + (func (export "v16x8.offset2_align1") (param $address i32) (result v128) (v16x8.load_splat offset=2 align=1 (local.get $address))) + (func (export "v16x8.offset15_align2") (param $address i32) (result v128) (v16x8.load_splat offset=15 align=2 (local.get $address))) + + (func (export "v32x4.offset0") (param $address i32) (result v128) (v32x4.load_splat offset=0 (local.get $address))) + (func (export "v32x4.align1") (param $address i32) (result v128) (v32x4.load_splat align=1 (local.get $address))) + (func (export "v32x4.offset1_align1") (param $address i32) (result v128) (v32x4.load_splat offset=1 align=1 (local.get $address))) + (func (export "v32x4.offset2_align2") (param $address i32) (result v128) (v32x4.load_splat offset=2 align=2 (local.get $address))) + (func (export "v32x4.offset15_align4") (param $address i32) (result v128) (v32x4.load_splat offset=15 align=4 (local.get $address))) + + (func (export "v64x2.offset0") (param $address i32) (result v128) (v64x2.load_splat offset=0 (local.get $address))) + (func (export "v64x2.align1") (param $address i32) (result v128) (v64x2.load_splat align=1 (local.get $address))) + (func (export "v64x2.offset1_align2") (param $address i32) (result v128) (v64x2.load_splat offset=1 align=2 (local.get $address))) + (func (export "v64x2.offset2_align4") (param $address i32) (result v128) (v64x2.load_splat offset=2 align=4 (local.get $address))) + (func (export "v64x2.offset15_align8") (param $address i32) (result v128) (v64x2.load_splat offset=15 align=8 (local.get $address))) + + (func (export "v8x16.offset65536") (param $address i32) (result v128) (v8x16.load_splat offset=65536 (local.get $address))) + (func (export "v16x8.offset65535") (param $address i32) (result v128) (v16x8.load_splat offset=65535 (local.get $address))) + (func (export "v32x4.offset65533") (param $address i32) (result v128) (v32x4.load_splat offset=65533 (local.get $address))) + (func (export "v64x2.offset65529") (param $address i32) (result v128) (v64x2.load_splat offset=65529 (local.get $address))) +) +(assert_return (invoke "v8x16.load_splat" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16.load_splat" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "v8x16.load_splat" (i32.const 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "v8x16.load_splat" (i32.const 3)) (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "v8x16.load_splat" (i32.const 65535)) (v128.const i8x16 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31)) +(assert_return (invoke "v16x8.load_splat" (i32.const 4)) (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) +(assert_return (invoke "v16x8.load_splat" (i32.const 5)) (v128.const i16x8 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605)) +(assert_return (invoke "v16x8.load_splat" (i32.const 6)) (v128.const i16x8 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706)) +(assert_return (invoke "v16x8.load_splat" (i32.const 7)) (v128.const i16x8 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807)) +(assert_return (invoke "v16x8.load_splat" (i32.const 65534)) (v128.const i16x8 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E)) +(assert_return (invoke "v32x4.load_splat" (i32.const 8)) (v128.const i32x4 0x0B0A0908 0x0B0A0908 0x0B0A0908 0x0B0A0908)) +(assert_return (invoke "v32x4.load_splat" (i32.const 9)) (v128.const i32x4 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09)) +(assert_return (invoke "v32x4.load_splat" (i32.const 10)) (v128.const i32x4 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A)) +(assert_return (invoke "v32x4.load_splat" (i32.const 11)) (v128.const i32x4 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B)) +(assert_return (invoke "v32x4.load_splat" (i32.const 65532)) (v128.const i32x4 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C)) +(assert_return (invoke "v64x2.load_splat" (i32.const 12)) (v128.const i64x2 0x000000000F0E0D0C 0x000000000F0E0D0C)) +(assert_return (invoke "v64x2.load_splat" (i32.const 13)) (v128.const i64x2 0x00000000000F0E0D 0x00000000000F0E0D)) +(assert_return (invoke "v64x2.load_splat" (i32.const 14)) (v128.const i64x2 0x0000000000000F0E 0x0000000000000F0E)) +(assert_return (invoke "v64x2.load_splat" (i32.const 15)) (v128.const i64x2 0x000000000000000F 0x000000000000000F)) +(assert_return (invoke "v64x2.load_splat" (i32.const 65528)) (v128.const i64x2 0x1F1E1D1C1B1A1918 0x1F1E1D1C1B1A1918)) + +;; v8x16 +(assert_return (invoke "v8x16.offset0" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16.align1" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16.offset1_align1" (i32.const 0)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "v8x16.offset2_align1" (i32.const 0)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "v8x16.offset15_align1" (i32.const 0)) (v128.const i8x16 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15)) +(assert_return (invoke "v8x16.offset0" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "v8x16.align1" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "v8x16.offset1_align1" (i32.const 1)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "v8x16.offset2_align1" (i32.const 1)) (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "v8x16.offset15_align1" (i32.const 1)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v8x16.offset0" (i32.const 65535)) (v128.const i8x16 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31)) +(assert_return (invoke "v8x16.align1" (i32.const 65535)) (v128.const i8x16 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31)) +;; v16x8 +(assert_return (invoke "v16x8.offset0" (i32.const 0)) (v128.const i16x8 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100)) +(assert_return (invoke "v16x8.align1" (i32.const 0)) (v128.const i16x8 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100 0x0100)) +(assert_return (invoke "v16x8.offset1_align1" (i32.const 0)) (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) +(assert_return (invoke "v16x8.offset2_align1" (i32.const 0)) (v128.const i16x8 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302)) +(assert_return (invoke "v16x8.offset15_align2" (i32.const 0)) (v128.const i16x8 0x000F 0x000F 0x000F 0x000F 0x000F 0x000F 0x000F 0x000F)) +(assert_return (invoke "v16x8.offset0" (i32.const 1)) (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) +(assert_return (invoke "v16x8.align1" (i32.const 1)) (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) +(assert_return (invoke "v16x8.offset1_align1" (i32.const 1)) (v128.const i16x8 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302 0x0302)) +(assert_return (invoke "v16x8.offset2_align1" (i32.const 1)) (v128.const i16x8 0x0403 0x0403 0x0403 0x0403 0x0403 0x0403 0x0403 0x0403)) +(assert_return (invoke "v16x8.offset15_align2" (i32.const 1)) (v128.const i16x8 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) +(assert_return (invoke "v16x8.offset0" (i32.const 65534)) (v128.const i16x8 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E)) +(assert_return (invoke "v16x8.align1" (i32.const 65534)) (v128.const i16x8 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E)) +;; v32x4 +(assert_return (invoke "v32x4.offset0" (i32.const 0)) (v128.const i32x4 0x03020100 0x03020100 0x03020100 0x03020100)) +(assert_return (invoke "v32x4.align1" (i32.const 0)) (v128.const i32x4 0x03020100 0x03020100 0x03020100 0x03020100)) +(assert_return (invoke "v32x4.offset1_align1" (i32.const 0)) (v128.const i32x4 0x04030201 0x04030201 0x04030201 0x04030201)) +(assert_return (invoke "v32x4.offset2_align2" (i32.const 0)) (v128.const i32x4 0x05040302 0x05040302 0x05040302 0x05040302)) +(assert_return (invoke "v32x4.offset15_align4" (i32.const 0)) (v128.const i32x4 0x0000000F 0x0000000F 0x0000000F 0x0000000F)) +(assert_return (invoke "v32x4.offset0" (i32.const 1)) (v128.const i32x4 0x04030201 0x04030201 0x04030201 0x04030201)) +(assert_return (invoke "v32x4.align1" (i32.const 1)) (v128.const i32x4 0x04030201 0x04030201 0x04030201 0x04030201)) +(assert_return (invoke "v32x4.offset1_align1" (i32.const 1)) (v128.const i32x4 0x05040302 0x05040302 0x05040302 0x05040302)) +(assert_return (invoke "v32x4.offset2_align2" (i32.const 1)) (v128.const i32x4 0x06050403 0x06050403 0x06050403 0x06050403)) +(assert_return (invoke "v32x4.offset15_align4" (i32.const 1)) (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v32x4.offset0" (i32.const 65532)) (v128.const i32x4 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C)) +(assert_return (invoke "v32x4.align1" (i32.const 65532)) (v128.const i32x4 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C)) +;; v64x2 +(assert_return (invoke "v64x2.offset0" (i32.const 0)) (v128.const i64x2 0x0706050403020100 0x0706050403020100)) +(assert_return (invoke "v64x2.align1" (i32.const 0)) (v128.const i64x2 0x0706050403020100 0x0706050403020100)) +(assert_return (invoke "v64x2.offset1_align2" (i32.const 0)) (v128.const i64x2 0x0807060504030201 0x0807060504030201)) +(assert_return (invoke "v64x2.offset2_align4" (i32.const 0)) (v128.const i64x2 0x0908070605040302 0x0908070605040302)) +(assert_return (invoke "v64x2.offset15_align8" (i32.const 0)) (v128.const i64x2 0x000000000000000F 0x000000000000000F)) +(assert_return (invoke "v64x2.offset0" (i32.const 1)) (v128.const i64x2 0x0807060504030201 0x0807060504030201)) +(assert_return (invoke "v64x2.align1" (i32.const 1)) (v128.const i64x2 0x0807060504030201 0x0807060504030201)) +(assert_return (invoke "v64x2.offset1_align2" (i32.const 1)) (v128.const i64x2 0x0908070605040302 0x0908070605040302)) +(assert_return (invoke "v64x2.offset2_align4" (i32.const 1)) (v128.const i64x2 0x0A09080706050403 0x0A09080706050403)) +(assert_return (invoke "v64x2.offset15_align8" (i32.const 1)) (v128.const i64x2 0x0000000000000000 0x0000000000000000)) +(assert_return (invoke "v64x2.offset0" (i32.const 65528)) (v128.const i64x2 0x1F1E1D1C1B1A1918 0x1F1E1D1C1B1A1918)) +(assert_return (invoke "v64x2.align1" (i32.const 65528)) (v128.const i64x2 0x1F1E1D1C1B1A1918 0x1F1E1D1C1B1A1918)) + + +;; Out of bounds memory access +(assert_trap (invoke "v8x16.load_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v16x8.load_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v32x4.load_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v64x2.load_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v8x16.load_splat" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "v16x8.load_splat" (i32.const 65535)) "out of bounds memory access") +(assert_trap (invoke "v32x4.load_splat" (i32.const 65533)) "out of bounds memory access") +(assert_trap (invoke "v64x2.load_splat" (i32.const 65529)) "out of bounds memory access") + +(assert_trap (invoke "v8x16.offset1_align1" (i32.const 65535)) "out of bounds memory access") +(assert_trap (invoke "v8x16.offset2_align1" (i32.const 65535)) "out of bounds memory access") +(assert_trap (invoke "v8x16.offset15_align1" (i32.const 65535)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset1_align1" (i32.const 65534)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset2_align1" (i32.const 65534)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset15_align2" (i32.const 65534)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset1_align1" (i32.const 65532)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset2_align2" (i32.const 65532)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset15_align4" (i32.const 65532)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset1_align2" (i32.const 65528)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset2_align4" (i32.const 65528)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset15_align8" (i32.const 65528)) "out of bounds memory access") + +(assert_trap (invoke "v8x16.offset65536" (i32.const 0)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset65535" (i32.const 0)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset65533" (i32.const 0)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset65529" (i32.const 0)) "out of bounds memory access") +(assert_trap (invoke "v8x16.offset65536" (i32.const 1)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset65535" (i32.const 1)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset65533" (i32.const 1)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset65529" (i32.const 1)) "out of bounds memory access") + + +;; Combination + +(module (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A") + + (func (export "v8x16.load_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v8x16.load_splat (i32.const 0)))) + ) + (func (export "v16x8.load_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v16x8.load_splat (i32.const 1)))) + ) + (func (export "v32x4.load_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v32x4.load_splat (i32.const 2)))) + ) + (func (export "v64x2.load_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v64x2.load_splat (i32.const 9)))) + ) + (func (export "v8x16.load_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v8x16.load_splat (i32.const 3)))) + ) + (func (export "v16x8.load_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v16x8.load_splat (i32.const 4)))) + ) + (func (export "v32x4.load_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v32x4.load_splat (i32.const 5)))) + ) + (func (export "v64x2.load_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v64x2.load_splat (i32.const 10)))) + ) + (func (export "v8x16.load_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v8x16.load_splat (i32.const 6))) + ) + (func (export "v16x8.load_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v16x8.load_splat (i32.const 7))) + ) + (func (export "v32x4.load_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v32x4.load_splat (i32.const 8))) + ) + (func (export "v64x2.load_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v64x2.load_splat (i32.const 11))) + ) +) +(assert_return (invoke "v8x16.load_splat-in-block") (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v16x8.load_splat-in-block") (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) +(assert_return (invoke "v32x4.load_splat-in-block") (v128.const i32x4 0x05040302 0x05040302 0x05040302 0x05040302)) +(assert_return (invoke "v64x2.load_splat-in-block") (v128.const i64x2 0x0000000000000A09 0x0000000000000A09)) +(assert_return (invoke "v8x16.load_splat-as-br-value") (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "v16x8.load_splat-as-br-value") (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) +(assert_return (invoke "v32x4.load_splat-as-br-value") (v128.const i32x4 0x08070605 0x08070605 0x08070605 0x08070605)) +(assert_return (invoke "v64x2.load_splat-as-br-value") (v128.const i64x2 0x000000000000000A 0x000000000000000A)) +(assert_return (invoke "v8x16.load_splat-extract_lane_s-operand") (i32.const 6)) +(assert_return (invoke "v16x8.load_splat-extract_lane_s-operand") (i32.const 7)) +(assert_return (invoke "v32x4.load_splat-extract_lane_s-operand") (i32.const 8)) +(assert_return (invoke "v64x2.load_splat-extract_lane_s-operand") (i32.const 0)) + + +;; Type check + +(assert_invalid (module (memory 0) (func (result v128) (v8x16.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v16x8.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v32x4.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v64x2.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") + + +;; Unknown operator + +(assert_malformed (module quote "(memory 1) (func (drop (i8x16.load_splat (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i16x8.load_splat (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i32x4.load_splat (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load_splat (i32.const 0))))") "unknown operator") \ No newline at end of file diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast index 1ea72e1bf3..0e2acd5c39 100644 --- a/test/core/simd/simd_splat.wast +++ b/test/core/simd/simd_splat.wast @@ -1,8 +1,12 @@ +;; Tests for the *_splat instructions + (module (func (export "i8x16.splat") (param i32) (result v128) (i8x16.splat (local.get 0))) (func (export "i16x8.splat") (param i32) (result v128) (i16x8.splat (local.get 0))) (func (export "i32x4.splat") (param i32) (result v128) (i32x4.splat (local.get 0))) (func (export "f32x4.splat") (param f32) (result v128) (f32x4.splat (local.get 0))) + (func (export "i64x2.splat") (param i64) (result v128) (i64x2.splat (local.get 0))) + (func (export "f64x2.splat") (param f64) (result v128) (f64x2.splat (local.get 0))) ) (assert_return (invoke "i8x16.splat" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) @@ -55,6 +59,42 @@ (assert_return (invoke "f32x4.splat" (f32.const nan:0x1)) (v128.const f32x4 nan:0x1 nan:0x1 nan:0x1 nan:0x1)) (assert_return (invoke "f32x4.splat" (f32.const nan:0x7f_ffff)) (v128.const f32x4 nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff)) +(assert_return (invoke "i64x2.splat" (i64.const 0)) (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.splat" (i64.const -0)) (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.splat" (i64.const 1)) (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.splat" (i64.const -1)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.splat" (i64.const -9223372036854775808)) (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.splat" (i64.const -9223372036854775808)) (v128.const i64x2 9223372036854775808 9223372036854775808)) +(assert_return (invoke "i64x2.splat" (i64.const 9223372036854775807)) (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.splat" (i64.const 18446744073709551615)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.splat" (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) +(assert_return (invoke "i64x2.splat" (i64.const 0xffffffffffffffff)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.splat" (i64.const -0x8000000000000000)) (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) +(assert_return (invoke "i64x2.splat" (i64.const -0x8000000000000000)) (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + +(assert_return (invoke "f64x2.splat" (f64.const 0.0)) (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.splat" (f64.const -0.0)) (v128.const f64x2 -0.0 -0.0)) +(assert_return (invoke "f64x2.splat" (f64.const 1.1)) (v128.const f64x2 1.1 1.1)) +(assert_return (invoke "f64x2.splat" (f64.const -1.1)) (v128.const f64x2 -1.1 -1.1)) +(assert_return (invoke "f64x2.splat" (f64.const 0x0.0000000000001p-1022)) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.splat" (f64.const -0x0.0000000000001p-1022)) (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.splat" (f64.const 0x1p-1022)) (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.splat" (f64.const -0x1p-1022)) (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.splat" (f64.const 0x1p-1)) (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.splat" (f64.const -0x1p-1)) (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.splat" (f64.const 0x1p+0)) (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.splat" (f64.const -0x1p+0)) (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.splat" (f64.const 0x1.921fb54442d18p+2)) (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.splat" (f64.const -0x1.921fb54442d18p+2)) (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.splat" (f64.const 0x1.fffffffffffffp+1023)) (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.splat" (f64.const -0x1.fffffffffffffp+1023)) (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.splat" (f64.const inf)) (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.splat" (f64.const -inf)) (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.splat" (f64.const nan)) (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.splat" (f64.const -nan)) (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.splat" (f64.const nan:0x4000000000000)) (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.splat" (f64.const -nan:0x4000000000000)) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + ;; Unknown operator @@ -75,25 +115,38 @@ (assert_invalid (module (func (result v128) f32x4.splat (i32.const 4))) "type mismatch") (assert_invalid (module (func (result v128) f32x4.splat (i64.const 4))) "type mismatch") (assert_invalid (module (func (result v128) f32x4.splat (f64.const 4.0))) "type mismatch") +(assert_invalid (module (func (result v128) i64x2.splat (i32.const 0))) "type mismatch") +(assert_invalid (module (func (result v128) i64x2.splat (f64.const 0.0))) "type mismatch") +(assert_invalid (module (func (result v128) f64x2.splat (i32.const 0))) "type mismatch") +(assert_invalid (module (func (result v128) f64x2.splat (f32.const 0.0))) "type mismatch") ;; V128 splat operators as the argument of other SIMD instructions -;; v128.store +;; v128.store and v128.load (module (memory 1) - (func (export "as-v128_store-value-1") (param i32) (result v128) + (func (export "as-v128_store-operand-1") (param i32) (result v128) (v128.store (i32.const 0) (i8x16.splat (local.get 0))) (v128.load (i32.const 0))) - (func (export "as-v128_store-value-2") (param i32) (result v128) + (func (export "as-v128_store-operand-2") (param i32) (result v128) (v128.store (i32.const 0) (i16x8.splat (local.get 0))) (v128.load (i32.const 0))) - (func (export "as-v128_store-value-3") (param i32) (result v128) + (func (export "as-v128_store-operand-3") (param i32) (result v128) (v128.store (i32.const 0) (i32x4.splat (local.get 0))) (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-4") (param i64) (result v128) + (v128.store (i32.const 0) (i64x2.splat (local.get 0))) + (v128.load (i32.const 0))) + (func (export "as-v128_store-operand-5") (param f64) (result v128) + (v128.store (i32.const 0) (f64x2.splat (local.get 0))) + (v128.load (i32.const 0))) ) -(assert_return (invoke "as-v128_store-value-1" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "as-v128_store-value-2" (i32.const 256)) (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) -(assert_return (invoke "as-v128_store-value-3" (i32.const 0xffffffff)) (v128.const i32x4 -1 -1 -1 -1)) + +(assert_return (invoke "as-v128_store-operand-1" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "as-v128_store-operand-2" (i32.const 256)) (v128.const i16x8 0x100 0x100 0x100 0x100 0x100 0x100 0x100 0x100)) +(assert_return (invoke "as-v128_store-operand-3" (i32.const 0xffffffff)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "as-v128_store-operand-4" (i64.const 1)) (v128.const i64x2 1 1)) +(assert_return (invoke "as-v128_store-operand-5" (f64.const -0x1p+0)) (v128.const f64x2 -0x1p+0 -0x1p+0)) (module ;; Accessing lane @@ -115,12 +168,19 @@ (f32x4.extract_lane 3 (f32x4.splat (local.get 0)))) (func (export "as-v8x16_swizzle-operands") (param i32) (param i32) (result v128) (v8x16.swizzle (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i64x2_extract_lane-operand-first") (param i64) (result i64) + (i64x2.extract_lane 0 (i64x2.splat (local.get 0)))) + (func (export "as-i64x2_extract_lane-operand-last") (param i64) (result i64) + (i64x2.extract_lane 1 (i64x2.splat (local.get 0)))) + (func (export "as-f64x2_extract_lane-operand-first") (param f64) (result f64) + (f64x2.extract_lane 0 (f64x2.splat (local.get 0)))) + (func (export "as-f64x2_extract_lane-operand-last") (param f64) (result f64) + (f64x2.extract_lane 1 (f64x2.splat (local.get 0)))) ;; Integer arithmetic - (func (export "as-i8x16_add_sub_mul-operands") (param i32 i32 i32 i32) (result v128) + (func (export "as-i8x16_add_sub-operands") (param i32 i32 i32) (result v128) (i8x16.add (i8x16.splat (local.get 0)) - (i8x16.sub (i8x16.splat (local.get 1)) - (i8x16.mul (i8x16.splat (local.get 2)) (i8x16.splat (local.get 3)))))) + (i8x16.sub (i8x16.splat (local.get 1)) (i8x16.splat (local.get 2))))) (func (export "as-i16x8_add_sub_mul-operands") (param i32 i32 i32 i32) (result v128) (i16x8.add (i16x8.splat (local.get 0)) (i16x8.sub (i16x8.splat (local.get 1)) @@ -130,6 +190,15 @@ (i32x4.sub (i32x4.splat (local.get 1)) (i32x4.mul (i32x4.splat (local.get 2)) (i32x4.splat (local.get 3)))))) + (func (export "as-i64x2_add_sub_mul-operands") (param i64 i64 i64 i64) (result v128) + (i64x2.add (i64x2.splat (local.get 0)) + (i64x2.sub (i64x2.splat (local.get 1)) + (i64x2.mul (i64x2.splat (local.get 2)) (i64x2.splat (local.get 3)))))) + (func (export "as-f64x2_add_sub_mul-operands") (param f64 f64 f64 f64) (result v128) + (f64x2.add (f64x2.splat (local.get 0)) + (f64x2.sub (f64x2.splat (local.get 1)) + (f64x2.mul (f64x2.splat (local.get 2)) (f64x2.splat (local.get 3)))))) + ;; Saturating integer arithmetic (func (export "as-i8x16_add_saturate_s-operands") (param i32 i32) (result v128) (i8x16.add_saturate_s (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) @@ -161,18 +230,24 @@ (i8x16.all_true (i8x16.splat (local.get 0)))) (func (export "as-i16x8_all_true-operand") (param i32) (result i32) (i16x8.all_true (i16x8.splat (local.get 0)))) - (func (export "as-i32x4_all_true-operand") (param i32) (result i32) + (func (export "as-i32x4_all_true-operand1") (param i32) (result i32) (i32x4.all_true (i32x4.splat (local.get 0)))) + (func (export "as-i32x4_all_true-operand2") (param i64) (result i32) + (i32x4.all_true (i64x2.splat (local.get 0)))) ;; Comparisons (func (export "as-i8x16_eq-operands") (param i32 i32) (result v128) (i8x16.eq (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) (func (export "as-i16x8_eq-operands") (param i32 i32) (result v128) (i16x8.eq (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) - (func (export "as-i32x4_eq-operands") (param i32 i32) (result v128) + (func (export "as-i32x4_eq-operands1") (param i32 i32) (result v128) (i32x4.eq (i32x4.splat (local.get 0)) (i32x4.splat (local.get 1)))) + (func (export "as-i32x4_eq-operands2") (param i64 i64) (result v128) + (i32x4.eq (i64x2.splat (local.get 0)) (i64x2.splat (local.get 1)))) (func (export "as-f32x4_eq-operands") (param f32 f32) (result v128) (f32x4.eq (f32x4.splat (local.get 0)) (f32x4.splat (local.get 1)))) + (func (export "as-f64x2_eq-operands") (param f64 f64) (result v128) + (f64x2.eq (f64x2.splat (local.get 0)) (f64x2.splat (local.get 1)))) ;; Floating-point sign bit operations (func (export "as-f32x4_abs-operand") (param f32) (result v128) @@ -202,10 +277,17 @@ (assert_return (invoke "as-f32x4_extract_lane_s-operand-first" (f32.const 1.5)) (f32.const 1.5)) (assert_return (invoke "as-f32x4_extract_lane_s-operand-last" (f32.const -0.25)) (f32.const -0.25)) (assert_return (invoke "as-v8x16_swizzle-operands" (i32.const 1) (i32.const -1)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-i64x2_extract_lane-operand-last" (i64.const -42)) (i64.const -42)) +(assert_return (invoke "as-i64x2_extract_lane-operand-first" (i64.const 42)) (i64.const 42)) +(assert_return (invoke "as-f64x2_extract_lane-operand-first" (f64.const 1.5)) (f64.const 1.5)) +(assert_return (invoke "as-f64x2_extract_lane-operand-last" (f64.const -0x1p+0)) (f64.const -0x1p+0)) -(assert_return (invoke "as-i8x16_add_sub_mul-operands" (i32.const 3) (i32.const 2) (i32.const 1) (i32.const 3)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "as-i8x16_add_sub-operands" (i32.const 3) (i32.const 2) (i32.const 1)) (v128.const i8x16 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4)) (assert_return (invoke "as-i16x8_add_sub_mul-operands" (i32.const 257) (i32.const 128) (i32.const 16) (i32.const 16)) (v128.const i16x8 129 129 129 129 129 129 129 129)) (assert_return (invoke "as-i32x4_add_sub_mul-operands" (i32.const 65535) (i32.const 65537) (i32.const 256) (i32.const 256)) (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) +(assert_return (invoke "as-i64x2_add_sub_mul-operands" (i64.const 0x7fffffff) (i64.const 0x1_0000_0001) (i64.const 65536) (i64.const 65536)) (v128.const i64x2 0x8000_0000 0x8000_0000)) +(assert_return (invoke "as-f64x2_add_sub_mul-operands" (f64.const 0x1p-1) (f64.const 0.75) (f64.const 0x1p-1) (f64.const 0.5)) (v128.const f64x2 0x1p+0 0x1p+0)) + (assert_return (invoke "as-i8x16_add_saturate_s-operands" (i32.const 0x7f) (i32.const 1)) (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) (assert_return (invoke "as-i16x8_add_saturate_s-operands" (i32.const 0x7fff) (i32.const 1)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) (assert_return (invoke "as-i8x16_sub_saturate_u-operands" (i32.const 0x7f) (i32.const 0xff)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) @@ -221,12 +303,15 @@ (assert_return (invoke "as-i8x16_all_true-operand" (i32.const 0)) (i32.const 0)) (assert_return (invoke "as-i16x8_all_true-operand" (i32.const 0xffff)) (i32.const 1)) -(assert_return (invoke "as-i32x4_all_true-operand" (i32.const 0xf0f0f0f0)) (i32.const 1)) +(assert_return (invoke "as-i32x4_all_true-operand1" (i32.const 0xf0f0f0f0)) (i32.const 1)) +(assert_return (invoke "as-i32x4_all_true-operand2" (i64.const -1)) (i32.const 1)) (assert_return (invoke "as-i8x16_eq-operands" (i32.const 1) (i32.const 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "as-i16x8_eq-operands" (i32.const -1) (i32.const 65535)) (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "as-i32x4_eq-operands" (i32.const -1) (i32.const 0xffffffff)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "as-i32x4_eq-operands1" (i32.const -1) (i32.const 0xffffffff)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) (assert_return (invoke "as-f32x4_eq-operands" (f32.const +0.0) (f32.const -0.0)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "as-i32x4_eq-operands2" (i64.const 1) (i64.const 2)) (v128.const i64x2 0xffffffff00000000 0xffffffff00000000)) +(assert_return (invoke "as-f64x2_eq-operands" (f64.const +0.0) (f64.const -0.0)) (v128.const i64x2 -1 -1)) (assert_return (invoke "as-f32x4_abs-operand" (f32.const -1.125)) (v128.const f32x4 1.125 1.125 1.125 1.125)) (assert_return (invoke "as-f32x4_min-operands" (f32.const 0.25) (f32.const 1e-38)) (v128.const f32x4 1e-38 1e-38 1e-38 1e-38)) @@ -240,19 +325,33 @@ (module (global $g (mut v128) (v128.const f32x4 0.0 0.0 0.0 0.0)) - (func (export "as-br-value") (param i32) (result v128) + (func (export "as-br-value1") (param i32) (result v128) (block (result v128) (br 0 (i8x16.splat (local.get 0))))) - (func (export "as-return-value") (param i32) (result v128) + (func (export "as-return-value1") (param i32) (result v128) (return (i16x8.splat (local.get 0)))) - (func (export "as-local_set-value") (param i32) (result v128) (local v128) + (func (export "as-local_set-value1") (param i32) (result v128) (local v128) (local.set 1 (i32x4.splat (local.get 0))) (return (local.get 1))) - (func (export "as-global_set-value") (param f32) (result v128) + (func (export "as-global_set-value1") (param f32) (result v128) (global.set $g (f32x4.splat (local.get 0))) (return (global.get $g))) + (func (export "as-br-value2") (param i64) (result v128) + (block (result v128) (br 0 (i64x2.splat (local.get 0))))) + (func (export "as-return-value2") (param i64) (result v128) + (return (i64x2.splat (local.get 0)))) + (func (export "as-local_set-value2") (param i64) (result v128) (local v128) + (local.set 1 (i64x2.splat (local.get 0))) + (return (local.get 1))) + (func (export "as-global_set-value2") (param f64) (result v128) + (global.set $g (f64x2.splat (local.get 0))) + (return (global.get $g))) ) -(assert_return (invoke "as-br-value" (i32.const 0xAB)) (v128.const i8x16 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) -(assert_return (invoke "as-return-value" (i32.const 0xABCD)) (v128.const i16x8 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD)) -(assert_return (invoke "as-local_set-value" (i32.const 0x10000)) (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) -(assert_return (invoke "as-global_set-value" (f32.const 1.0)) (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "as-br-value1" (i32.const 0xAB)) (v128.const i8x16 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB 0xAB)) +(assert_return (invoke "as-return-value1" (i32.const 0xABCD)) (v128.const i16x8 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD 0xABCD)) +(assert_return (invoke "as-local_set-value1" (i32.const 0x10000)) (v128.const i32x4 0x10000 0x10000 0x10000 0x10000)) +(assert_return (invoke "as-global_set-value1" (f32.const 1.0)) (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "as-br-value2" (i64.const 0xABCD)) (v128.const i64x2 0xABCD 0xABCD)) +(assert_return (invoke "as-return-value2" (i64.const 0xABCD)) (v128.const i64x2 0xABCD 0xABCD)) +(assert_return (invoke "as-local_set-value2" (i64.const 0x10000)) (v128.const i64x2 0x10000 0x10000)) +(assert_return (invoke "as-global_set-value2" (f64.const 1.0)) (v128.const f64x2 1.0 1.0)) \ No newline at end of file From 12cf7e25e4f50f64fcf013aaf2733129e5d8bb18 Mon Sep 17 00:00:00 2001 From: Andrew Scheidecker Date: Wed, 23 Oct 2019 17:44:06 -0400 Subject: [PATCH 069/378] Update WAVM implementation status --- proposals/simd/ImplementationStatus.md | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index fea23d7bf9..4778d4fa0b 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -71,7 +71,7 @@ | `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-munimplemented-simd128` | | | | +| `v128.andnot` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -115,7 +115,7 @@ | `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | | | | | +| `i64x2.mul` | | | :heavy_check_mark: | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -144,12 +144,12 @@ | `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | `-msimd128`[5] | :white_check_mark:[5] | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load8x8_s` | `-munimplemented-simd128` | | | | -| `i16x8.load8x8_u` | `-munimplemented-simd128` | | | | -| `i32x4.load16x4_s` | `-munimplemented-simd128` | | | | -| `i32x4.load16x4_u` | `-munimplemented-simd128` | | | | -| `i64x2.load32x2_s` | `-munimplemented-simd128` | | | | -| `i64x2.load32x2_u` | `-munimplemented-simd128` | | | | +| `i16x8.load8x8_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i16x8.load8x8_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i32x4.load16x4_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i32x4.load16x4_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i64x2.load32x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i64x2.load32x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | @@ -167,7 +167,7 @@ [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of July 10, 2019. Requires flag `--enable prestd-simd` +[3] Tip of tree WAVM as of Oct 23, 2019. Requires flag `--enable simd` [4] Requires (case-insensitive) flag `-wasmsimd` From edf8eeeb675a6a957b1a2840636ac50f56403002 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 4 Nov 2019 10:13:21 +0800 Subject: [PATCH 070/378] [test] Integrate latest v128 constant tests New tests for 64x2 constant and more literal testing per https://github.com/WAVM/WAVM/issues/195 --- test/core/simd/simd_const.wast | 997 ++++++++++++++++++++++++++++++++- 1 file changed, 992 insertions(+), 5 deletions(-) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 0f3e0cfe55..5c9cade4d8 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -8,10 +8,30 @@ (module (func (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) drop)) (module (func (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) drop)) (module (func (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) drop)) +(module (func (v128.const i16x8 65_535 65_535 65_535 65_535 65_535 65_535 65_535 65_535) drop)) +(module (func (v128.const i16x8 -32_768 -32_768 -32_768 -32_768 -32_768 -32_768 -32_768 -32_768) drop)) +(module (func (v128.const i16x8 0_123_45 0_123_45 0_123_45 0_123_45 0_123_45 0_123_45 0_123_45 0_123_45) drop)) +(module (func (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) drop)) (module (func (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff) drop)) (module (func (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) drop)) (module (func (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) drop)) (module (func (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) drop)) +(module (func (v128.const i32x4 0xffff_ffff 0xffff_ffff 0xffff_ffff 0xffff_ffff) drop)) +(module (func (v128.const i32x4 -0x8000_0000 -0x8000_0000 -0x8000_0000 -0x8000_0000) drop)) +(module (func (v128.const i32x4 4_294_967_295 4_294_967_295 4_294_967_295 4_294_967_295) drop)) +(module (func (v128.const i32x4 -2_147_483_648 -2_147_483_648 -2_147_483_648 -2_147_483_648) drop)) +(module (func (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) drop)) +(module (func (v128.const i32x4 0x0_9acf_fBDF 0x0_9acf_fBDF 0x0_9acf_fBDF 0x0_9acf_fBDF) drop)) +(module (func (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) drop)) +(module (func (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) drop)) +(module (func (v128.const i64x2 18446744073709551615 18446744073709551615) drop)) +(module (func (v128.const i64x2 -9223372036854775808 -9223372036854775808) drop)) +(module (func (v128.const i64x2 0xffff_ffff_ffff_ffff 0xffff_ffff_ffff_ffff) drop)) +(module (func (v128.const i64x2 -0x8000_0000_0000_0000 -0x8000_0000_0000_0000) drop)) +(module (func (v128.const i64x2 18_446_744_073_709_551_615 18_446_744_073_709_551_615) drop)) +(module (func (v128.const i64x2 -9_223_372_036_854_775_808 -9_223_372_036_854_775_808) drop)) +(module (func (v128.const i64x2 0_123_456_789 0_123_456_789) drop)) +(module (func (v128.const i64x2 0x0125_6789_ADEF_bcef 0x0125_6789_ADEF_bcef) drop)) (module (func (v128.const f32x4 0x1p127 0x1p127 0x1p127 0x1p127) drop)) (module (func (v128.const f32x4 -0x1p127 -0x1p127 -0x1p127 -0x1p127) drop)) (module (func (v128.const f32x4 1e38 1e38 1e38 1e38) drop)) @@ -22,6 +42,64 @@ -340282356779733623858607532500980858880 -340282356779733623858607532500980858880) drop)) (module (func (v128.const f32x4 nan:0x1 nan:0x1 nan:0x1 nan:0x1) drop)) (module (func (v128.const f32x4 nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff) drop)) +(module (func (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) drop)) +(module (func (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) drop)) +(module (func (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) drop)) +(module (func (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) drop)) +(module (func (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) drop)) +(module (func (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) drop)) +(module (func (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) drop)) +(module (func (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) drop)) +(module (func (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) drop)) +(module (func (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) drop)) +(module (func (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) drop)) +(module (func (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) drop)) +(module (func (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) drop)) +(module (func (v128.const f64x2 0x1p1023 0x1p1023) drop)) +(module (func (v128.const f64x2 -0x1p1023 -0x1p1023) drop)) +(module (func (v128.const f64x2 1e308 1e308) drop)) +(module (func (v128.const f64x2 -1e308 -1e308) drop)) +(module (func (v128.const f64x2 179769313486231570814527423731704356798070567525844996598917476803157260780028538760589558632766878171540458953514382464234321326889464182768467546703537516986049910576551282076245490090389328944075868508455133942304583236903222948165808559332123348274797826204144723168738177180919299881250404026184124858368 + 179769313486231570814527423731704356798070567525844996598917476803157260780028538760589558632766878171540458953514382464234321326889464182768467546703537516986049910576551282076245490090389328944075868508455133942304583236903222948165808559332123348274797826204144723168738177180919299881250404026184124858368) drop)) +(module (func (v128.const f64x2 -179769313486231570814527423731704356798070567525844996598917476803157260780028538760589558632766878171540458953514382464234321326889464182768467546703537516986049910576551282076245490090389328944075868508455133942304583236903222948165808559332123348274797826204144723168738177180919299881250404026184124858368 + -179769313486231570814527423731704356798070567525844996598917476803157260780028538760589558632766878171540458953514382464234321326889464182768467546703537516986049910576551282076245490090389328944075868508455133942304583236903222948165808559332123348274797826204144723168738177180919299881250404026184124858368) drop)) +(module (func (v128.const f64x2 nan:0x1 nan:0x1) drop)) +(module (func (v128.const f64x2 nan:0xf_ffff_ffff_ffff nan:0xf_ffff_ffff_ffff) drop)) +(module (func (v128.const f64x2 0123456789 0123456789) drop)) +(module (func (v128.const f64x2 0123456789e019 0123456789e019) drop)) +(module (func (v128.const f64x2 0123456789e+019 0123456789e+019) drop)) +(module (func (v128.const f64x2 0123456789e-019 0123456789e-019) drop)) +(module (func (v128.const f64x2 0123456789. 0123456789.) drop)) +(module (func (v128.const f64x2 0123456789.e019 0123456789.e019) drop)) +(module (func (v128.const f64x2 0123456789.e+019 0123456789.e+019) drop)) +(module (func (v128.const f64x2 0123456789.e-019 0123456789.e-019) drop)) +(module (func (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) drop)) +(module (func (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) drop)) +(module (func (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) drop)) +(module (func (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) drop)) +(module (func (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) drop)) ;; Non-splat cases @@ -37,7 +115,13 @@ (module (func (v128.const i32x4 0xffffffff 0xffffffff -0x80000000 -0x80000000) drop)) (module (func (v128.const i32x4 0xffffffff 4294967295 -0x80000000 -0x80000000) drop)) (module (func (v128.const i32x4 0xffffffff 4294967295 -0x80000000 -2147483648) drop)) - +(module (func (v128.const f32x4 0x1p127 0x1p127 -0x1p127 -1e38) drop)) +(module (func (v128.const f32x4 0x1p127 340282356779733623858607532500980858880 -1e38 -340282356779733623858607532500980858880) drop)) +(module (func (v128.const f32x4 nan -nan inf -inf) drop)) +(module (func (v128.const i64x2 0xffffffffffffffff 0x8000000000000000) drop)) +(module (func (v128.const i64x2 0xffffffffffffffff -9223372036854775808) drop)) +(module (func (v128.const f64x2 0x1p1023 -1e308) drop)) +(module (func (v128.const f64x2 nan -inf) drop)) ;; Constant out of range (int literal is too large) @@ -90,6 +174,22 @@ (module quote "(func (v128.const i32x4 -2147483649 -2147483649 -2147483649 -2147483649) drop)") "constant out of range" ) +(assert_malformed + (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 -0x8000000000000001 -0x8000000000000001) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 18446744073709551616 18446744073709551616) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const i32x4 -9223372036854775808 -9223372036854775808) drop)") + "constant out of range" +) (assert_malformed (module quote "(func (v128.const f32x4 0x1p128 0x1p128 0x1p128 0x1p128) drop)") "constant out of range" @@ -116,21 +216,271 @@ " -340282356779733661637539395458142568448 -340282356779733661637539395458142568448) drop)") "constant out of range" ) + (assert_malformed - (module quote "(func (v128.const f32x4 nan:1 nan:1 nan:1 nan:1) drop)") - "unknown operator" + (module quote "(func (v128.const f32x4 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000) drop)") + "constant out of range" ) (assert_malformed - (module quote "(func (v128.const f32x4 nan:0x0 nan:0x0 nan:0x0 nan:0x0) drop)") + (module quote "(func (v128.const f64x2 269653970229347356221791135597556535197105851288767494898376215204735891170042808140884337949150317257310688430271573696351481990334196274152701320055306275479074865864826923114368235135583993416113802762682700913456874855354834422248712838998185022412196739306217084753107265771378949821875606039276187287552" + " 269653970229347356221791135597556535197105851288767494898376215204735891170042808140884337949150317257310688430271573696351481990334196274152701320055306275479074865864826923114368235135583993416113802762682700913456874855354834422248712838998185022412196739306217084753107265771378949821875606039276187287552) drop)") + "constant out of range" +) +(assert_malformed + (module quote "(func (v128.const f64x2 -269653970229347356221791135597556535197105851288767494898376215204735891170042808140884337949150317257310688430271573696351481990334196274152701320055306275479074865864826923114368235135583993416113802762682700913456874855354834422248712838998185022412196739306217084753107265771378949821875606039276187287552" + " -269653970229347356221791135597556535197105851288767494898376215204735891170042808140884337949150317257310688430271573696351481990334196274152701320055306275479074865864826923114368235135583993416113802762682700913456874855354834422248712838998185022412196739306217084753107265771378949821875606039276187287552) drop)") "constant out of range" ) (assert_malformed - (module quote "(func (v128.const f32x4 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000 nan:0x80_0000) drop)") + (module quote "(func (v128.const f64x2 nan:0x10_0000_0000_0000 nan:0x10_0000_0000_0000) drop)") "constant out of range" ) +;; More malformed v128.const forms +(assert_malformed + (module quote "(func (v128.const) drop)") + "unexpected token" +) + +(assert_malformed + (module quote "(func (v128.const i8x16) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const i8x16 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i8x16 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i8x16 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const i16x8) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const i16x8 0x 0x 0x 0x 0x 0x 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i16x8 1x 1x 1x 1x 1x 1x 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i16x8 0xg 0xg 0xg 0xg 0xg 0xg 0xg 0xg) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const i32x4) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const i32x4 0x 0x 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i32x4 1x 1x 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const i32x4 0xg 0xg 0xg 0xg) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const i64x2) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const i64x2 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0xg 0xg) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const f32x4) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const f32x4 .0 .0 .0 .0) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 .0e0 .0e0 .0e0 .0e0) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0e 0e 0e 0e) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0e+ 0e+ 0e+ 0e+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0.0e 0.0e 0.0e 0.0e) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0.0e- 0.0e- 0.0e- 0.0e-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x 0x 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 1x 1x 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0xg 0xg 0xg 0xg) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x. 0x. 0x. 0x.) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0.g 0x0.g 0x0.g 0x0.g) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0p 0x0p 0x0p 0x0p) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0p+ 0x0p+ 0x0p+ 0x0p+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0p- 0x0p- 0x0p- 0x0p-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0.0p 0x0.0p 0x0.0p 0x0.0p) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0.0p+ 0x0.0p+ 0x0.0p+ 0x0.0p+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0.0p- 0x0.0p- 0x0.0p- 0x0.0p-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 0x0pA 0x0pA 0x0pA 0x0pA) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 nan:1 nan:1 nan:1 nan:1) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f32x4 nan:0x0 nan:0x0 nan:0x0 nan:0x0) drop)") + "unknown operator" +) + +(assert_malformed + (module quote "(func (v128.const f64x2) drop)") + "unexpected token" +) +(assert_malformed + (module quote "(func (v128.const f64x2 .0 .0) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 .0e0 .0e0) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0e 0e) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0e+ 0e+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0.0e+ 0.0e+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0.0e- 0.0e-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x 0x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 1x 1x) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0xg 0xg) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x. 0x.) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0.g 0x0.g) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0p 0x0p) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0p+ 0x0p+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0p- 0x0p-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0.0p 0x0.0p) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0.0p+ 0x0.0p+) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0.0p- 0x0.0p-) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 0x0pA 0x0pA) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 nan:1 nan:1) drop)") + "unknown operator" +) +(assert_malformed + (module quote "(func (v128.const f64x2 nan:0x0 nan:0x0) drop)") + "unknown operator" +) ;; Rounding behaviour @@ -210,6 +560,325 @@ (module (func (export "f") (result v128) (v128.const f32x4 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127 -0x1.fffffefffffffffffp127))) (assert_return (invoke "f") (v128.const f32x4 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127 -0x1.fffffep127)) +;; f64x2, small exponent +(module (func (export "f") (result f64) (f64.const +0x1.000000000000080000000000p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000000p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000080000000000p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000000p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000080000000001p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000080000000001p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.0000000000000fffffffffffp-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.0000000000000fffffffffffp-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000100000000000p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000100000000000p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000100000000001p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000100000000001p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.00000000000017ffffffffffp-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.00000000000017ffffffffffp-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000180000000000p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000180000000000p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000180000000001p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000180000000001p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.0000000000001fffffffffffp-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.0000000000001fffffffffffp-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000200000000000p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000200000000000p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000200000000001p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000200000000001p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.00000000000027ffffffffffp-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.00000000000027ffffffffffp-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x1.000000000000280000000001p-600))) +(assert_return (invoke "f") (f64.const +0x1.0000000000003p-600)) +(module (func (export "f") (result f64) (f64.const -0x1.000000000000280000000001p-600))) +(assert_return (invoke "f") (f64.const -0x1.0000000000003p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000400000000000p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000000p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000400000000000p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000000p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000400000000001p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000400000000001p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.0000007fffffffffffp-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.0000007fffffffffffp-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000800000000000p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000800000000000p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000800000000001p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000800000000001p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000bfffffffffffp-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000bfffffffffffp-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000c00000000000p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000c00000000000p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000c00000000001p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000c00000000001p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000000ffffffffffffp-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000000ffffffffffffp-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000001000000000000p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000001000000000000p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000001000000000001p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000001000000000001p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.0000013fffffffffffp-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.0000013fffffffffffp-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p-600)) +(module (func (export "f") (result f64) (f64.const +0x8000000.000001400000000001p-627))) +(assert_return (invoke "f") (f64.const +0x1.0000000000003p-600)) +(module (func (export "f") (result f64) (f64.const -0x8000000.000001400000000001p-627))) +(assert_return (invoke "f") (f64.const -0x1.0000000000003p-600)) +(module (func (export "f") (result f64) (f64.const +5.3575430359313371995e+300))) +(assert_return (invoke "f") (f64.const +0x1.0000000000000p+999)) +(module (func (export "f") (result f64) (f64.const -5.3575430359313371995e+300))) +(assert_return (invoke "f") (f64.const -0x1.0000000000000p+999)) +(module (func (export "f") (result f64) (f64.const +5.3575430359313371996e+300))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p+999)) +(module (func (export "f") (result f64) (f64.const -5.3575430359313371996e+300))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p+999)) +(module (func (export "f") (result f64) (f64.const +5.3575430359313383891e+300))) +(assert_return (invoke "f") (f64.const +0x1.0000000000001p+999)) +(module (func (export "f") (result f64) (f64.const -5.3575430359313383891e+300))) +(assert_return (invoke "f") (f64.const -0x1.0000000000001p+999)) +(module (func (export "f") (result f64) (f64.const +5.3575430359313383892e+300))) +(assert_return (invoke "f") (f64.const +0x1.0000000000002p+999)) +(module (func (export "f") (result f64) (f64.const -5.3575430359313383892e+300))) +(assert_return (invoke "f") (f64.const -0x1.0000000000002p+999)) + +;; f64, large exponent +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000080000000000p+600 +0x1.000000000000080000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000000p+600 +0x1.0000000000000p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000080000000000p+600 -0x1.000000000000080000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000000p+600 -0x1.0000000000000p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000080000000001p+600 +0x1.000000000000080000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+600 +0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000080000000001p+600 -0x1.000000000000080000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+600 -0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.0000000000000fffffffffffp+600 +0x1.0000000000000fffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+600 +0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.0000000000000fffffffffffp+600 -0x1.0000000000000fffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+600 -0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000100000000000p+600 +0x1.000000000000100000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+600 +0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000100000000000p+600 -0x1.000000000000100000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+600 -0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000100000000001p+600 +0x1.000000000000100000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+600 +0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000100000000001p+600 -0x1.000000000000100000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+600 -0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.00000000000017ffffffffffp+600 +0x1.00000000000017ffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+600 +0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.00000000000017ffffffffffp+600 -0x1.00000000000017ffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+600 -0x1.0000000000001p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000180000000000p+600 +0x1.000000000000180000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000180000000000p+600 -0x1.000000000000180000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000180000000001p+600 +0x1.000000000000180000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000180000000001p+600 -0x1.000000000000180000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.0000000000001fffffffffffp+600 +0x1.0000000000001fffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.0000000000001fffffffffffp+600 -0x1.0000000000001fffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000200000000000p+600 +0x1.000000000000200000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000200000000000p+600 -0x1.000000000000200000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000200000000001p+600 +0x1.000000000000200000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000200000000001p+600 -0x1.000000000000200000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.00000000000027ffffffffffp+600 +0x1.00000000000027ffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.00000000000027ffffffffffp+600 -0x1.00000000000027ffffffffffp+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000280000000000p+600 +0x1.000000000000280000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+600 +0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000280000000000p+600 -0x1.000000000000280000000000p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+600 -0x1.0000000000002p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000280000000001p+600 +0x1.000000000000280000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000003p+600 +0x1.0000000000003p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000280000000001p+600 -0x1.000000000000280000000001p+600))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000003p+600 -0x1.0000000000003p+600)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000100000000000 +0x2000000000000100000000000))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000000p+97 +0x1.0000000000000p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000100000000000 -0x2000000000000100000000000))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000000p+97 -0x1.0000000000000p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000100000000001 +0x2000000000000100000000001))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+97 +0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000100000000001 -0x2000000000000100000000001))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+97 -0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x20000000000001fffffffffff +0x20000000000001fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+97 +0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x20000000000001fffffffffff -0x20000000000001fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+97 -0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000200000000000 +0x2000000000000200000000000))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+97 +0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000200000000000 -0x2000000000000200000000000))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+97 -0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000200000000001 +0x2000000000000200000000001))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+97 +0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000200000000001 -0x2000000000000200000000001))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+97 -0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x20000000000002fffffffffff +0x20000000000002fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+97 +0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x20000000000002fffffffffff -0x20000000000002fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+97 -0x1.0000000000001p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000300000000000 +0x2000000000000300000000000))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000300000000000 -0x2000000000000300000000000))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000300000000001 +0x2000000000000300000000001))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000300000000001 -0x2000000000000300000000001))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x20000000000003fffffffffff +0x20000000000003fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x20000000000003fffffffffff -0x20000000000003fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000400000000000 +0x2000000000000400000000000))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000400000000000 -0x2000000000000400000000000))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000400000000001 +0x2000000000000400000000001))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000400000000001 -0x2000000000000400000000001))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x20000000000004fffffffffff +0x20000000000004fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x20000000000004fffffffffff -0x20000000000004fffffffffff))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000500000000000 +0x2000000000000500000000000))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+97 +0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000500000000000 -0x2000000000000500000000000))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+97 -0x1.0000000000002p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x2000000000000500000000001 +0x2000000000000500000000001))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000003p+97 +0x1.0000000000003p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x2000000000000500000000001 -0x2000000000000500000000001))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000003p+97 -0x1.0000000000003p+97)) +(module (func (export "f") (result v128) (v128.const f64x2 +1152921504606847104 +1152921504606847104))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000000p+60 +0x1.0000000000000p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 -1152921504606847104 -1152921504606847104))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000000p+60 -0x1.0000000000000p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 +1152921504606847105 +1152921504606847105))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+60 +0x1.0000000000001p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 -1152921504606847105 -1152921504606847105))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+60 -0x1.0000000000001p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 +1152921504606847359 +1152921504606847359))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000001p+60 +0x1.0000000000001p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 -1152921504606847359 -1152921504606847359))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000001p+60 -0x1.0000000000001p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 +1152921504606847360 +1152921504606847360))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000002p+60 +0x1.0000000000002p+60)) +(module (func (export "f") (result v128) (v128.const f64x2 -1152921504606847360 -1152921504606847360))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000002p+60 -0x1.0000000000002p+60)) + +;; f64x2, subnormal +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000080000000000p-1022 +0x0.000000000000080000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000000p-1022 +0x0.0000000000000p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000080000000000p-1022 -0x0.000000000000080000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000000p-1022 -0x0.0000000000000p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000080000000001p-1022 +0x0.000000000000080000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000001p-1022 +0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000080000000001p-1022 -0x0.000000000000080000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.0000000000000fffffffffffp-1022 +0x0.0000000000000fffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000001p-1022 +0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.0000000000000fffffffffffp-1022 -0x0.0000000000000fffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000100000000000p-1022 +0x0.000000000000100000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000001p-1022 +0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000100000000000p-1022 -0x0.000000000000100000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000100000000001p-1022 +0x0.000000000000100000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000001p-1022 +0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000100000000001p-1022 -0x0.000000000000100000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.00000000000017ffffffffffp-1022 +0x0.00000000000017ffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000001p-1022 +0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.00000000000017ffffffffffp-1022 -0x0.00000000000017ffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000180000000000p-1022 +0x0.000000000000180000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000180000000000p-1022 -0x0.000000000000180000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000180000000001p-1022 +0x0.000000000000180000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000180000000001p-1022 -0x0.000000000000180000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.0000000000001fffffffffffp-1022 +0x0.0000000000001fffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.0000000000001fffffffffffp-1022 -0x0.0000000000001fffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000200000000000p-1022 +0x0.000000000000200000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000200000000000p-1022 -0x0.000000000000200000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000200000000001p-1022 +0x0.000000000000200000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000200000000001p-1022 -0x0.000000000000200000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.00000000000027ffffffffffp-1022 +0x0.00000000000027ffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.00000000000027ffffffffffp-1022 -0x0.00000000000027ffffffffffp-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x0.000000000000280000000000p-1022 +0x0.000000000000280000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x0.0000000000002p-1022 +0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x0.000000000000280000000000p-1022 -0x0.000000000000280000000000p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.000000000000280000000001p-1022 +0x1.000000000000280000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.0000000000003p-1022 +0x1.0000000000003p-1022)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.000000000000280000000001p-1022 -0x1.000000000000280000000001p-1022))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.0000000000003p-1022 -0x1.0000000000003p-1022)) + +;; f64x2, round down at limit to infinity +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.fffffffffffff4p1023 +0x1.fffffffffffff4p1023))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.fffffffffffffp1023 +0x1.fffffffffffffp1023)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.fffffffffffff4p1023 -0x1.fffffffffffff4p1023))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.fffffffffffffp1023 -0x1.fffffffffffffp1023)) +(module (func (export "f") (result v128) (v128.const f64x2 +0x1.fffffffffffff7ffffffp1023 +0x1.fffffffffffff7ffffffp1023))) +(assert_return (invoke "f") (v128.const f64x2 +0x1.fffffffffffffp1023 +0x1.fffffffffffffp1023)) +(module (func (export "f") (result v128) (v128.const f64x2 -0x1.fffffffffffff7ffffffp1023 -0x1.fffffffffffff7ffffffp1023))) +(assert_return (invoke "f") (v128.const f64x2 -0x1.fffffffffffffp1023 -0x1.fffffffffffffp1023)) ;; As parameters of control constructs @@ -255,6 +924,48 @@ (func (export "as-drop-operand") (drop (v128.const i32x4 0 1 2 3)) ) + + (func (export "as-br-retval2") (result v128) + (block (result v128) (br 0 (v128.const i64x2 0x0302010007060504 0x0b0a09080f0e0d0c))) + ) + (func (export "as-br_if-retval2") (result v128) + (block (result v128) + (br_if 0 (v128.const i64x2 0 1) (i32.const 1)) + ) + ) + (func (export "as-return-retval2") (result v128) + (return (v128.const i64x2 0 1)) + ) + (func (export "as-if-then-retval2") (result v128) + (if (result v128) (i32.const 1) + (then (v128.const i64x2 0 1)) (else (v128.const i64x2 1 0)) + ) + ) + (func (export "as-if-else-retval2") (result v128) + (if (result v128) (i32.const 0) + (then (v128.const i64x2 0 1)) (else (v128.const i64x2 1 0)) + ) + ) + (func $f2 (param v128 v128 v128) (result v128) (v128.const i64x2 0 1)) + (func (export "as-call-param2") (result v128) + (call $f2 (v128.const i64x2 0 1) (v128.const i64x2 0 1) (v128.const i64x2 0 1)) + ) + (type $sig2 (func (param v128 v128 v128) (result v128))) + (table funcref (elem $f2)) + (func (export "as-call_indirect-param2") (result v128) + (call_indirect (type $sig2) + (v128.const i64x2 0 1) (v128.const i64x2 0 1) (v128.const i64x2 0 1) (i32.const 0) + ) + ) + (func (export "as-block-retval2") (result v128) + (block (result v128) (v128.const i64x2 0 1)) + ) + (func (export "as-loop-retval2") (result v128) + (loop (result v128) (v128.const i64x2 0 1)) + ) + (func (export "as-drop-operand2") + (drop (v128.const i64x2 0 1)) + ) ) (assert_return (invoke "as-br-retval") (v128.const i32x4 0x03020100 0x07060504 0x0b0a0908 0x0f0e0d0c)) @@ -268,6 +979,15 @@ (assert_return (invoke "as-loop-retval") (v128.const i32x4 0 1 2 3)) (assert_return (invoke "as-drop-operand")) +(assert_return (invoke "as-br-retval2") (v128.const i64x2 0x0302010007060504 0x0b0a09080f0e0d0c)) +(assert_return (invoke "as-br_if-retval2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-return-retval2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-if-then-retval2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-if-else-retval2") (v128.const i64x2 1 0)) +(assert_return (invoke "as-call-param2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-block-retval2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-loop-retval2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-drop-operand2")) ;; v128 locals @@ -365,6 +1085,19 @@ (func (export "i32x4-dec-sep2") (result v128) (v128.const i32x4 1_0_0_0 1_0_0_0 1_0_0_0 1_0_0_0)) (func (export "i32x4-hex-sep1") (result v128) (v128.const i32x4 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99 0xa_0f_00_99)) (func (export "i32x4-hex-sep2") (result v128) (v128.const i32x4 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f 0x1_a_A_0_f)) + + (func (export "i64x2.test") (result v128) (return (v128.const i64x2 0x0bAdD00D0bAdD00D 0x0bAdD00D0bAdD00D))) + (func (export "i64x2.smax") (result v128) (return (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff))) + (func (export "i64x2.neg_smax") (result v128) (return (v128.const i64x2 -0x7fffffffffffffff -0x7fffffffffffffff))) + (func (export "i64x2.inc_smin") (result v128) (return (i64x2.add (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) (v128.const i64x2 1 1)))) + (func (export "i64x2.neg_zero") (result v128) (return (v128.const i64x2 -0x0 -0x0))) + (func (export "i64x2.not_octal") (result v128) (return (v128.const i64x2 010010 010010))) + (func (export "i64x2.plus_sign") (result v128) (return (v128.const i64x2 +42 +42))) + + (func (export "i64x2-dec-sep1") (result v128) (v128.const i64x2 10_000_000_000_000 10_000_000_000_000)) + (func (export "i64x2-dec-sep2") (result v128) (v128.const i64x2 1_0_0_0_0_0_0_0 1_0_0_0_0_0_0_0)) + (func (export "i64x2-hex-sep1") (result v128) (v128.const i64x2 0xa_0f_00_99_0a_0f_00_99 0xa_0f_00_99_0a_0f_00_99)) + (func (export "i64x2-hex-sep2") (result v128) (v128.const i64x2 0x1_a_A_0_f_1_a_A_0_f 0x1_a_A_0_f_1_a_A_0_f)) ) (assert_return (invoke "i32x4.test") (v128.const i32x4 195940365 195940365 195940365 195940365)) @@ -380,6 +1113,19 @@ (assert_return (invoke "i32x4-hex-sep1") (v128.const i32x4 0xa0f0099 0xa0f0099 0xa0f0099 0xa0f0099)) (assert_return (invoke "i32x4-hex-sep2") (v128.const i32x4 0x1aa0f 0x1aa0f 0x1aa0f 0x1aa0f)) +(assert_return (invoke "i64x2.test") (v128.const i64x2 841557459837243405 841557459837243405)) +(assert_return (invoke "i64x2.smax") (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.neg_smax") (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.inc_smin") (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.neg_zero") (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.not_octal") (v128.const i64x2 10010 10010)) +(assert_return (invoke "i64x2.plus_sign") (v128.const i64x2 42 42)) + +(assert_return (invoke "i64x2-dec-sep1") (v128.const i64x2 10000000000000 10000000000000)) +(assert_return (invoke "i64x2-dec-sep2") (v128.const i64x2 10000000 10000000)) +(assert_return (invoke "i64x2-hex-sep1") (v128.const i64x2 0xa0f00990a0f0099 0xa0f00990a0f0099)) +(assert_return (invoke "i64x2-hex-sep2") (v128.const i64x2 0x1aa0f1aa0f 0x1aa0f1aa0f)) + (assert_malformed (module quote "(global v128 (v128.const i32x4 _100 _100 _100 _100))") "unknown operator" @@ -421,6 +1167,46 @@ "unknown operator" ) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 _100_100 _100_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 +_100_100 +_100_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 -_100_100 -_100_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 99_99_ 99_99_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 1__000_000 1__000_000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 _0x100000 _0x100000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 0_x100000 0_x100000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 0x_100000 0x_100000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 0x00_ 0x00_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const i64x2 0xff__ffff_ffff_ffff 0xff__ffff_ffff_ffff))") + "unknown operator" +) ;; Test floating-point literal parsing. @@ -435,6 +1221,16 @@ (func (export "f32-hex-sep3") (result v128) (v128.const f32x4 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a)) (func (export "f32-hex-sep4") (result v128) (v128.const f32x4 0xf0P+1_3 0xf0P+1_3 0xf0P+1_3 0xf0P+1_3)) (func (export "f32-hex-sep5") (result v128) (v128.const f32x4 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3)) + (func (export "f64-dec-sep1") (result v128) (v128.const f64x2 1_000_000 1_000_000)) + (func (export "f64-dec-sep2") (result v128) (v128.const f64x2 1_0_0_0 1_0_0_0)) + (func (export "f64-dec-sep3") (result v128) (v128.const f64x2 100_3.141_592 100_3.141_592)) + (func (export "f64-dec-sep4") (result v128) (v128.const f64x2 99e+1_3 99e+1_3)) + (func (export "f64-dec-sep5") (result v128) (v128.const f64x2 122_000.11_3_54E0_2_3 122_000.11_3_54E0_2_3)) + (func (export "f64-hex-sep1") (result v128) (v128.const f64x2 0xa_0f_00_99 0xa_0f_00_99)) + (func (export "f64-hex-sep2") (result v128) (v128.const f64x2 0x1_a_A_0_f 0x1_a_A_0_f)) + (func (export "f64-hex-sep3") (result v128) (v128.const f64x2 0xa0_ff.f141_a59a 0xa0_ff.f141_a59a)) + (func (export "f64-hex-sep4") (result v128) (v128.const f64x2 0xf0P+1_3 0xf0P+1_3)) + (func (export "f64-hex-sep5") (result v128) (v128.const f64x2 0x2a_f00a.1f_3_eep2_3 0x2a_f00a.1f_3_eep2_3)) ) (assert_return (invoke "f32-dec-sep1") (v128.const f32x4 1000000 1000000 1000000 1000000)) @@ -447,6 +1243,16 @@ (assert_return (invoke "f32-hex-sep3") (v128.const f32x4 0xa0ff.f141a59a 0xa0ff.f141a59a 0xa0ff.f141a59a 0xa0ff.f141a59a)) (assert_return (invoke "f32-hex-sep4") (v128.const f32x4 0xf0P+13 0xf0P+13 0xf0P+13 0xf0P+13)) (assert_return (invoke "f32-hex-sep5") (v128.const f32x4 0x2af00a.1f3eep23 0x2af00a.1f3eep23 0x2af00a.1f3eep23 0x2af00a.1f3eep23)) +(assert_return (invoke "f64-dec-sep1") (v128.const f64x2 1000000 1000000)) +(assert_return (invoke "f64-dec-sep2") (v128.const f64x2 1000 1000)) +(assert_return (invoke "f64-dec-sep3") (v128.const f64x2 1003.141592 1003.141592)) +(assert_return (invoke "f64-dec-sep4") (v128.const f64x2 99e+13 99e+13)) +(assert_return (invoke "f64-dec-sep5") (v128.const f64x2 122000.11354e23 122000.11354e23)) +(assert_return (invoke "f64-hex-sep1") (v128.const f64x2 0xa0f0099 0xa0f0099)) +(assert_return (invoke "f64-hex-sep2") (v128.const f64x2 0x1aa0f 0x1aa0f)) +(assert_return (invoke "f64-hex-sep3") (v128.const f64x2 0xa0ff.f141a59a 0xa0ff.f141a59a)) +(assert_return (invoke "f64-hex-sep4") (v128.const f64x2 0xf0P+13 0xf0P+13)) +(assert_return (invoke "f64-hex-sep5") (v128.const f64x2 0x2af00a.1f3eep23 0x2af00a.1f3eep23)) (assert_malformed (module quote "(global v128 (v128.const f32x4 _100 _100 _100 _100))") @@ -601,6 +1407,158 @@ "unknown operator" ) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 _100 _100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 +_100 +_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 -_100 -_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 99_ 99_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1__000 1__000))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 _1.0 _1.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0_ 1.0_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1_.0 1_.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1._0 1._0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 _1e1 _1e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1e1_ 1e1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1_e1 1_e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1e_1 1e_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 _1.0e1 _1.0e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0e1_ 1.0e1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0_e1 1.0_e1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0e_1 1.0e_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0e+_1 1.0e+_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 1.0e_+1 1.0e_+1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 _0x100 _0x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0_x100 0_x100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x_100 0x_100))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x00_ 0x00_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0xff__ffff 0xff__ffff))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x_1.0 0x_1.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0_ 0x1.0_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1_.0 0x1_.0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1._0 0x1._0))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x_1p1 0x_1p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1p1_ 0x1p1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1_p1 0x1_p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1p_1 0x1p_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x_1.0p1 0x_1.0p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0p1_ 0x1.0p1_))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0_p1 0x1.0_p1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0p_1 0x1.0p_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0p+_1 0x1.0p+_1))") + "unknown operator" +) +(assert_malformed + (module quote "(global v128 (v128.const f64x2 0x1.0p_+1 0x1.0p_+1))") + "unknown operator" +) ;; Test parsing an integer from binary @@ -655,6 +1613,20 @@ ) (assert_return (invoke "parse_i32x4") (v128.const i32x4 4294967249 4294967249 4294967249 4294967249)) +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\69\36\34\78\32\00\00" ;; export name (parse_i64x2) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\ff\ff\ff\ff\ff\ff\ff\7f" ;; data lane 0 (9223372036854775807) + "\ff\ff\ff\ff\ff\ff\ff\7f" ;; data lane 1 (9223372036854775807) + "\0b" ;; end +) +(assert_return (invoke "parse_i64x2") (v128.const i64x2 9223372036854775807 9223372036854775807)) ;; Test parsing a float from binary @@ -674,3 +1646,18 @@ "\0b" ;; end ) (assert_return (invoke "parse_f32x4") (v128.const f32x4 4294967249 4294967249 4294967249 4294967249)) + +(module binary + "\00asm" "\01\00\00\00" + "\01\05\01" ;; type section + "\60\00\01\7b" ;; type 0 (func) + "\03\02\01\00" ;; func section + "\07\0f\01\0b" ;; export section + "\70\61\72\73\65\5f\66\36\34\78\32\00\00" ;; export name (parse_f64x2) + "\0a\16\01" ;; code section + "\14\00\fd\02" ;; func body + "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 0 (0x1.fffffffffffffp+1023) + "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 1 (0x1.fffffffffffffp+1023) + "\0b" ;; end +) +(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) \ No newline at end of file From ddf1a04af69fa28c35436fac685943071e0d0e8a Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 4 Nov 2019 10:18:36 +0800 Subject: [PATCH 071/378] [test] Integrate v128.andnot tests from WAVM --- test/core/simd/meta/simd_bitwise.py | 39 +++++++++- test/core/simd/simd_bitwise.wast | 116 +++++++++++++++++++++++++++- 2 files changed, 148 insertions(+), 7 deletions(-) diff --git a/test/core/simd/meta/simd_bitwise.py b/test/core/simd/meta/simd_bitwise.py index f4563453cb..0ddb818bc0 100644 --- a/test/core/simd/meta/simd_bitwise.py +++ b/test/core/simd/meta/simd_bitwise.py @@ -24,6 +24,7 @@ class SimdBitWise(SIMD): (func (export "bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (v128.bitselect (local.get $0) (local.get $1) (local.get $2)) ) + (func (export "andnot") (param $0 v128) (param $1 v128) (result v128) (v128.andnot (local.get $0) (local.get $1))) ) {normal_case}""" @@ -116,7 +117,12 @@ def get_invalid_case(self): ['#', 'bitselect'], ["v128.bitselect", ['0', '0', '0'], [], ['i32', 'i32x4', 'i32x4']], ["v128.bitselect", ['0', '0', '0'], [], ['i32x4', 'i32x4', 'i32']], - ["v128.bitselect", ['0', '0', '0'], [], ['i32', 'i32', 'i32']] + ["v128.bitselect", ['0', '0', '0'], [], ['i32', 'i32', 'i32']], + + ['#', 'andnot'], + ["v128.andnot", ['0', '0'], [], ['i32', 'i32x4']], + ["v128.andnot", ['0', '0'], [], ['i32x4', 'i32']], + ["v128.andnot", ['0', '0'], [], ['i32', 'i32']] ] lst_ipr = self.init_case_data(case_data) @@ -168,6 +174,7 @@ def get_combination_case(self): ["v128.or", ['0', '1'], [], ['i32', 'i32']], ["v128.xor", ['0', '1'], [], ['i32', 'i32']], ["v128.bitselect", ['0', '1', '2'], [], ['i32', 'i32', 'i32']], + ["v128.andnot", ['0', '1'], [], ['i32', 'i32']], ] lst_ipr = self.init_case_data(case_data) @@ -223,10 +230,9 @@ def get_combination_case(self): '\n (v128.load (i32.const 1))' \ '\n (v128.load (i32.const 2))' \ '\n )' \ - '\n (v128.bitselect' \ + '\n (v128.andnot' \ '\n (v128.load (i32.const 0))' \ '\n (v128.load (i32.const 1))' \ - '\n (v128.load (i32.const 2))' \ '\n )' \ '\n )' \ '\n )' \ @@ -330,6 +336,20 @@ def get_case_data(self): ['0x55555555', '0xAAAAAAAA', '0x00000000', '0xFFFFFFFF']], [['0x00000000', '0xFFFFFFFF', '0x55555555', '0xAAAAAAAA']], ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ["andnot", [['0', '-1'], ['0', '-1', '0', '-1']], [['0', '0', '-1', '0']], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0', '-1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0', '0xFFFFFFFF'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['1', '1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['255', '85'], ['170'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['255', '128'], ['127'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['2863311530', ['10', '128', '5', '165']], [['2863311520', '2863311402', '2863311530', '2863311370']], + ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0xFFFFFFFF', '0x55555555'], ['0xAAAAAAAA'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0xFFFFFFFF', '0xAAAAAAAA'], ['0x55555555'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0xFFFFFFFF', '0x0'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], + ["andnot", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], ['0x55550000'], + ['i32x4', 'i32x4', 'i32x4']], ['#', 'for float special data [e.g. -nan nan -inf inf]'], ["not", ['-nan'], ['5.87747e-39'], ['f32x4', 'f32x4']], @@ -379,7 +399,18 @@ def get_case_data(self): ["bitselect", ['nan', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], ["bitselect", ['-inf', '-inf','0xA5A5A5A5'], ['-inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], ["bitselect", ['-inf', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], - ["bitselect", ['inf', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']] + ["bitselect", ['inf', 'inf','0xA5A5A5A5'], ['inf'], ['f32x4', 'f32x4', 'f32x4', 'f32x4']], + + ["andnot", ['-nan', '-nan'], ['0x00000000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['-nan', 'nan'], ['-0'], ['f32x4', 'f32x4', 'f32x4']], + ["andnot", ['-nan', '-inf'], ['0x00400000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['-nan', 'inf'], ['0x80400000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['nan', 'nan'], ['0x00000000'], ['f32x4', 'f32x4', 'f32x4']], + ["andnot", ['nan', '-inf'], ['0x00400000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['nan', 'inf'], ['0x00400000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['-inf', '-inf'], ['0x00000000'], ['f32x4', 'f32x4', 'f32x4']], + ["andnot", ['-inf', 'inf'], ['0x80000000'], ['f32x4', 'f32x4', 'i32x4']], + ["andnot", ['inf', 'inf'], ['0x00000000'], ['f32x4', 'f32x4', 'i32x4']] ] def gen_test_cases(self): diff --git a/test/core/simd/simd_bitwise.wast b/test/core/simd/simd_bitwise.wast index f018c09497..0e00b0cafd 100644 --- a/test/core/simd/simd_bitwise.wast +++ b/test/core/simd/simd_bitwise.wast @@ -8,6 +8,7 @@ (func (export "bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (v128.bitselect (local.get $0) (local.get $1) (local.get $2)) ) + (func (export "andnot") (param $0 v128) (param $1 v128) (result v128) (v128.andnot (local.get $0) (local.get $1))) ) ;; i32x4 @@ -155,6 +156,42 @@ (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x55555555 0xAAAAAAAA 0x00000000 0xFFFFFFFF)) (v128.const i32x4 0x00000000 0xFFFFFFFF 0x55555555 0xAAAAAAAA)) +(assert_return (invoke "andnot" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 0 -1 0)) +(assert_return (invoke "andnot" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "andnot" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "andnot" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "andnot" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "andnot" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 85 85 85 85)) + (v128.const i32x4 170 170 170 170)) +(assert_return (invoke "andnot" (v128.const i32x4 255 255 255 255) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 127 127 127 127)) +(assert_return (invoke "andnot" (v128.const i32x4 2863311530 2863311530 2863311530 2863311530) + (v128.const i32x4 10 128 5 165)) + (v128.const i32x4 2863311520 2863311402 2863311530 2863311370)) +(assert_return (invoke "andnot" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) +(assert_return (invoke "andnot" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) + (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555)) +(assert_return (invoke "andnot" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i32x4 0x0 0x0 0x0 0x0)) + (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "andnot" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) + (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) + (v128.const i32x4 0x55550000 0x55550000 0x55550000 0x55550000)) ;; for float special data [e.g. -nan nan -inf inf] (assert_return (invoke "not" (v128.const f32x4 -nan -nan -nan -nan)) @@ -295,6 +332,36 @@ (v128.const f32x4 inf inf inf inf) (v128.const f32x4 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5 0xA5A5A5A5)) (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "andnot" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "andnot" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0 -0 -0 -0)) +(assert_return (invoke "andnot" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x00400000 0x00400000 0x00400000 0x00400000)) +(assert_return (invoke "andnot" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x80400000 0x80400000 0x80400000 0x80400000)) +(assert_return (invoke "andnot" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x00000000 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "andnot" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0x00400000 0x00400000 0x00400000 0x00400000)) +(assert_return (invoke "andnot" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x00400000 0x00400000 0x00400000 0x00400000)) +(assert_return (invoke "andnot" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x00000000 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "andnot" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "andnot" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const i32x4 0x00000000 0x00000000 0x00000000 0x00000000)) ;; Type check @@ -316,6 +383,10 @@ (assert_invalid (module (func (result v128) (v128.bitselect (i32.const 0) (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") (assert_invalid (module (func (result v128) (v128.bitselect (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (v128.bitselect (i32.const 0) (i32.const 0) (i32.const 0)))) "type mismatch") +;; andnot +(assert_invalid (module (func (result v128) (v128.andnot (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.andnot (v128.const i32x4 0 0 0 0) (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (v128.andnot (i32.const 0) (i32.const 0)))) "type mismatch") ;; Combination @@ -380,6 +451,18 @@ ) ) ) + (func (export "v128.andnot-in-block") + (block + (drop + (block (result v128) + (v128.andnot + (block (result v128) (v128.load (i32.const 0))) + (block (result v128) (v128.load (i32.const 1))) + ) + ) + ) + ) + ) (func (export "nested-v128.not") (drop (v128.not @@ -526,6 +609,32 @@ ) ) ) + (func (export "nested-v128.andnot") + (drop + (v128.andnot + (v128.andnot + (v128.andnot + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.andnot + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + (v128.andnot + (v128.andnot + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + (v128.andnot + (v128.load (i32.const 0)) + (v128.load (i32.const 1)) + ) + ) + ) + ) + ) (func (export "as-param") (drop (v128.or @@ -543,10 +652,9 @@ (v128.load (i32.const 1)) (v128.load (i32.const 2)) ) - (v128.bitselect + (v128.andnot (v128.load (i32.const 0)) (v128.load (i32.const 1)) - (v128.load (i32.const 2)) ) ) ) @@ -558,9 +666,11 @@ (assert_return (invoke "v128.or-in-block")) (assert_return (invoke "v128.xor-in-block")) (assert_return (invoke "v128.bitselect-in-block")) +(assert_return (invoke "v128.andnot-in-block")) (assert_return (invoke "nested-v128.not")) (assert_return (invoke "nested-v128.and")) (assert_return (invoke "nested-v128.or")) (assert_return (invoke "nested-v128.xor")) (assert_return (invoke "nested-v128.bitselect")) -(assert_return (invoke "as-param")) \ No newline at end of file +(assert_return (invoke "nested-v128.andnot")) +(assert_return (invoke "as-param")) From ef52358c4327a12cefaa91858c762d463a8642af Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 4 Nov 2019 10:22:38 +0800 Subject: [PATCH 072/378] [test] Integrate load extend and 64x2 conversions ops from WAVM --- test/core/simd/simd_conversions.wast | 281 +++++++++++++++++++++++- test/core/simd/simd_load_extend.wast | 307 +++++++++++++++++++++++++++ 2 files changed, 585 insertions(+), 3 deletions(-) create mode 100644 test/core/simd/simd_load_extend.wast diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 21b9a16dbe..5235d6537a 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -6,12 +6,20 @@ (i32x4.trunc_sat_f32x4_s (local.get 0))) (func (export "i32x4.trunc_sat_f32x4_u") (param v128) (result v128) (i32x4.trunc_sat_f32x4_u (local.get 0))) + (func (export "i64x2.trunc_sat_f64x2_s") (param v128) (result v128) + (i64x2.trunc_sat_f64x2_s (local.get 0))) + (func (export "i64x2.trunc_sat_f64x2_u") (param v128) (result v128) + (i64x2.trunc_sat_f64x2_u (local.get 0))) ;; Integer to floating point (func (export "f32x4.convert_i32x4_s") (param v128) (result v128) (f32x4.convert_i32x4_s (local.get 0))) (func (export "f32x4.convert_i32x4_u") (param v128) (result v128) (f32x4.convert_i32x4_u (local.get 0))) + (func (export "f64x2.convert_i64x2_s") (param v128) (result v128) + (f64x2.convert_i64x2_s (local.get 0))) + (func (export "f64x2.convert_i64x2_u") (param v128) (result v128) + (f64x2.convert_i64x2_u (local.get 0))) ;; Integer to integer narrowing (func (export "i8x16.narrow_i16x8_s") (param v128 v128) (result v128) @@ -210,6 +218,175 @@ (assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -42 3.14 nan inf)) (v128.const i32x4 0 3 0 0xffffffff)) +;; i64x2.trunc_sat_f64x2_s + +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0.0 0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0.0 -0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.0 1.0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.0 -1.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.5 1.5)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.5 -1.5)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.9 1.9)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.9 -1.9)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -2.0 -2.0)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 4294967296.0 4294967296.0)) + (v128.const i64x2 4294967296 4294967296)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -4294967296.0 -4294967296.0)) + (v128.const i64x2 -4294967296 -4294967296)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854774784.0 9223372036854774784.0)) + (v128.const i64x2 9223372036854774784 9223372036854774784)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854774784.0 -9223372036854774784.0)) + (v128.const i64x2 -9223372036854774784 -9223372036854774784)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 10000000000000000000.0 10000000000000000000.0)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -10000000000000000000.0 -10000000000000000000.0)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854775807.0 -9223372036854775807.0)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 6 6)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 -6 -6)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 inf inf)) + (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -inf -inf)) + (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 3.14 nan)) + (v128.const i64x2 3 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -3.14 -inf)) + (v128.const i64x2 -3 -0x8000000000000000)) + +;; i64x2.trunc_sat_f64x2_u + +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0.0 0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0.0 -0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.0 1.0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.0 -1.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.5 1.5)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.5 -1.5)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.9 1.9)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.9 -1.9)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 2.0 2.0)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -2.0 -2.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 4294967296.0 4294967296.0)) + (v128.const i64x2 4294967296 4294967296)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -4294967296.0 -4294967296.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854774784.0 9223372036854774784.0)) + (v128.const i64x2 9223372036854774784 9223372036854774784)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854774784.0 -9223372036854774784.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) + (v128.const i64x2 9223372036854775808 9223372036854775808)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 10000000000000000000.0 10000000000000000000.0)) + (v128.const i64x2 10000000000000000000 10000000000000000000)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -10000000000000000000.0 -10000000000000000000.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 18446744073709551615.0 18446744073709551615.0)) + (v128.const i64x2 18446744073709551615 18446744073709551615)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -18446744073709551615.0 -18446744073709551615.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) + (v128.const i64x2 9223372036854775808 9223372036854775808)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854775807.0 -9223372036854775807.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const i64x2 6 6)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 inf inf)) + (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 nan nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -nan -nan)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 3.14 nan)) + (v128.const i64x2 3 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -3.14 -inf)) + (v128.const i64x2 0 0)) ;; Integer to floating point ;; f32x4.convert_i32x4_s @@ -239,6 +416,31 @@ (assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) (v128.const f32x4 0.0 -1.0 2147483647.0 -2147483648.0)) +;; f64x2.convert_i64x2_s + +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0 0)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 1 1)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -1 -1)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 4669201609102990 4669201609102990)) + (v128.const f64x2 4669201609102990.0 4669201609102990.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9007199254740993 9007199254740993)) + (v128.const f64x2 9007199254740992.0 9007199254740992.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9007199254740993 -9007199254740993)) + (v128.const f64x2 -9007199254740992.0 -9007199254740992.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9007199254740995 9007199254740995)) + (v128.const f64x2 9007199254740996.0 9007199254740996.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9007199254740995 -9007199254740995)) + (v128.const f64x2 -9007199254740996.0 -9007199254740996.0)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) + (v128.const f64x2 9223372036854775807.0 -9223372036854775808.0)) + ;; f32x4.convert_i32x4_u (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 0 0 0)) @@ -274,6 +476,38 @@ (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) (v128.const f32x4 0.0 4294967295.0 2147483647.0 2147483648.0)) +;; f64x2.convert_i64x2_u + +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0 0)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 1 1)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 -1 -1)) + (v128.const f64x2 18446744073709551615.0 18446744073709551615.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const f64x2 18446744073709551616.0 18446744073709551616.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000400 0x8000000000000400)) + (v128.const f64x2 0x1.0000000000000p+63 0x1.0000000000000p+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000401 0x8000000000000401)) + (v128.const f64x2 0x1.0000000000001p+63 0x1.0000000000001p+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000402 0x8000000000000402)) + (v128.const f64x2 0x1.0000000000001p+63 0x1.0000000000001p+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff400 0xfffffffffffff400)) + (v128.const f64x2 0x1.ffffffffffffep+63 0x1.ffffffffffffep+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff401 0xfffffffffffff401)) + (v128.const f64x2 0x1.fffffffffffffp+63 0x1.fffffffffffffp+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff402 0xfffffffffffff402)) + (v128.const f64x2 0x1.fffffffffffffp+63 0x1.fffffffffffffp+63)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9007199254740993 9007199254740993)) + (v128.const f64x2 9007199254740992.0 9007199254740992.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9007199254740995 9007199254740995)) + (v128.const f64x2 9007199254740996.0 9007199254740996.0)) +(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) + (v128.const f64x2 9223372036854775807.0 9223372036854775808.0)) ;; Integer to integer narrowing ;; i8x16.narrow_i16x8_s @@ -945,10 +1179,10 @@ "(func (result v128) (i32x4.trunc_sat_f32x4 (v128.const f32x4 0.0 0.0 0.0 0.0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.trunc_s_sat_f32x4 (v128.const f32x4 -2.0 -1.0 0 1.0 2.0)))") + "(func (result v128) (i32x4.trunc_s_sat_f32x4 (v128.const f32x4 -2.0 -1.0 1.0 2.0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.trunc_u_sat_f32x4 (v128.const f32x4 -2.0 -1.0 0 1.0 2.0)))") + "(func (result v128) (i32x4.trunc_u_sat_f32x4 (v128.const f32x4 -2.0 -1.0 1.0 2.0)))") "unknown operator") (assert_malformed (module quote "(func (result v128) (i32x4.convert_f32x4 (v128.const f32x4 -1 0 1 2)))") @@ -960,6 +1194,25 @@ "(func (result v128) (i32x4.convert_u_f32x4 (v128.const f32x4 -1 0 1 2)))") "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i64x2.trunc_sat_f64x2 (v128.const f64x2 0.0 0.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i64x2.trunc_s_sat_f64x2 (v128.const f64x2 -2.0 -1.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (i64x2.trunc_u_sat_f64x2 (v128.const f64x2 1.0 2.0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f64x2.convert_i64x2 (v128.const i64x2 -1 0)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f64x2.convert_s_i64x2 (v128.const i64x2 1 2)))") + "unknown operator") +(assert_malformed (module quote + "(func (result v128) (f64x2.convert_u_i64x2 (v128.const i64x2 1 2)))") + "unknown operator") + (assert_malformed (module quote "(func (result v128) (i8x16.narrow_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") @@ -1033,6 +1286,14 @@ (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_s (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_u (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_s (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_u (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_s (i32.const 0) (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_u (i32.const 0) (i64.const 0)))) "type mismatch") @@ -1058,6 +1319,12 @@ (f32x4.convert_i32x4_s (i32x4.sub (local.get 0) (local.get 1)))) (func (export "f32x4_convert_i32x4_u_mul") (param v128 v128) (result v128) (f32x4.convert_i32x4_u (i32x4.mul (local.get 0) (local.get 1)))) + (func (export "f64x2_convert_i64x2_s_add") (param v128 v128) (result v128) + (f64x2.convert_i64x2_s (i64x2.add (local.get 0) (local.get 1)))) + (func (export "f64x2_convert_i64x2_s_sub") (param v128 v128) (result v128) + (f64x2.convert_i64x2_s (i64x2.sub (local.get 0) (local.get 1)))) + (func (export "f64x2_convert_i64x2_u_mul") (param v128 v128) (result v128) + (f64x2.convert_i64x2_u (i64x2.mul (local.get 0) (local.get 1)))) (func (export "i16x8_low_widen_narrow_ss") (param v128 v128) (result v128) (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) @@ -1103,7 +1370,15 @@ (assert_return (invoke "f32x4_convert_i32x4_u_mul" (v128.const i32x4 1 2 3 4) (v128.const i32x4 1 2 3 4)) (v128.const f32x4 1.0 4.0 9.0 16.0)) - +(assert_return (invoke "f64x2_convert_i64x2_s_add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "f64x2_convert_i64x2_s_sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "f64x2_convert_i64x2_u_mul" (v128.const i64x2 0x7fffffff 0x7fffffff) + (v128.const i64x2 0x80000000 0x80000000)) + (v128.const f64x2 4611686016279904256.0 4611686016279904256.0)) (assert_return (invoke "i16x8_low_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) diff --git a/test/core/simd/simd_load_extend.wast b/test/core/simd/simd_load_extend.wast new file mode 100644 index 0000000000..483fe9de74 --- /dev/null +++ b/test/core/simd/simd_load_extend.wast @@ -0,0 +1,307 @@ +;; Load and Extend test cases + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + (data (i32.const 65520) "\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + + (func (export "i16x8.load8x8_s") (param $0 i32) (result v128) + (i16x8.load8x8_s (local.get $0)) + ) + (func (export "i16x8.load8x8_u") (param $0 i32) (result v128) + (i16x8.load8x8_u (local.get $0)) + ) + (func (export "i32x4.load16x4_s") (param $0 i32) (result v128) + (i32x4.load16x4_s (local.get $0)) + ) + (func (export "i32x4.load16x4_u") (param $0 i32) (result v128) + (i32x4.load16x4_u (local.get $0)) + ) + (func (export "i64x2.load32x2_s") (param $0 i32) (result v128) + (i64x2.load32x2_s (local.get $0)) + ) + (func (export "i64x2.load32x2_u") (param $0 i32) (result v128) + (i64x2.load32x2_u (local.get $0)) + ) + + ;; load by a constant amount + (func (export "i16x8.load8x8_s_const0") (result v128) + (i16x8.load8x8_s (i32.const 0)) + ) + (func (export "i16x8.load8x8_u_const8") (result v128) + (i16x8.load8x8_u (i32.const 8)) + ) + (func (export "i32x4.load16x4_s_const10") (result v128) + (i32x4.load16x4_s (i32.const 10)) + ) + (func (export "i32x4.load16x4_u_const20") (result v128) + (i32x4.load16x4_u (i32.const 20)) + ) + (func (export "i64x2.load32x2_s_const65520") (result v128) + (i64x2.load32x2_s (i32.const 65520)) + ) + (func (export "i64x2.load32x2_u_const65526") (result v128) + (i64x2.load32x2_u (i32.const 65526)) + ) + + ;; load data with different offset/align arguments + ;; i16x8 + (func (export "i16x8.load8x8_s_offset0") (param $0 i32) (result v128) + (i16x8.load8x8_s offset=0 (local.get $0)) + ) + (func (export "i16x8.load8x8_s_align1") (param $0 i32) (result v128) + (i16x8.load8x8_s align=1 (local.get $0)) + ) + (func (export "i16x8.load8x8_s_offset0_align1") (param $0 i32) (result v128) + (i16x8.load8x8_s offset=0 align=1 (local.get $0)) + ) + (func (export "i16x8.load8x8_s_offset10_align4") (param $0 i32) (result v128) + (i16x8.load8x8_s offset=10 align=4 (local.get $0)) + ) + (func (export "i16x8.load8x8_s_offset20_align8") (param $0 i32) (result v128) + (i16x8.load8x8_s offset=20 align=8 (local.get $0)) + ) + (func (export "i16x8.load8x8_u_offset0") (param $0 i32) (result v128) + (i16x8.load8x8_u offset=0 (local.get $0)) + ) + (func (export "i16x8.load8x8_u_align1") (param $0 i32) (result v128) + (i16x8.load8x8_u align=1 (local.get $0)) + ) + (func (export "i16x8.load8x8_u_offset0_align1") (param $0 i32) (result v128) + (i16x8.load8x8_u offset=0 align=1 (local.get $0)) + ) + (func (export "i16x8.load8x8_u_offset10_align4") (param $0 i32) (result v128) + (i16x8.load8x8_u offset=10 align=4 (local.get $0)) + ) + (func (export "i16x8.load8x8_u_offset20_align8") (param $0 i32) (result v128) + (i16x8.load8x8_u offset=20 align=8 (local.get $0)) + ) + ;; i32x4 + (func (export "i32x4.load16x4_s_offset0") (param $0 i32) (result v128) + (i32x4.load16x4_s offset=0 (local.get $0)) + ) + (func (export "i32x4.load16x4_s_align1") (param $0 i32) (result v128) + (i32x4.load16x4_s align=1 (local.get $0)) + ) + (func (export "i32x4.load16x4_s_offset0_align1") (param $0 i32) (result v128) + (i32x4.load16x4_s offset=0 align=1 (local.get $0)) + ) + (func (export "i32x4.load16x4_s_offset10_align4") (param $0 i32) (result v128) + (i32x4.load16x4_s offset=10 align=4 (local.get $0)) + ) + (func (export "i32x4.load16x4_s_offset20_align8") (param $0 i32) (result v128) + (i32x4.load16x4_s offset=20 align=8 (local.get $0)) + ) + (func (export "i32x4.load16x4_u_offset0") (param $0 i32) (result v128) + (i32x4.load16x4_u offset=0 (local.get $0)) + ) + (func (export "i32x4.load16x4_u_align1") (param $0 i32) (result v128) + (i32x4.load16x4_u align=1 (local.get $0)) + ) + (func (export "i32x4.load16x4_u_offset0_align1") (param $0 i32) (result v128) + (i32x4.load16x4_u offset=0 align=1 (local.get $0)) + ) + (func (export "i32x4.load16x4_u_offset10_align4") (param $0 i32) (result v128) + (i32x4.load16x4_u offset=10 align=4 (local.get $0)) + ) + (func (export "i32x4.load16x4_u_offset20_align8") (param $0 i32) (result v128) + (i32x4.load16x4_u offset=20 align=8 (local.get $0)) + ) + ;; i64x2 + (func (export "i64x2.load32x2_s_offset0") (param $0 i32) (result v128) + (i64x2.load32x2_s offset=0 (local.get $0)) + ) + (func (export "i64x2.load32x2_s_align1") (param $0 i32) (result v128) + (i64x2.load32x2_s align=1 (local.get $0)) + ) + (func (export "i64x2.load32x2_s_offset0_align1") (param $0 i32) (result v128) + (i64x2.load32x2_s offset=0 align=1 (local.get $0)) + ) + (func (export "i64x2.load32x2_s_offset10_align4") (param $0 i32) (result v128) + (i64x2.load32x2_s offset=10 align=4 (local.get $0)) + ) + (func (export "i64x2.load32x2_s_offset20_align8") (param $0 i32) (result v128) + (i64x2.load32x2_s offset=20 align=8 (local.get $0)) + ) + (func (export "i64x2.load32x2_u_offset0") (param $0 i32) (result v128) + (i64x2.load32x2_u offset=0 (local.get $0)) + ) + (func (export "i64x2.load32x2_u_align1") (param $0 i32) (result v128) + (i64x2.load32x2_u align=1 (local.get $0)) + ) + (func (export "i64x2.load32x2_u_offset0_align1") (param $0 i32) (result v128) + (i64x2.load32x2_u offset=0 align=1 (local.get $0)) + ) + (func (export "i64x2.load32x2_u_offset10_align4") (param $0 i32) (result v128) + (i64x2.load32x2_u offset=10 align=4 (local.get $0)) + ) + (func (export "i64x2.load32x2_u_offset20_align8") (param $0 i32) (result v128) + (i64x2.load32x2_u offset=20 align=8 (local.get $0)) + ) +) + + +;; normal +(assert_return (invoke "i16x8.load8x8_s" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i16x8.load8x8_u" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i32x4.load16x4_s" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "i32x4.load16x4_u" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "i64x2.load32x2_s" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "i64x2.load32x2_u" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "i16x8.load8x8_s" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0xFF80 0xFF81)) +(assert_return (invoke "i16x8.load8x8_u" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0x0080 0x0081)) +(assert_return (invoke "i32x4.load16x4_s" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) +(assert_return (invoke "i32x4.load16x4_u" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0x00008180)) +(assert_return (invoke "i64x2.load32x2_s" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "i64x2.load32x2_u" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0x0000000081800F0E)) +(assert_return (invoke "i16x8.load8x8_s" (i32.const 20)) (v128.const i16x8 0xff84 0xff85 0xff86 0xff87 0xff88 0xff89 0x0000 0x0000)) +(assert_return (invoke "i16x8.load8x8_u" (i32.const 20)) (v128.const i16x8 0x0084 0x0085 0x0086 0x0087 0x0088 0x0089 0x0000 0x0000)) +(assert_return (invoke "i32x4.load16x4_s" (i32.const 20)) (v128.const i32x4 0xffff8584 0xffff8786 0xffff8988 0x00000000)) +(assert_return (invoke "i32x4.load16x4_u" (i32.const 20)) (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) +(assert_return (invoke "i64x2.load32x2_s" (i32.const 20)) (v128.const i64x2 0xFFFFFFFF87868584 0x0000000000008988)) +(assert_return (invoke "i64x2.load32x2_u" (i32.const 20)) (v128.const i64x2 0x0000000087868584 0x0000000000008988)) + +;; load by a constant amount +(assert_return (invoke "i16x8.load8x8_s_const0") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i16x8.load8x8_u_const8") (v128.const i16x8 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F)) +(assert_return (invoke "i32x4.load16x4_s_const10") (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) +(assert_return (invoke "i32x4.load16x4_u_const20") (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) +(assert_return (invoke "i64x2.load32x2_s_const65520") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "i64x2.load32x2_u_const65526") (v128.const i64x2 0x0000000083828180 0x0000000087868584)) + +;; load data with different offset/align arguments +;; i16x8 +(assert_return (invoke "i16x8.load8x8_s_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i16x8.load8x8_s_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "i16x8.load8x8_s_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) +(assert_return (invoke "i16x8.load8x8_s_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0xFF80 0xFF81 0xFF82 0xFF83 0xFF84)) +(assert_return (invoke "i16x8.load8x8_s_offset20_align8" (i32.const 4)) (v128.const i16x8 0xFF88 0xFF89 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) +(assert_return (invoke "i16x8.load8x8_u_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i16x8.load8x8_u_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "i16x8.load8x8_u_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) +(assert_return (invoke "i16x8.load8x8_u_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0x0080 0x0081 0x0082 0x0083 0x0084)) +(assert_return (invoke "i16x8.load8x8_u_offset20_align8" (i32.const 4)) (v128.const i16x8 0x0088 0x0089 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) +;; i32x4 +(assert_return (invoke "i32x4.load16x4_s_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "i32x4.load16x4_s_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) +(assert_return (invoke "i32x4.load16x4_s_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "i32x4.load16x4_s_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0xFFFF800F 0xFFFF8281 0xFFFF8483)) +(assert_return (invoke "i32x4.load16x4_s_offset20_align8" (i32.const 4)) (v128.const i32x4 0xFFFF8988 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "i32x4.load16x4_u_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "i32x4.load16x4_u_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) +(assert_return (invoke "i32x4.load16x4_u_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "i32x4.load16x4_u_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0x0000800F 0x00008281 0x00008483)) +(assert_return (invoke "i32x4.load16x4_u_offset20_align8" (i32.const 4)) (v128.const i32x4 0x00008988 0x00000000 0x00000000 0x00000000)) +;; i64x2 +(assert_return (invoke "i64x2.load32x2_s_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "i64x2.load32x2_s_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) +(assert_return (invoke "i64x2.load32x2_s_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) +(assert_return (invoke "i64x2.load32x2_s_offset10_align4" (i32.const 3)) (v128.const i64x2 0xFFFFFFFF800F0E0D 0xFFFFFFFF84838281)) +(assert_return (invoke "i64x2.load32x2_s_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) +(assert_return (invoke "i64x2.load32x2_u_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "i64x2.load32x2_u_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) +(assert_return (invoke "i64x2.load32x2_u_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) +(assert_return (invoke "i64x2.load32x2_u_offset10_align4" (i32.const 3)) (v128.const i64x2 0x00000000800F0E0D 0x0000000084838281)) +(assert_return (invoke "i64x2.load32x2_u_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) + +;; out of bounds memory access +(assert_trap (invoke "i16x8.load8x8_s" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i16x8.load8x8_u" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i32x4.load16x4_s" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "i32x4.load16x4_u" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "i64x2.load32x2_s" (i32.const 65529)) "out of bounds memory access") +(assert_trap (invoke "i64x2.load32x2_u" (i32.const 65529)) "out of bounds memory access") + +;; type check +(assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_s (f32.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_u (f32.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (i32x4.load16x4_s (f64.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (i32x4.load16x4_u (f64.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_s (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_u (v128.const i32x4 0 0 0 0)))) "type mismatch") + +;; unknown operator +(assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_u (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i32x4.load32x2_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i32x4.load32x2_u (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load64x1_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load64x1_u (i32.const 0))))") "unknown operator") + +;; combination +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + (func (export "i16x8.load8x8_s-in-block") (result v128) + (block (result v128) (block (result v128) (i16x8.load8x8_s (i32.const 0)))) + ) + (func (export "i16x8.load8x8_u-in-block") (result v128) + (block (result v128) (block (result v128) (i16x8.load8x8_u (i32.const 1)))) + ) + (func (export "i32x4.load16x4_s-in-block") (result v128) + (block (result v128) (block (result v128) (i32x4.load16x4_s (i32.const 2)))) + ) + (func (export "i32x4.load16x4_u-in-block") (result v128) + (block (result v128) (block (result v128) (i32x4.load16x4_u (i32.const 3)))) + ) + (func (export "i64x2.load32x2_s-in-block") (result v128) + (block (result v128) (block (result v128) (i64x2.load32x2_s (i32.const 4)))) + ) + (func (export "i64x2.load32x2_u-in-block") (result v128) + (block (result v128) (block (result v128) (i64x2.load32x2_u (i32.const 5)))) + ) + (func (export "i16x8.load8x8_s-as-br-value") (result v128) + (block (result v128) (br 0 (i16x8.load8x8_s (i32.const 6)))) + ) + (func (export "i16x8.load8x8_u-as-br-value") (result v128) + (block (result v128) (br 0 (i16x8.load8x8_u (i32.const 7)))) + ) + (func (export "i32x4.load16x4_s-as-br-value") (result v128) + (block (result v128) (br 0 (i32x4.load16x4_s (i32.const 8)))) + ) + (func (export "i32x4.load16x4_u-as-br-value") (result v128) + (block (result v128) (br 0 (i32x4.load16x4_u (i32.const 9)))) + ) + (func (export "i64x2.load32x2_s-as-br-value") (result v128) + (block (result v128) (br 0 (i64x2.load32x2_s (i32.const 10)))) + ) + (func (export "i64x2.load32x2_u-as-br-value") (result v128) + (block (result v128) (br 0 (i64x2.load32x2_u (i32.const 11)))) + ) + (func (export "i16x8.load8x8_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i16x8.load8x8_s (i32.const 12))) + ) + (func (export "i16x8.load8x8_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i16x8.load8x8_u (i32.const 13))) + ) + (func (export "i32x4.load16x4_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i32x4.load16x4_s (i32.const 14))) + ) + (func (export "i32x4.load16x4_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i32x4.load16x4_u (i32.const 15))) + ) + (func (export "i64x2.load32x2_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i64x2.load32x2_s (i32.const 16))) + ) + (func (export "i64x2.load32x2_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (i64x2.load32x2_u (i32.const 17))) + ) +) +(assert_return (invoke "i16x8.load8x8_s-in-block") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "i16x8.load8x8_u-in-block") (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "i32x4.load16x4_s-in-block") (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "i32x4.load16x4_u-in-block") (v128.const i32x4 0x00000403 0x00000605 0x00000807 0x00000A09)) +(assert_return (invoke "i64x2.load32x2_s-in-block") (v128.const i64x2 0x0000000007060504 0x000000000B0A0908)) +(assert_return (invoke "i64x2.load32x2_u-in-block") (v128.const i64x2 0x0000000008070605 0x000000000C0B0A09)) +(assert_return (invoke "i16x8.load8x8_s-as-br-value") (v128.const i16x8 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D)) +(assert_return (invoke "i16x8.load8x8_u-as-br-value") (v128.const i16x8 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E)) +(assert_return (invoke "i32x4.load16x4_s-as-br-value") (v128.const i32x4 0x00000908 0x00000B0A 0x00000D0C 0x00000F0E)) +(assert_return (invoke "i32x4.load16x4_u-as-br-value") (v128.const i32x4 0x00000A09 0x00000C0B 0x00000E0D 0x0000800F)) +(assert_return (invoke "i64x2.load32x2_s-as-br-value") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "i64x2.load32x2_u-as-br-value") (v128.const i64x2 0x000000000E0D0C0B 0x000000008281800F)) +(assert_return (invoke "i16x8.load8x8_s-extract_lane_s-operand") (i32.const 12)) +(assert_return (invoke "i16x8.load8x8_u-extract_lane_s-operand") (i32.const 13)) +(assert_return (invoke "i32x4.load16x4_s-extract_lane_s-operand") (i32.const 14)) +(assert_return (invoke "i32x4.load16x4_u-extract_lane_s-operand") (i32.const 15)) +(assert_return (invoke "i64x2.load32x2_s-extract_lane_s-operand") (i32.const -128)) +(assert_return (invoke "i64x2.load32x2_u-extract_lane_s-operand") (i32.const -127)) \ No newline at end of file From 6689add40704eb7bc8172ce60562cf0e182375b0 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 4 Nov 2019 10:39:33 +0800 Subject: [PATCH 073/378] [test] Integrate tests for f64x2 min/max/abs ops from WAVM --- test/core/simd/meta/README.md | 1 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_f64x2.py | 443 ++++++ test/core/simd/simd_f64x2.wast | 2425 +++++++++++++++++++++++++++++ 4 files changed, 2870 insertions(+) create mode 100644 test/core/simd/meta/simd_f64x2.py create mode 100644 test/core/simd/simd_f64x2.wast diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index d4c202994a..74567cca50 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -16,6 +16,7 @@ Currently it only support following simd test files generation. - 'simd_i8x16_sat_arith.wast' - 'simd_i16x8_sat_arith.wast' - 'simd_f32x4.wast' +- 'simd_f64x2.wast' Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index b9f17a7409..7d37dce982 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -21,6 +21,7 @@ 'simd_sat_arith', 'simd_bitwise', 'simd_f32x4', + 'simd_f64x2', ) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py new file mode 100644 index 0000000000..1d7c53bc7b --- /dev/null +++ b/test/core/simd/meta/simd_f64x2.py @@ -0,0 +1,443 @@ +#!/usr/bin/env python3 + +""" +Generate f64x2 [abs, min, max] cases. +""" + +from simd_f32x4 import Simdf32x4Case +from simd_f32x4_arith import Simdf32x4ArithmeticCase +from test_assert import AssertReturn + + +class Simdf64x2Case(Simdf32x4Case): + + LANE_TYPE = 'f64x2' + + FLOAT_NUMBERS = ( + '0x0p+0', '-0x0p+0', '0x1p-1074', '-0x1p-1074', '0x1p-1022', '-0x1p-1022', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', + '0x1.921fb54442d18p+2', '-0x1.921fb54442d18p+2', '0x1.fffffffffffffp+1023', '-0x1.fffffffffffffp+1023', 'inf', '-inf' + ) + + NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') + + def gen_test_fn_template(self): + + # Get function code + template = Simdf32x4ArithmeticCase.gen_test_fn_template(self) + + # Function template + tpl_func = ' (func (export "{}"){} (result v128) ({} {}{}))' + + # Const data for min and max + lst_instr_with_const = [ + [ + [['0', '1'], ['0', '2']], + [['0', '1'], ['0', '2']] + ], + [ + [['2', '-3'], ['1', '3']], + [['1', '-3'], ['2', '3']] + ], + [ + [['0', '1'], ['0', '1']], + [['0', '1'], ['0', '1']] + ], + [ + [['2', '3'], ['2', '3']], + [['2', '3'], ['2', '3']] + ], + [ + [['0x00', '0x01'], ['0x00', '0x02']], + [['0x00', '0x01'], ['0x00', '0x02']] + ], + [ + [['0x02', '0x80000000'], ['0x01', '2147483648']], + [['0x01', '0x80000000'], ['0x02', '2147483648']] + ], + [ + [['0x00', '0x01'], ['0x00', '0x01']], + [['0x00', '0x01'], ['0x00', '0x01']] + ], + [ + [['0x02', '0x80000000'], ['0x02', '0x80000000']], + [['0x02', '0x80000000'], ['0x02', '0x80000000']] + ] + ] + + # Assert data + lst_oprt_with_const_assert = {} + + # Generate func and assert + for op in self.BINARY_OPS: + + op_name = self.full_op_name(op) + + # Add comment for the case script " ;; [f64x2.min, f64x2.max] const vs const" + template.insert(len(template)-1, ' ;; {} const vs const'.format(op_name)) + + # Add const vs const cases + for case_data in lst_instr_with_const: + + func_name = "{}_with_const_{}".format(op_name, len(template)-7) + template.insert(len(template)-1, + tpl_func.format(func_name, '', op_name, + self.v128_const('f64x2', case_data[0][0]), + ' ' + self.v128_const('f64x2', case_data[0][1]))) + + ret_idx = 0 if op == 'min' else 1 + + if op not in lst_oprt_with_const_assert: + lst_oprt_with_const_assert[op] = [] + + lst_oprt_with_const_assert[op].append([func_name, case_data[1][ret_idx]]) + + # Add comment for the case script " ;; [f64x2.min, f64x2.max] param vs const" + template.insert(len(template)-1, ' ;; {} param vs const'.format(op_name)) + + case_cnt = 0 + + # Add param vs const cases + for case_data in lst_instr_with_const: + + func_name = "{}_with_const_{}".format(op_name, len(template)-7) + + # Cross parameters and constants + if case_cnt in (0, 3): + func_param_0 = '(local.get 0)' + func_param_1 = self.v128_const('f64x2', case_data[0][0]) + else: + func_param_0 = self.v128_const('f64x2', case_data[0][0]) + func_param_1 = '(local.get 0)' + + template.insert(len(template)-1, + tpl_func.format(func_name, '(param v128)', op_name, func_param_0, ' ' + func_param_1)) + + ret_idx = 0 if op == 'min' else 1 + + if op not in lst_oprt_with_const_assert: + lst_oprt_with_const_assert[op] = [] + + lst_oprt_with_const_assert[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) + + case_cnt += 1 + + # print(lst_oprt_with_const_assert) + + # Generate func for abs + op_name = self.full_op_name('abs') + template.insert(len(template)-1, '') + func_name = "{}_with_const_{}".format(op_name, 35) + template.insert(len(template)-1, + tpl_func.format(func_name, '', op_name, + self.v128_const('f64x2', ['-0', '-1']), '')) + func_name = "{}_with_const_{}".format(op_name, 36) + template.insert(len(template)-1, + tpl_func.format(func_name, '', op_name, + self.v128_const('f64x2', ['-2', '-3']), '')) + + # Test different lanes go through different if-then clauses + lst_diff_lane_vs_clause = [ + [ + 'f64x2.min', + [['nan', '0'], ['0', '1']], + [['nan', '0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.min', + [['0', '1'], ['-nan', '0']], + [['-nan', '0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.min', + [['0', '1'], ['-nan', '1']], + [['-nan', '1']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['nan', '0'], ['0', '1']], + [['nan', '1']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['0', '1'], ['-nan', '0']], + [['-nan', '1']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['0', '1'], ['-nan', '1']], + [['-nan', '1']], + ['f64x2', 'f64x2', 'f64x2'] + ] + ] + + # Case number + case_cnt = 0 + + # Template for func name to extract a lane + tpl_func_name_by_lane = 'call_indirect_vv_v_f64x2_extract_lane_{}' + + # Template for assert + tpl_assert = '({}\n' \ + ' (invoke "{}"\n' \ + ' {}\n' \ + ' {}\n' \ + ' {}\n' \ + ' )\n' \ + '{}' \ + ')' + + lst_diff_lane_vs_clause_assert = [] + + # Add comment in wast script + lst_diff_lane_vs_clause_assert.append('') + lst_diff_lane_vs_clause_assert.append(';; Test different lanes go through different if-then clauses') + + template.insert(len(template)-1, '') + template.insert(len(template)-1, ' ;; Test different lanes go through different if-then clauses') + + # Add test case for test different lanes go through different if-then clauses + template.insert(len(template)-1, ' (type $vv_v (func (param v128 v128) (result v128)))\n' + ' (table funcref (elem $f64x2_min $f64x2_max))\n' + '\n' + ' (func $f64x2_min (type $vv_v)\n' + ' (f64x2.min (local.get 0) (local.get 1))\n' + ' )\n' + '\n' + ' (func $f64x2_max (type $vv_v)\n' + ' (f64x2.max (local.get 0) (local.get 1))\n' + ' )\n' + '\n' + ' (func (export "call_indirect_vv_v_f64x2_extract_lane_0")\n' + ' (param v128 v128 i32) (result f64)\n' + ' (f64x2.extract_lane 0\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )\n' + ' (func (export "call_indirect_vv_v_f64x2_extract_lane_1")\n' + ' (param v128 v128 i32) (result f64)\n' + ' (f64x2.extract_lane 1\n' + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' + ' )\n' + ' )') + + for case_data in lst_diff_lane_vs_clause: + + lst_diff_lane_vs_clause_assert.append(';; {} {}'.format(case_data[0], case_cnt)) + + # generate assert for every data lane + for lane_idx in range(0, len(case_data[2][0])): + + # get the result by lane + ret = case_data[2][0][lane_idx] + + idx_func = '0' if 'min' in case_data[0] else '1' + + # append assert + if 'nan' in ret: + + lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return_canonical_nan', + tpl_func_name_by_lane.format(lane_idx), + self.v128_const('f64x2', case_data[1][0]), + self.v128_const('f64x2', case_data[1][1]), + self.v128_const('i32', idx_func), + '')) + else: + + lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return', + tpl_func_name_by_lane.format(lane_idx), + self.v128_const('f64x2', case_data[1][0]), + self.v128_const('f64x2', case_data[1][1]), + self.v128_const('i32', idx_func), + ' '+self.v128_const('f64', ret)+'\n')) + + case_cnt += 1 + if case_cnt == 2: + case_cnt = 0 + + lst_diff_lane_vs_clause_assert.append('') + + # Add test for operations with constant operands + for key in lst_oprt_with_const_assert: + + case_cnt = 0 + for case_data in lst_oprt_with_const_assert[key]: + + # Add comment for the param combination + if case_cnt == 0: + template.append(';; {} const vs const'.format(op_name)) + if case_cnt == 4: + template.append(';; {} param vs const'.format(op_name)) + + # Cross parameters and constants + if case_cnt < 8: + template.append(str(AssertReturn(case_data[0], [], self.v128_const('f64x2', case_data[1])))) + else: + template.append(str(AssertReturn(case_data[0], [self.v128_const('f64x2', case_data[1])], self.v128_const('f64x2', case_data[2])))) + case_cnt += 1 + + # Generate and append f64x2.abs assert + op_name = self.full_op_name('abs') + template.append('') + func_name = "{}_with_const_{}".format(op_name, 35) + template.append(str(AssertReturn(func_name, [], self.v128_const('f64x2', ['0', '1'])))) + func_name = "{}_with_const_{}".format(op_name, 36) + template.append(str(AssertReturn(func_name, [], self.v128_const('f64x2', ['2', '3'])))) + + template.extend(lst_diff_lane_vs_clause_assert) + + return template + + @property + def combine_ternary_arith_test_data(self): + return { + 'min-max': [ + ['1.125'] * 2, ['0.25'] * 2, ['0.125'] * 2, ['0.125'] * 2 + ], + 'max-min': [ + ['1.125'] * 2, ['0.25'] * 2, ['0.125'] * 2, ['0.25'] * 2 + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'min-abs': [ + ['-1.125'] * 2, ['0.125'] * 2, ['0.125'] * 2 + ], + 'max-abs': [ + ['-1.125'] * 2, ['0.125'] * 2, ['1.125'] * 2 + ] + } + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests, 4 assert statements: + assert_return + assert_return_canonical_nan + assert_return_arithmetic_nan + assert_malformed + """ + cases = [] + binary_test_data = [] + unary_test_data = [] + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for p1 in self.FLOAT_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + result = self.floatOp.binary_op(op, p1, p2) + if 'nan' not in result: + # Normal floating point numbers as the results + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + else: + # Since the results contain the 'nan' string, it should be in the + # assert_return_canonical_nan statements + binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + + # assert_return_canonical_nan and assert_return_arithmetic_nan cases + for p1 in self.NAN_NUMBERS: + for p2 in self.FLOAT_NUMBERS: + if 'nan:' in p1 or 'nan:' in p2: + # When the arguments contain 'nan:', always use assert_return_arithmetic_nan + # statements for the cases. Since there 2 parameters for binary operation and + # the order of the parameters matter. Different order makes different cases. + binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p1, p2]) + binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p2, p1]) + else: + # No 'nan' string found, then it should be assert_return_canonical_nan. + binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p2, p1]) + for p2 in self.NAN_NUMBERS: + # Both parameters contain 'nan', then there must be no assert_return. + if 'nan:' in p1 or 'nan:' in p2: + binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p1, p2]) + else: + binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + + for case in binary_test_data: + cases.append(self.single_binary_test(case)) + + # Test opposite signs of zero + lst_oppo_signs_0 = [ + '\n;; Test opposite signs of zero', + [ + 'f64x2.min', + [['0', '0' ], ['+0', '-0']], + [['0', '-0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.min', + [['-0', '+0'], ['+0', '-0']], + [['-0', '-0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.min', + [['-0', '-0'], ['+0', '+0']], + [['-0', '-0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['0', '0'], ['+0', '-0']], + [['0', '0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['-0', '+0'], ['+0', '-0']], + [['0', '0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + [ + 'f64x2.max', + [['-0', '-0'], ['+0', '+0']], + [['+0', '+0']], + ['f64x2', 'f64x2', 'f64x2'] + ], + '\n' + ] + + # Generate test case for opposite signs of zero + for case_data in lst_oppo_signs_0: + + if isinstance(case_data, str): + cases.append(case_data) + continue + + cases.append(str(AssertReturn(case_data[0], + [self.v128_const(case_data[3][0], case_data[1][0]), + self.v128_const(case_data[3][1], case_data[1][1])], + self.v128_const(case_data[3][2], case_data[2][0])))) + + for p in self.FLOAT_NUMBERS: + op_name = self.full_op_name('abs') + result = self.floatOp.unary_op('abs', p) + # Abs operation is valid for all the floating point numbers + unary_test_data.append(['assert_return', op_name, p, result]) + + for case in unary_test_data: + cases.append(self.single_unary_test(case)) + + return '\n'.join(cases) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + txt_test_case = self.get_all_cases() + txt_test_case = txt_test_case.replace('f64x2 arithmetic', 'f64x2 [abs, min, max]') + fp.write(txt_test_case) + + +def gen_test_cases(): + simd_f64x2_case = Simdf64x2Case() + simd_f64x2_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast new file mode 100644 index 0000000000..d08e93f6ae --- /dev/null +++ b/test/core/simd/simd_f64x2.wast @@ -0,0 +1,2425 @@ +;; Tests for f64x2 [abs, min, max] operations on major boundary values and all special values. + + +(module + (func (export "f64x2.min") (param v128 v128) (result v128) (f64x2.min (local.get 0) (local.get 1))) + (func (export "f64x2.max") (param v128 v128) (result v128) (f64x2.max (local.get 0) (local.get 1))) + (func (export "f64x2.abs") (param v128) (result v128) (f64x2.abs (local.get 0))) + ;; f64x2.min const vs const + (func (export "f64x2.min_with_const_0") (result v128) (f64x2.min (v128.const f64x2 0 1) (v128.const f64x2 0 2))) + (func (export "f64x2.min_with_const_1") (result v128) (f64x2.min (v128.const f64x2 2 -3) (v128.const f64x2 1 3))) + (func (export "f64x2.min_with_const_2") (result v128) (f64x2.min (v128.const f64x2 0 1) (v128.const f64x2 0 1))) + (func (export "f64x2.min_with_const_3") (result v128) (f64x2.min (v128.const f64x2 2 3) (v128.const f64x2 2 3))) + (func (export "f64x2.min_with_const_4") (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x02))) + (func (export "f64x2.min_with_const_5") (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x01 2147483648))) + (func (export "f64x2.min_with_const_6") (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x01))) + (func (export "f64x2.min_with_const_7") (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x02 0x80000000))) + ;; f64x2.min param vs const + (func (export "f64x2.min_with_const_9")(param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 0 1))) + (func (export "f64x2.min_with_const_10")(param v128) (result v128) (f64x2.min (v128.const f64x2 2 -3) (local.get 0))) + (func (export "f64x2.min_with_const_11")(param v128) (result v128) (f64x2.min (v128.const f64x2 0 1) (local.get 0))) + (func (export "f64x2.min_with_const_12")(param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 2 3))) + (func (export "f64x2.min_with_const_13")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.min_with_const_14")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.min_with_const_15")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.min_with_const_16")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) + ;; f64x2.max const vs const + (func (export "f64x2.max_with_const_18") (result v128) (f64x2.max (v128.const f64x2 0 1) (v128.const f64x2 0 2))) + (func (export "f64x2.max_with_const_19") (result v128) (f64x2.max (v128.const f64x2 2 -3) (v128.const f64x2 1 3))) + (func (export "f64x2.max_with_const_20") (result v128) (f64x2.max (v128.const f64x2 0 1) (v128.const f64x2 0 1))) + (func (export "f64x2.max_with_const_21") (result v128) (f64x2.max (v128.const f64x2 2 3) (v128.const f64x2 2 3))) + (func (export "f64x2.max_with_const_22") (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x02))) + (func (export "f64x2.max_with_const_23") (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x01 2147483648))) + (func (export "f64x2.max_with_const_24") (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x01))) + (func (export "f64x2.max_with_const_25") (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x02 0x80000000))) + ;; f64x2.max param vs const + (func (export "f64x2.max_with_const_27")(param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 0 1))) + (func (export "f64x2.max_with_const_28")(param v128) (result v128) (f64x2.max (v128.const f64x2 2 -3) (local.get 0))) + (func (export "f64x2.max_with_const_29")(param v128) (result v128) (f64x2.max (v128.const f64x2 0 1) (local.get 0))) + (func (export "f64x2.max_with_const_30")(param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 2 3))) + (func (export "f64x2.max_with_const_31")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.max_with_const_32")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.max_with_const_33")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.max_with_const_34")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) + + (func (export "f64x2.abs_with_const_35") (result v128) (f64x2.abs (v128.const f64x2 -0 -1))) + (func (export "f64x2.abs_with_const_36") (result v128) (f64x2.abs (v128.const f64x2 -2 -3))) + + ;; Test different lanes go through different if-then clauses + (type $vv_v (func (param v128 v128) (result v128))) + (table funcref (elem $f64x2_min $f64x2_max)) + + (func $f64x2_min (type $vv_v) + (f64x2.min (local.get 0) (local.get 1)) + ) + + (func $f64x2_max (type $vv_v) + (f64x2.max (local.get 0) (local.get 1)) + ) + + (func (export "call_indirect_vv_v_f64x2_extract_lane_0") + (param v128 v128 i32) (result f64) + (f64x2.extract_lane 0 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) + (func (export "call_indirect_vv_v_f64x2_extract_lane_1") + (param v128 v128 i32) (result f64) + (f64x2.extract_lane 1 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) + ) + ) +) + +;; f64x2.abs const vs const +(assert_return (invoke "f64x2.min_with_const_0") (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.min_with_const_1") (v128.const f64x2 1 -3)) +(assert_return (invoke "f64x2.min_with_const_2") (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.min_with_const_3") (v128.const f64x2 2 3)) +;; f64x2.abs param vs const +(assert_return (invoke "f64x2.min_with_const_4") (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.min_with_const_5") (v128.const f64x2 0x01 0x80000000)) +(assert_return (invoke "f64x2.min_with_const_6") (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.min_with_const_7") (v128.const f64x2 0x02 0x80000000)) +(assert_return (invoke "f64x2.min_with_const_9" (v128.const f64x2 0 2)) + (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.min_with_const_10" (v128.const f64x2 1 3)) + (v128.const f64x2 1 -3)) +(assert_return (invoke "f64x2.min_with_const_11" (v128.const f64x2 0 1)) + (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.min_with_const_12" (v128.const f64x2 2 3)) + (v128.const f64x2 2 3)) +(assert_return (invoke "f64x2.min_with_const_13" (v128.const f64x2 0x00 0x02)) + (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.min_with_const_14" (v128.const f64x2 0x01 2147483648)) + (v128.const f64x2 0x01 0x80000000)) +(assert_return (invoke "f64x2.min_with_const_15" (v128.const f64x2 0x00 0x01)) + (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.min_with_const_16" (v128.const f64x2 0x02 0x80000000)) + (v128.const f64x2 0x02 0x80000000)) +;; f64x2.abs const vs const +(assert_return (invoke "f64x2.max_with_const_18") (v128.const f64x2 0 2)) +(assert_return (invoke "f64x2.max_with_const_19") (v128.const f64x2 2 3)) +(assert_return (invoke "f64x2.max_with_const_20") (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.max_with_const_21") (v128.const f64x2 2 3)) +;; f64x2.abs param vs const +(assert_return (invoke "f64x2.max_with_const_22") (v128.const f64x2 0x00 0x02)) +(assert_return (invoke "f64x2.max_with_const_23") (v128.const f64x2 0x02 2147483648)) +(assert_return (invoke "f64x2.max_with_const_24") (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.max_with_const_25") (v128.const f64x2 0x02 0x80000000)) +(assert_return (invoke "f64x2.max_with_const_27" (v128.const f64x2 0 2)) + (v128.const f64x2 0 2)) +(assert_return (invoke "f64x2.max_with_const_28" (v128.const f64x2 1 3)) + (v128.const f64x2 2 3)) +(assert_return (invoke "f64x2.max_with_const_29" (v128.const f64x2 0 1)) + (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.max_with_const_30" (v128.const f64x2 2 3)) + (v128.const f64x2 2 3)) +(assert_return (invoke "f64x2.max_with_const_31" (v128.const f64x2 0x00 0x02)) + (v128.const f64x2 0x00 0x02)) +(assert_return (invoke "f64x2.max_with_const_32" (v128.const f64x2 0x01 2147483648)) + (v128.const f64x2 0x02 2147483648)) +(assert_return (invoke "f64x2.max_with_const_33" (v128.const f64x2 0x00 0x01)) + (v128.const f64x2 0x00 0x01)) +(assert_return (invoke "f64x2.max_with_const_34" (v128.const f64x2 0x02 0x80000000)) + (v128.const f64x2 0x02 0x80000000)) + +(assert_return (invoke "f64x2.abs_with_const_35") (v128.const f64x2 0 1)) +(assert_return (invoke "f64x2.abs_with_const_36") (v128.const f64x2 2 3)) + +;; Test different lanes go through different if-then clauses +;; f64x2.min 0 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 nan 0) + (v128.const f64x2 0 1) + (i32.const 0) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 nan 0) + (v128.const f64x2 0 1) + (i32.const 0) + ) + (f64.const 0) +) +;; f64x2.min 1 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 0) + (i32.const 0) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 0) + (i32.const 0) + ) + (f64.const 0) +) +;; f64x2.min 0 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 1) + (i32.const 0) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 1) + (i32.const 0) + ) + (f64.const 1) +) +;; f64x2.max 1 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 nan 0) + (v128.const f64x2 0 1) + (i32.const 1) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 nan 0) + (v128.const f64x2 0 1) + (i32.const 1) + ) + (f64.const 1) +) +;; f64x2.max 0 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 0) + (i32.const 1) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 0) + (i32.const 1) + ) + (f64.const 1) +) +;; f64x2.max 1 +(assert_return_canonical_nan + (invoke "call_indirect_vv_v_f64x2_extract_lane_0" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 1) + (i32.const 1) + ) +) +(assert_return + (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (v128.const f64x2 0 1) + (v128.const f64x2 -nan 1) + (i32.const 1) + ) + (f64.const 1) +) + +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) + +;; Test opposite signs of zero +(assert_return (invoke "f64x2.min" (v128.const f64x2 0 0) + (v128.const f64x2 +0 -0)) + (v128.const f64x2 0 -0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0 +0) + (v128.const f64x2 +0 -0)) + (v128.const f64x2 -0 -0)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -0 -0) + (v128.const f64x2 +0 +0)) + (v128.const f64x2 -0 -0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0 0) + (v128.const f64x2 +0 -0)) + (v128.const f64x2 0 0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0 +0) + (v128.const f64x2 +0 -0)) + (v128.const f64x2 0 0)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -0 -0) + (v128.const f64x2 +0 +0)) + (v128.const f64x2 +0 +0)) + + +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) + +;; type check +(assert_invalid (module (func (result v128) (f64x2.abs (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.min (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.max (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "max-min") (param v128 v128 v128) (result v128) + (f64x2.max (f64x2.min (local.get 0) (local.get 1))(local.get 2))) + (func (export "min-max") (param v128 v128 v128) (result v128) + (f64x2.min (f64x2.max (local.get 0) (local.get 1))(local.get 2))) + (func (export "max-abs") (param v128 v128) (result v128) + (f64x2.max (f64x2.abs (local.get 0)) (local.get 1))) + (func (export "min-abs") (param v128 v128) (result v128) + (f64x2.min (f64x2.abs (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "max-min" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.25 0.25) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 0.25 0.25)) +(assert_return (invoke "min-max" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.25 0.25) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 0.125 0.125)) +(assert_return (invoke "max-abs" (v128.const f64x2 -1.125 -1.125) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 1.125 1.125)) +(assert_return (invoke "min-abs" (v128.const f64x2 -1.125 -1.125) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 0.125 0.125)) \ No newline at end of file From 093ee2faa83676f3da400e604955a2ba21561b72 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Mon, 4 Nov 2019 17:19:08 -0800 Subject: [PATCH 074/378] Update encodings, implementation status --- proposals/simd/BinarySIMD.md | 4 ++++ proposals/simd/ImplementationStatus.md | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 8617d725d2..40b2d011e6 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -131,6 +131,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.add` | `0x79`| - | | `i32x4.sub` | `0x7c`| - | | `i32x4.mul` | `0x7f`| - | +| `i32x4.min_s` | `0x80`| - | +| `i32x4.min_u` | `0x81`| - | +| `i32x4.max_s` | `0x82`| - | +| `i32x4.max_u` | `0x83`| - | | `i64x2.neg` | `0x84`| - | | `i64x2.shl` | `0x87`| - | | `i64x2.shr_s` | `0x88`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 4778d4fa0b..9c5b056120 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -109,6 +109,10 @@ | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | From 8f33792b7537026896f197c240e5270704e84a5d Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Tue, 5 Nov 2019 17:48:43 +0800 Subject: [PATCH 075/378] Addressed comments --- test/core/simd/meta/simd_f64x2.py | 39 +++++++++++++++++-------------- test/core/simd/simd_f64x2.wast | 32 ++++++++++++------------- 2 files changed, 37 insertions(+), 34 deletions(-) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 1d7c53bc7b..5b39b8e42e 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -28,8 +28,8 @@ def gen_test_fn_template(self): # Function template tpl_func = ' (func (export "{}"){} (result v128) ({} {}{}))' - # Const data for min and max - lst_instr_with_const = [ + # Raw data list specific for "const vs const" and "param vs const" tests + const_test_raw_data = [ [ [['0', '1'], ['0', '2']], [['0', '1'], ['0', '2']] @@ -64,8 +64,9 @@ def gen_test_fn_template(self): ] ] - # Assert data - lst_oprt_with_const_assert = {} + # Test data list combined with `const_test_raw_data` and corresponding ops and function names + # specific for "const vs const" and "param vs const" tests + const_test_data = {} # Generate func and assert for op in self.BINARY_OPS: @@ -76,7 +77,7 @@ def gen_test_fn_template(self): template.insert(len(template)-1, ' ;; {} const vs const'.format(op_name)) # Add const vs const cases - for case_data in lst_instr_with_const: + for case_data in const_test_raw_data: func_name = "{}_with_const_{}".format(op_name, len(template)-7) template.insert(len(template)-1, @@ -86,10 +87,10 @@ def gen_test_fn_template(self): ret_idx = 0 if op == 'min' else 1 - if op not in lst_oprt_with_const_assert: - lst_oprt_with_const_assert[op] = [] + if op not in const_test_data: + const_test_data[op] = [] - lst_oprt_with_const_assert[op].append([func_name, case_data[1][ret_idx]]) + const_test_data[op].append([func_name, case_data[1][ret_idx]]) # Add comment for the case script " ;; [f64x2.min, f64x2.max] param vs const" template.insert(len(template)-1, ' ;; {} param vs const'.format(op_name)) @@ -97,7 +98,7 @@ def gen_test_fn_template(self): case_cnt = 0 # Add param vs const cases - for case_data in lst_instr_with_const: + for case_data in const_test_raw_data: func_name = "{}_with_const_{}".format(op_name, len(template)-7) @@ -110,19 +111,17 @@ def gen_test_fn_template(self): func_param_1 = '(local.get 0)' template.insert(len(template)-1, - tpl_func.format(func_name, '(param v128)', op_name, func_param_0, ' ' + func_param_1)) + tpl_func.format(func_name, ' (param v128)', op_name, func_param_0, ' ' + func_param_1)) ret_idx = 0 if op == 'min' else 1 - if op not in lst_oprt_with_const_assert: - lst_oprt_with_const_assert[op] = [] + if op not in const_test_data: + const_test_data[op] = [] - lst_oprt_with_const_assert[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) + const_test_data[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) case_cnt += 1 - # print(lst_oprt_with_const_assert) - # Generate func for abs op_name = self.full_op_name('abs') template.insert(len(template)-1, '') @@ -262,10 +261,10 @@ def gen_test_fn_template(self): lst_diff_lane_vs_clause_assert.append('') # Add test for operations with constant operands - for key in lst_oprt_with_const_assert: + for key in const_test_data: case_cnt = 0 - for case_data in lst_oprt_with_const_assert[key]: + for case_data in const_test_data[key]: # Add comment for the param combination if case_cnt == 0: @@ -294,6 +293,8 @@ def gen_test_fn_template(self): @property def combine_ternary_arith_test_data(self): + # This method overrides the base class method from SimdArithmeticCase + # used for generating test data for min and max combination tests. return { 'min-max': [ ['1.125'] * 2, ['0.25'] * 2, ['0.125'] * 2, ['0.125'] * 2 @@ -305,6 +306,8 @@ def combine_ternary_arith_test_data(self): @property def combine_binary_arith_test_data(self): + # This method overrides the base class method from SimdArithmeticCase + # used for generating test data for min, max and abs combination tests. return { 'min-abs': [ ['-1.125'] * 2, ['0.125'] * 2, ['0.125'] * 2 @@ -440,4 +443,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index d08e93f6ae..22ffa5b86e 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -15,14 +15,14 @@ (func (export "f64x2.min_with_const_6") (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x01))) (func (export "f64x2.min_with_const_7") (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x02 0x80000000))) ;; f64x2.min param vs const - (func (export "f64x2.min_with_const_9")(param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 0 1))) - (func (export "f64x2.min_with_const_10")(param v128) (result v128) (f64x2.min (v128.const f64x2 2 -3) (local.get 0))) - (func (export "f64x2.min_with_const_11")(param v128) (result v128) (f64x2.min (v128.const f64x2 0 1) (local.get 0))) - (func (export "f64x2.min_with_const_12")(param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 2 3))) - (func (export "f64x2.min_with_const_13")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) - (func (export "f64x2.min_with_const_14")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) - (func (export "f64x2.min_with_const_15")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) - (func (export "f64x2.min_with_const_16")(param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.min_with_const_9") (param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 0 1))) + (func (export "f64x2.min_with_const_10") (param v128) (result v128) (f64x2.min (v128.const f64x2 2 -3) (local.get 0))) + (func (export "f64x2.min_with_const_11") (param v128) (result v128) (f64x2.min (v128.const f64x2 0 1) (local.get 0))) + (func (export "f64x2.min_with_const_12") (param v128) (result v128) (f64x2.min (local.get 0) (v128.const f64x2 2 3))) + (func (export "f64x2.min_with_const_13") (param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.min_with_const_14") (param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.min_with_const_15") (param v128) (result v128) (f64x2.min (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.min_with_const_16") (param v128) (result v128) (f64x2.min (v128.const f64x2 0x02 0x80000000) (local.get 0))) ;; f64x2.max const vs const (func (export "f64x2.max_with_const_18") (result v128) (f64x2.max (v128.const f64x2 0 1) (v128.const f64x2 0 2))) (func (export "f64x2.max_with_const_19") (result v128) (f64x2.max (v128.const f64x2 2 -3) (v128.const f64x2 1 3))) @@ -33,14 +33,14 @@ (func (export "f64x2.max_with_const_24") (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (v128.const f64x2 0x00 0x01))) (func (export "f64x2.max_with_const_25") (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (v128.const f64x2 0x02 0x80000000))) ;; f64x2.max param vs const - (func (export "f64x2.max_with_const_27")(param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 0 1))) - (func (export "f64x2.max_with_const_28")(param v128) (result v128) (f64x2.max (v128.const f64x2 2 -3) (local.get 0))) - (func (export "f64x2.max_with_const_29")(param v128) (result v128) (f64x2.max (v128.const f64x2 0 1) (local.get 0))) - (func (export "f64x2.max_with_const_30")(param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 2 3))) - (func (export "f64x2.max_with_const_31")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) - (func (export "f64x2.max_with_const_32")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) - (func (export "f64x2.max_with_const_33")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) - (func (export "f64x2.max_with_const_34")(param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.max_with_const_27") (param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 0 1))) + (func (export "f64x2.max_with_const_28") (param v128) (result v128) (f64x2.max (v128.const f64x2 2 -3) (local.get 0))) + (func (export "f64x2.max_with_const_29") (param v128) (result v128) (f64x2.max (v128.const f64x2 0 1) (local.get 0))) + (func (export "f64x2.max_with_const_30") (param v128) (result v128) (f64x2.max (local.get 0) (v128.const f64x2 2 3))) + (func (export "f64x2.max_with_const_31") (param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.max_with_const_32") (param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) + (func (export "f64x2.max_with_const_33") (param v128) (result v128) (f64x2.max (v128.const f64x2 0x00 0x01) (local.get 0))) + (func (export "f64x2.max_with_const_34") (param v128) (result v128) (f64x2.max (v128.const f64x2 0x02 0x80000000) (local.get 0))) (func (export "f64x2.abs_with_const_35") (result v128) (f64x2.abs (v128.const f64x2 -0 -1))) (func (export "f64x2.abs_with_const_36") (result v128) (f64x2.abs (v128.const f64x2 -2 -3))) From 07a4fe6baff3cbe4ab83ad4c7cbea4ebf81ab288 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 8 Nov 2019 03:34:25 +0800 Subject: [PATCH 076/378] [test] Integrate tests for 64x2 arithmetic ops from WAVM (#135) This PR also centralizes the processing of float-point ops in one file named simd_float_op.py, see WAVM PR: https://github.com/WAVM/WAVM/pull/209 --- test/core/simd/meta/README.md | 2 + test/core/simd/meta/gen_tests.py | 2 + test/core/simd/meta/simd_f32x4.py | 58 +- test/core/simd/meta/simd_f32x4_arith.py | 102 +- test/core/simd/meta/simd_f64x2_arith.py | 204 ++ test/core/simd/meta/simd_f64x2_cmp.py | 51 +- test/core/simd/meta/simd_float_op.py | 198 + test/core/simd/meta/simd_i64x2_arith.py | 177 + test/core/simd/simd_f64x2_arith.wast | 4430 +++++++++++++++++++++++ test/core/simd/simd_i64x2_arith.wast | 575 +++ 10 files changed, 5610 insertions(+), 189 deletions(-) create mode 100644 test/core/simd/meta/simd_f64x2_arith.py create mode 100644 test/core/simd/meta/simd_float_op.py create mode 100644 test/core/simd/meta/simd_i64x2_arith.py create mode 100644 test/core/simd/simd_f64x2_arith.wast create mode 100644 test/core/simd/simd_i64x2_arith.wast diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index d4c202994a..f97295622c 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -12,6 +12,8 @@ Currently it only support following simd test files generation. - 'simd_i16x8_arith.wast' - 'simd_i32x4_arith.wast' - 'simd_f32x4_arith.wast' +- 'simd_i64x2_arith.wast' +- 'simd_f64x2_arith.wast' - 'simd_bitwise.wast' - 'simd_i8x16_sat_arith.wast' - 'simd_i16x8_sat_arith.wast' diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index b9f17a7409..48a67c4b3a 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -18,6 +18,8 @@ 'simd_i16x8_arith', 'simd_i32x4_arith', 'simd_f32x4_arith', + 'simd_i64x2_arith', + 'simd_f64x2_arith', 'simd_sat_arith', 'simd_bitwise', 'simd_f32x4', diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 653df97b4e..cd8f64b751 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -5,63 +5,15 @@ """ from simd_f32x4_arith import Simdf32x4ArithmeticCase +from simd_float_op import FloatingPointSimpleOp from simd import SIMD from test_assert import AssertReturn -def binary_op(op: str, p1: str, p2: str) -> str: - """Binary operation on p1 and p2 with the operation specified by op - - :param op: min, max, - :param p1: float number in hex - :param p2: float number in hex - :return: - """ - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) - - if '-nan' in [p1, p2] and 'nan' in [p1, p2]: - return p1 - - if 'nan' in [p1, p2]: - return 'nan' - - if '-nan' in [p1, p2]: - return '-nan' - - if op == 'min': - if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: - return '-0x0p+0' - result = min(f1, f2) - - elif op == 'max': - if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: - return '0x0p+0' - result = max(f1, f2) - - else: - raise Exception('Unknown binary operation: {}'.format(op)) - - return result.hex() - - -def unary_op(op: str, p1: str) -> str: - """Unnary operation on p1 with the operation specified by op - - :param op: abs, - :param p1: float number in hex - :return: - """ - f1 = float.fromhex(p1) - if op == 'abs': - return abs(f1).hex() - - raise Exception('Unknown unary operation: {}'.format(op)) - - class Simdf32x4Case(Simdf32x4ArithmeticCase): UNARY_OPS = ('abs',) BINARY_OPS = ('min', 'max',) + floatOp = FloatingPointSimpleOp() FLOAT_NUMBERS = ( '0x0p+0', '-0x0p+0', '0x1p-149', '-0x1p-149', '0x1p-126', '-0x1p-126', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', @@ -367,7 +319,7 @@ def get_normal_case(self): op_name = self.full_op_name(op) for p1 in self.FLOAT_NUMBERS: for p2 in self.FLOAT_NUMBERS: - result = binary_op(op, p1, p2) + result = self.floatOp.binary_op(op, p1, p2) if 'nan' not in result: # Normal floating point numbers as the results binary_test_data.append(['assert_return', op_name, p1, p2, result]) @@ -443,7 +395,7 @@ def get_normal_case(self): for p in self.FLOAT_NUMBERS: op_name = self.full_op_name('abs') - result = unary_op('abs', p) + result = self.floatOp.unary_op('abs', p) # Abs operation is valid for all the floating point numbers unary_test_data.append(['assert_return', op_name, p, result]) @@ -486,4 +438,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py index cd98cf289a..720f57877c 100644 --- a/test/core/simd/meta/simd_f32x4_arith.py +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -4,100 +4,21 @@ Generate f32x4 floating-point arithmetic operation cases. """ -import math from simd_arithmetic import SimdArithmeticCase +from simd_float_op import FloatingPointArithOp -def binary_op(op: str, p1: str, p2: str) -> str: - """Binary operation on p1 and p2 with the operation specified by op - - :param op: add, sub, mul, - :param p1: float number in hex - :param p2: float number in hex - :return: - """ - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) - if op == 'add': - if 'inf' in p1 and 'inf' in p2 and p1 != p2: - return '-nan' - result = f1 + f2 - - elif op == 'sub': - if 'inf' in p1 and 'inf' in p2 and p1 == p2: - return '-nan' - result = f1 - f2 - - elif op == 'mul': - if '0x0p+0' in p1 and 'inf' in p2 or 'inf' in p1 and '0x0p+0' in p2: - return '-nan' - result = f1 * f2 - - elif op == 'div': - if '0x0p+0' in p1 and '0x0p+0' in p2: - return '-nan' - if 'inf' in p1 and 'inf' in p2: - return '-nan' - - try: - result = f1 / f2 - return get_valid_float(result) - except ZeroDivisionError: - if p1[0] == p2[0]: - return 'inf' - elif p1 == 'inf' and p2 == '0x0p+0': - return 'inf' - else: - return '-inf' - - else: - raise Exception('Unknown binary operation') - - return get_valid_float(result) - - -def get_valid_float(value): - if value > float.fromhex('0x1.fffffep+127'): - return 'inf' - if value < float.fromhex('-0x1.fffffep+127'): - return '-inf' - return value.hex() - - -def float_sqrt(p): - if p == '-0x0p+0': - return '-0x0p+0' - - try: - p = float.fromhex(p) - result = float.hex(math.sqrt(p)) - except ValueError: - result = '-nan' - - return result - - -def float_neg(p): - if p == 'nan': - return '-nan' - try: - p = float.fromhex(p) - result = float.hex(-p) - except ValueError: - if p.startswith('nan:'): - return '-' + p - if p.startswith('-nan:'): - return p[1:] - - return result +class F32ArithOp(FloatingPointArithOp): + maximum = '0x1.fffffep+127' class Simdf32x4ArithmeticCase(SimdArithmeticCase): LANE_LEN = 4 LANE_TYPE = 'f32x4' + floatOp = F32ArithOp() UNARY_OPS = ('neg', 'sqrt') - BINARY_OPS = ('add', 'sub', 'mul', 'div',) + BINARY_OPS = ('add', 'sub', 'mul', 'div') FLOAT_NUMBERS = ( '0x0p+0', '-0x0p+0', '0x1p-149', '-0x1p-149', '0x1p-126', '-0x1p-126', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', @@ -250,7 +171,7 @@ def get_normal_case(self): op_name = self.full_op_name(op) for p1 in self.FLOAT_NUMBERS: for p2 in self.FLOAT_NUMBERS: - result = binary_op(op, p1, p2) + result = self.floatOp.binary_op(op, p1, p2) if 'nan' not in result: # Normal floating point numbers as the results binary_test_data.append(['assert_return', op_name, p1, p2, result]) @@ -290,7 +211,7 @@ def get_normal_case(self): else: # Normal floating point numbers for sqrt operation op_name = self.full_op_name('sqrt') - result = float_sqrt(p) + result = self.floatOp.float_sqrt(p) if 'nan' not in result: # Get the sqrt value correctly unary_test_data.append(['assert_return', op_name, p, result]) @@ -300,7 +221,7 @@ def get_normal_case(self): for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS: op_name = self.full_op_name('neg') - result = float_neg(p) + result = self.floatOp.float_neg(p) # Neg operation is valid for all the floating point numbers unary_test_data.append(['assert_return', op_name, p, result]) @@ -363,9 +284,10 @@ def mixed_nan_test(self, cases): cases.append(template.format( 'assert_return_arithmetic_nan', test_type, i)) else: - cases.append('({} (invoke "f32x4_extract_lane_{}_{}") '.format( - 'assert_return', test_type, i) + - '(f32.const {}))'.format(result)) + cases.append(''.join([ + '({} (invoke "f32x4_extract_lane_{}_{}") '.format( + 'assert_return', test_type, i), + '(f32.const {}))'.format(result)])) def gen_test_cases(): diff --git a/test/core/simd/meta/simd_f64x2_arith.py b/test/core/simd/meta/simd_f64x2_arith.py new file mode 100644 index 0000000000..b565d7e3ba --- /dev/null +++ b/test/core/simd/meta/simd_f64x2_arith.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python3 + +""" +Generate f32x4 floating-point arithmetic operation cases. +""" + +from simd_f32x4_arith import Simdf32x4ArithmeticCase +from simd_float_op import FloatingPointArithOp + + +class F64ArithOp(FloatingPointArithOp): + maximum = '0x1.fffffffffffffp+1023' + + +class Simdf64x2ArithmeticCase(Simdf32x4ArithmeticCase): + + LANE_LEN = 2 + LANE_TYPE = 'f64x2' + + floatOp = F64ArithOp() + + FLOAT_NUMBERS = ( + '0x0p+0', '-0x0p+0', '0x1p-1022', '-0x1p-1022', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', + '0x1.921fb54442d18p+2', '-0x1.921fb54442d18p+2', '0x1.fffffffffffffp+1023', '-0x1.fffffffffffffp+1023', + '0x0.0000000000001p-1022', '0x0.0000000000001p-1022', 'inf', '-inf' + ) + + NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') + + @staticmethod + def v128_const(lane, val): + return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * 2)) + + @property + def combine_ternary_arith_test_data(self): + return { + 'add-sub': [ + ['1.125'] * 2, ['0.25'] * 2, ['0.125'] * 2, ['1.0'] * 2 + ], + 'sub-add': [ + ['1.125'] * 2, ['0.25'] * 2, ['0.125'] * 2, ['1.25'] * 2 + ], + 'mul-add': [ + ['1.25'] * 2, ['0.25'] * 2, ['0.25'] * 2, ['0.375'] * 2 + ], + 'mul-sub': [ + ['1.125'] * 2, ['0.125'] * 2, ['0.25'] * 2, ['0.25'] * 2 + ], + 'div-add': [ + ['1.125'] * 2, ['0.125'] * 2, ['0.25'] * 2, ['5.0'] * 2 + ], + 'div-sub': [ + ['1.125'] * 2, ['0.125'] * 2, ['0.25'] * 2, ['4.0'] * 2 + ], + 'mul-div': [ + ['1.125'] * 2, ['0.125'] * 2, ['0.25'] * 2, ['2.25'] * 2 + ], + 'div-mul': [ + ['1.125'] * 2, ['4'] * 2, ['0.25'] * 2, ['18.0'] * 2 + ] + } + + @property + def combine_binary_arith_test_data(self): + return { + 'add-neg': [ + ['1.125'] * 2, ['0.125'] * 2, ['-1.0'] * 2 + ], + 'sub-neg': [ + ['1.125'] * 2, ['0.125'] * 2, ['-1.25'] * 2 + ], + 'mul-neg': [ + ['1.5'] * 2, ['0.25'] * 2, ['-0.375'] * 2 + ], + 'div-neg': [ + ['1.5'] * 2, ['0.25'] * 2, ['-6'] * 2 + ], + 'add-sqrt': [ + ['2.25'] * 2, ['0.25'] * 2, ['1.75'] * 2 + ], + 'sub-sqrt': [ + ['2.25'] * 2, ['0.25'] * 2, ['1.25'] * 2 + ], + 'mul-sqrt': [ + ['2.25'] * 2, ['0.25'] * 2, ['0.375'] * 2 + ], + 'div-sqrt': [ + ['2.25'] * 2, ['0.25'] * 2, ['6'] * 2 + ] + } + + def get_normal_case(self): + return super().get_normal_case().replace('nan_f32x4', 'nan_f64x2') + + def get_invalid_cases(self): + return super().get_invalid_cases().replace('32', '64') + + @property + def mixed_sqrt_nan_test_data(self): + return { + 'neg': [ + ['nan', '1.0', 'nan', '-1.0'], + ], + 'sqrt': [ + ['4.0', '-nan', '2.0', 'nan'], + ], + 'add': [ + ['nan 1.0', '-1.0 1.0', 'nan', '2.0'], + ], + 'sub': [ + ['1.0 -1.0', '-nan 1.0', 'nan', '-2.0'], + ], + 'mul': [ + ['1.0 2.0', 'nan 2.0', 'nan', '4.0'], + ], + 'div': [ + ['6.0 nan', '3.0 -nan', '2.0', 'nan'] + ] + } + + def mixed_nan_test(self, cases): + """Mask the mixed nan tests of simd_f32x4_arith as we'll use + call_indirect.""" + test_data_lines = [ + '\n;; Mixed f64x2 tests when some lanes are NaNs', + '(module', + ' (type $v_v (func (param v128) (result v128)))', + ' (type $vv_v (func (param v128 v128) (result v128)))', + ' (table funcref (elem {}))\n'.format( + ' '.join(['$64x2_' + op for op in self.UNARY_OPS + self.BINARY_OPS])) + + ] + for op in self.UNARY_OPS: + test_data_lines.append( + ' (func $64x2_{op} (type $v_v) (f64x2.{op} (local.get 0)))'.format(op=op) + ) + for op in self.BINARY_OPS: + test_data_lines.append( + ' (func $64x2_{op} (type $vv_v) (f64x2.{op} (local.get 0) (local.get 1)))'.format(op=op) + ) + test_data_lines.append('') + for index in range(2): + test_data_lines.extend([ + ' (func (export "call_indirect_v_v_f64x2_extract_lane_{i}")'.format(i=index), + ' (param v128 i32) (result f64)', + ' (f64x2.extract_lane {i}'.format(i=index), + ' (call_indirect (type $v_v) (local.get 0) (local.get 1))))']) + test_data_lines.extend([ + ' (func (export "call_indirect_vv_v_f64x2_extract_lane_{i}")'.format(i=index), + ' (param v128 v128 i32) (result f64)', + ' (f64x2.extract_lane {i}'.format(i=index), + ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))))']) + + test_data_lines.append(')') + + for index, op in enumerate(self.UNARY_OPS): + data_set = self.mixed_sqrt_nan_test_data.get(op) + for data in data_set: + for i in range(2): + if 'nan' in data[i + 2]: + test_data_lines.append(''.join([ + '(assert_return_canonical_nan ', + '(invoke "call_indirect_v_v_f64x2_extract_lane_{i}" '.format(i=i), + '(v128.const f64x2 {p}) (i32.const {index})))'.format( + p=' '.join(data[:2]), index=index) + ])) + else: + test_data_lines.append(''.join([ + '(assert_return ', + '(invoke "call_indirect_v_v_f64x2_extract_lane_{i}" '.format(i=i), + '(v128.const f64x2 {p}) (i32.const {index})) (f64.const {r}))'.format( + p=' '.join(data[:2]), index=index, r=data[i + 2]) + ])) + + for index, op in enumerate(self.BINARY_OPS, start=2): + data_set = self.mixed_sqrt_nan_test_data.get(op) + for data in data_set: + for i in range(2): + if 'nan' in data[i + 2]: + test_data_lines.append(''.join([ + '(assert_return_canonical_nan ', + '(invoke "call_indirect_vv_v_f64x2_extract_lane_{i}" '.format(i=i), + '(v128.const f64x2 {p1}) (v128.const f64x2 {p2}) (i32.const {index})))'.format( + p1=data[0], p2=data[1], index=index) + ])) + else: + test_data_lines.append(''.join([ + '(assert_return ', + '(invoke "call_indirect_vv_v_f64x2_extract_lane_{i}" '.format(i=i), + '(v128.const f64x2 {p1}) (v128.const f64x2 {p2}) (i32.const {index})) '.format( + p1=data[0], p2=data[1], index=index), + ' (f64.const {r}))'.format(r=data[i + 2]) + ])) + + cases.extend(test_data_lines) + + +def gen_test_cases(): + simd_f64x2_arith = Simdf64x2ArithmeticCase() + simd_f64x2_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f64x2_cmp.py b/test/core/simd/meta/simd_f64x2_cmp.py index a286f3fe26..63f5c2f59a 100644 --- a/test/core/simd/meta/simd_f64x2_cmp.py +++ b/test/core/simd/meta/simd_f64x2_cmp.py @@ -10,49 +10,7 @@ """ from simd_arithmetic import SimdArithmeticCase - - -def binary_op(op: str, p1: str, p2: str) -> str: - """Binary operation on p1 and p2 with the operation specified by op - - :param op: eq, ne, lt, le, gt, ge - :param p1: float number in hex - :param p2: float number in hex - :return: - """ - - # ne - # if either p1 or p2 is a NaN, then return True - if op == 'ne' and ('nan' in p1.lower() or 'nan' in p2.lower()): - return '-1' - - # other instructions - # if either p1 or p2 is a NaN, then return False - if 'nan' in p1.lower() or 'nan' in p2.lower(): - return '0' - - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) - - if op == 'eq': - return '-1' if f1 == f2 else '0' - - elif op == 'ne': - return '-1' if f1 != f2 else '0' - - elif op == 'lt': - return '-1' if f1 < f2 else '0' - - elif op == 'le': - return '-1' if f1 <= f2 else '0' - - elif op == 'gt': - return '-1' if f1 > f2 else '0' - - elif op == 'ge': - return '-1' if f1 >= f2 else '0' - else: - raise Exception('Unknown binary operation') +from simd_float_op import FloatingPointCmpOp class Simdf64x2CmpCase(SimdArithmeticCase): @@ -61,6 +19,7 @@ class Simdf64x2CmpCase(SimdArithmeticCase): UNARY_OPS = () BINARY_OPS = ('eq', 'ne', 'lt', 'le', 'gt', 'ge',) + floatOp = FloatingPointCmpOp() FLOAT_NUMBERS_SPECIAL = ('0x1p-1074', '-inf', '0x1.921fb54442d18p+2', '0x1p+0', '-0x1.fffffffffffffp+1023', '-0x0p+0', '-0x1p-1', '0x1.fffffffffffffp+1023', @@ -256,19 +215,19 @@ def get_normal_case(self): op_name = self.full_op_name(op) for p1 in self.FLOAT_NUMBERS_SPECIAL: for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: - result = binary_op(op, p1, p2) + result = self.floatOp.binary_op(op, p1, p2) binary_test_data.append(['assert_return', op_name, p1, p2, result]) for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: - result = binary_op(op, p1, p2) + result = self.floatOp.binary_op(op, p1, p2) binary_test_data.append(['assert_return', op_name, p1, p2, result]) for op in self.BINARY_OPS: op_name = self.full_op_name(op) for p1 in self.FLOAT_NUMBERS_NORMAL: for p2 in self.FLOAT_NUMBERS_NORMAL: - result = binary_op(op, p1, p2) + result = self.floatOp.binary_op(op, p1, p2) binary_test_data.append(['assert_return', op_name, p1, p2, result]) for case in binary_test_data: diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py new file mode 100644 index 0000000000..0b595ba8d6 --- /dev/null +++ b/test/core/simd/meta/simd_float_op.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python3 + +"""Common floating-point number operations for f32x4 and f64x2""" + +from abc import abstractmethod +import math + + +class FloatingPointOp: + + maximum = None + + @abstractmethod + def binary_op(self, op: str, p1: str, p2: str) -> str: + pass + + +class FloatingPointArithOp(FloatingPointOp): + """Common arithmetic ops for both f32x4 and f64x2: + neg, sqrt, add, sub, mul, div + """ + + def binary_op(self, op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: add, sub, mul, div + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + if op == 'add': + if 'inf' in p1 and 'inf' in p2 and p1 != p2: + return '-nan' + result = f1 + f2 + + elif op == 'sub': + if 'inf' in p1 and 'inf' in p2 and p1 == p2: + return '-nan' + result = f1 - f2 + + elif op == 'mul': + if '0x0p+0' in p1 and 'inf' in p2 or 'inf' in p1 and '0x0p+0' in p2: + return '-nan' + result = f1 * f2 + + elif op == 'div': + if '0x0p+0' in p1 and '0x0p+0' in p2: + return '-nan' + if 'inf' in p1 and 'inf' in p2: + return '-nan' + + try: + result = f1 / f2 + return self.get_valid_float(result, self.maximum) + except ZeroDivisionError: + if p1[0] == p2[0]: + return 'inf' + elif p1 == 'inf' and p2 == '0x0p+0': + return 'inf' + else: + return '-inf' + + else: + raise Exception('Unknown binary operation') + + return self.get_valid_float(result, self.maximum) + + def get_valid_float(self, value, maximum_literals): + if value > float.fromhex(maximum_literals): + return 'inf' + if value < float.fromhex('-' + maximum_literals): + return '-inf' + return value.hex() + + def float_sqrt(self, p): + if p == '-0x0p+0': + return '-0x0p+0' + + try: + p = float.fromhex(p) + result = float.hex(math.sqrt(p)) + except ValueError: + result = '-nan' + + return result + + def float_neg(self, p): + if p == 'nan': + return '-nan' + try: + p = float.fromhex(p) + result = float.hex(-p) + except ValueError: + if p.startswith('nan:'): + return '-' + p + if p.startswith('-nan:'): + return p[1:] + + return result + + +class FloatingPointSimpleOp(FloatingPointOp): + """Common simple ops for both f32x4 and f64x2: abs, min, max""" + + def binary_op(self, op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: min, max, + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + + if '-nan' in [p1, p2] and 'nan' in [p1, p2]: + return p1 + + if 'nan' in [p1, p2]: + return 'nan' + + if '-nan' in [p1, p2]: + return '-nan' + + if op == 'min': + if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: + return '-0x0p+0' + result = min(f1, f2) + + elif op == 'max': + if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: + return '0x0p+0' + result = max(f1, f2) + + else: + raise Exception('Unknown binary operation: {}'.format(op)) + + return result.hex() + + def unary_op(self, op: str, p1: str) -> str: + """Unnary operation on p1 with the operation specified by op + + :param op: abs, + :param p1: float number in hex + :return: + """ + f1 = float.fromhex(p1) + if op == 'abs': + return abs(f1).hex() + + raise Exception('Unknown unary operation: {}'.format(op)) + + +class FloatingPointCmpOp(FloatingPointOp): + + def binary_op(self, op: str, p1: str, p2: str) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: eq, ne, lt, le, gt, ge + :param p1: float number in hex + :param p2: float number in hex + :return: + """ + + # ne + # if either p1 or p2 is a NaN, then return True + if op == 'ne' and ('nan' in p1.lower() or 'nan' in p2.lower()): + return '-1' + + # other instructions + # if either p1 or p2 is a NaN, then return False + if 'nan' in p1.lower() or 'nan' in p2.lower(): + return '0' + + f1 = float.fromhex(p1) + f2 = float.fromhex(p2) + + if op == 'eq': + return '-1' if f1 == f2 else '0' + + elif op == 'ne': + return '-1' if f1 != f2 else '0' + + elif op == 'lt': + return '-1' if f1 < f2 else '0' + + elif op == 'le': + return '-1' if f1 <= f2 else '0' + + elif op == 'gt': + return '-1' if f1 > f2 else '0' + + elif op == 'ge': + return '-1' if f1 >= f2 else '0' + else: + raise Exception('Unknown binary operation') \ No newline at end of file diff --git a/test/core/simd/meta/simd_i64x2_arith.py b/test/core/simd/meta/simd_i64x2_arith.py new file mode 100644 index 0000000000..898ea8b90d --- /dev/null +++ b/test/core/simd/meta/simd_i64x2_arith.py @@ -0,0 +1,177 @@ +#!/usr/bin/env python3 + +""" +Generate i64x2 integer arithmetic operation cases. +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdI64x2ArithmeticCase(SimdArithmeticCase): + + LANE_LEN = 2 + LANE_TYPE = 'i64x2' + + @property + def hex_binary_op_test_data(self): + return [ + ('0x3fffffffffffffff', '0x4000000000000000'), + ('0x4000000000000000', '0x4000000000000000'), + ('-0x3fffffffffffffff', '-0x40000000fffffff'), + ('-0x4000000000000000', '-0x400000000000000'), + ('-0x4000000000000000', '-0x400000000000001'), + ('0x7fffffffffffffff', '0x7ffffffffffffff'), + ('0x7fffffffffffffff', '0x01'), + ('0x8000000000000000', '-0x01'), + ('0x7fffffffffffffff', '0x8000000000000000'), + ('0x8000000000000000', '0x8000000000000000'), + ('0xffffffffffffffff', '0x01'), + ('0xffffffffffffffff', '0xffffffffffffffff') + ] + + @property + def hex_unary_op_test_data(self): + return ['0x01', '-0x01', '-0x8000000000000000', '-0x7fffffffffffffff', + '0x7fffffffffffffff', '0x8000000000000000', '0xffffffffffffffff'] + + @property + def i64x2_i8x16_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [['0x7fffffffffffffff', ['0', '0', '0', '0', '0', '0', '0', '0x80'] * 2], '-1', + ['i64x2', 'i8x16', 'i64x2']], + [['1', '255'], '0', ['i64x2', 'i8x16', 'i64x2']] + ], + 'i64x2.sub': [ + [['0x7fffffffffffffff', ['0', '0', '0', '0', '0', '0', '0', '0x80'] * 2], '-1', + ['i64x2', 'i8x16', 'i64x2']], + [['1', '255'], '2', ['i64x2', 'i8x16', 'i64x2']] + ], + 'i64x2.mul': [ + [['0x8000000000000000', '0x2'], '0', ['i64x2', 'i8x16', 'i64x2']], + [['0xffffffffffffffff', '255'], '1', ['i64x2', 'i8x16', 'i64x2']] + ] + } + + @property + def i64x2_i16x8_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [['0x7fffffffffffffff', ['0', '0', '0', '0x8000'] * 2], '-1', ['i64x2', 'i16x8', 'i64x2']], + [['1', '0xffff'], '0', ['i64x2', 'i16x8', 'i64x2']] + ], + 'i64x2.sub': [ + [['0x7fffffffffffffff', ['0', '0', '0', '0x8000'] * 2], '-1', ['i64x2', 'i16x8', 'i64x2']], + [['1', '0xffff'], '2', ['i64x2', 'i16x8', 'i64x2']] + ], + 'i64x2.mul': [ + [['0x8000000000000000', ['0', '0', '0', '0x02'] * 4], '0', ['i64x2', 'i16x8', 'i64x2']], + [['0xffffffffffffffff', '0xffff'], '1', ['i64x2', 'i16x8', 'i64x2']] + ] + } + + @property + def i64x2_i32x4_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [['0x7fffffffffffffff', ['0', '0x80000000'] * 2], '-1', ['i64x2', 'i32x4', 'i64x2']], + [['1', '0xffffffff'], '0', ['i64x2', 'i32x4', 'i64x2']] + ], + 'i64x2.sub': [ + [['0x7fffffffffffffff', ['0', '0x80000000'] * 2], '-1', ['i64x2', 'i32x4', 'i64x2']], + [['1', '0xffffffff'], '2', ['i64x2', 'i32x4', 'i64x2']] + ], + 'i64x2.mul': [ + [['0x8000000000000000', ['0', '0x02'] * 2], '0', ['i64x2', 'i32x4', 'i64x2']], + [['0xffffffffffffffff', '0xffffffff'], '1', ['i64x2', 'i32x4', 'i64x2']] + ] + } + + @property + def i64x2_f64x2_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [['0x8000000000000000', '+0.0'], '0x8000000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '-0.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '1.0'], '0xbff0000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '-1.0'], '0x3ff0000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['1', '+inf'], '0x7ff0000000000001', ['i64x2', 'f64x2', 'i64x2']], + [['1', '-inf'], '0xfff0000000000001', ['i64x2', 'f64x2', 'i64x2']], + [['1', 'nan'], '0x7ff8000000000001', ['i64x2', 'f64x2', 'i64x2']] + ], + 'i64x2.sub': [ + [['0x8000000000000000', '+0.0'], '0x8000000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '-0.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '1.0'], '0x4010000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x8000000000000000', '-1.0'], '0xc010000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', '+inf'], '0x8010000000000001', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', '-inf'], '0x0010000000000001', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', 'nan'], '0x8008000000000001', ['i64x2', 'f64x2', 'i64x2']] + ], + 'i64x2.mul': [ + [['0x80000000', '+0.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x80000000', '-0.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x80000000', '1.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x80000000', '-1.0'], '0', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', '+inf'], '0x7ff0000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', '-inf'], '0xfff0000000000000', ['i64x2', 'f64x2', 'i64x2']], + [['0x1', 'nan'], '0x7ff8000000000000', ['i64x2', 'f64x2', 'i64x2']] + ] + } + + @property + def combine_dec_hex_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [[['0', '1'], ['0', '0xffffffffffffffff']], ['0'] * 2, ['i64x2'] * 3] + ], + 'i64x2.sub': [ + [[['0', '1'], ['0', '0xffffffffffffffff']], ['0', '0x02'], ['i64x2'] * 3] + ], + 'i64x2.mul': [ + [[['0', '1'], ['0', '0xffffffffffffffff']], ['0', '0xffffffffffffffff'], ['i64x2'] * 3] + ] + } + + @property + def range_test_data(self): + """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" + return { + 'i64x2.add': [ + [[[str(i) for i in range(2)], [str(i * 2) for i in range(2)]], + [str(i * 3) for i in range(2)], ['i64x2'] * 3] + ], + 'i64x2.sub': [ + [[[str(i) for i in range(2)], [str(i * 2) for i in range(2)]], + [str(-i) for i in range(2)], ['i64x2'] * 3] + ], + 'i64x2.mul': [ + [[[str(i) for i in range(2)], [str(i * 2) for i in range(4)]], + ['0', '0x02'], ['i64x2'] * 3] + ] + } + + @property + def full_bin_test_data(self): + return [ + self.i64x2_i8x16_test_data, + self.i64x2_i16x8_test_data, + self.i64x2_i32x4_test_data, + self.i64x2_f64x2_test_data, + self.combine_dec_hex_test_data, + self.range_test_data + ] + + +def gen_test_cases(): + simd_i64x2_arith = SimdI64x2ArithmeticCase() + simd_i64x2_arith.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/simd_f64x2_arith.wast b/test/core/simd/simd_f64x2_arith.wast new file mode 100644 index 0000000000..5603406706 --- /dev/null +++ b/test/core/simd/simd_f64x2_arith.wast @@ -0,0 +1,4430 @@ +;; Tests for f64x2 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "f64x2.add") (param v128 v128) (result v128) (f64x2.add (local.get 0) (local.get 1))) + (func (export "f64x2.sub") (param v128 v128) (result v128) (f64x2.sub (local.get 0) (local.get 1))) + (func (export "f64x2.mul") (param v128 v128) (result v128) (f64x2.mul (local.get 0) (local.get 1))) + (func (export "f64x2.div") (param v128 v128) (result v128) (f64x2.div (local.get 0) (local.get 1))) + (func (export "f64x2.neg") (param v128) (result v128) (f64x2.neg (local.get 0))) + (func (export "f64x2.sqrt") (param v128) (result v128) (f64x2.sqrt (local.get 0))) +) + +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1021 0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1021 -0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b21fb54442d18p+2 0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.721fb54442d18p+2 -0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.721fb54442d18p+2 0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.b21fb54442d18p+2 -0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d21fb54442d18p+2 0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.521fb54442d18p+2 -0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.521fb54442d18p+2 0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.d21fb54442d18p+2 -0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.b21fb54442d18p+2 0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.721fb54442d18p+2 0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.d21fb54442d18p+2 0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.521fb54442d18p+2 0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+3 0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.721fb54442d18p+2 -0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.b21fb54442d18p+2 -0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.521fb54442d18p+2 -0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.d21fb54442d18p+2 -0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+3 -0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf))) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1021 0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.fffffffffffffp-1022 0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.fffffffffffffp-1022 0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1021 -0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000001p-1022 -0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000001p-1022 -0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.721fb54442d18p+2 -0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b21fb54442d18p+2 0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.b21fb54442d18p+2 -0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.721fb54442d18p+2 0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.8000000000000p+0 0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.521fb54442d18p+2 -0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d21fb54442d18p+2 0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.8000000000000p+0 -0x1.8000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.d21fb54442d18p+2 -0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.521fb54442d18p+2 0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.721fb54442d18p+2 0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.b21fb54442d18p+2 0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.521fb54442d18p+2 0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.d21fb54442d18p+2 0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+3 0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.b21fb54442d18p+2 -0x1.b21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.721fb54442d18p+2 -0x1.721fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.d21fb54442d18p+2 -0x1.d21fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.521fb54442d18p+2 -0x1.521fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+3 -0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.fffffffffffffp-1022 -0x0.fffffffffffffp-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000001p-1022 0x1.0000000000001p-1022)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf))) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.8000000000000p-1022 0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.8000000000000p-1022 -0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p-1020 0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p-1020 -0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1 0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1 -0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.8000000000000p-1022 -0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.8000000000000p-1022 0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p-1020 -0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p-1020 0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1 -0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1 0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.8000000000000p-1022 0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.8000000000000p-1022 -0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-2 0x1.0000000000000p-2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-2 -0x1.0000000000000p-2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+1 0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+1 -0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1022 0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1022 -0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.8000000000000p-1022 -0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.8000000000000p-1022 0x0.8000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-2 -0x1.0000000000000p-2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-2 0x1.0000000000000p-2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+1 -0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+1 0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1022 -0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1022 0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p-1020 0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p-1020 -0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+1 0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+1 -0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.3bd3cc9be45dep+5 0x1.3bd3cc9be45dep+5)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.3bd3cc9be45dep+5 -0x1.3bd3cc9be45dep+5)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000006p-1022 0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000006p-1022 0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p-1020 -0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p-1020 0x1.921fb54442d18p-1020)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+1 -0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+1 0x1.921fb54442d18p+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.3bd3cc9be45dep+5 -0x1.3bd3cc9be45dep+5)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.3bd3cc9be45dep+5 0x1.3bd3cc9be45dep+5)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000006p-1022 -0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000006p-1022 -0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1 0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1 -0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1022 0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1022 -0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp-51 0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp-51 0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1 -0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1 0x1.fffffffffffffp+1)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1022 -0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1022 0x1.fffffffffffffp+1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp-51 -0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp-51 -0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000006p-1022 0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0000000000006p-1022 -0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp-51 0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp-51 -0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000006p-1022 0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0000000000006p-1022 -0x0.0000000000006p-1022)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp-51 0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp-51 -0x1.fffffffffffffp-51)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1021 0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1021 -0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.28be60db93910p-1022 0x0.28be60db93910p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.28be60db93910p-1022 -0x0.28be60db93910p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+52 0x1.0000000000000p+52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+52 0x1.0000000000000p+52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1021 -0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1021 0x1.0000000000000p-1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.28be60db93910p-1022 -0x0.28be60db93910p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.28be60db93910p-1022 0x0.28be60db93910p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+52 -0x1.0000000000000p+52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+52 -0x1.0000000000000p+52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+1021 0x1.0000000000000p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+1021 -0x1.0000000000000p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c883p-4 0x1.45f306dc9c883p-4)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c883p-4 -0x1.45f306dc9c883p-4)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.2000000000000p-1022 0x0.2000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.2000000000000p-1022 -0x0.2000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+1021 -0x1.0000000000000p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+1021 0x1.0000000000000p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c883p-4 -0x1.45f306dc9c883p-4)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c883p-4 0x1.45f306dc9c883p-4)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.2000000000000p-1022 -0x0.2000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.2000000000000p-1022 0x0.2000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+1022 0x1.0000000000000p+1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+1022 -0x1.0000000000000p+1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c883p-3 0x1.45f306dc9c883p-3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c883p-3 -0x1.45f306dc9c883p-3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.4000000000000p-1022 0x0.4000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.4000000000000p-1022 -0x0.4000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+1022 -0x1.0000000000000p+1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+1022 0x1.0000000000000p+1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+1 -0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+1 0x1.0000000000000p+1)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c883p-3 -0x1.45f306dc9c883p-3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c883p-3 0x1.45f306dc9c883p-3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.4000000000000p-1022 -0x0.4000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.4000000000000p-1022 0x0.4000000000000p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+3 0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+3 -0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d19p-1022 0x1.921fb54442d19p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d19p-1022 -0x1.921fb54442d19p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+3 -0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+3 0x1.921fb54442d18p+3)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d19p-1022 -0x1.921fb54442d19p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d19p-1022 0x1.921fb54442d19p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c882p+1021 0x1.45f306dc9c882p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c882p+1021 -0x1.45f306dc9c882p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.45f306dc9c882p+1021 -0x1.45f306dc9c882p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.45f306dc9c882p+1021 0x1.45f306dc9c882p+1021)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-52 0x1.0000000000000p-52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-52 -0x1.0000000000000p-52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-52 0x1.0000000000000p-52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-52 -0x1.0000000000000p-52)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0000000000002p-1022 0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0000000000002p-1022 -0x0.0000000000002p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-511 0x1.0000000000000p-511)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.40d931ff62705p+1 0x1.40d931ff62705p+1)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+511 0x1.fffffffffffffp+511)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-537 0x1.0000000000000p-537)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-537 0x1.0000000000000p-537)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -inf -inf))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 nan nan))) +(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan -nan))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) +(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 nan nan)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + +;; Mixed f64x2 tests when some lanes are NaNs +(module + (type $v_v (func (param v128) (result v128))) + (type $vv_v (func (param v128 v128) (result v128))) + (table funcref (elem $64x2_neg $64x2_sqrt $64x2_add $64x2_sub $64x2_mul $64x2_div)) + + (func $64x2_neg (type $v_v) (f64x2.neg (local.get 0))) + (func $64x2_sqrt (type $v_v) (f64x2.sqrt (local.get 0))) + (func $64x2_add (type $vv_v) (f64x2.add (local.get 0) (local.get 1))) + (func $64x2_sub (type $vv_v) (f64x2.sub (local.get 0) (local.get 1))) + (func $64x2_mul (type $vv_v) (f64x2.mul (local.get 0) (local.get 1))) + (func $64x2_div (type $vv_v) (f64x2.div (local.get 0) (local.get 1))) + + (func (export "call_indirect_v_v_f64x2_extract_lane_0") + (param v128 i32) (result f64) + (f64x2.extract_lane 0 + (call_indirect (type $v_v) (local.get 0) (local.get 1)))) + (func (export "call_indirect_vv_v_f64x2_extract_lane_0") + (param v128 v128 i32) (result f64) + (f64x2.extract_lane 0 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)))) + (func (export "call_indirect_v_v_f64x2_extract_lane_1") + (param v128 i32) (result f64) + (f64x2.extract_lane 1 + (call_indirect (type $v_v) (local.get 0) (local.get 1)))) + (func (export "call_indirect_vv_v_f64x2_extract_lane_1") + (param v128 v128 i32) (result f64) + (f64x2.extract_lane 1 + (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)))) +) +(assert_return_canonical_nan (invoke "call_indirect_v_v_f64x2_extract_lane_0" (v128.const f64x2 nan 1.0) (i32.const 0))) +(assert_return (invoke "call_indirect_v_v_f64x2_extract_lane_1" (v128.const f64x2 nan 1.0) (i32.const 0)) (f64.const -1.0)) +(assert_return (invoke "call_indirect_v_v_f64x2_extract_lane_0" (v128.const f64x2 4.0 -nan) (i32.const 1)) (f64.const 2.0)) +(assert_return_canonical_nan (invoke "call_indirect_v_v_f64x2_extract_lane_1" (v128.const f64x2 4.0 -nan) (i32.const 1))) +(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 nan 1.0) (v128.const f64x2 -1.0 1.0) (i32.const 2))) +(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 nan 1.0) (v128.const f64x2 -1.0 1.0) (i32.const 2)) (f64.const 2.0)) +(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 1.0 -1.0) (v128.const f64x2 -nan 1.0) (i32.const 3))) +(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 1.0 -1.0) (v128.const f64x2 -nan 1.0) (i32.const 3)) (f64.const -2.0)) +(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 1.0 2.0) (v128.const f64x2 nan 2.0) (i32.const 4))) +(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 1.0 2.0) (v128.const f64x2 nan 2.0) (i32.const 4)) (f64.const 4.0)) +(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 6.0 nan) (v128.const f64x2 3.0 -nan) (i32.const 5)) (f64.const 2.0)) +(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 6.0 nan) (v128.const f64x2 3.0 -nan) (i32.const 5))) + +;; type check +(assert_invalid (module (func (result v128) (f64x2.neg (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.sqrt (i64.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.add (i64.const 0) (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.sub (i64.const 0) (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.mul (i64.const 0) (f64.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.div (i64.const 0) (f64.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (f64x2.add (f64x2.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-add") (param v128 v128 v128) (result v128) + (f64x2.div (f64x2.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-mul") (param v128 v128 v128) (result v128) + (f64x2.div (f64x2.mul (local.get 0) (local.get 1))(local.get 2))) + (func (export "div-sub") (param v128 v128 v128) (result v128) + (f64x2.div (f64x2.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-add") (param v128 v128 v128) (result v128) + (f64x2.mul (f64x2.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-div") (param v128 v128 v128) (result v128) + (f64x2.mul (f64x2.div (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-sub") (param v128 v128 v128) (result v128) + (f64x2.mul (f64x2.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (f64x2.sub (f64x2.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (f64x2.add (f64x2.neg (local.get 0)) (local.get 1))) + (func (export "add-sqrt") (param v128 v128) (result v128) + (f64x2.add (f64x2.sqrt (local.get 0)) (local.get 1))) + (func (export "div-neg") (param v128 v128) (result v128) + (f64x2.div (f64x2.neg (local.get 0)) (local.get 1))) + (func (export "div-sqrt") (param v128 v128) (result v128) + (f64x2.div (f64x2.sqrt (local.get 0)) (local.get 1))) + (func (export "mul-neg") (param v128 v128) (result v128) + (f64x2.mul (f64x2.neg (local.get 0)) (local.get 1))) + (func (export "mul-sqrt") (param v128 v128) (result v128) + (f64x2.mul (f64x2.sqrt (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (f64x2.sub (f64x2.neg (local.get 0)) (local.get 1))) + (func (export "sub-sqrt") (param v128 v128) (result v128) + (f64x2.sub (f64x2.sqrt (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.25 0.25) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "div-add" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 5.0 5.0)) +(assert_return (invoke "div-mul" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 4 4) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 18.0 18.0)) +(assert_return (invoke "div-sub" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 4.0 4.0)) +(assert_return (invoke "mul-add" (v128.const f64x2 1.25 1.25) + (v128.const f64x2 0.25 0.25) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 0.375 0.375)) +(assert_return (invoke "mul-div" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 2.25 2.25)) +(assert_return (invoke "mul-sub" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 0.25 0.25)) +(assert_return (invoke "sub-add" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.25 0.25) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 1.25 1.25)) +(assert_return (invoke "add-neg" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "add-sqrt" (v128.const f64x2 2.25 2.25) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 1.75 1.75)) +(assert_return (invoke "div-neg" (v128.const f64x2 1.5 1.5) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 -6 -6)) +(assert_return (invoke "div-sqrt" (v128.const f64x2 2.25 2.25) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 6 6)) +(assert_return (invoke "mul-neg" (v128.const f64x2 1.5 1.5) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 -0.375 -0.375)) +(assert_return (invoke "mul-sqrt" (v128.const f64x2 2.25 2.25) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 0.375 0.375)) +(assert_return (invoke "sub-neg" (v128.const f64x2 1.125 1.125) + (v128.const f64x2 0.125 0.125)) + (v128.const f64x2 -1.25 -1.25)) +(assert_return (invoke "sub-sqrt" (v128.const f64x2 2.25 2.25) + (v128.const f64x2 0.25 0.25)) + (v128.const f64x2 1.25 1.25)) \ No newline at end of file diff --git a/test/core/simd/simd_i64x2_arith.wast b/test/core/simd/simd_i64x2_arith.wast new file mode 100644 index 0000000000..41e4c187f6 --- /dev/null +++ b/test/core/simd/simd_i64x2_arith.wast @@ -0,0 +1,575 @@ +;; Tests for i64x2 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i64x2.add") (param v128 v128) (result v128) (i64x2.add (local.get 0) (local.get 1))) + (func (export "i64x2.sub") (param v128 v128) (result v128) (i64x2.sub (local.get 0) (local.get 1))) + (func (export "i64x2.mul") (param v128 v128) (result v128) (i64x2.mul (local.get 0) (local.get 1))) + (func (export "i64x2.neg") (param v128) (result v128) (i64x2.neg (local.get 0))) +) + + +;; i64x2.add +(assert_return (invoke "i64x2.add" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0 0) + (v128.const i64x2 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const i64x2 1 1)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0 0) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 4611686018427387903 4611686018427387903) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 4611686018427387904 4611686018427387904) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -4611686018427387903 -4611686018427387903) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -4611686018427387904 -4611686018427387904) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -4611686018427387905 -4611686018427387905) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 9223372036854775805 9223372036854775805) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775806 9223372036854775806)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 9223372036854775806 9223372036854775806) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 9223372036854775808 9223372036854775808) + (v128.const i64x2 1 1)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -9223372036854775806 -9223372036854775806) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -9223372036854775807 -9223372036854775807) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 9223372036854775807 9223372036854775807) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 9223372036854775806 9223372036854775806)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x3fffffffffffffff 0x3fffffffffffffff) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x4000000000000000 0x4000000000000000) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -0x3fffffffffffffff -0x3fffffffffffffff) + (v128.const i64x2 -0x40000000fffffff -0x40000000fffffff)) + (v128.const i64x2 -4899916394847535102 -4899916394847535102)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000000 -0x400000000000000)) + (v128.const i64x2 -4899916394579099648 -4899916394579099648)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000001 -0x400000000000001)) + (v128.const i64x2 -4899916394579099649 -4899916394579099649)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x7ffffffffffffff 0x7ffffffffffffff)) + (v128.const i64x2 -8646911284551352322 -8646911284551352322)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 -0x01 -0x01)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i8x16 0 0 0 0 0 0 0 0x80 0 0 0 0 0 0 0 0x80)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i16x8 0 0 0 0x8000 0 0 0 0x8000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i32x4 0 0x80000000 0 0x80000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 +0.0 +0.0)) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 -0.0 -0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 1.0 1.0)) + (v128.const i64x2 0xbff0000000000000 0xbff0000000000000)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 -1.0 -1.0)) + (v128.const i64x2 0x3ff0000000000000 0x3ff0000000000000)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const f64x2 +inf +inf)) + (v128.const i64x2 0x7ff0000000000001 0x7ff0000000000001)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0xfff0000000000001 0xfff0000000000001)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 1 1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0x7ff8000000000001 0x7ff8000000000001)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0 1) + (v128.const i64x2 0 0xffffffffffffffff)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0 1) + (v128.const i64x2 0 2)) + (v128.const i64x2 0 3)) + +;; i64x2.sub +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0 0) + (v128.const i64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 1 1) + (v128.const i64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0 0) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 1 1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 4611686018427387903 4611686018427387903) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 4611686018427387904 4611686018427387904) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -4611686018427387903 -4611686018427387903) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -4611686018427387904 -4611686018427387904) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -4611686018427387905 -4611686018427387905) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 9223372036854775805 9223372036854775805) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775804 9223372036854775804)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 9223372036854775806 9223372036854775806) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775805 9223372036854775805)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 9223372036854775808 9223372036854775808) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -9223372036854775806 -9223372036854775806) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775805 -9223372036854775805)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -9223372036854775807 -9223372036854775807) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775806 -9223372036854775806)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 9223372036854775807 9223372036854775807) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 1 1)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x3fffffffffffffff 0x3fffffffffffffff) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x4000000000000000 0x4000000000000000) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -0x3fffffffffffffff -0x3fffffffffffffff) + (v128.const i64x2 -0x40000000fffffff -0x40000000fffffff)) + (v128.const i64x2 -4323455642007240704 -4323455642007240704)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000000 -0x400000000000000)) + (v128.const i64x2 -4323455642275676160 -4323455642275676160)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000001 -0x400000000000001)) + (v128.const i64x2 -4323455642275676159 -4323455642275676159)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x7ffffffffffffff 0x7ffffffffffffff)) + (v128.const i64x2 8646911284551352320 8646911284551352320)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 9223372036854775806 9223372036854775806)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 -0x01 -0x01)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 -2 -2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i8x16 0 0 0 0 0 0 0 0x80 0 0 0 0 0 0 0 0x80)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 1 1) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i16x8 0 0 0 0x8000 0 0 0 0x8000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 1 1) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i32x4 0 0x80000000 0 0x80000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 1 1) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i64x2 2 2)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 +0.0 +0.0)) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 -0.0 -0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 1.0 1.0)) + (v128.const i64x2 0x4010000000000000 0x4010000000000000)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const f64x2 -1.0 -1.0)) + (v128.const i64x2 0xc010000000000000 0xc010000000000000)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 +inf +inf)) + (v128.const i64x2 0x8010000000000001 0x8010000000000001)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0x0010000000000001 0x0010000000000001)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0x8008000000000001 0x8008000000000001)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0 1) + (v128.const i64x2 0 0xffffffffffffffff)) + (v128.const i64x2 0 0x02)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0 1) + (v128.const i64x2 0 2)) + (v128.const i64x2 0 -1)) + +;; i64x2.mul +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0 0) + (v128.const i64x2 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 1 1) + (v128.const i64x2 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0 0) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 1 1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 4611686018427387903 4611686018427387903) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 4611686018427387904 4611686018427387904) + (v128.const i64x2 4611686018427387904 4611686018427387904)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -4611686018427387903 -4611686018427387903) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -4611686018427387904 -4611686018427387904) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -4611686018427387905 -4611686018427387905) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 9223372036854775805 9223372036854775805) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775805 9223372036854775805)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 9223372036854775806 9223372036854775806) + (v128.const i64x2 1 1)) + (v128.const i64x2 9223372036854775806 9223372036854775806)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 9223372036854775808 9223372036854775808) + (v128.const i64x2 1 1)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -9223372036854775806 -9223372036854775806) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 9223372036854775806 9223372036854775806)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -9223372036854775807 -9223372036854775807) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 9223372036854775807 9223372036854775807) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -9223372036854775808 -9223372036854775808) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x3fffffffffffffff 0x3fffffffffffffff) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 -4611686018427387904 -4611686018427387904)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x4000000000000000 0x4000000000000000) + (v128.const i64x2 0x4000000000000000 0x4000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -0x3fffffffffffffff -0x3fffffffffffffff) + (v128.const i64x2 -0x40000000fffffff -0x40000000fffffff)) + (v128.const i64x2 -4899916394847535103 -4899916394847535103)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000000 -0x400000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 -0x4000000000000000 -0x4000000000000000) + (v128.const i64x2 -0x400000000000001 -0x400000000000001)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x7ffffffffffffff 0x7ffffffffffffff)) + (v128.const i64x2 8646911284551352321 8646911284551352321)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 -0x01 -0x01)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i8x16 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i16x8 0 0 0 0x02 0 0 0 0x02)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x8000000000000000 0x8000000000000000) + (v128.const i32x4 0 0x02 0 0x02)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x80000000 0x80000000) + (v128.const f64x2 +0.0 +0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x80000000 0x80000000) + (v128.const f64x2 -0.0 -0.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x80000000 0x80000000) + (v128.const f64x2 1.0 1.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x80000000 0x80000000) + (v128.const f64x2 -1.0 -1.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 +inf +inf)) + (v128.const i64x2 0x7ff0000000000000 0x7ff0000000000000)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 -inf -inf)) + (v128.const i64x2 0xfff0000000000000 0xfff0000000000000)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x1 0x1) + (v128.const f64x2 nan nan)) + (v128.const i64x2 0x7ff8000000000000 0x7ff8000000000000)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0 1) + (v128.const i64x2 0 0xffffffffffffffff)) + (v128.const i64x2 0 0xffffffffffffffff)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0 1) + (v128.const i64x2 0 2)) + (v128.const i64x2 0 0x02)) + +;; i64x2.neg +(assert_return (invoke "i64x2.neg" (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 9223372036854775806 9223372036854775806)) + (v128.const i64x2 -9223372036854775806 -9223372036854775806)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -9223372036854775807 -9223372036854775807)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 9223372036854775807 9223372036854775807)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 0x01 0x01)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -0x01 -0x01)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 -0x7fffffffffffffff -0x7fffffffffffffff)) + (v128.const i64x2 9223372036854775807 9223372036854775807)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) + (v128.const i64x2 -9223372036854775807 -9223372036854775807)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 -9223372036854775808 -9223372036854775808)) +(assert_return (invoke "i64x2.neg" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const i64x2 1 1)) + +;; type check +(assert_invalid (module (func (result v128) (i64x2.neg (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.add (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; combination +(module + (func (export "add-sub") (param v128 v128 v128) (result v128) + (i64x2.add (i64x2.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-add") (param v128 v128 v128) (result v128) + (i64x2.mul (i64x2.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "mul-sub") (param v128 v128 v128) (result v128) + (i64x2.mul (i64x2.sub (local.get 0) (local.get 1))(local.get 2))) + (func (export "sub-add") (param v128 v128 v128) (result v128) + (i64x2.sub (i64x2.add (local.get 0) (local.get 1))(local.get 2))) + (func (export "add-neg") (param v128 v128) (result v128) + (i64x2.add (i64x2.neg (local.get 0)) (local.get 1))) + (func (export "mul-neg") (param v128 v128) (result v128) + (i64x2.mul (i64x2.neg (local.get 0)) (local.get 1))) + (func (export "sub-neg") (param v128 v128) (result v128) + (i64x2.sub (i64x2.neg (local.get 0)) (local.get 1))) +) + +(assert_return (invoke "add-sub" (v128.const i64x2 0 1) + (v128.const i64x2 0 2) + (v128.const i64x2 0 2)) + (v128.const i64x2 0 1)) +(assert_return (invoke "mul-add" (v128.const i64x2 0 1) + (v128.const i64x2 0 1) + (v128.const i64x2 2 2)) + (v128.const i64x2 0 4)) +(assert_return (invoke "mul-sub" (v128.const i64x2 0 2) + (v128.const i64x2 0 1) + (v128.const i64x2 0 1)) + (v128.const i64x2 0 1)) +(assert_return (invoke "sub-add" (v128.const i64x2 0 1) + (v128.const i64x2 0 2) + (v128.const i64x2 0 2)) + (v128.const i64x2 0 1)) +(assert_return (invoke "add-neg" (v128.const i64x2 0 1) + (v128.const i64x2 0 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "mul-neg" (v128.const i64x2 0 1) + (v128.const i64x2 2 2)) + (v128.const i64x2 0 -2)) +(assert_return (invoke "sub-neg" (v128.const i64x2 0 1) + (v128.const i64x2 0 1)) + (v128.const i64x2 0 -2)) \ No newline at end of file From 7071537b8162d4ee1141a55657f9b987bcc4b80b Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Thu, 17 Oct 2019 11:16:08 -0700 Subject: [PATCH 077/378] [Interpreter] infrastructure Provide a buildable skeleton for the interpereter, with end-to end types, but with lots of gaps in functionality. Unimplemented functions throw "TODO v128" error; can parse `v128` local type and nothing more. --- interpreter/binary/encode.ml | 16 +++++++++++ interpreter/exec/eval_numeric.ml | 48 ++++++++++++++++++++++++++++---- interpreter/exec/v128.ml | 5 ++++ interpreter/exec/vector.ml | 30 ++++++++++++++++++++ interpreter/host/spectest.ml | 1 + interpreter/runtime/memory.ml | 2 ++ interpreter/script/js.ml | 8 +++++- interpreter/syntax/ast.ml | 21 ++++++++++---- interpreter/syntax/types.ml | 4 ++- interpreter/syntax/values.ml | 16 +++++++++-- interpreter/text/arrange.ml | 32 +++++++++++++++++---- interpreter/text/lexer.mll | 4 ++- interpreter/valid/valid.ml | 1 + 13 files changed, 165 insertions(+), 23 deletions(-) create mode 100644 interpreter/exec/v128.ml create mode 100644 interpreter/exec/vector.ml diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index e6f3275673..a614983368 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -95,6 +95,7 @@ let encode m = | I64Type -> vs7 (-0x02) | F32Type -> vs7 (-0x03) | F64Type -> vs7 (-0x04) + | V128Type -> failwith "TODO v128" let elem_type = function | FuncRefType -> vs7 (-0x10) @@ -195,6 +196,10 @@ let encode m = op 0x35; memop mo | Load {ty = F32Type | F64Type; sz = Some _; _} -> assert false + | Load {ty = V128Type; sz = None; _} -> + failwith "TODO v128" + | Load {ty = V128Type; sz = Some _; _} -> + failwith "TODO v128" | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo @@ -207,6 +212,10 @@ let encode m = | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false + | Store {ty = V128Type; sz = None; _} -> + failwith "TODO v128" + | Store {ty = V128Type; sz = Some _; _} -> + failwith "TODO v128" | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -215,11 +224,14 @@ let encode m = | Const {it = I64 c; _} -> op 0x42; vs64 c | Const {it = F32 c; _} -> op 0x43; f32 c | Const {it = F64 c; _} -> op 0x44; f64 c + | Const {it = V128 c; _} -> + failwith "TODO v128" | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false + | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 | Compare (I32 I32Op.Ne) -> op 0x47 @@ -256,6 +268,7 @@ let encode m = | Compare (F64 F64Op.Gt) -> op 0x64 | Compare (F64 F64Op.Le) -> op 0x65 | Compare (F64 F64Op.Ge) -> op 0x66 + | Compare (V128 _) -> failwith "TODO v128" | Unary (I32 I32Op.Clz) -> op 0x67 | Unary (I32 I32Op.Ctz) -> op 0x68 @@ -280,6 +293,7 @@ let encode m = | Unary (F64 F64Op.Trunc) -> op 0x9d | Unary (F64 F64Op.Nearest) -> op 0x9e | Unary (F64 F64Op.Sqrt) -> op 0x9f + | Unary (V128 _) -> failwith "TODO v128" | Binary (I32 I32Op.Add) -> op 0x6a | Binary (I32 I32Op.Sub) -> op 0x6b @@ -328,6 +342,7 @@ let encode m = | Binary (F64 F64Op.Min) -> op 0xa4 | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + | Binary (V128 _) -> failwith "TODO v128" | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false @@ -362,6 +377,7 @@ let encode m = | Convert (F64 F64Op.PromoteF32) -> op 0xbb | Convert (F64 F64Op.DemoteF64) -> assert false | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf + | Convert (V128 _) -> failwith "TODO v128" let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index ea54cf991c..8102ae0f71 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -116,6 +116,31 @@ end module F32Op = FloatOp (F32) (Values.F32Value) module F64Op = FloatOp (F64) (Values.F64Value) +(* Vector operators *) + +module VectorOp (VXX : Vector.S) (Value : ValueType with type t = VXX.t) = +struct + (* TODO + open Ast.VectorOp + + let to_value = Value.to_value + let of_value = of_arg Value.of_value + *) + + (* FIXME *) + let unop op = failwith "TODO v128" + + (* FIXME *) + let binop op = failwith "TODO v128" + + (* FIXME *) + let testop op = failwith "TODO v128" + + (* FIXME *) + let relop op = failwith "TODO v128" +end + +module V128Op = VectorOp (V128) (Values.V128Value) (* Conversion operators *) @@ -181,17 +206,28 @@ struct | DemoteF64 -> raise (TypeError (1, v, F64Type)) end +module V128CvtOp = +struct + (* TODO + open Ast.VectorOp + *) + + (* FIXME *) + let cvtop op v = failwith "TODO v128" +end + (* Dispatch *) -let op i32 i64 f32 f64 = function +let op i32 i64 f32 f64 v128 = function | I32 x -> i32 x | I64 x -> i64 x | F32 x -> f32 x | F64 x -> f64 x + | V128 x -> v128 x -let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop -let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop -let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop -let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop -let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop +let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop V128Op.unop +let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop V128Op.binop +let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop V128Op.testop +let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop V128Op.relop +let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop V128CvtOp.cvtop diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml new file mode 100644 index 0000000000..ff2c2f6804 --- /dev/null +++ b/interpreter/exec/v128.ml @@ -0,0 +1,5 @@ +include Vector.Make + (struct + include Bytes + let bytewidth = 16 + end) diff --git a/interpreter/exec/vector.ml b/interpreter/exec/vector.ml new file mode 100644 index 0000000000..5b298d25e5 --- /dev/null +++ b/interpreter/exec/vector.ml @@ -0,0 +1,30 @@ +open Char + +module type RepType = +sig + type t + + val make : int -> char -> t + (* ^ bits_make ? *) + val to_string : t -> string + val bytewidth : int +end + +module type S = +sig + type t + type bits + val default : t (* FIXME good name for default value? *) + val to_string : t -> string + val to_bits : t -> bits +end + +module Make (Rep : RepType) : S with type bits = Rep.t = +struct + type t = Rep.t + type bits = Rep.t + + let default = Rep.make Rep.bytewidth (chr 0) + let to_string = Rep.to_string (* FIXME very very wrong *) + let to_bits x = x +end diff --git a/interpreter/host/spectest.ml b/interpreter/host/spectest.ml index 78f3e994a9..a30d85b22f 100644 --- a/interpreter/host/spectest.ml +++ b/interpreter/host/spectest.ml @@ -14,6 +14,7 @@ let global (GlobalType (t, _) as gt) = | I64Type -> I64 666L | F32Type -> F32 (F32.of_float 666.6) | F64Type -> F64 (F64.of_float 666.6) + | V128Type -> failwith "TODO v128" in Global.alloc gt v let table = Table.alloc (TableType ({min = 10l; max = Some 20l}, FuncRefType)) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index d1f2bce982..f8aeaf839d 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -111,6 +111,7 @@ let load_value mem a o t = | I64Type -> I64 n | F32Type -> F32 (F32.of_bits (Int64.to_int32 n)) | F64Type -> F64 (F64.of_bits n) + | V128Type -> failwith "TODO v128" let store_value mem a o v = let x = @@ -119,6 +120,7 @@ let store_value mem a o v = | I64 x -> x | F32 x -> Int64.of_int32 (F32.to_bits x) | F64 x -> F64.to_bits x + | V128 x -> failwith "TODO v128" (* FIXME V128.to_bits x requires store to accept something other than int64 *) in storen mem a o (Types.size (Values.type_of v)) x let extend x n = function diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 824e8bb88a..a7ce125264 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -191,24 +191,29 @@ let eq_of = function | I64Type -> Values.I64 I64Op.Eq | F32Type -> Values.F32 F32Op.Eq | F64Type -> Values.F64 F64Op.Eq + | V128Type -> failwith "TODO v128" let and_of = function | I32Type | F32Type -> Values.I32 I32Op.And | I64Type | F64Type -> Values.I64 I64Op.And + | V128Type -> failwith "TODO v128" let reinterpret_of = function | I32Type -> I32Type, Nop | I64Type -> I64Type, Nop | F32Type -> I32Type, Convert (Values.I32 I32Op.ReinterpretFloat) | F64Type -> I64Type, Convert (Values.I64 I64Op.ReinterpretFloat) + | V128Type -> failwith "TODO v128" let canonical_nan_of = function | I32Type | F32Type -> Values.I32 (F32.to_bits F32.pos_nan) | I64Type | F64Type -> Values.I64 (F64.to_bits F64.pos_nan) + | V128Type -> failwith "TODO v128" let abs_mask_of = function | I32Type | F32Type -> Values.I32 Int32.max_int | I64Type | F64Type -> Values.I64 Int64.max_int + | V128Type -> failwith "TODO v128" let invoke ft lits at = [ft @@ at], FuncImport (1l @@ at) @@ at, @@ -270,7 +275,7 @@ let wrap module_name item_name wrap_action wrap_assertion at = let is_js_value_type = function | I32Type -> true - | I64Type | F32Type | F64Type -> false + | I64Type | F32Type | F64Type | V128Type -> false let is_js_global_type = function | GlobalType (t, mut) -> is_js_value_type t && mut = Immutable @@ -320,6 +325,7 @@ let of_literal lit = | Values.I64 i -> "int64(\"" ^ I64.to_string_s i ^ "\")" | Values.F32 z -> of_float (F32.to_float z) | Values.F64 z -> of_float (F64.to_float z) + | Values.V128 v -> failwith "TODO v128" (* FIXME should this be even valid *) let rec of_definition def = match def.it with diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 089023fc1a..65647307ee 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -44,16 +44,27 @@ struct | ReinterpretInt end +(* FIXME *) +module VectorOp = +struct + type unop = TodoUnOp + type binop = TodoBinOp + type testop = TodoTestOp + type relop = TodoRelOp + type cvtop = TodoCvtOp +end + module I32Op = IntOp module I64Op = IntOp module F32Op = FloatOp module F64Op = FloatOp +module V128Op = VectorOp -type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop) Values.op -type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop) Values.op -type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op -type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Values.op -type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Values.op +type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop, V128Op.unop) Values.op +type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop, V128Op.binop) Values.op +type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop, V128Op.testop) Values.op +type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop, V128Op.relop) Values.op +type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) Values.op type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 00b76f6c16..7273b6625d 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -1,6 +1,6 @@ (* Types *) -type value_type = I32Type | I64Type | F32Type | F64Type +type value_type = I32Type | I64Type | F32Type | F64Type | V128Type type elem_type = FuncRefType type stack_type = value_type list type func_type = FuncType of stack_type * stack_type @@ -22,6 +22,7 @@ type extern_type = let size = function | I32Type | F32Type -> 4 | I64Type | F64Type -> 8 + | V128Type -> 16 (* Subtyping *) @@ -73,6 +74,7 @@ let string_of_value_type = function | I64Type -> "i64" | F32Type -> "f32" | F64Type -> "f64" + | V128Type -> "v128" let string_of_value_types = function | [t] -> string_of_value_type t diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index dedc14ab7c..66c9a05170 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -3,10 +3,10 @@ open Types (* Values and operators *) -type ('i32, 'i64, 'f32, 'f64) op = - I32 of 'i32 | I64 of 'i64 | F32 of 'f32 | F64 of 'f64 +type ('i32, 'i64, 'f32, 'f64, 'v128) op = + I32 of 'i32 | I64 of 'i64 | F32 of 'f32 | F64 of 'f64 | V128 of 'v128 -type value = (I32.t, I64.t, F32.t, F64.t) op +type value = (I32.t, I64.t, F32.t, F64.t, V128.t) op (* Typing *) @@ -16,12 +16,14 @@ let type_of = function | I64 _ -> I64Type | F32 _ -> F32Type | F64 _ -> F64Type + | V128 _ -> V128Type let default_value = function | I32Type -> I32 I32.zero | I64Type -> I64 I64.zero | F32Type -> F32 F32.zero | F64Type -> F64 F64.zero + | V128Type -> V128 V128.default (* Conversion *) @@ -33,6 +35,7 @@ let string_of_value = function | I64 i -> I64.to_string_s i | F32 z -> F32.to_string z | F64 z -> F64.to_string z + | V128 v -> V128.to_string v let string_of_values = function | [v] -> string_of_value v @@ -77,3 +80,10 @@ struct let to_value i = F64 i let of_value = function F64 z -> z | _ -> raise (Value F64Type) end + +module V128Value = +struct + type t = V128.t + let to_value i = V128 i + let of_value = function V128 z -> z | _ -> raise (Value V128Type) +end diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index f764d34cef..b573627410 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -172,20 +172,39 @@ struct | ReinterpretInt -> "reinterpret_i" ^ xx end -let oper (intop, floatop) op = +(* FIXME *) +module VectorOp = +struct + (* TODO + open Ast.FloatOp + *) + + let testop xx = fun _ -> failwith "TODO v128" + + let relop xx = fun _ -> failwith "TODO v128" + + let unop xx = fun _ -> failwith "TODO v128" + + let binop xx = fun _ -> failwith "TODO v128" + + let cvtop xx = fun _ -> failwith "TODO v128" +end + +let oper (intop, floatop, vectop) op = value_type (type_of op) ^ "." ^ (match op with | I32 o -> intop "32" o | I64 o -> intop "64" o | F32 o -> floatop "32" o | F64 o -> floatop "64" o + | V128 o -> vectop "128" o ) -let unop = oper (IntOp.unop, FloatOp.unop) -let binop = oper (IntOp.binop, FloatOp.binop) -let testop = oper (IntOp.testop, FloatOp.testop) -let relop = oper (IntOp.relop, FloatOp.relop) -let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) +let unop = oper (IntOp.unop, FloatOp.unop, VectorOp.unop) +let binop = oper (IntOp.binop, FloatOp.binop, VectorOp.binop) +let testop = oper (IntOp.testop, FloatOp.testop, VectorOp.testop) +let relop = oper (IntOp.relop, FloatOp.relop, VectorOp.relop) +let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, VectorOp.cvtop) let pack_size = function | Memory.Pack8 -> "8" @@ -381,6 +400,7 @@ let literal lit = | Values.I64 i -> Node ("i64.const " ^ I64.to_string_s i, []) | Values.F32 z -> Node ("f32.const " ^ F32.to_string z, []) | Values.F64 z -> Node ("f64.const " ^ F64.to_string z, []) + | Values.V128 v -> Node ("v128.const " ^ V128.to_string v, []) let definition mode x_opt def = try diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index dab48e0453..e9d875b1cf 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -50,6 +50,7 @@ let value_type = function | "i64" -> Types.I64Type | "f32" -> Types.F32Type | "f64" -> Types.F64Type + | "v128" -> Types.V128Type | _ -> assert false let intop t i32 i64 = @@ -139,7 +140,8 @@ let reserved = ([^'\"''('')'';'] # space)+ (* hack for table size *) let ixx = "i" ("32" | "64") let fxx = "f" ("32" | "64") -let nxx = ixx | fxx +let v = "v128" +let nxx = ixx | fxx | v let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index ea78d17844..9f38b02775 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -133,6 +133,7 @@ let type_cvtop at = function | PromoteF32 -> F32Type | DemoteF64 -> error at "invalid conversion" ), F64Type + | Values.V128 cvtop -> failwith "TODO v128" (* Expressions *) From d353b9c28a5d1fa87fedf9bfdb02fc86f3c7bd97 Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Wed, 13 Nov 2019 09:58:46 -0800 Subject: [PATCH 078/378] Correct memarg use in pseudocode --- proposals/simd/SIMD.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index a419bbc036..b4675950a7 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -667,7 +667,7 @@ Load a `v128` vector from the given heap address. ```python def S.load(memarg): - return S.from_bytes(memory[memarg.start:memarg.start + 16]) + return S.from_bytes(memory[memarg.offset:memarg.offset + 16]) ``` ### Load and Splat @@ -681,7 +681,7 @@ Load a single element and splat to all lanes of a `v128` vector. ```python def S.load_splat(memarg): - val_bytes = memory[memarg.start:memarg.start + S.LaneBytes]) + val_bytes = memory[memarg.offset:memarg.offset + S.LaneBytes]) return S.splat(S.LaneType.from_bytes(val_bytes)) ``` @@ -699,7 +699,7 @@ Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up ```python def S.load_extend(ext, memarg): result = S.New() - bytes = memory[memarg.start:memarg.start + 8]) + bytes = memory[memarg.offset:memarg.offset + 8]) for i in range(S.Lanes): result[i] = ext(S.LaneType.from_bytes(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)])) return result @@ -719,7 +719,7 @@ Store a `v128` vector to the given heap address. ```python def S.store(memarg, a): - memory[memarg.start:memarg.start + 16] = bytes(a) + memory[memarg.offset:memarg.offset + 16] = bytes(a) ``` ## Floating-point sign bit operations From 9ec00cee87d6154b329598898bce76258fa13cb6 Mon Sep 17 00:00:00 2001 From: Petr Penzin Date: Fri, 15 Nov 2019 09:43:24 -0800 Subject: [PATCH 079/378] [Interpreter] lexer: `v` -> `vxxx` Use `vxxx` to denote vector type in the lexer. --- interpreter/text/lexer.mll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index e9d875b1cf..b755e8c750 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -140,8 +140,8 @@ let reserved = ([^'\"''('')'';'] # space)+ (* hack for table size *) let ixx = "i" ("32" | "64") let fxx = "f" ("32" | "64") -let v = "v128" -let nxx = ixx | fxx | v +let vxxx = "v128" +let nxx = ixx | fxx | vxxx let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" From 4fdd0c6f8801506c50907203b16d455e639b4d0e Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Fri, 15 Nov 2019 14:48:56 -0800 Subject: [PATCH 080/378] Trim trailing whitespace in simd_lane.wast --- test/core/simd/simd_lane.wast | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 24b2d5a67c..51674fee67 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -1,7 +1,7 @@ ;; Tests for the extract_lane, replace_lane, swizzle and shuffle group instructions -(module +(module (func (export "i8x16_extract_lane_s-first") (param v128) (result i32) (i8x16.extract_lane_s 0 (local.get 0))) (func (export "i8x16_extract_lane_s-last") (param v128) (result i32) @@ -738,9 +738,9 @@ (assert_return (invoke "as-i64x2_splat-operand" (v128.const i64x2 -1 0)) (v128.const i64x2 -1 -1)) (assert_return (invoke "as-f64x2_splat-operand" (v128.const f64x2 inf nan)) (v128.const f64x2 inf inf)) (assert_return (invoke "as-i8x16_add-operands" - (v128.const i8x16 0xff 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) (i32.const 1) + (v128.const i8x16 0xff 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16) (i32.const 1) (v128.const i8x16 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0xff) (i32.const 1)) - (v128.const i8x16 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17)) + (v128.const i8x16 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17)) (assert_return (invoke "as-i16x8_add-operands" (v128.const i16x8 -1 4 9 16 25 36 49 64) (i32.const 1) (v128.const i16x8 64 49 36 25 16 9 4 -1) (i32.const 1)) @@ -854,4 +854,4 @@ (v128.const i8x16 -16 -15 -14 -13 -12 -11 -10 -9 8 7 6 5 4 3 2 1)) (assert_return (invoke "as-local_set-value-1" (v128.const i64x2 -1 -1)) (i64.const -1)) -(assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) \ No newline at end of file +(assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) From 34aedb3e9cadabfa7aa4e0111a887ae44721ad47 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Fri, 15 Nov 2019 14:49:10 -0800 Subject: [PATCH 081/378] Fix a typo in simd_lane.wast --- test/core/simd/simd_lane.wast | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 51674fee67..7f09c4f6f2 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -419,7 +419,7 @@ (assert_invalid (module (func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result f32) (f32x4.extract_lane 4 (v128.const f32x4 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i8x16.replace_lane 16 (v128.const ii8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i8x16.replace_lane 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i16x8.replace_lane 8 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") From e5b3bb6594de9817a94d56b06902a6fd30f269b2 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Fri, 15 Nov 2019 14:50:18 -0800 Subject: [PATCH 082/378] Remove extra specifiers in invalid lane tests I believe these constants were placed there by mistake since the tests seem to be for the immediate argument of the instruction rather than the text format. --- test/core/simd/simd_lane.wast | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 7f09c4f6f2..65b0c7bda4 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -444,10 +444,10 @@ (assert_invalid (module (func (result v128) (i16x8.replace_lane 8 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result i64) (i64x2.extract_lane 2 (v128.const i64x2 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result f64) (f64x2.extract_lane 2 (v128.const f64x2 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i64x2.replace_lane 2 (v128.const i64x2 0 0 0 0) (i64.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0 0 0) (f64.const 1.0)))) "invalid lane index") +(assert_invalid (module (func (result i64) (i64x2.extract_lane 2 (v128.const i64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result f64) (f64x2.extract_lane 2 (v128.const f64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i64x2.replace_lane 2 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0) (f64.const 1.0)))) "invalid lane index") ;; Invalid parameters: required v128 but pass other types From 21e3565d05b294bc01d06f9d63de266499ea8bb2 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Fri, 15 Nov 2019 14:56:03 -0800 Subject: [PATCH 083/378] Change some malformed shuffles to text parser errors The tests here seem to be for the text format either specifying too few or too few lanes, so this moves them to `assert_malformed` instead of inline as an expected-valid module. This way parsers don't need to handle a variable number of lanes but can always expect 16 lanes to be specified. --- test/core/simd/simd_lane.wast | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 65b0c7bda4..1dc74c3c3d 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -489,14 +489,8 @@ (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") ;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 -(assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 - (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) - (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane length") -(assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 - (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) - (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane length") +(assert_malformed (module quote "(func v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") "invalid lane length") +(assert_malformed (module quote "(func v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") (assert_invalid (module (func (result v128) (v8x16.shuffle -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) From 6704ea89edff7766add7163193447429c0ac108e Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Mon, 18 Nov 2019 03:33:56 -0800 Subject: [PATCH 084/378] Update proposal to include Integer Min/Max Ops (#27) --- proposals/simd/BinarySIMD.md | 12 ++++++++++ proposals/simd/ImplementationStatus.md | 12 ++++++++++ proposals/simd/SIMD.md | 31 ++++++++++++++++++++++++++ 3 files changed, 55 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 8617d725d2..db0b0d513c 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -109,6 +109,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.sub` | `0x5a`| - | | `i8x16.sub_saturate_s` | `0x5b`| - | | `i8x16.sub_saturate_u` | `0x5c`| - | +| `i8x16.min_s` | `0x5e`| - | +| `i8x16.min_u` | `0x5f`| - | +| `i8x16.max_s` | `0x60`| - | +| `i8x16.max_u` | `0x61`| - | | `i16x8.neg` | `0x62`| - | | `i16x8.any_true` | `0x63`| - | | `i16x8.all_true` | `0x64`| - | @@ -122,6 +126,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i16x8.sub_saturate_s` | `0x6c`| - | | `i16x8.sub_saturate_u` | `0x6d`| - | | `i16x8.mul` | `0x6e`| - | +| `i16x8.min_s` | `0x6f`| - | +| `i16x8.min_u` | `0x70`| - | +| `i16x8.max_s` | `0x71`| - | +| `i16x8.max_u` | `0x72`| - | | `i32x4.neg` | `0x73`| - | | `i32x4.any_true` | `0x74`| - | | `i32x4.all_true` | `0x75`| - | @@ -131,6 +139,10 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.add` | `0x79`| - | | `i32x4.sub` | `0x7c`| - | | `i32x4.mul` | `0x7f`| - | +| `i32x4.min_s` | `0x80`| - | +| `i32x4.min_u` | `0x81`| - | +| `i32x4.max_s` | `0x82`| - | +| `i32x4.max_u` | `0x83`| - | | `i64x2.neg` | `0x84`| - | | `i64x2.shl` | `0x87`| - | | `i64x2.shr_s` | `0x88`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 4778d4fa0b..de7638aaf4 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -87,6 +87,10 @@ | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i8x16.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i8x16.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i8x16.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -100,6 +104,10 @@ | `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i16x8.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i16x8.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i16x8.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -109,6 +117,10 @@ | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 0f13792079..d2c907a4d4 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -457,6 +457,37 @@ def S.sub_saturate_u(a, b): return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b)) ``` +### Lane-wise integer minimum +* `i8x16.min_s(a: v128, b: v128) -> v128` +* `i8x16.min_u(a: v128, b: v128) -> v128` +* `i16x8.min_s(a: v128, b: v128) -> v128` +* `i16x8.min_u(a: v128, b: v128) -> v128` +* `i32x4.min_s(a: v128, b: v128) -> v128` +* `i32x4.min_u(a: v128, b: v128) -> v128` + +Compares lane-wise signed/unsigned integers, and returns the minimum of +each pair. + +```python +def S.min(a, b): + return S.lanewise_binary(min, a, b) +``` + +### Lane-wise integer maximum +* `i8x16.max_s(a: v128, b: v128) -> v128` +* `i8x16.max_u(a: v128, b: v128) -> v128` +* `i16x8.max_s(a: v128, b: v128) -> v128` +* `i16x8.max_u(a: v128, b: v128) -> v128` +* `i32x4.max_s(a: v128, b: v128) -> v128` +* `i32x4.max_u(a: v128, b: v128) -> v128` + +Compares lane-wise signed/unsigned integers, and returns the maximum of +each pair. + +```python +def S.max(a, b): + return S.lanewise_binary(max, a, b) +``` ## Bit shifts ### Left shift by scalar From fe1c984ce0dcd2c2279500c2f1bfd31005c47a41 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Mon, 18 Nov 2019 08:32:59 -0800 Subject: [PATCH 085/378] Ensure invalid lane length test typechecks --- test/core/simd/simd_lane.wast | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 1dc74c3c3d..f531c10a17 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -489,8 +489,8 @@ (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") ;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 -(assert_malformed (module quote "(func v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") "invalid lane length") -(assert_malformed (module quote "(func v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") +(assert_malformed (module quote "(func (param v128) (result v128) local.get 0 local.get 0 v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") "invalid lane length") +(assert_malformed (module quote "(func (param v128) (result v128) local.get 0 local.get 0 v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") (assert_invalid (module (func (result v128) (v8x16.shuffle -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) From e789960d17fc9356a4ae937abe3571e205b4d252 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 19 Nov 2019 08:36:27 +0100 Subject: [PATCH 086/378] Clarification in README (#143) It's not the same as the proposed specification document. --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 82945ae4de..5cea634ee4 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,7 @@ ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the [portable SIMD specification](https://github.com/stoklund/portable-simd) that resulted. -The [proposed specification](proposals/simd/SIMD.md) has the details. +The [proposed semantics](proposals/simd/SIMD.md) has the details. Note: this proposal is still being worked out, and rate of changes is high, please consult the [implementation status document](proposals/simd/ImplementationStatus.md) to get an idea of the state of implementation across toolchains and embedders. From 1d76f2de9a55ab138c5530891eb94caf42f269cb Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Tue, 19 Nov 2019 07:21:52 -0800 Subject: [PATCH 087/378] Use multiline string syntax --- test/core/simd/simd_lane.wast | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index f531c10a17..df9c5693d2 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -489,8 +489,16 @@ (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") ;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 -(assert_malformed (module quote "(func (param v128) (result v128) local.get 0 local.get 0 v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") "invalid lane length") -(assert_malformed (module quote "(func (param v128) (result v128) local.get 0 local.get 0 v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") +(assert_malformed (module quote "(func (param v128) (result v128)" + "local.get 0" + "local.get 0" + "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") + "invalid lane length") +(assert_malformed (module quote "(func (param v128) (result v128)" + "local.get 0" + "local.get 0" + "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") + "invalid lane length") (assert_invalid (module (func (result v128) (v8x16.shuffle -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) From f5e606fb280fd603c450549fbd3fe77a0fe5fdad Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 19 Nov 2019 14:41:13 -0800 Subject: [PATCH 088/378] Add support for v128.const --- interpreter/exec/vector.ml | 2 ++ interpreter/syntax/operators.ml | 1 + interpreter/text/lexer.mll | 15 +++++++--- interpreter/text/parser.mly | 50 ++++++++++++++++++++++++++++++++- test/core/simd/simd_const.wast | 10 +++---- 5 files changed, 68 insertions(+), 10 deletions(-) diff --git a/interpreter/exec/vector.ml b/interpreter/exec/vector.ml index 5b298d25e5..6471d0c97b 100644 --- a/interpreter/exec/vector.ml +++ b/interpreter/exec/vector.ml @@ -16,6 +16,7 @@ sig type bits val default : t (* FIXME good name for default value? *) val to_string : t -> string + val of_bits : bits -> t val to_bits : t -> bits end @@ -27,4 +28,5 @@ struct let default = Rep.make Rep.bytewidth (chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) let to_bits x = x + let of_bits x = x end diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index ff7588fa0f..8c5be4112b 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -9,6 +9,7 @@ let i32_const n = Const (I32 n.it @@ n.at) let i64_const n = Const (I64 n.it @@ n.at) let f32_const n = Const (F32 n.it @@ n.at) let f64_const n = Const (F64 n.it @@ n.at) +let v128_const n = Const (V128 n.it @@ n.at) let unreachable = Unreachable let nop = Nop diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b755e8c750..dac20747e0 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -65,12 +65,15 @@ let floatop t f32 f64 = | "f64" -> f64 | _ -> assert false -let numop t i32 i64 f32 f64 = +let fail_v128 = (fun s -> assert false) + +let numop t i32 i64 f32 f64 v128 = match t with | "i32" -> i32 | "i64" -> i64 | "f32" -> f32 | "f64" -> f64 + | "v128" -> v128 | _ -> assert false let memsz sz m8 m16 m32 = @@ -146,6 +149,7 @@ let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" let mem_size = "8" | "16" | "32" +let simd_shape = "i8x16" | "i16x8" | "i32x4" | "i64x2" | "f32x4" | "f64x2" rule token = parse | "(" { LPAR } @@ -173,7 +177,8 @@ rule token = parse (fun s -> let n = F32.of_string s.it in f32_const (n @@ s.at), Values.F32 n) (fun s -> let n = F64.of_string s.it in - f64_const (n @@ s.at), Values.F64 n)) + f64_const (n @@ s.at), Values.F64 n) + (fail_v128)) } | "funcref" { FUNCREF } | "mut" { MUT } @@ -204,11 +209,11 @@ rule token = parse | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) - (f32_load (opt a 2)) (f64_load (opt a 3)) o) } + (f32_load (opt a 2)) (f64_load (opt a 3)) (fail_v128) o) } | (nxx as t)".store" { STORE (fun a o -> numop t (i32_store (opt a 2)) (i64_store (opt a 3)) - (f32_store (opt a 2)) (f64_store (opt a 3)) o) } + (f32_store (opt a 2)) (f64_store (opt a 3)) (fail_v128) o) } | (ixx as t)".load"(mem_size as sz)"_"(sign as s) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; LOAD (fun a o -> @@ -353,6 +358,8 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } + | simd_shape as s { SIMD_SHAPE s } + | name as s { VAR s } | ";;"utf8_no_nl*eof { EOF } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 670afd6bae..5b47ac75aa 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,6 +39,45 @@ let ati i = let literal f s = try f s with Failure _ -> error s.at "constant out of range" +let range_check i min max at = + let i_32 = Int32.to_int i in + let min_32 = Int32.of_int min in + let max_32 = Int32.of_int max in + if i > max_32 || i < min_32 then error at "constant out of range" else i_32 + +let int8_of_string s = range_check (I32.of_string s.it) (-128) 255 s.at +let int16_of_string s = range_check (I32.of_string s.it) (-32768) 65535 s.at +let int32_of_string s = I32.to_bits (literal (fun s -> I32.of_string s.it) s) +let int64_of_string s = I64.to_bits (literal (fun s -> I64.of_string s.it) s) +let f32_of_string s = F32.to_bits (literal (fun s -> F32.of_string s.it) s) +let f64_of_string s = F64.to_bits (literal (fun s -> F64.of_string s.it) s) + +let simd_literal f shape ss = + let open Bytes in + let b = create 16 in + (match shape with + | "i8x16" -> + List.iteri (fun i s -> set_uint8 b i (int8_of_string s)) ss; + if List.length ss != 16 then parse_error "unexpected token"; + | "i16x8" -> + List.iteri (fun i s -> set_uint16_le b i (int16_of_string s)) ss; + if List.length ss != 8 then parse_error "unexpected token"; + | "i32x4" -> + List.iteri (fun i s -> set_int32_le b i (int32_of_string s)) ss; + if List.length ss != 4 then parse_error "unexpected token"; + | "i64x2" -> + List.iteri (fun i s -> set_int64_le b i (int64_of_string s)) ss; + if List.length ss != 2 then parse_error "unexpected token"; + | "f32x4" -> + List.iteri (fun i s -> set_int32_le b i (f32_of_string s)) ss; + if List.length ss != 4 then parse_error "unexpected token"; + | "f64x2" -> + List.iteri (fun i s -> set_int64_le b i (f64_of_string s)) ss; + if List.length ss != 2 then parse_error "unexpected token"; + | _ -> assert false); + let v = V128.of_bits b in + (v128_const (v @@ (ati 1)), Values.V128 v) + let nat s at = try let n = int_of_string s in @@ -145,7 +184,7 @@ let inline_type_explicit (c : context) x ft at = %} -%token NAT INT FLOAT STRING VAR VALUE_TYPE FUNCREF MUT LPAR RPAR +%token NAT INT FLOAT STRING VAR VALUE_TYPE FUNCREF MUT LPAR RPAR SIMD_SHAPE %token NOP DROP BLOCK END IF THEN ELSE SELECT LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET @@ -161,6 +200,7 @@ let inline_type_explicit (c : context) x ft at = %token INPUT OUTPUT %token EOF +%token SIMD_SHAPE %token NAT %token INT %token FLOAT @@ -247,6 +287,10 @@ literal : | INT { $1 @@ at () } | FLOAT { $1 @@ at () } +literal_list: + | /* empty */ {[]} + | literal literal_list { $1 :: $2 } + var : | NAT { let at = at () in fun c lookup -> nat32 $1 at @@ at } | VAR { let at = at () in fun c lookup -> lookup c ($1 @@ at) @@ at } @@ -319,6 +363,7 @@ plain_instr : | STORE offset_opt align_opt { fun c -> $1 $3 $2 } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } + | CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $1 $2 $3) } | CONST literal { fun c -> fst (literal $1 $2) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } @@ -820,6 +865,9 @@ meta : const : | LPAR CONST literal RPAR { snd (literal $2 $3) @@ ati 3 } + | LPAR CONST SIMD_SHAPE literal_list RPAR { + snd (simd_literal $2 $3 $4) @@ ati 3 + } const_list : | /* empty */ { [] } diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 5c9cade4d8..1c9e61fc00 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -394,7 +394,7 @@ ) (assert_malformed (module quote "(func (v128.const f32x4 nan:0x0 nan:0x0 nan:0x0 nan:0x0) drop)") - "unknown operator" + "constant out of range" ) (assert_malformed @@ -479,7 +479,7 @@ ) (assert_malformed (module quote "(func (v128.const f64x2 nan:0x0 nan:0x0) drop)") - "unknown operator" + "constant out of range" ) ;; Rounding behaviour @@ -1076,7 +1076,7 @@ (func (export "i32x4.test") (result v128) (return (v128.const i32x4 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D))) (func (export "i32x4.smax") (result v128) (return (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff))) (func (export "i32x4.neg_smax") (result v128) (return (v128.const i32x4 -0x7fffffff -0x7fffffff -0x7fffffff -0x7fffffff))) - (func (export "i32x4.inc_smin") (result v128) (return (i32x4.add (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 1 1 1 1)))) + (; (func (export "i32x4.inc_smin") (result v128) (return (i32x4.add (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 1 1 1 1)))) ;) (func (export "i32x4.neg_zero") (result v128) (return (v128.const i32x4 -0x0 -0x0 -0x0 -0x0))) (func (export "i32x4.not_octal") (result v128) (return (v128.const i32x4 010 010 010 010))) (func (export "i32x4.plus_sign") (result v128) (return (v128.const i32x4 +42 +42 +42 +42))) @@ -1089,7 +1089,7 @@ (func (export "i64x2.test") (result v128) (return (v128.const i64x2 0x0bAdD00D0bAdD00D 0x0bAdD00D0bAdD00D))) (func (export "i64x2.smax") (result v128) (return (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff))) (func (export "i64x2.neg_smax") (result v128) (return (v128.const i64x2 -0x7fffffffffffffff -0x7fffffffffffffff))) - (func (export "i64x2.inc_smin") (result v128) (return (i64x2.add (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) (v128.const i64x2 1 1)))) + (; (func (export "i64x2.inc_smin") (result v128) (return (i64x2.add (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) (v128.const i64x2 1 1)))) ;) (func (export "i64x2.neg_zero") (result v128) (return (v128.const i64x2 -0x0 -0x0))) (func (export "i64x2.not_octal") (result v128) (return (v128.const i64x2 010010 010010))) (func (export "i64x2.plus_sign") (result v128) (return (v128.const i64x2 +42 +42))) @@ -1660,4 +1660,4 @@ "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 1 (0x1.fffffffffffffp+1023) "\0b" ;; end ) -(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) \ No newline at end of file +(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) From 7d656a60df4b7defb7f3ac47dd1a27c5483ca685 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 3 Dec 2019 08:11:52 -0800 Subject: [PATCH 089/378] Separate v128.const into its own token Also clean up constructing V128.t in the parser. --- interpreter/text/lexer.mll | 13 +++---- interpreter/text/parser.mly | 62 +++++++++++++++------------------- test/core/simd/simd_const.wast | 8 ++--- 3 files changed, 36 insertions(+), 47 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index dac20747e0..cb99e7163a 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -65,15 +65,12 @@ let floatop t f32 f64 = | "f64" -> f64 | _ -> assert false -let fail_v128 = (fun s -> assert false) - -let numop t i32 i64 f32 f64 v128 = +let numop t i32 i64 f32 f64 = match t with | "i32" -> i32 | "i64" -> i64 | "f32" -> f32 | "f64" -> f64 - | "v128" -> v128 | _ -> assert false let memsz sz m8 m16 m32 = @@ -167,6 +164,7 @@ rule token = parse { error_nest (Lexing.lexeme_end_p lexbuf) lexbuf "illegal escape" } | (nxx as t) { VALUE_TYPE (value_type t) } + | (vxxx)".const" { V128_CONST } | (nxx as t)".const" { let open Source in CONST (numop t @@ -177,8 +175,7 @@ rule token = parse (fun s -> let n = F32.of_string s.it in f32_const (n @@ s.at), Values.F32 n) (fun s -> let n = F64.of_string s.it in - f64_const (n @@ s.at), Values.F64 n) - (fail_v128)) + f64_const (n @@ s.at), Values.F64 n)) } | "funcref" { FUNCREF } | "mut" { MUT } @@ -209,11 +206,11 @@ rule token = parse | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) - (f32_load (opt a 2)) (f64_load (opt a 3)) (fail_v128) o) } + (f32_load (opt a 2)) (f64_load (opt a 3)) o) } | (nxx as t)".store" { STORE (fun a o -> numop t (i32_store (opt a 2)) (i64_store (opt a 3)) - (f32_store (opt a 2)) (f64_store (opt a 3)) (fail_v128) o) } + (f32_store (opt a 2)) (f64_store (opt a 3)) o) } | (ixx as t)".load"(mem_size as sz)"_"(sign as s) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; LOAD (fun a o -> diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 5b47ac75aa..74678b4c22 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,11 +39,9 @@ let ati i = let literal f s = try f s with Failure _ -> error s.at "constant out of range" -let range_check i min max at = - let i_32 = Int32.to_int i in - let min_32 = Int32.of_int min in - let max_32 = Int32.of_int max in - if i > max_32 || i < min_32 then error at "constant out of range" else i_32 +let range_check i32 min max at = + let i = Int32.to_int i32 in + if i > max || i < min then error at "constant out of range" else i let int8_of_string s = range_check (I32.of_string s.it) (-128) 255 s.at let int16_of_string s = range_check (I32.of_string s.it) (-32768) 65535 s.at @@ -52,31 +50,25 @@ let int64_of_string s = I64.to_bits (literal (fun s -> I64.of_string s.it) s) let f32_of_string s = F32.to_bits (literal (fun s -> F32.of_string s.it) s) let f64_of_string s = F64.to_bits (literal (fun s -> F64.of_string s.it) s) -let simd_literal f shape ss = - let open Bytes in - let b = create 16 in - (match shape with - | "i8x16" -> - List.iteri (fun i s -> set_uint8 b i (int8_of_string s)) ss; - if List.length ss != 16 then parse_error "unexpected token"; - | "i16x8" -> - List.iteri (fun i s -> set_uint16_le b i (int16_of_string s)) ss; - if List.length ss != 8 then parse_error "unexpected token"; - | "i32x4" -> - List.iteri (fun i s -> set_int32_le b i (int32_of_string s)) ss; - if List.length ss != 4 then parse_error "unexpected token"; - | "i64x2" -> - List.iteri (fun i s -> set_int64_le b i (int64_of_string s)) ss; - if List.length ss != 2 then parse_error "unexpected token"; - | "f32x4" -> - List.iteri (fun i s -> set_int32_le b i (f32_of_string s)) ss; - if List.length ss != 4 then parse_error "unexpected token"; - | "f64x2" -> - List.iteri (fun i s -> set_int64_le b i (f64_of_string s)) ss; - if List.length ss != 2 then parse_error "unexpected token"; - | _ -> assert false); - let v = V128.of_bits b in - (v128_const (v @@ (ati 1)), Values.V128 v) +let simd_literal shape ss = + let open Bytes in + let b = create 16 in + (match shape with + | "i8x16" when List.length ss = 16 -> + List.iteri (fun i s -> set_uint8 b i (int8_of_string s)) ss; + | "i16x8" when List.length ss = 8 -> + List.iteri (fun i s -> set_uint16_le b i (int16_of_string s)) ss; + | "i32x4" when List.length ss = 4 -> + List.iteri (fun i s -> set_int32_le b i (int32_of_string s)) ss; + | "i64x2" when List.length ss = 2 -> + List.iteri (fun i s -> set_int64_le b i (int64_of_string s)) ss; + | "f32x4" when List.length ss = 4 -> + List.iteri (fun i s -> set_int32_le b i (f32_of_string s)) ss; + | "f64x2" when List.length ss = 2 -> + List.iteri (fun i s -> set_int64_le b i (f64_of_string s)) ss; + | _ -> parse_error "unexpected token"); + let v = V128.of_bits b in + (v128_const (v @@ ati 1), Values.V128 v) let nat s at = try @@ -189,7 +181,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT -%token CONST UNARY BINARY TEST COMPARE CONVERT +%token CONST V128_CONST UNARY BINARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA OFFSET IMPORT EXPORT TABLE @@ -288,7 +280,7 @@ literal : | FLOAT { $1 @@ at () } literal_list: - | /* empty */ {[]} + | /* empty */ { [] } | literal literal_list { $1 :: $2 } var : @@ -363,8 +355,8 @@ plain_instr : | STORE offset_opt align_opt { fun c -> $1 $3 $2 } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } - | CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $1 $2 $3) } | CONST literal { fun c -> fst (literal $1 $2) } + | V128_CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $2 $3) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } @@ -865,8 +857,8 @@ meta : const : | LPAR CONST literal RPAR { snd (literal $2 $3) @@ ati 3 } - | LPAR CONST SIMD_SHAPE literal_list RPAR { - snd (simd_literal $2 $3 $4) @@ ati 3 + | LPAR V128_CONST SIMD_SHAPE literal_list RPAR { + snd (simd_literal $3 $4) @@ ati 3 } const_list : diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 1c9e61fc00..7f62abfb44 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -176,19 +176,19 @@ ) (assert_malformed (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") - "constant out of range" + "unexpected token" ) (assert_malformed (module quote "(func (v128.const i32x4 -0x8000000000000001 -0x8000000000000001) drop)") - "constant out of range" + "unexpected token" ) (assert_malformed (module quote "(func (v128.const i32x4 18446744073709551616 18446744073709551616) drop)") - "constant out of range" + "unexpected token" ) (assert_malformed (module quote "(func (v128.const i32x4 -9223372036854775808 -9223372036854775808) drop)") - "constant out of range" + "unexpected token" ) (assert_malformed (module quote "(func (v128.const f32x4 0x1p128 0x1p128 0x1p128 0x1p128) drop)") From 5a95d88dc9341aab92105d60c383b9d6bf080c91 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 4 Dec 2019 03:27:51 +0800 Subject: [PATCH 090/378] Improve simd test generation tool (#145) - Use names in the string interpolation so its clear what each part is supposed to be. - Use unified naming convention for params. --- test/core/simd/meta/simd.py | 48 ++++++------ test/core/simd/meta/simd_arithmetic.py | 82 +++++++++---------- test/core/simd/meta/simd_bitwise.py | 52 ++++++------ test/core/simd/meta/simd_f32x4.py | 100 ++++++++++++------------ test/core/simd/meta/simd_f32x4_arith.py | 62 +++++++-------- test/core/simd/meta/simd_f64x2.py | 91 ++++++++++----------- test/core/simd/meta/simd_f64x2_arith.py | 4 +- test/core/simd/meta/simd_f64x2_cmp.py | 84 ++++++++++---------- test/core/simd/meta/simd_sat_arith.py | 86 ++++++++++---------- test/core/simd/meta/test_assert.py | 2 +- 10 files changed, 307 insertions(+), 304 deletions(-) diff --git a/test/core/simd/meta/simd.py b/test/core/simd/meta/simd.py index 3c2784d715..991ad8994d 100644 --- a/test/core/simd/meta/simd.py +++ b/test/core/simd/meta/simd.py @@ -9,66 +9,66 @@ class SIMD(object): # Constant template - CONST = '({}.const {})' + CONST = '({value_type}.const {value})' # v128 Constant template - V128_CONST = '(v128.const {} {})' + V128_CONST = '(v128.const {lane_type} {value})' - def const(self, val, lane_type): + def const(self, value, value_type): """ generation constant data, [e.g. i32, i64, f32, f64] Params: - val: constant data, string or list, + value: constant data, string or list, lane_type: lane type, [i32, i64, f32, f64] """ - return self.CONST.format(lane_type, ''.join(val)) + return self.CONST.format(value_type=value_type, value=''.join(value)) - def v128_const(self, val, lane_type): + def v128_const(self, value, lane_type): """ generation v128 constant data, [e.g. i8x16, i16x8, i32x4, f32x4] Params: - val: constant data, string or list, + value: constant data, string or list, lane_type: lane type, [e.g. i8x16, i16x8, i32x4, f32x4] """ if lane_type.lower().find('x') == -1: - return self.const(val, lane_type) + return self.const(value, lane_type) lane_cnt = int(lane_type[1:].split('x')[1]) - # val is a string type, generating constant data - # of val according to the number of lanes - if isinstance(val, str): - data_elem = [val] * lane_cnt + # value is a string type, generating constant data + # of value according to the number of lanes + if isinstance(value, str): + data_elem = [value] * lane_cnt - # If val is type of list, generate constant data + # If value is type of list, generate constant data # according to combination of list contents and number of lanes - elif isinstance(val, list): + elif isinstance(value, list): # If it is an empty list, generate all constant data with 0x00 - if len(val) == 0: + if len(value) == 0: return self.v128_const('0x00', lane_type) data_elem = [] - # Calculate the number of times each element in val is copied - times = lane_cnt // len(val) + # Calculate the number of times each element in value is copied + times = lane_cnt // len(value) # Calculate whether the data needs to be filled according to - # the number of elements in the val list and the number of lanes. - complement = lane_cnt % len(val) + # the number of elements in the value list and the number of lanes. + complement = lane_cnt % len(value) complement_item = '' - # If the number of elements in the val list is greater than the number of lanes, - # paste data with the number of lanes from the val list. + # If the number of elements in the value list is greater than the number of lanes, + # paste data with the number of lanes from the value list. if times == 0: times = 1 complement = 0 - val = val[0:lane_cnt] + value = value[0:lane_cnt] # Copy data - for item in val: + for item in value: data_elem.extend([item] * times) complement_item = item @@ -80,4 +80,4 @@ def v128_const(self, val, lane_type): data_elem = ' '.join(data_elem) # Returns v128 constant text - return self.V128_CONST.format(lane_type, data_elem) \ No newline at end of file + return self.V128_CONST.format(lane_type=lane_type, value=data_elem) \ No newline at end of file diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index ea349238ee..0e84327b47 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -257,7 +257,7 @@ def combine_binary_arith_test_data(self): ] } - def gen_test_fn_template(self): + def gen_test_func_template(self): template = [ ';; Tests for {} arithmetic operations on major boundary values and all special values.\n\n'.format( self.LANE_TYPE), '(module'] @@ -273,7 +273,7 @@ def gen_test_fn_template(self): return template def gen_test_template(self): - template = self.gen_test_fn_template() + template = self.gen_test_func_template() template.append('{normal_cases}') template.append('\n{invalid_cases}') @@ -313,73 +313,73 @@ def get_case_data(self): def get_invalid_cases(self): invalid_cases = [';; type check'] unary_template = '(assert_invalid (module (func (result v128) '\ - '({}.{} ({})))) "type mismatch")' + '({lane_type}.{op} ({operand})))) "type mismatch")' binary_template = '(assert_invalid (module (func (result v128) '\ - '({}.{} ({}) ({})))) "type mismatch")' + '({lane_type}.{op} ({operand_1}) ({operand_2})))) "type mismatch")' for op in self.UNARY_OPS: - invalid_cases.append(unary_template.format(self.LANE_TYPE, op, - 'i32.const 0')) + invalid_cases.append(unary_template.format(lane_type=self.LANE_TYPE, op=op, + operand='i32.const 0')) for op in self.BINARY_OPS: - invalid_cases.append(binary_template.format(self.LANE_TYPE, op, - 'i32.const 0', - 'f32.const 0.0')) + invalid_cases.append(binary_template.format(lane_type=self.LANE_TYPE, op=op, + operand_1='i32.const 0', + operand_2='f32.const 0.0')) return '\n'.join(invalid_cases) def get_combine_cases(self): combine_cases = [';; combination\n(module'] - ternary_fn_template = ' (func (export "{fn}") (param v128 v128 v128) (result v128)\n' \ + ternary_func_template = ' (func (export "{func}") (param v128 v128 v128) (result v128)\n' \ ' ({lane}.{op1} ({lane}.{op2} (local.get 0) (local.get 1))'\ '(local.get 2)))' - for fn_name in sorted(self.combine_ternary_arith_test_data): - fn_parts = fn_name.split('-') - combine_cases.append(ternary_fn_template.format(fn=fn_name, + for func in sorted(self.combine_ternary_arith_test_data): + func_parts = func.split('-') + combine_cases.append(ternary_func_template.format(func=func, lane=self.LANE_TYPE, - op1=fn_parts[0], - op2=fn_parts[1])) - binary_fn_template = ' (func (export "{fn}") (param v128 v128) (result v128)\n'\ + op1=func_parts[0], + op2=func_parts[1])) + binary_func_template = ' (func (export "{func}") (param v128 v128) (result v128)\n'\ ' ({lane}.{op1} ({lane}.{op2} (local.get 0)) (local.get 1)))' - for fn_name in sorted(self.combine_binary_arith_test_data): - fn_parts = fn_name.split('-') - combine_cases.append(binary_fn_template.format(fn=fn_name, + for func in sorted(self.combine_binary_arith_test_data): + func_parts = func.split('-') + combine_cases.append(binary_func_template.format(func=func, lane=self.LANE_TYPE, - op1=fn_parts[0], - op2=fn_parts[1])) + op1=func_parts[0], + op2=func_parts[1])) combine_cases.append(')\n') - ternary_case_template = ('(assert_return (invoke "{}" ', - '(v128.const {} {})', - '(v128.const {} {})', - '(v128.const {} {}))', - '(v128.const {} {}))') - for fn_name, test in sorted(self.combine_ternary_arith_test_data.items()): - line_head = ternary_case_template[0].format(fn_name) + ternary_case_template = ('(assert_return (invoke "{func}" ', + '(v128.const {lane_type_1} {val_1})', + '(v128.const {lane_type_2} {val_2})', + '(v128.const {lane_type_3} {val_3}))', + '(v128.const {lane_type_4} {val_4}))') + for func, test in sorted(self.combine_ternary_arith_test_data.items()): + line_head = ternary_case_template[0].format(func=func) line_head_len = len(line_head) blank_head = ' ' * line_head_len combine_cases.append('\n'.join([ line_head + ternary_case_template[1].format( - self.LANE_TYPE, ' '.join(test[0])), + lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), blank_head + ternary_case_template[2].format( - self.LANE_TYPE, ' '.join(test[1])), + lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), blank_head + ternary_case_template[3].format( - self.LANE_TYPE, ' '.join(test[2])), + lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2])), blank_head + ternary_case_template[4].format( - self.LANE_TYPE, ' '.join(test[3]))])) - binary_case_template = ('(assert_return (invoke "{}" ', - '(v128.const {} {})', - '(v128.const {} {}))', - '(v128.const {} {}))') - for fn_name, test in sorted(self.combine_binary_arith_test_data.items()): - line_head = binary_case_template[0].format(fn_name) + lane_type_4=self.LANE_TYPE, val_4=' '.join(test[3]))])) + binary_case_template = ('(assert_return (invoke "{func}" ', + '(v128.const {lane_type_1} {val_1})', + '(v128.const {lane_type_2} {val_2}))', + '(v128.const {lane_type_3} {val_3}))') + for func, test in sorted(self.combine_binary_arith_test_data.items()): + line_head = binary_case_template[0].format(func=func) line_head_len = len(line_head) blank_head = ' ' * line_head_len combine_cases.append('\n'.join([ line_head + binary_case_template[1].format( - self.LANE_TYPE, ' '.join(test[0])), + lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), blank_head + binary_case_template[2].format( - self.LANE_TYPE, ' '.join(test[1])), + lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), blank_head + binary_case_template[3].format( - self.LANE_TYPE, ' '.join(test[2]))])) + lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2]))])) return '\n'.join(combine_cases) def get_normal_case(self): diff --git a/test/core/simd/meta/simd_bitwise.py b/test/core/simd/meta/simd_bitwise.py index 0ddb818bc0..864e197cd5 100644 --- a/test/core/simd/meta/simd_bitwise.py +++ b/test/core/simd/meta/simd_bitwise.py @@ -128,7 +128,7 @@ def get_invalid_case(self): lst_ipr = self.init_case_data(case_data) str_invalid_case_func_tpl = '\n(assert_invalid (module (func (result v128)' \ - ' ({} {}))) "type mismatch")' + ' ({op} {operand}))) "type mismatch")' lst_invalid_case_func = [] @@ -139,7 +139,7 @@ def get_invalid_case(self): continue else: lst_invalid_case_func.append( - str_invalid_case_func_tpl.format(ipr[0], ' '.join(ipr[1])) + str_invalid_case_func_tpl.format(op=ipr[0], operand=' '.join(ipr[1])) ) return '\n{}\n'.format(''.join(lst_invalid_case_func)) @@ -149,21 +149,21 @@ def get_combination_case(self): Generate combination case with test data """ - str_in_block_case_func_tpl = '\n (func (export "{}-in-block")' \ + str_in_block_case_func_tpl = '\n (func (export "{op}-in-block")' \ '\n (block' \ '\n (drop' \ '\n (block (result v128)' \ - '\n ({}' \ - '{}' \ + '\n ({op}' \ + '{block_with_result}' \ '\n )' \ '\n )' \ '\n )' \ '\n )' \ '\n )' - str_nested_case_func_tpl = '\n (func (export "nested-{}")' \ + str_nested_case_func_tpl = '\n (func (export "nested-{op}")' \ '\n (drop' \ - '\n ({}' \ - '{}' \ + '\n ({op}' \ + '{block_with_result}' \ '\n )' \ '\n )' \ '\n )' @@ -187,23 +187,23 @@ def get_combination_case(self): lst_block = ['\n (block (result v128) (v128.load {}))'.format(x) for x in ipr[1]] lst_in_block_case_func.append( - str_in_block_case_func_tpl.format(ipr[0], ipr[0], ''.join(lst_block)) + str_in_block_case_func_tpl.format(op=ipr[0], block_with_result=''.join(lst_block)) ) - tpl_1 = '\n ({}' \ - '{}' \ + tpl_1 = '\n ({op}' \ + '{combined_operation}' \ '\n )' - tpl_2 = '\n ({}' \ - '{}' \ + tpl_2 = '\n ({op}' \ + '{combined_operation}' \ '\n )' - tpl_3 = '\n (v128.load {})' + tpl_3 = '\n (v128.load {value})' - lst_tpl_3 = [tpl_3.format(x) for x in ipr[1]] - lst_tpl_2 = [tpl_2.format(ipr[0], ''.join(lst_tpl_3))] * len(ipr[1]) - lst_tpl_1 = [tpl_1.format(ipr[0], ''.join(lst_tpl_2))] * len(ipr[1]) + lst_tpl_3 = [tpl_3.format(value=x) for x in ipr[1]] + lst_tpl_2 = [tpl_2.format(op=ipr[0], combined_operation=''.join(lst_tpl_3))] * len(ipr[1]) + lst_tpl_1 = [tpl_1.format(op=ipr[0], combined_operation=''.join(lst_tpl_2))] * len(ipr[1]) lst_nested_case_func.append( - str_nested_case_func_tpl.format(ipr[0], ipr[0], ''.join(lst_tpl_1)) + str_nested_case_func_tpl.format(op=ipr[0], block_with_result=''.join(lst_tpl_1)) ) lst_in_block_case_assert.append('\n(assert_return (invoke "{}-in-block"))'.format(ipr[0])) @@ -211,8 +211,8 @@ def get_combination_case(self): return '\n;; Combination\n' \ '\n(module (memory 1)' \ - '{}' \ - '{}' \ + '{in_block_cases}' \ + '{nested_cases}' \ '\n (func (export "as-param")' \ '\n (drop' \ '\n (v128.or' \ @@ -239,12 +239,12 @@ def get_combination_case(self): '\n )' \ '\n )' \ '\n)' \ - '{}' \ - '{}' \ - '\n(assert_return (invoke "as-param"))\n'.format(''.join(lst_in_block_case_func), - ''.join(lst_nested_case_func), - ''.join(lst_in_block_case_assert), - ''.join(lst_nested_case_assert)) + '{assert_in_block_cases}' \ + '{assert_of_nested_cases}' \ + '\n(assert_return (invoke "as-param"))\n'.format(in_block_cases=''.join(lst_in_block_case_func), + nested_cases=''.join(lst_nested_case_func), + assert_in_block_cases=''.join(lst_in_block_case_assert), + assert_of_nested_cases=''.join(lst_nested_case_assert)) def get_all_cases(self): """ diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index cd8f64b751..974427012b 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -21,26 +21,27 @@ class Simdf32x4Case(Simdf32x4ArithmeticCase): ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') - binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') - unary_param_template = ('({} (invoke "{}" ', '{})', '{})') - binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') - unary_nan_template = ('({} (invoke "{}" ', '{}))') + binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') + unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') + binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') + unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') + def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @staticmethod - def v128_const(lane, val): + def v128_const(lane, value): - return SIMD().v128_const(val, lane) + return SIMD().v128_const(value, lane) - def gen_test_fn_template(self): + def gen_test_func_template(self): # Get function code - template = Simdf32x4ArithmeticCase.gen_test_fn_template(self) + template = Simdf32x4ArithmeticCase.gen_test_func_template(self) # Function template - tpl_func = ' (func (export "{}"){} (result v128) ({} {}{}))' + tpl_func = ' (func (export "{func}"){params} (result v128) ({op} {operand_1}{operand_2}))' # Const data for min and max lst_instr_with_const = [ @@ -76,18 +77,18 @@ def gen_test_fn_template(self): # Add const vs const cases for case_data in lst_instr_with_const: - func_name = "{}_with_const_{}".format(op_name, len(template)-7) + func = "{op}_with_const_{index}".format(op=op_name, index=len(template)-7) template.insert(len(template)-1, - tpl_func.format(func_name, '', op_name, - self.v128_const('f32x4', case_data[0][0]), - ' ' + self.v128_const('f32x4', case_data[0][1]))) + tpl_func.format(func=func, params='', op=op_name, + operand_1=self.v128_const('f32x4', case_data[0][0]), + operand_2=' ' + self.v128_const('f32x4', case_data[0][1]))) ret_idx = 0 if op == 'min' else 1 if op not in lst_oprt_with_const_assert: lst_oprt_with_const_assert[op] = [] - lst_oprt_with_const_assert[op].append([func_name, case_data[1][ret_idx]]) + lst_oprt_with_const_assert[op].append([func, case_data[1][ret_idx]]) # Add comment for the case script " ;; [f32x4.min, f32x4.max] param vs const" template.insert(len(template)-1, ' ;; {} param vs const'.format(op_name)) @@ -97,35 +98,36 @@ def gen_test_fn_template(self): # Add param vs const cases for case_data in lst_instr_with_const: - func_name = "{}_with_const_{}".format(op_name, len(template)-7) + func = "{}_with_const_{}".format(op_name, len(template)-7) # Cross parameters and constants if case_cnt in (0, 3): - func_param_0 = '(local.get 0)' - func_param_1 = self.v128_const('f32x4', case_data[0][0]) + operand_1 = '(local.get 0)' + operand_2 = self.v128_const('f32x4', case_data[0][0]) else: - func_param_0 = self.v128_const('f32x4', case_data[0][0]) - func_param_1 = '(local.get 0)' + operand_1 = self.v128_const('f32x4', case_data[0][0]) + operand_2 = '(local.get 0)' template.insert(len(template)-1, - tpl_func.format(func_name, '(param v128)', op_name, func_param_0, ' ' + func_param_1)) + tpl_func.format(func=func, params='(param v128)', op=op_name, + operand_1=operand_1, operand_2=' ' + operand_2)) ret_idx = 0 if op == 'min' else 1 if op not in lst_oprt_with_const_assert: lst_oprt_with_const_assert[op] = [] - lst_oprt_with_const_assert[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) + lst_oprt_with_const_assert[op].append([func, case_data[0][1], case_data[1][ret_idx]]) case_cnt += 1 # Generate func for abs op_name = self.full_op_name('abs') - func_name = "{}_with_const".format(op_name) + func = "{}_with_const".format(op_name) template.insert(len(template)-1, '') template.insert(len(template)-1, - tpl_func.format(func_name, '', op_name, - self.v128_const('f32x4', ['-0', '-1', '-2', '-3']), '')) + tpl_func.format(func=func, params='', op=op_name, + operand_1=self.v128_const('f32x4', ['-0', '-1', '-2', '-3']), operand_2='')) # Test different lanes go through different if-then clauses lst_diff_lane_vs_clause = [ @@ -159,16 +161,16 @@ def gen_test_fn_template(self): case_cnt = 0 # Template for func name to extract a lane - tpl_func_name_by_lane = 'call_indirect_vv_v_f32x4_extract_lane_{}' + tpl_func_by_lane = 'call_indirect_vv_v_f32x4_extract_lane_{}' # Template for assert - tpl_assert = '({}\n' \ - ' (invoke "{}"\n' \ - ' {}\n' \ - ' {}\n' \ - ' {}\n' \ + tpl_assert = '({assert_type}\n' \ + ' (invoke "{func}"\n' \ + ' {operand_1}\n' \ + ' {operand_2}\n' \ + ' {operand_3}\n' \ ' )\n' \ - '{}' \ + '{expected_result}' \ ')' lst_diff_lane_vs_clause_assert = [] @@ -219,7 +221,7 @@ def gen_test_fn_template(self): for case_data in lst_diff_lane_vs_clause: - lst_diff_lane_vs_clause_assert.append(';; {} {}'.format(case_data[0], case_cnt)) + lst_diff_lane_vs_clause_assert.append(';; {lane_type} {index}'.format(lane_type=case_data[0], index=case_cnt)) # generate assert for every data lane for lane_idx in range(0, len(case_data[2][0])): @@ -232,20 +234,20 @@ def gen_test_fn_template(self): # append assert if 'nan' in ret: - lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return_canonical_nan', - tpl_func_name_by_lane.format(lane_idx), - self.v128_const('f32x4', case_data[1][0]), - self.v128_const('f32x4', case_data[1][1]), - self.v128_const('i32', idx_func), - '')) + lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return_canonical_nan', + func=tpl_func_by_lane.format(lane_idx), + operand_1=self.v128_const('f32x4', case_data[1][0]), + operand_2=self.v128_const('f32x4', case_data[1][1]), + operand_3=self.v128_const('i32', idx_func), + expected_result='')) else: - lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return', - tpl_func_name_by_lane.format(lane_idx), - self.v128_const('f32x4', case_data[1][0]), - self.v128_const('f32x4', case_data[1][1]), - self.v128_const('i32', idx_func), - ' '+self.v128_const('f32', ret)+'\n')) + lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return', + func=tpl_func_by_lane.format(lane_idx), + operand_1=self.v128_const('f32x4', case_data[1][0]), + operand_2=self.v128_const('f32x4', case_data[1][1]), + operand_3=self.v128_const('i32', idx_func), + expected_result=' '+self.v128_const('f32', ret)+'\n')) case_cnt += 1 if case_cnt == 2: @@ -274,9 +276,9 @@ def gen_test_fn_template(self): # Generate and append f32x4.abs assert op_name = self.full_op_name('abs') - func_name = "{}_with_const".format(op_name) + func = "{}_with_const".format(op_name) template.append('') - template.append(str(AssertReturn(func_name, [], self.v128_const('f32x4', ['0', '1', '2', '3'])))) + template.append(str(AssertReturn(func, [], self.v128_const('f32x4', ['0', '1', '2', '3'])))) template.extend(lst_diff_lane_vs_clause_assert) @@ -411,7 +413,7 @@ def get_unknown_operator_case(self, cases): """ tpl_assert = "(assert_malformed (module quote \"(memory 1) (func (result v128) " \ - "({}.{} {}))\") \"unknown operator\")" + "({lane_type}.{op} {value}))\") \"unknown operator\")" unknown_op_cases = ['\n\n;; Unknown operators\n'] cases.extend(unknown_op_cases) @@ -419,10 +421,10 @@ def get_unknown_operator_case(self, cases): for lane_type in ['i8x16', 'i16x8', 'i32x4']: for op in self.UNARY_OPS: - cases.append(tpl_assert.format(lane_type, op, self.v128_const('i32x4', '0'))) + cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=self.v128_const('i32x4', '0'))) for op in self.BINARY_OPS: - cases.append(tpl_assert.format(lane_type, op, ' '.join([self.v128_const('i32x4', '0')]*2))) + cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=' '.join([self.v128_const('i32x4', '0')]*2))) def gen_test_cases(self): wast_filename = '../simd_{lane_type}.wast'.format(lane_type=self.LANE_TYPE) diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py index 720f57877c..4d3466d9fd 100644 --- a/test/core/simd/meta/simd_f32x4_arith.py +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -26,17 +26,17 @@ class Simdf32x4ArithmeticCase(SimdArithmeticCase): ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') - binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') - unary_param_template = ('({} (invoke "{}" ', '{})', '{})') - binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') - unary_nan_template = ('({} (invoke "{}" ', '{}))') + binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') + unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') + binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') + unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @staticmethod - def v128_const(lane, val): - return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * 4)) + def v128_const(lane, value): + return '(v128.const {lane_type} {value})'.format(lane_type=lane, value=' '.join([str(value)] * 4)) @property def combine_ternary_arith_test_data(self): @@ -107,22 +107,22 @@ def single_binary_test(self, case): arg2 = self.v128_const(self.LANE_TYPE, case[3]) if len(case) == 4: - line_head = self.binary_nan_template[0].format(case[0], op_name) + line_head = self.binary_nan_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len lines = [ - line_head + self.binary_nan_template[1].format(arg1), - blank_head + self.binary_nan_template[2].format(arg2) + line_head + self.binary_nan_template[1].format(operand_1=arg1), + blank_head + self.binary_nan_template[2].format(operand_2=arg2) ] elif len(case) == 5: - line_head = self.binary_params_template[0].format(case[0], op_name) + line_head = self.binary_params_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len result = self.v128_const(self.LANE_TYPE, case[-1]) lines = [ - line_head + self.binary_params_template[1].format(arg1), - blank_head + self.binary_params_template[2].format(arg2), - blank_head + self.binary_params_template[3].format(result) + line_head + self.binary_params_template[1].format(operand_1=arg1), + blank_head + self.binary_params_template[2].format(operand_2=arg2), + blank_head + self.binary_params_template[3].format(expected_result=result) ] else: raise Exception('Invalid format for the test case!') @@ -139,18 +139,18 @@ def single_unary_test(self, case): arg = self.v128_const(self.LANE_TYPE, case[2]) if len(case) == 3: - line_head = self.unary_nan_template[0].format(case[0], op_name) + line_head = self.unary_nan_template[0].format(assert_type=case[0], func=op_name) lines = [ - line_head + self.unary_nan_template[1].format(arg) + line_head + self.unary_nan_template[1].format(operand=arg) ] elif len(case) == 4: - line_head = self.unary_param_template[0].format(case[0], op_name) + line_head = self.unary_param_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len result = self.v128_const(self.LANE_TYPE, case[-1]) lines = [ - line_head + self.unary_param_template[1].format(arg), - blank_head + self.unary_param_template[2].format(result) + line_head + self.unary_param_template[1].format(operand=arg), + blank_head + self.unary_param_template[2].format(expected_result=result) ] else: raise Exception('Invalid format for the test case!') @@ -255,38 +255,38 @@ def mixed_nan_test(self, cases): mixed_cases = ['\n\n;; Mixed f32x4 tests when some lanes are NaNs', '(module\n'] cases.extend(mixed_cases) for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): - func = [' (func $f32x4_sqrt_{} (result v128)'.format(test_type), - ' v128.const f32x4 {}'.format(test_data[0]), + func = [' (func $f32x4_sqrt_{test_type} (result v128)'.format(test_type=test_type), + ' v128.const f32x4 {value}'.format(value=test_data[0]), ' f32x4.sqrt)'] cases.extend(func) for i, test in enumerate(test_data[1]): - test = [' (func (export "f32x4_extract_lane_{}_{}") (result f32)'.format( - test_type, i), - ' (f32x4.extract_lane {} (call $f32x4_sqrt_{})))'.format( - i, test_type)] + test = [' (func (export "f32x4_extract_lane_{test_type}_{index}") (result f32)'.format( + test_type=test_type, index=i), + ' (f32x4.extract_lane {index} (call $f32x4_sqrt_{test_type})))'.format( + index=i, test_type=test_type)] cases.extend(test) cases.append('') cases.append(')\n') for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): - template = '({} (invoke "f32x4_extract_lane_{}_{}"))' + template = '({assert_type} (invoke "f32x4_extract_lane_{test_type}_{index}"))' for i, result in enumerate(test_data[1]): if test_type == 'canon' and result == 'nan': cases.append(template.format( - 'assert_return_canonical_nan', test_type, i)) + assert_type='assert_return_canonical_nan', test_type=test_type, index=i)) elif test_type == 'arith' and result == 'nan': cases.append(template.format( - 'assert_return_arithmetic_nan', test_type, i)) + assert_type='assert_return_arithmetic_nan', test_type=test_type, index=i)) elif result == 'canon': cases.append(template.format( - 'assert_return_canonical_nan', test_type, i)) + assert_type='assert_return_canonical_nan', test_type=test_type, index=i)) elif result == 'arith': cases.append(template.format( - 'assert_return_arithmetic_nan', test_type, i)) + assert_type='assert_return_arithmetic_nan', test_type=test_type, index=i)) else: cases.append(''.join([ - '({} (invoke "f32x4_extract_lane_{}_{}") '.format( - 'assert_return', test_type, i), + '({assert_type} (invoke "f32x4_extract_lane_{test_type}_{index}") '.format( + assert_type='assert_return', test_type=test_type, index=i), '(f32.const {}))'.format(result)])) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 5b39b8e42e..c9f129f631 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -20,13 +20,13 @@ class Simdf64x2Case(Simdf32x4Case): NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') - def gen_test_fn_template(self): + def gen_test_func_template(self): # Get function code - template = Simdf32x4ArithmeticCase.gen_test_fn_template(self) + template = Simdf32x4ArithmeticCase.gen_test_func_template(self) # Function template - tpl_func = ' (func (export "{}"){} (result v128) ({} {}{}))' + tpl_func = ' (func (export "{func}"){params} (result v128) ({op} {operand_1}{operand_2}))' # Raw data list specific for "const vs const" and "param vs const" tests const_test_raw_data = [ @@ -79,18 +79,18 @@ def gen_test_fn_template(self): # Add const vs const cases for case_data in const_test_raw_data: - func_name = "{}_with_const_{}".format(op_name, len(template)-7) + func = "{op}_with_const_{index}".format(op=op_name, index=len(template)-7) template.insert(len(template)-1, - tpl_func.format(func_name, '', op_name, - self.v128_const('f64x2', case_data[0][0]), - ' ' + self.v128_const('f64x2', case_data[0][1]))) + tpl_func.format(func=func, params='', op=op_name, + operand_1=self.v128_const('f64x2', case_data[0][0]), + operand_2=' ' + self.v128_const('f64x2', case_data[0][1]))) ret_idx = 0 if op == 'min' else 1 if op not in const_test_data: const_test_data[op] = [] - const_test_data[op].append([func_name, case_data[1][ret_idx]]) + const_test_data[op].append([func, case_data[1][ret_idx]]) # Add comment for the case script " ;; [f64x2.min, f64x2.max] param vs const" template.insert(len(template)-1, ' ;; {} param vs const'.format(op_name)) @@ -100,39 +100,40 @@ def gen_test_fn_template(self): # Add param vs const cases for case_data in const_test_raw_data: - func_name = "{}_with_const_{}".format(op_name, len(template)-7) + func = "{op}_with_const_{index}".format(op=op_name, index=len(template)-7) # Cross parameters and constants if case_cnt in (0, 3): - func_param_0 = '(local.get 0)' - func_param_1 = self.v128_const('f64x2', case_data[0][0]) + operand_1 = '(local.get 0)' + operand_2 = self.v128_const('f64x2', case_data[0][0]) else: - func_param_0 = self.v128_const('f64x2', case_data[0][0]) - func_param_1 = '(local.get 0)' + operand_1 = self.v128_const('f64x2', case_data[0][0]) + operand_2 = '(local.get 0)' template.insert(len(template)-1, - tpl_func.format(func_name, ' (param v128)', op_name, func_param_0, ' ' + func_param_1)) + tpl_func.format(func=func, params=' (param v128)', op=op_name, + operand_1=operand_1, operand_2=' ' + operand_2)) ret_idx = 0 if op == 'min' else 1 if op not in const_test_data: const_test_data[op] = [] - const_test_data[op].append([func_name, case_data[0][1], case_data[1][ret_idx]]) + const_test_data[op].append([func, case_data[0][1], case_data[1][ret_idx]]) case_cnt += 1 # Generate func for abs op_name = self.full_op_name('abs') template.insert(len(template)-1, '') - func_name = "{}_with_const_{}".format(op_name, 35) + func = "{op}_with_const_{index}".format(op=op_name, index=35) template.insert(len(template)-1, - tpl_func.format(func_name, '', op_name, - self.v128_const('f64x2', ['-0', '-1']), '')) - func_name = "{}_with_const_{}".format(op_name, 36) + tpl_func.format(func=func, params='', op=op_name, + operand_1=self.v128_const('f64x2', ['-0', '-1']), operand_2='')) + func = "{op}_with_const_{index}".format(op=op_name, index=36) template.insert(len(template)-1, - tpl_func.format(func_name, '', op_name, - self.v128_const('f64x2', ['-2', '-3']), '')) + tpl_func.format(func=func, params='', op=op_name, + operand_1=self.v128_const('f64x2', ['-2', '-3']), operand_2='')) # Test different lanes go through different if-then clauses lst_diff_lane_vs_clause = [ @@ -178,16 +179,16 @@ def gen_test_fn_template(self): case_cnt = 0 # Template for func name to extract a lane - tpl_func_name_by_lane = 'call_indirect_vv_v_f64x2_extract_lane_{}' + tpl_func_by_lane = 'call_indirect_vv_v_f64x2_extract_lane_{}' # Template for assert - tpl_assert = '({}\n' \ - ' (invoke "{}"\n' \ - ' {}\n' \ - ' {}\n' \ - ' {}\n' \ + tpl_assert = '({assert_type}\n' \ + ' (invoke "{func}"\n' \ + ' {operand_1}\n' \ + ' {operand_2}\n' \ + ' {operand_3}\n' \ ' )\n' \ - '{}' \ + '{expected_result}' \ ')' lst_diff_lane_vs_clause_assert = [] @@ -239,20 +240,20 @@ def gen_test_fn_template(self): # append assert if 'nan' in ret: - lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return_canonical_nan', - tpl_func_name_by_lane.format(lane_idx), - self.v128_const('f64x2', case_data[1][0]), - self.v128_const('f64x2', case_data[1][1]), - self.v128_const('i32', idx_func), - '')) + lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return_canonical_nan', + func=tpl_func_by_lane.format(lane_idx), + operand_1=self.v128_const('f64x2', case_data[1][0]), + operand_2=self.v128_const('f64x2', case_data[1][1]), + operand_3=self.v128_const('i32', idx_func), + expected_result='')) else: - lst_diff_lane_vs_clause_assert.append(tpl_assert.format('assert_return', - tpl_func_name_by_lane.format(lane_idx), - self.v128_const('f64x2', case_data[1][0]), - self.v128_const('f64x2', case_data[1][1]), - self.v128_const('i32', idx_func), - ' '+self.v128_const('f64', ret)+'\n')) + lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return', + func=tpl_func_by_lane.format(lane_idx), + operand_1=self.v128_const('f64x2', case_data[1][0]), + operand_2=self.v128_const('f64x2', case_data[1][1]), + operand_3=self.v128_const('i32', idx_func), + expected_result=' '+self.v128_const('f64', ret)+'\n')) case_cnt += 1 if case_cnt == 2: @@ -282,10 +283,10 @@ def gen_test_fn_template(self): # Generate and append f64x2.abs assert op_name = self.full_op_name('abs') template.append('') - func_name = "{}_with_const_{}".format(op_name, 35) - template.append(str(AssertReturn(func_name, [], self.v128_const('f64x2', ['0', '1'])))) - func_name = "{}_with_const_{}".format(op_name, 36) - template.append(str(AssertReturn(func_name, [], self.v128_const('f64x2', ['2', '3'])))) + func = "{op}_with_const_{index}".format(op=op_name, index=35) + template.append(str(AssertReturn(func, [], self.v128_const('f64x2', ['0', '1'])))) + func = "{op}_with_const_{index}".format(op=op_name, index=36) + template.append(str(AssertReturn(func, [], self.v128_const('f64x2', ['2', '3'])))) template.extend(lst_diff_lane_vs_clause_assert) @@ -443,4 +444,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f64x2_arith.py b/test/core/simd/meta/simd_f64x2_arith.py index b565d7e3ba..6f4c92c932 100644 --- a/test/core/simd/meta/simd_f64x2_arith.py +++ b/test/core/simd/meta/simd_f64x2_arith.py @@ -28,8 +28,8 @@ class Simdf64x2ArithmeticCase(Simdf32x4ArithmeticCase): NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') @staticmethod - def v128_const(lane, val): - return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * 2)) + def v128_const(lane, value): + return '(v128.const {lane_type} {value})'.format(lane_type=lane, value=' '.join([str(value)] * 2)) @property def combine_ternary_arith_test_data(self): diff --git a/test/core/simd/meta/simd_f64x2_cmp.py b/test/core/simd/meta/simd_f64x2_cmp.py index 63f5c2f59a..7ad6032381 100644 --- a/test/core/simd/meta/simd_f64x2_cmp.py +++ b/test/core/simd/meta/simd_f64x2_cmp.py @@ -31,18 +31,19 @@ class Simdf64x2CmpCase(SimdArithmeticCase): NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') - binary_params_template = ('({} (invoke "{}" ', '{}', '{})', '{})') - unary_param_template = ('({} (invoke "{}" ', '{})', '{})') - binary_nan_template = ('({} (invoke "{}" ', '{}', '{}))') - unary_nan_template = ('({} (invoke "{}" ', '{}))') + binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') + unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') + binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') + unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') + def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @staticmethod - def v128_const(lane, val): + def v128_const(lane, value): lane_cnt = 2 if lane in ['f64x2', 'i64x2'] else 4 - return '(v128.const {} {})'.format(lane, ' '.join([str(val)] * lane_cnt)) + return '(v128.const {lane_type} {value})'.format(lane_type=lane, value=' '.join([str(value)] * lane_cnt)) @property def combine_ternary_arith_test_data(self): @@ -63,22 +64,22 @@ def single_binary_test(self, case): arg2 = self.v128_const(self.LANE_TYPE, case[3]) if len(case) == 4: - line_head = self.binary_nan_template[0].format(case[0], op_name) + line_head = self.binary_nan_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len lines = [ - line_head + self.binary_nan_template[1].format(arg1), - blank_head + self.binary_nan_template[2].format(arg2) + line_head + self.binary_nan_template[1].format(operand_1=arg1), + blank_head + self.binary_nan_template[2].format(operand_2=arg2) ] elif len(case) == 5: - line_head = self.binary_params_template[0].format(case[0], op_name) + line_head = self.binary_params_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len result = self.v128_const('i64x2', case[-1]) lines = [ - line_head + self.binary_params_template[1].format(arg1), - blank_head + self.binary_params_template[2].format(arg2), - blank_head + self.binary_params_template[3].format(result) + line_head + self.binary_params_template[1].format(operand_1=arg1), + blank_head + self.binary_params_template[2].format(operand_2=arg2), + blank_head + self.binary_params_template[3].format(expected_result=result) ] else: raise Exception('Invalid format for the test case!') @@ -95,18 +96,18 @@ def single_unary_test(self, case): arg = self.v128_const(self.LANE_TYPE, case[2]) if len(case) == 3: - line_head = self.unary_nan_template[0].format(case[0], op_name) + line_head = self.unary_nan_template[0].format(assert_type=case[0], func=op_name) lines = [ - line_head + self.unary_nan_template[1].format(arg) + line_head + self.unary_nan_template[1].format(operand=arg) ] elif len(case) == 4: - line_head = self.unary_param_template[0].format(case[0], op_name) + line_head = self.unary_param_template[0].format(assert_type=case[0], func=op_name) line_head_len = len(line_head) blank_head = ' ' * line_head_len result = self.v128_const(self.LANE_TYPE, case[-1]) lines = [ - line_head + self.unary_param_template[1].format(arg), - blank_head + self.unary_param_template[2].format(result) + line_head + self.unary_param_template[1].format(operand=arg), + blank_head + self.unary_param_template[2].format(expected_result=result) ] else: raise Exception('Invalid format for the test case!') @@ -117,11 +118,11 @@ def get_combine_cases(self): combine_cases = [';; combination\n(module (memory 1)'] # append funcs - binary_fn_template = ' (func (export "{}-in-block")\n' \ + binary_func_template = ' (func (export "{op}-in-block")\n' \ ' (block\n' \ ' (drop\n' \ ' (block (result v128)\n' \ - ' ({}\n' \ + ' ({op}\n' \ ' (block (result v128) (v128.load (i32.const 0)))\n' \ ' (block (result v128) (v128.load (i32.const 1)))\n' \ ' )\n' \ @@ -129,28 +130,28 @@ def get_combine_cases(self): ' )\n' \ ' )\n' \ ' )' - for fn_name in self.combine_binary_arith_test_data: - combine_cases.append(binary_fn_template.format(fn_name, fn_name)) + for func in self.combine_binary_arith_test_data: + combine_cases.append(binary_func_template.format(op=func)) - binary_fn_template = ' (func (export "nested-{fn}")\n' \ + binary_func_template = ' (func (export "nested-{func}")\n' \ ' (drop\n' \ - ' ({fn}\n' \ - ' ({fn}\n' \ - ' ({fn}\n' \ + ' ({func}\n' \ + ' ({func}\n' \ + ' ({func}\n' \ ' (v128.load (i32.const 0))\n' \ ' (v128.load (i32.const 1))\n' \ ' )\n' \ - ' ({fn}\n' \ + ' ({func}\n' \ ' (v128.load (i32.const 2))\n' \ ' (v128.load (i32.const 3))\n' \ ' )\n' \ ' )\n' \ - ' ({fn}\n' \ - ' ({fn}\n' \ + ' ({func}\n' \ + ' ({func}\n' \ ' (v128.load (i32.const 0))\n' \ ' (v128.load (i32.const 1))\n' \ ' )\n' \ - ' ({fn}\n' \ + ' ({func}\n' \ ' (v128.load (i32.const 2))\n' \ ' (v128.load (i32.const 3))\n' \ ' )\n' \ @@ -159,8 +160,8 @@ def get_combine_cases(self): ' )\n' \ ' )' \ - for fn_name in self.combine_binary_arith_test_data: - combine_cases.append(binary_fn_template.format(fn=fn_name)) + for func in self.combine_binary_arith_test_data: + combine_cases.append(binary_func_template.format(func=func)) combine_cases.append(' (func (export "as-param")\n' ' (drop\n' @@ -192,13 +193,13 @@ def get_combine_cases(self): combine_cases.append(')') # append assert - binary_case_template = ('(assert_return (invoke "{fn}-in-block"))') - for fn_name in self.combine_binary_arith_test_data: - combine_cases.append(binary_case_template.format(fn=fn_name)) + binary_case_template = ('(assert_return (invoke "{func}-in-block"))') + for func in self.combine_binary_arith_test_data: + combine_cases.append(binary_case_template.format(func=func)) - binary_case_template = ('(assert_return (invoke "nested-{fn}"))') - for fn_name in self.combine_binary_arith_test_data: - combine_cases.append(binary_case_template.format(fn=fn_name)) + binary_case_template = ('(assert_return (invoke "nested-{func}"))') + for func in self.combine_binary_arith_test_data: + combine_cases.append(binary_case_template.format(func=func)) combine_cases.append('(assert_return (invoke "as-param"))\n') @@ -246,15 +247,14 @@ def get_unknown_operator_case(self, cases): tpl_assert = "(assert_malformed (module quote \"(memory 1) (func " \ " (param $x v128) (param $y v128) (result v128) " \ - "({}.{} (local.get $x) (local.get $y)))\") \"unknown operator\")" + "({lane_type}.{op} (local.get $x) (local.get $y)))\") \"unknown operator\")" cases.append('\n\n;; unknown operators') for lane_type in ['f2x64']: for op in self.BINARY_OPS: - cases.append(tpl_assert.format(lane_type, - op, - ' '.join([self.v128_const('i32x4', '0')]*2))) + cases.append(tpl_assert.format(lane_type=lane_type, + op=op)) def gen_test_cases(self): wast_filename = '../simd_{lane_type}_cmp.wast'.format(lane_type=self.LANE_TYPE) diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py index bee6744fc9..c7d632467d 100644 --- a/test/core/simd/meta/simd_sat_arith.py +++ b/test/core/simd/meta/simd_sat_arith.py @@ -12,7 +12,7 @@ class SimdSaturateArithmeticCases(SimdArithmeticCase): BINARY_OPS = ('add_saturate_s', 'add_saturate_u', 'sub_saturate_s', 'sub_saturate_u') malformed_template = '(assert_malformed (module quote\n "(func (result v128) ' \ - '({}.{} ({}) ({})))")\n "unknown operator")' + '({lane_type}.{op} ({operand_1}) ({operand_2})))")\n "unknown operator")' def gen_test_cases(self): wast_filename = '../simd_{lane_type}_sat_arith.wast'.format(lane_type=self.LANE_TYPE) @@ -23,11 +23,11 @@ def gen_test_template(self): return super().gen_test_template().replace('{invalid_cases}', '{malformed_cases}\n\n{invalid_cases}') - def v128_const(self, lane, val, lane_len=None): + def v128_const(self, lane, value, lane_len=None): if not lane_len: lane_len = self.LANE_LEN - return 'v128.const {} {}'.format(lane, ' '.join([str(val)] * lane_len)) + return 'v128.const {lane_type} {value}'.format(lane_type=lane, value=' '.join([str(value)] * lane_len)) def get_malformed_cases(self): malformed_cases = [';; Malformed cases: non-existent op names'] @@ -37,8 +37,8 @@ def get_malformed_cases(self): # for saturating integer arithmetic operation for op in inst_ops: malformed_cases.append(self.malformed_template.format( - self.LANE_TYPE, '_'.join([op, 'saturate']), - self.v128_const(self.LANE_TYPE, '1'), self.v128_const(self.LANE_TYPE, '2'))) + lane_type=self.LANE_TYPE, op='_'.join([op, 'saturate']), + operand_1=self.v128_const(self.LANE_TYPE, '1'), operand_2=self.v128_const(self.LANE_TYPE, '2'))) return '\n'.join(malformed_cases) @@ -107,60 +107,60 @@ def combine_binary_arith_test_data(self): def get_combine_cases(self): combine_cases = [';; combination\n(module'] - ternary_fn_template = ' (func (export "{fn}") (param v128 v128 v128) (result v128)\n' \ + ternary_func_template = ' (func (export "{func}") (param v128 v128 v128) (result v128)\n' \ ' ({lane}.{op1} ({lane}.{op2} (local.get 0) (local.get 1))'\ '(local.get 2)))' - for fn_name in sorted(self.combine_ternary_arith_test_data): - fn_parts = fn_name.split('-') - operator1 = fn_parts[1].replace('_', '_saturate_') - operator2 = fn_parts[2].replace('_', '_saturate_') - combine_cases.append(ternary_fn_template.format(fn=fn_name, + for func in sorted(self.combine_ternary_arith_test_data): + func_parts = func.split('-') + op1 = func_parts[1].replace('_', '_saturate_') + op2 = func_parts[2].replace('_', '_saturate_') + combine_cases.append(ternary_func_template.format(func=func, lane=self.LANE_TYPE, - op1=operator1, - op2=operator2)) - binary_fn_template = ' (func (export "{fn}") (param v128 v128) (result v128)\n'\ + op1=op1, + op2=op2)) + binary_func_template = ' (func (export "{func}") (param v128 v128) (result v128)\n'\ ' ({lane}.{op1} ({lane}.{op2} (local.get 0)) (local.get 1)))' - for fn_name in sorted(self.combine_binary_arith_test_data): - fn_parts = fn_name.split('-') - operator1 = fn_parts[1].replace('_', '_saturate_') - combine_cases.append(binary_fn_template.format(fn=fn_name, + for func in sorted(self.combine_binary_arith_test_data): + func_parts = func.split('-') + op1 = func_parts[1].replace('_', '_saturate_') + combine_cases.append(binary_func_template.format(func=func, lane=self.LANE_TYPE, - op1=operator1, - op2=fn_parts[2])) + op1=op1, + op2=func_parts[2])) combine_cases.append(')\n') - ternary_case_template = ('(assert_return (invoke "{}" ', - '(v128.const {} {})', - '(v128.const {} {})', - '(v128.const {} {}))', - '(v128.const {} {}))') - for fn_name, test in sorted(self.combine_ternary_arith_test_data.items()): - line_head = ternary_case_template[0].format(fn_name) + ternary_case_template = ('(assert_return (invoke "{func}" ', + '(v128.const {lane_type_1} {val_1})', + '(v128.const {lane_type_2} {val_2})', + '(v128.const {lane_type_3} {val_3}))', + '(v128.const {lane_type_4} {val_4}))') + for func, test in sorted(self.combine_ternary_arith_test_data.items()): + line_head = ternary_case_template[0].format(func=func) line_head_len = len(line_head) blank_head = ' ' * line_head_len combine_cases.append('\n'.join([ line_head + ternary_case_template[1].format( - self.LANE_TYPE, ' '.join(test[0])), + lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), blank_head + ternary_case_template[2].format( - self.LANE_TYPE, ' '.join(test[1])), + lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), blank_head + ternary_case_template[3].format( - self.LANE_TYPE, ' '.join(test[2])), + lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2])), blank_head + ternary_case_template[4].format( - self.LANE_TYPE, ' '.join(test[3]))])) - binary_case_template = ('(assert_return (invoke "{}" ', - '(v128.const {} {})', - '(v128.const {} {}))', - '(v128.const {} {}))') - for fn_name, test in sorted(self.combine_binary_arith_test_data.items()): - line_head = binary_case_template[0].format(fn_name) + lane_type_4=self.LANE_TYPE, val_4=' '.join(test[3]))])) + binary_case_template = ('(assert_return (invoke "{func}" ', + '(v128.const {lane_type_1} {val_1})', + '(v128.const {lane_type_2} {val_2}))', + '(v128.const {lane_type_3} {val_3}))') + for func, test in sorted(self.combine_binary_arith_test_data.items()): + line_head = binary_case_template[0].format(func=func) line_head_len = len(line_head) blank_head = ' ' * line_head_len combine_cases.append('\n'.join([ line_head + binary_case_template[1].format( - self.LANE_TYPE, ' '.join(test[0])), + lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), blank_head + binary_case_template[2].format( - self.LANE_TYPE, ' '.join(test[1])), + lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), blank_head + binary_case_template[3].format( - self.LANE_TYPE, ' '.join(test[2]))])) + lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2]))])) return '\n'.join(combine_cases) @@ -290,9 +290,9 @@ def get_malformed_cases(self): for op in ['add', 'sub']: for suffix in ['s', 'u']: malformed_cases.append(self.malformed_template.format( - prefix, '_'.join([op, 'saturate', suffix]), - self.v128_const(prefix, '0', lane_len=4), - self.v128_const(prefix, '0', lane_len=4) + lane_type=prefix, op='_'.join([op, 'saturate', suffix]), + operand_1=self.v128_const(prefix, '0', lane_len=4), + operand_2=self.v128_const(prefix, '0', lane_len=4) )) return super().get_malformed_cases() + '\n' + '\n'.join(malformed_cases) diff --git a/test/core/simd/meta/test_assert.py b/test/core/simd/meta/test_assert.py index bbc2580388..8425b46ad4 100644 --- a/test/core/simd/meta/test_assert.py +++ b/test/core/simd/meta/test_assert.py @@ -49,4 +49,4 @@ def __str__(self): white_space = '\n ' + ' ' * head_len results.append(white_space + result) - return '{}{}){})'.format(assert_return, ''.join(params), ''.join(results)) \ No newline at end of file + return '{assert_head}{params}){expected_result})'.format(assert_head=assert_return, params=''.join(params), expected_result=''.join(results)) \ No newline at end of file From 670d94af12642b0e640dfebe5f667c99291fb014 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 4 Dec 2019 03:29:39 +0800 Subject: [PATCH 091/378] Add more literal tests for splat ops (#146) https://github.com/WAVM/WAVM/pull/225 [simd] Add more literal tests for splat ops Part of https://github.com/WAVM/WAVM/issues/195 --- test/core/simd/simd_splat.wast | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast index 0e2acd5c39..721bbca062 100644 --- a/test/core/simd/simd_splat.wast +++ b/test/core/simd/simd_splat.wast @@ -34,6 +34,8 @@ (assert_return (invoke "i16x8.splat" (i32.const 0xffff7fff)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) (assert_return (invoke "i16x8.splat" (i32.const 0x8000)) (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) (assert_return (invoke "i16x8.splat" (i32.const 0xABCD)) (v128.const i32x4 0xABCDABCD 0xABCDABCD 0xABCDABCD 0xABCDABCD)) +(assert_return (invoke "i16x8.splat" (i32.const 012345)) (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) +(assert_return (invoke "i16x8.splat" (i32.const 0x01234)) (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) (assert_return (invoke "i32x4.splat" (i32.const 0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.splat" (i32.const 5)) (v128.const i32x4 5 5 5 5)) @@ -43,6 +45,8 @@ (assert_return (invoke "i32x4.splat" (i32.const -2147483648)) (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) (assert_return (invoke "i32x4.splat" (i32.const 2147483647)) (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) (assert_return (invoke "i32x4.splat" (i32.const 2147483648)) (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.splat" (i32.const 01234567890)) (v128.const i32x4 012_3456_7890 012_3456_7890 012_3456_7890 012_3456_7890)) +(assert_return (invoke "i32x4.splat" (i32.const 0x012345678)) (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) (assert_return (invoke "f32x4.splat" (f32.const 0.0)) (v128.const f32x4 0.0 0.0 0.0 0.0)) (assert_return (invoke "f32x4.splat" (f32.const 1.1)) (v128.const f32x4 1.1 1.1 1.1 1.1)) @@ -58,6 +62,14 @@ (assert_return (invoke "f32x4.splat" (f32.const nan)) (v128.const f32x4 nan nan nan nan)) (assert_return (invoke "f32x4.splat" (f32.const nan:0x1)) (v128.const f32x4 nan:0x1 nan:0x1 nan:0x1 nan:0x1)) (assert_return (invoke "f32x4.splat" (f32.const nan:0x7f_ffff)) (v128.const f32x4 nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff nan:0x7f_ffff)) +(assert_return (invoke "f32x4.splat" (f32.const 0123456789)) (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.splat" (f32.const 0123456789.)) (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.splat" (f32.const 0x0123456789ABCDEF)) (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.splat" (f32.const 0x0123456789ABCDEF.)) (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.splat" (f32.const 0123456789e019)) (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.splat" (f32.const 0123456789.e+019)) (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.splat" (f32.const 0x0123456789ABCDEFp019)) (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.splat" (f32.const 0x0123456789ABCDEF.p-019)) (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) (assert_return (invoke "i64x2.splat" (i64.const 0)) (v128.const i64x2 0 0)) (assert_return (invoke "i64x2.splat" (i64.const -0)) (v128.const i64x2 0 0)) @@ -71,6 +83,8 @@ (assert_return (invoke "i64x2.splat" (i64.const 0xffffffffffffffff)) (v128.const i64x2 -1 -1)) (assert_return (invoke "i64x2.splat" (i64.const -0x8000000000000000)) (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) (assert_return (invoke "i64x2.splat" (i64.const -0x8000000000000000)) (v128.const i64x2 0x8000000000000000 0x8000000000000000)) +(assert_return (invoke "i64x2.splat" (i64.const 01234567890123456789)) (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) +(assert_return (invoke "i64x2.splat" (i64.const 0x01234567890ABcdef)) (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef)) (assert_return (invoke "f64x2.splat" (f64.const 0.0)) (v128.const f64x2 0.0 0.0)) (assert_return (invoke "f64x2.splat" (f64.const -0.0)) (v128.const f64x2 -0.0 -0.0)) @@ -94,7 +108,14 @@ (assert_return (invoke "f64x2.splat" (f64.const -nan)) (v128.const f64x2 -nan -nan)) (assert_return (invoke "f64x2.splat" (f64.const nan:0x4000000000000)) (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) (assert_return (invoke "f64x2.splat" (f64.const -nan:0x4000000000000)) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) - +(assert_return (invoke "f64x2.splat" (f64.const 0123456789)) (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.splat" (f64.const 0123456789.)) (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.splat" (f64.const 0x0123456789ABCDEFabcdef)) (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.splat" (f64.const 0x0123456789ABCDEFabcdef.)) (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.splat" (f64.const 0123456789e019)) (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.splat" (f64.const 0123456789e+019)) (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.splat" (f64.const 0x0123456789ABCDEFabcdef.p019)) (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.splat" (f64.const 0x0123456789ABCDEFabcdef.p-019)) (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) ;; Unknown operator From d254eea5f5d78f0430822bdd60b94f5e40329077 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Thu, 5 Dec 2019 04:33:07 -0500 Subject: [PATCH 092/378] Rounding Average instructions (#126) --- proposals/simd/BinarySIMD.md | 2 ++ proposals/simd/ImplementationStatus.md | 2 ++ proposals/simd/SIMD.md | 15 +++++++++++++++ 3 files changed, 19 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index db0b0d513c..a538bf7df6 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -201,3 +201,5 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i64x2.load32x2_s` | `0xd6`| m:memarg | | `i64x2.load32x2_u` | `0xd7`| m:memarg | | `v128.andnot` | `0xd8`| - | +| `i8x16.avgr_u` | `0xd9`| | +| `i16x8.avgr_u` | `0xda`| | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index de7638aaf4..ab796dd09b 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -91,6 +91,7 @@ | `i8x16.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i8x16.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i8x16.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i8x16.avgr_u` | | | | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -108,6 +109,7 @@ | `i16x8.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i16x8.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | | `i16x8.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i16x8.avgr_u` | | | | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index d6d0401e2a..8b9ef3eebb 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -488,6 +488,21 @@ each pair. def S.max(a, b): return S.lanewise_binary(max, a, b) ``` + +### Lane-wise integer rounding average +* `i8x16.avgr_u(a: v128, b: v128) -> v128` +* `i16x8.avgr_u(a: v128, b: v128) -> v128` + +Lane-wise rounding average: + +```python +def S.RoundingAverage(x, y): + return (x + y + 1) // 2 + +def S.avgr_u(a, b): + return S.lanewise_binary(S.RoundingAverage, S.AsUnsigned(a), S.AsUnsigned(b)) +``` + ## Bit shifts ### Left shift by scalar From 2128bbcf7dad1b318ae98cf4b95bce9b40c1b00f Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 9 Dec 2019 15:01:43 +0800 Subject: [PATCH 093/378] [test] Sync tests from WAVM#231 https://github.com/WAVM/WAVM/pull/231 Add more literal tests for saturate integer arithmetic ops Part of https://github.com/WAVM/WAVM/issues/195 --- test/core/simd/meta/simd_sat_arith.py | 32 +++++++++++++++- test/core/simd/simd_i16x8_sat_arith.wast | 48 ++++++++++++++++++++++++ 2 files changed, 79 insertions(+), 1 deletion(-) diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py index c7d632467d..c5aa27af39 100644 --- a/test/core/simd/meta/simd_sat_arith.py +++ b/test/core/simd/meta/simd_sat_arith.py @@ -322,6 +322,35 @@ def hex_binary_op_test_data(self): def hex_unary_op_test_data(self): return ['0x01', '-0x01', '-0x8000', '-0x7fff', '0x7fff', '0x8000', '0xffff'] + @property + def underscore_literal_test_data(self): + return { + 'i16x8.add_saturate_s': [ + [['012_345', '032_123'], '032_767', ['i16x8'] * 3], + [['012_345', '056_789'], '03_598', ['i16x8'] * 3], + [['0x0_1234', '0x0_5678'], '0x0_68ac', ['i16x8'] * 3], + [['0x0_90AB', '0x0_cdef'], '-0x0_8000', ['i16x8'] * 3] + ], + 'i16x8.add_saturate_u': [ + [['012_345', '056_789'], '065_535', ['i16x8'] * 3], + [['012_345', '-012_345'], '065_535', ['i16x8'] * 3], + [['0x0_1234', '0x0_5678'], '0x0_68ac', ['i16x8'] * 3], + [['0x0_90AB', '0x0_cdef'], '0x0_ffff', ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_s': [ + [['012_345', '056_789'], '021_092', ['i16x8'] * 3], + [['012_345', '-012_345'], '024_690', ['i16x8'] * 3], + [['0x0_1234', '0x0_5678'], '0x0_bbbc', ['i16x8'] * 3], + [['0x0_90AB', '-0x1234'], '0xa2df', ['i16x8'] * 3] + ], + 'i16x8.sub_saturate_u': [ + [['012_345', '056_789'], '0', ['i16x8'] * 3], + [['056_789', '-12_345'], '03_598', ['i16x8'] * 3], + [['0x0_1234', '-0x0_5678'], '0', ['i16x8'] * 3], + [['0x0_cdef', '0x0_90AB'], '0x0_3d44', ['i16x8'] * 3] + ] + } + @property def i16x8_f32x4_test_data(self): return { @@ -406,7 +435,8 @@ def full_bin_test_data(self): return [ self.i16x8_f32x4_test_data, self.combine_dec_hex_test_data, - self.range_test_data + self.range_test_data, + self.underscore_literal_test_data ] diff --git a/test/core/simd/simd_i16x8_sat_arith.wast b/test/core/simd/simd_i16x8_sat_arith.wast index 8f3e086373..9348b99d17 100644 --- a/test/core/simd/simd_i16x8_sat_arith.wast +++ b/test/core/simd/simd_i16x8_sat_arith.wast @@ -145,6 +145,18 @@ (assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 3 6 9 12 15 18 21)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 032_123 032_123 032_123 032_123 032_123 032_123 032_123 032_123)) + (v128.const i16x8 032_767 032_767 032_767 032_767 032_767 032_767 032_767 032_767)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) +(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) + (v128.const i16x8 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000)) ;; i16x8.add_saturate_u (assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -282,6 +294,18 @@ (assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 3 6 9 12 15 18 21)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) + (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) +(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) + (v128.const i16x8 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff)) ;; i16x8.sub_saturate_s (assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -419,6 +443,18 @@ (assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 021_092 021_092 021_092 021_092 021_092 021_092 021_092 021_092)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) + (v128.const i16x8 024_690 024_690 024_690 024_690 024_690 024_690 024_690 024_690)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc)) +(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234)) + (v128.const i16x8 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df)) ;; i16x8.sub_saturate_u (assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -556,6 +592,18 @@ (assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789) + (v128.const i16x8 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345)) + (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef) + (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i16x8 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44)) ;; Malformed cases: non-existent op names (assert_malformed (module quote From a203fdc761f1fbc3e2e7674de7fc5f15bc7b2626 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Tue, 10 Dec 2019 01:12:54 +0800 Subject: [PATCH 094/378] [test] Sync tests from WAVM#226 (#148) https://github.com/WAVM/WAVM/pull/226 [simd] Add more literal tests for arithmetic ops Part of https://github.com/WAVM/WAVM/issues/195 --- test/core/simd/meta/simd_f32x4_arith.py | 23 +- test/core/simd/meta/simd_f64x2_arith.py | 14 +- test/core/simd/meta/simd_float_op.py | 57 +++- test/core/simd/meta/simd_i16x8_arith.py | 20 +- test/core/simd/meta/simd_i32x4_arith.py | 20 +- test/core/simd/meta/simd_i64x2_arith.py | 26 +- test/core/simd/simd_f32x4_arith.wast | 384 ++++++++++++++++++++++++ test/core/simd/simd_f64x2_arith.wast | 384 ++++++++++++++++++++++++ test/core/simd/simd_i16x8_arith.wast | 18 ++ test/core/simd/simd_i32x4_arith.wast | 18 ++ test/core/simd/simd_i64x2_arith.wast | 18 ++ 11 files changed, 963 insertions(+), 19 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py index 4d3466d9fd..5eb70d3485 100644 --- a/test/core/simd/meta/simd_f32x4_arith.py +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -24,7 +24,17 @@ class Simdf32x4ArithmeticCase(SimdArithmeticCase): '0x0p+0', '-0x0p+0', '0x1p-149', '-0x1p-149', '0x1p-126', '-0x1p-126', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', '0x1.921fb6p+2', '-0x1.921fb6p+2', '0x1.fffffep+127', '-0x1.fffffep+127', 'inf', '-inf' ) - + LITERAL_NUMBERS = ('0123456789', '0123456789e019', '0123456789e+019', '0123456789e-019', + '0123456789.', '0123456789.e019', '0123456789.e+019', '0123456789.e-019', + '0123456789.0123456789', '0123456789.0123456789e019', + '0123456789.0123456789e+019', '0123456789.0123456789e-019', + '0x0123456789ABCDEF', '0x0123456789ABCDEFp019', + '0x0123456789ABCDEFp+019', '0x0123456789ABCDEFp-019', + '0x0123456789ABCDEF.', '0x0123456789ABCDEF.p019', + '0x0123456789ABCDEF.p+019', '0x0123456789ABCDEF.p-019', + '0x0123456789ABCDEF.019aF', '0x0123456789ABCDEF.019aFp019', + '0x0123456789ABCDEF.019aFp+019', '0x0123456789ABCDEF.019aFp-019' + ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') @@ -200,10 +210,17 @@ def get_normal_case(self): else: binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + for p in self.LITERAL_NUMBERS: + if self.LANE_TYPE == 'f32x4': + result = self.floatOp.binary_op(op, p, p, single_prec=True) + else: + result = self.floatOp.binary_op(op, p, p) + binary_test_data.append(['assert_return', op_name, p, p, result]) + for case in binary_test_data: cases.append(self.single_binary_test(case)) - for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS: + for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: if 'nan:' in p: unary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p]) elif 'nan' in p: @@ -219,7 +236,7 @@ def get_normal_case(self): # unary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p]) - for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS: + for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('neg') result = self.floatOp.float_neg(p) # Neg operation is valid for all the floating point numbers diff --git a/test/core/simd/meta/simd_f64x2_arith.py b/test/core/simd/meta/simd_f64x2_arith.py index 6f4c92c932..54926c9aa8 100644 --- a/test/core/simd/meta/simd_f64x2_arith.py +++ b/test/core/simd/meta/simd_f64x2_arith.py @@ -24,7 +24,19 @@ class Simdf64x2ArithmeticCase(Simdf32x4ArithmeticCase): '0x1.921fb54442d18p+2', '-0x1.921fb54442d18p+2', '0x1.fffffffffffffp+1023', '-0x1.fffffffffffffp+1023', '0x0.0000000000001p-1022', '0x0.0000000000001p-1022', 'inf', '-inf' ) - + LITERAL_NUMBERS = ('0123456789', '0123456789e019', '0123456789e+019', '0123456789e-019', + '0123456789.', '0123456789.e019', '0123456789.e+019', '0123456789.e-019', + '0123456789.0123456789', '0123456789.0123456789e019', + '0123456789.0123456789e+019', '0123456789.0123456789e-019', + '0x0123456789ABCDEFabcdef', '0x0123456789ABCDEFabcdefp019', + '0x0123456789ABCDEFabcdefp+019', '0x0123456789ABCDEFabcdefp-019', + '0x0123456789ABCDEFabcdef.', '0x0123456789ABCDEFabcdef.p019', + '0x0123456789ABCDEFabcdef.p+019', '0x0123456789ABCDEFabcdef.p-019', + '0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef', + '0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019', + '0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019', + '0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019' + ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') @staticmethod diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index 0b595ba8d6..7b1095a8ac 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -4,6 +4,7 @@ from abc import abstractmethod import math +import struct class FloatingPointOp: @@ -20,7 +21,7 @@ class FloatingPointArithOp(FloatingPointOp): neg, sqrt, add, sub, mul, div """ - def binary_op(self, op: str, p1: str, p2: str) -> str: + def binary_op(self, op: str, p1: str, p2: str, single_prec=False) -> str: """Binary operation on p1 and p2 with the operation specified by op :param op: add, sub, mul, div @@ -28,8 +29,20 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: :param p2: float number in hex :return: """ - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) + if '0x' in p1 or '0x' in p2: + hex_form = True + else: + hex_form = False + + if '0x' in p1: + f1 = float.fromhex(p1) + else: + f1 = float(p1) + if '0x' in p2: + f2 = float.fromhex(p2) + else: + f2 = float(p2) + if op == 'add': if 'inf' in p1 and 'inf' in p2 and p1 != p2: return '-nan' @@ -43,7 +56,15 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: elif op == 'mul': if '0x0p+0' in p1 and 'inf' in p2 or 'inf' in p1 and '0x0p+0' in p2: return '-nan' - result = f1 * f2 + if single_prec: + # For some literals, f32x4.mul operation may cause precision lost. + # Use struct.unpack('f', struct.pack('f', literal)) to compensate + # single precision lost of f32 + f1 = struct.unpack('f', struct.pack('f', f1))[0] + f2 = struct.unpack('f', struct.pack('f', f2))[0] + result = struct.unpack('f', struct.pack('f', f1 * f2))[0] + else: + result = f1 * f2 elif op == 'div': if '0x0p+0' in p1 and '0x0p+0' in p2: @@ -53,7 +74,7 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: try: result = f1 / f2 - return self.get_valid_float(result, self.maximum) + return self.get_valid_float(result, self.maximum, hex_form) except ZeroDivisionError: if p1[0] == p2[0]: return 'inf' @@ -65,22 +86,30 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: else: raise Exception('Unknown binary operation') - return self.get_valid_float(result, self.maximum) + return self.get_valid_float(result, self.maximum, hex_form) - def get_valid_float(self, value, maximum_literals): + def get_valid_float(self, value, maximum_literals, hex_form=False): if value > float.fromhex(maximum_literals): return 'inf' if value < float.fromhex('-' + maximum_literals): return '-inf' - return value.hex() + + if hex_form: + return value.hex() + else: + return str(value) def float_sqrt(self, p): if p == '-0x0p+0': return '-0x0p+0' try: - p = float.fromhex(p) - result = float.hex(math.sqrt(p)) + if '0x' in p: + f = float.fromhex(p) + result = float.hex(math.sqrt(f)) + else: + f = float(p) + result = str(math.sqrt(f)) except ValueError: result = '-nan' @@ -90,8 +119,12 @@ def float_neg(self, p): if p == 'nan': return '-nan' try: - p = float.fromhex(p) - result = float.hex(-p) + if '0x' in p: + f = float.fromhex(p) + result = float.hex(-f) + else: + f = float(p) + result = str(-f) except ValueError: if p.startswith('nan:'): return '-' + p diff --git a/test/core/simd/meta/simd_i16x8_arith.py b/test/core/simd/meta/simd_i16x8_arith.py index 2c750b0c50..110907104c 100644 --- a/test/core/simd/meta/simd_i16x8_arith.py +++ b/test/core/simd/meta/simd_i16x8_arith.py @@ -33,6 +33,23 @@ def hex_binary_op_test_data(self): def hex_unary_op_test_data(self): return ['0x01', '-0x01', '-0x8000', '-0x7fff', '0x7fff', '0x8000', '0xffff'] + @property + def underscore_literal_test_data(self): + return { + 'i16x8.add': [ + [['012_345', '056_789'], '03_598', ['i16x8'] * 3], + [['0x0_1234', '0x0_5678'], '0x0_68ac', ['i16x8'] * 3] + ], + 'i16x8.sub': [ + [['056_789', '012_345'], '044_444', ['i16x8'] * 3], + [['0x0_5678', '0x0_1234'], '0x0_4444', ['i16x8'] * 3] + ], + 'i16x8.mul': [ + [['012_345', '056_789'], '021_613', ['i16x8'] * 3], + [['0x0_1234', '0x0_cdef'], '0x0_a28c', ['i16x8'] * 3] + ] + } + @property def i16x8_i8x16_test_data(self): return { @@ -145,7 +162,8 @@ def full_bin_test_data(self): self.i16x8_i32x4_test_data, self.i16x8_f32x4_test_data, self.combine_dec_hex_test_data, - self.range_test_data + self.range_test_data, + self.underscore_literal_test_data ] diff --git a/test/core/simd/meta/simd_i32x4_arith.py b/test/core/simd/meta/simd_i32x4_arith.py index 5f2dfc19c6..b402b02cba 100644 --- a/test/core/simd/meta/simd_i32x4_arith.py +++ b/test/core/simd/meta/simd_i32x4_arith.py @@ -33,6 +33,23 @@ def hex_binary_op_test_data(self): def hex_unary_op_test_data(self): return ['0x01', '-0x01', '-0x80000000', '-0x7fffffff', '0x7fffffff', '0x80000000', '0xffffffff'] + @property + def underscore_literal_test_data(self): + return { + 'i32x4.add': [ + [['01_234_567_890', '01_234_567_890'], '02_469_135_780', ['i32x4'] * 3], + [['0x0_1234_5678', '0x0_90AB_cdef'], '0x0_a2e0_2467', ['i32x4'] * 3] + ], + 'i32x4.sub': [ + [['03_214_567_890 ', '01_234_567_890 '], '01_980_000_000', ['i32x4'] * 3], + [['0x0_90AB_cdef', '0x0_1234_5678'], '0x0_7e77_7777', ['i32x4'] * 3] + ], + 'i32x4.mul': [ + [['0_123_456_789', '0_987_654_321'], '04_227_814_277', ['i32x4'] * 3], + [['0x0_1234_5678', '0x0_90AB_cdef'], '0x0_2a42_d208', ['i32x4'] * 3] + ] + } + @property def i32x4_i8x16_test_data(self): return { @@ -145,7 +162,8 @@ def full_bin_test_data(self): self.i32x4_i16x8_test_data, self.i32x4_f32x4_test_data, self.combine_dec_hex_test_data, - self.range_test_data + self.range_test_data, + self.underscore_literal_test_data ] diff --git a/test/core/simd/meta/simd_i64x2_arith.py b/test/core/simd/meta/simd_i64x2_arith.py index 898ea8b90d..a65bcc3892 100644 --- a/test/core/simd/meta/simd_i64x2_arith.py +++ b/test/core/simd/meta/simd_i64x2_arith.py @@ -34,6 +34,29 @@ def hex_unary_op_test_data(self): return ['0x01', '-0x01', '-0x8000000000000000', '-0x7fffffffffffffff', '0x7fffffffffffffff', '0x8000000000000000', '0xffffffffffffffff'] + @property + def underscore_literal_test_data(self): + return { + 'i64x2.add': [ + [['01_234_567_890_123_456_789', '01_234_567_890_123_456_789'], + '02_469_135_780_246_913_578', ['i64x2'] * 3], + [['0x0_1234_5678_90AB_cdef', '0x0_90AB_cdef_1234_5678'], + '0x0_a2e0_2467_a2e0_2467', ['i64x2'] * 3] + ], + 'i64x2.sub': [ + [['03_214_567_890_123_456_789', '01_234_567_890_123_456_789'], + '01_980_000_000_000_000_000', ['i64x2'] * 3], + [['0x0_90AB_cdef_8765_4321', '0x0_1234_5678_90AB_cdef'], + '0x0_7e77_7776_f6b9_7532', ['i64x2'] * 3] + ], + 'i64x2.mul': [ + [['01_234_567_890_123_456_789', '01_234_567_890_123_456_789'], + '09_710_478_858_155_731_897', ['i64x2'] * 3], + [['0x0_1234_5678_90AB_cdef', '0x0_90AB_cdef_8765_4321'], + '0x0_602f_05e9_e556_18cf', ['i64x2'] * 3] + ] + } + @property def i64x2_i8x16_test_data(self): """This test data will be intepreted by the SIMD.v128_const() method in simd.py.""" @@ -164,7 +187,8 @@ def full_bin_test_data(self): self.i64x2_i32x4_test_data, self.i64x2_f64x2_test_data, self.combine_dec_hex_test_data, - self.range_test_data + self.range_test_data, + self.underscore_literal_test_data ] diff --git a/test/core/simd/simd_f32x4_arith.wast b/test/core/simd/simd_f32x4_arith.wast index 9804879479..55d7fb5b2b 100644 --- a/test/core/simd/simd_f32x4_arith.wast +++ b/test/core/simd/simd_f32x4_arith.wast @@ -1064,6 +1064,78 @@ (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 246913578.0 246913578.0 246913578.0 246913578.0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 2.46913578e+27 2.46913578e+27 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 2.46913578e+27 2.46913578e+27 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 2.46913578e-11 2.46913578e-11 2.46913578e-11 2.46913578e-11)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 246913578.0 246913578.0 246913578.0 246913578.0)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 2.46913578e+27 2.46913578e+27 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 2.46913578e+27 2.46913578e+27 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 2.46913578e-11 2.46913578e-11 2.46913578e-11 2.46913578e-11)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 246913578.02469134 246913578.02469134 246913578.02469134 246913578.02469134)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 2.4691357802469137e+27 2.4691357802469137e+27 2.4691357802469137e+27 2.4691357802469137e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 2.4691357802469137e+27 2.4691357802469137e+27 2.4691357802469137e+27 2.4691357802469137e+27)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 2.4691357802469137e-11 2.4691357802469137e-11 2.4691357802469137e-11 2.4691357802469137e-11)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57 0x1.23456789abcdfp+57)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76 0x1.23456789abcdfp+76)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38 0x1.23456789abcdfp+38)) (assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -2118,6 +2190,78 @@ (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -3166,6 +3310,78 @@ (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22 1.5241579025420272e-22)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112 0x1.4b66de0000000p+112)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74)) (assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) (assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) @@ -4214,6 +4430,78 @@ (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) @@ -4243,6 +4531,54 @@ (assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan -nan -nan -nan))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) (assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 11111.111060555555 11111.111060555555 11111.111060555555 11111.111060555555)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 35136418286444.62 35136418286444.62 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 35136418286444.62 35136418286444.62 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 3.5136418286444623e-06 3.5136418286444623e-06 3.5136418286444623e-06 3.5136418286444623e-06)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 11111.111060555555 11111.111060555555 11111.111060555555 11111.111060555555)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 35136418286444.62 35136418286444.62 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 35136418286444.62 35136418286444.62 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 3.5136418286444623e-06 3.5136418286444623e-06 3.5136418286444623e-06 3.5136418286444623e-06)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 11111.11106111111 11111.11106111111 11111.11106111111 11111.11106111111)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 35136418288201.445 35136418288201.445 35136418288201.445 35136418288201.445)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 35136418288201.445 35136418288201.445 35136418288201.445 35136418288201.445)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 3.513641828820144e-06 3.513641828820144e-06 3.513641828820144e-06 3.513641828820144e-06)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28 0x1.1111111111111p+28)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37 0x1.822cb17ff2eb8p+37)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18 0x1.822cb17ff2eb8p+18)) (assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) (assert_return (invoke "f32x4.neg" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) @@ -4283,6 +4619,54 @@ (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) (assert_return (invoke "f32x4.neg" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -123456789.0 -123456789.0 -123456789.0 -123456789.0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -1.23456789e-11 -1.23456789e-11 -1.23456789e-11 -1.23456789e-11)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -123456789.0 -123456789.0 -123456789.0 -123456789.0)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -1.23456789e-11 -1.23456789e-11 -1.23456789e-11 -1.23456789e-11)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -123456789.01234567 -123456789.01234567 -123456789.01234567 -123456789.01234567)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -1.2345678901234569e+27 -1.2345678901234569e+27 -1.2345678901234569e+27 -1.2345678901234569e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -1.2345678901234569e+27 -1.2345678901234569e+27 -1.2345678901234569e+27 -1.2345678901234569e+27)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -1.2345678901234568e-11 -1.2345678901234568e-11 -1.2345678901234568e-11 -1.2345678901234568e-11)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56 -0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75 -0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.neg" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37 -0x1.23456789abcdfp+37)) ;; Mixed f32x4 tests when some lanes are NaNs diff --git a/test/core/simd/simd_f64x2_arith.wast b/test/core/simd/simd_f64x2_arith.wast index 5603406706..c66a29a1c1 100644 --- a/test/core/simd/simd_f64x2_arith.wast +++ b/test/core/simd/simd_f64x2_arith.wast @@ -1064,6 +1064,78 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 246913578.0 246913578.0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 2.46913578e-11 2.46913578e-11)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 246913578.0 246913578.0)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 2.46913578e+27 2.46913578e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 2.46913578e-11 2.46913578e-11)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 246913578.02469134 246913578.02469134)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 2.4691357802469137e+27 2.4691357802469137e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 2.4691357802469137e+27 2.4691357802469137e+27)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 2.4691357802469137e-11 2.4691357802469137e-11)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+81 0x1.23456789abcdfp+81)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+62 0x1.23456789abcdfp+62)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+81 0x1.23456789abcdfp+81)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+62 0x1.23456789abcdfp+62)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+81 0x1.23456789abcdfp+81)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+100 0x1.23456789abcdfp+100)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+62 0x1.23456789abcdfp+62)) (assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -2118,6 +2190,78 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -3166,6 +3310,78 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 1.524157875019052e+16 1.524157875019052e+16)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.524157875019052e+54 1.524157875019052e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.524157875019052e+54 1.524157875019052e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 1.524157875019052e-22 1.524157875019052e-22)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 1.524157875019052e+16 1.524157875019052e+16)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.524157875019052e+54 1.524157875019052e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.524157875019052e+54 1.524157875019052e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 1.524157875019052e-22 1.524157875019052e-22)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 1.5241578753238834e+16 1.5241578753238834e+16)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.5241578753238838e+54 1.5241578753238838e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.5241578753238838e+54 1.5241578753238838e+54)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 1.524157875323884e-22 1.524157875323884e-22)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.4b66dc33f6acep+160 0x1.4b66dc33f6acep+160)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.4b66dc33f6acep+122 0x1.4b66dc33f6acep+122)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.4b66dc33f6acep+160 0x1.4b66dc33f6acep+160)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.4b66dc33f6acep+122 0x1.4b66dc33f6acep+122)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.4b66dc33f6acep+160 0x1.4b66dc33f6acep+160)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.4b66dc33f6acep+198 0x1.4b66dc33f6acep+198)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.4b66dc33f6acep+122 0x1.4b66dc33f6acep+122)) (assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x0p+0 0x0p+0))) (assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) @@ -4214,6 +4430,78 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x0p+0 -0x0p+0)) @@ -4244,6 +4532,54 @@ (assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan -nan))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 11111.111060555555 11111.111060555555)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 3.5136418286444623e-06 3.5136418286444623e-06)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 11111.111060555555 11111.111060555555)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 35136418286444.62 35136418286444.62)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 3.5136418286444623e-06 3.5136418286444623e-06)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 11111.11106111111 11111.11106111111)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 35136418288201.445 35136418288201.445)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 35136418288201.445 35136418288201.445)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 3.513641828820144e-06 3.513641828820144e-06)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.1111111111111p+40 0x1.1111111111111p+40)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+30 0x1.822cb17ff2eb8p+30)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.1111111111111p+40 0x1.1111111111111p+40)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+30 0x1.822cb17ff2eb8p+30)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.1111111111111p+40 0x1.1111111111111p+40)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+49 0x1.822cb17ff2eb8p+49)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.822cb17ff2eb8p+30 0x1.822cb17ff2eb8p+30)) (assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) (assert_return (invoke "f64x2.neg" (v128.const f64x2 -0x0p+0 -0x0p+0)) @@ -4284,6 +4620,54 @@ (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (assert_return (invoke "f64x2.neg" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -123456789.0 -123456789.0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -1.23456789e-11 -1.23456789e-11)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -123456789.0 -123456789.0)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -1.23456789e+27 -1.23456789e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -1.23456789e-11 -1.23456789e-11)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -123456789.01234567 -123456789.01234567)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -1.2345678901234569e+27 -1.2345678901234569e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -1.2345678901234569e+27 -1.2345678901234569e+27)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -1.2345678901234568e-11 -1.2345678901234568e-11)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.23456789abcdfp+80 -0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.23456789abcdfp+61 -0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.23456789abcdfp+80 -0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.23456789abcdfp+61 -0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.23456789abcdfp+80 -0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.23456789abcdfp+99 -0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.neg" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.23456789abcdfp+61 -0x1.23456789abcdfp+61)) ;; Mixed f64x2 tests when some lanes are NaNs (module diff --git a/test/core/simd/simd_i16x8_arith.wast b/test/core/simd/simd_i16x8_arith.wast index 78b5dc7e20..7841a28176 100644 --- a/test/core/simd/simd_i16x8_arith.wast +++ b/test/core/simd/simd_i16x8_arith.wast @@ -163,6 +163,12 @@ (assert_return (invoke "i16x8.add" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 3 6 9 12 15 18 21)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) +(assert_return (invoke "i16x8.add" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) ;; i16x8.sub (assert_return (invoke "i16x8.sub" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -318,6 +324,12 @@ (assert_return (invoke "i16x8.sub" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789) + (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) + (v128.const i16x8 044_444 044_444 044_444 044_444 044_444 044_444 044_444 044_444)) +(assert_return (invoke "i16x8.sub" (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678) + (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) + (v128.const i16x8 0x0_4444 0x0_4444 0x0_4444 0x0_4444 0x0_4444 0x0_4444 0x0_4444 0x0_4444)) ;; i16x8.mul (assert_return (invoke "i16x8.mul" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -473,6 +485,12 @@ (assert_return (invoke "i16x8.mul" (v128.const i16x8 0 1 2 3 4 5 6 7) (v128.const i16x8 0 2 4 6 8 10 12 14)) (v128.const i16x8 0 0x02 0x08 0x12 0x20 0x32 0x48 0x62)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 021_613 021_613 021_613 021_613 021_613 021_613 021_613 021_613)) +(assert_return (invoke "i16x8.mul" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) + (v128.const i16x8 0x0_a28c 0x0_a28c 0x0_a28c 0x0_a28c 0x0_a28c 0x0_a28c 0x0_a28c 0x0_a28c)) ;; i16x8.neg (assert_return (invoke "i16x8.neg" (v128.const i16x8 0 0 0 0 0 0 0 0)) diff --git a/test/core/simd/simd_i32x4_arith.wast b/test/core/simd/simd_i32x4_arith.wast index 7fe81070c3..faca8be4db 100644 --- a/test/core/simd/simd_i32x4_arith.wast +++ b/test/core/simd/simd_i32x4_arith.wast @@ -163,6 +163,12 @@ (assert_return (invoke "i32x4.add" (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 2 4 6)) (v128.const i32x4 0 3 6 9)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 02_469_135_780 02_469_135_780 02_469_135_780 02_469_135_780)) +(assert_return (invoke "i32x4.add" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x0_a2e0_2467 0x0_a2e0_2467 0x0_a2e0_2467 0x0_a2e0_2467)) ;; i32x4.sub (assert_return (invoke "i32x4.sub" (v128.const i32x4 0 0 0 0) @@ -318,6 +324,12 @@ (assert_return (invoke "i32x4.sub" (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 2 4 6)) (v128.const i32x4 0 -1 -2 -3)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 03_214_567_890 03_214_567_890 03_214_567_890 03_214_567_890 ) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890 )) + (v128.const i32x4 01_980_000_000 01_980_000_000 01_980_000_000 01_980_000_000)) +(assert_return (invoke "i32x4.sub" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (v128.const i32x4 0x0_7e77_7777 0x0_7e77_7777 0x0_7e77_7777 0x0_7e77_7777)) ;; i32x4.mul (assert_return (invoke "i32x4.mul" (v128.const i32x4 0 0 0 0) @@ -473,6 +485,12 @@ (assert_return (invoke "i32x4.mul" (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 2 4 6)) (v128.const i32x4 0 0x02 0x08 0x12)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 0_987_654_321 0_987_654_321 0_987_654_321 0_987_654_321)) + (v128.const i32x4 04_227_814_277 04_227_814_277 04_227_814_277 04_227_814_277)) +(assert_return (invoke "i32x4.mul" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x0_2a42_d208 0x0_2a42_d208 0x0_2a42_d208 0x0_2a42_d208)) ;; i32x4.neg (assert_return (invoke "i32x4.neg" (v128.const i32x4 0 0 0 0)) diff --git a/test/core/simd/simd_i64x2_arith.wast b/test/core/simd/simd_i64x2_arith.wast index 41e4c187f6..72e763477e 100644 --- a/test/core/simd/simd_i64x2_arith.wast +++ b/test/core/simd/simd_i64x2_arith.wast @@ -169,6 +169,12 @@ (assert_return (invoke "i64x2.add" (v128.const i64x2 0 1) (v128.const i64x2 0 2)) (v128.const i64x2 0 3)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789) + (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) + (v128.const i64x2 02_469_135_780_246_913_578 02_469_135_780_246_913_578)) +(assert_return (invoke "i64x2.add" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef) + (v128.const i64x2 0x0_90AB_cdef_1234_5678 0x0_90AB_cdef_1234_5678)) + (v128.const i64x2 0x0_a2e0_2467_a2e0_2467 0x0_a2e0_2467_a2e0_2467)) ;; i64x2.sub (assert_return (invoke "i64x2.sub" (v128.const i64x2 0 0) @@ -330,6 +336,12 @@ (assert_return (invoke "i64x2.sub" (v128.const i64x2 0 1) (v128.const i64x2 0 2)) (v128.const i64x2 0 -1)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 03_214_567_890_123_456_789 03_214_567_890_123_456_789) + (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) + (v128.const i64x2 01_980_000_000_000_000_000 01_980_000_000_000_000_000)) +(assert_return (invoke "i64x2.sub" (v128.const i64x2 0x0_90AB_cdef_8765_4321 0x0_90AB_cdef_8765_4321) + (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef)) + (v128.const i64x2 0x0_7e77_7776_f6b9_7532 0x0_7e77_7776_f6b9_7532)) ;; i64x2.mul (assert_return (invoke "i64x2.mul" (v128.const i64x2 0 0) @@ -491,6 +503,12 @@ (assert_return (invoke "i64x2.mul" (v128.const i64x2 0 1) (v128.const i64x2 0 2)) (v128.const i64x2 0 0x02)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789) + (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) + (v128.const i64x2 09_710_478_858_155_731_897 09_710_478_858_155_731_897)) +(assert_return (invoke "i64x2.mul" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef) + (v128.const i64x2 0x0_90AB_cdef_8765_4321 0x0_90AB_cdef_8765_4321)) + (v128.const i64x2 0x0_602f_05e9_e556_18cf 0x0_602f_05e9_e556_18cf)) ;; i64x2.neg (assert_return (invoke "i64x2.neg" (v128.const i64x2 0 0)) From c4112007e5d2011299d67d16ebbaa68a99892714 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Tue, 10 Dec 2019 01:14:57 +0800 Subject: [PATCH 095/378] [test] Sync tests from WAVM#220 (#147) https://github.com/WAVM/WAVM/pull/220 [simd] Add more literal tests for lane ops Remove some redundant tests BTW --- test/core/simd/simd_lane.wast | 135 ++++++++++++++++------------------ 1 file changed, 62 insertions(+), 73 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 24b2d5a67c..59e5827def 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -90,51 +90,47 @@ (assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff)) (i32.const 255)) (assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (i32.const 128)) (assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (i32.const 128)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -128)) -(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const i32x4 0 0 0 0x7f000000)) (i32.const 127)) -(assert_return (invoke "i8x16_extract_lane_s-last" (v128.const f32x4 0 0 0 1.0)) (i32.const 63)) -(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0xff00)) (i32.const 255)) -(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const i32x4 0 0 0 0xff000000)) (i32.const 255)) -(assert_return (invoke "i8x16_extract_lane_u-last" (v128.const f32x4 0 0 0 2.0)) (i32.const 64)) (assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 32767 0 0 0 0 0 0 0)) (i32.const 32767)) (assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 0x7fff 0 0 0 0 0 0 0)) (i32.const 32767)) (assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 65535 0 0 0 0 0 0 0)) (i32.const -1)) (assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 0xffff 0 0 0 0 0 0 0)) (i32.const -1)) +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 012_345 0 0 0 0 0 0 0)) (i32.const 12345)) +(assert_return (invoke "i16x8_extract_lane_s-first" (v128.const i16x8 -0x0_1234 0 0 0 0 0 0 0)) (i32.const -0x1234)) (assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 65535 0 0 0 0 0 0 0)) (i32.const 65535)) (assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 0xffff 0 0 0 0 0 0 0)) (i32.const 65535)) +(assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 012_345 0 0 0 0 0 0 0)) (i32.const 12345)) +(assert_return (invoke "i16x8_extract_lane_u-first" (v128.const i16x8 -0x0_1234 0 0 0 0 0 0 0)) (i32.const 60876)) (assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 -32768)) (i32.const -32768)) (assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -32768)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 06_789)) (i32.const 6789)) +(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i16x8 0 0 0 0 0 0 0 -0x0_6789)) (i32.const -0x6789)) (assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 -1)) (i32.const 65535)) (assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0xffff)) (i32.const 65535)) (assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 -32768)) (i32.const 32768)) (assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const 32768)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (i32.const -32768)) -(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const i32x4 0 0 0 0x7fff0000)) (i32.const 32767)) -(assert_return (invoke "i16x8_extract_lane_s-last" (v128.const f32x4 0 0 0 3.0)) (i32.const 0x4040)) -(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff 0xff)) (i32.const 65535)) -(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i32x4 0 0 0 0xffffffff)) (i32.const 65535)) -(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const f32x4 0 0 0 4.0)) (i32.const 0x4080)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 06_789)) (i32.const 6789)) +(assert_return (invoke "i16x8_extract_lane_u-last" (v128.const i16x8 0 0 0 0 0 0 0 -0x0_6789)) (i32.const 39031)) (assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 2147483647 0 0 0)) (i32.const 2147483647)) (assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 0x7fffffff 0 0 0)) (i32.const 2147483647)) (assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 4294967295 0 0 0)) (i32.const -1)) (assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 0xffffffff 0 0 0)) (i32.const -1)) +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 01_234_567_890 0 0 0)) (i32.const 1234567890)) +(assert_return (invoke "i32x4_extract_lane-first" (v128.const i32x4 -0x0_1234_5678 0 0 0)) (i32.const -0x12345678)) (assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 -2147483648)) (i32.const -2147483648)) (assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x80000000)) (i32.const -2147483648)) (assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 -1)) (i32.const -1)) (assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 0xffffffff)) (i32.const -1)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0x7f)) (i32.const 2147483647)) -(assert_return (invoke "i32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i32.const -2147483648)) -(assert_return (invoke "i32x4_extract_lane-last" (v128.const f32x4 0 0 0 5.0)) (i32.const 0x40a00000)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 0_987_654_321)) (i32.const 987654321)) +(assert_return (invoke "i32x4_extract_lane-last" (v128.const i32x4 0 0 0 -0x0_1234_5678)) (i32.const -0x12345678)) (assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 9223372036854775807 0)) (i64.const 9223372036854775807)) (assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 0x7ffffffffffffffe 0)) (i64.const 0x7ffffffffffffffe)) (assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 18446744073709551615 0)) (i64.const -1)) (assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 0xffffffffffffffff 0)) (i64.const -1)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 01_234_567_890_123_456_789 0)) (i64.const 1234567890123456789)) +(assert_return (invoke "i64x2_extract_lane-first" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0)) (i64.const 0x1234567890abcdef)) (assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 9223372036854775808)) (i64.const -9223372036854775808)) (assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 0x8000000000000000)) (i64.const -0x8000000000000000)) (assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 0x8000000000000000)) (i64.const 0x8000000000000000)) @@ -142,6 +138,8 @@ (assert_return (invoke "i64x2_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x8000)) (i64.const -9223372036854775808)) (assert_return (invoke "i64x2_extract_lane-last" (v128.const i32x4 0 0 0xffffffff 0x7fffffff)) (i64.const 9223372036854775807)) (assert_return (invoke "i64x2_extract_lane-last" (v128.const f64x2 -inf +inf)) (i64.const 0x7ff0000000000000)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 01_234_567_890_123_456_789)) (i64.const 1234567890123456789)) +(assert_return (invoke "i64x2_extract_lane-last" (v128.const i64x2 0 0x0_1234_5678_90AB_cdef)) (i64.const 0x1234567890abcdef)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 -5.0 0.0 0.0 0.0)) (f32.const -5.0)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 1e38 0.0 0.0 0.0)) (f32.const 1e38)) @@ -149,23 +147,15 @@ (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0x1p127 0.0 0.0 0.0)) (f32.const 0x1p127)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0)) (f32.const inf)) (assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 nan inf 0.0 0.0)) (f32.const nan)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0123456789.0123456789e+019 0.0 0.0 0.0)) (f32.const 123456789.0123456789e+019)) +(assert_return (invoke "f32x4_extract_lane-first" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0.0 0.0 0.0)) (f32.const 0x123456789ABCDEF.019aFp-019)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -1e38)) (f32.const -1e38)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -0x1.fffffep127)) (f32.const -0x1.fffffep127)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -0x1p127)) (f32.const -0x1p127)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf)) (f32.const -inf)) (assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 -inf nan)) (f32.const nan)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (f32.const 0)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (f32.const -0)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x3f80)) (f32.const 1.0)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0xbf80)) (f32.const -1.0)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0xffff 0x7f7f)) (f32.const 0x1.fffffep+127)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0x80)) (f32.const 0x1.000000p-126)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 0xffff 0x7f)) (f32.const 0x1.fffffcp-127)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i16x8 0 0 0 0 0 0 1 0)) (f32.const 0x0.000004p-127)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x7f800000)) (f32.const inf)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0xff800000)) (f32.const -inf)) -(assert_return (invoke "f32x4_extract_lane-last" (v128.const i32x4 0 0 0 0x7fc00000)) (f32.const nan)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 0123456789.)) (f32.const 123456789.0)) +(assert_return (invoke "f32x4_extract_lane-last" (v128.const f32x4 0.0 0.0 0.0 0x0123456789ABCDEF.)) (f32.const 0x123456789ABCDEF.0p0)) (assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -1.5 0.0)) (f64.const -1.5)) (assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 1.5 0.0)) (f64.const 1.5)) @@ -177,6 +167,8 @@ (assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 inf 0.0)) (f64.const inf)) (assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 -nan -0.0)) (f64.const -nan)) (assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 nan 0.0)) (f64.const nan)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 0123456789.0123456789e+019 0.0)) (f64.const 123456789.0123456789e+019)) +(assert_return (invoke "f64x2_extract_lane-first" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0.0)) (f64.const 0x123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 2.25)) (f64.const 2.25)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 -2.25)) (f64.const -2.25)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0x0p-0 -1.7976931348623157e+308)) (f64.const -1.7976931348623157e+308)) @@ -187,6 +179,8 @@ (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 inf)) (f64.const inf)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 -0.0 -nan)) (f64.const -nan)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 nan)) (f64.const nan)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 0123456789.)) (f64.const 123456789.0)) +(assert_return (invoke "f64x2_extract_lane-last" (v128.const f64x2 0.0 0x0123456789ABCDEFabcdef.)) (f64.const 0x123456789ABCDEFabcdef.0)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (f64.const 0.0)) (assert_return (invoke "f64x2_extract_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x80)) (f64.const -0.0)) @@ -205,41 +199,28 @@ (assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const -129)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) (assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xff)) (assert_return (invoke "i8x16_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const -32768)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i8x16_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) -(assert_return (invoke "i8x16_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) -(assert_return (invoke "i8x16_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) -(assert_return (invoke "i8x16_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) -(assert_return (invoke "i8x16_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 127)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127)) -(assert_return (invoke "i8x16_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x80)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -128)) (assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i16x8 32767 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 32768)) (v128.const i16x8 -32768 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65535)) (v128.const i16x8 -1 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 65536)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 012345)) (v128.const i16x8 012_345 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_replace_lane-first" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -0x01234)) (v128.const i16x8 -0x0_1234 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -32768)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) (assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -32769)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) (assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x7fffffff)) (v128.const i16x8 0 0 0 0 0 0 0 0xffff)) (assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80000000)) (v128.const i16x8 0 0 0 0 0 0 0 0)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i16x8_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) -(assert_return (invoke "i16x8_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) -(assert_return (invoke "i16x8_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) -(assert_return (invoke "i16x8_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) -(assert_return (invoke "i16x8_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 32767)) (v128.const i16x8 0 0 0 0 0 0 0 32767)) -(assert_return (invoke "i16x8_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x8000)) (v128.const i16x8 0 0 0 0 0 0 0 -32768)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 054321)) (v128.const i16x8 0 0 0 0 0 0 0 054_321)) +(assert_return (invoke "i16x8_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const -0x04321)) (v128.const i16x8 0 0 0 0 0 0 0 -0x0_4321)) (assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 2147483647 0 0 0)) (assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const 4294967295)) (v128.const i32x4 -1 0 0 0)) +(assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const 01234567890)) (v128.const i32x4 01_234_567_890 0 0 0)) +(assert_return (invoke "i32x4_replace_lane-first" (v128.const i32x4 0 0 0 0) (i32.const -0x012345678)) (v128.const i32x4 -0x0_1234_5678 0 0 0)) (assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 2147483648)) (v128.const i32x4 0 0 0 2147483648)) (assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const -2147483648)) (v128.const i32x4 0 0 0 -2147483648)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 2147483648)) (v128.const i32x4 0 0 0 -2147483648)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 0x80000000)) (v128.const i32x4 0 0 0 -2147483648)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 2147483647)) (v128.const i32x4 0 0 0 2147483647)) -(assert_return (invoke "i32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (i32.const 0x80000000)) (v128.const i32x4 0 0 0 -2147483648)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const 01234567890)) (v128.const i32x4 0 0 0 01_234_567_890)) +(assert_return (invoke "i32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (i32.const -0x012345678)) (v128.const i32x4 0 0 0 -0x0_1234_5678)) (assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 53.0)) (v128.const f32x4 53.0 0.0 0.0 0.0)) (assert_return (invoke "f32x4_replace_lane-first" (v128.const i32x4 0 0 0 0 ) (f32.const 53.0)) (v128.const f32x4 53.0 0.0 0.0 0.0)) @@ -249,6 +230,10 @@ (assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 1e38)) (v128.const f32x4 1e38 0.0 0.0 0.0)) (assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 0x1.fffffep127)) (v128.const f32x4 0x1.fffffep127 0.0 0.0 0.0)) (assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 inf 0.0 0.0 0.0) (f32.const 0x1p127)) (v128.const f32x4 0x1p127 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0123456789)) (v128.const f32x4 0123456789 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0123456789.)) (v128.const f32x4 0123456789. 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0x0123456789ABCDEF)) (v128.const f32x4 0x0123456789ABCDEF 0.0 0.0 0.0)) +(assert_return (invoke "f32x4_replace_lane-first" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0x0123456789ABCDEF.)) (v128.const f32x4 0x0123456789ABCDEF. 0.0 0.0 0.0)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const -53.0)) (v128.const f32x4 0.0 0.0 0.0 -53.0)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const i32x4 0 0 0 0) (f32.const -53.0)) (v128.const f32x4 0.0 0.0 0.0 -53.0)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const nan)) (v128.const f32x4 0.0 0.0 0.0 nan)) @@ -257,25 +242,19 @@ (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -1e38)) (v128.const f32x4 0.0 0.0 0.0 -1e38)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -0x1.fffffep127)) (v128.const f32x4 0.0 0.0 0.0 -0x1.fffffep127)) (assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 -inf) (f32.const -0x1p127)) (v128.const f32x4 0.0 0.0 0.0 -0x1p127)) -;; Use other v128 interpretations as arguments -(assert_return (invoke "f32x4_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) -(assert_return (invoke "f32x4_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) -(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0 0 0 0) (f32.const 1.0)) (v128.const f32x4 0 0 0 1.0)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0123456789e019)) (v128.const f32x4 0.0 0.0 0.0 0123456789e019)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0123456789.e+019)) (v128.const f32x4 0.0 0.0 0.0 0123456789.e+019)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0x0123456789ABCDEFp019)) (v128.const f32x4 0.0 0.0 0.0 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4_replace_lane-last" (v128.const f32x4 0.0 0.0 0.0 0.0) (f32.const 0x0123456789ABCDEF.p-019)) (v128.const f32x4 0.0 0.0 0.0 0x0123456789ABCDEF.p-019)) (assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 9223372036854775807)) (v128.const i64x2 9223372036854775807 0)) (assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 18446744073709551615)) (v128.const i64x2 -1 0)) +(assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 01234567890123456789)) (v128.const i64x2 01_234_567_890_123_456_789 0)) +(assert_return (invoke "i64x2_replace_lane-first" (v128.const i64x2 0 0) (i64.const 0x01234567890abcdef)) (v128.const i64x2 0x0_1234_5678_90AB_cdef 0)) (assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 9223372036854775808)) (v128.const i64x2 0 9223372036854775808)) (assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 9223372036854775808)) (v128.const i64x2 0 -9223372036854775808)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i64.const 1)) (v128.const i64x2 0 1)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i64.const -1)) (v128.const i64x2 0 0xffffffffffffffff)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 9223372036854775807)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 -9223372036854775808)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 0x7fffffffffffffff)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 -0x8000000000000000)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (i64.const 0x7fffffffffffffff)) (v128.const i64x2 0 0x7fffffffffffffff)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (i64.const 0x8000000000000000)) (v128.const i64x2 0 0x8000000000000000)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 inf) (i64.const 1)) (v128.const i64x2 0 1)) -(assert_return (invoke "i64x2_replace_lane-last" (v128.const f64x2 0.0 nan) (i64.const -1)) (v128.const i64x2 0 -1)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 01234567890123456789)) (v128.const i64x2 0 01_234_567_890_123_456_789)) +(assert_return (invoke "i64x2_replace_lane-last" (v128.const i64x2 0 0) (i64.const 0x01234567890abcdef)) (v128.const i64x2 0 0x0_1234_5678_90AB_cdef)) (assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 1.0 1.0) (f64.const 0x0p+0)) (v128.const f64x2 0.0 1.0)) (assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 -1.0 -1.0) (f64.const -0x0p-0)) (v128.const f64x2 -0.0 -1.0)) @@ -289,6 +268,10 @@ (assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const nan)) (v128.const f64x2 nan 0.0)) (assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const -inf)) (v128.const f64x2 -inf 0.0)) (assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const inf)) (v128.const f64x2 inf 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const 0123456789)) (v128.const f64x2 0123456789 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const 0123456789.)) (v128.const f64x2 0123456789. 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const 0x0123456789ABCDEFabcdef)) (v128.const f64x2 0x0123456789ABCDEFabcdef 0.0)) +(assert_return (invoke "f64x2_replace_lane-first" (v128.const f64x2 0.0 0.0) (f64.const 0x0123456789ABCDEFabcdef.)) (v128.const f64x2 0x0123456789ABCDEFabcdef. 0.0)) (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 2.0 2.0) (f64.const 0.0)) (v128.const f64x2 2.0 0.0)) (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 -2.0 -2.0) (f64.const -0.0)) (v128.const f64x2 -2.0 -0.0)) (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 2.25)) (v128.const f64x2 0.0 2.25)) @@ -301,14 +284,10 @@ (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const nan)) (v128.const f64x2 0.0 nan)) (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const -inf)) (v128.const f64x2 0.0 -inf)) (assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const inf)) (v128.const f64x2 0.0 inf)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f64.const -0x1p-1022)) (v128.const f64x2 0 -0x1p-1022)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (f64.const 0x1p-1022)) (v128.const f64x2 0 0x1p-1022)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const -4.9406564584124654e-324)) (v128.const f64x2 0 -4.9406564584124654e-324)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i16x8 0 0 0 0 0 0 0 0) (f64.const 4.9406564584124654e-324)) (v128.const f64x2 0 4.9406564584124654e-324)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (f64.const -inf)) (v128.const f64x2 0 -inf)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i32x4 0 0 0 0) (f64.const inf)) (v128.const f64x2 0 inf)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i64x2 0 0) (f64.const -nan)) (v128.const f64x2 0 -nan)) -(assert_return (invoke "f64x2_replace_lane-last" (v128.const i64x2 0 0) (f64.const nan)) (v128.const f64x2 0 nan)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 0123456789e019)) (v128.const f64x2 0.0 0123456789e019)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 0123456789e+019)) (v128.const f64x2 0.0 0123456789e+019)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 0123456789.e019)) (v128.const f64x2 0.0 0123456789.e019)) +(assert_return (invoke "f64x2_replace_lane-last" (v128.const f64x2 0.0 0.0) (f64.const 0123456789.e-019)) (v128.const f64x2 0.0 0123456789.e-019)) (assert_return (invoke "v8x16_swizzle" (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) @@ -404,6 +383,16 @@ (v128.const f32x4 -0.0 nan inf -inf)) (v128.const i32x4 0x10203 0x4050607 0x8090a0b 0xc0d0e0f)) +;; More literals +(assert_return (invoke "v8x16_swizzle" + (v128.const i32x4 1_234_567_890 0x1234_5678 01_234_567_890 0x0_1234_5678) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) + (v128.const i32x4 0x4996_02d2 0x1234_5678 0x4996_02d2 0x1234_5678)) +(assert_return (invoke "v8x16_shuffle-1" + (v128.const i64x2 1_234_567_890_123_456_789_0 0x1234_5678_90AB_cdef) + (v128.const i64x2 01_234_567_890_123_456_789_0 0x0_1234_5678_90AB_cdef)) + (v128.const i32x4 0xeb1f_0ad2 0xab54_a98c 0x90ab_cdef 0x1234_5678)) + ;; Invalid lane index value (assert_invalid (module (func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") From 3766eb29be1e40d9458d64f3d283801df9dd4e54 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 9 Dec 2019 12:39:22 +0000 Subject: [PATCH 096/378] Rename vector.ml to simd.ml --- interpreter/exec/eval_numeric.ml | 10 +++++----- interpreter/exec/{vector.ml => simd.ml} | 0 interpreter/exec/v128.ml | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) rename interpreter/exec/{vector.ml => simd.ml} (100%) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 8102ae0f71..d60c8caca0 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -116,12 +116,12 @@ end module F32Op = FloatOp (F32) (Values.F32Value) module F64Op = FloatOp (F64) (Values.F64Value) -(* Vector operators *) +(* Simd operators *) -module VectorOp (VXX : Vector.S) (Value : ValueType with type t = VXX.t) = +module SimdOp (VXX : Simd.S) (Value : ValueType with type t = VXX.t) = struct (* TODO - open Ast.VectorOp + open Ast.SimdOp let to_value = Value.to_value let of_value = of_arg Value.of_value @@ -140,7 +140,7 @@ struct let relop op = failwith "TODO v128" end -module V128Op = VectorOp (V128) (Values.V128Value) +module V128Op = SimdOp (V128) (Values.V128Value) (* Conversion operators *) @@ -209,7 +209,7 @@ end module V128CvtOp = struct (* TODO - open Ast.VectorOp + open Ast.SimdOp *) (* FIXME *) diff --git a/interpreter/exec/vector.ml b/interpreter/exec/simd.ml similarity index 100% rename from interpreter/exec/vector.ml rename to interpreter/exec/simd.ml diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index ff2c2f6804..746fe292a6 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,4 +1,4 @@ -include Vector.Make +include Simd.Make (struct include Bytes let bytewidth = 16 From 90574dc55c61b050ed55a811280f5e4e54bfaf43 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 9 Dec 2019 12:48:43 +0000 Subject: [PATCH 097/378] Define a proper Simd.shape enum --- interpreter/exec/simd.ml | 2 ++ interpreter/text/lexer.mll | 11 ++++++++++- interpreter/text/parser.mly | 14 +++++++------- 3 files changed, 19 insertions(+), 8 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 6471d0c97b..0eabac4e21 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -1,5 +1,7 @@ open Char +type shape = I8x16 | I16x8 | I32x4 | I64x2 | F32x4 | F64x2 + module type RepType = sig type t diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index cb99e7163a..0c00360136 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -87,6 +87,15 @@ let ext e s u = | _ -> assert false let opt = Lib.Option.get + +let simd_shape = function + | "i8x16" -> Simd.I8x16 + | "i16x8" -> Simd.I16x8 + | "i32x4" -> Simd.I32x4 + | "i64x2" -> Simd.I64x2 + | "f32x4" -> Simd.F32x4 + | "f64x2" -> Simd.F64x2 + | _ -> assert false } let sign = '+' | '-' @@ -355,7 +364,7 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } - | simd_shape as s { SIMD_SHAPE s } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 74678b4c22..ab366930eb 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -54,17 +54,17 @@ let simd_literal shape ss = let open Bytes in let b = create 16 in (match shape with - | "i8x16" when List.length ss = 16 -> + | Simd.I8x16 when List.length ss = 16 -> List.iteri (fun i s -> set_uint8 b i (int8_of_string s)) ss; - | "i16x8" when List.length ss = 8 -> + | Simd.I16x8 when List.length ss = 8 -> List.iteri (fun i s -> set_uint16_le b i (int16_of_string s)) ss; - | "i32x4" when List.length ss = 4 -> + | Simd.I32x4 when List.length ss = 4 -> List.iteri (fun i s -> set_int32_le b i (int32_of_string s)) ss; - | "i64x2" when List.length ss = 2 -> + | Simd.I64x2 when List.length ss = 2 -> List.iteri (fun i s -> set_int64_le b i (int64_of_string s)) ss; - | "f32x4" when List.length ss = 4 -> + | Simd.F32x4 when List.length ss = 4 -> List.iteri (fun i s -> set_int32_le b i (f32_of_string s)) ss; - | "f64x2" when List.length ss = 2 -> + | Simd.F64x2 when List.length ss = 2 -> List.iteri (fun i s -> set_int64_le b i (f64_of_string s)) ss; | _ -> parse_error "unexpected token"); let v = V128.of_bits b in @@ -192,7 +192,6 @@ let inline_type_explicit (c : context) x ft at = %token INPUT OUTPUT %token EOF -%token SIMD_SHAPE %token NAT %token INT %token FLOAT @@ -209,6 +208,7 @@ let inline_type_explicit (c : context) x ft at = %token Memory.offset -> Ast.instr'> STORE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT +%token SIMD_SHAPE %nonassoc LOW %nonassoc VAR From 6a19717b69dea4955d5224a2ec31174c63057740 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 9 Dec 2019 17:25:23 +0000 Subject: [PATCH 098/378] Move simd constructor into v128.ml, add validation checks in parser --- interpreter/exec/simd.ml | 3 ++ interpreter/exec/v128.ml | 20 +++++++++++++ interpreter/text/parser.mly | 60 ++++++++++++++++++++++--------------- 3 files changed, 59 insertions(+), 24 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 0eabac4e21..31f22cd16c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -10,6 +10,7 @@ sig (* ^ bits_make ? *) val to_string : t -> string val bytewidth : int + val of_strings : shape -> string list -> t end module type S = @@ -20,6 +21,7 @@ sig val to_string : t -> string val of_bits : bits -> t val to_bits : t -> bits + val of_strings : shape -> string list -> t end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -31,4 +33,5 @@ struct let to_string = Rep.to_string (* FIXME very very wrong *) let to_bits x = x let of_bits x = x + let of_strings = Rep.of_strings end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 746fe292a6..408cea2109 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -2,4 +2,24 @@ include Simd.Make (struct include Bytes let bytewidth = 16 + + (* Constructs v128 of a certain shape from a list of strings. Does not do any validation, + * as that is done in the parser. *) + let of_strings shape ss = + let open Bytes in + let b = create bytewidth in + (match shape with + | Simd.I8x16 -> + List.iteri (fun i s -> set_uint8 b i (Int32.to_int (I32.of_string s))) ss + | Simd.I16x8 -> + List.iteri (fun i s -> set_uint16_le b i (Int32.to_int (I32.of_string s))) ss + | Simd.I32x4 -> + List.iteri (fun i s -> set_int32_le b i (I32.of_string s)) ss + | Simd.I64x2 -> + List.iteri (fun i s -> set_int64_le b i (I64.of_string s)) ss + | Simd.F32x4 -> + List.iteri (fun i s -> set_int32_le b i (F32.to_bits (F32.of_string s))) ss + | Simd.F64x2 -> + List.iteri (fun i s -> set_int64_le b i (F64.to_bits (F64.of_string s))) ss); + b end) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index ab366930eb..e09e530cd4 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -43,32 +43,44 @@ let range_check i32 min max at = let i = Int32.to_int i32 in if i > max || i < min then error at "constant out of range" else i -let int8_of_string s = range_check (I32.of_string s.it) (-128) 255 s.at -let int16_of_string s = range_check (I32.of_string s.it) (-32768) 65535 s.at -let int32_of_string s = I32.to_bits (literal (fun s -> I32.of_string s.it) s) -let int64_of_string s = I64.to_bits (literal (fun s -> I64.of_string s.it) s) -let f32_of_string s = F32.to_bits (literal (fun s -> F32.of_string s.it) s) -let f64_of_string s = F64.to_bits (literal (fun s -> F64.of_string s.it) s) +let check_simd_i8 s = let _ = range_check (I32.of_string s.it) (-128) 255 s.at in () +let check_simd_i16 s = let _ = range_check (I32.of_string s.it) (-32768) 65535 s.at in () +let check_simd_i32 s = let _ = (literal (fun s -> I32.of_string s.it) s) in () +let check_simd_i64 s = let _ = (literal (fun s -> I64.of_string s.it) s) in () +let check_simd_f32 s = let _ = (literal (fun s -> F32.of_string s.it) s) in () +let check_simd_f64 s = let _ = (literal (fun s -> F64.of_string s.it) s) in () + +(* Validate that the correct number of literals is passed to v128.const. *) +let validate_simd_literal_length shape ss = + let len = List.length ss in + if len == 0 then error (ati 1) "unexpected token"; + let at = (List.hd ss).at in + match shape with + | Simd.I8x16 -> if len != 16 then error at "unexpected token" + | Simd.I16x8 -> if len != 8 then error at "unexpected token" + | Simd.I32x4 -> if len != 4 then error at "unexpected token" + | Simd.I64x2 -> if len != 2 then error at "unexpected token" + | Simd.F32x4 -> if len != 4 then error at "unexpected token" + | Simd.F64x2 -> if len != 2 then error at "unexpected token" + +(* Validate that strings passed to v128.const is withing range. + * We do the validation separate from the construction in order to + * provide accurate locations for the error message. *) +let validate_simd_literal shape ss = + match shape with + | Simd.I8x16 -> List.iter check_simd_i8 ss + | Simd.I16x8 -> List.iter check_simd_i16 ss + | Simd.I32x4 -> List.iter check_simd_i32 ss + | Simd.I64x2 -> List.iter check_simd_i64 ss + | Simd.F32x4 -> List.iter check_simd_f32 ss + | Simd.F64x2 -> List.iter check_simd_f64 ss let simd_literal shape ss = - let open Bytes in - let b = create 16 in - (match shape with - | Simd.I8x16 when List.length ss = 16 -> - List.iteri (fun i s -> set_uint8 b i (int8_of_string s)) ss; - | Simd.I16x8 when List.length ss = 8 -> - List.iteri (fun i s -> set_uint16_le b i (int16_of_string s)) ss; - | Simd.I32x4 when List.length ss = 4 -> - List.iteri (fun i s -> set_int32_le b i (int32_of_string s)) ss; - | Simd.I64x2 when List.length ss = 2 -> - List.iteri (fun i s -> set_int64_le b i (int64_of_string s)) ss; - | Simd.F32x4 when List.length ss = 4 -> - List.iteri (fun i s -> set_int32_le b i (f32_of_string s)) ss; - | Simd.F64x2 when List.length ss = 2 -> - List.iteri (fun i s -> set_int64_le b i (f64_of_string s)) ss; - | _ -> parse_error "unexpected token"); - let v = V128.of_bits b in - (v128_const (v @@ ati 1), Values.V128 v) + validate_simd_literal shape ss; + validate_simd_literal_length shape ss; + let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in + (* This List.hd call is okay since we validated the length. *) + (v128_const (v @@ (List.hd ss).at), Values.V128 v) let nat s at = try From 5478d9283ce5e15eea785960548839653d107be0 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 9 Dec 2019 17:34:39 +0000 Subject: [PATCH 099/378] Fix assertion in tests --- test/core/simd/simd_const.wast | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 7f62abfb44..1c9e61fc00 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -176,19 +176,19 @@ ) (assert_malformed (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") - "unexpected token" + "constant out of range" ) (assert_malformed (module quote "(func (v128.const i32x4 -0x8000000000000001 -0x8000000000000001) drop)") - "unexpected token" + "constant out of range" ) (assert_malformed (module quote "(func (v128.const i32x4 18446744073709551616 18446744073709551616) drop)") - "unexpected token" + "constant out of range" ) (assert_malformed (module quote "(func (v128.const i32x4 -9223372036854775808 -9223372036854775808) drop)") - "unexpected token" + "constant out of range" ) (assert_malformed (module quote "(func (v128.const f32x4 0x1p128 0x1p128 0x1p128 0x1p128) drop)") From d7bd66e779635a1e933b8ea9dfae77b16bd949c1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 10 Dec 2019 13:47:39 +0000 Subject: [PATCH 100/378] Move validation into v128 constructor --- interpreter/exec/simd.ml | 9 +++++++ interpreter/exec/v128.ml | 15 ++++++++---- interpreter/text/parser.mly | 49 ++++++------------------------------- 3 files changed, 27 insertions(+), 46 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 31f22cd16c..7201aba01c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -2,6 +2,15 @@ open Char type shape = I8x16 | I16x8 | I32x4 | I64x2 | F32x4 | F64x2 +let lanes shape = + match shape with + | I8x16 -> 16 + | I16x8 -> 8 + | I32x4 -> 4 + | I64x2 -> 2 + | F32x4 -> 4 + | F64x2 -> 2 + module type RepType = sig type t diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 408cea2109..dc9124980b 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -3,16 +3,20 @@ include Simd.Make include Bytes let bytewidth = 16 - (* Constructs v128 of a certain shape from a list of strings. Does not do any validation, - * as that is done in the parser. *) let of_strings shape ss = + let range_check i32 min max at = + let i = Int32.to_int i32 in + if i > max || i < min then raise (Failure "constant out of range") else i in + (* TODO create proper I8 and I16 modules *) + let i8_of_string s = range_check (I32.of_string s) (-128) 255 s in + let i16_of_string s = range_check (I32.of_string s) (-32768) 65535 s in let open Bytes in let b = create bytewidth in (match shape with | Simd.I8x16 -> - List.iteri (fun i s -> set_uint8 b i (Int32.to_int (I32.of_string s))) ss + List.iteri (fun i s -> set_uint8 b i (i8_of_string s)) ss | Simd.I16x8 -> - List.iteri (fun i s -> set_uint16_le b i (Int32.to_int (I32.of_string s))) ss + List.iteri (fun i s -> set_uint16_le b i (i16_of_string s)) ss | Simd.I32x4 -> List.iteri (fun i s -> set_int32_le b i (I32.of_string s)) ss | Simd.I64x2 -> @@ -21,5 +25,6 @@ include Simd.Make List.iteri (fun i s -> set_int32_le b i (F32.to_bits (F32.of_string s))) ss | Simd.F64x2 -> List.iteri (fun i s -> set_int64_le b i (F64.to_bits (F64.of_string s))) ss); - b + if List.length ss != (Simd.lanes shape) then raise (Invalid_argument "wrong length") + else b end) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index e09e530cd4..408f2ba8f5 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,48 +39,15 @@ let ati i = let literal f s = try f s with Failure _ -> error s.at "constant out of range" -let range_check i32 min max at = - let i = Int32.to_int i32 in - if i > max || i < min then error at "constant out of range" else i - -let check_simd_i8 s = let _ = range_check (I32.of_string s.it) (-128) 255 s.at in () -let check_simd_i16 s = let _ = range_check (I32.of_string s.it) (-32768) 65535 s.at in () -let check_simd_i32 s = let _ = (literal (fun s -> I32.of_string s.it) s) in () -let check_simd_i64 s = let _ = (literal (fun s -> I64.of_string s.it) s) in () -let check_simd_f32 s = let _ = (literal (fun s -> F32.of_string s.it) s) in () -let check_simd_f64 s = let _ = (literal (fun s -> F64.of_string s.it) s) in () - -(* Validate that the correct number of literals is passed to v128.const. *) -let validate_simd_literal_length shape ss = - let len = List.length ss in - if len == 0 then error (ati 1) "unexpected token"; - let at = (List.hd ss).at in - match shape with - | Simd.I8x16 -> if len != 16 then error at "unexpected token" - | Simd.I16x8 -> if len != 8 then error at "unexpected token" - | Simd.I32x4 -> if len != 4 then error at "unexpected token" - | Simd.I64x2 -> if len != 2 then error at "unexpected token" - | Simd.F32x4 -> if len != 4 then error at "unexpected token" - | Simd.F64x2 -> if len != 2 then error at "unexpected token" - -(* Validate that strings passed to v128.const is withing range. - * We do the validation separate from the construction in order to - * provide accurate locations for the error message. *) -let validate_simd_literal shape ss = - match shape with - | Simd.I8x16 -> List.iter check_simd_i8 ss - | Simd.I16x8 -> List.iter check_simd_i16 ss - | Simd.I32x4 -> List.iter check_simd_i32 ss - | Simd.I64x2 -> List.iter check_simd_i64 ss - | Simd.F32x4 -> List.iter check_simd_f32 ss - | Simd.F64x2 -> List.iter check_simd_f64 ss - let simd_literal shape ss = - validate_simd_literal shape ss; - validate_simd_literal_length shape ss; - let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in - (* This List.hd call is okay since we validated the length. *) - (v128_const (v @@ (List.hd ss).at), Values.V128 v) + try + let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in + (* This List.hd call is okay an exception would have been raise if length is 0. *) + (v128_const (v @@ (List.hd ss).at), Values.V128 v) + with + (* TODO better location for error messages. *) + | Failure _ -> error (ati 1) "constant out of range" + | Invalid_argument _ -> error (ati 1) "unexpected token" let nat s at = try From cedf93a8628885b35807ddb791d77547bd6557f6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 10 Dec 2019 17:42:30 +0000 Subject: [PATCH 101/378] Fix test message, add test for too many literals --- interpreter/exec/v128.ml | 4 ++-- interpreter/text/parser.mly | 15 +++++++-------- test/core/simd/simd_const.wast | 29 +++++++++++++---------------- 3 files changed, 22 insertions(+), 26 deletions(-) diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index dc9124980b..b5767498f2 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -4,6 +4,7 @@ include Simd.Make let bytewidth = 16 let of_strings shape ss = + if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); let range_check i32 min max at = let i = Int32.to_int i32 in if i > max || i < min then raise (Failure "constant out of range") else i in @@ -25,6 +26,5 @@ include Simd.Make List.iteri (fun i s -> set_int32_le b i (F32.to_bits (F32.of_string s))) ss | Simd.F64x2 -> List.iteri (fun i s -> set_int64_le b i (F64.to_bits (F64.of_string s))) ss); - if List.length ss != (Simd.lanes shape) then raise (Invalid_argument "wrong length") - else b + b end) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 408f2ba8f5..f479b0d8e2 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,15 +39,14 @@ let ati i = let literal f s = try f s with Failure _ -> error s.at "constant out of range" -let simd_literal shape ss = +let simd_literal shape ss at = try - let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in - (* This List.hd call is okay an exception would have been raise if length is 0. *) - (v128_const (v @@ (List.hd ss).at), Values.V128 v) + let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in + (v128_const (v @@ at), Values.V128 v) with (* TODO better location for error messages. *) - | Failure _ -> error (ati 1) "constant out of range" - | Invalid_argument _ -> error (ati 1) "unexpected token" + | Failure _ -> error at "constant out of range" + | Invalid_argument _ -> error at "unexpected token" let nat s at = try @@ -335,7 +334,7 @@ plain_instr : | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } | CONST literal { fun c -> fst (literal $1 $2) } - | V128_CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $2 $3) } + | V128_CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $2 $3 (at ())) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } @@ -837,7 +836,7 @@ meta : const : | LPAR CONST literal RPAR { snd (literal $2 $3) @@ ati 3 } | LPAR V128_CONST SIMD_SHAPE literal_list RPAR { - snd (simd_literal $3 $4) @@ ati 3 + snd (simd_literal $3 $4 (at ())) @@ ati 3 } const_list : diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 1c9e61fc00..7d73280a9a 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -174,22 +174,6 @@ (module quote "(func (v128.const i32x4 -2147483649 -2147483649 -2147483649 -2147483649) drop)") "constant out of range" ) -(assert_malformed - (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") - "constant out of range" -) -(assert_malformed - (module quote "(func (v128.const i32x4 -0x8000000000000001 -0x8000000000000001) drop)") - "constant out of range" -) -(assert_malformed - (module quote "(func (v128.const i32x4 18446744073709551616 18446744073709551616) drop)") - "constant out of range" -) -(assert_malformed - (module quote "(func (v128.const i32x4 -9223372036854775808 -9223372036854775808) drop)") - "constant out of range" -) (assert_malformed (module quote "(func (v128.const f32x4 0x1p128 0x1p128 0x1p128 0x1p128) drop)") "constant out of range" @@ -482,6 +466,19 @@ "constant out of range" ) +;; too little arguments + +(assert_malformed + (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") + "unexpected token" +) + +;; too many arguments +(assert_malformed + (module quote "(func (v128.const i32x4 0x1 0x1 0x1 0x1 0x1) drop)") + "unexpected token" +) + ;; Rounding behaviour ;; f32x4, small exponent From 9055a47a27630c1553e8a303239eb2718e6bafdb Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 10 Dec 2019 17:49:06 +0000 Subject: [PATCH 102/378] Fix arg to ati --- interpreter/text/parser.mly | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index f479b0d8e2..2755dc60d1 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -836,7 +836,7 @@ meta : const : | LPAR CONST literal RPAR { snd (literal $2 $3) @@ ati 3 } | LPAR V128_CONST SIMD_SHAPE literal_list RPAR { - snd (simd_literal $3 $4 (at ())) @@ ati 3 + snd (simd_literal $3 $4 (at ())) @@ ati 4 } const_list : From e0da3181331c347671df1cab974be20271dad329 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 11 Dec 2019 02:54:43 +0800 Subject: [PATCH 103/378] [test] Sync tests from WAVM#232 (#153) https://github.com/WAVM/WAVM/pull/232/ [simd] Add more literal tests for float-point comparison ops Part of https://github.com/WAVM/WAVM/issues/195 --- test/core/simd/meta/simd_f32x4_cmp.py | 20 +- test/core/simd/meta/simd_f64x2_cmp.py | 9 + test/core/simd/meta/simd_float_op.py | 11 +- test/core/simd/simd_f32x4_cmp.wast | 450 +++++++++++++++++++++++++ test/core/simd/simd_f64x2_cmp.wast | 452 +++++++++++++++++++++++++- 5 files changed, 935 insertions(+), 7 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4_cmp.py b/test/core/simd/meta/simd_f32x4_cmp.py index 41eb6d9fd9..af7cd2a049 100644 --- a/test/core/simd/meta/simd_f32x4_cmp.py +++ b/test/core/simd/meta/simd_f32x4_cmp.py @@ -8,7 +8,7 @@ f32x4 only has 6 comparison instructions but with amounts of test datas. """ - +import struct from simd_compare import SimdCmpCase @@ -337,7 +337,10 @@ def get_case_data(self): '0x1p+0', '-0x1.fffffep+127', '-0x0p+0', '-0x1p-1', '0x1.fffffep+127', '-nan', '-0x1p-149', '-0x1p-126', '0x1p-1', '-0x1.921fb6p+2', 'nan:0x200000', '0x0p+0', 'inf', '-0x1p+0', '0x1p-126') - + LITERAL_NUMBERS = ( + '0123456789e019', '0123456789e-019', + '0123456789.e019', '0123456789.e+019', + '0123456789.0123456789') Ops = ('eq', 'ne', 'lt', 'le', 'gt', 'ge') # Combinations between operand1 and operand2 @@ -346,6 +349,10 @@ def get_case_data(self): for param1 in operand1: for param2 in operand2: case_data.append([op, [param1, param2], self.operate(op, param1, param2), ['f32x4', 'f32x4', 'i32x4']]) + + for param1 in LITERAL_NUMBERS: + for param2 in LITERAL_NUMBERS: + case_data.append([op, [param1, param2], self.operate(op, param1, param2), ['f32x4', 'f32x4', 'i32x4']]) # eq case_data.append(['#', 'eq']) @@ -446,7 +453,12 @@ def special_float2dec(self, p): if p == '-inf': return -float(340282366920938463463374607431768211456) - return float.fromhex(p) + if '0x' in p: + f = float.fromhex(p) + else: + f = float(p) + + return struct.unpack('f', struct.pack('f', f))[0] def operate(self, op, p1, p2): for p in (p1, p2): @@ -489,4 +501,4 @@ def gen_test_cases(): if __name__ == '__main__': f32x4 = Simdf32x4CmpCase() - f32x4.gen_test_cases() + f32x4.gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_f64x2_cmp.py b/test/core/simd/meta/simd_f64x2_cmp.py index 7ad6032381..0228c0114f 100644 --- a/test/core/simd/meta/simd_f64x2_cmp.py +++ b/test/core/simd/meta/simd_f64x2_cmp.py @@ -26,7 +26,11 @@ class Simdf64x2CmpCase(SimdArithmeticCase): '-0x1p-1074', '-0x1p-1022', '0x1p-1', '-0x1.921fb54442d18p+2', '0x0p+0', 'inf', '-0x1p+0', '0x1p-1022' ) + LITERAL_NUMBERS = ('01234567890123456789e038', '01234567890123456789e-038', + '0123456789.e038', '0123456789.e+038', + '01234567890123456789.01234567890123456789' + ) FLOAT_NUMBERS_NORMAL = ('-1', '0', '1', '2.0') NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') @@ -219,6 +223,11 @@ def get_normal_case(self): result = self.floatOp.binary_op(op, p1, p2) binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for p1 in self.LITERAL_NUMBERS: + for p2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, p1, p2) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: result = self.floatOp.binary_op(op, p1, p2) diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index 7b1095a8ac..657d0814ef 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -207,8 +207,15 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: if 'nan' in p1.lower() or 'nan' in p2.lower(): return '0' - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) + if '0x' in p1: + f1 = float.fromhex(p1) + else: + f1 = float(p1) + + if '0x' in p2: + f2 = float.fromhex(p2) + else: + f2 = float(p2) if op == 'eq': return '-1' if f1 == f2 else '0' diff --git a/test/core/simd/simd_f32x4_cmp.wast b/test/core/simd/simd_f32x4_cmp.wast index 7811bd657e..3d3145f936 100644 --- a/test/core/simd/simd_f32x4_cmp.wast +++ b/test/core/simd/simd_f32x4_cmp.wast @@ -1210,6 +1210,81 @@ (assert_return (invoke "eq" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) ;; ne (assert_return (invoke "ne" (v128.const f32x4 nan nan nan nan) @@ -2412,6 +2487,81 @@ (assert_return (invoke "ne" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) ;; lt (assert_return (invoke "lt" (v128.const f32x4 nan nan nan nan) @@ -3614,6 +3764,81 @@ (assert_return (invoke "lt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) ;; le (assert_return (invoke "le" (v128.const f32x4 nan nan nan nan) @@ -4816,6 +5041,81 @@ (assert_return (invoke "le" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) ;; gt (assert_return (invoke "gt" (v128.const f32x4 nan nan nan nan) @@ -6018,6 +6318,81 @@ (assert_return (invoke "gt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) ;; ge (assert_return (invoke "ge" (v128.const f32x4 nan nan nan nan) @@ -7220,6 +7595,81 @@ (assert_return (invoke "ge" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const i32x4 -1 -1 -1 -1)) ;; eq diff --git a/test/core/simd/simd_f64x2_cmp.wast b/test/core/simd/simd_f64x2_cmp.wast index c3727bf020..ea9b6bb44b 100644 --- a/test/core/simd/simd_f64x2_cmp.wast +++ b/test/core/simd/simd_f64x2_cmp.wast @@ -970,6 +970,81 @@ (assert_return (invoke "f64x2.eq" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.eq" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) (assert_return (invoke "f64x2.eq" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 0 0)) @@ -2170,6 +2245,81 @@ (assert_return (invoke "f64x2.ne" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ne" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) (assert_return (invoke "f64x2.ne" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 -1 -1)) @@ -3370,6 +3520,81 @@ (assert_return (invoke "f64x2.lt" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.lt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) (assert_return (invoke "f64x2.lt" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 0 0)) @@ -4570,6 +4795,81 @@ (assert_return (invoke "f64x2.le" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.le" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) (assert_return (invoke "f64x2.le" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 0 0)) @@ -5770,6 +6070,81 @@ (assert_return (invoke "f64x2.gt" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.gt" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) (assert_return (invoke "f64x2.gt" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 0 0)) @@ -6970,6 +7345,81 @@ (assert_return (invoke "f64x2.ge" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const i64x2 0 0)) +(assert_return (invoke "f64x2.ge" (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) + (v128.const i64x2 -1 -1)) (assert_return (invoke "f64x2.ge" (v128.const f64x2 nan nan) (v128.const f64x2 0x1p-1074 0x1p-1074)) (v128.const i64x2 0 0)) @@ -7785,4 +8235,4 @@ (assert_return (invoke "nested-f64x2.le")) (assert_return (invoke "nested-f64x2.gt")) (assert_return (invoke "nested-f64x2.ge")) -(assert_return (invoke "as-param")) \ No newline at end of file +(assert_return (invoke "as-param")) From 6b7ef4f76f0234065920714d0c3759b12a96a68d Mon Sep 17 00:00:00 2001 From: Andrew Brown Date: Tue, 10 Dec 2019 14:18:08 -0800 Subject: [PATCH 104/378] Truncate extra bits of too-large parameters to splat; closes #149 (#151) Previously it was not clear what to do when passing an `i32` to, e.g., an `i8x16.splat`: the `i32` has more bits than fit in an `i8` lane. As discussed in #149, this change removes the extra bits (potentially losing information) so that the input parameter will fit in the splatted lanes. If at some point the spec adds support for `i8` and `i16` types, then this change would be unnecessary since the splat signature could be, e.g., `i8x16.splat(x: i8)` and no truncation would be required. --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 8b9ef3eebb..46ae45cd20 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -231,7 +231,7 @@ Construct a vector with `x` replicated to all lanes: def S.splat(x): result = S.New() for i in range(S.Lanes): - result[i] = x + result[i] = S.Reduce(x) return result ``` From bc0e8f592aee05599d7343640b5fff0684327d73 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Thu, 12 Dec 2019 03:12:50 +0800 Subject: [PATCH 105/378] [test] Add more literal tests for rest ops (#155) This PR covers tests for some float literal introduced in https://github.com/WebAssembly/spec/pull/1069, specific for following ops: Bit shifts Bitwise operations Boolean horizontal reductions Conversions Integer comparisons Store These tests are pulled from https://github.com/WAVM/WAVM/pull/236/ --- test/core/simd/meta/simd_bitwise.py | 14 +++++ test/core/simd/meta/simd_i16x8_cmp.py | 22 ++++++- test/core/simd/meta/simd_i32x4_cmp.py | 32 +++++++++- test/core/simd/simd_bit_shift.wast | 62 +++++++++++++++++++ test/core/simd/simd_bitwise.wast | 38 +++++++++++- test/core/simd/simd_boolean.wast | 18 +++++- test/core/simd/simd_conversions.wast | 85 +++++++++++++++++++++++---- test/core/simd/simd_i16x8_cmp.wast | 61 ++++++++++++++++++- test/core/simd/simd_i32x4_cmp.wast | 61 ++++++++++++++++++- test/core/simd/simd_store.wast | 23 +++++++- 10 files changed, 395 insertions(+), 21 deletions(-) diff --git a/test/core/simd/meta/simd_bitwise.py b/test/core/simd/meta/simd_bitwise.py index 864e197cd5..5e8eb33a9c 100644 --- a/test/core/simd/meta/simd_bitwise.py +++ b/test/core/simd/meta/simd_bitwise.py @@ -269,6 +269,8 @@ def get_case_data(self): ["not", [['0', '-1', '0', '-1']], [['-1', '0', '-1', '0']], ['i32x4', 'i32x4']], ["not", ['0x55555555'], ['0xAAAAAAAA'], ['i32x4', 'i32x4']], ["not", ['3435973836'], ['858993459'], ['i32x4', 'i32x4']], + ['not', ['01_234_567_890'], ['3060399405'], ['i32x4', 'i32x4']], + ['not', ['0x0_1234_5678'], ['0xedcba987'], ['i32x4', 'i32x4']], ["and", [['0', '-1'], ['0', '-1', '0', '-1']], [['0', '0', '0', '-1']], ['i32x4', 'i32x4', 'i32x4']], ["and", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], ["and", ['0', '-1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], @@ -283,6 +285,8 @@ def get_case_data(self): ["and", ['0xFFFFFFFF', '0x0'], ['0x0'], ['i32x4', 'i32x4', 'i32x4']], ["and", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], ['0x5555'], ['i32x4', 'i32x4', 'i32x4']], + ['and', ['01_234_567_890', '01_234_567_890'], ['1234567890'], ['i32x4', 'i32x4', 'i32x4']], + ['and', ['0x0_1234_5678', '0x0_90AB_cdef'], ['0x10204468'], ['i32x4', 'i32x4', 'i32x4']], ["or", [['0', '0', '-1', '-1'], ['0', '-1', '0', '-1']], [['0', '-1', '-1', '-1']], ['i32x4', 'i32x4', 'i32x4']], ["or", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], @@ -299,6 +303,8 @@ def get_case_data(self): ["or", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], [['0x55555555', '0x5555ffff', '0x555555ff', '0x55555fff']], ['i32x4', 'i32x4', 'i32x4']], + ['or', ['01_234_567_890', '01_234_567_890'], ['1234567890'], ['i32x4', 'i32x4', 'i32x4']], + ['or', ['0x0_1234_5678', '0x0_90AB_cdef'], ['0x92bfdfff'], ['i32x4', 'i32x4', 'i32x4']], ["xor", [['0', '0', '-1', '-1'], ['0', '-1', '0', '-1']], [['0', '-1', '-1', '0']], ['i32x4', 'i32x4', 'i32x4']], ["xor", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], @@ -316,6 +322,8 @@ def get_case_data(self): ["xor", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], [['0x55550000', '0x5555AAAA', '0x555500AA', '0x55550AAA']], ['i32x4', 'i32x4', 'i32x4']], + ['xor', ['01_234_567_890', '01_234_567_890'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ['xor', ['0x0_1234_5678', '0x0_90AB_cdef'], ['0x829f9b97'], ['i32x4', 'i32x4', 'i32x4']], ["bitselect", ['0xAAAAAAAA', '0xBBBBBBBB', ['0x00112345', '0xF00FFFFF', '0x10112021', '0xBBAABBAA']], [['0xBBAABABA', '0xABBAAAAA', '0xABAABBBA', '0xAABBAABB']], @@ -336,6 +344,10 @@ def get_case_data(self): ['0x55555555', '0xAAAAAAAA', '0x00000000', '0xFFFFFFFF']], [['0x00000000', '0xFFFFFFFF', '0x55555555', '0xAAAAAAAA']], ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ['bitselect', ['01_234_567_890', '03_060_399_406', '0xcdefcdef'], ['2072391874'], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], + ['bitselect', ['0x0_1234_5678', '0x0_90AB_cdef', '0xcdefcdef'], ['0x10244468'], + ['i32x4', 'i32x4', 'i32x4', 'i32x4']], ["andnot", [['0', '-1'], ['0', '-1', '0', '-1']], [['0', '0', '-1', '0']], ['i32x4', 'i32x4', 'i32x4']], ["andnot", ['0', '0'], ['0'], ['i32x4', 'i32x4', 'i32x4']], ["andnot", ['0', '-1'], ['0'], ['i32x4', 'i32x4', 'i32x4']], @@ -350,6 +362,8 @@ def get_case_data(self): ["andnot", ['0xFFFFFFFF', '0x0'], ['0xFFFFFFFF'], ['i32x4', 'i32x4', 'i32x4']], ["andnot", ['0x55555555', ['0x5555', '0xFFFF', '0x55FF', '0x5FFF']], ['0x55550000'], ['i32x4', 'i32x4', 'i32x4']], + ['andnot', ['01_234_567_890', '01_234_567_890'], ['0'], ['i32x4', 'i32x4', 'i32x4']], + ['andnot', ['0x0_1234_5678', '0x0_90AB_cdef'], ['0x02141210'], ['i32x4', 'i32x4', 'i32x4']], ['#', 'for float special data [e.g. -nan nan -inf inf]'], ["not", ['-nan'], ['5.87747e-39'], ['f32x4', 'f32x4']], diff --git a/test/core/simd/meta/simd_i16x8_cmp.py b/test/core/simd/meta/simd_i16x8_cmp.py index d4f55abea0..836cd88c76 100644 --- a/test/core/simd/meta/simd_i16x8_cmp.py +++ b/test/core/simd/meta/simd_i16x8_cmp.py @@ -97,6 +97,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['eq', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['-1', '0', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['eq', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['eq', ['012_345', '12345'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['eq', ['0x0_1234', '0x1234'], '-1', ['i16x8', 'i16x8', 'i16x8']]) # ne # i16x8.ne (i16x8) (i16x8) @@ -176,6 +178,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ne', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '0', '0', '0', '-1', '0', '-1'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ne', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ne', ['012_345', '12345'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ne', ['0x0_1234', '0x1234'], '0', ['i16x8', 'i16x8', 'i16x8']]) # lt_s # i16x8.lt_s (i16x8) (i16x8) @@ -245,6 +249,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['lt_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '0', '0', '0', '0', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['lt_s', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_s', ['012_345', '12345'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_s', ['0x0_1234', '0x1234'], '0', ['i16x8', 'i16x8', 'i16x8']]) # lt_u # i16x8.lt_u (i16x8) (i16x8) @@ -324,6 +330,8 @@ def get_case_data(self): case_data.append(['lt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '0', '0', '0', '0', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['lt_u', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['lt_u', ['012_345', '12345'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['lt_u', ['0x0_1234', '0x1234'], '0', ['i16x8', 'i16x8', 'i16x8']]) # le_s # i16x8.le_s (i16x8) (i16x8) @@ -403,6 +411,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['le_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '-1', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['le_s', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_s', ['012_345', '12345'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_s', ['0x0_1234', '0x1234'], '-1', ['i16x8', 'i16x8', 'i16x8']]) # le_u # i16x8.le_u (i16x8) (i16x8) @@ -480,6 +490,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['le_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '-1', '-1', '-1', '-1', '0', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['le_u', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['le_u', ['012_345', '12345'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['le_u', ['0x0_edcb', '-0x1234'], '-1', ['i16x8', 'i16x8', 'i16x8']]) # gt_s # i16x8.gt_s (i16x8) (i16x8) @@ -557,6 +569,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['gt_s', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['0', '0', '0', '0', '0', '-1', '0', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['gt_s', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_s', ['012_345', '12345'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_s', ['0x0_1234', '0x1234'], '0', ['i16x8', 'i16x8', 'i16x8']]) # gt_u # i16x8.gt_u (i16x8) (i16x8) @@ -635,6 +649,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '0', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['gt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '0', '0', '0', '-1', '0', '-1'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['gt_u', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['gt_u', ['012_345', '12345'], '0', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['gt_u', ['0x0_1234', '0x1234'], '0', ['i16x8', 'i16x8', 'i16x8']]) # ge_s # i16x8.ge_s (i16x8) (i16x8) @@ -712,6 +728,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ge_s', [['65535', '0', '1', '32768'], ['65535', '0', '1', '32768']], ['-1', '0', '-1', '-1', '-1', '-1', '-1', '0'], ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ge_s', ['0x5555', '0xAAAAAAAA'], '-1', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_s', ['012_345', '12345'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_s', ['0x0_1234', '0x1234'], '-1', ['i16x8', 'i16x8', 'i16x8']]) # ge_u # i16x8.ge_u (i16x8) (i16x8) @@ -789,6 +807,8 @@ def get_case_data(self): ['2206368128', '16776957', '2130837760', '4294901120']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ge_u', [['65535', '0', '1', '32768'], ['-128', '0', '1', '255']], '-1', ['i16x8', 'i32x4', 'i16x8']]) case_data.append(['ge_u', ['0x5555', '0xAAAAAAAA'], '0', ['i16x8', 'i32x4', 'i16x8']]) + case_data.append(['ge_u', ['012_345', '12345'], '-1', ['i16x8', 'i16x8', 'i16x8']]) + case_data.append(['ge_u', ['0x0_1234', '0x1234'], '-1', ['i16x8', 'i16x8', 'i16x8']]) return case_data @@ -800,4 +820,4 @@ def gen_test_cases(): if __name__ == '__main__': i16x8 = Simdi16x8CmpCase() - i16x8.gen_test_cases() + i16x8.gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_i32x4_cmp.py b/test/core/simd/meta/simd_i32x4_cmp.py index 09b789e561..c6c70a9d92 100644 --- a/test/core/simd/meta/simd_i32x4_cmp.py +++ b/test/core/simd/meta/simd_i32x4_cmp.py @@ -93,6 +93,9 @@ def get_case_data(self): case_data.append(['eq', [['4294967295', '0', '1', '65535'], ['65535', '65535', '0', '0', '1', '0', '65535', '65535']], ['-1', '-1', '-1', '0'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['eq', ['0x55555555', '0xAAAA'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['eq', ['0_123_456_789', '123456789'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['eq', ['0x0_1234_5678', '0x12345678'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # ne # i32x4.ne (i32x4) (i32x4) case_data.append(['#', 'ne']) @@ -169,6 +172,9 @@ def get_case_data(self): case_data.append(['ne', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['ne', ['0xAAAAAAAA', '0x5555'], ['-1', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ne', ['0_123_456_789', '123456789'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ne', ['0x0_1234_5678', '0x12345678'], '0', ['i32x4', 'i32x4', 'i32x4']]) + # lt_s # i32x4.lt_s (i32x4) (i32x4) case_data.append(['#', 'lt_s']) @@ -246,6 +252,9 @@ def get_case_data(self): case_data.append(['lt_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['lt_s', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_s', ['0_123_456_789', '123456789'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_s', ['0x0_90AB_cdef', '-0x6f543210'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # lt_u # i32x4.lt_u (i32x4) (i32x4) case_data.append(['#', 'lt_u']) @@ -320,6 +329,9 @@ def get_case_data(self): case_data.append(['lt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '0', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['lt_u', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['lt_u', ['0_123_456_789', '123456789'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['lt_u', ['0x0_90AB_cdef', '-0x6f543210'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # le_s # i32x4.le_s (i32x4) (i32x4) case_data.append(['#', 'le_s']) @@ -396,6 +408,9 @@ def get_case_data(self): case_data.append(['le_s', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['le_s', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_s', ['0_123_456_789', '123456789'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_s', ['0x0_1234_5678', '0x12345678'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # le_u # i32x4.le_u (i32x4) (i32x4) case_data.append(['#', 'le_u']) @@ -471,6 +486,9 @@ def get_case_data(self): case_data.append(['le_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['0', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['le_u', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['le_u', ['0_123_456_789', '123456789'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['le_u', ['0x0_90AB_cdef', '0x90ABcdef'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # gt_s # i32x4.gt_s (i32x4) (i32x4) case_data.append(['#', 'gt_s']) @@ -546,6 +564,9 @@ def get_case_data(self): case_data.append(['gt_s', [['65535', '0', '1', '32768'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['-1', '0', '0', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['gt_s', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_s', ['0_123_456_789', '123456789'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_s', ['0x0_90AB_cdef', '-0x6f543211'], '0', ['i32x4', 'i32x4', 'i32x4']]) + # gt_u # i32x4.gt_u (i32x4) (i32x4) case_data.append(['#', 'gt_u']) @@ -621,6 +642,9 @@ def get_case_data(self): case_data.append(['gt_u', [['-128', '0', '1', '255'], ['-128', '0', '1', '255']], ['-1', '0', '0', '0'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['gt_u', ['0xAAAAAAAA', '0x5555'], '-1', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['gt_u', ['0_123_456_789', '123456789'], '0', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['gt_u', ['0x0_1234_5678', '0x12345678'], '0', ['i32x4', 'i32x4', 'i32x4']]) + # ge_s # i32x4.ge_s (i32x4) (i32x4) case_data.append(['#', 'ge_s']) @@ -696,6 +720,9 @@ def get_case_data(self): case_data.append(['ge_s', [['65535', '0', '1', '32768'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['-1', '-1', '0', '-1'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['ge_s', ['0xAAAAAAAA', '0x5555'], '0', ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_s', ['0_123_456_789', '123456789'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_s', ['0x0_1234_5678', '0x12345678'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + # ge_u # i32x4.ge_u (i32x4) (i32x4) case_data.append(['#', 'ge_u']) @@ -772,6 +799,9 @@ def get_case_data(self): case_data.append(['ge_u', [['-128', '0', '1', '255'], ['65535', '65535', '0', '0', '1', '1', '32768', '32768']], ['0', '-1', '0', '0'], ['i32x4', 'i16x8', 'i32x4']]) case_data.append(['ge_u', ['0xAAAAAAAA', '0x5555'], ['-1', '-1', '-1', '-1'], ['i32x4', 'i16x8', 'i32x4']]) + case_data.append(['ge_u', ['0_123_456_789', '123456789'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + case_data.append(['ge_u', ['0x0_1234_5678', '0x12345678'], '-1', ['i32x4', 'i32x4', 'i32x4']]) + return case_data # generate all test cases @@ -802,4 +832,4 @@ def gen_test_cases(): if __name__ == '__main__': i32x4 = Simdi32x4CmpCase() - i32x4.gen_test_cases() + i32x4.gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/simd_bit_shift.wast b/test/core/simd/simd_bit_shift.wast index 95b8140e41..a49b8032ec 100644 --- a/test/core/simd/simd_bit_shift.wast +++ b/test/core/simd/simd_bit_shift.wast @@ -190,6 +190,12 @@ (assert_return (invoke "i16x8.shl" (v128.const i16x8 -128 -64 0 1 2 3 4 5) (i32.const 1)) (v128.const i16x8 65280 65408 0 2 4 6 8 10)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (i32.const 2)) + (v128.const i16x8 49380 49380 49380 49380 49380 49380 49380 49380)) +(assert_return (invoke "i16x8.shl" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (i32.const 2)) + (v128.const i16x8 0x48d0 0x48d0 0x48d0 0x48d0 0x48d0 0x48d0 0x48d0 0x48d0)) (assert_return (invoke "i16x8.shl" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) (i32.const 4)) (v128.const i16x8 0xABB0 0xCDD0 0xEFF0 0xB00 0xD00 0xF00 0xA0B0 0xC0D0)) @@ -228,11 +234,18 @@ (assert_return (invoke "i16x8.shl" (v128.const i16x8 0 1 2 3 4 5 6 7) (i32.const 514)) (v128.const i16x8 0 4 8 12 16 20 24 28)) + ;; i16x8 shr_u ;; amount less than lane width (assert_return (invoke "i16x8.shr_u" (v128.const i16x8 -128 -64 0 1 2 3 4 5) (i32.const 1)) (v128.const i16x8 32704 32736 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (i32.const 2)) + (v128.const i16x8 3086 3086 3086 3086 3086 3086 3086 3086)) +(assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (i32.const 2)) + (v128.const i16x8 0x242a 0x242a 0x242a 0x242a 0x242a 0x242a 0x242a 0x242a)) (assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) (i32.const 4)) (v128.const i16x8 0xAAB 0xCCD 0xEEF 0xA0B 0xC0D 0xE0F 0x0A0 0x0C0)) @@ -271,11 +284,18 @@ (assert_return (invoke "i16x8.shr_u" (v128.const i16x8 0 1 2 3 4 5 6 7) (i32.const 514)) (v128.const i16x8 0 0 0 0 1 1 1 1)) + ;; i16x8 shr_s ;; amount less than lane width (assert_return (invoke "i16x8.shr_s" (v128.const i16x8 -128 -64 0 1 2 3 4 5) (i32.const 1)) (v128.const i16x8 65472 65504 0 0 1 1 2 2)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (i32.const 2)) + (v128.const i16x8 3086 3086 3086 3086 3086 3086 3086 3086)) +(assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (i32.const 2)) + (v128.const i16x8 0xe42a 0xe42a 0xe42a 0xe42a 0xe42a 0xe42a 0xe42a 0xe42a)) (assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0xAABB 0xCCDD 0xEEFF 0xA0B0 0xC0D0 0xE0F0 0x0A0B 0x0C0D) (i32.const 4)) (v128.const i16x8 0xFAAB 0xFCCD 0xFEEF 0xFA0B 0xFC0D 0xFE0F 0x00A0 0x00C0)) @@ -314,6 +334,7 @@ (assert_return (invoke "i16x8.shr_s" (v128.const i16x8 0 1 2 3 4 5 6 7) (i32.const 514)) (v128.const i16x8 0 0 0 0 1 1 1 1)) + ;; shifting by a constant amount (assert_return (invoke "i16x8.shl_1" (v128.const i16x8 0 1 2 3 4 5 6 7)) (v128.const i16x8 0 2 4 6 8 10 12 14)) @@ -327,6 +348,12 @@ (assert_return (invoke "i32x4.shl" (v128.const i32x4 -2147483648 -32768 0 0x0A0B0C0D) (i32.const 1)) (v128.const i32x4 0 4294901760 0 0x1416181A)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (i32.const 2)) + (v128.const i32x4 643304264 643304264 643304264 643304264)) +(assert_return (invoke "i32x4.shl" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (i32.const 2)) + (v128.const i32x4 0x48d159e0 0x48d159e0 0x48d159e0 0x48d159e0)) (assert_return (invoke "i32x4.shl" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) (i32.const 4)) (v128.const i32x4 0xABBCCDD0 0xEFFA0B00 0x0D0E0F00 0xA0B0C0D0)) @@ -365,11 +392,18 @@ (assert_return (invoke "i32x4.shl" (v128.const i32x4 0 1 0x0E 0x0F) (i32.const 514)) (v128.const i32x4 0 4 0x38 0x3C)) + ;; i32x4 shr_u ;; amount less than lane width (assert_return (invoke "i32x4.shr_u" (v128.const i32x4 -2147483648 -32768 0x0000000C 0x0000000D) (i32.const 1)) (v128.const i32x4 1073741824 2147467264 0x00000006 0x00000006)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (i32.const 2)) + (v128.const i32x4 308641972 308641972 308641972 308641972)) +(assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (i32.const 2)) + (v128.const i32x4 0x242af37b 0x242af37b 0x242af37b 0x242af37b)) (assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) (i32.const 4)) (v128.const i32x4 0x0AABBCCD 0x0EEFFA0B 0x0C0D0E0F 0x00A0B0C0)) @@ -408,11 +442,18 @@ (assert_return (invoke "i32x4.shr_u" (v128.const i32x4 0 1 0x0E 0x0F) (i32.const 514)) (v128.const i32x4 0 0 0x03 0x03)) + ;; i32x4 shr_s ;; amount less than lane width (assert_return (invoke "i32x4.shr_s" (v128.const i32x4 -2147483648 -32768 0x0C 0x0D) (i32.const 1)) (v128.const i32x4 3221225472 4294950912 0x06 0x06)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (i32.const 2)) + (v128.const i32x4 308641972 308641972 308641972 308641972)) +(assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (i32.const 2)) + (v128.const i32x4 0xe42af37b 0xe42af37b 0xe42af37b 0xe42af37b)) (assert_return (invoke "i32x4.shr_s" (v128.const i32x4 0xAABBCCDD 0xEEFFA0B0 0xC0D0E0F0 0x0A0B0C0D) (i32.const 4)) (v128.const i32x4 0xfaabbccd 0xFEEFFA0B 0xFC0D0E0F 0x00A0B0C0)) @@ -465,6 +506,12 @@ (assert_return (invoke "i64x2.shl" (v128.const i64x2 -9223372036854775808 -2147483648) (i32.const 1)) (v128.const i64x2 0 18446744069414584320)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789) + (i32.const 2)) + (v128.const i64x2 4938271560493827156 4938271560493827156)) +(assert_return (invoke "i64x2.shl" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef) + (i32.const 2)) + (v128.const i64x2 0x48d159e242af37bc 0x48d159e242af37bc)) (assert_return (invoke "i64x2.shl" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) (i32.const 4)) (v128.const i64x2 0xABBCCDDEEFFA0B00 0xD0E0F00A0B0C0D0)) @@ -500,11 +547,18 @@ (assert_return (invoke "i64x2.shl" (v128.const i64x2 1 0x0F) (i32.const 514)) (v128.const i64x2 4 0x3C)) + ;; i64x2 shr_u ;; amount less than lane width (assert_return (invoke "i64x2.shr_u" (v128.const i64x2 -9223372036854775808 -2147483648) (i32.const 1)) (v128.const i64x2 4611686018427387904 9223372035781033984)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789) + (i32.const 2)) + (v128.const i64x2 308641972530864197 308641972530864197)) +(assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0x0_90AB_cdef_8765_4321 0x0_90AB_cdef_8765_4321) + (i32.const 2)) + (v128.const i64x2 0x242af37be1d950c8 0x242af37be1d950c8)) (assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) (i32.const 4)) (v128.const i64x2 0xAABBCCDDEEFFA0B 0xC0D0E0F00A0B0C0)) @@ -540,11 +594,18 @@ (assert_return (invoke "i64x2.shr_u" (v128.const i64x2 0 0x0F) (i32.const 514)) (v128.const i64x2 0 0x03)) + ;; i64x2 shr_s ;; amount less than lane width (assert_return (invoke "i64x2.shr_s" (v128.const i64x2 -9223372036854775808 -2147483648) (i32.const 1)) (v128.const i64x2 13835058055282163712 18446744072635809792)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789) + (i32.const 2)) + (v128.const i64x2 308641972530864197 308641972530864197)) +(assert_return (invoke "i64x2.shr_s" (v128.const i64x2 0x0_90AB_cdef_8765_4321 0x0_90AB_cdef_8765_4321) + (i32.const 2)) + (v128.const i64x2 0xe42af37be1d950c8 0xe42af37be1d950c8)) (assert_return (invoke "i64x2.shr_s" (v128.const i64x2 0xAABBCCDDEEFFA0B0 0xC0D0E0F00A0B0C0D) (i32.const 4)) (v128.const i64x2 0xFAABBCCDDEEFFA0B 0xFC0D0E0F00A0B0C0)) @@ -583,6 +644,7 @@ (assert_return (invoke "i64x2.shr_s" (v128.const i64x2 1 0x0F) (i32.const 514)) (v128.const i64x2 0 0x03)) + ;; shifting by a constant amount (assert_return (invoke "i64x2.shl_1" (v128.const i64x2 1 0x0F)) (v128.const i64x2 2 0x1E)) diff --git a/test/core/simd/simd_bitwise.wast b/test/core/simd/simd_bitwise.wast index 0e00b0cafd..821f46aa84 100644 --- a/test/core/simd/simd_bitwise.wast +++ b/test/core/simd/simd_bitwise.wast @@ -24,6 +24,10 @@ (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (assert_return (invoke "not" (v128.const i32x4 3435973836 3435973836 3435973836 3435973836)) (v128.const i32x4 858993459 858993459 858993459 858993459)) +(assert_return (invoke "not" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 3060399405 3060399405 3060399405 3060399405)) +(assert_return (invoke "not" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (v128.const i32x4 0xedcba987 0xedcba987 0xedcba987 0xedcba987)) (assert_return (invoke "and" (v128.const i32x4 0 0 -1 -1) (v128.const i32x4 0 -1 0 -1)) (v128.const i32x4 0 0 0 -1)) @@ -60,6 +64,12 @@ (assert_return (invoke "and" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) (v128.const i32x4 0x5555 0x5555 0x5555 0x5555)) +(assert_return (invoke "and" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 1234567890 1234567890 1234567890 1234567890)) +(assert_return (invoke "and" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x10204468 0x10204468 0x10204468 0x10204468)) (assert_return (invoke "or" (v128.const i32x4 0 0 -1 -1) (v128.const i32x4 0 -1 0 -1)) (v128.const i32x4 0 -1 -1 -1)) @@ -96,6 +106,12 @@ (assert_return (invoke "or" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) (v128.const i32x4 0x55555555 0x5555ffff 0x555555ff 0x55555fff)) +(assert_return (invoke "or" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 1234567890 1234567890 1234567890 1234567890)) +(assert_return (invoke "or" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x92bfdfff 0x92bfdfff 0x92bfdfff 0x92bfdfff)) (assert_return (invoke "xor" (v128.const i32x4 0 0 -1 -1) (v128.const i32x4 0 -1 0 -1)) (v128.const i32x4 0 -1 -1 0)) @@ -132,6 +148,12 @@ (assert_return (invoke "xor" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) (v128.const i32x4 0x55550000 0x5555AAAA 0x555500AA 0x55550AAA)) +(assert_return (invoke "xor" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "xor" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x829f9b97 0x829f9b97 0x829f9b97 0x829f9b97)) (assert_return (invoke "bitselect" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i32x4 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB 0xBBBBBBBB) (v128.const i32x4 0x00112345 0xF00FFFFF 0x10112021 0xBBAABBAA)) @@ -156,6 +178,14 @@ (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x55555555 0xAAAAAAAA 0x00000000 0xFFFFFFFF)) (v128.const i32x4 0x00000000 0xFFFFFFFF 0x55555555 0xAAAAAAAA)) +(assert_return (invoke "bitselect" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 03_060_399_406 03_060_399_406 03_060_399_406 03_060_399_406) + (v128.const i32x4 0xcdefcdef 0xcdefcdef 0xcdefcdef 0xcdefcdef)) + (v128.const i32x4 2072391874 2072391874 2072391874 2072391874)) +(assert_return (invoke "bitselect" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 0xcdefcdef 0xcdefcdef 0xcdefcdef 0xcdefcdef)) + (v128.const i32x4 0x10244468 0x10244468 0x10244468 0x10244468)) (assert_return (invoke "andnot" (v128.const i32x4 0 0 -1 -1) (v128.const i32x4 0 -1 0 -1)) (v128.const i32x4 0 0 -1 0)) @@ -192,6 +222,12 @@ (assert_return (invoke "andnot" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i32x4 0x5555 0xFFFF 0x55FF 0x5FFF)) (v128.const i32x4 0x55550000 0x55550000 0x55550000 0x55550000)) +(assert_return (invoke "andnot" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "andnot" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const i32x4 0x02141210 0x02141210 0x02141210 0x02141210)) ;; for float special data [e.g. -nan nan -inf inf] (assert_return (invoke "not" (v128.const f32x4 -nan -nan -nan -nan)) @@ -673,4 +709,4 @@ (assert_return (invoke "nested-v128.xor")) (assert_return (invoke "nested-v128.bitselect")) (assert_return (invoke "nested-v128.andnot")) -(assert_return (invoke "as-param")) +(assert_return (invoke "as-param")) \ No newline at end of file diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 402c0c9840..7838520c59 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -68,6 +68,10 @@ (i32.const 1)) (assert_return (invoke "i16x8.any_true" (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) + (i32.const 1)) +(assert_return (invoke "i16x8.any_true" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) + (i32.const 1)) (assert_return (invoke "i16x8.all_true" (v128.const i16x8 0 0 0 0 0 0 0 0)) (i32.const 0)) (assert_return (invoke "i16x8.all_true" (v128.const i16x8 0 0 0 0 0 0 1 0)) @@ -86,7 +90,10 @@ (i32.const 1)) (assert_return (invoke "i16x8.all_true" (v128.const i16x8 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) (i32.const 1)) - +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) + (i32.const 1)) +(assert_return (invoke "i16x8.all_true" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) + (i32.const 1)) ;; i32x4 (assert_return (invoke "i32x4.any_true" (v128.const i32x4 0 0 0 0)) (i32.const 0)) @@ -106,6 +113,10 @@ (i32.const 1)) (assert_return (invoke "i32x4.any_true" (v128.const i32x4 0x55 0x55 0x55 0x55)) (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (i32.const 1)) +(assert_return (invoke "i32x4.any_true" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (i32.const 1)) (assert_return (invoke "i32x4.all_true" (v128.const i32x4 0 0 0 0)) (i32.const 0)) (assert_return (invoke "i32x4.all_true" (v128.const i32x4 0 0 1 0)) @@ -124,7 +135,10 @@ (i32.const 1)) (assert_return (invoke "i32x4.all_true" (v128.const i32x4 0x55 0x55 0x55 0x55)) (i32.const 1)) - +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (i32.const 1)) +(assert_return (invoke "i32x4.all_true" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (i32.const 1)) ;; Combination diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 5235d6537a..b33f2ec6a2 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -130,7 +130,10 @@ (v128.const i32x4 42 0 2147483647 -2147483648)) (assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -42 3.14 nan inf)) (v128.const i32x4 -42 3 0 2147483647)) - +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) + (v128.const i32x4 123456792 123456792 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 01234567890.0 01234567890.0 01234567890.0 01234567890.0)) + (v128.const i32x4 0x49960300 0x49960300 0x49960300 0x49960300)) ;; i32x4.trunc_sat_f32x4_u (assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0.0 0.0 0.0 0.0)) @@ -217,7 +220,10 @@ (v128.const i32x4 42 0 0xffffffff 0)) (assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -42 3.14 nan inf)) (v128.const i32x4 0 3 0 0xffffffff)) - +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) + (v128.const i32x4 123456792 123456792 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0123456789.0 -0123456789.0 -0123456789.0 -0123456789.0)) + (v128.const i32x4 0 0 0 0)) ;; i64x2.trunc_sat_f64x2_s (assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0.0 0.0)) @@ -300,7 +306,10 @@ (v128.const i64x2 3 0)) (assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -3.14 -inf)) (v128.const i64x2 -3 -0x8000000000000000)) - +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 01234567890123456768.0 01234567890123456768.0)) + (v128.const i64x2 1234567890123456768 1234567890123456768)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 01234567890123456789.0 01234567890123456789.0)) + (v128.const i64x2 0x112210f47de98100 0x112210f47de98100)) ;; i64x2.trunc_sat_f64x2_u (assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0.0 0.0)) @@ -387,6 +396,10 @@ (v128.const i64x2 3 0)) (assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -3.14 -inf)) (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 01234567890123456768.0 01234567890123456768.0)) + (v128.const i64x2 1234567890123456768 1234567890123456768)) +(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -01234567890123456789.0 -01234567890123456789.0)) + (v128.const i64x2 0 0)) ;; Integer to floating point ;; f32x4.convert_i32x4_s @@ -403,6 +416,10 @@ (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) (assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 1234567890 1234567890 1234567890 1234567890)) (v128.const f32x4 0x1.26580cp+30 0x1.26580cp+30 0x1.26580cp+30 0x1.26580cp+30)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0_123_456_792 0_123_456_792 0_123_456_792 0_123_456_792)) + (v128.const f32x4 123456792.0 123456792.0 123456792.0 123456792.0)) +(assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0x0_1234_5680 0x0_1234_5680 0x0_1234_5680 0x0_1234_5680)) + (v128.const f32x4 305419904.0 305419904.0 305419904.0 305419904.0)) ;; Test rounding directions. (assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 16777217 16777217 16777217 16777217)) @@ -440,7 +457,10 @@ (v128.const f64x2 -9007199254740996.0 -9007199254740996.0)) (assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) (v128.const f64x2 9223372036854775807.0 -9223372036854775808.0)) - +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) + (v128.const f64x2 1.2345678901234568e+18 1.2345678901234568e+18)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef)) + (v128.const f64x2 1.3117684672948997e+18 1.3117684672948997e+18)) ;; f32x4.convert_i32x4_u (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 0 0 0)) @@ -467,6 +487,10 @@ (v128.const f32x4 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31)) (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0xfffffe82 0xfffffe82 0xfffffe82 0xfffffe82)) (v128.const f32x4 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31 0x1.fffffep+31)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0_123_456_792 0_123_456_792 0_123_456_792 0_123_456_792)) + (v128.const f32x4 123456792.0 123456792.0 123456792.0 123456792.0)) +(assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef)) + (v128.const f32x4 2427178496.0 2427178496.0 2427178496.0 2427178496.0)) ;; Test rounding directions. (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 16777217 16777217 16777217 16777217)) @@ -508,7 +532,10 @@ (v128.const f64x2 9007199254740996.0 9007199254740996.0)) (assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) (v128.const f64x2 9223372036854775807.0 9223372036854775808.0)) - +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) + (v128.const f64x2 1.2345678901234568e+18 1.2345678901234568e+18)) +(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x0_fedc_BA09_8765_4321 0x0_fedc_BA09_8765_4321)) + (v128.const f64x2 -8.198614311047907e+16 -8.198614311047907e+16)) ;; Integer to integer narrowing ;; i8x16.narrow_i16x8_s @@ -593,7 +620,12 @@ (assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.narrow_i16x8_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) ;; i8x16.narrow_i16x8_u (assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -668,7 +700,12 @@ (assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000) (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789) + (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.narrow_i16x8_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) ;; i16x8.narrow_i32x4_s (assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0 0 0 0) @@ -752,7 +789,12 @@ (assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 -0x8000000 -0x8000000 -0x8000000 -0x8000000) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0xffff 0xffff 0xffff 0xffff)) - +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "i16x8.narrow_i32x4_s" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) ;; i16x8.narrow_i32x4_u (assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0 0 0 0) @@ -809,7 +851,12 @@ (assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) (v128.const i16x8 0 0 0 0 0 0 0 0)) - +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 01_234_567_890 01_234_567_890 01_234_567_890 01_234_567_890)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.narrow_i32x4_u" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) ;; Integer to integer widening ;; i16x8.widen_low_i8x16_s @@ -1036,7 +1083,10 @@ (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) (assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) - +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i32x4 0xffffddd5 0xffffddd5 0xffffddd5 0xffffddd5)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i32x4 0xffff90ab 0xffff90ab 0xffff90ab 0xffff90ab)) ;; i32x4.widen_high_i16x8_s (assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -1081,7 +1131,10 @@ (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) (assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) - +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i32x4 0xffffddd5 0xffffddd5 0xffffddd5 0xffffddd5)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i32x4 0xffff90ab 0xffff90ab 0xffff90ab 0xffff90ab)) ;; i32x4.widen_low_i16x8_u (assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -1126,7 +1179,10 @@ (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) (assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) - +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i32x4 0x0000ddd5 0x0000ddd5 0x0000ddd5 0x0000ddd5)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i32x4 0x000090ab 0x000090ab 0x000090ab 0x000090ab)) ;; i32x4.widen_high_i16x8_u (assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -1171,7 +1227,10 @@ (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) (assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) - +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i32x4 0x0000ddd5 0x0000ddd5 0x0000ddd5 0x0000ddd5)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i32x4 0x000090ab 0x000090ab 0x000090ab 0x000090ab)) ;; Unknown operator diff --git a/test/core/simd/simd_i16x8_cmp.wast b/test/core/simd/simd_i16x8_cmp.wast index b3e24e2e66..9c3bbdc5ad 100644 --- a/test/core/simd/simd_i16x8_cmp.wast +++ b/test/core/simd/simd_i16x8_cmp.wast @@ -152,6 +152,12 @@ (assert_return (invoke "eq" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; ne @@ -290,6 +296,12 @@ (assert_return (invoke "ne" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) ;; lt_s @@ -422,6 +434,12 @@ (assert_return (invoke "lt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) ;; lt_u @@ -560,6 +578,12 @@ (assert_return (invoke "lt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "lt_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) ;; le_s @@ -698,6 +722,12 @@ (assert_return (invoke "le_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "le_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; le_u @@ -836,6 +866,12 @@ (assert_return (invoke "le_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i16x8 0x0_edcb 0x0_edcb 0x0_edcb 0x0_edcb 0x0_edcb 0x0_edcb 0x0_edcb 0x0_edcb) + (v128.const i16x8 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; gt_s @@ -974,6 +1010,12 @@ (assert_return (invoke "gt_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "gt_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) ;; gt_u @@ -1112,6 +1154,12 @@ (assert_return (invoke "gt_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) ;; ge_s @@ -1250,6 +1298,12 @@ (assert_return (invoke "ge_s" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; ge_u @@ -1388,6 +1442,12 @@ (assert_return (invoke "ge_u" (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555) (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "ge_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; Type check @@ -1675,4 +1735,3 @@ (assert_return (invoke "nested-gt_u")) (assert_return (invoke "nested-ge_s")) (assert_return (invoke "as-param")) - diff --git a/test/core/simd/simd_i32x4_cmp.wast b/test/core/simd/simd_i32x4_cmp.wast index dd07ee0e51..d541c18a46 100644 --- a/test/core/simd/simd_i32x4_cmp.wast +++ b/test/core/simd/simd_i32x4_cmp.wast @@ -152,6 +152,12 @@ (assert_return (invoke "eq" (v128.const i32x4 0x55555555 0x55555555 0x55555555 0x55555555) (v128.const i16x8 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "eq" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "eq" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 -1 -1 -1 -1)) ;; ne @@ -290,6 +296,12 @@ (assert_return (invoke "ne" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ne" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ne" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 0 0 0 0)) ;; lt_s @@ -428,6 +440,12 @@ (assert_return (invoke "lt_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "lt_s" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_s" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 -0x6f543210 -0x6f543210 -0x6f543210 -0x6f543210)) + (v128.const i32x4 -1 -1 -1 -1)) ;; lt_u @@ -566,6 +584,12 @@ (assert_return (invoke "lt_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "lt_u" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 -0x6f543210 -0x6f543210 -0x6f543210 -0x6f543210)) + (v128.const i32x4 -1 -1 -1 -1)) ;; le_s @@ -704,6 +728,12 @@ (assert_return (invoke "le_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_s" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 -1 -1 -1 -1)) ;; le_u @@ -842,6 +872,12 @@ (assert_return (invoke "le_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "le_u" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "le_u" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 0x90ABcdef 0x90ABcdef 0x90ABcdef 0x90ABcdef)) + (v128.const i32x4 -1 -1 -1 -1)) ;; gt_s @@ -980,6 +1016,12 @@ (assert_return (invoke "gt_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_s" (v128.const i32x4 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef 0x0_90AB_cdef) + (v128.const i32x4 -0x6f543211 -0x6f543211 -0x6f543211 -0x6f543211)) + (v128.const i32x4 0 0 0 0)) ;; gt_u @@ -1118,6 +1160,12 @@ (assert_return (invoke "gt_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "gt_u" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "gt_u" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 0 0 0 0)) ;; ge_s @@ -1256,6 +1304,12 @@ (assert_return (invoke "ge_s" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "ge_s" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 -1 -1 -1 -1)) ;; ge_u @@ -1394,6 +1448,12 @@ (assert_return (invoke "ge_u" (v128.const i32x4 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA 0xAAAAAAAA) (v128.const i16x8 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555 0x5555)) (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789) + (v128.const i32x4 123456789 123456789 123456789 123456789)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "ge_u" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678) + (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) + (v128.const i32x4 -1 -1 -1 -1)) ;; Type check @@ -1695,4 +1755,3 @@ (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_u (local.get $x) (local.get $y)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_s (local.get $x) (local.get $y)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_u (local.get $x) (local.get $y)))") "unknown operator") - diff --git a/test/core/simd/simd_store.wast b/test/core/simd/simd_store.wast index 0996c7015c..74931e51c0 100644 --- a/test/core/simd/simd_store.wast +++ b/test/core/simd/simd_store.wast @@ -10,10 +10,27 @@ (v128.store (i32.const 0) (v128.const i16x8 0 1 2 3 4 5 6 7)) (v128.load (i32.const 0)) ) + (func (export "v128.store_i16x8_2") (result v128) + (v128.store (i32.const 0) (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_i16x8_3") (result v128) + (v128.store (i32.const 0) (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) + (v128.load (i32.const 0)) + ) (func (export "v128.store_i32x4") (result v128) (v128.store (i32.const 0) (v128.const i32x4 0 1 2 3)) (v128.load (i32.const 0)) ) + (func (export "v128.store_i32x4_2") (result v128) + (v128.store (i32.const 0) (v128.const i32x4 0_123_456_789 0_123_456_789 0_123_456_789 0_123_456_789)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_i32x4_3") (result v128) + (v128.store (i32.const 0) (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) + (v128.load (i32.const 0)) + ) + (func (export "v128.store_f32x4") (result v128) (v128.store (i32.const 0) (v128.const f32x4 0 1 2 3)) (v128.load (i32.const 0)) @@ -22,7 +39,11 @@ (assert_return (invoke "v128.store_i8x16") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (assert_return (invoke "v128.store_i16x8") (v128.const i16x8 0 1 2 3 4 5 6 7)) +(assert_return (invoke "v128.store_i16x8_2") (v128.const i16x8 12345 12345 12345 12345 12345 12345 12345 12345)) +(assert_return (invoke "v128.store_i16x8_3") (v128.const i16x8 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234 0x1234)) (assert_return (invoke "v128.store_i32x4") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128.store_i32x4_2") (v128.const i32x4 123456789 123456789 123456789 123456789)) +(assert_return (invoke "v128.store_i32x4_3") (v128.const i32x4 0x12345678 0x12345678 0x12345678 0x12345678)) (assert_return (invoke "v128.store_f32x4") (v128.const f32x4 0 1 2 3)) @@ -114,4 +135,4 @@ (assert_invalid (module (memory 1) (func (result v128) (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch" -) +) \ No newline at end of file From 303d8fcf2da46548f082761febb4e007a12d2f36 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 13 Dec 2019 01:04:14 +0800 Subject: [PATCH 106/378] [test] Add more literal tests for min/max/abs ops (#154) This PR covers tests for some float literal introduced in https://github.com/WebAssembly/spec/pull/1069 These tests are pulled from https://github.com/WAVM/WAVM/pull/234/ --- test/core/simd/meta/simd_f32x4.py | 17 ++- test/core/simd/meta/simd_f64x2.py | 19 +++- test/core/simd/meta/simd_float_op.py | 37 +++++-- test/core/simd/simd_f32x4.wast | 160 +++++++++++++++++++++++++++ test/core/simd/simd_f64x2.wast | 160 +++++++++++++++++++++++++++ 5 files changed, 377 insertions(+), 16 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 974427012b..30aad03c6f 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -20,6 +20,11 @@ class Simdf32x4Case(Simdf32x4ArithmeticCase): '0x1.921fb6p+2', '-0x1.921fb6p+2', '0x1.fffffep+127', '-0x1.fffffep+127', 'inf', '-inf' ) + LITERAL_NUMBERS = ( + '0123456789e019', '0123456789e-019', + '0123456789.e019', '0123456789.e+019', + '-0123456789.0123456789' + ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') @@ -330,6 +335,11 @@ def get_normal_case(self): # assert_return_canonical_nan statements binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + for p1 in self.LITERAL_NUMBERS: + for p2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, p1, p2, hex_form=False) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + # assert_return_canonical_nan and assert_return_arithmetic_nan cases for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS: @@ -395,9 +405,12 @@ def get_normal_case(self): self.v128_const(case_data[3][1], case_data[1][1])], self.v128_const(case_data[3][2], case_data[2][0])))) - for p in self.FLOAT_NUMBERS: + for p in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('abs') - result = self.floatOp.unary_op('abs', p) + hex_literal = True + if p in self.LITERAL_NUMBERS: + hex_literal = False + result = self.floatOp.unary_op('abs', p, hex_form=hex_literal) # Abs operation is valid for all the floating point numbers unary_test_data.append(['assert_return', op_name, p, result]) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index c9f129f631..4319ba3f97 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -17,7 +17,10 @@ class Simdf64x2Case(Simdf32x4Case): '0x0p+0', '-0x0p+0', '0x1p-1074', '-0x1p-1074', '0x1p-1022', '-0x1p-1022', '0x1p-1', '-0x1p-1', '0x1p+0', '-0x1p+0', '0x1.921fb54442d18p+2', '-0x1.921fb54442d18p+2', '0x1.fffffffffffffp+1023', '-0x1.fffffffffffffp+1023', 'inf', '-inf' ) - + LITERAL_NUMBERS = ('01234567890123456789e038', '01234567890123456789e-038', + '0123456789.e038', '0123456789.e+038', + '-01234567890123456789.01234567890123456789' + ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') def gen_test_func_template(self): @@ -28,7 +31,7 @@ def gen_test_func_template(self): # Function template tpl_func = ' (func (export "{func}"){params} (result v128) ({op} {operand_1}{operand_2}))' - # Raw data list specific for "const vs const" and "param vs const" tests + # Raw data list specific for "const vs const" and "param vs const" tests" const_test_raw_data = [ [ [['0', '1'], ['0', '2']], @@ -362,6 +365,11 @@ def get_normal_case(self): else: binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + for p1 in self.LITERAL_NUMBERS: + for p2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, p1, p2, hex_form=False) + binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for case in binary_test_data: cases.append(self.single_binary_test(case)) @@ -419,9 +427,12 @@ def get_normal_case(self): self.v128_const(case_data[3][1], case_data[1][1])], self.v128_const(case_data[3][2], case_data[2][0])))) - for p in self.FLOAT_NUMBERS: + for p in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('abs') - result = self.floatOp.unary_op('abs', p) + hex_literal = True + if p in self.LITERAL_NUMBERS: + hex_literal = False + result = self.floatOp.unary_op('abs', p, hex_form=hex_literal) # Abs operation is valid for all the floating point numbers unary_test_data.append(['assert_return', op_name, p, result]) diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index 657d0814ef..0546ce54bc 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -137,7 +137,7 @@ def float_neg(self, p): class FloatingPointSimpleOp(FloatingPointOp): """Common simple ops for both f32x4 and f64x2: abs, min, max""" - def binary_op(self, op: str, p1: str, p2: str) -> str: + def binary_op(self, op: str, p1: str, p2: str, hex_form=True) -> str: """Binary operation on p1 and p2 with the operation specified by op :param op: min, max, @@ -145,8 +145,15 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: :param p2: float number in hex :return: """ - f1 = float.fromhex(p1) - f2 = float.fromhex(p2) + if '0x' in p1: + f1 = float.fromhex(p1) + else: + f1 = float(p1) + + if '0x' in p2: + f2 = float.fromhex(p2) + else: + f2 = float(p2) if '-nan' in [p1, p2] and 'nan' in [p1, p2]: return p1 @@ -160,28 +167,38 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: if op == 'min': if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: return '-0x0p+0' - result = min(f1, f2) + if hex_form: + return min(f1, f2).hex() + else: + return p1 if f1 <= f2 else p2 elif op == 'max': if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: return '0x0p+0' - result = max(f1, f2) + if hex_form: + return max(f1, f2).hex() + else: + return p1 if f1 > f2 else p2 else: raise Exception('Unknown binary operation: {}'.format(op)) - return result.hex() - - def unary_op(self, op: str, p1: str) -> str: + def unary_op(self, op: str, p1: str, hex_form=True) -> str: """Unnary operation on p1 with the operation specified by op :param op: abs, :param p1: float number in hex :return: """ - f1 = float.fromhex(p1) + if '0x' in p1: + f1 = float.fromhex(p1) + else: + f1 = float(p1) if op == 'abs': - return abs(f1).hex() + if hex_form: + return abs(f1).hex() + else: + return p1 if not p1.startswith('-') else p1[1:] raise Exception('Unknown unary operation: {}'.format(op)) diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index ed2500ed31..099a18912c 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -991,6 +991,81 @@ (assert_return (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) (assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) (assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) @@ -2047,6 +2122,81 @@ (assert_return (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) (assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) (assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) @@ -2383,6 +2533,16 @@ (v128.const f32x4 inf inf inf inf)) (assert_return (invoke "f32x4.abs" (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.abs" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) ;; Unknown operators diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index 22ffa5b86e..df3c3a80ab 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -1281,6 +1281,81 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) (assert_return (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -2337,6 +2412,81 @@ (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) (assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e038 0123456789.e038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 0123456789.e+038 0123456789.e+038) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) ;; Test opposite signs of zero (assert_return (invoke "f64x2.min" (v128.const f64x2 0 0) @@ -2391,6 +2541,16 @@ (v128.const f64x2 inf inf)) (assert_return (invoke "f64x2.abs" (v128.const f64x2 -inf -inf)) (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) + (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) + (v128.const f64x2 01234567890123456789e-038 01234567890123456789e-038)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0123456789.e038 0123456789.e038)) + (v128.const f64x2 0123456789.e038 0123456789.e038)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 0123456789.e+038 0123456789.e+038)) + (v128.const f64x2 0123456789.e+038 0123456789.e+038)) +(assert_return (invoke "f64x2.abs" (v128.const f64x2 -01234567890123456789.01234567890123456789 -01234567890123456789.01234567890123456789)) + (v128.const f64x2 01234567890123456789.01234567890123456789 01234567890123456789.01234567890123456789)) ;; type check (assert_invalid (module (func (result v128) (f64x2.abs (i32.const 0)))) "type mismatch") From 082e07b38601f065c2bea65d785c2cc686e502f9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 16 Dec 2019 10:33:28 -0800 Subject: [PATCH 107/378] Fix error message for wrong number of lane literals --- interpreter/text/parser.mly | 4 ++-- test/core/simd/simd_const.wast | 16 ++++++++-------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 2755dc60d1..1b32e17510 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -46,7 +46,7 @@ let simd_literal shape ss at = with (* TODO better location for error messages. *) | Failure _ -> error at "constant out of range" - | Invalid_argument _ -> error at "unexpected token" + | Invalid_argument _ -> error at "wrong number of lane literals" let nat s at = try @@ -334,7 +334,7 @@ plain_instr : | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } | CONST literal { fun c -> fst (literal $1 $2) } - | V128_CONST SIMD_SHAPE literal_list { fun c -> fst (simd_literal $2 $3 (at ())) } + | V128_CONST SIMD_SHAPE literal_list { let at = at () in fun c -> fst (simd_literal $2 $3 at) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 7d73280a9a..517a1e6980 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -230,7 +230,7 @@ (assert_malformed (module quote "(func (v128.const i8x16) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const i8x16 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x 0x) drop)") @@ -247,7 +247,7 @@ (assert_malformed (module quote "(func (v128.const i16x8) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const i16x8 0x 0x 0x 0x 0x 0x 0x 0x) drop)") @@ -264,7 +264,7 @@ (assert_malformed (module quote "(func (v128.const i32x4) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const i32x4 0x 0x 0x 0x) drop)") @@ -281,7 +281,7 @@ (assert_malformed (module quote "(func (v128.const i64x2) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const i64x2 0x 0x) drop)") @@ -298,7 +298,7 @@ (assert_malformed (module quote "(func (v128.const f32x4) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const f32x4 .0 .0 .0 .0) drop)") @@ -383,7 +383,7 @@ (assert_malformed (module quote "(func (v128.const f64x2) drop)") - "unexpected token" + "wrong number of lane literals" ) (assert_malformed (module quote "(func (v128.const f64x2 .0 .0) drop)") @@ -470,13 +470,13 @@ (assert_malformed (module quote "(func (v128.const i32x4 0x10000000000000000 0x10000000000000000) drop)") - "unexpected token" + "wrong number of lane literals" ) ;; too many arguments (assert_malformed (module quote "(func (v128.const i32x4 0x1 0x1 0x1 0x1 0x1) drop)") - "unexpected token" + "wrong number of lane literals" ) ;; Rounding behaviour From c14f1b1071a3f0ead5bacb64769608c6b0d724e5 Mon Sep 17 00:00:00 2001 From: Andrew Brown Date: Mon, 16 Dec 2019 13:04:31 -0800 Subject: [PATCH 108/378] Fix typo --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 46ae45cd20..9117b625b9 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -745,7 +745,7 @@ def S.load_splat(memarg): * `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane * `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane -Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. +Fetch consecutive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. ```python def S.load_extend(ext, memarg): From f986ceaffdd6a9176b1b58413ecacf9577b2024b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 18 Dec 2019 11:07:16 -0800 Subject: [PATCH 109/378] Uncomment test code These were commented out for my testing, since the operations were not implemented yet. But we are not running these tests by default anyway, so it's okay to have them fail. --- test/core/simd/simd_const.wast | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 517a1e6980..df5bf2f834 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -1073,7 +1073,7 @@ (func (export "i32x4.test") (result v128) (return (v128.const i32x4 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D 0x0bAdD00D))) (func (export "i32x4.smax") (result v128) (return (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff))) (func (export "i32x4.neg_smax") (result v128) (return (v128.const i32x4 -0x7fffffff -0x7fffffff -0x7fffffff -0x7fffffff))) - (; (func (export "i32x4.inc_smin") (result v128) (return (i32x4.add (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 1 1 1 1)))) ;) + (func (export "i32x4.inc_smin") (result v128) (return (i32x4.add (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000) (v128.const i32x4 1 1 1 1)))) (func (export "i32x4.neg_zero") (result v128) (return (v128.const i32x4 -0x0 -0x0 -0x0 -0x0))) (func (export "i32x4.not_octal") (result v128) (return (v128.const i32x4 010 010 010 010))) (func (export "i32x4.plus_sign") (result v128) (return (v128.const i32x4 +42 +42 +42 +42))) @@ -1086,7 +1086,7 @@ (func (export "i64x2.test") (result v128) (return (v128.const i64x2 0x0bAdD00D0bAdD00D 0x0bAdD00D0bAdD00D))) (func (export "i64x2.smax") (result v128) (return (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff))) (func (export "i64x2.neg_smax") (result v128) (return (v128.const i64x2 -0x7fffffffffffffff -0x7fffffffffffffff))) - (; (func (export "i64x2.inc_smin") (result v128) (return (i64x2.add (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) (v128.const i64x2 1 1)))) ;) + (func (export "i64x2.inc_smin") (result v128) (return (i64x2.add (v128.const i64x2 -0x8000000000000000 -0x8000000000000000) (v128.const i64x2 1 1)))) (func (export "i64x2.neg_zero") (result v128) (return (v128.const i64x2 -0x0 -0x0))) (func (export "i64x2.not_octal") (result v128) (return (v128.const i64x2 010010 010010))) (func (export "i64x2.plus_sign") (result v128) (return (v128.const i64x2 +42 +42))) From 003326bb40058c215dd8e51b157ecb83772e0a92 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 18 Dec 2019 17:00:50 -0800 Subject: [PATCH 110/378] Fix setting bytes when converting from string to V128 The bytes weren't set correct, because we were not scaling the index properly. --- interpreter/exec/v128.ml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index b5767498f2..a01341f06c 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -17,14 +17,14 @@ include Simd.Make | Simd.I8x16 -> List.iteri (fun i s -> set_uint8 b i (i8_of_string s)) ss | Simd.I16x8 -> - List.iteri (fun i s -> set_uint16_le b i (i16_of_string s)) ss + List.iteri (fun i s -> set_uint16_le b (i * 2) (i16_of_string s)) ss | Simd.I32x4 -> - List.iteri (fun i s -> set_int32_le b i (I32.of_string s)) ss + List.iteri (fun i s -> set_int32_le b (i * 4) (I32.of_string s)) ss | Simd.I64x2 -> - List.iteri (fun i s -> set_int64_le b i (I64.of_string s)) ss + List.iteri (fun i s -> set_int64_le b (i * 8) (I64.of_string s)) ss | Simd.F32x4 -> - List.iteri (fun i s -> set_int32_le b i (F32.to_bits (F32.of_string s))) ss + List.iteri (fun i s -> set_int32_le b (i * 4) (F32.to_bits (F32.of_string s))) ss | Simd.F64x2 -> - List.iteri (fun i s -> set_int64_le b i (F64.to_bits (F64.of_string s))) ss); + List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss); b end) From 20ebe761326211add8988e239af5babdfd94e36a Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 20 Dec 2019 01:12:02 +0800 Subject: [PATCH 111/378] [test] Use unified assert_result* assertion (#156) * [test] Use unified assert_result* assertion to replace assert_return_arithmetic_nan and assert_return_canonical_nan Tests are pulled from https://github.com/WAVM/WAVM/pull/240 * Correct property name --- test/core/simd/meta/simd_f32x4.py | 127 +- test/core/simd/meta/simd_f32x4_arith.py | 93 +- test/core/simd/meta/simd_f64x2.py | 116 +- test/core/simd/meta/simd_f64x2_arith.py | 129 +- test/core/simd/simd_f32x4.wast | 1209 ++++----- test/core/simd/simd_f32x4_arith.wast | 3178 +++++++++++++---------- test/core/simd/simd_f64x2.wast | 1165 ++++----- test/core/simd/simd_f64x2_arith.wast | 3176 +++++++++++++--------- 8 files changed, 4862 insertions(+), 4331 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 30aad03c6f..5340d0db09 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -31,7 +31,6 @@ class Simdf32x4Case(Simdf32x4ArithmeticCase): binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') - def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @@ -139,43 +138,36 @@ def gen_test_func_template(self): [ 'f32x4.min', [['nan', '0', '0', '1'], ['0', '-nan', '1', '0']], - [['nan', '-nan', '0', '0']], + [['nan:canonical', 'nan:canonical', '0', '0']], ['f32x4', 'f32x4', 'f32x4'] ], [ 'f32x4.min', [['nan', '0', '0', '0'], ['0', '-nan', '1', '0']], - [['nan', '-nan', '0', '0']], + [['nan:canonical', 'nan:canonical', '0', '0']], ['f32x4', 'f32x4', 'f32x4'] ], [ 'f32x4.max', [['nan', '0', '0', '1'], ['0', '-nan', '1', '0']], - [['nan', '-nan', '1', '1']], + [['nan:canonical', 'nan:canonical', '1', '1']], ['f32x4', 'f32x4', 'f32x4'] ], [ 'f32x4.max', [['nan', '0', '0', '0'], ['0', '-nan', '1', '0']], - [['nan', '-nan', '1', '0']], + [['nan:canonical', 'nan:canonical', '1', '0']], ['f32x4', 'f32x4', 'f32x4'] ] ] - # Case number - case_cnt = 0 - - # Template for func name to extract a lane - tpl_func_by_lane = 'call_indirect_vv_v_f32x4_extract_lane_{}' - # Template for assert - tpl_assert = '({assert_type}\n' \ + tpl_assert = '(assert_return\n' \ ' (invoke "{func}"\n' \ ' {operand_1}\n' \ ' {operand_2}\n' \ - ' {operand_3}\n' \ ' )\n' \ - '{expected_result}' \ + ' {expected_result}\n' \ ')' lst_diff_lane_vs_clause_assert = [] @@ -184,79 +176,16 @@ def gen_test_func_template(self): lst_diff_lane_vs_clause_assert.append('') lst_diff_lane_vs_clause_assert.append(';; Test different lanes go through different if-then clauses') - template.insert(len(template)-1, '') - template.insert(len(template)-1, ' ;; Test different lanes go through different if-then clauses') - - # Add test case for test different lanes go through different if-then clauses - template.insert(len(template)-1, ' (type $vv_v (func (param v128 v128) (result v128)))\n' - ' (table funcref (elem $f32x4_min $f32x4_max))\n' - '\n' - ' (func $f32x4_min (type $vv_v)\n' - ' (f32x4.min (local.get 0) (local.get 1))\n' - ' )\n' - '\n' - ' (func $f32x4_max (type $vv_v)\n' - ' (f32x4.max (local.get 0) (local.get 1))\n' - ' )\n' - '\n' - ' (func (export "call_indirect_vv_v_f32x4_extract_lane_0")\n' - ' (param v128 v128 i32) (result f32)\n' - ' (f32x4.extract_lane 0\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )\n' - ' (func (export "call_indirect_vv_v_f32x4_extract_lane_1")\n' - ' (param v128 v128 i32) (result f32)\n' - ' (f32x4.extract_lane 1\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )\n' - ' (func (export "call_indirect_vv_v_f32x4_extract_lane_2")\n' - ' (param v128 v128 i32) (result f32)\n' - ' (f32x4.extract_lane 2\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )\n' - ' (func (export "call_indirect_vv_v_f32x4_extract_lane_3")\n' - ' (param v128 v128 i32) (result f32)\n' - ' (f32x4.extract_lane 3\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )') - for case_data in lst_diff_lane_vs_clause: - lst_diff_lane_vs_clause_assert.append(';; {lane_type} {index}'.format(lane_type=case_data[0], index=case_cnt)) - - # generate assert for every data lane - for lane_idx in range(0, len(case_data[2][0])): - - # get the result by lane - ret = case_data[2][0][lane_idx] - - idx_func = '0' if 'min' in case_data[0] else '1' - - # append assert - if 'nan' in ret: - - lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return_canonical_nan', - func=tpl_func_by_lane.format(lane_idx), - operand_1=self.v128_const('f32x4', case_data[1][0]), - operand_2=self.v128_const('f32x4', case_data[1][1]), - operand_3=self.v128_const('i32', idx_func), - expected_result='')) - else: - - lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return', - func=tpl_func_by_lane.format(lane_idx), - operand_1=self.v128_const('f32x4', case_data[1][0]), - operand_2=self.v128_const('f32x4', case_data[1][1]), - operand_3=self.v128_const('i32', idx_func), - expected_result=' '+self.v128_const('f32', ret)+'\n')) + lst_diff_lane_vs_clause_assert.append(';; {lane_type}'.format(lane_type=case_data[0])) - case_cnt += 1 - if case_cnt == 2: - case_cnt = 0 + lst_diff_lane_vs_clause_assert.append(tpl_assert.format( + func=case_data[0], + operand_1=self.v128_const(case_data[3][0], case_data[1][0]), + operand_2=self.v128_const(case_data[3][1], case_data[1][1]), + expected_result=self.v128_const(case_data[3][2], case_data[2][0]) + )) lst_diff_lane_vs_clause_assert.append('') @@ -312,11 +241,7 @@ def combine_binary_arith_test_data(self): } def get_normal_case(self): - """Normal test cases from WebAssembly core tests, 4 assert statements: - assert_return - assert_return_canonical_nan - assert_return_arithmetic_nan - assert_malformed + """Normal test cases from WebAssembly core tests. """ cases = [] binary_test_data = [] @@ -331,34 +256,28 @@ def get_normal_case(self): # Normal floating point numbers as the results binary_test_data.append(['assert_return', op_name, p1, p2, result]) else: - # Since the results contain the 'nan' string, it should be in the - # assert_return_canonical_nan statements - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + # Since the results contain the 'nan' string, the result literals would be + # nan:canonical + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for p1 in self.LITERAL_NUMBERS: for p2 in self.LITERAL_NUMBERS: result = self.floatOp.binary_op(op, p1, p2, hex_form=False) binary_test_data.append(['assert_return', op_name, p1, p2, result]) - # assert_return_canonical_nan and assert_return_arithmetic_nan cases for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS: if 'nan:' in p1 or 'nan:' in p2: - # When the arguments contain 'nan:', always use assert_return_arithmetic_nan - # statements for the cases. Since there 2 parameters for binary operation and - # the order of the parameters matter. Different order makes different cases. - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p2, p1]) + # When the arguments contain 'nan:', the result literal is nan:arithmetic + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) else: - # No 'nan' string found, then it should be assert_return_canonical_nan. - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p2, p1]) + # No 'nan' string found, then the result literal is nan:canonical + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for p2 in self.NAN_NUMBERS: - # Both parameters contain 'nan', then there must be no assert_return. if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for case in binary_test_data: cases.append(self.single_binary_test(case)) diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py index 5eb70d3485..1cd581d80c 100644 --- a/test/core/simd/meta/simd_f32x4_arith.py +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -168,10 +168,7 @@ def single_unary_test(self, case): return '\n'.join(lines) def get_normal_case(self): - """Normal test cases from WebAssembly core tests, 3 assert statements: - assert_return - assert_return_canonical_nan - assert_return_arithmetic_nan + """Normal test cases from WebAssembly core tests """ cases = [] binary_test_data = [] @@ -186,29 +183,26 @@ def get_normal_case(self): # Normal floating point numbers as the results binary_test_data.append(['assert_return', op_name, p1, p2, result]) else: - # Since the results contain the 'nan' string, it should be in the - # assert_return_canonical_nan statements - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + # Since the results contain the 'nan' string, the result literals would be + # nan:canonical + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) - # assert_return_canonical_nan and assert_return_arithmetic_nan cases for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS: if 'nan:' in p1 or 'nan:' in p2: - # When the arguments contain 'nan:', always use assert_return_arithmetic_nan - # statements for the cases. Since there 2 parameters for binary operation and - # the order of the parameters matter. Different order makes different cases. - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p2, p1]) + # When the arguments contain 'nan:', the result literal is nan:arithmetic + # Consider the different order of arguments as different cases. + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append(['assert_return', op_name, p2, p1, 'nan:arithmetic']) else: - # No 'nan' string found, then it should be assert_return_canonical_nan. - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p2, p1]) + # No 'nan' string found, then the result literal is nan:canonical. + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append(['assert_return', op_name, p2, p1, 'nan:canonical']) for p2 in self.NAN_NUMBERS: - # Both parameters contain 'nan', then there must be no assert_return. if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for p in self.LITERAL_NUMBERS: if self.LANE_TYPE == 'f32x4': @@ -222,9 +216,9 @@ def get_normal_case(self): for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: if 'nan:' in p: - unary_test_data.append(['assert_return_arithmetic_nan_f32x4', op_name, p]) + unary_test_data.append(['assert_return', op_name, p, 'nan:arithmetic']) elif 'nan' in p: - unary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p]) + unary_test_data.append(['assert_return', op_name, p, 'nan:canonical']) else: # Normal floating point numbers for sqrt operation op_name = self.full_op_name('sqrt') @@ -234,7 +228,7 @@ def get_normal_case(self): unary_test_data.append(['assert_return', op_name, p, result]) else: # - unary_test_data.append(['assert_return_canonical_nan_f32x4', op_name, p]) + unary_test_data.append(['assert_return', op_name, p, 'nan:canonical']) for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('neg') @@ -252,59 +246,36 @@ def get_normal_case(self): @property def mixed_sqrt_nan_test_data(self): return { - "canon": [ - '-1.0 nan 4.0 9.0', - ('nan', 'nan', '2.0', '3.0') + "sqrt_canon": [ + ('-1.0', 'nan', '4.0', '9.0'), + ('nan:canonical', 'nan:canonical', '2.0', '3.0') ], - 'arith': [ - 'nan:0x200000 -nan:0x200000 16.0 25.0', - ('nan', 'nan', '4.0', '5.0') + 'sqrt_arith': [ + ('nan:0x200000', '-nan:0x200000', '16.0', '25.0'), + ('nan:arithmetic', 'nan:arithmetic', '4.0', '5.0') ], - 'mixed': [ - '-inf nan:0x200000 36.0 49.0', - ('canon', 'arith', '6.0', '7.0') + 'sqrt_mixed': [ + ('-inf', 'nan:0x200000', '36.0', '49.0'), + ('nan:canonical', 'nan:arithmetic', '6.0', '7.0') ] } def mixed_nan_test(self, cases): - """Mixed f32x4 tests when only expects canonical NaNs in a subset of lanes. + """Mixed f32x4 tests when only expects NaNs in a subset of lanes. """ mixed_cases = ['\n\n;; Mixed f32x4 tests when some lanes are NaNs', '(module\n'] cases.extend(mixed_cases) for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): - func = [' (func $f32x4_sqrt_{test_type} (result v128)'.format(test_type=test_type), - ' v128.const f32x4 {value}'.format(value=test_data[0]), - ' f32x4.sqrt)'] + func = [' (func (export "{lane}_{t}") (result v128)'.format( + lane=self.LANE_TYPE, t=test_type), + ' ({lane}.{op} (v128.const {lane} {value})))'.format( + lane=self.LANE_TYPE, op=test_type.split('_')[0], value=' '.join(test_data[0]))] cases.extend(func) - for i, test in enumerate(test_data[1]): - test = [' (func (export "f32x4_extract_lane_{test_type}_{index}") (result f32)'.format( - test_type=test_type, index=i), - ' (f32x4.extract_lane {index} (call $f32x4_sqrt_{test_type})))'.format( - index=i, test_type=test_type)] - cases.extend(test) - cases.append('') cases.append(')\n') for test_type, test_data in sorted(self.mixed_sqrt_nan_test_data.items()): - template = '({assert_type} (invoke "f32x4_extract_lane_{test_type}_{index}"))' - for i, result in enumerate(test_data[1]): - if test_type == 'canon' and result == 'nan': - cases.append(template.format( - assert_type='assert_return_canonical_nan', test_type=test_type, index=i)) - elif test_type == 'arith' and result == 'nan': - cases.append(template.format( - assert_type='assert_return_arithmetic_nan', test_type=test_type, index=i)) - elif result == 'canon': - cases.append(template.format( - assert_type='assert_return_canonical_nan', test_type=test_type, index=i)) - elif result == 'arith': - cases.append(template.format( - assert_type='assert_return_arithmetic_nan', test_type=test_type, index=i)) - else: - cases.append(''.join([ - '({assert_type} (invoke "f32x4_extract_lane_{test_type}_{index}") '.format( - assert_type='assert_return', test_type=test_type, index=i), - '(f32.const {}))'.format(result)])) + cases.append('(assert_return (invoke "{lane}_{t}") (v128.const {lane} {result}))'.format( + lane=self.LANE_TYPE, t=test_type, result=' '.join(test_data[1]))) def gen_test_cases(): diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 4319ba3f97..18d3036fd8 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -155,43 +155,36 @@ def gen_test_func_template(self): [ 'f64x2.min', [['0', '1'], ['-nan', '1']], - [['-nan', '1']], + [['nan:canonical', '1']], ['f64x2', 'f64x2', 'f64x2'] ], [ 'f64x2.max', [['nan', '0'], ['0', '1']], - [['nan', '1']], + [['nan:canonical', '1']], ['f64x2', 'f64x2', 'f64x2'] ], [ 'f64x2.max', [['0', '1'], ['-nan', '0']], - [['-nan', '1']], + [['nan:canonical', '1']], ['f64x2', 'f64x2', 'f64x2'] ], [ 'f64x2.max', [['0', '1'], ['-nan', '1']], - [['-nan', '1']], + [['nan:canonical', '1']], ['f64x2', 'f64x2', 'f64x2'] ] ] - # Case number - case_cnt = 0 - - # Template for func name to extract a lane - tpl_func_by_lane = 'call_indirect_vv_v_f64x2_extract_lane_{}' - # Template for assert - tpl_assert = '({assert_type}\n' \ + tpl_assert = '(assert_return\n' \ ' (invoke "{func}"\n' \ ' {operand_1}\n' \ ' {operand_2}\n' \ - ' {operand_3}\n' \ ' )\n' \ - '{expected_result}' \ + ' {expected_result}\n' \ ')' lst_diff_lane_vs_clause_assert = [] @@ -200,67 +193,16 @@ def gen_test_func_template(self): lst_diff_lane_vs_clause_assert.append('') lst_diff_lane_vs_clause_assert.append(';; Test different lanes go through different if-then clauses') - template.insert(len(template)-1, '') - template.insert(len(template)-1, ' ;; Test different lanes go through different if-then clauses') - - # Add test case for test different lanes go through different if-then clauses - template.insert(len(template)-1, ' (type $vv_v (func (param v128 v128) (result v128)))\n' - ' (table funcref (elem $f64x2_min $f64x2_max))\n' - '\n' - ' (func $f64x2_min (type $vv_v)\n' - ' (f64x2.min (local.get 0) (local.get 1))\n' - ' )\n' - '\n' - ' (func $f64x2_max (type $vv_v)\n' - ' (f64x2.max (local.get 0) (local.get 1))\n' - ' )\n' - '\n' - ' (func (export "call_indirect_vv_v_f64x2_extract_lane_0")\n' - ' (param v128 v128 i32) (result f64)\n' - ' (f64x2.extract_lane 0\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )\n' - ' (func (export "call_indirect_vv_v_f64x2_extract_lane_1")\n' - ' (param v128 v128 i32) (result f64)\n' - ' (f64x2.extract_lane 1\n' - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))\n' - ' )\n' - ' )') - for case_data in lst_diff_lane_vs_clause: - lst_diff_lane_vs_clause_assert.append(';; {} {}'.format(case_data[0], case_cnt)) - - # generate assert for every data lane - for lane_idx in range(0, len(case_data[2][0])): - - # get the result by lane - ret = case_data[2][0][lane_idx] + lst_diff_lane_vs_clause_assert.append(';; {lane_type}'.format(lane_type=case_data[0])) - idx_func = '0' if 'min' in case_data[0] else '1' - - # append assert - if 'nan' in ret: - - lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return_canonical_nan', - func=tpl_func_by_lane.format(lane_idx), - operand_1=self.v128_const('f64x2', case_data[1][0]), - operand_2=self.v128_const('f64x2', case_data[1][1]), - operand_3=self.v128_const('i32', idx_func), - expected_result='')) - else: - - lst_diff_lane_vs_clause_assert.append(tpl_assert.format(assert_type='assert_return', - func=tpl_func_by_lane.format(lane_idx), - operand_1=self.v128_const('f64x2', case_data[1][0]), - operand_2=self.v128_const('f64x2', case_data[1][1]), - operand_3=self.v128_const('i32', idx_func), - expected_result=' '+self.v128_const('f64', ret)+'\n')) - - case_cnt += 1 - if case_cnt == 2: - case_cnt = 0 + lst_diff_lane_vs_clause_assert.append(tpl_assert.format( + func=case_data[0], + operand_1=self.v128_const(case_data[3][0], case_data[1][0]), + operand_2=self.v128_const(case_data[3][1], case_data[1][1]), + expected_result=self.v128_const(case_data[3][2], case_data[2][0]) + )) lst_diff_lane_vs_clause_assert.append('') @@ -322,11 +264,7 @@ def combine_binary_arith_test_data(self): } def get_normal_case(self): - """Normal test cases from WebAssembly core tests, 4 assert statements: - assert_return - assert_return_canonical_nan - assert_return_arithmetic_nan - assert_malformed + """Normal test cases from WebAssembly core tests """ cases = [] binary_test_data = [] @@ -341,29 +279,23 @@ def get_normal_case(self): # Normal floating point numbers as the results binary_test_data.append(['assert_return', op_name, p1, p2, result]) else: - # Since the results contain the 'nan' string, it should be in the - # assert_return_canonical_nan statements - binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + # Since the results contain the 'nan' string, the result literals would be + # nan:canonical + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) - # assert_return_canonical_nan and assert_return_arithmetic_nan cases for p1 in self.NAN_NUMBERS: for p2 in self.FLOAT_NUMBERS: if 'nan:' in p1 or 'nan:' in p2: - # When the arguments contain 'nan:', always use assert_return_arithmetic_nan - # statements for the cases. Since there 2 parameters for binary operation and - # the order of the parameters matter. Different order makes different cases. - binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p1, p2]) - binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p2, p1]) + # When the arguments contain 'nan:', the result literal is nan:arithmetic + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) else: - # No 'nan' string found, then it should be assert_return_canonical_nan. - binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) - binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p2, p1]) + # No 'nan' string found, then the result literal is nan:canonical + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for p2 in self.NAN_NUMBERS: - # Both parameters contain 'nan', then there must be no assert_return. if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return_arithmetic_nan_f64x2', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return_canonical_nan_f64x2', op_name, p1, p2]) + binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) for p1 in self.LITERAL_NUMBERS: for p2 in self.LITERAL_NUMBERS: @@ -378,7 +310,7 @@ def get_normal_case(self): '\n;; Test opposite signs of zero', [ 'f64x2.min', - [['0', '0' ], ['+0', '-0']], + [['0', '0'], ['+0', '-0']], [['0', '-0']], ['f64x2', 'f64x2', 'f64x2'] ], diff --git a/test/core/simd/meta/simd_f64x2_arith.py b/test/core/simd/meta/simd_f64x2_arith.py index 54926c9aa8..a0f53b892a 100644 --- a/test/core/simd/meta/simd_f64x2_arith.py +++ b/test/core/simd/meta/simd_f64x2_arith.py @@ -101,110 +101,59 @@ def combine_binary_arith_test_data(self): ] } - def get_normal_case(self): - return super().get_normal_case().replace('nan_f32x4', 'nan_f64x2') - def get_invalid_cases(self): return super().get_invalid_cases().replace('32', '64') @property - def mixed_sqrt_nan_test_data(self): + def mixed_nan_test_data(self): return { - 'neg': [ - ['nan', '1.0', 'nan', '-1.0'], + 'neg_canon': [ + ('nan', '1.0'), ('nan:canonical', '-1.0'), ], - 'sqrt': [ - ['4.0', '-nan', '2.0', 'nan'], + 'sqrt_canon': [ + ('4.0', '-nan'), ('2.0', 'nan:canonical'), ], - 'add': [ - ['nan 1.0', '-1.0 1.0', 'nan', '2.0'], + 'add_arith': [ + ('nan:0x8000000000000', '1.0'), ('nan', '1.0'), + ('nan:arithmetic', '2.0'), ], - 'sub': [ - ['1.0 -1.0', '-nan 1.0', 'nan', '-2.0'], + 'sub_arith': [ + ('1.0', '-1.0'), ('-nan', '1.0'), ('nan', '-2.0'), ], - 'mul': [ - ['1.0 2.0', 'nan 2.0', 'nan', '4.0'], + 'mul_mixed': [ + ('nan:0x8000000000000', '1.0'), ('2.0', 'nan'), + ('nan:arithmetic', 'nan:canonical') ], - 'div': [ - ['6.0 nan', '3.0 -nan', '2.0', 'nan'] + 'div_mixed': [ + ('nan', '1.0'), ('2.0', '-nan:0x8000000000000'), + ('nan:canonical', 'nan:arithmetic') ] } def mixed_nan_test(self, cases): - """Mask the mixed nan tests of simd_f32x4_arith as we'll use - call_indirect.""" - test_data_lines = [ - '\n;; Mixed f64x2 tests when some lanes are NaNs', - '(module', - ' (type $v_v (func (param v128) (result v128)))', - ' (type $vv_v (func (param v128 v128) (result v128)))', - ' (table funcref (elem {}))\n'.format( - ' '.join(['$64x2_' + op for op in self.UNARY_OPS + self.BINARY_OPS])) - - ] - for op in self.UNARY_OPS: - test_data_lines.append( - ' (func $64x2_{op} (type $v_v) (f64x2.{op} (local.get 0)))'.format(op=op) - ) - for op in self.BINARY_OPS: - test_data_lines.append( - ' (func $64x2_{op} (type $vv_v) (f64x2.{op} (local.get 0) (local.get 1)))'.format(op=op) - ) - test_data_lines.append('') - for index in range(2): - test_data_lines.extend([ - ' (func (export "call_indirect_v_v_f64x2_extract_lane_{i}")'.format(i=index), - ' (param v128 i32) (result f64)', - ' (f64x2.extract_lane {i}'.format(i=index), - ' (call_indirect (type $v_v) (local.get 0) (local.get 1))))']) - test_data_lines.extend([ - ' (func (export "call_indirect_vv_v_f64x2_extract_lane_{i}")'.format(i=index), - ' (param v128 v128 i32) (result f64)', - ' (f64x2.extract_lane {i}'.format(i=index), - ' (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2))))']) - - test_data_lines.append(')') - - for index, op in enumerate(self.UNARY_OPS): - data_set = self.mixed_sqrt_nan_test_data.get(op) - for data in data_set: - for i in range(2): - if 'nan' in data[i + 2]: - test_data_lines.append(''.join([ - '(assert_return_canonical_nan ', - '(invoke "call_indirect_v_v_f64x2_extract_lane_{i}" '.format(i=i), - '(v128.const f64x2 {p}) (i32.const {index})))'.format( - p=' '.join(data[:2]), index=index) - ])) - else: - test_data_lines.append(''.join([ - '(assert_return ', - '(invoke "call_indirect_v_v_f64x2_extract_lane_{i}" '.format(i=i), - '(v128.const f64x2 {p}) (i32.const {index})) (f64.const {r}))'.format( - p=' '.join(data[:2]), index=index, r=data[i + 2]) - ])) - - for index, op in enumerate(self.BINARY_OPS, start=2): - data_set = self.mixed_sqrt_nan_test_data.get(op) - for data in data_set: - for i in range(2): - if 'nan' in data[i + 2]: - test_data_lines.append(''.join([ - '(assert_return_canonical_nan ', - '(invoke "call_indirect_vv_v_f64x2_extract_lane_{i}" '.format(i=i), - '(v128.const f64x2 {p1}) (v128.const f64x2 {p2}) (i32.const {index})))'.format( - p1=data[0], p2=data[1], index=index) - ])) - else: - test_data_lines.append(''.join([ - '(assert_return ', - '(invoke "call_indirect_vv_v_f64x2_extract_lane_{i}" '.format(i=i), - '(v128.const f64x2 {p1}) (v128.const f64x2 {p2}) (i32.const {index})) '.format( - p1=data[0], p2=data[1], index=index), - ' (f64.const {r}))'.format(r=data[i + 2]) - ])) - - cases.extend(test_data_lines) + """Mixed f64x2 tests when only expects NaNs in a subset of lanes.""" + mixed_cases = [ + '\n;; Mixed f64x2 tests when some lanes are NaNs', '(module'] + for test_type, test_data in sorted(self.mixed_nan_test_data.items()): + op = test_type.split('_')[0] + if op in self.UNARY_OPS: + mixed_cases.extend([ + ' (func (export "{lane}_{t}") (result v128)'.format(lane=self.LANE_TYPE, t=test_type), + ' ({lane}.{op} (v128.const {lane} {param})))'.format( + lane=self.LANE_TYPE, op=op, param=' '.join(test_data[0]))]) + if op in self.BINARY_OPS: + mixed_cases.extend([ + ' (func (export "{lane}_{t}") (result v128)'.format(lane=self.LANE_TYPE, t=test_type), + ' ({lane}.{op} (v128.const {lane} {param1}) (v128.const {lane} {param2})))'.format( + lane=self.LANE_TYPE, op=op, + param1=' '.join(test_data[0]), + param2=' '.join(test_data[1]))]) + mixed_cases.append(')\n') + for test_type, test_data in sorted(self.mixed_nan_test_data.items()): + mixed_cases.append('(assert_return (invoke "{lane}_{t}") (v128.const {lane} {result}))'.format( + lane=self.LANE_TYPE, t=test_type, result=' '.join(test_data[-1]) + )) + cases.extend(mixed_cases) def gen_test_cases(): diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index 099a18912c..ce0745bc05 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -27,43 +27,6 @@ (func (export "f32x4.max_with_const_18")(param v128) (result v128) (f32x4.max (local.get 0) (v128.const f32x4 0x00 0x01 0x02 0x80000000))) (func (export "f32x4.abs_with_const") (result v128) (f32x4.abs (v128.const f32x4 -0 -1 -2 -3))) - - ;; Test different lanes go through different if-then clauses - (type $vv_v (func (param v128 v128) (result v128))) - (table funcref (elem $f32x4_min $f32x4_max)) - - (func $f32x4_min (type $vv_v) - (f32x4.min (local.get 0) (local.get 1)) - ) - - (func $f32x4_max (type $vv_v) - (f32x4.max (local.get 0) (local.get 1)) - ) - - (func (export "call_indirect_vv_v_f32x4_extract_lane_0") - (param v128 v128 i32) (result f32) - (f32x4.extract_lane 0 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) - (func (export "call_indirect_vv_v_f32x4_extract_lane_1") - (param v128 v128 i32) (result f32) - (f32x4.extract_lane 1 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) - (func (export "call_indirect_vv_v_f32x4_extract_lane_2") - (param v128 v128 i32) (result f32) - (f32x4.extract_lane 2 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) - (func (export "call_indirect_vv_v_f32x4_extract_lane_3") - (param v128 v128 i32) (result f32) - (f32x4.extract_lane 3 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) ) ;; f32x4.abs const vs const @@ -98,129 +61,37 @@ (assert_return (invoke "f32x4.abs_with_const") (v128.const f32x4 0 1 2 3)) ;; Test different lanes go through different if-then clauses -;; f32x4.min 0 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_0" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) -) -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_1" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) -) -(assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_2" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) - (f32.const 0) -) +;; f32x4.min (assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (invoke "f32x4.min" (v128.const f32x4 nan 0 0 1) (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) - (f32.const 0) -) -;; f32x4.min 1 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_0" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) -) -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_1" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) -) -(assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_2" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 0) ) - (f32.const 0) + (v128.const f32x4 nan:canonical nan:canonical 0 0) ) +;; f32x4.min (assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_3" + (invoke "f32x4.min" (v128.const f32x4 nan 0 0 0) (v128.const f32x4 0 -nan 1 0) - (i32.const 0) - ) - (f32.const 0) -) -;; f32x4.max 0 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_0" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) - ) -) -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_1" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) ) + (v128.const f32x4 nan:canonical nan:canonical 0 0) ) +;; f32x4.max (assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (invoke "f32x4.max" (v128.const f32x4 nan 0 0 1) (v128.const f32x4 0 -nan 1 0) - (i32.const 1) ) - (f32.const 1) + (v128.const f32x4 nan:canonical nan:canonical 1 1) ) +;; f32x4.max (assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_3" - (v128.const f32x4 nan 0 0 1) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) - ) - (f32.const 1) -) -;; f32x4.max 1 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_0" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) - ) -) -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f32x4_extract_lane_1" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) - ) -) -(assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_2" + (invoke "f32x4.max" (v128.const f32x4 nan 0 0 0) (v128.const f32x4 0 -nan 1 0) - (i32.const 1) ) - (f32.const 1) -) -(assert_return - (invoke "call_indirect_vv_v_f32x4_extract_lane_3" - (v128.const f32x4 nan 0 0 0) - (v128.const f32x4 0 -nan 1 0) - (i32.const 1) - ) - (f32.const 0) + (v128.const f32x4 nan:canonical nan:canonical 1 0) ) (assert_return (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) @@ -1066,294 +937,246 @@ (assert_return (invoke "f32x4.min" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.min" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -2197,294 +2020,246 @@ (assert_return (invoke "f32x4.max" (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789) (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) (v128.const f32x4 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789 -0123456789.0123456789)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.max" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) ;; Test opposite signs of zero (assert_return (invoke "f32x4.min" (v128.const f32x4 0 0 -0 +0) diff --git a/test/core/simd/simd_f32x4_arith.wast b/test/core/simd/simd_f32x4_arith.wast index 55d7fb5b2b..69ed526e62 100644 --- a/test/core/simd/simd_f32x4_arith.wast +++ b/test/core/simd/simd_f32x4_arith.wast @@ -727,8 +727,9 @@ (assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 inf inf inf inf)) (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 -inf -inf -inf -inf)) @@ -771,299 +772,444 @@ (assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 inf inf inf inf))) (assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.add" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.add" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) (v128.const f32x4 246913578.0 246913578.0 246913578.0 246913578.0)) @@ -1850,8 +1996,9 @@ (assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 inf inf inf inf))) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 inf inf inf inf)) @@ -1900,338 +2047,483 @@ (assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 inf inf inf inf)) (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) - (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) - (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) - (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) - (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) - (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) - (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) - (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) - (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) - (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) - (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) - (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) - (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) - (v128.const f32x4 0.0 0.0 0.0 0.0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) - (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) - (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) -(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) - (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) - (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f32x4.sub" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -2304,10 +2596,12 @@ (assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) @@ -2350,10 +2644,12 @@ (assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -2930,10 +3226,12 @@ (assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) (v128.const f32x4 inf inf inf inf)) @@ -2976,10 +3274,12 @@ (assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) (v128.const f32x4 -inf -inf -inf -inf)) @@ -3003,313 +3303,457 @@ (v128.const f32x4 -inf -inf -inf -inf)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) - (v128.const f32x4 inf inf inf inf)) -(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) - (v128.const f32x4 inf inf inf inf)) -(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 inf inf inf inf)) -(assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.mul" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.mul" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) (v128.const f32x4 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16 1.5241579434344448e+16)) @@ -3382,10 +3826,12 @@ (assert_return (invoke "f32x4.mul" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) (v128.const f32x4 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74 0x1.4b66de0000000p+74)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) @@ -3428,10 +3874,12 @@ (assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) (v128.const f32x4 -inf -inf -inf -inf)) (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) @@ -4092,10 +4540,12 @@ (assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 -inf -inf -inf -inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -inf -inf -inf -inf))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) (v128.const f32x4 -inf -inf -inf -inf)) @@ -4138,298 +4588,444 @@ (assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 inf inf inf inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 inf inf inf inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan nan nan nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) - (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.div" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.div" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) (v128.const f32x4 1.0 1.0 1.0 1.0)) @@ -4508,29 +5104,40 @@ (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) (v128.const f32x4 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75 0x1.6a09e667f3bcdp-75)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) (v128.const f32x4 0x1.0000000000000p-63 0x1.0000000000000p-63 0x1.0000000000000p-63 0x1.0000000000000p-63)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) (v128.const f32x4 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) (v128.const f32x4 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1 0x1.40d9324a48138p+1)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) (v128.const f32x4 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63 0x1.fffffeffffffcp+63)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 inf inf inf inf)) (v128.const f32x4 inf inf inf inf)) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -inf -inf -inf -inf))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 nan nan nan nan))) -(assert_return_canonical_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan -nan -nan -nan))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000))) -(assert_return_arithmetic_nan_f32x4 (invoke "f32x4.sqrt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000))) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.sqrt" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) (v128.const f32x4 11111.111060555555 11111.111060555555 11111.111060555555 11111.111060555555)) (assert_return (invoke "f32x4.sqrt" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) @@ -4672,56 +5279,17 @@ ;; Mixed f32x4 tests when some lanes are NaNs (module - (func $f32x4_sqrt_arith (result v128) - v128.const f32x4 nan:0x200000 -nan:0x200000 16.0 25.0 - f32x4.sqrt) - (func (export "f32x4_extract_lane_arith_0") (result f32) - (f32x4.extract_lane 0 (call $f32x4_sqrt_arith))) - (func (export "f32x4_extract_lane_arith_1") (result f32) - (f32x4.extract_lane 1 (call $f32x4_sqrt_arith))) - (func (export "f32x4_extract_lane_arith_2") (result f32) - (f32x4.extract_lane 2 (call $f32x4_sqrt_arith))) - (func (export "f32x4_extract_lane_arith_3") (result f32) - (f32x4.extract_lane 3 (call $f32x4_sqrt_arith))) - - (func $f32x4_sqrt_canon (result v128) - v128.const f32x4 -1.0 nan 4.0 9.0 - f32x4.sqrt) - (func (export "f32x4_extract_lane_canon_0") (result f32) - (f32x4.extract_lane 0 (call $f32x4_sqrt_canon))) - (func (export "f32x4_extract_lane_canon_1") (result f32) - (f32x4.extract_lane 1 (call $f32x4_sqrt_canon))) - (func (export "f32x4_extract_lane_canon_2") (result f32) - (f32x4.extract_lane 2 (call $f32x4_sqrt_canon))) - (func (export "f32x4_extract_lane_canon_3") (result f32) - (f32x4.extract_lane 3 (call $f32x4_sqrt_canon))) - - (func $f32x4_sqrt_mixed (result v128) - v128.const f32x4 -inf nan:0x200000 36.0 49.0 - f32x4.sqrt) - (func (export "f32x4_extract_lane_mixed_0") (result f32) - (f32x4.extract_lane 0 (call $f32x4_sqrt_mixed))) - (func (export "f32x4_extract_lane_mixed_1") (result f32) - (f32x4.extract_lane 1 (call $f32x4_sqrt_mixed))) - (func (export "f32x4_extract_lane_mixed_2") (result f32) - (f32x4.extract_lane 2 (call $f32x4_sqrt_mixed))) - (func (export "f32x4_extract_lane_mixed_3") (result f32) - (f32x4.extract_lane 3 (call $f32x4_sqrt_mixed))) - + (func (export "f32x4_sqrt_arith") (result v128) + (f32x4.sqrt (v128.const f32x4 nan:0x200000 -nan:0x200000 16.0 25.0))) + (func (export "f32x4_sqrt_canon") (result v128) + (f32x4.sqrt (v128.const f32x4 -1.0 nan 4.0 9.0))) + (func (export "f32x4_sqrt_mixed") (result v128) + (f32x4.sqrt (v128.const f32x4 -inf nan:0x200000 36.0 49.0))) ) -(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_arith_0")) -(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_arith_1")) -(assert_return (invoke "f32x4_extract_lane_arith_2") (f32.const 4.0)) -(assert_return (invoke "f32x4_extract_lane_arith_3") (f32.const 5.0)) -(assert_return_canonical_nan (invoke "f32x4_extract_lane_canon_0")) -(assert_return_canonical_nan (invoke "f32x4_extract_lane_canon_1")) -(assert_return (invoke "f32x4_extract_lane_canon_2") (f32.const 2.0)) -(assert_return (invoke "f32x4_extract_lane_canon_3") (f32.const 3.0)) -(assert_return_canonical_nan (invoke "f32x4_extract_lane_mixed_0")) -(assert_return_arithmetic_nan (invoke "f32x4_extract_lane_mixed_1")) -(assert_return (invoke "f32x4_extract_lane_mixed_2") (f32.const 6.0)) -(assert_return (invoke "f32x4_extract_lane_mixed_3") (f32.const 7.0)) +(assert_return (invoke "f32x4_sqrt_arith") (v128.const f32x4 nan:arithmetic nan:arithmetic 4.0 5.0)) +(assert_return (invoke "f32x4_sqrt_canon") (v128.const f32x4 nan:canonical nan:canonical 2.0 3.0)) +(assert_return (invoke "f32x4_sqrt_mixed") (v128.const f32x4 nan:canonical nan:arithmetic 6.0 7.0)) ;; type check (assert_invalid (module (func (result v128) (f32x4.neg (i32.const 0)))) "type mismatch") diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index df3c3a80ab..a8c3850c45 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -44,31 +44,6 @@ (func (export "f64x2.abs_with_const_35") (result v128) (f64x2.abs (v128.const f64x2 -0 -1))) (func (export "f64x2.abs_with_const_36") (result v128) (f64x2.abs (v128.const f64x2 -2 -3))) - - ;; Test different lanes go through different if-then clauses - (type $vv_v (func (param v128 v128) (result v128))) - (table funcref (elem $f64x2_min $f64x2_max)) - - (func $f64x2_min (type $vv_v) - (f64x2.min (local.get 0) (local.get 1)) - ) - - (func $f64x2_max (type $vv_v) - (f64x2.max (local.get 0) (local.get 1)) - ) - - (func (export "call_indirect_vv_v_f64x2_extract_lane_0") - (param v128 v128 i32) (result f64) - (f64x2.extract_lane 0 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) - (func (export "call_indirect_vv_v_f64x2_extract_lane_1") - (param v128 v128 i32) (result f64) - (f64x2.extract_lane 1 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)) - ) - ) ) ;; f64x2.abs const vs const @@ -128,101 +103,53 @@ (assert_return (invoke "f64x2.abs_with_const_36") (v128.const f64x2 2 3)) ;; Test different lanes go through different if-then clauses -;; f64x2.min 0 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 nan 0) - (v128.const f64x2 0 1) - (i32.const 0) - ) -) +;; f64x2.min (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.min" (v128.const f64x2 nan 0) (v128.const f64x2 0 1) - (i32.const 0) - ) - (f64.const 0) -) -;; f64x2.min 1 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 0 1) - (v128.const f64x2 -nan 0) - (i32.const 0) ) + (v128.const f64x2 nan 0) ) +;; f64x2.min (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.min" (v128.const f64x2 0 1) (v128.const f64x2 -nan 0) - (i32.const 0) - ) - (f64.const 0) -) -;; f64x2.min 0 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 0 1) - (v128.const f64x2 -nan 1) - (i32.const 0) ) + (v128.const f64x2 -nan 0) ) +;; f64x2.min (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.min" (v128.const f64x2 0 1) (v128.const f64x2 -nan 1) - (i32.const 0) - ) - (f64.const 1) -) -;; f64x2.max 1 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 nan 0) - (v128.const f64x2 0 1) - (i32.const 1) ) + (v128.const f64x2 nan:canonical 1) ) +;; f64x2.max (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.max" (v128.const f64x2 nan 0) (v128.const f64x2 0 1) - (i32.const 1) - ) - (f64.const 1) -) -;; f64x2.max 0 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 0 1) - (v128.const f64x2 -nan 0) - (i32.const 1) ) + (v128.const f64x2 nan:canonical 1) ) +;; f64x2.max (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.max" (v128.const f64x2 0 1) (v128.const f64x2 -nan 0) - (i32.const 1) - ) - (f64.const 1) -) -;; f64x2.max 1 -(assert_return_canonical_nan - (invoke "call_indirect_vv_v_f64x2_extract_lane_0" - (v128.const f64x2 0 1) - (v128.const f64x2 -nan 1) - (i32.const 1) ) + (v128.const f64x2 nan:canonical 1) ) +;; f64x2.max (assert_return - (invoke "call_indirect_vv_v_f64x2_extract_lane_1" + (invoke "f64x2.max" (v128.const f64x2 0 1) (v128.const f64x2 -nan 1) - (i32.const 1) ) - (f64.const 1) + (v128.const f64x2 nan:canonical 1) ) (assert_return (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) @@ -993,294 +920,246 @@ (assert_return (invoke "f64x2.min" (v128.const f64x2 -inf -inf) (v128.const f64x2 -inf -inf)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.min" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.min" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) @@ -2124,294 +2003,246 @@ (assert_return (invoke "f64x2.max" (v128.const f64x2 -inf -inf) (v128.const f64x2 -inf -inf)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1074 0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1074 0x1p-1074) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1074 -0x1p-1074))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1074 -0x1p-1074) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1074 0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1074 -0x1p-1074)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.max" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.max" (v128.const f64x2 01234567890123456789e038 01234567890123456789e038) (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) (v128.const f64x2 01234567890123456789e038 01234567890123456789e038)) diff --git a/test/core/simd/simd_f64x2_arith.wast b/test/core/simd/simd_f64x2_arith.wast index c66a29a1c1..b91c071adf 100644 --- a/test/core/simd/simd_f64x2_arith.wast +++ b/test/core/simd/simd_f64x2_arith.wast @@ -727,8 +727,9 @@ (assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) (v128.const f64x2 inf inf)) (v128.const f64x2 inf inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) - (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 -inf -inf)) @@ -771,299 +772,444 @@ (assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) - (v128.const f64x2 inf inf))) (assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.add" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.add" (v128.const f64x2 0123456789 0123456789) (v128.const f64x2 0123456789 0123456789)) (v128.const f64x2 246913578.0 246913578.0)) @@ -1850,8 +1996,9 @@ (assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 inf inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) - (v128.const f64x2 inf inf))) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) (v128.const f64x2 -inf -inf)) (v128.const f64x2 inf inf)) @@ -1900,338 +2047,483 @@ (assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) (v128.const f64x2 inf inf)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789 0123456789) - (v128.const f64x2 0123456789 0123456789)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e019 0123456789e019) - (v128.const f64x2 0123456789e019 0123456789e019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e+019 0123456789e+019) - (v128.const f64x2 0123456789e+019 0123456789e+019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e-019 0123456789e-019) - (v128.const f64x2 0123456789e-019 0123456789e-019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789. 0123456789.) - (v128.const f64x2 0123456789. 0123456789.)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e019 0123456789.e019) - (v128.const f64x2 0123456789.e019 0123456789.e019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e+019 0123456789.e+019) - (v128.const f64x2 0123456789.e+019 0123456789.e+019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e-019 0123456789.e-019) - (v128.const f64x2 0123456789.e-019 0123456789.e-019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) - (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) - (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) - (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) - (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) - (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) - (v128.const f64x2 0x0.0p+0 0x0.0p+0)) -(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) - (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) - (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) (assert_return (invoke "f64x2.sub" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -2304,10 +2596,12 @@ (assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) @@ -2350,10 +2644,12 @@ (assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -2930,10 +3226,12 @@ (assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) (v128.const f64x2 -inf -inf)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) (v128.const f64x2 0x1p-1022 0x1p-1022)) (v128.const f64x2 inf inf)) @@ -2976,10 +3274,12 @@ (assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) (v128.const f64x2 -inf -inf)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) (v128.const f64x2 0x1p-1022 0x1p-1022)) (v128.const f64x2 -inf -inf)) @@ -3003,313 +3303,457 @@ (v128.const f64x2 -inf -inf)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) - (v128.const f64x2 inf inf)) -(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) - (v128.const f64x2 -inf -inf)) -(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) - (v128.const f64x2 inf inf)) -(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) - (v128.const f64x2 -inf -inf)) -(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) - (v128.const f64x2 -inf -inf)) -(assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -inf -inf)) - (v128.const f64x2 inf inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.mul" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.mul" (v128.const f64x2 0123456789 0123456789) (v128.const f64x2 0123456789 0123456789)) (v128.const f64x2 1.524157875019052e+16 1.524157875019052e+16)) @@ -3382,10 +3826,12 @@ (assert_return (invoke "f64x2.mul" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) (v128.const f64x2 0x1.4b66dc33f6acep+122 0x1.4b66dc33f6acep+122)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 0x1p-1022 0x1p-1022)) (v128.const f64x2 0x0.0p+0 0x0.0p+0)) @@ -3428,10 +3874,12 @@ (assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) (v128.const f64x2 -inf -inf)) (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -0x0p+0 -0x0p+0))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) (v128.const f64x2 0x1p-1022 0x1p-1022)) (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) @@ -4092,10 +4540,12 @@ (assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 inf inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 -inf -inf))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) (v128.const f64x2 0x0p+0 0x0p+0)) (v128.const f64x2 -inf -inf)) @@ -4138,298 +4588,444 @@ (assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 -inf -inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 inf inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan -nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan -nan) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0p+0 0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x0p+0 -0x0p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1022 0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1022 -0x1p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p-1 0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p-1 -0x1p-1))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1p+0 0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1p+0 -0x1p+0))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 inf inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 inf inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -inf -inf))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -inf -inf) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) - (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.div" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.div" (v128.const f64x2 0123456789 0123456789) (v128.const f64x2 0123456789 0123456789)) (v128.const f64x2 1.0 1.0)) @@ -4508,30 +5104,40 @@ (v128.const f64x2 -0x0p+0 -0x0p+0)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p-1022 0x1p-1022)) (v128.const f64x2 0x1.0000000000000p-511 0x1.0000000000000p-511)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1022 -0x1p-1022))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p-1 0x1p-1)) (v128.const f64x2 0x1.6a09e667f3bcdp-1 0x1.6a09e667f3bcdp-1)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1 -0x1p-1))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1p+0 0x1p+0)) (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p+0 -0x1p+0))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) (v128.const f64x2 0x1.40d931ff62705p+1 0x1.40d931ff62705p+1)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) (v128.const f64x2 0x1.fffffffffffffp+511 0x1.fffffffffffffp+511)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:canonical nan:canonical)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 0x1.0000000000000p-537 0x1.0000000000000p-537)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) (v128.const f64x2 0x1.0000000000000p-537 0x1.0000000000000p-537)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 inf inf)) (v128.const f64x2 inf inf)) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -inf -inf))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 nan nan))) -(assert_return_canonical_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan -nan))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000))) -(assert_return_arithmetic_nan_f64x2 (invoke "f64x2.sqrt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000))) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.sqrt" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789 0123456789)) (v128.const f64x2 11111.111060555555 11111.111060555555)) (assert_return (invoke "f64x2.sqrt" (v128.const f64x2 0123456789e019 0123456789e019)) @@ -4671,46 +5277,26 @@ ;; Mixed f64x2 tests when some lanes are NaNs (module - (type $v_v (func (param v128) (result v128))) - (type $vv_v (func (param v128 v128) (result v128))) - (table funcref (elem $64x2_neg $64x2_sqrt $64x2_add $64x2_sub $64x2_mul $64x2_div)) - - (func $64x2_neg (type $v_v) (f64x2.neg (local.get 0))) - (func $64x2_sqrt (type $v_v) (f64x2.sqrt (local.get 0))) - (func $64x2_add (type $vv_v) (f64x2.add (local.get 0) (local.get 1))) - (func $64x2_sub (type $vv_v) (f64x2.sub (local.get 0) (local.get 1))) - (func $64x2_mul (type $vv_v) (f64x2.mul (local.get 0) (local.get 1))) - (func $64x2_div (type $vv_v) (f64x2.div (local.get 0) (local.get 1))) - - (func (export "call_indirect_v_v_f64x2_extract_lane_0") - (param v128 i32) (result f64) - (f64x2.extract_lane 0 - (call_indirect (type $v_v) (local.get 0) (local.get 1)))) - (func (export "call_indirect_vv_v_f64x2_extract_lane_0") - (param v128 v128 i32) (result f64) - (f64x2.extract_lane 0 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)))) - (func (export "call_indirect_v_v_f64x2_extract_lane_1") - (param v128 i32) (result f64) - (f64x2.extract_lane 1 - (call_indirect (type $v_v) (local.get 0) (local.get 1)))) - (func (export "call_indirect_vv_v_f64x2_extract_lane_1") - (param v128 v128 i32) (result f64) - (f64x2.extract_lane 1 - (call_indirect (type $vv_v) (local.get 0) (local.get 1) (local.get 2)))) + (func (export "f64x2_add_arith") (result v128) + (f64x2.add (v128.const f64x2 nan:0x8000000000000 1.0) (v128.const f64x2 nan 1.0))) + (func (export "f64x2_div_mixed") (result v128) + (f64x2.div (v128.const f64x2 nan 1.0) (v128.const f64x2 2.0 -nan:0x8000000000000))) + (func (export "f64x2_mul_mixed") (result v128) + (f64x2.mul (v128.const f64x2 nan:0x8000000000000 1.0) (v128.const f64x2 2.0 nan))) + (func (export "f64x2_neg_canon") (result v128) + (f64x2.neg (v128.const f64x2 nan 1.0))) + (func (export "f64x2_sqrt_canon") (result v128) + (f64x2.sqrt (v128.const f64x2 4.0 -nan))) + (func (export "f64x2_sub_arith") (result v128) + (f64x2.sub (v128.const f64x2 1.0 -1.0) (v128.const f64x2 -nan 1.0))) ) -(assert_return_canonical_nan (invoke "call_indirect_v_v_f64x2_extract_lane_0" (v128.const f64x2 nan 1.0) (i32.const 0))) -(assert_return (invoke "call_indirect_v_v_f64x2_extract_lane_1" (v128.const f64x2 nan 1.0) (i32.const 0)) (f64.const -1.0)) -(assert_return (invoke "call_indirect_v_v_f64x2_extract_lane_0" (v128.const f64x2 4.0 -nan) (i32.const 1)) (f64.const 2.0)) -(assert_return_canonical_nan (invoke "call_indirect_v_v_f64x2_extract_lane_1" (v128.const f64x2 4.0 -nan) (i32.const 1))) -(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 nan 1.0) (v128.const f64x2 -1.0 1.0) (i32.const 2))) -(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 nan 1.0) (v128.const f64x2 -1.0 1.0) (i32.const 2)) (f64.const 2.0)) -(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 1.0 -1.0) (v128.const f64x2 -nan 1.0) (i32.const 3))) -(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 1.0 -1.0) (v128.const f64x2 -nan 1.0) (i32.const 3)) (f64.const -2.0)) -(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 1.0 2.0) (v128.const f64x2 nan 2.0) (i32.const 4))) -(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 1.0 2.0) (v128.const f64x2 nan 2.0) (i32.const 4)) (f64.const 4.0)) -(assert_return (invoke "call_indirect_vv_v_f64x2_extract_lane_0" (v128.const f64x2 6.0 nan) (v128.const f64x2 3.0 -nan) (i32.const 5)) (f64.const 2.0)) -(assert_return_canonical_nan (invoke "call_indirect_vv_v_f64x2_extract_lane_1" (v128.const f64x2 6.0 nan) (v128.const f64x2 3.0 -nan) (i32.const 5))) + +(assert_return (invoke "f64x2_add_arith") (v128.const f64x2 nan:arithmetic 2.0)) +(assert_return (invoke "f64x2_div_mixed") (v128.const f64x2 nan:canonical nan:arithmetic)) +(assert_return (invoke "f64x2_mul_mixed") (v128.const f64x2 nan:arithmetic nan:canonical)) +(assert_return (invoke "f64x2_neg_canon") (v128.const f64x2 nan:canonical -1.0)) +(assert_return (invoke "f64x2_sqrt_canon") (v128.const f64x2 2.0 nan:canonical)) +(assert_return (invoke "f64x2_sub_arith") (v128.const f64x2 nan -2.0)) ;; type check (assert_invalid (module (func (result v128) (f64x2.neg (i64.const 0)))) "type mismatch") From 9a724d3265a5fce334ba15aa2d43752b5805bee3 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Thu, 19 Dec 2019 11:46:40 -0800 Subject: [PATCH 112/378] Update LLVM implementation status (#160) Add avgr_u, update integer min/max. --- proposals/simd/ImplementationStatus.md | 32 +++++++++++++------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index ab796dd09b..6fddd7e333 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -87,11 +87,11 @@ | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i8x16.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i8x16.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i8x16.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i8x16.avgr_u` | | | | | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.avgr_u` | `-munimplemented-simd128` | | | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -105,11 +105,11 @@ | `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i16x8.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i16x8.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i16x8.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i16x8.avgr_u` | | | | | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.avgr_u` | `-munimplemented-simd128` | | | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -119,10 +119,10 @@ | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i32x4.min_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i32x4.max_s` | `-munimplemented-simd128` | :heavy_check_mark: | | | -| `i32x4.max_u` | `-munimplemented-simd128` | :heavy_check_mark: | | | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | | `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -156,7 +156,7 @@ | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.convert_i64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.swizzle` | | | :heavy_check_mark: | | +| `v8x16.swizzle` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `v8x16.shuffle` | `-msimd128`[5] | :white_check_mark:[5] | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.load8x8_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i16x8.load8x8_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | @@ -177,7 +177,7 @@ | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -[1] Tip of tree LLVM as of September 30, 2019 +[1] Tip of tree LLVM as of December 18, 2019 [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` From 5dcfb06d743b89d5f0042696ef578d449a419a8b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 20 Dec 2019 09:33:17 -0800 Subject: [PATCH 113/378] Add V128 cases to fix build With the merge in f9751cc7ea43c74cf458dbdae91ea293aa602c07, new code that was added that did not deal with S128 (since upstream does not have simd). This fixes those cases to get the build working. --- interpreter/script/js.ml | 4 ++-- interpreter/script/run.ml | 2 +- interpreter/script/script.ml | 2 +- interpreter/text/arrange.ml | 2 +- interpreter/text/parser.mly | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index f165a82032..bede87c99a 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -233,7 +233,7 @@ let assert_return ress ts at = | NanResult nanop -> let nan = match nanop.it with - | Values.I32 _ | Values.I64 _ -> assert false + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> n in let nan_bitmask_of = @@ -332,7 +332,7 @@ let of_result res = | LitResult lit -> of_literal lit | NanResult nanop -> match nanop.it with - | Values.I32 _ | Values.I64 _ -> assert false + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> of_nan n let rec of_definition def = diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 9520628553..88d8dc74f0 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -258,7 +258,7 @@ let string_of_result r = | LitResult v -> Values.string_of_value v.it | NanResult nanop -> match nanop.it with - | Values.I32 _ | Values.I64 _ -> assert false + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> string_of_nan n let string_of_results = function diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index bd4e73ea3d..4a7216b32b 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -12,7 +12,7 @@ and action' = | Get of var option * Ast.name type nanop = nanop' Source.phrase -and nanop' = (unit, unit, nan, nan) Values.op +and nanop' = (unit, unit, nan, nan, unit) Values.op and nan = CanonicalNan | ArithmeticNan type result = result' Source.phrase diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index df9a1a1a46..9c2db6fbba 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -446,7 +446,7 @@ let result res = | LitResult lit -> literal lit | NanResult nanop -> match nanop.it with - | Values.I32 _ | Values.I64 _ -> assert false + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n -> Node ("f32.const " ^ nan n, []) | Values.F64 n -> Node ("f64.const " ^ nan n, []) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index aa83c02e61..ed82d7ff86 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -54,7 +54,7 @@ let nanop f nan = match snd (f ("0" @@ no_region)) with | F32 _ -> F32 nan.it @@ nan.at | F64 _ -> F64 nan.it @@ nan.at - | I32 _ | I64 _ -> error nan.at "NaN pattern with non-float type" + | I32 _ | I64 _ | V128 _ -> error nan.at "NaN pattern with non-float type" let nat s at = try From 6499b319e62c14273ad71f45cc75302402785db1 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Sat, 21 Dec 2019 02:21:11 +0800 Subject: [PATCH 114/378] [test] Add spec tests for integer min/max ops (#163) * [test] Add spec tests for integer min/max ops Tests are pulled from https://github.com/WAVM/WAVM/pull/242 * Addressed comments --- test/core/simd/meta/README.md | 5 +- test/core/simd/meta/gen_tests.py | 2 + test/core/simd/meta/simd.py | 17 +- test/core/simd/meta/simd_integer_op.py | 66 +++ test/core/simd/meta/simd_lane_value.py | 32 ++ test/core/simd/meta/simd_lanewise_integer.py | 400 ++++++++++++++++++ test/core/simd/simd_i16x8.wast | 395 ++++++++++++++++++ test/core/simd/simd_i32x4.wast | 405 +++++++++++++++++++ test/core/simd/simd_i8x16.wast | 395 ++++++++++++++++++ 9 files changed, 1708 insertions(+), 9 deletions(-) create mode 100644 test/core/simd/meta/simd_integer_op.py create mode 100644 test/core/simd/meta/simd_lane_value.py create mode 100644 test/core/simd/meta/simd_lanewise_integer.py create mode 100644 test/core/simd/simd_i16x8.wast create mode 100644 test/core/simd/simd_i32x4.wast create mode 100644 test/core/simd/simd_i8x16.wast diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index cb03448745..f50efa78a0 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -19,6 +19,9 @@ Currently it only support following simd test files generation. - 'simd_i16x8_sat_arith.wast' - 'simd_f32x4.wast' - 'simd_f64x2.wast' +- 'simd_i8x16.wast' +- 'simd_i16x8.wast' +- 'simd_i32x4.wast' Usage: @@ -27,4 +30,4 @@ Usage: $ python gen_tests.py -a ``` -More details documented in `gen_tests.py`. +This script requires Python 3.6+, more details are documented in `gen_tests.py`. diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 04018ea7a2..b80da39f5e 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -2,6 +2,7 @@ """ This script is used for generating WebAssembly SIMD test cases. +It requires Python 3.6+. """ import sys import argparse @@ -24,6 +25,7 @@ 'simd_bitwise', 'simd_f32x4', 'simd_f64x2', + 'simd_lanewise_integer', ) diff --git a/test/core/simd/meta/simd.py b/test/core/simd/meta/simd.py index 991ad8994d..99ba46d572 100644 --- a/test/core/simd/meta/simd.py +++ b/test/core/simd/meta/simd.py @@ -6,7 +6,7 @@ """ -class SIMD(object): +class SIMD: # Constant template CONST = '({value_type}.const {value})' @@ -14,25 +14,26 @@ class SIMD(object): # v128 Constant template V128_CONST = '(v128.const {lane_type} {value})' - def const(self, value, value_type): + @staticmethod + def const(value, value_type): """ generation constant data, [e.g. i32, i64, f32, f64] Params: value: constant data, string or list, lane_type: lane type, [i32, i64, f32, f64] """ - return self.CONST.format(value_type=value_type, value=''.join(value)) + return SIMD.CONST.format(value_type=value_type, value=''.join(value)) - def v128_const(self, value, lane_type): + @staticmethod + def v128_const(value, lane_type): """ generation v128 constant data, [e.g. i8x16, i16x8, i32x4, f32x4] Params: value: constant data, string or list, lane_type: lane type, [e.g. i8x16, i16x8, i32x4, f32x4] """ - if lane_type.lower().find('x') == -1: - return self.const(value, lane_type) + return SIMD.const(value, lane_type) lane_cnt = int(lane_type[1:].split('x')[1]) @@ -47,7 +48,7 @@ def v128_const(self, value, lane_type): # If it is an empty list, generate all constant data with 0x00 if len(value) == 0: - return self.v128_const('0x00', lane_type) + return SIMD.v128_const('0x00', lane_type) data_elem = [] @@ -80,4 +81,4 @@ def v128_const(self, value, lane_type): data_elem = ' '.join(data_elem) # Returns v128 constant text - return self.V128_CONST.format(lane_type=lane_type, value=data_elem) \ No newline at end of file + return SIMD.V128_CONST.format(lane_type=lane_type, value=data_elem) \ No newline at end of file diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py new file mode 100644 index 0000000000..b3d14062c0 --- /dev/null +++ b/test/core/simd/meta/simd_integer_op.py @@ -0,0 +1,66 @@ +#!/usr/bin/env python3 + +"""Common integer value operations""" + +from simd_lane_value import LaneValue + +class IntegerSimpleOp: + """Common integer simple ops: + min_s, min_u, max_s, max_u + """ + + @staticmethod + def binary_op(op: str, p1: str, p2: str, lane_width: int) -> str: + """Binary operation on p1 and p2 with the operation specified by op + + :param op: min_s, min_u, max_s, max_u + :param p1: a hex or decimal integer literal string + :param p2: a hex or decimal integer literal string + :lane_width: bit number of each lane in SIMD v128 + :return: + """ + if '0x' in p1: + base1 = 16 + else: + base1 = 10 + v1 = int(p1, base1) + + if '0x' in p2: + base2 = 16 + else: + base2 = 10 + v2 = int(p2, base2) + + if op in ['min_s', 'max_s']: + i1 = IntegerSimpleOp.get_valid_value(v1, lane_width) + i2 = IntegerSimpleOp.get_valid_value(v2, lane_width) + if op == 'min_s': + return p1 if i1 <= i2 else p2 + else: + return p1 if i1 >= i2 else p2 + + elif op in ['min_u', 'max_u']: + i1 = IntegerSimpleOp.get_valid_value(v1, lane_width, signed=False) + i2 = IntegerSimpleOp.get_valid_value(v2, lane_width, signed=False) + if op == 'min_u': + return p1 if i1 <= i2 else p2 + else: + return p1 if i1 >= i2 else p2 + + else: + raise Exception('Unknown binary operation') + + @staticmethod + def get_valid_value(value, lane_width, signed=True): + """Get the valid integer value of value in the specified lane size. + """ + lane = LaneValue(lane_width) + value &= lane.mask + + if signed: + if value > lane.max: + return value - lane.mod + if value < lane.min: + return value + lane.mod + + return value \ No newline at end of file diff --git a/test/core/simd/meta/simd_lane_value.py b/test/core/simd/meta/simd_lane_value.py new file mode 100644 index 0000000000..fad246e044 --- /dev/null +++ b/test/core/simd/meta/simd_lane_value.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 + + +class LaneValue: + """This class stands for the value of signed integer represented by a lane in v128. + Suppose a bit number of the lane is n, then: + For signed integer: + minimum = -pow(2, n - 1), maximum = pow(2, n - 1) - 1 + The bit number of the lane can be 8, 16, 32, 64""" + def __init__(self, lane_width): + """lane_width: bit number of each lane in SIMD v128""" + self.lane_width = lane_width + + @property + def min(self): + return -pow(2, self.lane_width - 1) + + @property + def max(self): + return pow(2, self.lane_width - 1) - 1 + + @property + def mask(self): + return pow(2, self.lane_width) - 1 + + @property + def mod(self): + return pow(2, self.lane_width) + + @property + def quarter(self): + return pow(2, self.lane_width - 2) \ No newline at end of file diff --git a/test/core/simd/meta/simd_lanewise_integer.py b/test/core/simd/meta/simd_lanewise_integer.py new file mode 100644 index 0000000000..024d37ce13 --- /dev/null +++ b/test/core/simd/meta/simd_lanewise_integer.py @@ -0,0 +1,400 @@ +#!/usr/bin/env python3 + +""" +Generate [min_s, min_u, max_s, max_u] cases for i32x4, i16x8 and i8x16. +""" + +from simd import SIMD +from test_assert import AssertReturn +from simd_lane_value import LaneValue +from simd_integer_op import IntegerSimpleOp as IntOp + + +class SimdLaneWiseInteger: + LANE_TYPE = None + + LANE_VALUE = None + + BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u',) + + class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u] operations.""" + + def __init__(self): + + self.LANE_VALUE = LaneValue(self.lane_width) + + @property + def lane_count(self): + """count of lanes""" + return int(self.LANE_TYPE.split('x')[1]) + + @property + def lane_width(self): + """width of a single lane""" + return int(self.LANE_TYPE.replace('i', '').split('x')[0]) + + @property + def get_test_data_with_const(self): + """test const vs const and param vs const""" + case_data = [ + [ + [self.LANE_VALUE.min, self.LANE_VALUE.max, self.LANE_VALUE.quarter, self.LANE_VALUE.mask], + [self.LANE_VALUE.mask, self.LANE_VALUE.quarter, self.LANE_VALUE.max, self.LANE_VALUE.min] + ], + [ + [0, 1, 2, 3], + [3, 2, 1, 0], + ] + ] + case_data = [[list(map(str, param_1)), list(map(str, param_2))] for param_1, param_2 in case_data] + + return case_data + + @property + def get_test_data_go_through_if(self): + """test different lanes go through different if-then clauses""" + case_data = [ + [ + [self.LANE_VALUE.min, self.LANE_VALUE.max, self.LANE_VALUE.quarter, self.LANE_VALUE.mask], + [self.LANE_VALUE.mask, self.LANE_VALUE.quarter, self.LANE_VALUE.max, self.LANE_VALUE.min] + ], + [ + [0, 1, 2, 128], + [0, 2, 1, 0x80], + ] + ] + case_data = [[list(map(str, param_1)), list(map(str, param_2))] for param_1, param_2 in case_data] + + return case_data + + @property + def get_test_data_opposite_sign_zero(self): + """test opposite signs of zero""" + case_data = [ + [ + ['-0', '-0', '+0', '+0'], + ['+0', '0', '-0', '0'], + ], + [ + ['-0', '-0', '-0', '-0'], + ['+0', '+0', '+0', '+0'], + ] + ] + + return case_data + + @property + def get_test_data(self): + """case data""" + + case_data = [ + + [ + ['0'] * self.lane_count, + ['0'] * self.lane_count, + ], + [ + ['0'] * self.lane_count, + ['-1'] * self.lane_count, + ], + [ + ['0', '0', '-1', '-1'], + ['0', '-1', '0', '-1'], + ], + [ + ['0'] * self.lane_count, + [hex(self.LANE_VALUE.mask)] * self.lane_count, + ], + + [ + ['1'] * self.lane_count, + ['1'] * self.lane_count, + ], + [ + [str(self.LANE_VALUE.mask)] * self.lane_count, + ['1'] * self.lane_count, + ], + [ + [str(self.LANE_VALUE.mask)] * self.lane_count, + ['128'] * self.lane_count, + ], + [ + [str(-self.LANE_VALUE.min)] * self.lane_count, + [str(self.LANE_VALUE.min)] * self.lane_count, + ], + [ + [hex(-self.LANE_VALUE.min)] * self.lane_count, + [str(self.LANE_VALUE.min)] * self.lane_count, + ], + [ + ['123'] * self.lane_count, + ['01_2_3'] * self.lane_count, + ], + [ + ['0x80'] * self.lane_count, + ['0x0_8_0'] * self.lane_count, + ], + + ] + + return case_data + + @property + def gen_funcs_normal(self): + """generate normal functions""" + binary_func_template = '\n (func (export "{lane_type}.{op}") (param v128 v128) (result v128) ({lane_type}.{op} (local.get 0) (local.get 1)))' + funcs = '' + for op in self.BINARY_OPS: + funcs += binary_func_template.format(lane_type=self.LANE_TYPE, op=op) + + return funcs + + @property + def gen_funcs_with_const(self): + """generate functions with const arguments""" + func_with_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (result v128) ({lane_type}.{op} {param_1} {param_2}))' + func_with_param_and_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (param v128) (result v128) ({lane_type}.{op} (local.get 0) {param_1}))' + funcs = '' + cnt = 0 + for op in self.BINARY_OPS: + for param_1, param_2 in self.get_test_data_with_const: + funcs += func_with_const.format(lane_type=self.LANE_TYPE, + op=op, + param_1=SIMD.v128_const(param_1, self.LANE_TYPE), + param_2=SIMD.v128_const(param_2, self.LANE_TYPE), + cnt=cnt) + cnt += 1 + + for op in self.BINARY_OPS: + for param_1, param_2 in self.get_test_data_with_const: + funcs += func_with_param_and_const.format(lane_type=self.LANE_TYPE, + op=op, + param_1=SIMD.v128_const(param_1, self.LANE_TYPE), + cnt=cnt) + cnt += 1 + + return funcs + + @property + def gen_test_case_with_const(self): + """generate tests calling function with const""" + cnt = 0 + cases = '\n\n;; Const vs const' + for op in self.BINARY_OPS: + for param_1, param_2 in self.get_test_data_with_const: + result = [] + for idx in range(0, len(param_1)): + result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), + [], + SIMD.v128_const(result, self.LANE_TYPE))) + cnt += 1 + + cases += '\n\n;; Param vs const' + for op in self.BINARY_OPS: + for param_1, param_2 in self.get_test_data_with_const: + result = [] + for idx in range(0, len(param_1)): + result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), + [SIMD.v128_const(param_2, self.LANE_TYPE)], + SIMD.v128_const(result, self.LANE_TYPE))) + cnt += 1 + + return cases + + @property + def gen_test_case(self): + """generate test cases""" + cases = '' + + def gen(case_data): + cases = '' + for op in self.BINARY_OPS: + for param_1, param_2 in case_data: + result = [] + for idx in range(0, len(param_1)): + result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + cases += '\n' + str(AssertReturn('{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op), + [SIMD.v128_const(param_1, self.LANE_TYPE), SIMD.v128_const(param_2, self.LANE_TYPE)], + SIMD.v128_const(result, self.LANE_TYPE))) + return cases + + cases += gen(self.get_test_data) + + cases += self.gen_test_case_with_const + + # test different lanes go through different if-then clauses + cases += '\n\n;; Test different lanes go through different if-then clauses' + cases += gen(self.get_test_data_go_through_if) + + # test opposite signs of zero + cases += '\n\n;; Test opposite signs of zero' + cases += gen(self.get_test_data_opposite_sign_zero) + + # unknown operators test cases + cases += self.gen_test_case_unknown_operators + + # type check test cases + cases += self.gen_test_case_type_check + + # empty argument test cases + cases += self.gen_test_case_empty_argument + + return cases + + @property + def gen_test_case_unknown_operators(self): + """generate unknown operators test cases""" + + if self.LANE_TYPE != 'i32x4': + return '' + + cases = '\n\n;; Unknown operators' + lane_types = ('f32x4', 'i64x2',) + assert_template = '(assert_malformed (module quote "(memory 1) (func (result v128) ({lane_type}.{op} {param_1} {param_2}))") "unknown operator")' + for lane_type in lane_types: + for op in self.BINARY_OPS: + cases += '\n' + assert_template.format(lane_type=lane_type, + op=op, + param_1=SIMD.v128_const('0', self.LANE_TYPE), + param_2=SIMD.v128_const('1', self.LANE_TYPE)) + + return cases + + @property + def gen_test_case_type_check(self): + """generate type check test cases""" + cases = '\n\n;; Type check' + assert_template = '(assert_invalid (module (func (result v128) ({lane_type}.{op} (i32.const 0) (f32.const 0.0)))) "type mismatch")' + for op in self.BINARY_OPS: + cases += '\n' + assert_template.format(lane_type=self.LANE_TYPE, op=op) + + return cases + + @property + def gen_funcs_combination(self): + """generate functions for combination test cases""" + funcs = '\n\n;; Combination' + funcs += '\n(module' + + assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128 v128 v128) (result v128) ' \ + '({lane_type}.{op1} ({lane_type}.{op2} (local.get 0) (local.get 1))(local.get 2))' \ + ')' + + binary_ops = list(self.BINARY_OPS) + binary_ops.reverse() + for op1 in self.BINARY_OPS: + for op2 in binary_ops: + funcs += '\n' + assert_template.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2) + + funcs += '\n)' + return funcs + + @property + def gen_test_case_combination(self): + """generate combination test cases""" + + cases = '\n' + + binary_ops = list(self.BINARY_OPS) + binary_ops.reverse() + for op1 in self.BINARY_OPS: + for op2 in binary_ops: + + result = [] + ret = IntOp.binary_op(op2, '0', '1', self.lane_width) + ret = IntOp.binary_op(op1, ret, '2', self.lane_width) + result.append(ret) + + cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), + [SIMD.v128_const('0', self.LANE_TYPE), + SIMD.v128_const('1', self.LANE_TYPE), + SIMD.v128_const('2', self.LANE_TYPE)], + SIMD.v128_const(result, self.LANE_TYPE))) + cases += '\n' + return cases + + @property + def gen_test_case_empty_argument(self): + """generate empty argument test cases""" + + assert_1st_empyt_template = '\n(assert_invalid' \ + '\n (module' \ + '\n (func ${lane_type}.{op}-1st-arg-empty (result v128)' \ + '\n ({lane_type}.{op} {param_1})' \ + '\n )' \ + '\n )' \ + '\n "type mismatch"' \ + '\n)' + assert_all_empty_template = '\n(assert_invalid' \ + '\n (module' \ + '\n (func ${lane_type}.{op}-all-args-empty (result v128)' \ + '\n ({lane_type}.{op})' \ + '\n )' \ + '\n )' \ + '\n "type mismatch"' \ + '\n)' + + cases = '' + + cases += '\n\n;; Test operation with empty argument\n' + for op in self.BINARY_OPS: + cases += assert_1st_empyt_template.format(lane_type=self.LANE_TYPE, op=op, param_1=SIMD.v128_const('0', self.LANE_TYPE)) + cases += assert_all_empty_template.format(lane_type=self.LANE_TYPE, op=op) + + return cases + + @property + def gen_funcs(self): + """generate functions""" + funcs = '' + funcs += '\n\n(module' + funcs += self.gen_funcs_normal + funcs += self.gen_funcs_with_const + funcs += '\n)\n' + + return funcs + + def get_all_cases(self): + """generate all test cases""" + cases = self.class_summary.format(lane_type=self.LANE_TYPE) \ + + self.gen_funcs \ + + self.gen_test_case \ + + self.gen_funcs_combination \ + + self.gen_test_case_combination + + return cases + + def gen_test_cases(self): + """generate case file""" + wast_filename = '../simd_{lane_type}.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + + +class Simdi32x4Case(SimdLaneWiseInteger): + LANE_TYPE = 'i32x4' + + +class Simdi16x8Case(SimdLaneWiseInteger): + LANE_TYPE = 'i16x8' + + +class Simdi8x16Case(SimdLaneWiseInteger): + LANE_TYPE = 'i8x16' + + +def gen_test_cases(): + simd_i32x4_case = Simdi32x4Case() + simd_i32x4_case.gen_test_cases() + + simd_i16x8_case = Simdi16x8Case() + simd_i16x8_case.gen_test_cases() + + simd_i8x16_case = Simdi8x16Case() + simd_i8x16_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/simd_i16x8.wast b/test/core/simd/simd_i16x8.wast new file mode 100644 index 0000000000..a77afe1294 --- /dev/null +++ b/test/core/simd/simd_i16x8.wast @@ -0,0 +1,395 @@ +;; Tests for i16x8 [min_s, min_u, max_s, max_u] operations. + +(module + (func (export "i16x8.min_s") (param v128 v128) (result v128) (i16x8.min_s (local.get 0) (local.get 1))) + (func (export "i16x8.min_u") (param v128 v128) (result v128) (i16x8.min_u (local.get 0) (local.get 1))) + (func (export "i16x8.max_s") (param v128 v128) (result v128) (i16x8.max_s (local.get 0) (local.get 1))) + (func (export "i16x8.max_u") (param v128 v128) (result v128) (i16x8.max_u (local.get 0) (local.get 1))) + (func (export "i16x8.min_s_with_const_0") (result v128) (i16x8.min_s (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) + (func (export "i16x8.min_s_with_const_1") (result v128) (i16x8.min_s (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) + (func (export "i16x8.min_u_with_const_2") (result v128) (i16x8.min_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) + (func (export "i16x8.min_u_with_const_3") (result v128) (i16x8.min_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) + (func (export "i16x8.max_s_with_const_4") (result v128) (i16x8.max_s (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) + (func (export "i16x8.max_s_with_const_5") (result v128) (i16x8.max_s (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) + (func (export "i16x8.max_u_with_const_6") (result v128) (i16x8.max_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) + (func (export "i16x8.max_u_with_const_7") (result v128) (i16x8.max_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) + (func (export "i16x8.min_s_with_const_8") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_s_with_const_9") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.min_u_with_const_10") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_u_with_const_11") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_s_with_const_12") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_s_with_const_13") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_u_with_const_14") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_u_with_const_15") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) +) + +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1) + (v128.const i16x8 0 0 -1 -1 0 0 -1 -1)) + (v128.const i16x8 0 0 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 123 123 123 123 123 123 123 123) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1) + (v128.const i16x8 0 0 -1 -1 0 0 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 -1 -1)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 123 123 123 123 123 123 123 123) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1) + (v128.const i16x8 0 0 -1 -1 0 0 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 -1 -1)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 123 123 123 123 123 123 123 123) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1) + (v128.const i16x8 0 0 -1 -1 0 0 -1 -1)) + (v128.const i16x8 0 0 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 123 123 123 123 123 123 123 123) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + +;; Const vs const +(assert_return (invoke "i16x8.min_s_with_const_0") (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_s_with_const_1") (v128.const i16x8 0 0 1 1 1 1 0 0)) +(assert_return (invoke "i16x8.min_u_with_const_2") (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_u_with_const_3") (v128.const i16x8 0 0 1 1 1 1 0 0)) +(assert_return (invoke "i16x8.max_s_with_const_4") (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_s_with_const_5") (v128.const i16x8 3 3 2 2 2 2 3 3)) +(assert_return (invoke "i16x8.max_u_with_const_6") (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_u_with_const_7") (v128.const i16x8 3 3 2 2 2 2 3 3)) + +;; Param vs const +(assert_return (invoke "i16x8.min_s_with_const_8" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_s_with_const_9" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 0 0 1 1 1 1 0 0)) +(assert_return (invoke "i16x8.min_u_with_const_10" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_u_with_const_11" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 0 0 1 1 1 1 0 0)) +(assert_return (invoke "i16x8.max_s_with_const_12" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_s_with_const_13" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 3 3 2 2 2 2 3 3)) +(assert_return (invoke "i16x8.max_u_with_const_14" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_u_with_const_15" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 3 3 2 2 2 2 3 3)) + +;; Test different lanes go through different if-then clauses +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) + (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 1 1 2 2 128 128) + (v128.const i16x8 0 0 2 2 1 1 128 128)) + (v128.const i16x8 0 0 1 1 1 1 128 128)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) + (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 0 0 1 1 2 2 128 128) + (v128.const i16x8 0 0 2 2 1 1 128 128)) + (v128.const i16x8 0 0 1 1 1 1 128 128)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) + (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 0 0 1 1 2 2 128 128) + (v128.const i16x8 0 0 2 2 1 1 128 128)) + (v128.const i16x8 0 0 2 2 2 2 128 128)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) + (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 1 1 2 2 128 128) + (v128.const i16x8 0 0 2 2 1 1 128 128)) + (v128.const i16x8 0 0 2 2 2 2 128 128)) + +;; Test opposite signs of zero +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) +(assert_return (invoke "i16x8.min_s" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) +(assert_return (invoke "i16x8.min_u" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) +(assert_return (invoke "i16x8.max_s" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) +(assert_return (invoke "i16x8.max_u" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) + +;; Type check +(assert_invalid (module (func (result v128) (i16x8.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.min_s-1st-arg-empty (result v128) + (i16x8.min_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.min_s-all-args-empty (result v128) + (i16x8.min_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.min_u-1st-arg-empty (result v128) + (i16x8.min_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.min_u-all-args-empty (result v128) + (i16x8.min_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.max_s-1st-arg-empty (result v128) + (i16x8.max_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.max_s-all-args-empty (result v128) + (i16x8.max_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.max_u-1st-arg-empty (result v128) + (i16x8.max_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.max_u-all-args-empty (result v128) + (i16x8.max_u) + ) + ) + "type mismatch" +) + +;; Combination +(module + (func (export "i16x8.min_s-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) +) + +(assert_return (invoke "i16x8.min_s-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_s-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_s-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_s-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_u-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.min_u-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_s-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_s-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_s-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_s-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) \ No newline at end of file diff --git a/test/core/simd/simd_i32x4.wast b/test/core/simd/simd_i32x4.wast new file mode 100644 index 0000000000..046b49e485 --- /dev/null +++ b/test/core/simd/simd_i32x4.wast @@ -0,0 +1,405 @@ +;; Tests for i32x4 [min_s, min_u, max_s, max_u] operations. + +(module + (func (export "i32x4.min_s") (param v128 v128) (result v128) (i32x4.min_s (local.get 0) (local.get 1))) + (func (export "i32x4.min_u") (param v128 v128) (result v128) (i32x4.min_u (local.get 0) (local.get 1))) + (func (export "i32x4.max_s") (param v128 v128) (result v128) (i32x4.max_s (local.get 0) (local.get 1))) + (func (export "i32x4.max_u") (param v128 v128) (result v128) (i32x4.max_u (local.get 0) (local.get 1))) + (func (export "i32x4.min_s_with_const_0") (result v128) (i32x4.min_s (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) + (func (export "i32x4.min_s_with_const_1") (result v128) (i32x4.min_s (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) + (func (export "i32x4.min_u_with_const_2") (result v128) (i32x4.min_u (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) + (func (export "i32x4.min_u_with_const_3") (result v128) (i32x4.min_u (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) + (func (export "i32x4.max_s_with_const_4") (result v128) (i32x4.max_s (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) + (func (export "i32x4.max_s_with_const_5") (result v128) (i32x4.max_s (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) + (func (export "i32x4.max_u_with_const_6") (result v128) (i32x4.max_u (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) + (func (export "i32x4.max_u_with_const_7") (result v128) (i32x4.max_u (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) + (func (export "i32x4.min_s_with_const_8") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.min_s_with_const_9") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.min_u_with_const_10") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.min_u_with_const_11") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.max_s_with_const_12") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.max_s_with_const_13") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.max_u_with_const_14") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.max_u_with_const_15") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 0 1 2 3))) +) + +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 123 123 123 123) + (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i32x4 123 123 123 123)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0x80 0x80 0x80 0x80) + (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 0 0 -1)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 128 128 128 128)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 123 123 123 123) + (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i32x4 123 123 123 123)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0x80 0x80 0x80 0x80) + (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 0 0 -1)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 128 128 128 128)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 123 123 123 123) + (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i32x4 123 123 123 123)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0x80 0x80 0x80 0x80) + (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 0 -1 -1) + (v128.const i32x4 0 -1 0 -1)) + (v128.const i32x4 0 -1 -1 -1)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 128 128 128 128)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 123 123 123 123) + (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i32x4 123 123 123 123)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0x80 0x80 0x80 0x80) + (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) + +;; Const vs const +(assert_return (invoke "i32x4.min_s_with_const_0") (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_s_with_const_1") (v128.const i32x4 0 1 1 0)) +(assert_return (invoke "i32x4.min_u_with_const_2") (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_u_with_const_3") (v128.const i32x4 0 1 1 0)) +(assert_return (invoke "i32x4.max_s_with_const_4") (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_s_with_const_5") (v128.const i32x4 3 2 2 3)) +(assert_return (invoke "i32x4.max_u_with_const_6") (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_u_with_const_7") (v128.const i32x4 3 2 2 3)) + +;; Param vs const +(assert_return (invoke "i32x4.min_s_with_const_8" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_s_with_const_9" (v128.const i32x4 3 2 1 0)) + (v128.const i32x4 0 1 1 0)) +(assert_return (invoke "i32x4.min_u_with_const_10" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_u_with_const_11" (v128.const i32x4 3 2 1 0)) + (v128.const i32x4 0 1 1 0)) +(assert_return (invoke "i32x4.max_s_with_const_12" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_s_with_const_13" (v128.const i32x4 3 2 1 0)) + (v128.const i32x4 3 2 2 3)) +(assert_return (invoke "i32x4.max_u_with_const_14" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_u_with_const_15" (v128.const i32x4 3 2 1 0)) + (v128.const i32x4 3 2 2 3)) + +;; Test different lanes go through different if-then clauses +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) + (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 1 2 128) + (v128.const i32x4 0 2 1 128)) + (v128.const i32x4 0 1 1 128)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) + (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 0 1 2 128) + (v128.const i32x4 0 2 1 128)) + (v128.const i32x4 0 1 1 128)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) + (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 0 1 2 128) + (v128.const i32x4 0 2 1 128)) + (v128.const i32x4 0 2 2 128)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) + (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) + (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 1 2 128) + (v128.const i32x4 0 2 1 128)) + (v128.const i32x4 0 2 2 128)) + +;; Test opposite signs of zero +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 -0 -0 +0 +0) + (v128.const i32x4 +0 0 -0 0)) + (v128.const i32x4 -0 -0 +0 +0)) +(assert_return (invoke "i32x4.min_s" (v128.const i32x4 -0 -0 -0 -0) + (v128.const i32x4 +0 +0 +0 +0)) + (v128.const i32x4 -0 -0 -0 -0)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 -0 -0 +0 +0) + (v128.const i32x4 +0 0 -0 0)) + (v128.const i32x4 -0 -0 +0 +0)) +(assert_return (invoke "i32x4.min_u" (v128.const i32x4 -0 -0 -0 -0) + (v128.const i32x4 +0 +0 +0 +0)) + (v128.const i32x4 -0 -0 -0 -0)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 -0 -0 +0 +0) + (v128.const i32x4 +0 0 -0 0)) + (v128.const i32x4 -0 -0 +0 +0)) +(assert_return (invoke "i32x4.max_s" (v128.const i32x4 -0 -0 -0 -0) + (v128.const i32x4 +0 +0 +0 +0)) + (v128.const i32x4 -0 -0 -0 -0)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 -0 -0 +0 +0) + (v128.const i32x4 +0 0 -0 0)) + (v128.const i32x4 -0 -0 +0 +0)) +(assert_return (invoke "i32x4.max_u" (v128.const i32x4 -0 -0 -0 -0) + (v128.const i32x4 +0 +0 +0 +0)) + (v128.const i32x4 -0 -0 -0 -0)) + +;; Unknown operators +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.min_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.min_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.max_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.max_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.min_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.min_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") + +;; Type check +(assert_invalid (module (func (result v128) (i32x4.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.min_s-1st-arg-empty (result v128) + (i32x4.min_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.min_s-all-args-empty (result v128) + (i32x4.min_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.min_u-1st-arg-empty (result v128) + (i32x4.min_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.min_u-all-args-empty (result v128) + (i32x4.min_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.max_s-1st-arg-empty (result v128) + (i32x4.max_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.max_s-all-args-empty (result v128) + (i32x4.max_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.max_u-1st-arg-empty (result v128) + (i32x4.max_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.max_u-all-args-empty (result v128) + (i32x4.max_u) + ) + ) + "type mismatch" +) + +;; Combination +(module + (func (export "i32x4.min_s-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_s-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_s-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_s-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_u-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_u-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_u-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_u-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_s-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_s-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_s-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_s-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_u-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_u-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_u-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_u-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) +) + +(assert_return (invoke "i32x4.min_s-i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_s-i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_s-i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_s-i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u-i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_u-i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.min_u-i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u-i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.max_s-i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_s-i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_s-i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_s-i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_u-i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_u-i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_u-i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_u-i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1) + (v128.const i32x4 2 2 2 2)) + (v128.const i32x4 2 2 2 2)) \ No newline at end of file diff --git a/test/core/simd/simd_i8x16.wast b/test/core/simd/simd_i8x16.wast new file mode 100644 index 0000000000..0a41d4583d --- /dev/null +++ b/test/core/simd/simd_i8x16.wast @@ -0,0 +1,395 @@ +;; Tests for i8x16 [min_s, min_u, max_s, max_u] operations. + +(module + (func (export "i8x16.min_s") (param v128 v128) (result v128) (i8x16.min_s (local.get 0) (local.get 1))) + (func (export "i8x16.min_u") (param v128 v128) (result v128) (i8x16.min_u (local.get 0) (local.get 1))) + (func (export "i8x16.max_s") (param v128 v128) (result v128) (i8x16.max_s (local.get 0) (local.get 1))) + (func (export "i8x16.max_u") (param v128 v128) (result v128) (i8x16.max_u (local.get 0) (local.get 1))) + (func (export "i8x16.min_s_with_const_0") (result v128) (i8x16.min_s (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) + (func (export "i8x16.min_s_with_const_1") (result v128) (i8x16.min_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) + (func (export "i8x16.min_u_with_const_2") (result v128) (i8x16.min_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) + (func (export "i8x16.min_u_with_const_3") (result v128) (i8x16.min_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) + (func (export "i8x16.max_s_with_const_4") (result v128) (i8x16.max_s (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) + (func (export "i8x16.max_s_with_const_5") (result v128) (i8x16.max_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) + (func (export "i8x16.max_u_with_const_6") (result v128) (i8x16.max_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) + (func (export "i8x16.max_u_with_const_7") (result v128) (i8x16.max_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) + (func (export "i8x16.min_s_with_const_8") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_9") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.min_u_with_const_10") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_u_with_const_11") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_s_with_const_12") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_s_with_const_13") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_u_with_const_14") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_u_with_const_15") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) +) + +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + +;; Const vs const +(assert_return (invoke "i8x16.min_s_with_const_0") (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s_with_const_1") (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_u_with_const_2") (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_3") (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_4") (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_s_with_const_5") (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) +(assert_return (invoke "i8x16.max_u_with_const_6") (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_u_with_const_7") (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) + +;; Param vs const +(assert_return (invoke "i8x16.min_s_with_const_8" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s_with_const_9" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_u_with_const_10" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_11" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_12" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_s_with_const_13" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) +(assert_return (invoke "i8x16.max_u_with_const_14" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_u_with_const_15" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) + +;; Test different lanes go through different if-then clauses +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) + (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) + (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) + (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 128 128 128 128)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) + (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) + (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) + (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 128 128 128 128)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) + (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) + (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) + (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) + (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) + (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) + (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) + +;; Test opposite signs of zero +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.min_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.min_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.max_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.max_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) + +;; Type check +(assert_invalid (module (func (result v128) (i8x16.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.min_s-1st-arg-empty (result v128) + (i8x16.min_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.min_s-all-args-empty (result v128) + (i8x16.min_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.min_u-1st-arg-empty (result v128) + (i8x16.min_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.min_u-all-args-empty (result v128) + (i8x16.min_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.max_s-1st-arg-empty (result v128) + (i8x16.max_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.max_s-all-args-empty (result v128) + (i8x16.max_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.max_u-1st-arg-empty (result v128) + (i8x16.max_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.max_u-all-args-empty (result v128) + (i8x16.max_u) + ) + ) + "type mismatch" +) + +;; Combination +(module + (func (export "i8x16.min_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) +) + +(assert_return (invoke "i8x16.min_s-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_s-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_s-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_s-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_u-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_u-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_s-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_s-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_s-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) \ No newline at end of file From b6903b803243bd31d11093611142ae9b19d3c100 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 23 Dec 2019 16:04:03 +0800 Subject: [PATCH 115/378] [test] Rename test files of integer min/max ops A followup for https://github.com/WebAssembly/simd/pull/163#discussion_r360507711 --- test/core/simd/meta/gen_tests.py | 2 +- .../simd/meta/{simd_lanewise_integer.py => simd_int_arith2.py} | 2 +- test/core/simd/{simd_i16x8.wast => simd_i16x8_arith2.wast} | 2 +- test/core/simd/{simd_i32x4.wast => simd_i32x4_arith2.wast} | 2 +- test/core/simd/{simd_i8x16.wast => simd_i8x16_arith2.wast} | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) rename test/core/simd/meta/{simd_lanewise_integer.py => simd_int_arith2.py} (99%) rename test/core/simd/{simd_i16x8.wast => simd_i16x8_arith2.wast} (99%) rename test/core/simd/{simd_i32x4.wast => simd_i32x4_arith2.wast} (99%) rename test/core/simd/{simd_i8x16.wast => simd_i8x16_arith2.wast} (99%) diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index b80da39f5e..86d0cbceaa 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -25,7 +25,7 @@ 'simd_bitwise', 'simd_f32x4', 'simd_f64x2', - 'simd_lanewise_integer', + 'simd_int_arith2', ) diff --git a/test/core/simd/meta/simd_lanewise_integer.py b/test/core/simd/meta/simd_int_arith2.py similarity index 99% rename from test/core/simd/meta/simd_lanewise_integer.py rename to test/core/simd/meta/simd_int_arith2.py index 024d37ce13..3f7e3e4bf0 100644 --- a/test/core/simd/meta/simd_lanewise_integer.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -368,7 +368,7 @@ def get_all_cases(self): def gen_test_cases(self): """generate case file""" - wast_filename = '../simd_{lane_type}.wast'.format(lane_type=self.LANE_TYPE) + wast_filename = '../simd_{lane_type}_arith2.wast'.format(lane_type=self.LANE_TYPE) with open(wast_filename, 'w') as fp: fp.write(self.get_all_cases()) diff --git a/test/core/simd/simd_i16x8.wast b/test/core/simd/simd_i16x8_arith2.wast similarity index 99% rename from test/core/simd/simd_i16x8.wast rename to test/core/simd/simd_i16x8_arith2.wast index a77afe1294..c19685c9ed 100644 --- a/test/core/simd/simd_i16x8.wast +++ b/test/core/simd/simd_i16x8_arith2.wast @@ -392,4 +392,4 @@ (assert_return (invoke "i16x8.max_u-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) - (v128.const i16x8 2 2 2 2 2 2 2 2)) \ No newline at end of file + (v128.const i16x8 2 2 2 2 2 2 2 2)) diff --git a/test/core/simd/simd_i32x4.wast b/test/core/simd/simd_i32x4_arith2.wast similarity index 99% rename from test/core/simd/simd_i32x4.wast rename to test/core/simd/simd_i32x4_arith2.wast index 046b49e485..16f2bfda42 100644 --- a/test/core/simd/simd_i32x4.wast +++ b/test/core/simd/simd_i32x4_arith2.wast @@ -402,4 +402,4 @@ (assert_return (invoke "i32x4.max_u-i32x4.min_s" (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) - (v128.const i32x4 2 2 2 2)) \ No newline at end of file + (v128.const i32x4 2 2 2 2)) diff --git a/test/core/simd/simd_i8x16.wast b/test/core/simd/simd_i8x16_arith2.wast similarity index 99% rename from test/core/simd/simd_i8x16.wast rename to test/core/simd/simd_i8x16_arith2.wast index 0a41d4583d..0573c1f20b 100644 --- a/test/core/simd/simd_i8x16.wast +++ b/test/core/simd/simd_i8x16_arith2.wast @@ -392,4 +392,4 @@ (assert_return (invoke "i8x16.max_u-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) - (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) \ No newline at end of file + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) From 1d97ea217813f01bbef880096104de543ceb8319 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 3 Jan 2020 02:14:09 +0800 Subject: [PATCH 116/378] Update implementation status for WAVM (#167) --- proposals/simd/ImplementationStatus.md | 30 +++++++++++++------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 6fddd7e333..2895c243a5 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -87,11 +87,11 @@ | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.avgr_u` | `-munimplemented-simd128` | | | | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.avgr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -105,11 +105,11 @@ | `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.avgr_u` | `-munimplemented-simd128` | | | | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.avgr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -119,10 +119,10 @@ | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -181,7 +181,7 @@ [2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of Oct 23, 2019. Requires flag `--enable simd` +[3] Tip of tree WAVM as of Dec 18, 2019. Requires flag `--enable simd` [4] Requires (case-insensitive) flag `-wasmsimd` From cac3342801c31c2a9e00b31982e3c7da664cbead Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 7 Jan 2020 16:56:50 -0800 Subject: [PATCH 117/378] Add encoding for v128 type and v128.const --- interpreter/binary/encode.ml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index a614983368..d6b2ffb5fe 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -95,7 +95,7 @@ let encode m = | I64Type -> vs7 (-0x02) | F32Type -> vs7 (-0x03) | F64Type -> vs7 (-0x04) - | V128Type -> failwith "TODO v128" + | V128Type -> vs7 (-0x05) let elem_type = function | FuncRefType -> vs7 (-0x10) @@ -134,6 +134,7 @@ let encode m = open Memory let op n = u8 n + let simd_op n = op 0xfd; op n let end_ () = op 0x0b let memop {align; offset; _} = vu32 (Int32.of_int align); vu32 offset @@ -224,8 +225,7 @@ let encode m = | Const {it = I64 c; _} -> op 0x42; vs64 c | Const {it = F32 c; _} -> op 0x43; f32 c | Const {it = F64 c; _} -> op 0x44; f64 c - | Const {it = V128 c; _} -> - failwith "TODO v128" + | Const {it = V128 c; _} -> simd_op 0x02; Bytes.iter (put s) (V128.to_bits c) | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 From 52c76230c9473f5648400bd9401c6868d892345c Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Thu, 9 Jan 2020 09:23:19 +0800 Subject: [PATCH 118/378] [test] Test ops with missing arguments (#168) This PR adds spec tests for testing all simd ops with missing arguments. Sync from https://github.com/WAVM/WAVM/pull/247 --- test/core/simd/meta/README.md | 6 +- test/core/simd/meta/simd_arithmetic.py | 39 ++++- test/core/simd/meta/simd_bitwise.py | 67 +++++++- test/core/simd/meta/simd_compare.py | 31 +++- test/core/simd/meta/simd_f32x4_cmp.py | 5 +- test/core/simd/meta/simd_i16x8_cmp.py | 4 +- test/core/simd/meta/simd_i32x4_cmp.py | 4 +- test/core/simd/meta/simd_i8x16_cmp.py | 2 + test/core/simd/meta/simd_int_arith2.py | 44 +++-- test/core/simd/meta/simd_sat_arith.py | 27 +++- test/core/simd/meta/test_assert.py | 50 ++++-- test/core/simd/simd_bit_shift.wast | 101 +++++++++++- test/core/simd/simd_bitwise.wast | 102 +++++++++++- test/core/simd/simd_boolean.wast | 53 +++++- test/core/simd/simd_const.wast | 2 +- test/core/simd/simd_conversions.wast | 197 ++++++++++++++++++++++- test/core/simd/simd_f32x4.wast | 43 +++++ test/core/simd/simd_f32x4_arith.wast | 83 ++++++++++ test/core/simd/simd_f32x4_cmp.wast | 99 ++++++++++++ test/core/simd/simd_f64x2.wast | 43 +++++ test/core/simd/simd_f64x2_arith.wast | 83 ++++++++++ test/core/simd/simd_f64x2_cmp.wast | 99 ++++++++++++ test/core/simd/simd_i16x8_arith.wast | 59 +++++++ test/core/simd/simd_i16x8_arith2.wast | 8 +- test/core/simd/simd_i16x8_cmp.wast | 164 +++++++++++++++++++ test/core/simd/simd_i16x8_sat_arith.wast | 67 ++++++++ test/core/simd/simd_i32x4_arith.wast | 59 +++++++ test/core/simd/simd_i32x4_arith2.wast | 8 +- test/core/simd/simd_i32x4_cmp.wast | 163 +++++++++++++++++++ test/core/simd/simd_i64x2_arith.wast | 59 +++++++ test/core/simd/simd_i8x16_arith.wast | 43 +++++ test/core/simd/simd_i8x16_arith2.wast | 8 +- test/core/simd/simd_i8x16_cmp.wast | 163 +++++++++++++++++++ test/core/simd/simd_i8x16_sat_arith.wast | 67 ++++++++ test/core/simd/simd_lane.wast | 147 +++++++++++++++++ test/core/simd/simd_load.wast | 30 +++- test/core/simd/simd_load_extend.wast | 56 ++++++- test/core/simd/simd_load_splat.wast | 38 ++++- test/core/simd/simd_splat.wast | 56 ++++++- test/core/simd/simd_store.wast | 30 +++- 40 files changed, 2333 insertions(+), 76 deletions(-) diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index f50efa78a0..032b4e4e5f 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -9,8 +9,11 @@ Currently it only support following simd test files generation. - 'simd_f32x4_cmp.wast' - 'simd_f64x2_cmp.wast' - 'simd_i8x16_arith.wast' +- 'simd_i8x16_arith2.wast' - 'simd_i16x8_arith.wast' +- 'simd_i16x8_arith2.wast' - 'simd_i32x4_arith.wast' +- 'simd_i32x4_arith2.wast' - 'simd_f32x4_arith.wast' - 'simd_i64x2_arith.wast' - 'simd_f64x2_arith.wast' @@ -19,9 +22,6 @@ Currently it only support following simd test files generation. - 'simd_i16x8_sat_arith.wast' - 'simd_f32x4.wast' - 'simd_f64x2.wast' -- 'simd_i8x16.wast' -- 'simd_i16x8.wast' -- 'simd_i32x4.wast' Usage: diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index 0e84327b47..3ad596ebcb 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -14,7 +14,7 @@ """ from simd import SIMD -from test_assert import AssertReturn +from test_assert import AssertReturn, AssertInvalid class LaneNumber: @@ -325,7 +325,40 @@ def get_invalid_cases(self): operand_1='i32.const 0', operand_2='f32.const 0.0')) - return '\n'.join(invalid_cases) + return '\n'.join(invalid_cases) + self.argument_empty_test() + + def argument_empty_test(self): + """Test cases with empty argument. + """ + cases = [] + + cases.append('\n\n;; Test operation with empty argument\n') + + case_data = { + 'op': '', + 'extended_name': 'arg-empty', + 'param_type': '', + 'result_type': '(result v128)', + 'params': '', + } + + for op in self.UNARY_OPS: + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + for op in self.BINARY_OPS: + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = SIMD.v128_const('0', self.LANE_TYPE) + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + return '\n'.join(cases) def get_combine_cases(self): combine_cases = [';; combination\n(module'] @@ -413,4 +446,4 @@ def get_all_cases(self): def gen_test_cases(self): wast_filename = '../simd_{lane_type}_arith.wast'.format(lane_type=self.LANE_TYPE) with open(wast_filename, 'w') as fp: - fp.write(self.get_all_cases()) \ No newline at end of file + fp.write(self.get_all_cases()) diff --git a/test/core/simd/meta/simd_bitwise.py b/test/core/simd/meta/simd_bitwise.py index 5e8eb33a9c..adba5ab6ab 100644 --- a/test/core/simd/meta/simd_bitwise.py +++ b/test/core/simd/meta/simd_bitwise.py @@ -5,7 +5,7 @@ """ from simd import SIMD -from test_assert import AssertReturn +from test_assert import AssertReturn, AssertInvalid class SimdBitWise(SIMD): @@ -13,6 +13,10 @@ class SimdBitWise(SIMD): Generate common tests """ + UNARY_OPS = ('not',) + BINARY_OPS = ('and', 'or', 'xor', 'andnot',) + TERNARY_OPS = ('bitselect',) + # Test case template CASE_TXT = """;; Test all the bitwise operators on major boundary values and all special values. @@ -182,6 +186,7 @@ def get_combination_case(self): lst_nested_case_func = [] lst_in_block_case_assert = [] lst_nested_case_assert = [] + lst_argument_empty_case = [] for ipr in lst_ipr: @@ -242,9 +247,59 @@ def get_combination_case(self): '{assert_in_block_cases}' \ '{assert_of_nested_cases}' \ '\n(assert_return (invoke "as-param"))\n'.format(in_block_cases=''.join(lst_in_block_case_func), - nested_cases=''.join(lst_nested_case_func), - assert_in_block_cases=''.join(lst_in_block_case_assert), - assert_of_nested_cases=''.join(lst_nested_case_assert)) + nested_cases=''.join(lst_nested_case_func), + assert_in_block_cases=''.join(lst_in_block_case_assert), + assert_of_nested_cases=''.join(lst_nested_case_assert)) + + def get_argument_empty_case(self): + """ + Generate argument empty cases + """ + + cases = [] + + param_1 = SIMD.v128_const('0', 'i32x4') + + cases.append('\n\n;; Test operation with empty argument\n') + + case_data = { + 'op': '', + 'extended_name': 'arg-empty', + 'param_type': '', + 'result_type': '(result v128)', + 'params': '', + } + + for op in self.UNARY_OPS: + case_data['op'] = 'v128.' + op + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + for op in self.BINARY_OPS: + case_data['op'] = 'v128.' + op + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = param_1 + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + for op in self.TERNARY_OPS: + case_data['op'] = 'v128.' + op + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = param_1 + ' ' + param_1 + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'two-args-empty' + case_data['params'] = param_1 + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + return '\n'.join(cases) + '\n' + def get_all_cases(self): """ @@ -254,7 +309,7 @@ def get_all_cases(self): case_data = {'normal_case': self.get_normal_case()} # Add tests for unkonow operators for i32x4 - return self.CASE_TXT.format(**case_data) + self.get_invalid_case() + self.get_combination_case() + return self.CASE_TXT.format(**case_data) + self.get_invalid_case() + self.get_combination_case() + self.get_argument_empty_case() def get_case_data(self): """ @@ -444,4 +499,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/meta/simd_compare.py b/test/core/simd/meta/simd_compare.py index 127d22849d..5849850820 100644 --- a/test/core/simd/meta/simd_compare.py +++ b/test/core/simd/meta/simd_compare.py @@ -9,7 +9,7 @@ import abc from simd import SIMD -from test_assert import AssertReturn +from test_assert import AssertReturn, AssertInvalid # Generate common comparison tests @@ -369,6 +369,33 @@ def get_normal_case(self): return '\n'.join(cases) + def argument_empty_test(self): + """Test cases with empty argument. + """ + cases = [] + + cases.append('\n;; Test operation with empty argument\n') + + case_data = { + 'op': '', + 'extended_name': 'arg-empty', + 'param_type': '', + 'result_type': '(result v128)', + 'params': '', + } + + for op in self.BINARY_OPS: + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = SIMD.v128_const('0', self.LANE_TYPE) + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + return '\n'.join(cases) + # Generate all test cases def get_all_cases(self): @@ -376,7 +403,7 @@ def get_all_cases(self): 'lane_type': self.LANE_TYPE} # Generate tests using the test template - return self.CASE_TXT.format(**case_data) + return self.CASE_TXT.format(**case_data) + self.argument_empty_test() # Generate test case file def gen_test_cases(self): diff --git a/test/core/simd/meta/simd_f32x4_cmp.py b/test/core/simd/meta/simd_f32x4_cmp.py index af7cd2a049..8b3b30b6b5 100644 --- a/test/core/simd/meta/simd_f32x4_cmp.py +++ b/test/core/simd/meta/simd_f32x4_cmp.py @@ -16,6 +16,9 @@ class Simdf32x4CmpCase(SimdCmpCase): LANE_TYPE = 'f32x4' + + BINARY_OPS = ['eq', 'ne', 'lt', 'le', 'gt', 'ge'] + # Test template, using this template to generate tests with variable test datas. CASE_TXT = """;; Test all the {lane_type} comparison operators on major boundary values and all special values. @@ -501,4 +504,4 @@ def gen_test_cases(): if __name__ == '__main__': f32x4 = Simdf32x4CmpCase() - f32x4.gen_test_cases() \ No newline at end of file + f32x4.gen_test_cases() diff --git a/test/core/simd/meta/simd_i16x8_cmp.py b/test/core/simd/meta/simd_i16x8_cmp.py index 836cd88c76..c575cdd0e0 100644 --- a/test/core/simd/meta/simd_i16x8_cmp.py +++ b/test/core/simd/meta/simd_i16x8_cmp.py @@ -14,6 +14,8 @@ class Simdi16x8CmpCase(SimdCmpCase): LANE_TYPE = 'i16x8' + BINARY_OPS = ['eq', 'ne', 'lt_s', 'lt_u', 'le_s', 'le_u', 'gt_s', 'gt_u', 'ge_s', 'ge_u'] + # Overloads base class method and sets test data for i16x8. def get_case_data(self): @@ -820,4 +822,4 @@ def gen_test_cases(): if __name__ == '__main__': i16x8 = Simdi16x8CmpCase() - i16x8.gen_test_cases() \ No newline at end of file + i16x8.gen_test_cases() diff --git a/test/core/simd/meta/simd_i32x4_cmp.py b/test/core/simd/meta/simd_i32x4_cmp.py index c6c70a9d92..41a093ee6d 100644 --- a/test/core/simd/meta/simd_i32x4_cmp.py +++ b/test/core/simd/meta/simd_i32x4_cmp.py @@ -14,6 +14,8 @@ class Simdi32x4CmpCase(SimdCmpCase): LANE_TYPE = 'i32x4' + BINARY_OPS = ['eq', 'ne', 'lt_s', 'lt_u', 'le_s', 'le_u', 'gt_s', 'gt_u', 'ge_s', 'ge_u'] + # Overload base class method and set test data for i32x4. def get_case_data(self): @@ -832,4 +834,4 @@ def gen_test_cases(): if __name__ == '__main__': i32x4 = Simdi32x4CmpCase() - i32x4.gen_test_cases() \ No newline at end of file + i32x4.gen_test_cases() diff --git a/test/core/simd/meta/simd_i8x16_cmp.py b/test/core/simd/meta/simd_i8x16_cmp.py index 035507d6bd..440d6087b8 100644 --- a/test/core/simd/meta/simd_i8x16_cmp.py +++ b/test/core/simd/meta/simd_i8x16_cmp.py @@ -15,6 +15,8 @@ class Simdi8x16CmpCase(SimdCmpCase): # set lane type LANE_TYPE = 'i8x16' + BINARY_OPS = ['eq', 'ne', 'lt_s', 'lt_u', 'le_s', 'le_u', 'gt_s', 'gt_u', 'ge_s', 'ge_u'] + # Overload base class method and set test data for i32x4. def get_case_data(self): diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index 3f7e3e4bf0..d2b5257902 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -5,7 +5,7 @@ """ from simd import SIMD -from test_assert import AssertReturn +from test_assert import AssertReturn, AssertInvalid from simd_lane_value import LaneValue from simd_integer_op import IntegerSimpleOp as IntOp @@ -319,31 +319,29 @@ def gen_test_case_combination(self): def gen_test_case_empty_argument(self): """generate empty argument test cases""" - assert_1st_empyt_template = '\n(assert_invalid' \ - '\n (module' \ - '\n (func ${lane_type}.{op}-1st-arg-empty (result v128)' \ - '\n ({lane_type}.{op} {param_1})' \ - '\n )' \ - '\n )' \ - '\n "type mismatch"' \ - '\n)' - assert_all_empty_template = '\n(assert_invalid' \ - '\n (module' \ - '\n (func ${lane_type}.{op}-all-args-empty (result v128)' \ - '\n ({lane_type}.{op})' \ - '\n )' \ - '\n )' \ - '\n "type mismatch"' \ - '\n)' + cases = [] - cases = '' + cases.append('\n\n;; Test operation with empty argument\n') + + case_data = { + 'op': '', + 'extended_name': 'arg-empty', + 'param_type': '', + 'result_type': '(result v128)', + 'params': '', + } - cases += '\n\n;; Test operation with empty argument\n' for op in self.BINARY_OPS: - cases += assert_1st_empyt_template.format(lane_type=self.LANE_TYPE, op=op, param_1=SIMD.v128_const('0', self.LANE_TYPE)) - cases += assert_all_empty_template.format(lane_type=self.LANE_TYPE, op=op) + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = SIMD.v128_const('0', self.LANE_TYPE) + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) - return cases + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + return '\n'.join(cases) @property def gen_funcs(self): @@ -397,4 +395,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py index c5aa27af39..14f406abe3 100644 --- a/test/core/simd/meta/simd_sat_arith.py +++ b/test/core/simd/meta/simd_sat_arith.py @@ -42,6 +42,31 @@ def get_malformed_cases(self): return '\n'.join(malformed_cases) + def argument_empty_cases(self): + """Test cases with empty argument. + """ + cases = [] + + case_data = { + 'op': '', + 'extended_name': 'arg-empty', + 'param_type': '', + 'result_type': '(result v128)', + 'params': '', + } + + for op in self.BINARY_OPS: + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['extended_name'] = '1st-arg-empty' + case_data['params'] = SIMD.v128_const('0', self.LANE_TYPE) + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + + return '\n'.join(cases) + def get_all_cases(self): case_data = {'lane_type': self.LANE_TYPE, 'normal_cases': self.get_normal_case(), @@ -448,4 +473,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/meta/test_assert.py b/test/core/simd/meta/test_assert.py index 8425b46ad4..186577f9a8 100644 --- a/test/core/simd/meta/test_assert.py +++ b/test/core/simd/meta/test_assert.py @@ -12,31 +12,30 @@ # Generate assert_return to test class AssertReturn: - instruction = '' - instruction_param = '' + op = '' + params = '' expected_result = '' - def __init__(self, instruction, instruction_param, expected_result): - super(AssertReturn, self).__init__() + def __init__(self, op, params, expected_result): # Convert to list if got str - if isinstance(instruction_param, str): - instruction_param = [instruction_param] + if isinstance(params, str): + params = [params] if isinstance(expected_result, str): expected_result = [expected_result] - self.instruction = instruction - self.instruction_param = instruction_param + self.op = op + self.params = params self.expected_result = expected_result def __str__(self): - assert_return = '(assert_return (invoke "{}"'.format(self.instruction) + assert_return = '(assert_return (invoke "{}"'.format(self.op) head_len = len(assert_return) # Add write space to make the test case easier to read params = [] - for param in self.instruction_param: + for param in self.params: white_space = ' ' if len(params) != 0: white_space = '\n ' + ' ' * head_len @@ -49,4 +48,33 @@ def __str__(self): white_space = '\n ' + ' ' * head_len results.append(white_space + result) - return '{assert_head}{params}){expected_result})'.format(assert_head=assert_return, params=''.join(params), expected_result=''.join(results)) \ No newline at end of file + return '{assert_head}{params}){expected_result})'.format(assert_head=assert_return, params=''.join(params), expected_result=''.join(results)) + + +# Generate assert_invalid to test +class AssertInvalid: + + @staticmethod + def get_arg_empty_test(op, extended_name, param_type, result_type, params): + + arg_empty_test = '(assert_invalid' \ + '\n (module' \ + '\n (func ${op}-{extended_name}{param_type}{result_type}' \ + '\n ({op}{params})' \ + '\n )' \ + '\n )' \ + '\n "type mismatch"' \ + '\n)' + + def str_with_space(input_str): + return (' ' if input_str else '') + input_str + + param_map = { + 'op': op, + 'extended_name': extended_name, + 'param_type': str_with_space(param_type), + 'result_type': str_with_space(result_type), + 'params': str_with_space(params), + } + + return arg_empty_test.format(**param_map) diff --git a/test/core/simd/simd_bit_shift.wast b/test/core/simd/simd_bit_shift.wast index a49b8032ec..98e155651e 100644 --- a/test/core/simd/simd_bit_shift.wast +++ b/test/core/simd/simd_bit_shift.wast @@ -1002,4 +1002,103 @@ (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.shr (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shl (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shr_s (v128.const i32x4 0 0 0 0)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shr_u (v128.const i32x4 0 0 0 0)))") "unknown operator") \ No newline at end of file +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.shr_u (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.shl-1st-arg-empty (result v128) + (i8x16.shl (i32.const 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.shl-last-arg-empty (result v128) + (i8x16.shl (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.shl-arg-empty (result v128) + (i8x16.shl) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.shr_u-1st-arg-empty (result v128) + (i16x8.shr_u (i32.const 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.shr_u-last-arg-empty (result v128) + (i16x8.shr_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.shr_u-arg-empty (result v128) + (i16x8.shr_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.shr_s-1st-arg-empty (result v128) + (i32x4.shr_s (i32.const 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.shr_s-last-arg-empty (result v128) + (i32x4.shr_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.shr_s-arg-empty (result v128) + (i32x4.shr_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.shl-1st-arg-empty (result v128) + (i64x2.shl (i32.const 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.shr_u-last-arg-empty (result v128) + (i64x2.shr_u (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.shr_s-arg-empty (result v128) + (i64x2.shr_s) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_bitwise.wast b/test/core/simd/simd_bitwise.wast index 821f46aa84..f646bf61d4 100644 --- a/test/core/simd/simd_bitwise.wast +++ b/test/core/simd/simd_bitwise.wast @@ -709,4 +709,104 @@ (assert_return (invoke "nested-v128.xor")) (assert_return (invoke "nested-v128.bitselect")) (assert_return (invoke "nested-v128.andnot")) -(assert_return (invoke "as-param")) \ No newline at end of file +(assert_return (invoke "as-param")) + + +;; Test operation with empty argument + +(assert_invalid + (module + (func $v128.not-arg-empty (result v128) + (v128.not) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.and-1st-arg-empty (result v128) + (v128.and (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.and-arg-empty (result v128) + (v128.and) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.or-1st-arg-empty (result v128) + (v128.or (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.or-arg-empty (result v128) + (v128.or) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.xor-1st-arg-empty (result v128) + (v128.xor (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.xor-arg-empty (result v128) + (v128.xor) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.andnot-1st-arg-empty (result v128) + (v128.andnot (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.andnot-arg-empty (result v128) + (v128.andnot) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.bitselect-1st-arg-empty (result v128) + (v128.bitselect (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.bitselect-two-args-empty (result v128) + (v128.bitselect (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.bitselect-arg-empty (result v128) + (v128.bitselect) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 7838520c59..27d3738bf2 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -961,4 +961,55 @@ (assert_malformed (module quote "(memory 1) (func (result i32) (f32x4.any_true (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result i32) (f32x4.all_true (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result i32) (f64x2.any_true (v128.const i32x4 0 0 0 0)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result i32) (f64x2.all_true (v128.const i32x4 0 0 0 0)))") "unknown operator") \ No newline at end of file +(assert_malformed (module quote "(memory 1) (func (result i32) (f64x2.all_true (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.any_true-arg-empty (result v128) + (i8x16.any_true) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.all_true-arg-empty (result v128) + (i8x16.all_true) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.any_true-arg-empty (result v128) + (i16x8.any_true) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.all_true-arg-empty (result v128) + (i16x8.all_true) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.any_true-arg-empty (result v128) + (i32x4.any_true) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.all_true-arg-empty (result v128) + (i32x4.all_true) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index df5bf2f834..b0c1423829 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -1657,4 +1657,4 @@ "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 1 (0x1.fffffffffffffp+1023) "\0b" ;; end ) -(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) \ No newline at end of file diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index b33f2ec6a2..5a06db7309 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -1487,4 +1487,199 @@ (v128.const i32x4 0 0 0xffff 0)) (assert_return (invoke "i32x4_high_widen_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) - (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) \ No newline at end of file + (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.trunc_sat_f32x4_s-arg-empty (result v128) + (i32x4.trunc_sat_f32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.trunc_sat_f32x4_u-arg-empty (result v128) + (i32x4.trunc_sat_f32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.trunc_sat_f64x2_s-arg-empty (result v128) + (i64x2.trunc_sat_f64x2_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.trunc_sat_f64x2_u-arg-empty (result v128) + (i64x2.trunc_sat_f64x2_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.convert_i32x4_s-arg-empty (result v128) + (f32x4.convert_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.convert_i32x4_u-arg-empty (result v128) + (f32x4.convert_i32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.convert_i64x2_s-arg-empty (result v128) + (f64x2.convert_i64x2_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.convert_i64x2_u-arg-empty (result v128) + (f64x2.convert_i64x2_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.narrow_i16x8_s-1st-arg-empty (result v128) + (i8x16.narrow_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.narrow_i16x8_s-arg-empty (result v128) + (i8x16.narrow_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.narrow_i16x8_u-1st-arg-empty (result v128) + (i8x16.narrow_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.narrow_i16x8_u-arg-empty (result v128) + (i8x16.narrow_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.narrow_i32x4_s-1st-arg-empty (result v128) + (i16x8.narrow_i32x4_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.narrow_i32x4_s-arg-empty (result v128) + (i16x8.narrow_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.narrow_i32x4_u-1st-arg-empty (result v128) + (i16x8.narrow_i32x4_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.narrow_i32x4_u-arg-empty (result v128) + (i16x8.narrow_i32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_high_i8x16_s-arg-empty (result v128) + (i16x8.widen_high_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_high_i8x16_u-arg-empty (result v128) + (i16x8.widen_high_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_low_i8x16_s-arg-empty (result v128) + (i16x8.widen_low_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_low_i8x16_u-arg-empty (result v128) + (i16x8.widen_low_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_high_i16x8_s-arg-empty (result v128) + (i32x4.widen_high_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_high_i16x8_u-arg-empty (result v128) + (i32x4.widen_high_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_low_i16x8_s-arg-empty (result v128) + (i32x4.widen_low_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_low_i16x8_u-arg-empty (result v128) + (i32x4.widen_low_i16x8_u) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index ce0745bc05..b911980128 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -2337,6 +2337,49 @@ (assert_invalid (module (func (result v128) (f32x4.min (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.max (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $f32x4.abs-arg-empty (result v128) + (f32x4.abs) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.min-1st-arg-empty (result v128) + (f32x4.min (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.min-arg-empty (result v128) + (f32x4.min) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.max-1st-arg-empty (result v128) + (f32x4.max (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.max-arg-empty (result v128) + (f32x4.max) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "max-min") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_f32x4_arith.wast b/test/core/simd/simd_f32x4_arith.wast index 69ed526e62..56f80f547b 100644 --- a/test/core/simd/simd_f32x4_arith.wast +++ b/test/core/simd/simd_f32x4_arith.wast @@ -5299,6 +5299,89 @@ (assert_invalid (module (func (result v128) (f32x4.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.div (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $f32x4.neg-arg-empty (result v128) + (f32x4.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.sqrt-arg-empty (result v128) + (f32x4.sqrt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.add-1st-arg-empty (result v128) + (f32x4.add (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.add-arg-empty (result v128) + (f32x4.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.sub-1st-arg-empty (result v128) + (f32x4.sub (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.sub-arg-empty (result v128) + (f32x4.sub) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.mul-1st-arg-empty (result v128) + (f32x4.mul (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.mul-arg-empty (result v128) + (f32x4.mul) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.div-1st-arg-empty (result v128) + (f32x4.div (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.div-arg-empty (result v128) + (f32x4.div) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_f32x4_cmp.wast b/test/core/simd/simd_f32x4_cmp.wast index 3d3145f936..9e9a8735bf 100644 --- a/test/core/simd/simd_f32x4_cmp.wast +++ b/test/core/simd/simd_f32x4_cmp.wast @@ -8066,3 +8066,102 @@ (assert_return (invoke "nested-gt")) (assert_return (invoke "nested-ge")) (assert_return (invoke "as-param")) + +;; Test operation with empty argument + +(assert_invalid + (module + (func $f32x4.eq-1st-arg-empty (result v128) + (f32x4.eq (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.eq-arg-empty (result v128) + (f32x4.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.ne-1st-arg-empty (result v128) + (f32x4.ne (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.ne-arg-empty (result v128) + (f32x4.ne) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.lt-1st-arg-empty (result v128) + (f32x4.lt (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.lt-arg-empty (result v128) + (f32x4.lt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.le-1st-arg-empty (result v128) + (f32x4.le (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.le-arg-empty (result v128) + (f32x4.le) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.gt-1st-arg-empty (result v128) + (f32x4.gt (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.gt-arg-empty (result v128) + (f32x4.gt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.ge-1st-arg-empty (result v128) + (f32x4.ge (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.ge-arg-empty (result v128) + (f32x4.ge) + ) + ) + "type mismatch" +) \ No newline at end of file diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index a8c3850c45..a237a16eb7 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -2388,6 +2388,49 @@ (assert_invalid (module (func (result v128) (f64x2.min (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f64x2.max (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $f64x2.abs-arg-empty (result v128) + (f64x2.abs) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.min-1st-arg-empty (result v128) + (f64x2.min (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.min-arg-empty (result v128) + (f64x2.min) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.max-1st-arg-empty (result v128) + (f64x2.max (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.max-arg-empty (result v128) + (f64x2.max) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "max-min") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_f64x2_arith.wast b/test/core/simd/simd_f64x2_arith.wast index b91c071adf..9f570f7e6c 100644 --- a/test/core/simd/simd_f64x2_arith.wast +++ b/test/core/simd/simd_f64x2_arith.wast @@ -5306,6 +5306,89 @@ (assert_invalid (module (func (result v128) (f64x2.mul (i64.const 0) (f64.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f64x2.div (i64.const 0) (f64.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $f64x2.neg-arg-empty (result v128) + (f64x2.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.sqrt-arg-empty (result v128) + (f64x2.sqrt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.add-1st-arg-empty (result v128) + (f64x2.add (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.add-arg-empty (result v128) + (f64x2.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.sub-1st-arg-empty (result v128) + (f64x2.sub (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.sub-arg-empty (result v128) + (f64x2.sub) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.mul-1st-arg-empty (result v128) + (f64x2.mul (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.mul-arg-empty (result v128) + (f64x2.mul) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.div-1st-arg-empty (result v128) + (f64x2.div (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.div-arg-empty (result v128) + (f64x2.div) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_f64x2_cmp.wast b/test/core/simd/simd_f64x2_cmp.wast index ea9b6bb44b..cab815ea56 100644 --- a/test/core/simd/simd_f64x2_cmp.wast +++ b/test/core/simd/simd_f64x2_cmp.wast @@ -7966,6 +7966,105 @@ (assert_invalid (module (func (result v128) (f64x2.gt (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (f64x2.ge (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $f64x2.eq-1st-arg-empty (result v128) + (f64x2.eq (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.eq-arg-empty (result v128) + (f64x2.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.ne-1st-arg-empty (result v128) + (f64x2.ne (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.ne-arg-empty (result v128) + (f64x2.ne) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.lt-1st-arg-empty (result v128) + (f64x2.lt (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.lt-arg-empty (result v128) + (f64x2.lt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.le-1st-arg-empty (result v128) + (f64x2.le (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.le-arg-empty (result v128) + (f64x2.le) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.gt-1st-arg-empty (result v128) + (f64x2.gt (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.gt-arg-empty (result v128) + (f64x2.gt) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.ge-1st-arg-empty (result v128) + (f64x2.ge (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.ge-arg-empty (result v128) + (f64x2.ge) + ) + ) + "type mismatch" +) + ;; combination (module (memory 1) (func (export "f64x2.eq-in-block") diff --git a/test/core/simd/simd_i16x8_arith.wast b/test/core/simd/simd_i16x8_arith.wast index 7841a28176..3dc4d5ed73 100644 --- a/test/core/simd/simd_i16x8_arith.wast +++ b/test/core/simd/simd_i16x8_arith.wast @@ -530,6 +530,65 @@ (assert_invalid (module (func (result v128) (i16x8.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.neg-arg-empty (result v128) + (i16x8.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.add-1st-arg-empty (result v128) + (i16x8.add (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.add-arg-empty (result v128) + (i16x8.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub-1st-arg-empty (result v128) + (i16x8.sub (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub-arg-empty (result v128) + (i16x8.sub) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.mul-1st-arg-empty (result v128) + (i16x8.mul (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.mul-arg-empty (result v128) + (i16x8.mul) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_i16x8_arith2.wast b/test/core/simd/simd_i16x8_arith2.wast index c19685c9ed..79fd67f899 100644 --- a/test/core/simd/simd_i16x8_arith2.wast +++ b/test/core/simd/simd_i16x8_arith2.wast @@ -254,7 +254,7 @@ ) (assert_invalid (module - (func $i16x8.min_s-all-args-empty (result v128) + (func $i16x8.min_s-arg-empty (result v128) (i16x8.min_s) ) ) @@ -270,7 +270,7 @@ ) (assert_invalid (module - (func $i16x8.min_u-all-args-empty (result v128) + (func $i16x8.min_u-arg-empty (result v128) (i16x8.min_u) ) ) @@ -286,7 +286,7 @@ ) (assert_invalid (module - (func $i16x8.max_s-all-args-empty (result v128) + (func $i16x8.max_s-arg-empty (result v128) (i16x8.max_s) ) ) @@ -302,7 +302,7 @@ ) (assert_invalid (module - (func $i16x8.max_u-all-args-empty (result v128) + (func $i16x8.max_u-arg-empty (result v128) (i16x8.max_u) ) ) diff --git a/test/core/simd/simd_i16x8_cmp.wast b/test/core/simd/simd_i16x8_cmp.wast index 9c3bbdc5ad..24068ce321 100644 --- a/test/core/simd/simd_i16x8_cmp.wast +++ b/test/core/simd/simd_i16x8_cmp.wast @@ -1735,3 +1735,167 @@ (assert_return (invoke "nested-gt_u")) (assert_return (invoke "nested-ge_s")) (assert_return (invoke "as-param")) + + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.eq-1st-arg-empty (result v128) + (i16x8.eq (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.eq-arg-empty (result v128) + (i16x8.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ne-1st-arg-empty (result v128) + (i16x8.ne (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ne-arg-empty (result v128) + (i16x8.ne) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.lt_s-1st-arg-empty (result v128) + (i16x8.lt_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.lt_s-arg-empty (result v128) + (i16x8.lt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.lt_u-1st-arg-empty (result v128) + (i16x8.lt_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.lt_u-arg-empty (result v128) + (i16x8.lt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.le_s-1st-arg-empty (result v128) + (i16x8.le_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.le_s-arg-empty (result v128) + (i16x8.le_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.le_u-1st-arg-empty (result v128) + (i16x8.le_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.le_u-arg-empty (result v128) + (i16x8.le_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.gt_s-1st-arg-empty (result v128) + (i16x8.gt_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.gt_s-arg-empty (result v128) + (i16x8.gt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.gt_u-1st-arg-empty (result v128) + (i16x8.gt_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.gt_u-arg-empty (result v128) + (i16x8.gt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ge_s-1st-arg-empty (result v128) + (i16x8.ge_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ge_s-arg-empty (result v128) + (i16x8.ge_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ge_u-1st-arg-empty (result v128) + (i16x8.ge_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.ge_u-arg-empty (result v128) + (i16x8.ge_u) + ) + ) + "type mismatch" +) \ No newline at end of file diff --git a/test/core/simd/simd_i16x8_sat_arith.wast b/test/core/simd/simd_i16x8_sat_arith.wast index 9348b99d17..44f859aa55 100644 --- a/test/core/simd/simd_i16x8_sat_arith.wast +++ b/test/core/simd/simd_i16x8_sat_arith.wast @@ -625,6 +625,73 @@ (assert_invalid (module (func (result v128) (i16x8.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.add_saturate_s-1st-arg-empty (result v128) + (i16x8.add_saturate_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.add_saturate_s-arg-empty (result v128) + (i16x8.add_saturate_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.add_saturate_u-1st-arg-empty (result v128) + (i16x8.add_saturate_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.add_saturate_u-arg-empty (result v128) + (i16x8.add_saturate_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub_saturate_s-1st-arg-empty (result v128) + (i16x8.sub_saturate_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub_saturate_s-arg-empty (result v128) + (i16x8.sub_saturate_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub_saturate_u-1st-arg-empty (result v128) + (i16x8.sub_saturate_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.sub_saturate_u-arg-empty (result v128) + (i16x8.sub_saturate_u) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_i32x4_arith.wast b/test/core/simd/simd_i32x4_arith.wast index faca8be4db..f0e09b8bf7 100644 --- a/test/core/simd/simd_i32x4_arith.wast +++ b/test/core/simd/simd_i32x4_arith.wast @@ -530,6 +530,65 @@ (assert_invalid (module (func (result v128) (i32x4.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i32x4.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.neg-arg-empty (result v128) + (i32x4.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.add-1st-arg-empty (result v128) + (i32x4.add (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.add-arg-empty (result v128) + (i32x4.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.sub-1st-arg-empty (result v128) + (i32x4.sub (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.sub-arg-empty (result v128) + (i32x4.sub) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.mul-1st-arg-empty (result v128) + (i32x4.mul (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.mul-arg-empty (result v128) + (i32x4.mul) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_i32x4_arith2.wast b/test/core/simd/simd_i32x4_arith2.wast index 16f2bfda42..809c1648b9 100644 --- a/test/core/simd/simd_i32x4_arith2.wast +++ b/test/core/simd/simd_i32x4_arith2.wast @@ -264,7 +264,7 @@ ) (assert_invalid (module - (func $i32x4.min_s-all-args-empty (result v128) + (func $i32x4.min_s-arg-empty (result v128) (i32x4.min_s) ) ) @@ -280,7 +280,7 @@ ) (assert_invalid (module - (func $i32x4.min_u-all-args-empty (result v128) + (func $i32x4.min_u-arg-empty (result v128) (i32x4.min_u) ) ) @@ -296,7 +296,7 @@ ) (assert_invalid (module - (func $i32x4.max_s-all-args-empty (result v128) + (func $i32x4.max_s-arg-empty (result v128) (i32x4.max_s) ) ) @@ -312,7 +312,7 @@ ) (assert_invalid (module - (func $i32x4.max_u-all-args-empty (result v128) + (func $i32x4.max_u-arg-empty (result v128) (i32x4.max_u) ) ) diff --git a/test/core/simd/simd_i32x4_cmp.wast b/test/core/simd/simd_i32x4_cmp.wast index d541c18a46..fca45ab96b 100644 --- a/test/core/simd/simd_i32x4_cmp.wast +++ b/test/core/simd/simd_i32x4_cmp.wast @@ -1743,6 +1743,168 @@ (assert_return (invoke "as-param")) +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.eq-1st-arg-empty (result v128) + (i32x4.eq (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.eq-arg-empty (result v128) + (i32x4.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ne-1st-arg-empty (result v128) + (i32x4.ne (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ne-arg-empty (result v128) + (i32x4.ne) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.lt_s-1st-arg-empty (result v128) + (i32x4.lt_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.lt_s-arg-empty (result v128) + (i32x4.lt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.lt_u-1st-arg-empty (result v128) + (i32x4.lt_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.lt_u-arg-empty (result v128) + (i32x4.lt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.le_s-1st-arg-empty (result v128) + (i32x4.le_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.le_s-arg-empty (result v128) + (i32x4.le_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.le_u-1st-arg-empty (result v128) + (i32x4.le_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.le_u-arg-empty (result v128) + (i32x4.le_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.gt_s-1st-arg-empty (result v128) + (i32x4.gt_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.gt_s-arg-empty (result v128) + (i32x4.gt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.gt_u-1st-arg-empty (result v128) + (i32x4.gt_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.gt_u-arg-empty (result v128) + (i32x4.gt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ge_s-1st-arg-empty (result v128) + (i32x4.ge_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ge_s-arg-empty (result v128) + (i32x4.ge_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ge_u-1st-arg-empty (result v128) + (i32x4.ge_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.ge_u-arg-empty (result v128) + (i32x4.ge_u) + ) + ) + "type mismatch" +) ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.eq (local.get $x) (local.get $y)))") "unknown operator") @@ -1755,3 +1917,4 @@ (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.gt_u (local.get $x) (local.get $y)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_s (local.get $x) (local.get $y)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (param $x v128) (param $y v128) (result v128) (i4x32.ge_u (local.get $x) (local.get $y)))") "unknown operator") + diff --git a/test/core/simd/simd_i64x2_arith.wast b/test/core/simd/simd_i64x2_arith.wast index 72e763477e..00963a0d03 100644 --- a/test/core/simd/simd_i64x2_arith.wast +++ b/test/core/simd/simd_i64x2_arith.wast @@ -548,6 +548,65 @@ (assert_invalid (module (func (result v128) (i64x2.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i64x2.mul (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i64x2.neg-arg-empty (result v128) + (i64x2.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.add-1st-arg-empty (result v128) + (i64x2.add (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.add-arg-empty (result v128) + (i64x2.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.sub-1st-arg-empty (result v128) + (i64x2.sub (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.sub-arg-empty (result v128) + (i64x2.sub) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.mul-1st-arg-empty (result v128) + (i64x2.mul (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.mul-arg-empty (result v128) + (i64x2.mul) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_i8x16_arith.wast b/test/core/simd/simd_i8x16_arith.wast index 1042233f18..1e56b4c00f 100644 --- a/test/core/simd/simd_i8x16_arith.wast +++ b/test/core/simd/simd_i8x16_arith.wast @@ -355,6 +355,49 @@ (assert_invalid (module (func (result v128) (i8x16.add (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.sub (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.neg-arg-empty (result v128) + (i8x16.neg) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.add-1st-arg-empty (result v128) + (i8x16.add (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.add-arg-empty (result v128) + (i8x16.add) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub-1st-arg-empty (result v128) + (i8x16.sub (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub-arg-empty (result v128) + (i8x16.sub) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "add-sub") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_i8x16_arith2.wast b/test/core/simd/simd_i8x16_arith2.wast index 0573c1f20b..ac26d347c3 100644 --- a/test/core/simd/simd_i8x16_arith2.wast +++ b/test/core/simd/simd_i8x16_arith2.wast @@ -254,7 +254,7 @@ ) (assert_invalid (module - (func $i8x16.min_s-all-args-empty (result v128) + (func $i8x16.min_s-arg-empty (result v128) (i8x16.min_s) ) ) @@ -270,7 +270,7 @@ ) (assert_invalid (module - (func $i8x16.min_u-all-args-empty (result v128) + (func $i8x16.min_u-arg-empty (result v128) (i8x16.min_u) ) ) @@ -286,7 +286,7 @@ ) (assert_invalid (module - (func $i8x16.max_s-all-args-empty (result v128) + (func $i8x16.max_s-arg-empty (result v128) (i8x16.max_s) ) ) @@ -302,7 +302,7 @@ ) (assert_invalid (module - (func $i8x16.max_u-all-args-empty (result v128) + (func $i8x16.max_u-arg-empty (result v128) (i8x16.max_u) ) ) diff --git a/test/core/simd/simd_i8x16_cmp.wast b/test/core/simd/simd_i8x16_cmp.wast index 64cf871faa..8683accea4 100644 --- a/test/core/simd/simd_i8x16_cmp.wast +++ b/test/core/simd/simd_i8x16_cmp.wast @@ -1682,3 +1682,166 @@ (assert_return (invoke "nested-ge_s")) (assert_return (invoke "as-param")) + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.eq-1st-arg-empty (result v128) + (i8x16.eq (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.eq-arg-empty (result v128) + (i8x16.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ne-1st-arg-empty (result v128) + (i8x16.ne (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ne-arg-empty (result v128) + (i8x16.ne) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.lt_s-1st-arg-empty (result v128) + (i8x16.lt_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.lt_s-arg-empty (result v128) + (i8x16.lt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.lt_u-1st-arg-empty (result v128) + (i8x16.lt_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.lt_u-arg-empty (result v128) + (i8x16.lt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.le_s-1st-arg-empty (result v128) + (i8x16.le_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.le_s-arg-empty (result v128) + (i8x16.le_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.le_u-1st-arg-empty (result v128) + (i8x16.le_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.le_u-arg-empty (result v128) + (i8x16.le_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.gt_s-1st-arg-empty (result v128) + (i8x16.gt_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.gt_s-arg-empty (result v128) + (i8x16.gt_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.gt_u-1st-arg-empty (result v128) + (i8x16.gt_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.gt_u-arg-empty (result v128) + (i8x16.gt_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ge_s-1st-arg-empty (result v128) + (i8x16.ge_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ge_s-arg-empty (result v128) + (i8x16.ge_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ge_u-1st-arg-empty (result v128) + (i8x16.ge_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.ge_u-arg-empty (result v128) + (i8x16.ge_u) + ) + ) + "type mismatch" +) \ No newline at end of file diff --git a/test/core/simd/simd_i8x16_sat_arith.wast b/test/core/simd/simd_i8x16_sat_arith.wast index 2ea780922e..6a178e55c9 100644 --- a/test/core/simd/simd_i8x16_sat_arith.wast +++ b/test/core/simd/simd_i8x16_sat_arith.wast @@ -601,6 +601,73 @@ (assert_invalid (module (func (result v128) (i8x16.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.add_saturate_s-1st-arg-empty (result v128) + (i8x16.add_saturate_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.add_saturate_s-arg-empty (result v128) + (i8x16.add_saturate_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.add_saturate_u-1st-arg-empty (result v128) + (i8x16.add_saturate_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.add_saturate_u-arg-empty (result v128) + (i8x16.add_saturate_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub_saturate_s-1st-arg-empty (result v128) + (i8x16.sub_saturate_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub_saturate_s-arg-empty (result v128) + (i8x16.sub_saturate_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub_saturate_u-1st-arg-empty (result v128) + (i8x16.sub_saturate_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.sub_saturate_u-arg-empty (result v128) + (i8x16.sub_saturate_u) + ) + ) + "type mismatch" +) + ;; combination (module (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 08d647440e..96b7812694 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -846,3 +846,150 @@ (assert_return (invoke "as-local_set-value-1" (v128.const i64x2 -1 -1)) (i64.const -1)) (assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.extract_lane_s-1st-arg-empty (result i32) + (i8x16.extract_lane_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.extract_lane_s-2nd-arg-empty (result i32) + (i8x16.extract_lane_s 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.extract_lane_s-arg-empty (result i32) + (i8x16.extract_lane_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extract_lane_u-1st-arg-empty (result i32) + (i16x8.extract_lane_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extract_lane_u-2nd-arg-empty (result i32) + (i16x8.extract_lane_u 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extract_lane_u-arg-empty (result i32) + (i16x8.extract_lane_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extract_lane-1st-arg-empty (result i32) + (i32x4.extract_lane (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extract_lane-2nd-arg-empty (result i32) + (i32x4.extract_lane 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extract_lane-arg-empty (result i32) + (i32x4.extract_lane) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extract_lane-1st-arg-empty (result i64) + (i64x2.extract_lane (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extract_lane-2nd-arg-empty (result i64) + (i64x2.extract_lane 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extract_lane-arg-empty (result i64) + (i64x2.extract_lane) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.extract_lane-1st-arg-empty (result f32) + (f32x4.extract_lane (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.extract_lane-2nd-arg-empty (result f32) + (f32x4.extract_lane 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.extract_lane-arg-empty (result f32) + (f32x4.extract_lane) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.extract_lane-1st-arg-empty (result f64) + (f64x2.extract_lane (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.extract_lane-2nd-arg-empty (result f64) + (f64x2.extract_lane 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.extract_lane-arg-empty (result f64) + (f64x2.extract_lane) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_load.wast b/test/core/simd/simd_load.wast index ad85a7c624..1cc2045f49 100644 --- a/test/core/simd/simd_load.wast +++ b/test/core/simd/simd_load.wast @@ -181,4 +181,32 @@ (assert_invalid (module (memory 1) (func (drop (v128.load (local.get 2))))) "unknown local 2" -) \ No newline at end of file +) + + +;; Test operation with empty argument + +(assert_invalid + (module + (func $v128.const-arg-empty (result v128) + (v128.const) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.const-1st-arg-empty (result v128) + (v128.const 0 0 0 0) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v128.const-2nd-arg-empty (result v128) + (v128.const i32x4) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_load_extend.wast b/test/core/simd/simd_load_extend.wast index 483fe9de74..d6a1ac122d 100644 --- a/test/core/simd/simd_load_extend.wast +++ b/test/core/simd/simd_load_extend.wast @@ -220,7 +220,59 @@ (assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_s (v128.const i32x4 0 0 0 0)))) "type mismatch") (assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_u (v128.const i32x4 0 0 0 0)))) "type mismatch") -;; unknown operator +;; Test operation with empty argument + +(assert_invalid + (module (memory 0) + (func $i16x8.load8x8_s-arg-empty (result v128) + (i16x8.load8x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $i16x8.load8x8_u-arg-empty (result v128) + (i16x8.load8x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $i32x4.load16x4_s-arg-empty (result v128) + (i32x4.load16x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $i32x4.load16x4_u-arg-empty (result v128) + (i32x4.load16x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $i64x2.load32x2_s-arg-empty (result v128) + (i64x2.load32x2_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $i64x2.load32x2_u-arg-empty (result v128) + (i64x2.load32x2_u) + ) + ) + "type mismatch" +) + +;; Unknown operator + (assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_s (i32.const 0))))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_u (i32.const 0))))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (drop (i32x4.load32x2_s (i32.const 0))))") "unknown operator") @@ -304,4 +356,4 @@ (assert_return (invoke "i32x4.load16x4_s-extract_lane_s-operand") (i32.const 14)) (assert_return (invoke "i32x4.load16x4_u-extract_lane_s-operand") (i32.const 15)) (assert_return (invoke "i64x2.load32x2_s-extract_lane_s-operand") (i32.const -128)) -(assert_return (invoke "i64x2.load32x2_u-extract_lane_s-operand") (i32.const -127)) \ No newline at end of file +(assert_return (invoke "i64x2.load32x2_u-extract_lane_s-operand") (i32.const -127)) diff --git a/test/core/simd/simd_load_splat.wast b/test/core/simd/simd_load_splat.wast index a9faf21614..a2d804273c 100644 --- a/test/core/simd/simd_load_splat.wast +++ b/test/core/simd/simd_load_splat.wast @@ -217,4 +217,40 @@ (assert_malformed (module quote "(memory 1) (func (drop (i8x16.load_splat (i32.const 0))))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (drop (i16x8.load_splat (i32.const 0))))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (drop (i32x4.load_splat (i32.const 0))))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load_splat (i32.const 0))))") "unknown operator") \ No newline at end of file +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load_splat (i32.const 0))))") "unknown operator") + + +;; Test operation with empty argument + +(assert_invalid + (module (memory 0) + (func $v8x16.load_splat-arg-empty (result v128) + (v8x16.load_splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v16x8.load_splat-arg-empty (result v128) + (v16x8.load_splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v32x4.load_splat-arg-empty (result v128) + (v32x4.load_splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v64x2.load_splat-arg-empty (result v128) + (v64x2.load_splat) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast index 721bbca062..94004b7b4d 100644 --- a/test/core/simd/simd_splat.wast +++ b/test/core/simd/simd_splat.wast @@ -229,7 +229,7 @@ (i8x16.sub_saturate_u (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) (func (export "as-i16x8_sub_saturate_u-operands") (param i32 i32) (result v128) (i16x8.sub_saturate_u (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) - + ;; Bit shifts (func (export "as-i8x16_shr_s-operand") (param i32 i32) (result v128) (i8x16.shr_s (i8x16.splat (local.get 0)) (local.get 1))) @@ -375,4 +375,56 @@ (assert_return (invoke "as-br-value2" (i64.const 0xABCD)) (v128.const i64x2 0xABCD 0xABCD)) (assert_return (invoke "as-return-value2" (i64.const 0xABCD)) (v128.const i64x2 0xABCD 0xABCD)) (assert_return (invoke "as-local_set-value2" (i64.const 0x10000)) (v128.const i64x2 0x10000 0x10000)) -(assert_return (invoke "as-global_set-value2" (f64.const 1.0)) (v128.const f64x2 1.0 1.0)) \ No newline at end of file +(assert_return (invoke "as-global_set-value2" (f64.const 1.0)) (v128.const f64x2 1.0 1.0)) + + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i8x16.splat-arg-empty (result v128) + (i8x16.splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.splat-arg-empty (result v128) + (i16x8.splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.splat-arg-empty (result v128) + (i32x4.splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.splat-arg-empty (result v128) + (f32x4.splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.splat-arg-empty (result v128) + (i64x2.splat) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.splat-arg-empty (result v128) + (f64x2.splat) + ) + ) + "type mismatch" +) diff --git a/test/core/simd/simd_store.wast b/test/core/simd/simd_store.wast index 74931e51c0..50349c41bd 100644 --- a/test/core/simd/simd_store.wast +++ b/test/core/simd/simd_store.wast @@ -135,4 +135,32 @@ (assert_invalid (module (memory 1) (func (result v128) (v128.store (i32.const 0) (v128.const i32x4 0 0 0 0)))) "type mismatch" -) \ No newline at end of file +) + + +;; Test operation with empty argument + +(assert_invalid + (module (memory 0) + (func $v128.store-1st-arg-empty + (v128.store (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v128.store-2nd-arg-empty + (v128.store (i32.const 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v128.store-arg-empty + (v128.store) + ) + ) + "type mismatch" +) From 74407190d59c60b6f6721290818236bba6e6aaf4 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 8 Jan 2020 14:25:09 -0800 Subject: [PATCH 119/378] Change to_bits to return string --- interpreter/binary/encode.ml | 3 ++- interpreter/exec/simd.ml | 10 ++++++---- interpreter/exec/v128.ml | 2 ++ 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index d6b2ffb5fe..72ec4259e0 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -62,6 +62,7 @@ let encode m = let vs32 i = vs64 (Int64.of_int32 i) let f32 x = u32 (F32.to_bits x) let f64 x = u64 (F64.to_bits x) + let v128 v = String.iter (put s) (V128.to_bits v) let len i = if Int32.to_int (Int32.of_int i) <> i then @@ -225,7 +226,7 @@ let encode m = | Const {it = I64 c; _} -> op 0x42; vs64 c | Const {it = F32 c; _} -> op 0x43; f32 c | Const {it = F64 c; _} -> op 0x44; f64 c - | Const {it = V128 c; _} -> simd_op 0x02; Bytes.iter (put s) (V128.to_bits c) + | Const {it = V128 c; _} -> simd_op 0x02; v128 c | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 7201aba01c..b61b44794c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -20,6 +20,8 @@ sig val to_string : t -> string val bytewidth : int val of_strings : shape -> string list -> t + val of_bits : string -> t + val to_bits : t -> string end module type S = @@ -33,14 +35,14 @@ sig val of_strings : shape -> string list -> t end -module Make (Rep : RepType) : S with type bits = Rep.t = +module Make (Rep : RepType) : S with type bits = string = struct type t = Rep.t - type bits = Rep.t + type bits = string let default = Rep.make Rep.bytewidth (chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) - let to_bits x = x - let of_bits x = x + let of_bits = Rep.of_bits + let to_bits = Rep.to_bits let of_strings = Rep.of_strings end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index a01341f06c..22a4bc1212 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -2,6 +2,8 @@ include Simd.Make (struct include Bytes let bytewidth = 16 + let of_bits = Bytes.of_string + let to_bits = Bytes.to_string let of_strings shape ss = if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); From 7efcf94b7539ec08bcbf16e06a21a215afe5a881 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 10 Jan 2020 02:59:58 +0800 Subject: [PATCH 120/378] [test] Add spec tests for integer rounding average ops (#171) Optimize unknown operator test method to make it as a common method BTW Sync tests from https://github.com/WAVM/WAVM/pull/250 --- test/core/simd/meta/simd_f32x4.py | 2 +- test/core/simd/meta/simd_int_arith2.py | 43 ++++--- test/core/simd/meta/simd_integer_op.py | 10 ++ test/core/simd/meta/test_assert.py | 11 ++ test/core/simd/simd_f32x4.wast | 3 + test/core/simd/simd_i16x8_arith2.wast | 160 +++++++++++++++++++++--- test/core/simd/simd_i32x4_arith2.wast | 4 + test/core/simd/simd_i8x16_arith2.wast | 164 ++++++++++++++++++++++--- 8 files changed, 340 insertions(+), 57 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 5340d0db09..b2118e7a79 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -350,7 +350,7 @@ def get_unknown_operator_case(self, cases): unknown_op_cases = ['\n\n;; Unknown operators\n'] cases.extend(unknown_op_cases) - for lane_type in ['i8x16', 'i16x8', 'i32x4']: + for lane_type in ['i8x16', 'i16x8', 'i32x4', 'i64x2']: for op in self.UNARY_OPS: cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=self.v128_const('i32x4', '0'))) diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index d2b5257902..e90d78cbe1 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -5,7 +5,7 @@ """ from simd import SIMD -from test_assert import AssertReturn, AssertInvalid +from test_assert import AssertReturn, AssertInvalid, AssertMalformed from simd_lane_value import LaneValue from simd_integer_op import IntegerSimpleOp as IntOp @@ -17,7 +17,7 @@ class SimdLaneWiseInteger: BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u',) - class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u] operations.""" + class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u, avgr_u] operations.""" def __init__(self): @@ -246,21 +246,15 @@ def gen(case_data): @property def gen_test_case_unknown_operators(self): """generate unknown operators test cases""" - - if self.LANE_TYPE != 'i32x4': - return '' - - cases = '\n\n;; Unknown operators' - lane_types = ('f32x4', 'i64x2',) - assert_template = '(assert_malformed (module quote "(memory 1) (func (result v128) ({lane_type}.{op} {param_1} {param_2}))") "unknown operator")' - for lane_type in lane_types: - for op in self.BINARY_OPS: - cases += '\n' + assert_template.format(lane_type=lane_type, - op=op, - param_1=SIMD.v128_const('0', self.LANE_TYPE), - param_2=SIMD.v128_const('1', self.LANE_TYPE)) - - return cases + cases = ['\n\n;; Unknown operators'] + + for op in self.UNKNOWN_OPS: + cases.append(AssertMalformed.get_unknown_op_test( + op, 'v128', + SIMD.v128_const('0', self.LANE_TYPE), + SIMD.v128_const('1', self.LANE_TYPE) + )) + return '\n'.join(cases) @property def gen_test_case_type_check(self): @@ -373,15 +367,28 @@ def gen_test_cases(self): class Simdi32x4Case(SimdLaneWiseInteger): LANE_TYPE = 'i32x4' + class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u] operations.""" + + UNKNOWN_OPS = ('f32x4.min_s', 'f32x4.min_u', 'f32x4.max_s', 'f32x4.max_u', + 'i64x2.min_s', 'i64x2.min_u', 'i64x2.max_s', 'i64x2.max_u', + 'f64x2.min_s', 'f64x2.min_u', 'f64x2.max_s', 'f64x2.max_u') class Simdi16x8Case(SimdLaneWiseInteger): LANE_TYPE = 'i16x8' + BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') + UNKNOWN_OPS = ('i16x8.avgr', 'i16x8.avgr_s') + class Simdi8x16Case(SimdLaneWiseInteger): LANE_TYPE = 'i8x16' + BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') + UNKNOWN_OPS = ('i32x4.avgr_u', 'f32x4.avgr_u', + 'i64x2.avgr_u', 'f64x2.avgr_u', + 'i8x16.avgr', 'i8x16.avgr_s') + def gen_test_cases(): simd_i32x4_case = Simdi32x4Case() @@ -395,4 +402,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() + gen_test_cases() \ No newline at end of file diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index b3d14062c0..4e232ddf5d 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -4,6 +4,7 @@ from simd_lane_value import LaneValue + class IntegerSimpleOp: """Common integer simple ops: min_s, min_u, max_s, max_u @@ -47,6 +48,15 @@ def binary_op(op: str, p1: str, p2: str, lane_width: int) -> str: else: return p1 if i1 >= i2 else p2 + elif op == 'avgr_u': + i1 = IntegerSimpleOp.get_valid_value(v1, lane_width, signed=False) + i2 = IntegerSimpleOp.get_valid_value(v2, lane_width, signed=False) + result = (i1 + i2 + 1) // 2 + if base1 == 16 or base2 == 16: + return hex(result) + else: + return str(result) + else: raise Exception('Unknown binary operation') diff --git a/test/core/simd/meta/test_assert.py b/test/core/simd/meta/test_assert.py index 186577f9a8..1147ce07d2 100644 --- a/test/core/simd/meta/test_assert.py +++ b/test/core/simd/meta/test_assert.py @@ -78,3 +78,14 @@ def str_with_space(input_str): } return arg_empty_test.format(**param_map) + + +class AssertMalformed: + """Generate an assert_malformed test""" + + @staticmethod + def get_unknown_op_test(op, result_type, *params): + malformed_template = '(assert_malformed (module quote "(memory 1) (func (result {result_type}) ({operator} {param}))") "unknown operator")' + return malformed_template.format( + operator=op, result_type=result_type, param=' '.join(params) + ) \ No newline at end of file diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index b911980128..20ee558daf 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -2331,6 +2331,9 @@ (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") ;; type check (assert_invalid (module (func (result v128) (f32x4.abs (i32.const 0)))) "type mismatch") diff --git a/test/core/simd/simd_i16x8_arith2.wast b/test/core/simd/simd_i16x8_arith2.wast index 79fd67f899..69cb08955a 100644 --- a/test/core/simd/simd_i16x8_arith2.wast +++ b/test/core/simd/simd_i16x8_arith2.wast @@ -1,10 +1,11 @@ -;; Tests for i16x8 [min_s, min_u, max_s, max_u] operations. +;; Tests for i16x8 [min_s, min_u, max_s, max_u, avgr_u] operations. (module (func (export "i16x8.min_s") (param v128 v128) (result v128) (i16x8.min_s (local.get 0) (local.get 1))) (func (export "i16x8.min_u") (param v128 v128) (result v128) (i16x8.min_u (local.get 0) (local.get 1))) (func (export "i16x8.max_s") (param v128 v128) (result v128) (i16x8.max_s (local.get 0) (local.get 1))) (func (export "i16x8.max_u") (param v128 v128) (result v128) (i16x8.max_u (local.get 0) (local.get 1))) + (func (export "i16x8.avgr_u") (param v128 v128) (result v128) (i16x8.avgr_u (local.get 0) (local.get 1))) (func (export "i16x8.min_s_with_const_0") (result v128) (i16x8.min_s (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) (func (export "i16x8.min_s_with_const_1") (result v128) (i16x8.min_s (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) (func (export "i16x8.min_u_with_const_2") (result v128) (i16x8.min_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) @@ -13,14 +14,18 @@ (func (export "i16x8.max_s_with_const_5") (result v128) (i16x8.max_s (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) (func (export "i16x8.max_u_with_const_6") (result v128) (i16x8.max_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) (func (export "i16x8.max_u_with_const_7") (result v128) (i16x8.max_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) - (func (export "i16x8.min_s_with_const_8") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.min_s_with_const_9") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.min_u_with_const_10") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.min_u_with_const_11") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.max_s_with_const_12") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.max_s_with_const_13") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.max_u_with_const_14") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.max_u_with_const_15") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.avgr_u_with_const_8") (result v128) (i16x8.avgr_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) + (func (export "i16x8.avgr_u_with_const_9") (result v128) (i16x8.avgr_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) + (func (export "i16x8.min_s_with_const_10") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_s_with_const_11") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.min_u_with_const_12") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_u_with_const_13") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_s_with_const_14") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_s_with_const_15") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_u_with_const_16") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_u_with_const_17") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.avgr_u_with_const_18") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.avgr_u_with_const_19") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) ) (assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -155,6 +160,39 @@ (assert_return (invoke "i16x8.max_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1) + (v128.const i16x8 0 0 -1 -1 0 0 -1 -1)) + (v128.const i16x8 0 0 32768 32768 32768 32768 65535 65535)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + (v128.const i16x8 32832 32832 32832 32832 32832 32832 32832 32832)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 123 123 123 123 123 123 123 123) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) ;; Const vs const (assert_return (invoke "i16x8.min_s_with_const_0") (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) @@ -165,24 +203,30 @@ (assert_return (invoke "i16x8.max_s_with_const_5") (v128.const i16x8 3 3 2 2 2 2 3 3)) (assert_return (invoke "i16x8.max_u_with_const_6") (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) (assert_return (invoke "i16x8.max_u_with_const_7") (v128.const i16x8 3 3 2 2 2 2 3 3)) +(assert_return (invoke "i16x8.avgr_u_with_const_8") (v128.const i16x8 49152 49152 24576 24576 24576 24576 49152 49152)) +(assert_return (invoke "i16x8.avgr_u_with_const_9") (v128.const i16x8 2 2 2 2 2 2 2 2)) ;; Param vs const -(assert_return (invoke "i16x8.min_s_with_const_8" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) - (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) -(assert_return (invoke "i16x8.min_s_with_const_9" (v128.const i16x8 3 3 2 2 1 1 0 0)) - (v128.const i16x8 0 0 1 1 1 1 0 0)) -(assert_return (invoke "i16x8.min_u_with_const_10" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.min_s_with_const_10" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) -(assert_return (invoke "i16x8.min_u_with_const_11" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.min_s_with_const_11" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 0 0 1 1 1 1 0 0)) -(assert_return (invoke "i16x8.max_s_with_const_12" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.min_u_with_const_12" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) +(assert_return (invoke "i16x8.min_u_with_const_13" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 0 0 1 1 1 1 0 0)) +(assert_return (invoke "i16x8.max_s_with_const_14" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) -(assert_return (invoke "i16x8.max_s_with_const_13" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.max_s_with_const_15" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 3 3 2 2 2 2 3 3)) -(assert_return (invoke "i16x8.max_u_with_const_14" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.max_u_with_const_16" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) -(assert_return (invoke "i16x8.max_u_with_const_15" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.max_u_with_const_17" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 3 3 2 2 2 2 3 3)) +(assert_return (invoke "i16x8.avgr_u_with_const_18" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 49152 49152 24576 24576 24576 24576 49152 49152)) +(assert_return (invoke "i16x8.avgr_u_with_const_19" (v128.const i16x8 3 3 2 2 1 1 0 0)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) ;; Test different lanes go through different if-then clauses (assert_return (invoke "i16x8.min_s" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) @@ -209,6 +253,12 @@ (assert_return (invoke "i16x8.max_u" (v128.const i16x8 0 0 1 1 2 2 128 128) (v128.const i16x8 0 0 2 2 1 1 128 128)) (v128.const i16x8 0 0 2 2 2 2 128 128)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) + (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) + (v128.const i16x8 49152 49152 24576 24576 24576 24576 49152 49152)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 1 1 2 2 128 128) + (v128.const i16x8 0 0 2 2 1 1 128 128)) + (v128.const i16x8 0 0 2 2 2 2 128 128)) ;; Test opposite signs of zero (assert_return (invoke "i16x8.min_s" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) @@ -235,12 +285,23 @@ (assert_return (invoke "i16x8.max_u" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; Unknown operators +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr_s (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") ;; Type check (assert_invalid (module (func (result v128) (i16x8.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.avgr_u (i32.const 0) (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -308,27 +369,56 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i16x8.avgr_u-1st-arg-empty (result v128) + (i16x8.avgr_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.avgr_u-arg-empty (result v128) + (i16x8.avgr_u) + ) + ) + "type mismatch" +) ;; Combination (module + (func (export "i16x8.min_s-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) ) +(assert_return (invoke "i16x8.min_s-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) (assert_return (invoke "i16x8.min_s-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -345,6 +435,10 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) (assert_return (invoke "i16x8.min_u-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -361,6 +455,10 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.max_s-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) (assert_return (invoke "i16x8.max_s-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -377,6 +475,10 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) (assert_return (invoke "i16x8.max_u-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -393,3 +495,23 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.avgr_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.avgr_u-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.avgr_u-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.avgr_u-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.avgr_u-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 2 2 2 2 2 2 2 2)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) diff --git a/test/core/simd/simd_i32x4_arith2.wast b/test/core/simd/simd_i32x4_arith2.wast index 809c1648b9..1e14c3a772 100644 --- a/test/core/simd/simd_i32x4_arith2.wast +++ b/test/core/simd/simd_i32x4_arith2.wast @@ -245,6 +245,10 @@ (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.min_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f64x2.min_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f64x2.min_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f64x2.max_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f64x2.max_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") ;; Type check (assert_invalid (module (func (result v128) (i32x4.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") diff --git a/test/core/simd/simd_i8x16_arith2.wast b/test/core/simd/simd_i8x16_arith2.wast index ac26d347c3..290b0a7c1f 100644 --- a/test/core/simd/simd_i8x16_arith2.wast +++ b/test/core/simd/simd_i8x16_arith2.wast @@ -1,10 +1,11 @@ -;; Tests for i8x16 [min_s, min_u, max_s, max_u] operations. +;; Tests for i8x16 [min_s, min_u, max_s, max_u, avgr_u] operations. (module (func (export "i8x16.min_s") (param v128 v128) (result v128) (i8x16.min_s (local.get 0) (local.get 1))) (func (export "i8x16.min_u") (param v128 v128) (result v128) (i8x16.min_u (local.get 0) (local.get 1))) (func (export "i8x16.max_s") (param v128 v128) (result v128) (i8x16.max_s (local.get 0) (local.get 1))) (func (export "i8x16.max_u") (param v128 v128) (result v128) (i8x16.max_u (local.get 0) (local.get 1))) + (func (export "i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.avgr_u (local.get 0) (local.get 1))) (func (export "i8x16.min_s_with_const_0") (result v128) (i8x16.min_s (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.min_s_with_const_1") (result v128) (i8x16.min_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.min_u_with_const_2") (result v128) (i8x16.min_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) @@ -13,14 +14,18 @@ (func (export "i8x16.max_s_with_const_5") (result v128) (i8x16.max_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.max_u_with_const_6") (result v128) (i8x16.max_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.max_u_with_const_7") (result v128) (i8x16.max_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) - (func (export "i8x16.min_s_with_const_8") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_s_with_const_9") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.min_u_with_const_10") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_u_with_const_11") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_s_with_const_12") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_s_with_const_13") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_u_with_const_14") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_u_with_const_15") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.avgr_u_with_const_8") (result v128) (i8x16.avgr_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) + (func (export "i8x16.avgr_u_with_const_9") (result v128) (i8x16.avgr_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) + (func (export "i8x16.min_s_with_const_10") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_11") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.min_u_with_const_12") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_u_with_const_13") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_s_with_const_14") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_s_with_const_15") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_u_with_const_16") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_u_with_const_17") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.avgr_u_with_const_18") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.avgr_u_with_const_19") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) ) (assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) @@ -155,6 +160,39 @@ (assert_return (invoke "i8x16.max_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 128 128 128 128 128 128 128 128 255 255 255 255)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 192 192 192 192 192 192 192 192 192 192 192 192 192 192 192 192)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) ;; Const vs const (assert_return (invoke "i8x16.min_s_with_const_0") (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) @@ -165,24 +203,30 @@ (assert_return (invoke "i8x16.max_s_with_const_5") (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) (assert_return (invoke "i8x16.max_u_with_const_6") (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) (assert_return (invoke "i8x16.max_u_with_const_7") (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) +(assert_return (invoke "i8x16.avgr_u_with_const_8") (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) +(assert_return (invoke "i8x16.avgr_u_with_const_9") (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) ;; Param vs const -(assert_return (invoke "i8x16.min_s_with_const_8" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) - (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_s_with_const_9" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) - (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.min_u_with_const_10" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s_with_const_10" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_u_with_const_11" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_s_with_const_11" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.max_s_with_const_12" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_12" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_13" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_14" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_s_with_const_13" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_15" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) -(assert_return (invoke "i8x16.max_u_with_const_14" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.max_u_with_const_16" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_u_with_const_15" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_u_with_const_17" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) +(assert_return (invoke "i8x16.avgr_u_with_const_18" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) +(assert_return (invoke "i8x16.avgr_u_with_const_19" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) ;; Test different lanes go through different if-then clauses (assert_return (invoke "i8x16.min_s" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) @@ -209,6 +253,12 @@ (assert_return (invoke "i8x16.max_u" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) + (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) + (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) + (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) + (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) ;; Test opposite signs of zero (assert_return (invoke "i8x16.min_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) @@ -235,12 +285,27 @@ (assert_return (invoke "i8x16.max_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + +;; Unknown operators +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (f64x2.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.avgr (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.avgr_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") ;; Type check (assert_invalid (module (func (result v128) (i8x16.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.avgr_u (i32.const 0) (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -308,27 +373,56 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i8x16.avgr_u-1st-arg-empty (result v128) + (i8x16.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.avgr_u-arg-empty (result v128) + (i8x16.avgr_u) + ) + ) + "type mismatch" +) ;; Combination (module + (func (export "i8x16.min_s-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) ) +(assert_return (invoke "i8x16.min_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) (assert_return (invoke "i8x16.min_s-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -345,6 +439,10 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) (assert_return (invoke "i8x16.min_u-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -361,6 +459,10 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (assert_return (invoke "i8x16.max_s-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -377,6 +479,10 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (assert_return (invoke "i8x16.max_u-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -393,3 +499,23 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.avgr_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.avgr_u-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.avgr_u-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.avgr_u-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.avgr_u-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) From 6b805197248f7e4dfa689d330c5d27a851f4b007 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 10 Jan 2020 10:52:56 -0800 Subject: [PATCH 121/378] Change Rep type of SIMD to be immutable string --- interpreter/exec/simd.ml | 10 ++++------ interpreter/exec/v128.ml | 7 +++---- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index b61b44794c..5a2b83de32 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -20,8 +20,6 @@ sig val to_string : t -> string val bytewidth : int val of_strings : shape -> string list -> t - val of_bits : string -> t - val to_bits : t -> string end module type S = @@ -35,14 +33,14 @@ sig val of_strings : shape -> string list -> t end -module Make (Rep : RepType) : S with type bits = string = +module Make (Rep : RepType) : S with type bits = Rep.t = struct type t = Rep.t - type bits = string + type bits = Rep.t let default = Rep.make Rep.bytewidth (chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) - let of_bits = Rep.of_bits - let to_bits = Rep.to_bits + let of_bits x = x + let to_bits x = x let of_strings = Rep.of_strings end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 22a4bc1212..33d6bd7751 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,9 +1,8 @@ include Simd.Make (struct - include Bytes + include String let bytewidth = 16 - let of_bits = Bytes.of_string - let to_bits = Bytes.to_string + let to_string s = s let of_strings shape ss = if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); @@ -28,5 +27,5 @@ include Simd.Make List.iteri (fun i s -> set_int32_le b (i * 4) (F32.to_bits (F32.of_string s))) ss | Simd.F64x2 -> List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss); - b + Bytes.to_string b end) From 0a82b43bb7bb475b84c2a783eab403d77d2cb528 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 16 Jan 2020 10:41:37 -0800 Subject: [PATCH 122/378] Update V8 implementation status (#179) --- proposals/simd/ImplementationStatus.md | 82 +++++++++++++------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 2895c243a5..6b4cf2efb7 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -6,27 +6,27 @@ | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v16x8.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v32x4.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v64x2.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `f64x2.extract_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -63,12 +63,12 @@ | `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.andnot` | `-munimplemented-simd128` | | :heavy_check_mark: | | @@ -78,9 +78,9 @@ | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -91,13 +91,13 @@ | `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.avgr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i8x16.avgr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -109,13 +109,13 @@ | `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.avgr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `i16x8.avgr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -123,12 +123,12 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | | | :heavy_check_mark: | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -139,15 +139,15 @@ | `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.trunc_sat_f64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | @@ -179,7 +179,7 @@ [1] Tip of tree LLVM as of December 18, 2019 -[2] Tested on V8 7.5.0 (candidate). Requires flag `--experimental-wasm-simd` +[2] Tested on V8 8.1.0 (candidate). Requires flag `--experimental-wasm-simd` [3] Tip of tree WAVM as of Dec 18, 2019. Requires flag `--enable simd` From 31e8894206e20cd9a06f05521a70303ca8f82809 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 16 Jan 2020 10:42:18 -0800 Subject: [PATCH 123/378] Remove i64x2 <-> f64x2 conversion opcodes (#178) In the SIMD sync on 2020-01-14, we discussed the challenges with implementing these instructions in a performant way on 32-bit archs. And even on 64-bit arch, like x64, it requires AVX-512 for good codegen. There is consensus that because it is uncommon for such instructions to be used, and that hardware support is not widespread, we can remove these. --- proposals/simd/BinarySIMD.md | 4 ---- proposals/simd/ImplementationStatus.md | 4 ---- proposals/simd/SIMD.md | 4 ---- 3 files changed, 12 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index a538bf7df6..74ec47ab98 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -170,12 +170,8 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `f64x2.max` | `0xaa`| - | | `i32x4.trunc_sat_f32x4_s` | `0xab`| - | | `i32x4.trunc_sat_f32x4_u` | `0xac`| - | -| `i64x2.trunc_sat_f64x2_s` | `0xad`| - | -| `i64x2.trunc_sat_f64x2_u` | `0xae`| - | | `f32x4.convert_i32x4_s` | `0xaf`| - | | `f32x4.convert_i32x4_u` | `0xb0`| - | -| `f64x2.convert_i64x2_s` | `0xb1`| - | -| `f64x2.convert_i64x2_u` | `0xb2`| - | | `v8x16.swizzle` | `0xc0`| - | | `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | | `v8x16.load_splat` | `0xc2`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 6b4cf2efb7..fb4aefd03a 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -150,12 +150,8 @@ | `f64x2.max` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_sat_f64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.trunc_sat_f64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_i64x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.convert_i64x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `v8x16.shuffle` | `-msimd128`[5] | :white_check_mark:[5] | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.load8x8_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 9117b625b9..4f8169f056 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -859,8 +859,6 @@ Lane-wise IEEE `squareRoot`. ### Integer to floating point * `f32x4.convert_i32x4_s(a: v128) -> v128` * `f32x4.convert_i32x4_u(a: v128) -> v128` -* `f64x2.convert_i64x2_s(a: v128) -> v128` -* `f64x2.convert_i64x2_u(a: v128) -> v128` Lane-wise conversion from integer to floating point. Some integer values will be rounded. @@ -868,8 +866,6 @@ rounded. ### Floating point to integer with saturation * `i32x4.trunc_sat_f32x4_s(a: v128) -> v128` * `i32x4.trunc_sat_f32x4_u(a: v128) -> v128` -* `i64x2.trunc_sat_f64x2_s(a: v128) -> v128` -* `i64x2.trunc_sat_f64x2_u(a: v128) -> v128` Lane-wise saturating conversion from floating point to integer using the IEEE `convertToIntegerTowardZero` function. If any input lane is a NaN, the From 8986d5a90200cd8be7c66ff9ccda794f11b3fac6 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Sat, 18 Jan 2020 03:26:46 +0800 Subject: [PATCH 124/378] [test] Test more alignment for load extend and splat ops (#180) Tests are synced from https://github.com/WAVM/WAVM/pull/251 --- test/core/simd/simd_align.wast | 345 +++++++++++++++++++++++++-------- 1 file changed, 268 insertions(+), 77 deletions(-) diff --git a/test/core/simd/simd_align.wast b/test/core/simd/simd_align.wast index 1dc95c904d..35fb68036b 100644 --- a/test/core/simd/simd_align.wast +++ b/test/core/simd/simd_align.wast @@ -1,116 +1,307 @@ -;; Vaild alignment (align=1, 2, 4, 8, 16) +;; Valid alignment -(module - (memory 1) - (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\10\11\12\13\14\15") +(module (memory 1) (func (drop (v128.load align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load align=16 (i32.const 0))))) + +(module (memory 1) (func (v128.store align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)))) +(module (memory 1) (func (v128.store align=2 (i32.const 0) (v128.const i32x4 0 1 2 3)))) +(module (memory 1) (func (v128.store align=4 (i32.const 0) (v128.const i32x4 0 1 2 3)))) +(module (memory 1) (func (v128.store align=8 (i32.const 0) (v128.const i32x4 0 1 2 3)))) +(module (memory 1) (func (v128.store align=16 (i32.const 0) (v128.const i32x4 0 1 2 3)))) + +(module (memory 1) (func (drop (i16x8.load8x8_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i16x8.load8x8_u align=8 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i32x4.load16x4_u align=8 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (i64x2.load32x2_u align=8 (i32.const 0))))) + +(module (memory 1) (func (drop (v8x16.load_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v16x8.load_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v16x8.load_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v32x4.load_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v32x4.load_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v32x4.load_splat align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v64x2.load_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v64x2.load_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v64x2.load_splat align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v64x2.load_splat align=8 (i32.const 0))))) + +;; Invalid alignment + +(assert_invalid + (module (memory 1) (func (drop (v128.load align=32 (i32.const 0))))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 0) (func(v128.store align=32 (i32.const 0) (v128.const i32x4 0 0 0 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i16x8.load8x8_s align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i16x8.load8x8_u align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i32x4.load16x4_s align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i32x4.load16x4_u align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i64x2.load32x2_s align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (i64x2.load32x2_u align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (v8x16.load_splat align=2 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (v16x8.load_splat align=4 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (v32x4.load_splat align=8 (i32.const 0)))) + "alignment must not be larger than natural" +) +(assert_invalid + (module (memory 1) (func (result v128) (v64x2.load_splat align=16 (i32.const 0)))) + "alignment must not be larger than natural" +) + +;; Malformed alignment - (func (export "v128.load_align_1") (result v128) - (v128.load align=1 (i32.const 0)) +(assert_malformed + (module quote + "(memory 1) (func (drop (v128.load align=-1 (i32.const 0))))" ) - (func (export "v128.load_align_2") (result v128) - (v128.load align=2 (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (drop (v128.load align=0 (i32.const 0))))" ) - (func (export "v128.load_align_4") (result v128) - (v128.load align=4 (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (drop (v128.load align=7 (i32.const 0))))" ) - (func (export "v128.load_align_8") (result v128) - (v128.load align=8 (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (v128.store align=-1 (i32.const 0) (v128.const i32x4 0 0 0 0)))" ) - (func (export "v128.load_align_16") (result v128) - (v128.load align=16 (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 0) (func (v128.store align=0 (i32.const 0) (v128.const i32x4 0 0 0 0)))" ) - - (func (export "v128.store_align_1") (result v128) - (v128.store align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) - (v128.load (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 0) (func (v128.store align=7 (i32.const 0) (v128.const i32x4 0 0 0 0)))" ) - (func (export "v128.store_align_2") (result v128) - (v128.store align=2 (i32.const 0) (v128.const i32x4 0 1 2 3)) - (v128.load (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i16x8.load8x8_s align=-1 (i32.const 0)))" ) - (func (export "v128.store_align_4") (result v128) - (v128.store align=4 (i32.const 0) (v128.const i32x4 0 1 2 3)) - (v128.load (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i16x8.load8x8_s align=0 (i32.const 0)))" ) - (func (export "v128.store_align_8") (result v128) - (v128.store align=8 (i32.const 0) (v128.const i32x4 0 1 2 3)) - (v128.load (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i16x8.load8x8_s align=7 (i32.const 0)))" ) - (func (export "v128.store_align_16") (result v128) - (v128.store align=16 (i32.const 0) (v128.const i32x4 0 1 2 3)) - (v128.load (i32.const 0)) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i16x8.load8x8_u align=-1 (i32.const 0)))" ) + "alignment must be a power of two" ) - -(assert_return (invoke "v128.load_align_1") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) -(assert_return (invoke "v128.load_align_2") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) -(assert_return (invoke "v128.load_align_4") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) -(assert_return (invoke "v128.load_align_8") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) -(assert_return (invoke "v128.load_align_16") (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) - -(assert_return (invoke "v128.store_align_1") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128.store_align_2") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128.store_align_4") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128.store_align_8") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128.store_align_16") (v128.const i32x4 0 1 2 3)) - - -;; Invalid alignment - -(assert_invalid - (module - (memory 1) - (func (drop (v128.load align=32 (i32.const 0)))) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i16x8.load8x8_u align=0 (i32.const 0)))" ) - "alignment must not be larger than natural" + "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1)" - "(func (drop (v128.load align=-1 (i32.const 0))))" + "(memory 1) (func (result v128) (i16x8.load8x8_u align=7 (i32.const 0)))" ) - "unknown operator" + "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1)" - "(func (drop (v128.load align=0 (i32.const 0))))" + "(memory 1) (func (result v128) (i32x4.load16x4_s align=-1 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1)" - "(func (drop (v128.load align=7 (i32.const 0))))" + "(memory 1) (func (result v128) (i32x4.load16x4_s align=0 (i32.const 0)))" ) "alignment must be a power of two" ) - -(assert_invalid - (module - (memory 0) - (func(v128.store align=32 (i32.const 0) (v128.const i32x4 0 0 0 0))) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i32x4.load16x4_s align=7 (i32.const 0)))" ) - "alignment must not be larger than natural" + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i32x4.load16x4_u align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i32x4.load16x4_u align=0 (i32.const 0)))" + ) + "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1)" - " (func (v128.store align=-1 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + "(memory 1) (func (result v128) (i32x4.load16x4_u align=7 (i32.const 0)))" ) - "unknown operator" + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_s align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_s align=0 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_s align=7 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_u align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_u align=0 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (i64x2.load32x2_u align=7 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v8x16.load_splat align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v8x16.load_splat align=0 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v16x8.load_splat align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v16x8.load_splat align=0 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v32x4.load_splat align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v32x4.load_splat align=0 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v32x4.load_splat align=3 (i32.const 0)))" + ) + "alignment must be a power of two" +) +(assert_malformed + (module quote + "(memory 1) (func (result v128) (v64x2.load_splat align=-1 (i32.const 0)))" + ) + "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 0)" - " (func (v128.store align=0 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + "(memory 1) (func (result v128) (v64x2.load_splat align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 0)" - " (func (v128.store align=7 (i32.const 0) (v128.const i32x4 0 0 0 0)))" + "(memory 1) (func (result v128) (v64x2.load_splat align=7 (i32.const 0)))" ) "alignment must be a power of two" ) @@ -136,7 +327,7 @@ (module (memory 1) - (func (export "v128_unalign_read_and_write") (result v128) + (func (export "v128_unaligned_read_and_write") (result v128) (local v128) (v128.store (i32.const 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (v128.load (i32.const 0)) @@ -146,19 +337,19 @@ (v128.store align=2 (i32.const 0) (v128.const i16x8 0 1 2 3 4 5 6 7)) (v128.load align=2 (i32.const 0)) ) - (func (export "v128_aligned_read_and_unalign_write") (result v128) + (func (export "v128_aligned_read_and_unaligned_write") (result v128) (local v128) (v128.store (i32.const 0) (v128.const i32x4 0 1 2 3)) (v128.load align=2 (i32.const 0)) ) - (func (export "v128_unalign_read_and_aligned_write") (result v128) + (func (export "v128_unaligned_read_and_aligned_write") (result v128) (local v128) (v128.store align=2 (i32.const 0) (v128.const i32x4 0 1 2 3)) (v128.load (i32.const 0)) ) ) -(assert_return (invoke "v128_unalign_read_and_write") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) +(assert_return (invoke "v128_unaligned_read_and_write") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (assert_return (invoke "v128_aligned_read_and_write") (v128.const i16x8 0 1 2 3 4 5 6 7)) -(assert_return (invoke "v128_aligned_read_and_unalign_write") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128_unalign_read_and_aligned_write") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128_aligned_read_and_unaligned_write") (v128.const i32x4 0 1 2 3)) +(assert_return (invoke "v128_unaligned_read_and_aligned_write") (v128.const i32x4 0 1 2 3)) \ No newline at end of file From 9352c9b788b59a3748b59bbeba5fd7f6b2b1cbec Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Mon, 20 Jan 2020 17:10:25 +0800 Subject: [PATCH 125/378] [test] Fix issue #181 - Fix mistake tests in simd_load.wast - Missing lane index should be malformed - Test more values of lane index --- test/core/simd/simd_const.wast | 4 + test/core/simd/simd_lane.wast | 344 ++++++++++++++++++++++++++++++--- test/core/simd/simd_load.wast | 28 +-- 3 files changed, 318 insertions(+), 58 deletions(-) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index b0c1423829..ebc734c6a9 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -228,6 +228,10 @@ "unexpected token" ) +(assert_malformed + (module quote "(func (v128.const 0 0 0 0) drop)") + "unexpected token" +) (assert_malformed (module quote "(func (v128.const i8x16) drop)") "wrong number of lane literals" diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 96b7812694..7120d6c098 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -393,36 +393,67 @@ (v128.const i64x2 01_234_567_890_123_456_789_0 0x0_1234_5678_90AB_cdef)) (v128.const i32x4 0xeb1f_0ad2 0xab54_a98c 0x90ab_cdef 0x1234_5678)) +;; Malformed lane index value + +(assert_malformed (module (func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i8x16.extract_lane_s 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i8x16.extract_lane_u 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i16x8.extract_lane_s 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i16x8.extract_lane_u 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i32) (i32x4.extract_lane 256 (v128.const i32x4 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result f32) (f32x4.extract_lane 256 (v128.const f32x4 0 0 0 0)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i8x16.replace_lane 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i16x8.replace_lane 256 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i32x4.replace_lane 256 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (f32x4.replace_lane 256 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") +(assert_malformed (module (func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))) "malformed lane index") +(assert_malformed (module (func (result i64) (i64x2.extract_lane 256 (v128.const i64x2 0 0)))) "malformed lane index") +(assert_malformed (module (func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))) "malformed lane index") +(assert_malformed (module (func (result f64) (f64x2.extract_lane 256 (v128.const f64x2 0 0)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (i64x2.replace_lane 256 (v128.const i64x2 0 0) (i64.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))) "malformed lane index") +(assert_malformed (module (func (result v128) (f64x2.replace_lane 256 (v128.const f64x2 0 0) (f64.const 1)))) "malformed lane index") + ;; Invalid lane index value -(assert_invalid (module (func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i8x16.extract_lane_s 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_s 255 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i8x16.extract_lane_u 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i8x16.extract_lane_u 255 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i16x8.extract_lane_s 8 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_s 255 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i16x8.extract_lane_u 8 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i16x8.extract_lane_u 255 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result i32) (i32x4.extract_lane 4 (v128.const i32x4 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i32) (i32x4.extract_lane 255 (v128.const i32x4 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result f32) (f32x4.extract_lane 4 (v128.const f32x4 0 0 0 0)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result f32) (f32x4.extract_lane 255 (v128.const f32x4 0 0 0 0)))) "invalid lane index") (assert_invalid (module (func (result v128) (i8x16.replace_lane 16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i16x8.replace_lane 8 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i8x16.replace_lane 255 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 16 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i16x8.replace_lane 255 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (i32x4.replace_lane 4 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i32x4.replace_lane 255 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result v128) (f32x4.replace_lane 4 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") -(assert_invalid (module (func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f32x4.replace_lane 255 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "invalid lane index") (assert_invalid (module (func (result i64) (i64x2.extract_lane 2 (v128.const i64x2 0 0)))) "invalid lane index") -(assert_invalid (module (func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))) "invalid lane index") +(assert_invalid (module (func (result i64) (i64x2.extract_lane 255 (v128.const i64x2 0 0)))) "invalid lane index") (assert_invalid (module (func (result f64) (f64x2.extract_lane 2 (v128.const f64x2 0 0)))) "invalid lane index") -(assert_invalid (module (func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result f64) (f64x2.extract_lane 255 (v128.const f64x2 0 0)))) "invalid lane index") (assert_invalid (module (func (result v128) (i64x2.replace_lane 2 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))) "invalid lane index") -(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0) (f64.const 1.0)))) "invalid lane index") +(assert_invalid (module (func (result v128) (i64x2.replace_lane 255 (v128.const i64x2 0 0) (i64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 2 (v128.const f64x2 0 0) (f64.const 1)))) "invalid lane index") +(assert_invalid (module (func (result v128) (f64x2.replace_lane 255 (v128.const f64x2 0 0) (f64.const 1.0)))) "invalid lane index") ;; Lane index is determined by the instruction's interpretation only. @@ -488,12 +519,16 @@ "local.get 0" "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") -(assert_invalid (module (func (result v128) - (v8x16.shuffle -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 +(assert_malformed (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) - (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "malformed lane index") +(assert_malformed (module (func (result v128) + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 256 + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) + (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "malformed lane index") (assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 32 + (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 255 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") @@ -847,9 +882,33 @@ (assert_return (invoke "as-local_set-value-1" (v128.const i64x2 -1 -1)) (i64.const -1)) (assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) +;; Lane index literal + +(module (func (result i32) (i8x16.extract_lane_s 0x0f (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) +(module (func (result i32) (i8x16.extract_lane_u +0x0f (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) +(module (func (result i32) (i16x8.extract_lane_s 0x07 (v128.const i16x8 0 0 0 0 0 0 0 0)))) +(module (func (result i32) (i16x8.extract_lane_u 0x0_7 (v128.const i16x8 0 0 0 0 0 0 0 0)))) +(module (func (result i32) (i32x4.extract_lane 03 (v128.const i32x4 0 0 0 0)))) +(module (func (result f32) (f32x4.extract_lane +03 (v128.const f32x4 0 0 0 0)))) +(module (func (result i64) (i64x2.extract_lane +1 (v128.const i64x2 0 0)))) +(module (func (result f64) (f64x2.extract_lane 0x1 (v128.const f64x2 0 0)))) +(module (func (result v128) (i8x16.replace_lane +015 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) +(module (func (result v128) (i16x8.replace_lane +0x7 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) +(module (func (result v128) (i32x4.replace_lane +3 (v128.const i32x4 0 0 0 0) (i32.const 1)))) +(module (func (result v128) (f32x4.replace_lane 0x3 (v128.const f32x4 0 0 0 0) (f32.const 1.0)))) +(module (func (result v128) (i64x2.replace_lane 01 (v128.const i64x2 0 0) (i64.const 1)))) +(module (func (result v128) (f64x2.replace_lane +0x01 (v128.const f64x2 0 0) (f64.const 1.0)))) +(module (func (result v128) (v8x16.shuffle 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f + (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))) +) + +;; 1.0 is malformed lane index + +(assert_malformed (module (func (result i32) (i8x16.extract_lane_s 1.0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") + ;; Test operation with empty argument -(assert_invalid +(assert_malformed (module (func $i8x16.extract_lane_s-1st-arg-empty (result i32) (i8x16.extract_lane_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) @@ -865,7 +924,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i8x16.extract_lane_s-arg-empty (result i32) (i8x16.extract_lane_s) @@ -873,7 +932,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i16x8.extract_lane_u-1st-arg-empty (result i32) (i16x8.extract_lane_u (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -889,7 +948,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i16x8.extract_lane_u-arg-empty (result i32) (i16x8.extract_lane_u) @@ -897,7 +956,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i32x4.extract_lane-1st-arg-empty (result i32) (i32x4.extract_lane (v128.const i32x4 0 0 0 0)) @@ -913,7 +972,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i32x4.extract_lane-arg-empty (result i32) (i32x4.extract_lane) @@ -921,7 +980,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i64x2.extract_lane-1st-arg-empty (result i64) (i64x2.extract_lane (v128.const i64x2 0 0)) @@ -937,7 +996,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $i64x2.extract_lane-arg-empty (result i64) (i64x2.extract_lane) @@ -945,7 +1004,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $f32x4.extract_lane-1st-arg-empty (result f32) (f32x4.extract_lane (v128.const f32x4 0 0 0 0)) @@ -961,7 +1020,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $f32x4.extract_lane-arg-empty (result f32) (f32x4.extract_lane) @@ -969,7 +1028,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $f64x2.extract_lane-1st-arg-empty (result f64) (f64x2.extract_lane (v128.const f64x2 0 0)) @@ -985,7 +1044,7 @@ ) "type mismatch" ) -(assert_invalid +(assert_malformed (module (func $f64x2.extract_lane-arg-empty (result f64) (f64x2.extract_lane) @@ -993,3 +1052,224 @@ ) "type mismatch" ) +(assert_malformed + (module + (func $i8x16.replace_lane-1st-arg-empty (result v128) + (i8x16.replace_lane (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.replace_lane-2nd-arg-empty (result v128) + (i8x16.replace_lane 0 (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i8x16.replace_lane-3rd-arg-empty (result v128) + (i8x16.replace_lane 0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i8x16.replace_lane-arg-empty (result v128) + (i8x16.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i16x8.replace_lane-1st-arg-empty (result v128) + (i16x8.replace_lane (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.replace_lane-2nd-arg-empty (result v128) + (i16x8.replace_lane 0 (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.replace_lane-3rd-arg-empty (result v128) + (i16x8.replace_lane 0 (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i16x8.replace_lane-arg-empty (result v128) + (i16x8.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i32x4.replace_lane-1st-arg-empty (result v128) + (i32x4.replace_lane (v128.const i32x4 0 0 0 0) (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.replace_lane-2nd-arg-empty (result v128) + (i32x4.replace_lane 0 (i32.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.replace_lane-3rd-arg-empty (result v128) + (i32x4.replace_lane 0 (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i32x4.replace_lane-arg-empty (result v128) + (i32x4.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $f32x4.replace_lane-1st-arg-empty (result v128) + (f32x4.replace_lane (v128.const f32x4 0 0 0 0) (f32.const 1.0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.replace_lane-2nd-arg-empty (result v128) + (f32x4.replace_lane 0 (f32.const 1.0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.replace_lane-3rd-arg-empty (result v128) + (f32x4.replace_lane 0 (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $f32x4.replace_lane-arg-empty (result v128) + (f32x4.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i64x2.replace_lane-1st-arg-empty (result v128) + (i64x2.replace_lane (v128.const i64x2 0 0) (i64.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.replace_lane-2nd-arg-empty (result v128) + (i64x2.replace_lane 0 (i64.const 1)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.replace_lane-3rd-arg-empty (result v128) + (i64x2.replace_lane 0 (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $i64x2.replace_lane-arg-empty (result v128) + (i64x2.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $f64x2.replace_lane-1st-arg-empty (result v128) + (f64x2.replace_lane (v128.const f64x2 0 0) (f64.const 1.0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.replace_lane-2nd-arg-empty (result v128) + (f64x2.replace_lane 0 (f64.const 1.0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.replace_lane-3rd-arg-empty (result v128) + (f64x2.replace_lane 0 (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $f64x2.replace_lane-arg-empty (result v128) + (f64x2.replace_lane) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $v8x16.shuffle-1st-arg-empty (result v128) + (v8x16.shuffle + (v128.const i8x16 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16) + ) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $v8x16.shuffle-2nd-arg-empty (result v128) + (v8x16.shuffle 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 + (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16) + ) + ) + ) + "type mismatch" +) +(assert_malformed + (module + (func $v8x16.shuffle-arg-empty (result v128) + (v8x16.shuffle) + ) + ) + "type mismatch" +) \ No newline at end of file diff --git a/test/core/simd/simd_load.wast b/test/core/simd/simd_load.wast index 1cc2045f49..78c6c93cf8 100644 --- a/test/core/simd/simd_load.wast +++ b/test/core/simd/simd_load.wast @@ -182,31 +182,7 @@ (module (memory 1) (func (drop (v128.load (local.get 2))))) "unknown local 2" ) - - -;; Test operation with empty argument - -(assert_invalid - (module - (func $v128.const-arg-empty (result v128) - (v128.const) - ) - ) - "type mismatch" -) (assert_invalid - (module - (func $v128.const-1st-arg-empty (result v128) - (v128.const 0 0 0 0) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $v128.const-2nd-arg-empty (result v128) - (v128.const i32x4) - ) - ) + (module (memory 1) (func (drop (v128.load)))) "type mismatch" -) +) \ No newline at end of file From b0b006923dc58d557eb337b20c241c5746ecc83e Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 22 Jan 2020 03:57:31 +0800 Subject: [PATCH 126/378] [test] Remove tests for i64x2 <-> f64x2 conversion opcodes (#182) These ops have been removed by https://github.com/WebAssembly/simd/pull/178 --- test/core/simd/simd_conversions.wast | 318 +-------------------------- 1 file changed, 4 insertions(+), 314 deletions(-) diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 5a06db7309..e1c2ff245b 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -6,20 +6,12 @@ (i32x4.trunc_sat_f32x4_s (local.get 0))) (func (export "i32x4.trunc_sat_f32x4_u") (param v128) (result v128) (i32x4.trunc_sat_f32x4_u (local.get 0))) - (func (export "i64x2.trunc_sat_f64x2_s") (param v128) (result v128) - (i64x2.trunc_sat_f64x2_s (local.get 0))) - (func (export "i64x2.trunc_sat_f64x2_u") (param v128) (result v128) - (i64x2.trunc_sat_f64x2_u (local.get 0))) ;; Integer to floating point (func (export "f32x4.convert_i32x4_s") (param v128) (result v128) (f32x4.convert_i32x4_s (local.get 0))) (func (export "f32x4.convert_i32x4_u") (param v128) (result v128) (f32x4.convert_i32x4_u (local.get 0))) - (func (export "f64x2.convert_i64x2_s") (param v128) (result v128) - (f64x2.convert_i64x2_s (local.get 0))) - (func (export "f64x2.convert_i64x2_u") (param v128) (result v128) - (f64x2.convert_i64x2_u (local.get 0))) ;; Integer to integer narrowing (func (export "i8x16.narrow_i16x8_s") (param v128 v128) (result v128) @@ -224,183 +216,6 @@ (v128.const i32x4 123456792 123456792 123456792 123456792)) (assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0123456789.0 -0123456789.0 -0123456789.0 -0123456789.0)) (v128.const i32x4 0 0 0 0)) -;; i64x2.trunc_sat_f64x2_s - -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0.0 0.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0.0 -0.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.0 1.0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.0 -1.0)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.5 1.5)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.5 -1.5)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 1.9 1.9)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -1.9 -1.9)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 2.0 2.0)) - (v128.const i64x2 2 2)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -2.0 -2.0)) - (v128.const i64x2 -2 -2)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 4294967296.0 4294967296.0)) - (v128.const i64x2 4294967296 4294967296)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -4294967296.0 -4294967296.0)) - (v128.const i64x2 -4294967296 -4294967296)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854774784.0 9223372036854774784.0)) - (v128.const i64x2 9223372036854774784 9223372036854774784)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854774784.0 -9223372036854774784.0)) - (v128.const i64x2 -9223372036854774784 -9223372036854774784)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) - (v128.const i64x2 9223372036854775807 9223372036854775807)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) - (v128.const i64x2 -9223372036854775808 -9223372036854775808)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 10000000000000000000.0 10000000000000000000.0)) - (v128.const i64x2 9223372036854775807 9223372036854775807)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -10000000000000000000.0 -10000000000000000000.0)) - (v128.const i64x2 -9223372036854775808 -9223372036854775808)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) - (v128.const i64x2 9223372036854775807 9223372036854775807)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -9223372036854775807.0 -9223372036854775807.0)) - (v128.const i64x2 -9223372036854775808 -9223372036854775808)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p-1022 0x1p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p-1 0x1p-1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p-1 -0x1p-1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1p+0 0x1p+0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1p+0 -0x1p+0)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) - (v128.const i64x2 6 6)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) - (v128.const i64x2 -6 -6)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) - (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) - (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 inf inf)) - (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -inf -inf)) - (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 nan nan)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -nan -nan)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 3.14 nan)) - (v128.const i64x2 3 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 -3.14 -inf)) - (v128.const i64x2 -3 -0x8000000000000000)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 01234567890123456768.0 01234567890123456768.0)) - (v128.const i64x2 1234567890123456768 1234567890123456768)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_s" (v128.const f64x2 01234567890123456789.0 01234567890123456789.0)) - (v128.const i64x2 0x112210f47de98100 0x112210f47de98100)) -;; i64x2.trunc_sat_f64x2_u - -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0.0 0.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0.0 -0.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.0 1.0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.0 -1.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.5 1.5)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.5 -1.5)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 1.9 1.9)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -1.9 -1.9)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 2.0 2.0)) - (v128.const i64x2 2 2)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -2.0 -2.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 4294967296.0 4294967296.0)) - (v128.const i64x2 4294967296 4294967296)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -4294967296.0 -4294967296.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854774784.0 9223372036854774784.0)) - (v128.const i64x2 9223372036854774784 9223372036854774784)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854774784.0 -9223372036854774784.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) - (v128.const i64x2 9223372036854775808 9223372036854775808)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 10000000000000000000.0 10000000000000000000.0)) - (v128.const i64x2 10000000000000000000 10000000000000000000)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -10000000000000000000.0 -10000000000000000000.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 18446744073709551615.0 18446744073709551615.0)) - (v128.const i64x2 18446744073709551615 18446744073709551615)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -18446744073709551615.0 -18446744073709551615.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) - (v128.const i64x2 9223372036854775808 9223372036854775808)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -9223372036854775807.0 -9223372036854775807.0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p-1022 0x1p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p-1 0x1p-1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p-1 -0x1p-1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1p+0 0x1p+0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1p+0 -0x1p+0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) - (v128.const i64x2 6 6)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) - (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 inf inf)) - (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -inf -inf)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 nan nan)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -nan -nan)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 3.14 nan)) - (v128.const i64x2 3 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -3.14 -inf)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 01234567890123456768.0 01234567890123456768.0)) - (v128.const i64x2 1234567890123456768 1234567890123456768)) -(assert_return (invoke "i64x2.trunc_sat_f64x2_u" (v128.const f64x2 -01234567890123456789.0 -01234567890123456789.0)) - (v128.const i64x2 0 0)) - ;; Integer to floating point ;; f32x4.convert_i32x4_s @@ -433,34 +248,6 @@ (assert_return (invoke "f32x4.convert_i32x4_s" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) (v128.const f32x4 0.0 -1.0 2147483647.0 -2147483648.0)) -;; f64x2.convert_i64x2_s - -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0 0)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 1 1)) - (v128.const f64x2 1.0 1.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -1 -1)) - (v128.const f64x2 -1.0 -1.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9223372036854775807 9223372036854775807)) - (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) - (v128.const f64x2 -9223372036854775808.0 -9223372036854775808.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 4669201609102990 4669201609102990)) - (v128.const f64x2 4669201609102990.0 4669201609102990.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9007199254740993 9007199254740993)) - (v128.const f64x2 9007199254740992.0 9007199254740992.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9007199254740993 -9007199254740993)) - (v128.const f64x2 -9007199254740992.0 -9007199254740992.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 9007199254740995 9007199254740995)) - (v128.const f64x2 9007199254740996.0 9007199254740996.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 -9007199254740995 -9007199254740995)) - (v128.const f64x2 -9007199254740996.0 -9007199254740996.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) - (v128.const f64x2 9223372036854775807.0 -9223372036854775808.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) - (v128.const f64x2 1.2345678901234568e+18 1.2345678901234568e+18)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x0_1234_5678_90AB_cdef 0x0_1234_5678_90AB_cdef)) - (v128.const f64x2 1.3117684672948997e+18 1.3117684672948997e+18)) ;; f32x4.convert_i32x4_u (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 0 0 0)) @@ -500,42 +287,6 @@ (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) (v128.const f32x4 0.0 4294967295.0 2147483647.0 2147483648.0)) -;; f64x2.convert_i64x2_u - -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0 0)) - (v128.const f64x2 0.0 0.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 1 1)) - (v128.const f64x2 1.0 1.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 -1 -1)) - (v128.const f64x2 18446744073709551615.0 18446744073709551615.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9223372036854775807 9223372036854775807)) - (v128.const f64x2 9223372036854775807.0 9223372036854775807.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) - (v128.const f64x2 9223372036854775808.0 9223372036854775808.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) - (v128.const f64x2 18446744073709551616.0 18446744073709551616.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000400 0x8000000000000400)) - (v128.const f64x2 0x1.0000000000000p+63 0x1.0000000000000p+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000401 0x8000000000000401)) - (v128.const f64x2 0x1.0000000000001p+63 0x1.0000000000001p+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x8000000000000402 0x8000000000000402)) - (v128.const f64x2 0x1.0000000000001p+63 0x1.0000000000001p+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff400 0xfffffffffffff400)) - (v128.const f64x2 0x1.ffffffffffffep+63 0x1.ffffffffffffep+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff401 0xfffffffffffff401)) - (v128.const f64x2 0x1.fffffffffffffp+63 0x1.fffffffffffffp+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0xfffffffffffff402 0xfffffffffffff402)) - (v128.const f64x2 0x1.fffffffffffffp+63 0x1.fffffffffffffp+63)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9007199254740993 9007199254740993)) - (v128.const f64x2 9007199254740992.0 9007199254740992.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 9007199254740995 9007199254740995)) - (v128.const f64x2 9007199254740996.0 9007199254740996.0)) -(assert_return (invoke "f64x2.convert_i64x2_u" (v128.const i64x2 0x7fffffffffffffff 0x8000000000000000)) - (v128.const f64x2 9223372036854775807.0 9223372036854775808.0)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 01_234_567_890_123_456_789 01_234_567_890_123_456_789)) - (v128.const f64x2 1.2345678901234568e+18 1.2345678901234568e+18)) -(assert_return (invoke "f64x2.convert_i64x2_s" (v128.const i64x2 0x0_fedc_BA09_8765_4321 0x0_fedc_BA09_8765_4321)) - (v128.const f64x2 -8.198614311047907e+16 -8.198614311047907e+16)) ;; Integer to integer narrowing ;; i8x16.narrow_i16x8_s @@ -1254,22 +1005,16 @@ "unknown operator") (assert_malformed (module quote - "(func (result v128) (i64x2.trunc_sat_f64x2 (v128.const f64x2 0.0 0.0)))") - "unknown operator") -(assert_malformed (module quote - "(func (result v128) (i64x2.trunc_s_sat_f64x2 (v128.const f64x2 -2.0 -1.0)))") - "unknown operator") -(assert_malformed (module quote - "(func (result v128) (i64x2.trunc_u_sat_f64x2 (v128.const f64x2 1.0 2.0)))") + "(func (result v128) (i64x2.trunc_sat_f64x2_s (v128.const f64x2 0.0 0.0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f64x2.convert_i64x2 (v128.const i64x2 -1 0)))") + "(func (result v128) (i64x2.trunc_sat_f64x2_u (v128.const f64x2 -2.0 -1.0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f64x2.convert_s_i64x2 (v128.const i64x2 1 2)))") + "(func (result v128) (f64x2.convert_i64x2_s (v128.const i64x2 1 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f64x2.convert_u_i64x2 (v128.const i64x2 1 2)))") + "(func (result v128) (f64x2.convert_i64x2_u (v128.const i64x2 1 2)))") "unknown operator") (assert_malformed (module quote @@ -1345,14 +1090,6 @@ (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i64.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_s (i64.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.trunc_sat_f64x2_u (i64.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_s (i64.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (f64x2.convert_i64x2_u (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_s (i32.const 0) (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.narrow_i16x8_u (i32.const 0) (i64.const 0)))) "type mismatch") @@ -1378,12 +1115,6 @@ (f32x4.convert_i32x4_s (i32x4.sub (local.get 0) (local.get 1)))) (func (export "f32x4_convert_i32x4_u_mul") (param v128 v128) (result v128) (f32x4.convert_i32x4_u (i32x4.mul (local.get 0) (local.get 1)))) - (func (export "f64x2_convert_i64x2_s_add") (param v128 v128) (result v128) - (f64x2.convert_i64x2_s (i64x2.add (local.get 0) (local.get 1)))) - (func (export "f64x2_convert_i64x2_s_sub") (param v128 v128) (result v128) - (f64x2.convert_i64x2_s (i64x2.sub (local.get 0) (local.get 1)))) - (func (export "f64x2_convert_i64x2_u_mul") (param v128 v128) (result v128) - (f64x2.convert_i64x2_u (i64x2.mul (local.get 0) (local.get 1)))) (func (export "i16x8_low_widen_narrow_ss") (param v128 v128) (result v128) (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) @@ -1429,15 +1160,6 @@ (assert_return (invoke "f32x4_convert_i32x4_u_mul" (v128.const i32x4 1 2 3 4) (v128.const i32x4 1 2 3 4)) (v128.const f32x4 1.0 4.0 9.0 16.0)) -(assert_return (invoke "f64x2_convert_i64x2_s_add" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) - (v128.const i64x2 0x8000000000000000 0x8000000000000000)) - (v128.const f64x2 -1.0 -1.0)) -(assert_return (invoke "f64x2_convert_i64x2_s_sub" (v128.const i64x2 0x7fffffffffffffff 0x7fffffffffffffff) - (v128.const i64x2 0x8000000000000000 0x8000000000000000)) - (v128.const f64x2 -1.0 -1.0)) -(assert_return (invoke "f64x2_convert_i64x2_u_mul" (v128.const i64x2 0x7fffffff 0x7fffffff) - (v128.const i64x2 0x80000000 0x80000000)) - (v128.const f64x2 4611686016279904256.0 4611686016279904256.0)) (assert_return (invoke "i16x8_low_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) @@ -1507,22 +1229,6 @@ ) "type mismatch" ) -(assert_invalid - (module - (func $i64x2.trunc_sat_f64x2_s-arg-empty (result v128) - (i64x2.trunc_sat_f64x2_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i64x2.trunc_sat_f64x2_u-arg-empty (result v128) - (i64x2.trunc_sat_f64x2_u) - ) - ) - "type mismatch" -) (assert_invalid (module (func $f32x4.convert_i32x4_s-arg-empty (result v128) @@ -1539,22 +1245,6 @@ ) "type mismatch" ) -(assert_invalid - (module - (func $f64x2.convert_i64x2_s-arg-empty (result v128) - (f64x2.convert_i64x2_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $f64x2.convert_i64x2_u-arg-empty (result v128) - (f64x2.convert_i64x2_u) - ) - ) - "type mismatch" -) (assert_invalid (module (func $i8x16.narrow_i16x8_s-1st-arg-empty (result v128) From efb8ff40b20e0b01e603bbbaba0b4a3542681f9f Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 22 Jan 2020 09:21:01 +0800 Subject: [PATCH 127/378] assert_malformed requires a quoted --- test/core/simd/simd_lane.wast | 304 +++++++++++++++++----------------- 1 file changed, 152 insertions(+), 152 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 7120d6c098..e174df395e 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -395,34 +395,34 @@ ;; Malformed lane index value -(assert_malformed (module (func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i8x16.extract_lane_s 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i8x16.extract_lane_u 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i16x8.extract_lane_s 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i16x8.extract_lane_u 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i32) (i32x4.extract_lane 256 (v128.const i32x4 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result f32) (f32x4.extract_lane 256 (v128.const f32x4 0 0 0 0)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i8x16.replace_lane 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i16x8.replace_lane 256 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i32x4.replace_lane 256 (v128.const i32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (f32x4.replace_lane 256 (v128.const f32x4 0 0 0 0) (i32.const 1)))) "malformed lane index") -(assert_malformed (module (func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))) "malformed lane index") -(assert_malformed (module (func (result i64) (i64x2.extract_lane 256 (v128.const i64x2 0 0)))) "malformed lane index") -(assert_malformed (module (func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))) "malformed lane index") -(assert_malformed (module (func (result f64) (f64x2.extract_lane 256 (v128.const f64x2 0 0)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (i64x2.replace_lane 256 (v128.const i64x2 0 0) (i64.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))) "malformed lane index") -(assert_malformed (module (func (result v128) (f64x2.replace_lane 256 (v128.const f64x2 0 0) (f64.const 1)))) "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane 256 (v128.const i32x4 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane 256 (v128.const f32x4 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane 256 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane 256 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane 256 (v128.const f32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane 256 (v128.const i64x2 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane 256 (v128.const f64x2 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane 256 (v128.const i64x2 0 0) (i64.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane 256 (v128.const f64x2 0 0) (f64.const 1)))") "malformed lane index") ;; Invalid lane index value @@ -519,14 +519,14 @@ "local.get 0" "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") "invalid lane length") -(assert_malformed (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1 - (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) - (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "malformed lane index") -(assert_malformed (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 256 - (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) - (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "malformed lane index") +(assert_malformed (module quote "(func (result v128)" + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1" + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)" + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") +(assert_malformed (module quote "(func (result v128)" + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 256" + "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)" + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_invalid (module (func (result v128) (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 255 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) @@ -904,63 +904,63 @@ ;; 1.0 is malformed lane index -(assert_malformed (module (func (result i32) (i8x16.extract_lane_s 1.0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") ;; Test operation with empty argument (assert_malformed - (module - (func $i8x16.extract_lane_s-1st-arg-empty (result i32) - (i8x16.extract_lane_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - ) + (module quote + "(func $i8x16.extract_lane_s-1st-arg-empty (result i32)" + " (i8x16.extract_lane_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0))" + ")" ) "type mismatch" ) (assert_invalid - (module - (func $i8x16.extract_lane_s-2nd-arg-empty (result i32) - (i8x16.extract_lane_s 0) - ) + (module quote + "(func $i8x16.extract_lane_s-2nd-arg-empty (result i32)" + " (i8x16.extract_lane_s 0)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i8x16.extract_lane_s-arg-empty (result i32) - (i8x16.extract_lane_s) - ) + (module quote + "(func $i8x16.extract_lane_s-arg-empty (result i32)" + " (i8x16.extract_lane_s)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i16x8.extract_lane_u-1st-arg-empty (result i32) - (i16x8.extract_lane_u (v128.const i16x8 0 0 0 0 0 0 0 0)) - ) + (module quote + "(func $i16x8.extract_lane_u-1st-arg-empty (result i32)" + " (i16x8.extract_lane_u (v128.const i16x8 0 0 0 0 0 0 0 0))" + ")" ) "type mismatch" ) (assert_invalid - (module - (func $i16x8.extract_lane_u-2nd-arg-empty (result i32) - (i16x8.extract_lane_u 0) - ) + (module quote + "(func $i16x8.extract_lane_u-2nd-arg-empty (result i32)" + " (i16x8.extract_lane_u 0)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i16x8.extract_lane_u-arg-empty (result i32) - (i16x8.extract_lane_u) - ) + (module quote + "(func $i16x8.extract_lane_u-arg-empty (result i32)" + " (i16x8.extract_lane_u)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i32x4.extract_lane-1st-arg-empty (result i32) - (i32x4.extract_lane (v128.const i32x4 0 0 0 0)) - ) + (module quote + "(func $i32x4.extract_lane-1st-arg-empty (result i32)" + " (i32x4.extract_lane (v128.const i32x4 0 0 0 0))" + ")" ) "type mismatch" ) @@ -973,18 +973,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i32x4.extract_lane-arg-empty (result i32) - (i32x4.extract_lane) - ) + (module quote + "(func $i32x4.extract_lane-arg-empty (result i32)" + " (i32x4.extract_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i64x2.extract_lane-1st-arg-empty (result i64) - (i64x2.extract_lane (v128.const i64x2 0 0)) - ) + (module quote + "(func $i64x2.extract_lane-1st-arg-empty (result i64)" + " (i64x2.extract_lane (v128.const i64x2 0 0))" + ")" ) "type mismatch" ) @@ -997,18 +997,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i64x2.extract_lane-arg-empty (result i64) - (i64x2.extract_lane) - ) + (module quote + "(func $i64x2.extract_lane-arg-empty (result i64)" + " (i64x2.extract_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $f32x4.extract_lane-1st-arg-empty (result f32) - (f32x4.extract_lane (v128.const f32x4 0 0 0 0)) - ) + (module quote + "(func $f32x4.extract_lane-1st-arg-empty (result f32)" + " (f32x4.extract_lane (v128.const f32x4 0 0 0 0))" + ")" ) "type mismatch" ) @@ -1021,18 +1021,18 @@ "type mismatch" ) (assert_malformed - (module - (func $f32x4.extract_lane-arg-empty (result f32) - (f32x4.extract_lane) - ) + (module quote + "(func $f32x4.extract_lane-arg-empty (result f32)" + " (f32x4.extract_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $f64x2.extract_lane-1st-arg-empty (result f64) - (f64x2.extract_lane (v128.const f64x2 0 0)) - ) + (module quote + "(func $f64x2.extract_lane-1st-arg-empty (result f64)" + " (f64x2.extract_lane (v128.const f64x2 0 0))" + ")" ) "type mismatch" ) @@ -1045,18 +1045,18 @@ "type mismatch" ) (assert_malformed - (module - (func $f64x2.extract_lane-arg-empty (result f64) - (f64x2.extract_lane) - ) + (module quote + "(func $f64x2.extract_lane-arg-empty (result f64)" + " (f64x2.extract_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i8x16.replace_lane-1st-arg-empty (result v128) - (i8x16.replace_lane (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)) - ) + (module quote + "(func $i8x16.replace_lane-1st-arg-empty (result v128)" + " (i8x16.replace_lane (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1))" + ")" ) "type mismatch" ) @@ -1077,18 +1077,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i8x16.replace_lane-arg-empty (result v128) - (i8x16.replace_lane) - ) + (module quote + "(func $i8x16.replace_lane-arg-empty (result v128)" + " (i8x16.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i16x8.replace_lane-1st-arg-empty (result v128) - (i16x8.replace_lane (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)) - ) + (module quote + "(func $i16x8.replace_lane-1st-arg-empty (result v128)" + " (i16x8.replace_lane (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1))" + ")" ) "type mismatch" ) @@ -1109,18 +1109,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i16x8.replace_lane-arg-empty (result v128) - (i16x8.replace_lane) - ) + (module quote + "(func $i16x8.replace_lane-arg-empty (result v128)" + " (i16x8.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i32x4.replace_lane-1st-arg-empty (result v128) - (i32x4.replace_lane (v128.const i32x4 0 0 0 0) (i32.const 1)) - ) + (module quote + "(func $i32x4.replace_lane-1st-arg-empty (result v128)" + " (i32x4.replace_lane (v128.const i32x4 0 0 0 0) (i32.const 1))" + ")" ) "type mismatch" ) @@ -1141,18 +1141,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i32x4.replace_lane-arg-empty (result v128) - (i32x4.replace_lane) - ) + (module quote + "(func $i32x4.replace_lane-arg-empty (result v128)" + " (i32x4.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $f32x4.replace_lane-1st-arg-empty (result v128) - (f32x4.replace_lane (v128.const f32x4 0 0 0 0) (f32.const 1.0)) - ) + (module quote + "(func $f32x4.replace_lane-1st-arg-empty (result v128)" + " (f32x4.replace_lane (v128.const f32x4 0 0 0 0) (f32.const 1.0))" + ")" ) "type mismatch" ) @@ -1173,18 +1173,18 @@ "type mismatch" ) (assert_malformed - (module - (func $f32x4.replace_lane-arg-empty (result v128) - (f32x4.replace_lane) - ) + (module quote + "(func $f32x4.replace_lane-arg-empty (result v128)" + " (f32x4.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $i64x2.replace_lane-1st-arg-empty (result v128) - (i64x2.replace_lane (v128.const i64x2 0 0) (i64.const 1)) - ) + (module quote + "(func $i64x2.replace_lane-1st-arg-empty (result v128)" + " (i64x2.replace_lane (v128.const i64x2 0 0) (i64.const 1))" + ")" ) "type mismatch" ) @@ -1205,18 +1205,18 @@ "type mismatch" ) (assert_malformed - (module - (func $i64x2.replace_lane-arg-empty (result v128) - (i64x2.replace_lane) - ) + (module quote + "(func $i64x2.replace_lane-arg-empty (result v128)" + " (i64x2.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $f64x2.replace_lane-1st-arg-empty (result v128) - (f64x2.replace_lane (v128.const f64x2 0 0) (f64.const 1.0)) - ) + (module quote + "(func $f64x2.replace_lane-1st-arg-empty (result v128)" + " (f64x2.replace_lane (v128.const f64x2 0 0) (f64.const 1.0))" + ")" ) "type mismatch" ) @@ -1237,21 +1237,21 @@ "type mismatch" ) (assert_malformed - (module - (func $f64x2.replace_lane-arg-empty (result v128) - (f64x2.replace_lane) - ) + (module quote + "(func $f64x2.replace_lane-arg-empty (result v128)" + " (f64x2.replace_lane)" + ")" ) "type mismatch" ) (assert_malformed - (module - (func $v8x16.shuffle-1st-arg-empty (result v128) - (v8x16.shuffle - (v128.const i8x16 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16) - ) - ) + (module quote + "(func $v8x16.shuffle-1st-arg-empty (result v128)" + " (v8x16.shuffle" + " (v128.const i8x16 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15)" + " (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16)" + " )" + ")" ) "type mismatch" ) @@ -1266,10 +1266,10 @@ "type mismatch" ) (assert_malformed - (module - (func $v8x16.shuffle-arg-empty (result v128) - (v8x16.shuffle) - ) + (module quote + "(func $v8x16.shuffle-arg-empty (result v128)" + " (v8x16.shuffle)" + ")" ) "type mismatch" ) \ No newline at end of file From 093ecb88ea7e5c4d53330b6e772661660d148b3d Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Wed, 5 Feb 2020 11:01:50 -0600 Subject: [PATCH 128/378] Adjust two more tests from recent changes (#184) The `assert_invalid` directive isn't intended to be used with `(module quote ...)` and the `module quote` part can be removed here as well since the module should successfully parse, but fail to validate. --- test/core/simd/simd_lane.wast | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index e174df395e..6cbbeebba1 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -917,10 +917,10 @@ "type mismatch" ) (assert_invalid - (module quote - "(func $i8x16.extract_lane_s-2nd-arg-empty (result i32)" - " (i8x16.extract_lane_s 0)" - ")" + (module + (func $i8x16.extract_lane_s-2nd-arg-empty (result i32) + (i8x16.extract_lane_s 0) + ) ) "type mismatch" ) @@ -941,10 +941,10 @@ "type mismatch" ) (assert_invalid - (module quote - "(func $i16x8.extract_lane_u-2nd-arg-empty (result i32)" - " (i16x8.extract_lane_u 0)" - ")" + (module + (func $i16x8.extract_lane_u-2nd-arg-empty (result i32) + (i16x8.extract_lane_u 0) + ) ) "type mismatch" ) @@ -1272,4 +1272,4 @@ ")" ) "type mismatch" -) \ No newline at end of file +) From ce49397baa9cb8bf366875f8a0a2fcf5f696a369 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Fri, 7 Feb 2020 13:25:42 -0800 Subject: [PATCH 129/378] Update LLVM implementation status (#194) --- proposals/simd/ImplementationStatus.md | 82 +++++++++++++------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index fb4aefd03a..8a19c9e32a 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -6,27 +6,27 @@ | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v16x8.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v32x4.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v64x2.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `f64x2.extract_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -63,12 +63,12 @@ | `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.andnot` | `-munimplemented-simd128` | | :heavy_check_mark: | | @@ -78,9 +78,9 @@ | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -91,13 +91,13 @@ | `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.avgr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -109,13 +109,13 @@ | `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.avgr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -123,12 +123,12 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i64x2.neg` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | | | :heavy_check_mark: | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -139,15 +139,15 @@ | `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -173,7 +173,7 @@ | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -[1] Tip of tree LLVM as of December 18, 2019 +[1] Tip of tree LLVM as of February 7, 2020 [2] Tested on V8 8.1.0 (candidate). Requires flag `--experimental-wasm-simd` From 77e7fdace0d13ffce55a17cee0b13b41ed7ff0a6 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 10 Feb 2020 16:25:02 -0800 Subject: [PATCH 130/378] Integer absolute value instructions (#128) --- proposals/simd/BinarySIMD.md | 3 +++ proposals/simd/ImplementationStatus.md | 3 +++ proposals/simd/SIMD.md | 14 +++++++++++++- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 74ec47ab98..a43dd8d058 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -199,3 +199,6 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `v128.andnot` | `0xd8`| - | | `i8x16.avgr_u` | `0xd9`| | | `i16x8.avgr_u` | `0xda`| | +| `i8x16.abs` | `0xe1`| - | +| `i16x8.abs` | `0xe2`| - | +| `i32x4.abs` | `0xe3`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8a19c9e32a..514cdd58ed 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -92,6 +92,7 @@ | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i8x16.abs` | | | | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -110,6 +111,7 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.abs` | | | | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -123,6 +125,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.abs` | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4f8169f056..24739ec4a1 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -503,6 +503,18 @@ def S.avgr_u(a, b): return S.lanewise_binary(S.RoundingAverage, S.AsUnsigned(a), S.AsUnsigned(b)) ``` +### Lane-wise integer absolute value +* `i8x16.abs(a: v128) -> v128` +* `i16x8.abs(a: v128) -> v128` +* `i32x4.abs(a: v128) -> v128` + +Lane-wise wrapping absolute value. + +```python +def S.abs(a): + return S.lanewise_unary(abs, S.AsSigned(a)) +``` + ## Bit shifts ### Left shift by scalar @@ -791,7 +803,7 @@ def S.neg(a): return S.lanewise_unary(ieee.negate, a) ``` -### Absolute value +### Floating-point absolute value * `f32x4.abs(a: v128) -> v128` * `f64x2.abs(a: v128) -> v128` From d4a4f71b22c35d178fa12f740f1b6a6657ff70d1 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Thu, 20 Feb 2020 10:45:59 +0800 Subject: [PATCH 131/378] Update WAVM implementation status (#198) --- proposals/simd/ImplementationStatus.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 514cdd58ed..437f2cb55b 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -92,7 +92,7 @@ | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.abs` | | | | | +| `i8x16.abs` | | | :heavy_check_mark: | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -111,7 +111,7 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.abs` | | | | | +| `i16x8.abs` | | | :heavy_check_mark: | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -125,7 +125,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.abs` | | | | | +| `i32x4.abs` | | | :heavy_check_mark: | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -180,7 +180,7 @@ [2] Tested on V8 8.1.0 (candidate). Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of Dec 18, 2019. Requires flag `--enable simd` +[3] Tip of tree WAVM as of Feb 16, 2020. Requires flag `--enable simd` [4] Requires (case-insensitive) flag `-wasmsimd` From 7fe545ccf2970ee951772c160d9214a49a43d9c6 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 28 Feb 2020 01:47:15 +0800 Subject: [PATCH 132/378] [test] Add spec tests for integer abs ops (#197) Tests are pulled from https://github.com/WAVM/WAVM/pull/260 --- test/core/simd/meta/simd_f32x4.py | 3 - test/core/simd/meta/simd_int_arith2.py | 217 +++++++++++++++++++++---- test/core/simd/meta/simd_integer_op.py | 30 +++- test/core/simd/simd_f32x4.wast | 4 - test/core/simd/simd_i16x8_arith2.wast | 136 +++++++++++++--- test/core/simd/simd_i32x4_arith2.wast | 121 ++++++++++++-- test/core/simd/simd_i8x16_arith2.wast | 135 ++++++++++++--- 7 files changed, 543 insertions(+), 103 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index b2118e7a79..76b689f848 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -352,9 +352,6 @@ def get_unknown_operator_case(self, cases): for lane_type in ['i8x16', 'i16x8', 'i32x4', 'i64x2']: - for op in self.UNARY_OPS: - cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=self.v128_const('i32x4', '0'))) - for op in self.BINARY_OPS: cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=' '.join([self.v128_const('i32x4', '0')]*2))) diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index e90d78cbe1..c892a71c14 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -17,7 +17,9 @@ class SimdLaneWiseInteger: BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u',) - class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u, avgr_u] operations.""" + UNARY_OPS = ('abs',) + + class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u, avgr_u, abs] operations.""" def __init__(self): @@ -34,8 +36,18 @@ def lane_width(self): return int(self.LANE_TYPE.replace('i', '').split('x')[0]) @property - def get_test_data_with_const(self): - """test const vs const and param vs const""" + def get_unary_complex_test_data(self): + """test const vs const and different lanes go through different if-then clauses for unary ops""" + case_data = [ + [self.LANE_VALUE.min, self.LANE_VALUE.max, self.LANE_VALUE.quarter, self.LANE_VALUE.mask] + ] + case_data = [list(map(str, param)) for param in case_data] + + return case_data + + @property + def get_binary_test_data_with_const(self): + """test const vs const and param vs const for binary ops""" case_data = [ [ [self.LANE_VALUE.min, self.LANE_VALUE.max, self.LANE_VALUE.quarter, self.LANE_VALUE.mask], @@ -51,7 +63,7 @@ def get_test_data_with_const(self): return case_data @property - def get_test_data_go_through_if(self): + def get_binary_test_data_go_through_if(self): """test different lanes go through different if-then clauses""" case_data = [ [ @@ -68,8 +80,20 @@ def get_test_data_go_through_if(self): return case_data @property - def get_test_data_opposite_sign_zero(self): - """test opposite signs of zero""" + def get_unary_test_data_opposite_sign_zero(self): + """test opposite signs of zero for unary ops""" + case_data = [ + ['-0', '-0', '+0', '+0'], + ['+0', '0', '-0', '0'], + ['-0', '-0', '-0', '-0'], + ['+0', '+0', '+0', '+0'], + ] + + return case_data + + @property + def get_binary_test_data_opposite_sign_zero(self): + """test opposite signs of zero for binary ops""" case_data = [ [ ['-0', '-0', '+0', '+0'], @@ -84,8 +108,33 @@ def get_test_data_opposite_sign_zero(self): return case_data @property - def get_test_data(self): - """case data""" + def get_unary_test_data(self): + """general unary case data""" + + case_data = [ + + ['1'] * self.lane_count, + ['-1'] * self.lane_count, + [str(self.LANE_VALUE.mask)] * self.lane_count, + [hex(self.LANE_VALUE.mask)] * self.lane_count, + [str(-self.LANE_VALUE.min)] * self.lane_count, + [str(self.LANE_VALUE.min)] * self.lane_count, + [hex(self.LANE_VALUE.min)] * self.lane_count, + [hex(-self.LANE_VALUE.min)] * self.lane_count, + ['01_2_3'] * self.lane_count, + ['-01_2_3'] * self.lane_count, + ['0x80'] * self.lane_count, + ['-0x80'] * self.lane_count, + ['0x0_8_0'] * self.lane_count, + ['-0x0_8_0'] * self.lane_count + + ] + + return case_data + + @property + def get_binary_test_data(self): + """general binary case data""" case_data = [ @@ -143,31 +192,40 @@ def get_test_data(self): def gen_funcs_normal(self): """generate normal functions""" binary_func_template = '\n (func (export "{lane_type}.{op}") (param v128 v128) (result v128) ({lane_type}.{op} (local.get 0) (local.get 1)))' + unary_func_template = '\n (func (export "{lane_type}.{op}") (param v128) (result v128) ({lane_type}.{op} (local.get 0)))' funcs = '' for op in self.BINARY_OPS: funcs += binary_func_template.format(lane_type=self.LANE_TYPE, op=op) - + for op in self.UNARY_OPS: + funcs += unary_func_template.format(lane_type=self.LANE_TYPE, op=op) return funcs @property def gen_funcs_with_const(self): """generate functions with const arguments""" - func_with_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (result v128) ({lane_type}.{op} {param_1} {param_2}))' - func_with_param_and_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (param v128) (result v128) ({lane_type}.{op} (local.get 0) {param_1}))' + binary_func_with_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (result v128) ({lane_type}.{op} {param_1} {param_2}))' + unary_func_with_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (result v128) ({lane_type}.{op} {param}))' + binary_func_with_param_and_const = '\n (func (export "{lane_type}.{op}_with_const_{cnt}") (param v128) (result v128) ({lane_type}.{op} (local.get 0) {param_1}))' funcs = '' cnt = 0 for op in self.BINARY_OPS: - for param_1, param_2 in self.get_test_data_with_const: - funcs += func_with_const.format(lane_type=self.LANE_TYPE, + for param_1, param_2 in self.get_binary_test_data_with_const: + funcs += binary_func_with_const.format(lane_type=self.LANE_TYPE, op=op, param_1=SIMD.v128_const(param_1, self.LANE_TYPE), param_2=SIMD.v128_const(param_2, self.LANE_TYPE), cnt=cnt) cnt += 1 - + for op in self.UNARY_OPS: + for param in self.get_unary_complex_test_data: + funcs += unary_func_with_const.format(lane_type=self.LANE_TYPE, + op=op, + param=SIMD.v128_const(param, self.LANE_TYPE), + cnt=cnt) + cnt += 1 for op in self.BINARY_OPS: - for param_1, param_2 in self.get_test_data_with_const: - funcs += func_with_param_and_const.format(lane_type=self.LANE_TYPE, + for param_1, param_2 in self.get_binary_test_data_with_const: + funcs += binary_func_with_param_and_const.format(lane_type=self.LANE_TYPE, op=op, param_1=SIMD.v128_const(param_1, self.LANE_TYPE), cnt=cnt) @@ -181,7 +239,7 @@ def gen_test_case_with_const(self): cnt = 0 cases = '\n\n;; Const vs const' for op in self.BINARY_OPS: - for param_1, param_2 in self.get_test_data_with_const: + for param_1, param_2 in self.get_binary_test_data_with_const: result = [] for idx in range(0, len(param_1)): result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) @@ -190,9 +248,19 @@ def gen_test_case_with_const(self): SIMD.v128_const(result, self.LANE_TYPE))) cnt += 1 + for op in self.UNARY_OPS: + for param in self.get_unary_complex_test_data: + result = [] + for idx in range(0, len(param)): + result.append(IntOp.unary_op(op, param[idx], self.lane_width)) + cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), + [], + SIMD.v128_const(result, self.LANE_TYPE))) + cnt += 1 + cases += '\n\n;; Param vs const' for op in self.BINARY_OPS: - for param_1, param_2 in self.get_test_data_with_const: + for param_1, param_2 in self.get_binary_test_data_with_const: result = [] for idx in range(0, len(param_1)): result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) @@ -205,10 +273,10 @@ def gen_test_case_with_const(self): @property def gen_test_case(self): - """generate test cases""" + """generate binary test cases""" cases = '' - def gen(case_data): + def gen_binary(case_data): cases = '' for op in self.BINARY_OPS: for param_1, param_2 in case_data: @@ -220,17 +288,32 @@ def gen(case_data): SIMD.v128_const(result, self.LANE_TYPE))) return cases - cases += gen(self.get_test_data) + def gen_unary(case_data): + cases = '' + for op in self.UNARY_OPS: + for param in case_data: + result = [] + for idx in range(0, len(param)): + result.append(IntOp.unary_op(op, param[idx], self.lane_width)) + cases += '\n' + str(AssertReturn('{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op), + [SIMD.v128_const(param, self.LANE_TYPE)], + SIMD.v128_const(result, self.LANE_TYPE))) + return cases + + cases += gen_binary(self.get_binary_test_data) + cases += gen_unary(self.get_unary_test_data) cases += self.gen_test_case_with_const # test different lanes go through different if-then clauses cases += '\n\n;; Test different lanes go through different if-then clauses' - cases += gen(self.get_test_data_go_through_if) + cases += gen_binary(self.get_binary_test_data_go_through_if) + cases += gen_unary(self.get_unary_complex_test_data) # test opposite signs of zero cases += '\n\n;; Test opposite signs of zero' - cases += gen(self.get_test_data_opposite_sign_zero) + cases += gen_binary(self.get_binary_test_data_opposite_sign_zero) + cases += gen_unary(self.get_unary_test_data_opposite_sign_zero) # unknown operators test cases cases += self.gen_test_case_unknown_operators @@ -248,21 +331,30 @@ def gen_test_case_unknown_operators(self): """generate unknown operators test cases""" cases = ['\n\n;; Unknown operators'] - for op in self.UNKNOWN_OPS: + for op in self.UNKNOWN_BINARY_OPS: cases.append(AssertMalformed.get_unknown_op_test( op, 'v128', SIMD.v128_const('0', self.LANE_TYPE), SIMD.v128_const('1', self.LANE_TYPE) )) + if hasattr(self, 'UNKNOWN_UNARY_OPS'): + for op in self.UNKNOWN_UNARY_OPS: + cases.append(AssertMalformed.get_unknown_op_test( + op, 'v128', + SIMD.v128_const('-1', self.LANE_TYPE) + )) return '\n'.join(cases) @property def gen_test_case_type_check(self): """generate type check test cases""" cases = '\n\n;; Type check' - assert_template = '(assert_invalid (module (func (result v128) ({lane_type}.{op} (i32.const 0) (f32.const 0.0)))) "type mismatch")' + binary_assert_template = '(assert_invalid (module (func (result v128) ({lane_type}.{op} (i32.const 0) (f32.const 0.0)))) "type mismatch")' + unary_assert_template = '(assert_invalid (module (func (result v128) ({lane_type}.{op} (f32.const 0.0)))) "type mismatch")' for op in self.BINARY_OPS: - cases += '\n' + assert_template.format(lane_type=self.LANE_TYPE, op=op) + cases += '\n' + binary_assert_template.format(lane_type=self.LANE_TYPE, op=op) + for op in self.UNARY_OPS: + cases += '\n' + unary_assert_template.format(lane_type=self.LANE_TYPE, op=op) return cases @@ -272,15 +364,32 @@ def gen_funcs_combination(self): funcs = '\n\n;; Combination' funcs += '\n(module' - assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128 v128 v128) (result v128) ' \ + binary_vs_binary_assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128 v128 v128) (result v128) ' \ '({lane_type}.{op1} ({lane_type}.{op2} (local.get 0) (local.get 1))(local.get 2))' \ ')' + binary_vs_unary_assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128 v128) (result v128) ' \ + '({lane_type}.{op1} ({lane_type}.{op2} (local.get 0))(local.get 1))' \ + ')' + unary_vs_binary_assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128 v128) (result v128) ' \ + '({lane_type}.{op1} ({lane_type}.{op2} (local.get 0) (local.get 1)))' \ + ')' + unary_vs_unary_assert_template = ' (func (export "{lane_type}.{op1}-{lane_type}.{op2}") (param v128) (result v128) ' \ + '({lane_type}.{op1} ({lane_type}.{op2} (local.get 0)))' \ + ')' binary_ops = list(self.BINARY_OPS) binary_ops.reverse() + unary_ops = list(self.UNARY_OPS) + unary_ops.reverse() for op1 in self.BINARY_OPS: for op2 in binary_ops: - funcs += '\n' + assert_template.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2) + funcs += '\n' + binary_vs_binary_assert_template.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2) + for op2 in self.UNARY_OPS: + funcs += '\n' + binary_vs_unary_assert_template.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2) + funcs += '\n' + unary_vs_binary_assert_template.format(lane_type=self.LANE_TYPE, op1=op2, op2=op1) + for op1 in self.UNARY_OPS: + for op2 in unary_ops: + funcs += '\n' + unary_vs_unary_assert_template.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2) funcs += '\n)' return funcs @@ -293,9 +402,11 @@ def gen_test_case_combination(self): binary_ops = list(self.BINARY_OPS) binary_ops.reverse() + unary_ops = list(self.UNARY_OPS) + unary_ops.reverse() for op1 in self.BINARY_OPS: + """binary vs binary""" for op2 in binary_ops: - result = [] ret = IntOp.binary_op(op2, '0', '1', self.lane_width) ret = IntOp.binary_op(op1, ret, '2', self.lane_width) @@ -306,6 +417,36 @@ def gen_test_case_combination(self): SIMD.v128_const('1', self.LANE_TYPE), SIMD.v128_const('2', self.LANE_TYPE)], SIMD.v128_const(result, self.LANE_TYPE))) + for op2 in self.UNARY_OPS: + """binary vs unary""" + result1 = [] + ret1 = IntOp.unary_op(op2, '-1', self.lane_width) + ret1 = IntOp.binary_op(op1, ret1, '0', self.lane_width) + result1.append(ret1) + cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), + [SIMD.v128_const('-1', self.LANE_TYPE), + SIMD.v128_const('0', self.LANE_TYPE)], + SIMD.v128_const(result1, self.LANE_TYPE))) + """unary vs binary""" + result2 = [] + ret2 = IntOp.binary_op(op1, '0', '-1', self.lane_width) + ret2 = IntOp.unary_op(op2, ret2, self.lane_width) + result2.append(ret2) + cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op2, op2=op1), + [SIMD.v128_const('0', self.LANE_TYPE), + SIMD.v128_const('-1', self.LANE_TYPE)], + SIMD.v128_const(result2, self.LANE_TYPE))) + for op1 in self.UNARY_OPS: + """unary vs unary""" + for op2 in unary_ops: + result3 = [] + ret3 = IntOp.unary_op(op1, '-1', self.lane_width) + ret3 = IntOp.unary_op(op2, ret3, self.lane_width) + result3.append(ret3) + cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), + [SIMD.v128_const('-1', self.LANE_TYPE)], + SIMD.v128_const(result3, self.LANE_TYPE))) + cases += '\n' return cases @@ -335,6 +476,13 @@ def gen_test_case_empty_argument(self): case_data['params'] = '' cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + for op in self.UNARY_OPS: + case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + + case_data['extended_name'] = 'arg-empty' + case_data['params'] = '' + cases.append(AssertInvalid.get_arg_empty_test(**case_data)) + return '\n'.join(cases) @property @@ -367,9 +515,9 @@ def gen_test_cases(self): class Simdi32x4Case(SimdLaneWiseInteger): LANE_TYPE = 'i32x4' - class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u] operations.""" + class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u, abs] operations.""" - UNKNOWN_OPS = ('f32x4.min_s', 'f32x4.min_u', 'f32x4.max_s', 'f32x4.max_u', + UNKNOWN_BINARY_OPS = ('f32x4.min_s', 'f32x4.min_u', 'f32x4.max_s', 'f32x4.max_u', 'i64x2.min_s', 'i64x2.min_u', 'i64x2.max_s', 'i64x2.max_u', 'f64x2.min_s', 'f64x2.min_u', 'f64x2.max_s', 'f64x2.max_u') @@ -378,14 +526,15 @@ class Simdi16x8Case(SimdLaneWiseInteger): LANE_TYPE = 'i16x8' BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') - UNKNOWN_OPS = ('i16x8.avgr', 'i16x8.avgr_s') + UNKNOWN_BINARY_OPS = ('i16x8.avgr', 'i16x8.avgr_s') + UNKNOWN_UNARY_OPS = ('i64x2.abs',) class Simdi8x16Case(SimdLaneWiseInteger): LANE_TYPE = 'i8x16' BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') - UNKNOWN_OPS = ('i32x4.avgr_u', 'f32x4.avgr_u', + UNKNOWN_BINARY_OPS = ('i32x4.avgr_u', 'f32x4.avgr_u', 'i64x2.avgr_u', 'f64x2.avgr_u', 'i8x16.avgr', 'i8x16.avgr_s') @@ -402,4 +551,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 4e232ddf5d..a1ea9bf6ed 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -7,14 +7,40 @@ class IntegerSimpleOp: """Common integer simple ops: - min_s, min_u, max_s, max_u + min_s, min_u, max_s, max_u, avgr_u, abs """ @staticmethod + def unary_op(op: str, p: str, lane_width: int) -> str: + """Unary operation on p with the operation specified by op + + :param op: abs + :param p: a hex or decimal integer literal string + :lane_width: bit number of each lane in SIMD v128 + :return: + """ + if '0x' in p: + base = 16 + else: + base = 10 + v = int(p, base) + + if op == 'abs': + result = IntegerSimpleOp.get_valid_value(v, lane_width) + if result >= 0: + return p + else: + if base == 16: + return hex(-result) + else: + return str(-result) + else: + raise Exception('Unknown unary operation') + def binary_op(op: str, p1: str, p2: str, lane_width: int) -> str: """Binary operation on p1 and p2 with the operation specified by op - :param op: min_s, min_u, max_s, max_u + :param op: min_s, min_u, max_s, max_u, avgr_u :param p1: a hex or decimal integer literal string :param p2: a hex or decimal integer literal string :lane_width: bit number of each lane in SIMD v128 diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index 20ee558daf..87c0cc9fdc 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -2322,16 +2322,12 @@ ;; Unknown operators -(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.abs (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.min (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.max (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") diff --git a/test/core/simd/simd_i16x8_arith2.wast b/test/core/simd/simd_i16x8_arith2.wast index 69cb08955a..1522e650c2 100644 --- a/test/core/simd/simd_i16x8_arith2.wast +++ b/test/core/simd/simd_i16x8_arith2.wast @@ -1,4 +1,4 @@ -;; Tests for i16x8 [min_s, min_u, max_s, max_u, avgr_u] operations. +;; Tests for i16x8 [min_s, min_u, max_s, max_u, avgr_u, abs] operations. (module (func (export "i16x8.min_s") (param v128 v128) (result v128) (i16x8.min_s (local.get 0) (local.get 1))) @@ -6,6 +6,7 @@ (func (export "i16x8.max_s") (param v128 v128) (result v128) (i16x8.max_s (local.get 0) (local.get 1))) (func (export "i16x8.max_u") (param v128 v128) (result v128) (i16x8.max_u (local.get 0) (local.get 1))) (func (export "i16x8.avgr_u") (param v128 v128) (result v128) (i16x8.avgr_u (local.get 0) (local.get 1))) + (func (export "i16x8.abs") (param v128) (result v128) (i16x8.abs (local.get 0))) (func (export "i16x8.min_s_with_const_0") (result v128) (i16x8.min_s (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) (func (export "i16x8.min_s_with_const_1") (result v128) (i16x8.min_s (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) (func (export "i16x8.min_u_with_const_2") (result v128) (i16x8.min_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) @@ -16,16 +17,17 @@ (func (export "i16x8.max_u_with_const_7") (result v128) (i16x8.max_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) (func (export "i16x8.avgr_u_with_const_8") (result v128) (i16x8.avgr_u (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535) (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768))) (func (export "i16x8.avgr_u_with_const_9") (result v128) (i16x8.avgr_u (v128.const i16x8 0 0 1 1 2 2 3 3) (v128.const i16x8 3 3 2 2 1 1 0 0))) - (func (export "i16x8.min_s_with_const_10") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.min_s_with_const_11") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.min_u_with_const_12") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.min_u_with_const_13") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.max_s_with_const_14") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.max_s_with_const_15") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.max_u_with_const_16") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.max_u_with_const_17") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) - (func (export "i16x8.avgr_u_with_const_18") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) - (func (export "i16x8.avgr_u_with_const_19") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.abs_with_const_10") (result v128) (i16x8.abs (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_s_with_const_11") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_s_with_const_12") (param v128) (result v128) (i16x8.min_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.min_u_with_const_13") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.min_u_with_const_14") (param v128) (result v128) (i16x8.min_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_s_with_const_15") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_s_with_const_16") (param v128) (result v128) (i16x8.max_s (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.max_u_with_const_17") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.max_u_with_const_18") (param v128) (result v128) (i16x8.max_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) + (func (export "i16x8.avgr_u_with_const_19") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535))) + (func (export "i16x8.avgr_u_with_const_20") (param v128) (result v128) (i16x8.avgr_u (local.get 0) (v128.const i16x8 0 0 1 1 2 2 3 3))) ) (assert_return (invoke "i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -193,6 +195,34 @@ (assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i16x8 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3)) + (v128.const i16x8 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i16x8 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0)) + (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) ;; Const vs const (assert_return (invoke "i16x8.min_s_with_const_0") (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) @@ -205,27 +235,28 @@ (assert_return (invoke "i16x8.max_u_with_const_7") (v128.const i16x8 3 3 2 2 2 2 3 3)) (assert_return (invoke "i16x8.avgr_u_with_const_8") (v128.const i16x8 49152 49152 24576 24576 24576 24576 49152 49152)) (assert_return (invoke "i16x8.avgr_u_with_const_9") (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.abs_with_const_10") (v128.const i16x8 32768 32768 32767 32767 16384 16384 1 1)) ;; Param vs const -(assert_return (invoke "i16x8.min_s_with_const_10" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.min_s_with_const_11" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) -(assert_return (invoke "i16x8.min_s_with_const_11" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.min_s_with_const_12" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 0 0 1 1 1 1 0 0)) -(assert_return (invoke "i16x8.min_u_with_const_12" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.min_u_with_const_13" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 -32768 -32768 16384 16384 16384 16384 -32768 -32768)) -(assert_return (invoke "i16x8.min_u_with_const_13" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.min_u_with_const_14" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 0 0 1 1 1 1 0 0)) -(assert_return (invoke "i16x8.max_s_with_const_14" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.max_s_with_const_15" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) -(assert_return (invoke "i16x8.max_s_with_const_15" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.max_s_with_const_16" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 3 3 2 2 2 2 3 3)) -(assert_return (invoke "i16x8.max_u_with_const_16" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.max_u_with_const_17" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 65535 65535 32767 32767 32767 32767 65535 65535)) -(assert_return (invoke "i16x8.max_u_with_const_17" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.max_u_with_const_18" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 3 3 2 2 2 2 3 3)) -(assert_return (invoke "i16x8.avgr_u_with_const_18" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) +(assert_return (invoke "i16x8.avgr_u_with_const_19" (v128.const i16x8 65535 65535 16384 16384 32767 32767 -32768 -32768)) (v128.const i16x8 49152 49152 24576 24576 24576 24576 49152 49152)) -(assert_return (invoke "i16x8.avgr_u_with_const_19" (v128.const i16x8 3 3 2 2 1 1 0 0)) +(assert_return (invoke "i16x8.avgr_u_with_const_20" (v128.const i16x8 3 3 2 2 1 1 0 0)) (v128.const i16x8 2 2 2 2 2 2 2 2)) ;; Test different lanes go through different if-then clauses @@ -259,6 +290,8 @@ (assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 0 0 1 1 2 2 128 128) (v128.const i16x8 0 0 2 2 1 1 128 128)) (v128.const i16x8 0 0 2 2 2 2 128 128)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -32768 -32768 32767 32767 16384 16384 65535 65535)) + (v128.const i16x8 32768 32768 32767 32767 16384 16384 1 1)) ;; Test opposite signs of zero (assert_return (invoke "i16x8.min_s" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0) @@ -291,10 +324,19 @@ (assert_return (invoke "i16x8.avgr_u" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0) (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) + (v128.const i16x8 -0 -0 -0 -0 +0 +0 +0 +0)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) + (v128.const i16x8 +0 +0 0 0 -0 -0 0 0)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) + (v128.const i16x8 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i16x8.abs" (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i16x8 +0 +0 +0 +0 +0 +0 +0 +0)) ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr_s (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.abs (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)))") "unknown operator") ;; Type check (assert_invalid (module (func (result v128) (i16x8.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") @@ -302,6 +344,7 @@ (assert_invalid (module (func (result v128) (i16x8.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.avgr_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.abs (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -385,6 +428,14 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i16x8.abs-arg-empty (result v128) + (i16x8.abs) + ) + ) + "type mismatch" +) ;; Combination (module @@ -393,26 +444,37 @@ (func (export "i16x8.min_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_s-i16x8.abs") (param v128 v128) (result v128) (i16x8.min_s (i16x8.abs (local.get 0))(local.get 1))) + (func (export "i16x8.abs-i16x8.min_s") (param v128 v128) (result v128) (i16x8.abs (i16x8.min_s (local.get 0) (local.get 1)))) (func (export "i16x8.min_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.min_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.min_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.min_u-i16x8.abs") (param v128 v128) (result v128) (i16x8.min_u (i16x8.abs (local.get 0))(local.get 1))) + (func (export "i16x8.abs-i16x8.min_u") (param v128 v128) (result v128) (i16x8.abs (i16x8.min_u (local.get 0) (local.get 1)))) (func (export "i16x8.max_s-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_s-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_s (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_s-i16x8.abs") (param v128 v128) (result v128) (i16x8.max_s (i16x8.abs (local.get 0))(local.get 1))) + (func (export "i16x8.abs-i16x8.max_s") (param v128 v128) (result v128) (i16x8.abs (i16x8.max_s (local.get 0) (local.get 1)))) (func (export "i16x8.max_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.max_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.max_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.max_u-i16x8.abs") (param v128 v128) (result v128) (i16x8.max_u (i16x8.abs (local.get 0))(local.get 1))) + (func (export "i16x8.abs-i16x8.max_u") (param v128 v128) (result v128) (i16x8.abs (i16x8.max_u (local.get 0) (local.get 1)))) (func (export "i16x8.avgr_u-i16x8.avgr_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.avgr_u-i16x8.max_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.avgr_u-i16x8.max_s") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.avgr_u-i16x8.min_u") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i16x8.avgr_u-i16x8.min_s") (param v128 v128 v128) (result v128) (i16x8.avgr_u (i16x8.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i16x8.avgr_u-i16x8.abs") (param v128 v128) (result v128) (i16x8.avgr_u (i16x8.abs (local.get 0))(local.get 1))) + (func (export "i16x8.abs-i16x8.avgr_u") (param v128 v128) (result v128) (i16x8.abs (i16x8.avgr_u (local.get 0) (local.get 1)))) + (func (export "i16x8.abs-i16x8.abs") (param v128) (result v128) (i16x8.abs (i16x8.abs (local.get 0)))) ) (assert_return (invoke "i16x8.min_s-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) @@ -435,6 +497,12 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_s-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.abs-i16x8.min_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) (assert_return (invoke "i16x8.min_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -455,6 +523,12 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.min_u-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.abs-i16x8.min_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8.max_s-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -475,6 +549,12 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_s-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs-i16x8.max_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) (assert_return (invoke "i16x8.max_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -495,6 +575,12 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.max_u-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs-i16x8.max_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) (assert_return (invoke "i16x8.avgr_u-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) @@ -515,3 +601,11 @@ (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)) (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.avgr_u-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.abs-i16x8.avgr_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.abs-i16x8.abs" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) diff --git a/test/core/simd/simd_i32x4_arith2.wast b/test/core/simd/simd_i32x4_arith2.wast index 1e14c3a772..63c3f4a42c 100644 --- a/test/core/simd/simd_i32x4_arith2.wast +++ b/test/core/simd/simd_i32x4_arith2.wast @@ -1,10 +1,11 @@ -;; Tests for i32x4 [min_s, min_u, max_s, max_u] operations. +;; Tests for i32x4 [min_s, min_u, max_s, max_u, abs] operations. (module (func (export "i32x4.min_s") (param v128 v128) (result v128) (i32x4.min_s (local.get 0) (local.get 1))) (func (export "i32x4.min_u") (param v128 v128) (result v128) (i32x4.min_u (local.get 0) (local.get 1))) (func (export "i32x4.max_s") (param v128 v128) (result v128) (i32x4.max_s (local.get 0) (local.get 1))) (func (export "i32x4.max_u") (param v128 v128) (result v128) (i32x4.max_u (local.get 0) (local.get 1))) + (func (export "i32x4.abs") (param v128) (result v128) (i32x4.abs (local.get 0))) (func (export "i32x4.min_s_with_const_0") (result v128) (i32x4.min_s (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) (func (export "i32x4.min_s_with_const_1") (result v128) (i32x4.min_s (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) (func (export "i32x4.min_u_with_const_2") (result v128) (i32x4.min_u (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) @@ -13,14 +14,15 @@ (func (export "i32x4.max_s_with_const_5") (result v128) (i32x4.max_s (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) (func (export "i32x4.max_u_with_const_6") (result v128) (i32x4.max_u (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295) (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648))) (func (export "i32x4.max_u_with_const_7") (result v128) (i32x4.max_u (v128.const i32x4 0 1 2 3) (v128.const i32x4 3 2 1 0))) - (func (export "i32x4.min_s_with_const_8") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) - (func (export "i32x4.min_s_with_const_9") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 0 1 2 3))) - (func (export "i32x4.min_u_with_const_10") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) - (func (export "i32x4.min_u_with_const_11") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 0 1 2 3))) - (func (export "i32x4.max_s_with_const_12") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) - (func (export "i32x4.max_s_with_const_13") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 0 1 2 3))) - (func (export "i32x4.max_u_with_const_14") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) - (func (export "i32x4.max_u_with_const_15") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.abs_with_const_8") (result v128) (i32x4.abs (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.min_s_with_const_9") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.min_s_with_const_10") (param v128) (result v128) (i32x4.min_s (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.min_u_with_const_11") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.min_u_with_const_12") (param v128) (result v128) (i32x4.min_u (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.max_s_with_const_13") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.max_s_with_const_14") (param v128) (result v128) (i32x4.max_s (local.get 0) (v128.const i32x4 0 1 2 3))) + (func (export "i32x4.max_u_with_const_15") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295))) + (func (export "i32x4.max_u_with_const_16") (param v128) (result v128) (i32x4.max_u (local.get 0) (v128.const i32x4 0 1 2 3))) ) (assert_return (invoke "i32x4.min_s" (v128.const i32x4 0 0 0 0) @@ -155,6 +157,34 @@ (assert_return (invoke "i32x4.max_u" (v128.const i32x4 0x80 0x80 0x80 0x80) (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) + (v128.const i32x4 0x1 0x1 0x1 0x1)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -0x80000000 -0x80000000 -0x80000000 -0x80000000)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) + (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i32x4 01_2_3 01_2_3 01_2_3 01_2_3)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -01_2_3 -01_2_3 -01_2_3 -01_2_3)) + (v128.const i32x4 123 123 123 123)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 0x80 0x80 0x80 0x80)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -0x80 -0x80 -0x80 -0x80)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i32x4 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0)) + (v128.const i32x4 0x80 0x80 0x80 0x80)) ;; Const vs const (assert_return (invoke "i32x4.min_s_with_const_0") (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) @@ -165,23 +195,24 @@ (assert_return (invoke "i32x4.max_s_with_const_5") (v128.const i32x4 3 2 2 3)) (assert_return (invoke "i32x4.max_u_with_const_6") (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) (assert_return (invoke "i32x4.max_u_with_const_7") (v128.const i32x4 3 2 2 3)) +(assert_return (invoke "i32x4.abs_with_const_8") (v128.const i32x4 2147483648 2147483647 1073741824 1)) ;; Param vs const -(assert_return (invoke "i32x4.min_s_with_const_8" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) +(assert_return (invoke "i32x4.min_s_with_const_9" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) -(assert_return (invoke "i32x4.min_s_with_const_9" (v128.const i32x4 3 2 1 0)) - (v128.const i32x4 0 1 1 0)) -(assert_return (invoke "i32x4.min_u_with_const_10" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) +(assert_return (invoke "i32x4.min_s_with_const_10" (v128.const i32x4 3 2 1 0)) + (v128.const i32x4 0 1 1 0)) +(assert_return (invoke "i32x4.min_u_with_const_11" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) (v128.const i32x4 -2147483648 1073741824 1073741824 -2147483648)) -(assert_return (invoke "i32x4.min_u_with_const_11" (v128.const i32x4 3 2 1 0)) +(assert_return (invoke "i32x4.min_u_with_const_12" (v128.const i32x4 3 2 1 0)) (v128.const i32x4 0 1 1 0)) -(assert_return (invoke "i32x4.max_s_with_const_12" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) +(assert_return (invoke "i32x4.max_s_with_const_13" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) -(assert_return (invoke "i32x4.max_s_with_const_13" (v128.const i32x4 3 2 1 0)) +(assert_return (invoke "i32x4.max_s_with_const_14" (v128.const i32x4 3 2 1 0)) (v128.const i32x4 3 2 2 3)) -(assert_return (invoke "i32x4.max_u_with_const_14" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) +(assert_return (invoke "i32x4.max_u_with_const_15" (v128.const i32x4 4294967295 1073741824 2147483647 -2147483648)) (v128.const i32x4 4294967295 2147483647 2147483647 4294967295)) -(assert_return (invoke "i32x4.max_u_with_const_15" (v128.const i32x4 3 2 1 0)) +(assert_return (invoke "i32x4.max_u_with_const_16" (v128.const i32x4 3 2 1 0)) (v128.const i32x4 3 2 2 3)) ;; Test different lanes go through different if-then clauses @@ -209,6 +240,8 @@ (assert_return (invoke "i32x4.max_u" (v128.const i32x4 0 1 2 128) (v128.const i32x4 0 2 1 128)) (v128.const i32x4 0 2 2 128)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -2147483648 2147483647 1073741824 4294967295)) + (v128.const i32x4 2147483648 2147483647 1073741824 1)) ;; Test opposite signs of zero (assert_return (invoke "i32x4.min_s" (v128.const i32x4 -0 -0 +0 +0) @@ -235,6 +268,14 @@ (assert_return (invoke "i32x4.max_u" (v128.const i32x4 -0 -0 -0 -0) (v128.const i32x4 +0 +0 +0 +0)) (v128.const i32x4 -0 -0 -0 -0)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -0 -0 +0 +0)) + (v128.const i32x4 -0 -0 +0 +0)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 +0 0 -0 0)) + (v128.const i32x4 +0 0 -0 0)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 -0 -0 -0 -0)) + (v128.const i32x4 -0 -0 -0 -0)) +(assert_return (invoke "i32x4.abs" (v128.const i32x4 +0 +0 +0 +0)) + (v128.const i32x4 +0 +0 +0 +0)) ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (result v128) (f32x4.min_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1)))") "unknown operator") @@ -255,6 +296,7 @@ (assert_invalid (module (func (result v128) (i32x4.min_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i32x4.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i32x4.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.abs (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -322,6 +364,14 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i32x4.abs-arg-empty (result v128) + (i32x4.abs) + ) + ) + "type mismatch" +) ;; Combination (module @@ -329,18 +379,27 @@ (func (export "i32x4.min_s-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.min_s-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.min_s-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.min_s (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_s-i32x4.abs") (param v128 v128) (result v128) (i32x4.min_s (i32x4.abs (local.get 0))(local.get 1))) + (func (export "i32x4.abs-i32x4.min_s") (param v128 v128) (result v128) (i32x4.abs (i32x4.min_s (local.get 0) (local.get 1)))) (func (export "i32x4.min_u-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.min_u-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.min_u-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.min_u-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.min_u (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.min_u-i32x4.abs") (param v128 v128) (result v128) (i32x4.min_u (i32x4.abs (local.get 0))(local.get 1))) + (func (export "i32x4.abs-i32x4.min_u") (param v128 v128) (result v128) (i32x4.abs (i32x4.min_u (local.get 0) (local.get 1)))) (func (export "i32x4.max_s-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_s-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_s-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_s-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.max_s (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_s-i32x4.abs") (param v128 v128) (result v128) (i32x4.max_s (i32x4.abs (local.get 0))(local.get 1))) + (func (export "i32x4.abs-i32x4.max_s") (param v128 v128) (result v128) (i32x4.abs (i32x4.max_s (local.get 0) (local.get 1)))) (func (export "i32x4.max_u-i32x4.max_u") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_u-i32x4.max_s") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_u-i32x4.min_u") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i32x4.max_u-i32x4.min_s") (param v128 v128 v128) (result v128) (i32x4.max_u (i32x4.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i32x4.max_u-i32x4.abs") (param v128 v128) (result v128) (i32x4.max_u (i32x4.abs (local.get 0))(local.get 1))) + (func (export "i32x4.abs-i32x4.max_u") (param v128 v128) (result v128) (i32x4.abs (i32x4.max_u (local.get 0) (local.get 1)))) + (func (export "i32x4.abs-i32x4.abs") (param v128) (result v128) (i32x4.abs (i32x4.abs (local.get 0)))) ) (assert_return (invoke "i32x4.min_s-i32x4.max_u" (v128.const i32x4 0 0 0 0) @@ -359,6 +418,12 @@ (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_s-i32x4.abs" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.abs-i32x4.min_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) (assert_return (invoke "i32x4.min_u-i32x4.max_u" (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) @@ -375,6 +440,12 @@ (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.min_u-i32x4.abs" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.abs-i32x4.min_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.max_s-i32x4.max_u" (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) @@ -391,6 +462,12 @@ (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_s-i32x4.abs" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs-i32x4.max_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.max_u-i32x4.max_u" (v128.const i32x4 0 0 0 0) (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) @@ -407,3 +484,11 @@ (v128.const i32x4 1 1 1 1) (v128.const i32x4 2 2 2 2)) (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.max_u-i32x4.abs" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs-i32x4.max_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.abs-i32x4.abs" (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) diff --git a/test/core/simd/simd_i8x16_arith2.wast b/test/core/simd/simd_i8x16_arith2.wast index 290b0a7c1f..02c97a838c 100644 --- a/test/core/simd/simd_i8x16_arith2.wast +++ b/test/core/simd/simd_i8x16_arith2.wast @@ -1,4 +1,4 @@ -;; Tests for i8x16 [min_s, min_u, max_s, max_u, avgr_u] operations. +;; Tests for i8x16 [min_s, min_u, max_s, max_u, avgr_u, abs] operations. (module (func (export "i8x16.min_s") (param v128 v128) (result v128) (i8x16.min_s (local.get 0) (local.get 1))) @@ -6,6 +6,7 @@ (func (export "i8x16.max_s") (param v128 v128) (result v128) (i8x16.max_s (local.get 0) (local.get 1))) (func (export "i8x16.max_u") (param v128 v128) (result v128) (i8x16.max_u (local.get 0) (local.get 1))) (func (export "i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.avgr_u (local.get 0) (local.get 1))) + (func (export "i8x16.abs") (param v128) (result v128) (i8x16.abs (local.get 0))) (func (export "i8x16.min_s_with_const_0") (result v128) (i8x16.min_s (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.min_s_with_const_1") (result v128) (i8x16.min_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.min_u_with_const_2") (result v128) (i8x16.min_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) @@ -16,16 +17,17 @@ (func (export "i8x16.max_u_with_const_7") (result v128) (i8x16.max_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.avgr_u_with_const_8") (result v128) (i8x16.avgr_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.avgr_u_with_const_9") (result v128) (i8x16.avgr_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) - (func (export "i8x16.min_s_with_const_10") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_s_with_const_11") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.min_u_with_const_12") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_u_with_const_13") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_s_with_const_14") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_s_with_const_15") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_u_with_const_16") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_u_with_const_17") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.avgr_u_with_const_18") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.avgr_u_with_const_19") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.abs_with_const_10") (result v128) (i8x16.abs (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_11") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_12") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.min_u_with_const_13") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_u_with_const_14") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_s_with_const_15") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_s_with_const_16") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_u_with_const_17") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_u_with_const_18") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.avgr_u_with_const_19") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.avgr_u_with_const_20") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) ) (assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) @@ -193,6 +195,34 @@ (assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3)) + (v128.const i8x16 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123 123)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) ;; Const vs const (assert_return (invoke "i8x16.min_s_with_const_0") (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) @@ -205,27 +235,28 @@ (assert_return (invoke "i8x16.max_u_with_const_7") (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) (assert_return (invoke "i8x16.avgr_u_with_const_8") (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) (assert_return (invoke "i8x16.avgr_u_with_const_9") (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.abs_with_const_10") (v128.const i8x16 128 128 128 128 127 127 127 127 64 64 64 64 1 1 1 1)) ;; Param vs const -(assert_return (invoke "i8x16.min_s_with_const_10" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s_with_const_11" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_s_with_const_11" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_s_with_const_12" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.min_u_with_const_12" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_13" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_u_with_const_13" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_u_with_const_14" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.max_s_with_const_14" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.max_s_with_const_15" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_s_with_const_15" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_16" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) -(assert_return (invoke "i8x16.max_u_with_const_16" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.max_u_with_const_17" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_u_with_const_17" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_u_with_const_18" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) -(assert_return (invoke "i8x16.avgr_u_with_const_18" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.avgr_u_with_const_19" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) -(assert_return (invoke "i8x16.avgr_u_with_const_19" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.avgr_u_with_const_20" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) ;; Test different lanes go through different if-then clauses @@ -259,6 +290,8 @@ (assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 128 128 128 128) (v128.const i8x16 0 0 0 0 2 2 2 2 1 1 1 1 128 128 128 128)) (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255)) + (v128.const i8x16 128 128 128 128 127 127 127 127 64 64 64 64 1 1 1 1)) ;; Test opposite signs of zero (assert_return (invoke "i8x16.min_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) @@ -291,6 +324,14 @@ (assert_return (invoke "i8x16.avgr_u" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0) (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) + (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) +(assert_return (invoke "i8x16.abs" (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") @@ -306,6 +347,7 @@ (assert_invalid (module (func (result v128) (i8x16.max_s (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.avgr_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.abs (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -389,6 +431,14 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i8x16.abs-arg-empty (result v128) + (i8x16.abs) + ) + ) + "type mismatch" +) ;; Combination (module @@ -397,26 +447,37 @@ (func (export "i8x16.min_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_s-i8x16.abs") (param v128 v128) (result v128) (i8x16.min_s (i8x16.abs (local.get 0))(local.get 1))) + (func (export "i8x16.abs-i8x16.min_s") (param v128 v128) (result v128) (i8x16.abs (i8x16.min_s (local.get 0) (local.get 1)))) (func (export "i8x16.min_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.min_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.min_u (i8x16.abs (local.get 0))(local.get 1))) + (func (export "i8x16.abs-i8x16.min_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.min_u (local.get 0) (local.get 1)))) (func (export "i8x16.max_s-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_s-i8x16.abs") (param v128 v128) (result v128) (i8x16.max_s (i8x16.abs (local.get 0))(local.get 1))) + (func (export "i8x16.abs-i8x16.max_s") (param v128 v128) (result v128) (i8x16.abs (i8x16.max_s (local.get 0) (local.get 1)))) (func (export "i8x16.max_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.max_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.max_u (i8x16.abs (local.get 0))(local.get 1))) + (func (export "i8x16.abs-i8x16.max_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.max_u (local.get 0) (local.get 1)))) (func (export "i8x16.avgr_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.min_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.min_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) + (func (export "i8x16.avgr_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.avgr_u (i8x16.abs (local.get 0))(local.get 1))) + (func (export "i8x16.abs-i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.avgr_u (local.get 0) (local.get 1)))) + (func (export "i8x16.abs-i8x16.abs") (param v128) (result v128) (i8x16.abs (i8x16.abs (local.get 0)))) ) (assert_return (invoke "i8x16.min_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) @@ -439,6 +500,12 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_s-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.abs-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) (assert_return (invoke "i8x16.min_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -459,6 +526,12 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.abs-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16.max_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -479,6 +552,12 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_s-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16.max_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -499,6 +578,12 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.max_u-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) (assert_return (invoke "i8x16.avgr_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -519,3 +604,11 @@ (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.avgr_u-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.abs-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) From d4c09c3840d9dece483fd78d6def9d39907152b2 Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 11 Mar 2020 11:24:04 +0800 Subject: [PATCH 133/378] Fixed multiple tables error in simd_const.wast Fixed @binji's comment at https://github.com/WebAssembly/simd/pull/132#commitcomment-37757400 --- test/core/simd/simd_const.wast | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index ebc734c6a9..41fb608d88 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -909,13 +909,6 @@ (func (export "as-call-param") (result v128) (call $f (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3)) ) - (type $sig (func (param v128 v128 v128) (result v128))) - (table funcref (elem $f)) - (func (export "as-call_indirect-param") (result v128) - (call_indirect (type $sig) - (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (i32.const 0) - ) - ) (func (export "as-block-retval") (result v128) (block (result v128) (v128.const i32x4 0 1 2 3)) ) @@ -951,11 +944,17 @@ (func (export "as-call-param2") (result v128) (call $f2 (v128.const i64x2 0 1) (v128.const i64x2 0 1) (v128.const i64x2 0 1)) ) - (type $sig2 (func (param v128 v128 v128) (result v128))) - (table funcref (elem $f2)) + + (type $sig (func (param v128 v128 v128) (result v128))) + (table funcref (elem $f $f2)) + (func (export "as-call_indirect-param") (result v128) + (call_indirect (type $sig) + (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (v128.const i32x4 0 1 2 3) (i32.const 0) + ) + ) (func (export "as-call_indirect-param2") (result v128) - (call_indirect (type $sig2) - (v128.const i64x2 0 1) (v128.const i64x2 0 1) (v128.const i64x2 0 1) (i32.const 0) + (call_indirect (type $sig) + (v128.const i64x2 0 1) (v128.const i64x2 0 1) (v128.const i64x2 0 1) (i32.const 1) ) ) (func (export "as-block-retval2") (result v128) @@ -986,6 +985,7 @@ (assert_return (invoke "as-if-then-retval2") (v128.const i64x2 0 1)) (assert_return (invoke "as-if-else-retval2") (v128.const i64x2 1 0)) (assert_return (invoke "as-call-param2") (v128.const i64x2 0 1)) +(assert_return (invoke "as-call_indirect-param2") (v128.const i64x2 0 1)) (assert_return (invoke "as-block-retval2") (v128.const i64x2 0 1)) (assert_return (invoke "as-loop-retval2") (v128.const i64x2 0 1)) (assert_return (invoke "as-drop-operand2")) From 2c3e8e151bed7c64a55260b1abccf19c976d6349 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Wed, 18 Mar 2020 17:55:28 -0700 Subject: [PATCH 134/378] Add a motivation section to SIMD.md (#205) --- proposals/simd/SIMD.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 24739ec4a1..bfc81d5c71 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -6,6 +6,21 @@ current popular instruction set architectures. See also [The binary encoding of SIMD instructions](BinarySIMD.md). +## Motivation + +WebAssembly aims to take advantage of [common hardware capabilities](https://github.com/WebAssembly/design/blob/master/Portability.md#assumptions-for-efficient-execution) +for near native speed. The motivation for this proposal is to introduce +WebAssembly operations that map to commonly available [SIMD](https://en.wikipedia.org/wiki/SIMD) +instructions in hardware. + +SIMD instructions in hardware work by performing simultaneous computations over +packed data in one instruction. These are commonly used to improve performance +for multimedia applications. The set of SIMD instructions in hardware is large, +and varies across different versions of hardware. This proposal is comprised +of a portable subset of operations that in most cases map to commonly used +instructions in mordern hardware. + + # Types WebAssembly is extended with a new `v128` value type and a number of new kinds From ecf0b5d0d383a30e52eddcc2f006dfe344de11b0 Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Mon, 23 Mar 2020 13:11:22 -0700 Subject: [PATCH 135/378] Update integer abs LLVM implementation status --- proposals/simd/ImplementationStatus.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 437f2cb55b..9874e10e14 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -92,7 +92,7 @@ | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.abs` | | | :heavy_check_mark: | | +| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -111,7 +111,7 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.abs` | | | :heavy_check_mark: | | +| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -125,7 +125,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.abs` | | | :heavy_check_mark: | | +| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -176,7 +176,7 @@ | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -[1] Tip of tree LLVM as of February 7, 2020 +[1] Tip of tree LLVM as of March 23, 2020 [2] Tested on V8 8.1.0 (candidate). Requires flag `--experimental-wasm-simd` From 68d23f85a0bb656a5a5fcdf682a3a63bb8a8d998 Mon Sep 17 00:00:00 2001 From: Arseny Kapoulkine Date: Tue, 24 Mar 2020 12:07:26 -0700 Subject: [PATCH 136/378] Mark f32x4.sqrt as implemented in v8 (#206) Unsure why this was marked as unimplemented but it definitely works in Chrome stable. --- proposals/simd/ImplementationStatus.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 9874e10e14..b480297185 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -135,7 +135,7 @@ | `i64x2.mul` | | | :heavy_check_mark: | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | From 2487969ef7d901adaaefb56dca83a6d14364c2bd Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Wed, 1 Apr 2020 06:19:11 +0800 Subject: [PATCH 137/378] [test] Fixed mismatched op names in comments (#207) Pulled from https://github.com/WAVM/WAVM/pull/269 --- test/core/simd/meta/simd_f32x4.py | 1 + test/core/simd/meta/simd_f64x2.py | 1 + test/core/simd/simd_f32x4.wast | 8 ++++---- test/core/simd/simd_f64x2.wast | 8 ++++---- 4 files changed, 10 insertions(+), 8 deletions(-) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 76b689f848..6ad7a6b569 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -192,6 +192,7 @@ def gen_test_func_template(self): # Add test for operations with constant operands for key in lst_oprt_with_const_assert: + op_name = self.full_op_name(key) case_cnt = 0 for case_data in lst_oprt_with_const_assert[key]: diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 18d3036fd8..44fa763ac3 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -209,6 +209,7 @@ def gen_test_func_template(self): # Add test for operations with constant operands for key in const_test_data: + op_name = self.full_op_name(key) case_cnt = 0 for case_data in const_test_data[key]: diff --git a/test/core/simd/simd_f32x4.wast b/test/core/simd/simd_f32x4.wast index 87c0cc9fdc..819db8cfd1 100644 --- a/test/core/simd/simd_f32x4.wast +++ b/test/core/simd/simd_f32x4.wast @@ -29,12 +29,12 @@ (func (export "f32x4.abs_with_const") (result v128) (f32x4.abs (v128.const f32x4 -0 -1 -2 -3))) ) -;; f32x4.abs const vs const +;; f32x4.min const vs const (assert_return (invoke "f32x4.min_with_const_0") (v128.const f32x4 0 1 1 -3)) (assert_return (invoke "f32x4.min_with_const_1") (v128.const f32x4 0 1 2 3)) (assert_return (invoke "f32x4.min_with_const_2") (v128.const f32x4 0x00 0x01 0x01 0x80000000)) (assert_return (invoke "f32x4.min_with_const_3") (v128.const f32x4 0x00 0x01 0x02 0x80000000)) -;; f32x4.abs param vs const +;; f32x4.min param vs const (assert_return (invoke "f32x4.min_with_const_5" (v128.const f32x4 0 2 1 3)) (v128.const f32x4 0 1 1 -3)) (assert_return (invoke "f32x4.min_with_const_6" (v128.const f32x4 0 1 2 3)) @@ -43,12 +43,12 @@ (v128.const f32x4 0x00 0x01 0x01 0x80000000)) (assert_return (invoke "f32x4.min_with_const_8" (v128.const f32x4 0x00 0x01 0x02 0x80000000)) (v128.const f32x4 0x00 0x01 0x02 0x80000000)) -;; f32x4.abs const vs const +;; f32x4.max const vs const (assert_return (invoke "f32x4.max_with_const_10") (v128.const f32x4 0 2 2 3)) (assert_return (invoke "f32x4.max_with_const_11") (v128.const f32x4 0 1 2 3)) (assert_return (invoke "f32x4.max_with_const_12") (v128.const f32x4 0x00 0x02 0x02 2147483648)) (assert_return (invoke "f32x4.max_with_const_13") (v128.const f32x4 0x00 0x01 0x02 0x80000000)) -;; f32x4.abs param vs const +;; f32x4.max param vs const (assert_return (invoke "f32x4.max_with_const_15" (v128.const f32x4 0 2 1 3)) (v128.const f32x4 0 2 2 3)) (assert_return (invoke "f32x4.max_with_const_16" (v128.const f32x4 0 1 2 3)) diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index a237a16eb7..3051d45079 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -46,12 +46,12 @@ (func (export "f64x2.abs_with_const_36") (result v128) (f64x2.abs (v128.const f64x2 -2 -3))) ) -;; f64x2.abs const vs const +;; f64x2.min const vs const (assert_return (invoke "f64x2.min_with_const_0") (v128.const f64x2 0 1)) (assert_return (invoke "f64x2.min_with_const_1") (v128.const f64x2 1 -3)) (assert_return (invoke "f64x2.min_with_const_2") (v128.const f64x2 0 1)) (assert_return (invoke "f64x2.min_with_const_3") (v128.const f64x2 2 3)) -;; f64x2.abs param vs const +;; f64x2.min param vs const (assert_return (invoke "f64x2.min_with_const_4") (v128.const f64x2 0x00 0x01)) (assert_return (invoke "f64x2.min_with_const_5") (v128.const f64x2 0x01 0x80000000)) (assert_return (invoke "f64x2.min_with_const_6") (v128.const f64x2 0x00 0x01)) @@ -72,12 +72,12 @@ (v128.const f64x2 0x00 0x01)) (assert_return (invoke "f64x2.min_with_const_16" (v128.const f64x2 0x02 0x80000000)) (v128.const f64x2 0x02 0x80000000)) -;; f64x2.abs const vs const +;; f64x2.max const vs const (assert_return (invoke "f64x2.max_with_const_18") (v128.const f64x2 0 2)) (assert_return (invoke "f64x2.max_with_const_19") (v128.const f64x2 2 3)) (assert_return (invoke "f64x2.max_with_const_20") (v128.const f64x2 0 1)) (assert_return (invoke "f64x2.max_with_const_21") (v128.const f64x2 2 3)) -;; f64x2.abs param vs const +;; f64x2.max param vs const (assert_return (invoke "f64x2.max_with_const_22") (v128.const f64x2 0x00 0x02)) (assert_return (invoke "f64x2.max_with_const_23") (v128.const f64x2 0x02 2147483648)) (assert_return (invoke "f64x2.max_with_const_24") (v128.const f64x2 0x00 0x01)) From 8c9854f299bbe5f551a57f2e90d3295b5ac3f55e Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Sat, 4 Apr 2020 05:26:09 +0800 Subject: [PATCH 138/378] [test] Optimize test generation tool (#208) - Centeralize integer arithmetic ops in one place - Remove LaneNumber class as which is duplicated with simd_lane_value.py Pulled from https://github.com/WAVM/WAVM/pull/268 --- test/core/simd/meta/simd_arithmetic.py | 138 +-------------- test/core/simd/meta/simd_int_arith2.py | 38 ++-- test/core/simd/meta/simd_integer_op.py | 232 +++++++++++++++++-------- 3 files changed, 191 insertions(+), 217 deletions(-) diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index 3ad596ebcb..8fb0b17a11 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -8,154 +8,32 @@ combined cases. Subclasses only provide the test data sets. In some special cases, you may need to override the methods in base class to fulfill your case generation. - -Class LaneNumber and ArithmeticOp are used for calculating the results of -these arithmetic and saturate arithmetic operations. """ from simd import SIMD from test_assert import AssertReturn, AssertInvalid +from simd_lane_value import LaneValue +from simd_integer_op import ArithmeticOp -class LaneNumber: - """This class stands for the number represented by a line in v128. - Suppose a bit length of the lane is n, then: - For signed integer: - minimum = -pow(2, n - 1), maximum = pow(2, n - 1) - 1 - For unsigned integer: - minimum = 0, maximum = pow(2, n) - 1 - The bit length of the lane can be 8, 16, 32, 64""" - def __init__(self, length): - """length: bit number of each lane in SIMD v128""" - self.lane_len = length - - @property - def min(self): - return -pow(2, self.lane_len - 1) - - @property - def max(self): - return pow(2, self.lane_len - 1) - 1 - - @property - def mask(self): - return pow(2, self.lane_len) - 1 - - @property - def mod(self): - return pow(2, self.lane_len) - - @property - def quarter(self): - return pow(2, self.lane_len - 2) - - -i8 = LaneNumber(8) -i16 = LaneNumber(16) -i32 = LaneNumber(32) -i64 = LaneNumber(64) - - -class ArithmeticOp: - """This class stands for an SIMD integer operator, with one or - more operands. The methods are some kind of arithmetic with the - operands. - """ - def __init__(self, op): - self.op = op - - @staticmethod - def get_valid_lane(value, lane): - """Get the valid integer number of value in the specified lane size. - """ - value &= lane.mask - if value > lane.max: - return value - lane.mod - if value < lane.min: - return value + lane.mod - return value - - def saturate(self, p1, p2, lane): - """Get the result of saturate arithmetic operation of 2 operands. - Supports both signed and unsigned number. - """ - if self.op.endswith('saturate_s'): - if p1 > lane.max: - p1 -= lane.mod - if p2 > lane.max: - p2 -= lane.mod - - if self.op.startswith('add'): - value = p1 + p2 - if self.op.startswith('sub'): - value = p1 - p2 - - if value > lane.max: - return lane.max - if value < lane.min: - return lane.min - - if self.op.endswith('saturate_u'): - if p1 < 0: - p1 += lane.mod - if p2 < 0: - p2 += lane.mod - if self.op.startswith('add'): - value = p1 + p2 - if self.op.startswith('sub'): - value = p1 - p2 - - if value > lane.mask: - return lane.mask - if value < 0: - return 0 - - return value - - def unary_op(self, p, lane): - """General unary arithmetic operation.""" - if isinstance(p, str) and '0x' in p: - p = int(p, base=16) - if self.op == 'neg': - value = -p - return self.get_valid_lane(value, lane) - - def binary_op(self, p1, p2, lane, float_repr=False): - """General binary arithmetic operation for 2 numbers.""" - if isinstance(p1, str) and '0x' in p1: - p1 = int(p1, base=16) - if isinstance(p2, str) and '0x' in p2: - p2 = int(p2, base=16) - - if float_repr: - p2 &= lane.mask - - if self.op == 'add': - value = (p1 + p2) - elif self.op == 'sub': - value = (p1 - p2) - elif self.op == 'mul': - value = (p1 * p2) - elif 'saturate' in self.op: - return self.saturate(p1, p2, lane) - else: - raise Exception('Unsupported operator: %s' % self.op) - - return self.get_valid_lane(value, lane) +i8 = LaneValue(8) +i16 = LaneValue(16) +i32 = LaneValue(32) +i64 = LaneValue(64) class SimdArithmeticCase: UNARY_OPS = ('neg',) BINARY_OPS = ('add', 'sub', 'mul') - LANE_NUMBER = {'i8x16': i8, 'i16x8': i16, 'i32x4': i32, 'i64x2': i64} + LANE_VALUE = {'i8x16': i8, 'i16x8': i16, 'i32x4': i32, 'i64x2': i64} def __str__(self): return self.get_all_cases() @property def lane(self): - return self.LANE_NUMBER.get(self.LANE_TYPE) + return self.LANE_VALUE.get(self.LANE_TYPE) @property def normal_unary_op_test_data(self): diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index c892a71c14..a682a4e3dc 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -7,7 +7,7 @@ from simd import SIMD from test_assert import AssertReturn, AssertInvalid, AssertMalformed from simd_lane_value import LaneValue -from simd_integer_op import IntegerSimpleOp as IntOp +from simd_integer_op import ArithmeticOp class SimdLaneWiseInteger: @@ -239,20 +239,22 @@ def gen_test_case_with_const(self): cnt = 0 cases = '\n\n;; Const vs const' for op in self.BINARY_OPS: + o = ArithmeticOp(op) for param_1, param_2 in self.get_binary_test_data_with_const: result = [] for idx in range(0, len(param_1)): - result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + result.append(o.binary_op(param_1[idx], param_2[idx], self.LANE_VALUE)) cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), [], SIMD.v128_const(result, self.LANE_TYPE))) cnt += 1 for op in self.UNARY_OPS: + o = ArithmeticOp(op) for param in self.get_unary_complex_test_data: result = [] for idx in range(0, len(param)): - result.append(IntOp.unary_op(op, param[idx], self.lane_width)) + result.append(o.unary_op(param[idx], self.LANE_VALUE)) cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), [], SIMD.v128_const(result, self.LANE_TYPE))) @@ -260,10 +262,11 @@ def gen_test_case_with_const(self): cases += '\n\n;; Param vs const' for op in self.BINARY_OPS: + o = ArithmeticOp(op) for param_1, param_2 in self.get_binary_test_data_with_const: result = [] for idx in range(0, len(param_1)): - result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + result.append(o.binary_op(param_1[idx], param_2[idx], self.LANE_VALUE)) cases += '\n' + str(AssertReturn('{lane_type}.{op}_with_const_{cnt}'.format(lane_type=self.LANE_TYPE, op=op, cnt=cnt), [SIMD.v128_const(param_2, self.LANE_TYPE)], SIMD.v128_const(result, self.LANE_TYPE))) @@ -279,10 +282,11 @@ def gen_test_case(self): def gen_binary(case_data): cases = '' for op in self.BINARY_OPS: + o = ArithmeticOp(op) for param_1, param_2 in case_data: result = [] for idx in range(0, len(param_1)): - result.append(IntOp.binary_op(op, param_1[idx], param_2[idx], self.lane_width)) + result.append(o.binary_op(param_1[idx], param_2[idx], self.LANE_VALUE)) cases += '\n' + str(AssertReturn('{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op), [SIMD.v128_const(param_1, self.LANE_TYPE), SIMD.v128_const(param_2, self.LANE_TYPE)], SIMD.v128_const(result, self.LANE_TYPE))) @@ -291,10 +295,11 @@ def gen_binary(case_data): def gen_unary(case_data): cases = '' for op in self.UNARY_OPS: + o = ArithmeticOp(op) for param in case_data: result = [] for idx in range(0, len(param)): - result.append(IntOp.unary_op(op, param[idx], self.lane_width)) + result.append(o.unary_op(param[idx], self.LANE_VALUE)) cases += '\n' + str(AssertReturn('{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op), [SIMD.v128_const(param, self.LANE_TYPE)], SIMD.v128_const(result, self.LANE_TYPE))) @@ -406,10 +411,12 @@ def gen_test_case_combination(self): unary_ops.reverse() for op1 in self.BINARY_OPS: """binary vs binary""" + o1 = ArithmeticOp(op1) for op2 in binary_ops: + o2 = ArithmeticOp(op2) result = [] - ret = IntOp.binary_op(op2, '0', '1', self.lane_width) - ret = IntOp.binary_op(op1, ret, '2', self.lane_width) + ret = o2.binary_op('0', '1', self.LANE_VALUE) + ret = o1.binary_op(ret, '2', self.LANE_VALUE) result.append(ret) cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), @@ -419,9 +426,10 @@ def gen_test_case_combination(self): SIMD.v128_const(result, self.LANE_TYPE))) for op2 in self.UNARY_OPS: """binary vs unary""" + o2 = ArithmeticOp(op2) result1 = [] - ret1 = IntOp.unary_op(op2, '-1', self.lane_width) - ret1 = IntOp.binary_op(op1, ret1, '0', self.lane_width) + ret1 = o2.unary_op('-1', self.LANE_VALUE) + ret1 = o1.binary_op(ret1, '0', self.LANE_VALUE) result1.append(ret1) cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), [SIMD.v128_const('-1', self.LANE_TYPE), @@ -429,8 +437,8 @@ def gen_test_case_combination(self): SIMD.v128_const(result1, self.LANE_TYPE))) """unary vs binary""" result2 = [] - ret2 = IntOp.binary_op(op1, '0', '-1', self.lane_width) - ret2 = IntOp.unary_op(op2, ret2, self.lane_width) + ret2 = o1.binary_op('0', '-1', self.LANE_VALUE) + ret2 = o2.unary_op(ret2, self.LANE_VALUE) result2.append(ret2) cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op2, op2=op1), [SIMD.v128_const('0', self.LANE_TYPE), @@ -438,10 +446,12 @@ def gen_test_case_combination(self): SIMD.v128_const(result2, self.LANE_TYPE))) for op1 in self.UNARY_OPS: """unary vs unary""" + o1 = ArithmeticOp(op1) for op2 in unary_ops: + o2 = ArithmeticOp(op2) result3 = [] - ret3 = IntOp.unary_op(op1, '-1', self.lane_width) - ret3 = IntOp.unary_op(op2, ret3, self.lane_width) + ret3 = o1.unary_op('-1', self.LANE_VALUE) + ret3 = o2.unary_op(ret3, self.LANE_VALUE) result3.append(ret3) cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), [SIMD.v128_const('-1', self.LANE_TYPE)], diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index a1ea9bf6ed..85a2ac94d6 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -5,98 +5,184 @@ from simd_lane_value import LaneValue -class IntegerSimpleOp: - """Common integer simple ops: - min_s, min_u, max_s, max_u, avgr_u, abs +class ArithmeticOp: + """This class provides methods to simulate integer arithmetic + and saturating integer arithmetic operations for the purpose of + getting corresponding expected results. One or more operands + may be required for the operations. + The following operators are covered: + add, sub, mul, neg, + add_saturate_s, add_saturate_u, + sub_saturate_s, sub_saturate_u, + min_s, min_u, max_s, max_u, avgr_u, abs """ + def __init__(self, op: str): + self.op = op @staticmethod - def unary_op(op: str, p: str, lane_width: int) -> str: - """Unary operation on p with the operation specified by op - - :param op: abs - :param p: a hex or decimal integer literal string - :lane_width: bit number of each lane in SIMD v128 - :return: + def get_valid_value(value: int, lane: LaneValue, signed=True) -> int: + """Get the valid integer value in the scope of the specified lane size. + + For a integer value, convert it to the valid value with the same bits + of the lane width. The value can be signed or unsigned, with the scope + of -0x80... to 0x7f... or 0 to 0xff... + + :param value: the value of the integer + :param lane: the LaneValue instance of a lane in v128 + :param signed: specify if the lane is interpreted as a signed or + an unsigned number. + :return : the valid value in either signed or unsigned number """ - if '0x' in p: - base = 16 - else: - base = 10 - v = int(p, base) + value &= lane.mask + if signed: + if value > lane.max: + return value - lane.mod + if value < lane.min: + return value + lane.mod + return value + + def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: + """Get the result of saturating arithmetic operation on 2 operands. + The operands can be both signed or unsigned. The following ops + are covered: + add_saturate_s, sub_saturate_s, add_saturate_u, sub_saturate_u, + + Saturating arithmetic can make sure: + When the operation result is less than the minimum, return the minimum. + When the operation result is greater than the maximum, return the maximum. + For other operation results, simply return themselves. + :param operand1: the integer operand 1 + :param operand2: the integer operand 2 + :param lane: the LaneValue instance of a lane in v128 + :return: the result of the saturating arithmetic operation + """ + if self.op.endswith('saturate_s'): + if operand1 > lane.max: + operand1 -= lane.mod + if operand2 > lane.max: + operand2 -= lane.mod + + if self.op.startswith('add'): + value = operand1 + operand2 + if self.op.startswith('sub'): + value = operand1 - operand2 - if op == 'abs': - result = IntegerSimpleOp.get_valid_value(v, lane_width) + if value > lane.max: + return lane.max + if value < lane.min: + return lane.min + + if self.op.endswith('saturate_u'): + if operand1 < 0: + operand1 += lane.mod + if operand2 < 0: + operand2 += lane.mod + if self.op.startswith('add'): + value = operand1 + operand2 + if self.op.startswith('sub'): + value = operand1 - operand2 + + if value > lane.mask: + return lane.mask + if value < 0: + return 0 + + return value + + def unary_op(self, operand, lane): + """General integer arithmetic and saturating arithmetic operations + with only one operand. + + Supported ops: neg, abs + + :param operand: the operand, integer or literal string in hex or decimal format + :param lane: the LaneValue instance of a lane in v128 + :return: the string of the result of in hex or decimal format + """ + v = operand + base = 10 + if isinstance(operand, str): + if '0x' in operand: + base = 16 + v = int(operand, base) + + if self.op == 'neg': + result = self.get_valid_value(-v, lane) + elif self.op == 'abs': + result = self.get_valid_value(v, lane) if result >= 0: - return p + return operand else: - if base == 16: - return hex(-result) - else: - return str(-result) + result = -result + if base == 16: + return hex(result) else: raise Exception('Unknown unary operation') - def binary_op(op: str, p1: str, p2: str, lane_width: int) -> str: - """Binary operation on p1 and p2 with the operation specified by op + return str(result) - :param op: min_s, min_u, max_s, max_u, avgr_u - :param p1: a hex or decimal integer literal string - :param p2: a hex or decimal integer literal string - :lane_width: bit number of each lane in SIMD v128 - :return: - """ - if '0x' in p1: - base1 = 16 - else: - base1 = 10 - v1 = int(p1, base1) + def binary_op(self, operand1, operand2, lane): + """General integer arithmetic and saturating arithmetic operations + with 2 operands. - if '0x' in p2: - base2 = 16 - else: - base2 = 10 - v2 = int(p2, base2) - - if op in ['min_s', 'max_s']: - i1 = IntegerSimpleOp.get_valid_value(v1, lane_width) - i2 = IntegerSimpleOp.get_valid_value(v2, lane_width) - if op == 'min_s': - return p1 if i1 <= i2 else p2 - else: - return p1 if i1 >= i2 else p2 + Supported ops: + add, sub, mul, + add_saturate_s, add_saturate_u, + sub_saturate_s, sub_saturate_u, + min_s, min_u, max_s, max_u, avgr_u - elif op in ['min_u', 'max_u']: - i1 = IntegerSimpleOp.get_valid_value(v1, lane_width, signed=False) - i2 = IntegerSimpleOp.get_valid_value(v2, lane_width, signed=False) - if op == 'min_u': - return p1 if i1 <= i2 else p2 + :param operand1: the operand 1, integer or literal string in hex or decimal format + :param operand2: the operand 2, integer or literal string in hex or decimal format + :param lane: the LaneValue instance of a lane in v128 + :return: the string of the result of in hex or decimal format + """ + v1 = operand1 + v2 = operand2 + base1 = base2 = 10 + if isinstance(operand1, str): + if '0x' in operand1: + base1 = 16 + v1 = int(operand1, base1) + if isinstance(operand2, str): + if '0x' in operand2: + base2 = 16 + v2 = int(operand2, base2) + + result_signed = True + if self.op == 'add': + value = v1 + v2 + elif self.op == 'sub': + value = v1 - v2 + elif self.op == 'mul': + value = v1 * v2 + elif 'saturate' in self.op: + value = self._saturate(v1, v2, lane) + if self.op.endswith('_u'): + result_signed = False + elif self.op in ['min_s', 'max_s']: + i1 = self.get_valid_value(v1, lane) + i2 = self.get_valid_value(v2, lane) + if self.op == 'min_s': + return operand1 if i1 <= i2 else operand2 else: - return p1 if i1 >= i2 else p2 - - elif op == 'avgr_u': - i1 = IntegerSimpleOp.get_valid_value(v1, lane_width, signed=False) - i2 = IntegerSimpleOp.get_valid_value(v2, lane_width, signed=False) + return operand1 if i1 >= i2 else operand2 + elif self.op in ['min_u', 'max_u']: + i1 = self.get_valid_value(v1, lane, signed=False) + i2 = self.get_valid_value(v2, lane, signed=False) + if self.op == 'min_u': + return operand1 if i1 <= i2 else operand2 + else: + return operand1 if i1 >= i2 else operand2 + elif self.op == 'avgr_u': + i1 = self.get_valid_value(v1, lane, signed=False) + i2 = self.get_valid_value(v2, lane, signed=False) result = (i1 + i2 + 1) // 2 if base1 == 16 or base2 == 16: return hex(result) else: return str(result) - else: raise Exception('Unknown binary operation') - @staticmethod - def get_valid_value(value, lane_width, signed=True): - """Get the valid integer value of value in the specified lane size. - """ - lane = LaneValue(lane_width) - value &= lane.mask - - if signed: - if value > lane.max: - return value - lane.mod - if value < lane.min: - return value + lane.mod - - return value \ No newline at end of file + result = self.get_valid_value(value, lane, signed=result_signed) + return str(result) From 08bf984afc7033fb442b7efc6c813a0231d9917a Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Tue, 14 Apr 2020 03:20:39 +0800 Subject: [PATCH 139/378] [test] Simplify the use of formatting AssertReturn statements (#213) - Remove the duplicate methods to format AssertReturn statements in multiple lines. Use the united format methods of AssertReturn class in test_assert.py. - Use more descriptive param names. These files are pulled from https://github.com/WAVM/WAVM/pull/273 --- test/core/simd/meta/simd_arithmetic.py | 39 ++----- test/core/simd/meta/simd_f32x4.py | 53 ++++----- test/core/simd/meta/simd_f32x4_arith.py | 140 +++++++----------------- test/core/simd/meta/simd_f64x2.py | 48 ++++---- test/core/simd/meta/simd_f64x2_cmp.py | 110 ++++--------------- test/core/simd/meta/simd_sat_arith.py | 42 ++----- 6 files changed, 138 insertions(+), 294 deletions(-) diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index 8fb0b17a11..d4214c10ea 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -258,39 +258,16 @@ def get_combine_cases(self): op1=func_parts[0], op2=func_parts[1])) combine_cases.append(')\n') - ternary_case_template = ('(assert_return (invoke "{func}" ', - '(v128.const {lane_type_1} {val_1})', - '(v128.const {lane_type_2} {val_2})', - '(v128.const {lane_type_3} {val_3}))', - '(v128.const {lane_type_4} {val_4}))') + for func, test in sorted(self.combine_ternary_arith_test_data.items()): - line_head = ternary_case_template[0].format(func=func) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - combine_cases.append('\n'.join([ - line_head + ternary_case_template[1].format( - lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), - blank_head + ternary_case_template[2].format( - lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), - blank_head + ternary_case_template[3].format( - lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2])), - blank_head + ternary_case_template[4].format( - lane_type_4=self.LANE_TYPE, val_4=' '.join(test[3]))])) - binary_case_template = ('(assert_return (invoke "{func}" ', - '(v128.const {lane_type_1} {val_1})', - '(v128.const {lane_type_2} {val_2}))', - '(v128.const {lane_type_3} {val_3}))') + combine_cases.append(str(AssertReturn(func, + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in test[:-1]], + SIMD.v128_const(test[-1], self.LANE_TYPE)))) for func, test in sorted(self.combine_binary_arith_test_data.items()): - line_head = binary_case_template[0].format(func=func) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - combine_cases.append('\n'.join([ - line_head + binary_case_template[1].format( - lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), - blank_head + binary_case_template[2].format( - lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), - blank_head + binary_case_template[3].format( - lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2]))])) + combine_cases.append(str(AssertReturn(func, + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in test[:-1]], + SIMD.v128_const(test[-1], self.LANE_TYPE)))) + return '\n'.join(combine_cases) def get_normal_case(self): diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 6ad7a6b569..6e503c0617 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -191,7 +191,6 @@ def gen_test_func_template(self): # Add test for operations with constant operands for key in lst_oprt_with_const_assert: - op_name = self.full_op_name(key) case_cnt = 0 for case_data in lst_oprt_with_const_assert[key]: @@ -250,38 +249,40 @@ def get_normal_case(self): for op in self.BINARY_OPS: op_name = self.full_op_name(op) - for p1 in self.FLOAT_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) + for operand1 in self.FLOAT_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) if 'nan' not in result: # Normal floating point numbers as the results - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + binary_test_data.append([op_name, operand1, operand2, result]) else: # Since the results contain the 'nan' string, the result literals would be # nan:canonical - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) - for p1 in self.LITERAL_NUMBERS: - for p2 in self.LITERAL_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2, hex_form=False) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.LITERAL_NUMBERS: + for operand2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2, hex_form=False) + binary_test_data.append([op_name, operand1, operand2, result]) - for p1 in self.NAN_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: + for operand1 in self.NAN_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: # When the arguments contain 'nan:', the result literal is nan:arithmetic - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) else: # No 'nan' string found, then the result literal is nan:canonical - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) - for p2 in self.NAN_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) + for operand2 in self.NAN_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) for case in binary_test_data: - cases.append(self.single_binary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(c, self.LANE_TYPE) for c in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) # Test opposite signs of zero lst_oppo_signs_0 = [ @@ -325,17 +326,19 @@ def get_normal_case(self): self.v128_const(case_data[3][1], case_data[1][1])], self.v128_const(case_data[3][2], case_data[2][0])))) - for p in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: + for operand in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('abs') hex_literal = True - if p in self.LITERAL_NUMBERS: + if operand in self.LITERAL_NUMBERS: hex_literal = False - result = self.floatOp.unary_op('abs', p, hex_form=hex_literal) + result = self.floatOp.unary_op('abs', operand, hex_form=hex_literal) # Abs operation is valid for all the floating point numbers - unary_test_data.append(['assert_return', op_name, p, result]) + unary_test_data.append([op_name, operand, result]) for case in unary_test_data: - cases.append(self.single_unary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) self.get_unknown_operator_case(cases) diff --git a/test/core/simd/meta/simd_f32x4_arith.py b/test/core/simd/meta/simd_f32x4_arith.py index 1cd581d80c..1a56c05c4e 100644 --- a/test/core/simd/meta/simd_f32x4_arith.py +++ b/test/core/simd/meta/simd_f32x4_arith.py @@ -6,6 +6,8 @@ from simd_arithmetic import SimdArithmeticCase from simd_float_op import FloatingPointArithOp +from test_assert import AssertReturn +from simd import SIMD class F32ArithOp(FloatingPointArithOp): @@ -36,10 +38,6 @@ class Simdf32x4ArithmeticCase(SimdArithmeticCase): '0x0123456789ABCDEF.019aFp+019', '0x0123456789ABCDEF.019aFp-019' ) NAN_NUMBERS = ('nan', '-nan', 'nan:0x200000', '-nan:0x200000') - binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') - unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') - binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') - unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @@ -106,67 +104,6 @@ def combine_binary_arith_test_data(self): ] } - def single_binary_test(self, case): - """Format a test case in 2 or 3 lines - - :param case: list of elements about the test case - :return: test cases with 2 v128.const f32x4 operands, 3 lines at most - """ - op_name = case[1] - arg1 = self.v128_const(self.LANE_TYPE, case[2]) - arg2 = self.v128_const(self.LANE_TYPE, case[3]) - - if len(case) == 4: - line_head = self.binary_nan_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - lines = [ - line_head + self.binary_nan_template[1].format(operand_1=arg1), - blank_head + self.binary_nan_template[2].format(operand_2=arg2) - ] - elif len(case) == 5: - line_head = self.binary_params_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - result = self.v128_const(self.LANE_TYPE, case[-1]) - lines = [ - line_head + self.binary_params_template[1].format(operand_1=arg1), - blank_head + self.binary_params_template[2].format(operand_2=arg2), - blank_head + self.binary_params_template[3].format(expected_result=result) - ] - else: - raise Exception('Invalid format for the test case!') - - return '\n'.join(lines) - - def single_unary_test(self, case): - """Format a test case in 1 line or 2 lines - - :param case: list of elements about the test case - :return: test cases with 2 v128.const f32x4 operands, 2 lines at most - """ - op_name = case[1] - arg = self.v128_const(self.LANE_TYPE, case[2]) - - if len(case) == 3: - line_head = self.unary_nan_template[0].format(assert_type=case[0], func=op_name) - lines = [ - line_head + self.unary_nan_template[1].format(operand=arg) - ] - elif len(case) == 4: - line_head = self.unary_param_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - result = self.v128_const(self.LANE_TYPE, case[-1]) - lines = [ - line_head + self.unary_param_template[1].format(operand=arg), - blank_head + self.unary_param_template[2].format(expected_result=result) - ] - else: - raise Exception('Invalid format for the test case!') - - return '\n'.join(lines) - def get_normal_case(self): """Normal test cases from WebAssembly core tests """ @@ -176,68 +113,73 @@ def get_normal_case(self): for op in self.BINARY_OPS: op_name = self.full_op_name(op) - for p1 in self.FLOAT_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) + for operand1 in self.FLOAT_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) if 'nan' not in result: # Normal floating point numbers as the results - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + binary_test_data.append([op_name, operand1, operand2, result]) else: # Since the results contain the 'nan' string, the result literals would be # nan:canonical - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) - for p1 in self.NAN_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: + for operand1 in self.NAN_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: # When the arguments contain 'nan:', the result literal is nan:arithmetic # Consider the different order of arguments as different cases. - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) - binary_test_data.append(['assert_return', op_name, p2, p1, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand2, operand1, 'nan:arithmetic']) else: # No 'nan' string found, then the result literal is nan:canonical. - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) - binary_test_data.append(['assert_return', op_name, p2, p1, 'nan:canonical']) - for p2 in self.NAN_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) + binary_test_data.append([op_name, operand2, operand1, 'nan:canonical']) + for operand2 in self.NAN_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) - for p in self.LITERAL_NUMBERS: + for operand in self.LITERAL_NUMBERS: if self.LANE_TYPE == 'f32x4': - result = self.floatOp.binary_op(op, p, p, single_prec=True) + single_precision = True else: - result = self.floatOp.binary_op(op, p, p) - binary_test_data.append(['assert_return', op_name, p, p, result]) + single_precision = False + result = self.floatOp.binary_op(op, operand, operand, single_prec=single_precision) + binary_test_data.append([op_name, operand, operand, result]) for case in binary_test_data: - cases.append(self.single_binary_test(case)) - - for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: - if 'nan:' in p: - unary_test_data.append(['assert_return', op_name, p, 'nan:arithmetic']) - elif 'nan' in p: - unary_test_data.append(['assert_return', op_name, p, 'nan:canonical']) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) + + for operand in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: + if 'nan:' in operand: + unary_test_data.append([op_name, operand, 'nan:arithmetic']) + elif 'nan' in operand: + unary_test_data.append([op_name, operand, 'nan:canonical']) else: # Normal floating point numbers for sqrt operation op_name = self.full_op_name('sqrt') - result = self.floatOp.float_sqrt(p) + result = self.floatOp.float_sqrt(operand) if 'nan' not in result: # Get the sqrt value correctly - unary_test_data.append(['assert_return', op_name, p, result]) + unary_test_data.append([op_name, operand, result]) else: # - unary_test_data.append(['assert_return', op_name, p, 'nan:canonical']) + unary_test_data.append([op_name, operand, 'nan:canonical']) - for p in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: + for operand in self.FLOAT_NUMBERS + self.NAN_NUMBERS + self.LITERAL_NUMBERS: op_name = self.full_op_name('neg') - result = self.floatOp.float_neg(p) + result = self.floatOp.float_neg(operand) # Neg operation is valid for all the floating point numbers - unary_test_data.append(['assert_return', op_name, p, result]) + unary_test_data.append([op_name, operand, result]) for case in unary_test_data: - cases.append(self.single_unary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) self.mixed_nan_test(cases) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 44fa763ac3..476c9c995c 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -7,6 +7,7 @@ from simd_f32x4 import Simdf32x4Case from simd_f32x4_arith import Simdf32x4ArithmeticCase from test_assert import AssertReturn +from simd import SIMD class Simdf64x2Case(Simdf32x4Case): @@ -208,7 +209,6 @@ def gen_test_func_template(self): # Add test for operations with constant operands for key in const_test_data: - op_name = self.full_op_name(key) case_cnt = 0 for case_data in const_test_data[key]: @@ -273,38 +273,40 @@ def get_normal_case(self): for op in self.BINARY_OPS: op_name = self.full_op_name(op) - for p1 in self.FLOAT_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) + for operand1 in self.FLOAT_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) if 'nan' not in result: # Normal floating point numbers as the results - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + binary_test_data.append([op_name, operand1, operand2, result]) else: # Since the results contain the 'nan' string, the result literals would be # nan:canonical - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) - for p1 in self.NAN_NUMBERS: - for p2 in self.FLOAT_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: + for operand1 in self.NAN_NUMBERS: + for operand2 in self.FLOAT_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: # When the arguments contain 'nan:', the result literal is nan:arithmetic - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) else: # No 'nan' string found, then the result literal is nan:canonical - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) - for p2 in self.NAN_NUMBERS: - if 'nan:' in p1 or 'nan:' in p2: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:arithmetic']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) + for operand2 in self.NAN_NUMBERS: + if 'nan:' in operand1 or 'nan:' in operand2: + binary_test_data.append([op_name, operand1, operand2, 'nan:arithmetic']) else: - binary_test_data.append(['assert_return', op_name, p1, p2, 'nan:canonical']) + binary_test_data.append([op_name, operand1, operand2, 'nan:canonical']) - for p1 in self.LITERAL_NUMBERS: - for p2 in self.LITERAL_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2, hex_form=False) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.LITERAL_NUMBERS: + for operand2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2, hex_form=False) + binary_test_data.append([op_name, operand1, operand2, result]) for case in binary_test_data: - cases.append(self.single_binary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) # Test opposite signs of zero lst_oppo_signs_0 = [ @@ -367,10 +369,12 @@ def get_normal_case(self): hex_literal = False result = self.floatOp.unary_op('abs', p, hex_form=hex_literal) # Abs operation is valid for all the floating point numbers - unary_test_data.append(['assert_return', op_name, p, result]) + unary_test_data.append([ op_name, p, result]) for case in unary_test_data: - cases.append(self.single_unary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(c, self.LANE_TYPE) for c in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) return '\n'.join(cases) diff --git a/test/core/simd/meta/simd_f64x2_cmp.py b/test/core/simd/meta/simd_f64x2_cmp.py index 0228c0114f..10ae36484b 100644 --- a/test/core/simd/meta/simd_f64x2_cmp.py +++ b/test/core/simd/meta/simd_f64x2_cmp.py @@ -11,6 +11,8 @@ from simd_arithmetic import SimdArithmeticCase from simd_float_op import FloatingPointCmpOp +from test_assert import AssertReturn +from simd import SIMD class Simdf64x2CmpCase(SimdArithmeticCase): @@ -32,15 +34,8 @@ class Simdf64x2CmpCase(SimdArithmeticCase): ) FLOAT_NUMBERS_NORMAL = ('-1', '0', '1', '2.0') - NAN_NUMBERS = ('nan', '-nan', 'nan:0x4000000000000', '-nan:0x4000000000000') - binary_params_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2})', '{expected_result})') - unary_param_template = ('({assert_type} (invoke "{func}" ', '{operand})', '{expected_result})') - binary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand_1}', '{operand_2}))') - unary_nan_template = ('({assert_type} (invoke "{func}" ', '{operand}))') - - def full_op_name(self, op_name): return self.LANE_TYPE + '.' + op_name @@ -57,67 +52,6 @@ def combine_ternary_arith_test_data(self): def combine_binary_arith_test_data(self): return ['f64x2.eq', 'f64x2.ne', 'f64x2.lt', 'f64x2.le', 'f64x2.gt', 'f64x2.ge'] - def single_binary_test(self, case): - """Format a test case in 2 or 3 lines - - :param case: list of elements about the test case - :return: test cases with 2 v128.const f64x2 operands, 3 lines at most - """ - op_name = case[1] - arg1 = self.v128_const(self.LANE_TYPE, case[2]) - arg2 = self.v128_const(self.LANE_TYPE, case[3]) - - if len(case) == 4: - line_head = self.binary_nan_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - lines = [ - line_head + self.binary_nan_template[1].format(operand_1=arg1), - blank_head + self.binary_nan_template[2].format(operand_2=arg2) - ] - elif len(case) == 5: - line_head = self.binary_params_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - result = self.v128_const('i64x2', case[-1]) - lines = [ - line_head + self.binary_params_template[1].format(operand_1=arg1), - blank_head + self.binary_params_template[2].format(operand_2=arg2), - blank_head + self.binary_params_template[3].format(expected_result=result) - ] - else: - raise Exception('Invalid format for the test case!') - - return '\n'.join(lines) - - def single_unary_test(self, case): - """Format a test case in 1 line or 2 lines - - :param case: list of elements about the test case - :return: test cases with 2 v128.const f64x2 operands, 2 lines at most - """ - op_name = case[1] - arg = self.v128_const(self.LANE_TYPE, case[2]) - - if len(case) == 3: - line_head = self.unary_nan_template[0].format(assert_type=case[0], func=op_name) - lines = [ - line_head + self.unary_nan_template[1].format(operand=arg) - ] - elif len(case) == 4: - line_head = self.unary_param_template[0].format(assert_type=case[0], func=op_name) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - result = self.v128_const(self.LANE_TYPE, case[-1]) - lines = [ - line_head + self.unary_param_template[1].format(operand=arg), - blank_head + self.unary_param_template[2].format(expected_result=result) - ] - else: - raise Exception('Invalid format for the test case!') - - return '\n'.join(lines) - def get_combine_cases(self): combine_cases = [';; combination\n(module (memory 1)'] @@ -218,33 +152,37 @@ def get_normal_case(self): for op in self.BINARY_OPS: op_name = self.full_op_name(op) - for p1 in self.FLOAT_NUMBERS_SPECIAL: - for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.FLOAT_NUMBERS_SPECIAL: + for operand2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) + binary_test_data.append([op_name, operand1, operand2, result]) - for p1 in self.LITERAL_NUMBERS: - for p2 in self.LITERAL_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.LITERAL_NUMBERS: + for operand2 in self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) + binary_test_data.append([op_name, operand1, operand2, result]) - for p1 in self.NAN_NUMBERS: - for p2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: - result = self.floatOp.binary_op(op, p1, p2) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.NAN_NUMBERS: + for operand2 in self.FLOAT_NUMBERS_SPECIAL + self.NAN_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) + binary_test_data.append([op_name, operand1, operand2, result]) for op in self.BINARY_OPS: op_name = self.full_op_name(op) - for p1 in self.FLOAT_NUMBERS_NORMAL: - for p2 in self.FLOAT_NUMBERS_NORMAL: - result = self.floatOp.binary_op(op, p1, p2) - binary_test_data.append(['assert_return', op_name, p1, p2, result]) + for operand1 in self.FLOAT_NUMBERS_NORMAL: + for operand2 in self.FLOAT_NUMBERS_NORMAL: + result = self.floatOp.binary_op(op, operand1, operand2) + binary_test_data.append([op_name, operand1, operand2, result]) for case in binary_test_data: - cases.append(self.single_binary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], 'i64x2')))) for case in unary_test_data: - cases.append(self.single_unary_test(case)) + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], 'i64x2')))) self.get_unknown_operator_case(cases) diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py index 14f406abe3..547ee25cfb 100644 --- a/test/core/simd/meta/simd_sat_arith.py +++ b/test/core/simd/meta/simd_sat_arith.py @@ -5,6 +5,8 @@ """ from simd_arithmetic import SimdArithmeticCase +from test_assert import AssertReturn +from simd import SIMD class SimdSaturateArithmeticCases(SimdArithmeticCase): @@ -153,39 +155,17 @@ def get_combine_cases(self): op1=op1, op2=func_parts[2])) combine_cases.append(')\n') - ternary_case_template = ('(assert_return (invoke "{func}" ', - '(v128.const {lane_type_1} {val_1})', - '(v128.const {lane_type_2} {val_2})', - '(v128.const {lane_type_3} {val_3}))', - '(v128.const {lane_type_4} {val_4}))') + for func, test in sorted(self.combine_ternary_arith_test_data.items()): - line_head = ternary_case_template[0].format(func=func) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - combine_cases.append('\n'.join([ - line_head + ternary_case_template[1].format( - lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), - blank_head + ternary_case_template[2].format( - lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), - blank_head + ternary_case_template[3].format( - lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2])), - blank_head + ternary_case_template[4].format( - lane_type_4=self.LANE_TYPE, val_4=' '.join(test[3]))])) - binary_case_template = ('(assert_return (invoke "{func}" ', - '(v128.const {lane_type_1} {val_1})', - '(v128.const {lane_type_2} {val_2}))', - '(v128.const {lane_type_3} {val_3}))') + combine_cases.append(str(AssertReturn(func, + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in test[:-1]], + SIMD.v128_const(test[-1], self.LANE_TYPE)))) + for func, test in sorted(self.combine_binary_arith_test_data.items()): - line_head = binary_case_template[0].format(func=func) - line_head_len = len(line_head) - blank_head = ' ' * line_head_len - combine_cases.append('\n'.join([ - line_head + binary_case_template[1].format( - lane_type_1=self.LANE_TYPE, val_1=' '.join(test[0])), - blank_head + binary_case_template[2].format( - lane_type_2=self.LANE_TYPE, val_2=' '.join(test[1])), - blank_head + binary_case_template[3].format( - lane_type_3=self.LANE_TYPE, val_3=' '.join(test[2]))])) + combine_cases.append(str(AssertReturn(func, + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in test[:-1]], + SIMD.v128_const(test[-1], self.LANE_TYPE)))) + return '\n'.join(combine_cases) From cb0326eae33e750d5f5f02960844a1db876a8f54 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 22 Apr 2020 10:21:20 -0700 Subject: [PATCH 140/378] Add some f32x4 instructions (#165) * Add some f32x4 instructions Add f32x4 min, max, abs extract lane, and i32x4 extract lane as examples of how SIMD operations can be implemented. extract_lane operations are missing validation, which can be added in future patches. * Rebase * Handle invalid min max abs in lexer * New AST node for ExtractLane --- interpreter/binary/encode.ml | 3 +++ interpreter/exec/eval.ml | 4 ++++ interpreter/exec/eval_numeric.ml | 28 +++++++++++++++++++--------- interpreter/exec/eval_numeric.mli | 1 + interpreter/exec/simd.ml | 30 ++++++++++++++++++++++++++++++ interpreter/exec/v128.ml | 11 +++++++++++ interpreter/syntax/ast.ml | 11 +++++++---- interpreter/syntax/operators.ml | 7 +++++++ interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 25 +++++++++++++++++++++++++ interpreter/text/parser.mly | 3 +++ interpreter/valid/valid.ml | 5 +++++ 12 files changed, 116 insertions(+), 13 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 72ec4259e0..52acd6f24f 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -380,6 +380,9 @@ let encode m = | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf | Convert (V128 _) -> failwith "TODO v128" + | ExtractLane (V128Op.I32x4ExtractLane imm) -> failwith "TODO v128" + | ExtractLane (V128Op.F32x4ExtractLane imm) -> failwith "TODO v128" + let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index d3252f350c..b3c84f32bc 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -249,6 +249,10 @@ let rec step (c : config) : config = (try Eval_numeric.eval_cvtop cvtop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | ExtractLane extractop, v :: vs' -> + (try Eval_numeric.eval_extractop extractop v :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | _ -> let s1 = string_of_values (List.rev vs) in let s2 = string_of_value_types (List.map type_of (List.rev vs)) in diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index d60c8caca0..d05181537d 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -118,26 +118,35 @@ module F64Op = FloatOp (F64) (Values.F64Value) (* Simd operators *) -module SimdOp (VXX : Simd.S) (Value : ValueType with type t = VXX.t) = +module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct - (* TODO open Ast.SimdOp let to_value = Value.to_value let of_value = of_arg Value.of_value - *) - (* FIXME *) - let unop op = failwith "TODO v128" + let unop op = + fun v -> match op with + | F32x4Abs -> to_value (SXX.f32x4_abs (of_value 1 v)) - (* FIXME *) - let binop op = failwith "TODO v128" + let binop op = + let f = match op with + | F32x4Min -> SXX.f32x4_min + | F32x4Max -> SXX.f32x4_max + in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) (* FIXME *) - let testop op = failwith "TODO v128" + let testop op = failwith "TODO v128 unimplemented testop" (* FIXME *) - let relop op = failwith "TODO v128" + let relop op = failwith "TODO v128 unimplemented relop" + + let extractop op v = + match op with + | F32x4ExtractLane imm -> + (F32Op.to_value (SXX.f32x4_extract_lane imm (of_value 1 v))) + | I32x4ExtractLane imm -> + (I32Op.to_value (SXX.i32x4_extract_lane imm (of_value 1 v))) end module V128Op = SimdOp (V128) (Values.V128Value) @@ -216,6 +225,7 @@ struct let cvtop op v = failwith "TODO v128" end +let eval_extractop extractop v = V128Op.extractop extractop v (* Dispatch *) diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index 7435b3c6bb..1e1b3545aa 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -7,3 +7,4 @@ val eval_binop : Ast.binop -> value -> value -> value val eval_testop : Ast.testop -> value -> bool val eval_relop : Ast.relop -> value -> value -> bool val eval_cvtop : Ast.cvtop -> value -> value +val eval_extractop : Ast.extractop -> value -> value diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 5a2b83de32..1783e609ba 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -11,6 +11,8 @@ let lanes shape = | F32x4 -> 4 | F64x2 -> 2 +let f32x4_indices = [0; 4; 8; 12] + module type RepType = sig type t @@ -20,6 +22,11 @@ sig val to_string : t -> string val bytewidth : int val of_strings : shape -> string list -> t + + val to_i32x4 : t -> I32.t list + + val to_f32x4 : t -> F32.t list + val of_f32x4 : F32.t list -> t end module type S = @@ -31,6 +38,13 @@ sig val of_bits : bits -> t val to_bits : t -> bits val of_strings : shape -> string list -> t + + val i32x4_extract_lane : int -> t -> I32.t + + val f32x4_min : t -> t -> t + val f32x4_max : t -> t -> t + val f32x4_abs : t -> t + val f32x4_extract_lane : int -> t -> F32.t end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -43,4 +57,20 @@ struct let of_bits x = x let to_bits x = x let of_strings = Rep.of_strings + + let to_i32x4 = Rep.to_i32x4 + + let i32x4_extract_lane i x = List.nth (to_i32x4 x) i + + let to_f32x4 = Rep.to_f32x4 + let of_f32x4 = Rep.of_f32x4 + let f32x4_unop f x = + of_f32x4 (List.map f (to_f32x4 x)) + let f32x4_binop f x y = + of_f32x4 (List.map2 f (to_f32x4 x) (to_f32x4 y)) + + let f32x4_extract_lane i x = List.nth (to_f32x4 x) i + let f32x4_min = f32x4_binop F32.min + let f32x4_max = f32x4_binop F32.max + let f32x4_abs x = f32x4_unop F32.abs x end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 33d6bd7751..428da75ecc 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -4,6 +4,17 @@ include Simd.Make let bytewidth = 16 let to_string s = s + let to_i32x4 s = + List.map (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices + + let to_f32x4 s = + List.map (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices + + let of_f32x4 fs = + let b = create bytewidth in + List.iter2 (fun i f -> Bytes.set_int32_le b i (F32.to_bits f)) Simd.f32x4_indices fs; + Bytes.to_string b + let of_strings shape ss = if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); let range_check i32 min max at = diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 53b6b9dbc8..69f7bf12dc 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -45,26 +45,28 @@ struct end (* FIXME *) -module VectorOp = +module SimdOp = struct - type unop = TodoUnOp - type binop = TodoBinOp + type unop = F32x4Abs + type binop = F32x4Min | F32x4Max type testop = TodoTestOp type relop = TodoRelOp type cvtop = TodoCvtOp + type extractop = I32x4ExtractLane of int | F32x4ExtractLane of int end module I32Op = IntOp module I64Op = IntOp module F32Op = FloatOp module F64Op = FloatOp -module V128Op = VectorOp +module V128Op = SimdOp type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop, V128Op.unop) Values.op type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop, V128Op.binop) Values.op type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop, V128Op.testop) Values.op type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop, V128Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) Values.op +type extractop = V128Op.extractop type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} @@ -108,6 +110,7 @@ and instr' = | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) | Convert of cvtop (* conversion *) + | ExtractLane of extractop (* extract lane from v128 value *) (* Globals & Functions *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 8c5be4112b..b5c0941c7d 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -203,3 +203,10 @@ let f64_reinterpret_i64 = Convert (F64 F64Op.ReinterpretInt) let memory_size = MemorySize let memory_grow = MemoryGrow +(* SIMD *) +let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) + +let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) +let f32x4_min = Binary (V128 V128Op.F32x4Min) +let f32x4_max = Binary (V128 V128Op.F32x4Max) +let f32x4_abs = Unary (V128 V128Op.F32x4Abs) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 9c2db6fbba..a7bf661f6f 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -272,6 +272,7 @@ let rec instr e = | Unary op -> unop op, [] | Binary op -> binop op, [] | Convert op -> cvtop op, [] + | ExtractLane op -> failwith "TODO v128" in Node (head, inner) let const c = diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 38af75f1ec..40027db14f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -73,6 +73,18 @@ let numop t i32 i64 f32 f64 = | "f64" -> f64 | _ -> assert false +let unimplemented_simd = fun _ -> failwith "unimplemented simd" + +let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = + match s with + | "i8x16" -> i8x16 + | "i16x8" -> i16x8 + | "i32x4" -> i32x4 + | "i64x2" -> i64x2 + | "f32x4" -> f32x4 + | "f64x2" -> f64x2 + | _ -> assert false + let memsz sz m8 m16 m32 = match sz with | "8" -> m8 @@ -212,6 +224,10 @@ rule token = parse | "global.get" { GLOBAL_GET } | "global.set" { GLOBAL_SET } + | (simd_shape as s)".extract_lane" + { EXTRACT_LANE (fun imm -> + simdop s unimplemented_simd unimplemented_simd i32x4_extract_lane + unimplemented_simd f32x4_extract_lane unimplemented_simd imm) } | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) @@ -364,6 +380,15 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } + | (simd_shape as s)".min" + { if s != "f32x4" || s != "f64x2" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min unreachable) } + | (simd_shape as s)".max" + { if s != "f32x4" || s != "f64x2" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max unreachable) } + | (simd_shape as s)".abs" + { if s = "i64x2" then error lexbuf "unknown operator"; + UNARY (simdop s unreachable unreachable unreachable unreachable f32x4_abs unreachable) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 0e6631830d..0fad228f95 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -167,6 +167,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT +%token EXTRACT_LANE %token CONST V128_CONST UNARY BINARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL @@ -192,6 +193,7 @@ let inline_type_explicit (c : context) x ft at = %token COMPARE %token CONVERT %token Memory.offset -> Ast.instr'> LOAD +%token Ast.instr'> EXTRACT_LANE %token Memory.offset -> Ast.instr'> STORE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT @@ -351,6 +353,7 @@ plain_instr : | UNARY { fun c -> $1 } | BINARY { fun c -> $1 } | CONVERT { fun c -> $1 } + | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } call_instr : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 328e96ea71..26a0b06ea9 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -289,6 +289,11 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = let t1, t2 = type_cvtop e.at cvtop in [t1] --> [t2] + | ExtractLane (V128Op.I32x4ExtractLane _) -> + [V128Type] --> [I32Type] + | ExtractLane (V128Op.F32x4ExtractLane _) -> + [V128Type] --> [F32Type] + and check_seq (c : context) (es : instr list) : infer_stack_type = match es with | [] -> From f84e62c0ec407edac0d40183e9c61e23a23283bd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 1 May 2020 11:34:13 -0700 Subject: [PATCH 141/378] Fix string comparison (#215) * Fix string comparison Classic newbie mistake of using != on strings. Plus I got the conditional wrong - it should error if s is none of the valid simd shapes. --- interpreter/text/lexer.mll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 40027db14f..b409a5e19e 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -381,10 +381,10 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".min" - { if s != "f32x4" || s != "f64x2" then error lexbuf "unknown operator"; + { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min unreachable) } | (simd_shape as s)".max" - { if s != "f32x4" || s != "f64x2" then error lexbuf "unknown operator"; + { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max unreachable) } | (simd_shape as s)".abs" { if s = "i64x2" then error lexbuf "unknown operator"; From 32a11d831899c7753f31821931a2cd78b971266f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 4 May 2020 15:51:39 -0700 Subject: [PATCH 142/378] Parse v128.const of nans in result_list of assert_return by wrapping existing result type (#218) * Parse nans in v128.const * Restructure types of results * Fix some matches, rename vars --- interpreter/script/js.ml | 10 +++--- interpreter/script/run.ml | 67 +++++++++++++++++++++++++----------- interpreter/script/script.ml | 9 +++-- interpreter/text/arrange.ml | 17 +++++---- interpreter/text/parser.mly | 28 +++++++++++++-- 5 files changed, 97 insertions(+), 34 deletions(-) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index bede87c99a..71923ff7d4 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -222,7 +222,7 @@ let run ts at = let assert_return ress ts at = let test res = match res.it with - | LitResult lit -> + | NumResult { it = LitPat lit; _ } -> let t', reinterpret = reinterpret_of (Values.type_of lit.it) in [ reinterpret @@ at; Const lit @@ at; @@ -230,7 +230,7 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | NanResult nanop -> + | NumResult { it = NanPat nanop; _ } -> let nan = match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false @@ -250,6 +250,7 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] + | SimdResult _ -> failwith "unimplemented" in [], List.flatten (List.rev_map test ress) let wrap module_name item_name wrap_action wrap_assertion at = @@ -329,8 +330,9 @@ let of_nan = function let of_result res = match res.it with - | LitResult lit -> of_literal lit - | NanResult nanop -> + | NumResult { it = LitPat lit; _ } -> of_literal lit + | SimdResult _ -> failwith "unimplemented" + | NumResult { it = NanPat nanop; _ } -> match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> of_nan n diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 88d8dc74f0..94b9012401 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -250,17 +250,24 @@ let string_of_nan = function let type_of_result r = match r with - | LitResult v -> Values.type_of v.it - | NanResult n -> Values.type_of n.it - -let string_of_result r = - match r with - | LitResult v -> Values.string_of_value v.it - | NanResult nanop -> + | NumResult { it = LitPat v ; _ } -> Values.type_of v.it + | NumResult { it = NanPat v ; _ } -> Values.type_of v.it + | SimdResult (_, _) -> let open Types in V128Type + +let string_of_num_pat (p : num_pat) = + match p.it with + | LitPat v -> Values.string_of_value v.it + | NanPat nanop -> match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> string_of_nan n +let string_of_result r = + match r with + | NumResult v -> string_of_num_pat v + | SimdResult (shape, vs) -> + String.concat " " (List.map string_of_num_pat vs) + let string_of_results = function | [r] -> string_of_result r | rs -> "[" ^ String.concat " " (List.map string_of_result rs) ^ "]" @@ -340,24 +347,44 @@ let run_action act : Values.value list = | None -> Assert.error act.at "undefined export" ) -let assert_result at got expect = + +let assert_num_pat at v p = let open Values in + match p.it with + | (LitPat v') -> v <> v'.it + | (NanPat nanop) -> + match nanop.it, v with + | F32 CanonicalNan, F32 z -> z <> F32.pos_nan && z <> F32.neg_nan + | F64 CanonicalNan, F64 z -> z <> F64.pos_nan && z <> F64.neg_nan + | F32 ArithmeticNan, F32 z -> + let pos_nan = F32.to_bits F32.pos_nan in + Int32.logand (F32.to_bits z) pos_nan <> pos_nan + | F64 ArithmeticNan, F64 z -> + let pos_nan = F64.to_bits F64.pos_nan in + Int64.logand (F64.to_bits z) pos_nan <> pos_nan + | _, _ -> false + +let assert_result at got expect = if List.length got <> List.length expect || List.exists2 (fun v r -> match r with - | LitResult v' -> v <> v'.it - | NanResult nanop -> - match nanop.it, v with - | F32 CanonicalNan, F32 z -> z <> F32.pos_nan && z <> F32.neg_nan - | F64 CanonicalNan, F64 z -> z <> F64.pos_nan && z <> F64.neg_nan - | F32 ArithmeticNan, F32 z -> - let pos_nan = F32.to_bits F32.pos_nan in - Int32.logand (F32.to_bits z) pos_nan <> pos_nan - | F64 ArithmeticNan, F64 z -> - let pos_nan = F64.to_bits F64.pos_nan in - Int64.logand (F64.to_bits z) pos_nan <> pos_nan - | _, _ -> false + | NumResult v' -> assert_num_pat at v v' + | SimdResult (shape, vs) -> + begin + let open Values in + let open Simd in + match shape, v with + | F32x4, V128 v -> + let l0 = F32 (V128.f32x4_extract_lane 0 v) in + let l1 = F32 (V128.f32x4_extract_lane 1 v) in + let l2 = F32 (V128.f32x4_extract_lane 2 v) in + let l3 = F32 (V128.f32x4_extract_lane 3 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1; l2; l3] vs + | _ -> failwith "impossible" + end ) got expect then begin print_string "Result: "; print_values got; diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 4a7216b32b..ca3bb0aa45 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -15,10 +15,15 @@ type nanop = nanop' Source.phrase and nanop' = (unit, unit, nan, nan, unit) Values.op and nan = CanonicalNan | ArithmeticNan +type num_pat = num_pat' Source.phrase +and num_pat' = + | LitPat of Ast.literal + | NanPat of nanop + type result = result' Source.phrase and result' = - | LitResult of Ast.literal - | NanResult of nanop + | NumResult of num_pat + | SimdResult of Simd.shape * num_pat list type assertion = assertion' Source.phrase and assertion' = diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index a7bf661f6f..8916676e26 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -442,14 +442,19 @@ let nan = function | CanonicalNan -> "nan:canonical" | ArithmeticNan -> "nan:arithmetic" +let result_numpat res = + match res with + | LitPat lit -> literal lit + | NanPat nanop -> + match nanop.it with + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false + | Values.F32 n -> Node ("f32.const " ^ nan n, []) + | Values.F64 n -> Node ("f64.const " ^ nan n, []) + let result res = match res.it with - | LitResult lit -> literal lit - | NanResult nanop -> - match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false - | Values.F32 n -> Node ("f32.const " ^ nan n, []) - | Values.F64 n -> Node ("f64.const " ^ nan n, []) + | SimdResult _ -> failwith "unimplemented" + | NumResult n -> result_numpat n.it let assertion mode ass = match ass.it with diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 0fad228f95..629c69c832 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -48,6 +48,20 @@ let simd_literal shape ss at = | Failure _ -> error at "constant out of range" | Invalid_argument _ -> error at "wrong number of lane literals" +let simd_lane_nan shape l at = + let open Simd in + match shape with + | F32x4 -> NanPat (Values.F32 l @@ at) @@ at + | F64x2 -> NanPat (Values.F64 l @@ at) @@ at + | _ -> error at "invalid simd constant" + +let simd_lane_lit shape l at = + let open Simd in + match shape with + | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at + | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at + | _ -> error at "invalid simd constant" + let nanop f nan = let open Source in let open Values in @@ -847,6 +861,8 @@ meta : const : | LPAR CONST literal RPAR { snd (literal $2 $3) @@ ati 3 } + +v128const: | LPAR V128_CONST SIMD_SHAPE literal_list RPAR { snd (simd_literal $3 $4 (at ())) @@ ati 4 } @@ -854,10 +870,18 @@ const : const_list : | /* empty */ { [] } | const const_list { $1 :: $2 } + | v128const const_list { $1 :: $2 } + +numpat : + | literal { fun s -> simd_lane_lit s $1.it $1.at } + | NAN { fun s -> simd_lane_nan s $1 (ati 3) } result : - | const { LitResult $1 @@ at () } - | LPAR CONST NAN RPAR { NanResult (nanop $2 ($3 @@ ati 3)) @@ at () } + | const { NumResult (LitPat $1 @@ at ()) @@ at () } + | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ ati 3) @@ at () } + | LPAR V128_CONST SIMD_SHAPE numpat numpat numpat numpat RPAR { + SimdResult ($3, [$4 $3; $5 $3; $6 $3; $7 $3]) @@ at () + } result_list : | /* empty */ { [] } From dad9d0dfb47f2c15c58a7ef112f92e3ac55767eb Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 5 May 2020 10:22:35 -0700 Subject: [PATCH 143/378] Implement v128.const parsing for f64x2 with nans (#219) And enough operations to pass the simd_f64x2.wast test. --- interpreter/exec/eval_numeric.ml | 3 +++ interpreter/exec/simd.ml | 21 +++++++++++++++++++++ interpreter/exec/v128.ml | 10 +++++++++- interpreter/script/run.ml | 6 ++++++ interpreter/syntax/ast.ml | 4 ++-- interpreter/syntax/operators.ml | 4 ++++ interpreter/text/lexer.mll | 6 +++--- interpreter/text/parser.mly | 5 +++++ 8 files changed, 53 insertions(+), 6 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index d05181537d..f090792bbc 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -128,11 +128,14 @@ struct let unop op = fun v -> match op with | F32x4Abs -> to_value (SXX.f32x4_abs (of_value 1 v)) + | F64x2Abs -> to_value (SXX.f64x2_abs (of_value 1 v)) let binop op = let f = match op with | F32x4Min -> SXX.f32x4_min | F32x4Max -> SXX.f32x4_max + | F64x2Min -> SXX.f64x2_min + | F64x2Max -> SXX.f64x2_max in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) (* FIXME *) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 1783e609ba..87ef9c989a 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -12,6 +12,7 @@ let lanes shape = | F64x2 -> 2 let f32x4_indices = [0; 4; 8; 12] +let f64x2_indices = [0; 8] module type RepType = sig @@ -27,6 +28,9 @@ sig val to_f32x4 : t -> F32.t list val of_f32x4 : F32.t list -> t + + val to_f64x2 : t -> F64.t list + val of_f64x2 : F64.t list -> t end module type S = @@ -45,6 +49,11 @@ sig val f32x4_max : t -> t -> t val f32x4_abs : t -> t val f32x4_extract_lane : int -> t -> F32.t + + val f64x2_min : t -> t -> t + val f64x2_max : t -> t -> t + val f64x2_abs : t -> t + val f64x2_extract_lane : int -> t -> F64.t end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -73,4 +82,16 @@ struct let f32x4_min = f32x4_binop F32.min let f32x4_max = f32x4_binop F32.max let f32x4_abs x = f32x4_unop F32.abs x + + let to_f64x2 = Rep.to_f64x2 + let of_f64x2 = Rep.of_f64x2 + let f64x2_unop f x = + of_f64x2 (List.map f (to_f64x2 x)) + let f64x2_binop f x y = + of_f64x2 (List.map2 f (to_f64x2 x) (to_f64x2 y)) + + let f64x2_extract_lane i x = List.nth (to_f64x2 x) i + let f64x2_min = f64x2_binop F64.min + let f64x2_max = f64x2_binop F64.max + let f64x2_abs x = f64x2_unop F64.abs x end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 428da75ecc..41b2d0a4e1 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -11,10 +11,18 @@ include Simd.Make List.map (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices let of_f32x4 fs = - let b = create bytewidth in + let b = Bytes.create bytewidth in List.iter2 (fun i f -> Bytes.set_int32_le b i (F32.to_bits f)) Simd.f32x4_indices fs; Bytes.to_string b + let to_f64x2 s = + List.map (fun i -> F64.of_bits (Bytes.get_int64_le (Bytes.of_string s) i)) Simd.f64x2_indices + + let of_f64x2 fs = + let b = Bytes.create bytewidth in + List.iter2 (fun i f -> Bytes.set_int64_le b i (F64.to_bits f)) Simd.f64x2_indices fs; + Bytes.to_string b + let of_strings shape ss = if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); let range_check i32 min max at = diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 94b9012401..380e547179 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -383,6 +383,12 @@ let assert_result at got expect = List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs + | F64x2, V128 v -> + let l0 = F64 (V128.f64x2_extract_lane 0 v) in + let l1 = F64 (V128.f64x2_extract_lane 1 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1] vs | _ -> failwith "impossible" end ) got expect diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 69f7bf12dc..88da2c797c 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -47,8 +47,8 @@ end (* FIXME *) module SimdOp = struct - type unop = F32x4Abs - type binop = F32x4Min | F32x4Max + type unop = F32x4Abs | F64x2Abs + type binop = F32x4Min | F32x4Max | F64x2Min | F64x2Max type testop = TodoTestOp type relop = TodoRelOp type cvtop = TodoCvtOp diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index b5c0941c7d..6585abad67 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -210,3 +210,7 @@ let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) let f32x4_min = Binary (V128 V128Op.F32x4Min) let f32x4_max = Binary (V128 V128Op.F32x4Max) let f32x4_abs = Unary (V128 V128Op.F32x4Abs) + +let f64x2_min = Binary (V128 V128Op.F64x2Min) +let f64x2_max = Binary (V128 V128Op.F64x2Max) +let f64x2_abs = Unary (V128 V128Op.F64x2Abs) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b409a5e19e..74434aed66 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -382,13 +382,13 @@ rule token = parse | (simd_shape as s)".min" { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min unreachable) } + BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min f64x2_min) } | (simd_shape as s)".max" { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max unreachable) } + BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max f64x2_max) } | (simd_shape as s)".abs" { if s = "i64x2" then error lexbuf "unknown operator"; - UNARY (simdop s unreachable unreachable unreachable unreachable f32x4_abs unreachable) } + UNARY (simdop s unreachable unreachable unreachable unreachable f32x4_abs f64x2_abs) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 629c69c832..6dd7d65ab3 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -880,8 +880,13 @@ result : | const { NumResult (LitPat $1 @@ at ()) @@ at () } | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ ati 3) @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat numpat numpat numpat RPAR { + if ($3 <> Simd.F32x4) then error (ati 3) "invalid SIMD shape"; SimdResult ($3, [$4 $3; $5 $3; $6 $3; $7 $3]) @@ at () } + | LPAR V128_CONST SIMD_SHAPE numpat numpat RPAR { + if ($3 <> Simd.F64x2) then error (ati 3) "invalid SIMD shape"; + SimdResult ($3, [$4 $3; $5 $3]) @@ at () + } result_list : | /* empty */ { [] } From c9976b53be13b67cf6bd173d0230b0a48a6aff54 Mon Sep 17 00:00:00 2001 From: Arseny Kapoulkine Date: Wed, 6 May 2020 10:10:26 -0700 Subject: [PATCH 144/378] Update ImplementationStatus to reflect status quo (#223) Updates based on latest LLVM & latest v8 (earlier v8 versions aren't useful because of renumbering anyway): - v8 implements load_splat and load with zero/sign extension - v8 implements i64x2_mul - v8 implements swizzle and andnot - LLVM supports integer abs instructions and intrinsics - Removing note about shuffle opcode - irrelevant post-renumbering Notable remaining omissions: - v8 doesn't implement v128.const - LLVM doesn't implement (or at least doesn't expose an intrinsic for) i64x2_mul - A lot of instructions are still part of unimplemented subset in LLVM --- proposals/simd/ImplementationStatus.md | 34 ++++++++++++-------------- 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index b480297185..58444f0c63 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -4,17 +4,17 @@ | `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v8x16.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v16x8.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v16x8.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v32x4.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v32x4.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -24,7 +24,7 @@ | `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v64x2.load_splat` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v64x2.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -71,7 +71,7 @@ | `f64x2.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v128.andnot` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -132,7 +132,7 @@ | `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | | | :heavy_check_mark: | | +| `i64x2.mul` | | :heavy_check_mark: | :heavy_check_mark: | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -155,14 +155,14 @@ | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.swizzle` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `v8x16.shuffle` | `-msimd128`[5] | :white_check_mark:[5] | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load8x8_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `i16x8.load8x8_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `i32x4.load16x4_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `i32x4.load16x4_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `i64x2.load32x2_s` | `-munimplemented-simd128` | | :heavy_check_mark: | | -| `i64x2.load32x2_u` | `-munimplemented-simd128` | | :heavy_check_mark: | | +| `v8x16.swizzle` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load8x8_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i16x8.load8x8_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.load16x4_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i32x4.load16x4_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i64x2.load32x2_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | +| `i64x2.load32x2_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | @@ -176,12 +176,10 @@ | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | | `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -[1] Tip of tree LLVM as of March 23, 2020 +[1] Tip of tree LLVM as of May 6, 2020 -[2] Tested on V8 8.1.0 (candidate). Requires flag `--experimental-wasm-simd` +[2] Tested on V8 8.4.272. Requires flag `--experimental-wasm-simd` [3] Tip of tree WAVM as of Feb 16, 2020. Requires flag `--enable simd` [4] Requires (case-insensitive) flag `-wasmsimd` - -[5] Uses older `v8x16.shuffle` opcode `0xfd 0x03` From a9ef3c9c6958d53d3a8a664ac93cf82572d97e7f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 13 May 2020 17:07:09 -0700 Subject: [PATCH 145/378] V128 refactor SIMD to use submodule (#222) * Refactor SIMD operators * Common submodule for different SIMD lane shapes * Tweak the submodule representation * Rename modules, move module into Make * MakeFloat takes a Float.S * Better name for MakeFloat parameter --- interpreter/exec/eval_numeric.ml | 16 ++++--- interpreter/exec/simd.ml | 73 ++++++++++++++++++-------------- interpreter/script/run.ml | 12 +++--- interpreter/syntax/ast.ml | 17 +++++++- interpreter/syntax/operators.ml | 12 +++--- 5 files changed, 77 insertions(+), 53 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index f090792bbc..ca364ec820 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -127,15 +127,17 @@ struct let unop op = fun v -> match op with - | F32x4Abs -> to_value (SXX.f32x4_abs (of_value 1 v)) - | F64x2Abs -> to_value (SXX.f64x2_abs (of_value 1 v)) + | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) + | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) + | _ -> failwith "TODO v128 unimplemented unop" let binop op = let f = match op with - | F32x4Min -> SXX.f32x4_min - | F32x4Max -> SXX.f32x4_max - | F64x2Min -> SXX.f64x2_min - | F64x2Max -> SXX.f64x2_max + | F32x4 Min -> SXX.F32x4.min + | F32x4 Max -> SXX.F32x4.max + | F64x2 Min -> SXX.F64x2.min + | F64x2 Max -> SXX.F64x2.max + | _ -> failwith "TODO v128 unimplemented unop" in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) (* FIXME *) @@ -147,7 +149,7 @@ struct let extractop op v = match op with | F32x4ExtractLane imm -> - (F32Op.to_value (SXX.f32x4_extract_lane imm (of_value 1 v))) + (F32Op.to_value (SXX.F32x4.extract_lane imm (of_value 1 v))) | I32x4ExtractLane imm -> (I32Op.to_value (SXX.i32x4_extract_lane imm (of_value 1 v))) end diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 87ef9c989a..31c549ea5d 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -33,6 +33,18 @@ sig val of_f64x2 : F64.t list -> t end +(* This signature defines the types and operations SIMD floats can expose. *) +module type Float = +sig + type t + type lane + + val abs : t -> t + val min : t -> t -> t + val max : t -> t -> t + val extract_lane : int -> t -> lane +end + module type S = sig type t @@ -45,15 +57,10 @@ sig val i32x4_extract_lane : int -> t -> I32.t - val f32x4_min : t -> t -> t - val f32x4_max : t -> t -> t - val f32x4_abs : t -> t - val f32x4_extract_lane : int -> t -> F32.t - - val f64x2_min : t -> t -> t - val f64x2_max : t -> t -> t - val f64x2_abs : t -> t - val f64x2_extract_lane : int -> t -> F64.t + (* We need type t = t to ensure that all submodule types are S.t, + * then callers don't have to change *) + module F32x4 : Float with type t = t and type lane = F32.t + module F64x2 : Float with type t = t and type lane = F64.t end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -71,27 +78,29 @@ struct let i32x4_extract_lane i x = List.nth (to_i32x4 x) i - let to_f32x4 = Rep.to_f32x4 - let of_f32x4 = Rep.of_f32x4 - let f32x4_unop f x = - of_f32x4 (List.map f (to_f32x4 x)) - let f32x4_binop f x y = - of_f32x4 (List.map2 f (to_f32x4 x) (to_f32x4 y)) - - let f32x4_extract_lane i x = List.nth (to_f32x4 x) i - let f32x4_min = f32x4_binop F32.min - let f32x4_max = f32x4_binop F32.max - let f32x4_abs x = f32x4_unop F32.abs x - - let to_f64x2 = Rep.to_f64x2 - let of_f64x2 = Rep.of_f64x2 - let f64x2_unop f x = - of_f64x2 (List.map f (to_f64x2 x)) - let f64x2_binop f x y = - of_f64x2 (List.map2 f (to_f64x2 x) (to_f64x2 y)) - - let f64x2_extract_lane i x = List.nth (to_f64x2 x) i - let f64x2_min = f64x2_binop F64.min - let f64x2_max = f64x2_binop F64.max - let f64x2_abs x = f64x2_unop F64.abs x + module MakeFloat (Float : Float.S) (Convert : sig + val to_shape : Rep.t -> Float.t list + val of_shape : Float.t list -> Rep.t + end) : Float with type t = Rep.t and type lane = Float.t = + struct + type t = Rep.t + type lane = Float.t + let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) + let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let abs = unop Float.abs + let min = binop Float.min + let max = binop Float.max + let extract_lane i s = List.nth (Convert.to_shape s) i + end + + module F32x4 = MakeFloat (F32) (struct + let to_shape = Rep.to_f32x4 + let of_shape = Rep.of_f32x4 + end) + + module F64x2 = MakeFloat (F64) (struct + let to_shape = Rep.to_f64x2 + let of_shape = Rep.of_f64x2 + end) + end diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 380e547179..047bcfdc3a 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -376,16 +376,16 @@ let assert_result at got expect = let open Simd in match shape, v with | F32x4, V128 v -> - let l0 = F32 (V128.f32x4_extract_lane 0 v) in - let l1 = F32 (V128.f32x4_extract_lane 1 v) in - let l2 = F32 (V128.f32x4_extract_lane 2 v) in - let l3 = F32 (V128.f32x4_extract_lane 3 v) in + let l0 = F32 (V128.F32x4.extract_lane 0 v) in + let l1 = F32 (V128.F32x4.extract_lane 1 v) in + let l2 = F32 (V128.F32x4.extract_lane 2 v) in + let l3 = F32 (V128.F32x4.extract_lane 3 v) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs | F64x2, V128 v -> - let l0 = F64 (V128.f64x2_extract_lane 0 v) in - let l1 = F64 (V128.f64x2_extract_lane 1 v) in + let l0 = F64 (V128.F64x2.extract_lane 0 v) in + let l1 = F64 (V128.F64x2.extract_lane 1 v) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1] vs diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 88da2c797c..8daa9dd4ae 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -47,8 +47,21 @@ end (* FIXME *) module SimdOp = struct - type unop = F32x4Abs | F64x2Abs - type binop = F32x4Min | F32x4Max | F64x2Min | F64x2Max + type iunop = TodoIunop + type ibinop = TodoIbinop + type funop = Abs + type fbinop = Min | Max + + type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) v128op = + | I8x16 of 'i8x16 + | I16x8 of 'i16x8 + | I32x4 of 'i32x4 + | I64x2 of 'i64x2 + | F32x4 of 'f32x4 + | F64x2 of 'f64x2 + + type unop = (iunop, iunop, iunop, iunop, funop, funop) v128op + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) v128op type testop = TodoTestOp type relop = TodoRelOp type cvtop = TodoCvtOp diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 6585abad67..d83c259aa8 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -207,10 +207,10 @@ let memory_grow = MemoryGrow let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) -let f32x4_min = Binary (V128 V128Op.F32x4Min) -let f32x4_max = Binary (V128 V128Op.F32x4Max) -let f32x4_abs = Unary (V128 V128Op.F32x4Abs) +let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) +let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) +let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) -let f64x2_min = Binary (V128 V128Op.F64x2Min) -let f64x2_max = Binary (V128 V128Op.F64x2Max) -let f64x2_abs = Unary (V128 V128Op.F64x2Abs) +let f64x2_min = Binary (V128 (V128Op.F64x2 V128Op.Min)) +let f64x2_max = Binary (V128 (V128Op.F64x2 V128Op.Max)) +let f64x2_abs = Unary (V128 (V128Op.F64x2 V128Op.Abs)) From bbf08e4cda457395a630df1b2222d636deacbf9c Mon Sep 17 00:00:00 2001 From: Wanming Lin Date: Fri, 15 May 2020 02:26:42 +0800 Subject: [PATCH 146/378] [test] Add more address overflow tests (#229) Echo to github.com/WebAssembly/spec/pull/1188, add more address overflow tests with offset set to `1` and address set to `-1`, which may be complied differently. --- test/core/simd/simd_address.wast | 6 ++++++ test/core/simd/simd_load_extend.wast | 25 +++++++++++++++++++++++++ test/core/simd/simd_load_splat.wast | 5 +++++ 3 files changed, 36 insertions(+) diff --git a/test/core/simd/simd_address.wast b/test/core/simd/simd_address.wast index 10c8d1a5c2..9e023008bb 100644 --- a/test/core/simd/simd_address.wast +++ b/test/core/simd/simd_address.wast @@ -45,6 +45,9 @@ (v128.store offset=65520 align=1 (i32.const 0) (v128.const i32x4 0 1 2 3)) (v128.load offset=65520 (i32.const 0)) ) + (func (export "store_data_6") (param $i i32) + (v128.store offset=1 align=1 (local.get $i) (v128.const i32x4 0 1 2 3)) + ) ) (assert_return (invoke "load_data_1" (i32.const 0)) (v128.const i32x4 0x03020100 0x07060504 0x11100908 0x15141312)) @@ -83,6 +86,7 @@ (assert_return (invoke "load_data_4" (i32.const 65505)) (v128.const i8x16 0x18 0x19 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x30 0x31 0x00 0x00)) (assert_return (invoke "load_data_5" (i32.const 65505)) (v128.const i8x16 0x31 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00)) +(assert_trap (invoke "load_data_3" (i32.const -1)) "out of bounds memory access") (assert_trap (invoke "load_data_5" (i32.const 65506)) "out of bounds memory access") (assert_return (invoke "store_data_0") (v128.const f32x4 0 1 2 3)) @@ -92,6 +96,8 @@ (assert_return (invoke "store_data_4") (v128.const i32x4 0 1 2 3)) (assert_return (invoke "store_data_5") (v128.const i32x4 0 1 2 3)) +(assert_trap (invoke "store_data_6" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "store_data_6" (i32.const 65535)) "out of bounds memory access") ;; Load/Store v128 data with invalid offset diff --git a/test/core/simd/simd_load_extend.wast b/test/core/simd/simd_load_extend.wast index d6a1ac122d..8f47fab4f6 100644 --- a/test/core/simd/simd_load_extend.wast +++ b/test/core/simd/simd_load_extend.wast @@ -55,6 +55,9 @@ (func (export "i16x8.load8x8_s_offset0_align1") (param $0 i32) (result v128) (i16x8.load8x8_s offset=0 align=1 (local.get $0)) ) + (func (export "i16x8.load8x8_s_offset1_align1") (param $0 i32) (result v128) + (i16x8.load8x8_s offset=1 align=1 (local.get $0)) + ) (func (export "i16x8.load8x8_s_offset10_align4") (param $0 i32) (result v128) (i16x8.load8x8_s offset=10 align=4 (local.get $0)) ) @@ -70,6 +73,9 @@ (func (export "i16x8.load8x8_u_offset0_align1") (param $0 i32) (result v128) (i16x8.load8x8_u offset=0 align=1 (local.get $0)) ) + (func (export "i16x8.load8x8_u_offset1_align1") (param $0 i32) (result v128) + (i16x8.load8x8_u offset=1 align=1 (local.get $0)) + ) (func (export "i16x8.load8x8_u_offset10_align4") (param $0 i32) (result v128) (i16x8.load8x8_u offset=10 align=4 (local.get $0)) ) @@ -86,6 +92,9 @@ (func (export "i32x4.load16x4_s_offset0_align1") (param $0 i32) (result v128) (i32x4.load16x4_s offset=0 align=1 (local.get $0)) ) + (func (export "i32x4.load16x4_s_offset1_align1") (param $0 i32) (result v128) + (i32x4.load16x4_s offset=1 align=1 (local.get $0)) + ) (func (export "i32x4.load16x4_s_offset10_align4") (param $0 i32) (result v128) (i32x4.load16x4_s offset=10 align=4 (local.get $0)) ) @@ -101,6 +110,9 @@ (func (export "i32x4.load16x4_u_offset0_align1") (param $0 i32) (result v128) (i32x4.load16x4_u offset=0 align=1 (local.get $0)) ) + (func (export "i32x4.load16x4_u_offset1_align1") (param $0 i32) (result v128) + (i32x4.load16x4_u offset=1 align=1 (local.get $0)) + ) (func (export "i32x4.load16x4_u_offset10_align4") (param $0 i32) (result v128) (i32x4.load16x4_u offset=10 align=4 (local.get $0)) ) @@ -117,6 +129,9 @@ (func (export "i64x2.load32x2_s_offset0_align1") (param $0 i32) (result v128) (i64x2.load32x2_s offset=0 align=1 (local.get $0)) ) + (func (export "i64x2.load32x2_s_offset1_align1") (param $0 i32) (result v128) + (i64x2.load32x2_s offset=1 align=1 (local.get $0)) + ) (func (export "i64x2.load32x2_s_offset10_align4") (param $0 i32) (result v128) (i64x2.load32x2_s offset=10 align=4 (local.get $0)) ) @@ -132,6 +147,9 @@ (func (export "i64x2.load32x2_u_offset0_align1") (param $0 i32) (result v128) (i64x2.load32x2_u offset=0 align=1 (local.get $0)) ) + (func (export "i64x2.load32x2_u_offset1_align1") (param $0 i32) (result v128) + (i64x2.load32x2_u offset=1 align=1 (local.get $0)) + ) (func (export "i64x2.load32x2_u_offset10_align4") (param $0 i32) (result v128) (i64x2.load32x2_u offset=10 align=4 (local.get $0)) ) @@ -212,6 +230,13 @@ (assert_trap (invoke "i64x2.load32x2_s" (i32.const 65529)) "out of bounds memory access") (assert_trap (invoke "i64x2.load32x2_u" (i32.const 65529)) "out of bounds memory access") +(assert_trap (invoke "i16x8.load8x8_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i16x8.load8x8_u_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i32x4.load16x4_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i32x4.load16x4_u_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i64x2.load32x2_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "i64x2.load32x2_u_offset1_align1" (i32.const -1)) "out of bounds memory access") + ;; type check (assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_s (f32.const 0)))) "type mismatch") (assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_u (f32.const 0)))) "type mismatch") diff --git a/test/core/simd/simd_load_splat.wast b/test/core/simd/simd_load_splat.wast index a2d804273c..837dafcb08 100644 --- a/test/core/simd/simd_load_splat.wast +++ b/test/core/simd/simd_load_splat.wast @@ -138,6 +138,11 @@ (assert_trap (invoke "v64x2.offset2_align4" (i32.const 65528)) "out of bounds memory access") (assert_trap (invoke "v64x2.offset15_align8" (i32.const 65528)) "out of bounds memory access") +(assert_trap (invoke "v8x16.offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v16x8.offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v32x4.offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v64x2.offset1_align2" (i32.const -1)) "out of bounds memory access") + (assert_trap (invoke "v8x16.offset65536" (i32.const 0)) "out of bounds memory access") (assert_trap (invoke "v16x8.offset65535" (i32.const 0)) "out of bounds memory access") (assert_trap (invoke "v32x4.offset65533" (i32.const 0)) "out of bounds memory access") From c0fe85b8530d412629c05b20756f96685383f123 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Wed, 20 May 2020 16:45:36 -0700 Subject: [PATCH 147/378] Opcode renumbering (#209) Many new opcodes have been added to the proposal since the last opcode renumbering, and since we are in phase 3, the time is ripe to finalize the opcode numbers for standardization. The goals of this renumbering are: 1. To maintain consistency with the ordering of MVP operations 2. To organize sets of similar operations into tables such that the offset from an operation for one type to the same operation for the next type is constant for all operations in that set. 3. To use round hexadecimal numbers for offsets where not too wasteful. Co-authored-by: Deepti Gandluri --- proposals/simd/BinarySIMD.md | 348 ++++++++++++------------ proposals/simd/ImplementationStatus.md | 362 ++++++++++++------------- proposals/simd/NewOpcodes.md | 130 +++++++++ test/core/simd/simd_const.wast | 14 +- 4 files changed, 492 insertions(+), 362 deletions(-) create mode 100644 proposals/simd/NewOpcodes.md diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index a43dd8d058..ab88336bcd 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -28,177 +28,177 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | Instruction | `simdop` | Immediate operands | | ---------------------------|---------:|--------------------| | `v128.load` | `0x00`| m:memarg | -| `v128.store` | `0x01`| m:memarg | -| `v128.const` | `0x02`| i:ImmByte[16] | -| `i8x16.splat` | `0x04`| - | -| `i8x16.extract_lane_s` | `0x05`| i:LaneIdx16 | -| `i8x16.extract_lane_u` | `0x06`| i:LaneIdx16 | -| `i8x16.replace_lane` | `0x07`| i:LaneIdx16 | -| `i16x8.splat` | `0x08`| - | -| `i16x8.extract_lane_s` | `0x09`| i:LaneIdx8 | -| `i16x8.extract_lane_u` | `0x0a`| i:LaneIdx8 | -| `i16x8.replace_lane` | `0x0b`| i:LaneIdx8 | -| `i32x4.splat` | `0x0c`| - | -| `i32x4.extract_lane` | `0x0d`| i:LaneIdx4 | -| `i32x4.replace_lane` | `0x0e`| i:LaneIdx4 | -| `i64x2.splat` | `0x0f`| - | -| `i64x2.extract_lane` | `0x10`| i:LaneIdx2 | -| `i64x2.replace_lane` | `0x11`| i:LaneIdx2 | -| `f32x4.splat` | `0x12`| - | -| `f32x4.extract_lane` | `0x13`| i:LaneIdx4 | -| `f32x4.replace_lane` | `0x14`| i:LaneIdx4 | -| `f64x2.splat` | `0x15`| - | -| `f64x2.extract_lane` | `0x16`| i:LaneIdx2 | -| `f64x2.replace_lane` | `0x17`| i:LaneIdx2 | -| `i8x16.eq` | `0x18`| - | -| `i8x16.ne` | `0x19`| - | -| `i8x16.lt_s` | `0x1a`| - | -| `i8x16.lt_u` | `0x1b`| - | -| `i8x16.gt_s` | `0x1c`| - | -| `i8x16.gt_u` | `0x1d`| - | -| `i8x16.le_s` | `0x1e`| - | -| `i8x16.le_u` | `0x1f`| - | -| `i8x16.ge_s` | `0x20`| - | -| `i8x16.ge_u` | `0x21`| - | -| `i16x8.eq` | `0x22`| - | -| `i16x8.ne` | `0x23`| - | -| `i16x8.lt_s` | `0x24`| - | -| `i16x8.lt_u` | `0x25`| - | -| `i16x8.gt_s` | `0x26`| - | -| `i16x8.gt_u` | `0x27`| - | -| `i16x8.le_s` | `0x28`| - | -| `i16x8.le_u` | `0x29`| - | -| `i16x8.ge_s` | `0x2a`| - | -| `i16x8.ge_u` | `0x2b`| - | -| `i32x4.eq` | `0x2c`| - | -| `i32x4.ne` | `0x2d`| - | -| `i32x4.lt_s` | `0x2e`| - | -| `i32x4.lt_u` | `0x2f`| - | -| `i32x4.gt_s` | `0x30`| - | -| `i32x4.gt_u` | `0x31`| - | -| `i32x4.le_s` | `0x32`| - | -| `i32x4.le_u` | `0x33`| - | -| `i32x4.ge_s` | `0x34`| - | -| `i32x4.ge_u` | `0x35`| - | -| `f32x4.eq` | `0x40`| - | -| `f32x4.ne` | `0x41`| - | -| `f32x4.lt` | `0x42`| - | -| `f32x4.gt` | `0x43`| - | -| `f32x4.le` | `0x44`| - | -| `f32x4.ge` | `0x45`| - | -| `f64x2.eq` | `0x46`| - | -| `f64x2.ne` | `0x47`| - | -| `f64x2.lt` | `0x48`| - | -| `f64x2.gt` | `0x49`| - | -| `f64x2.le` | `0x4a`| - | -| `f64x2.ge` | `0x4b`| - | -| `v128.not` | `0x4c`| - | -| `v128.and` | `0x4d`| - | -| `v128.or` | `0x4e`| - | -| `v128.xor` | `0x4f`| - | -| `v128.bitselect` | `0x50`| - | -| `i8x16.neg` | `0x51`| - | -| `i8x16.any_true` | `0x52`| - | -| `i8x16.all_true` | `0x53`| - | -| `i8x16.shl` | `0x54`| - | -| `i8x16.shr_s` | `0x55`| - | -| `i8x16.shr_u` | `0x56`| - | -| `i8x16.add` | `0x57`| - | -| `i8x16.add_saturate_s` | `0x58`| - | -| `i8x16.add_saturate_u` | `0x59`| - | -| `i8x16.sub` | `0x5a`| - | -| `i8x16.sub_saturate_s` | `0x5b`| - | -| `i8x16.sub_saturate_u` | `0x5c`| - | -| `i8x16.min_s` | `0x5e`| - | -| `i8x16.min_u` | `0x5f`| - | -| `i8x16.max_s` | `0x60`| - | -| `i8x16.max_u` | `0x61`| - | -| `i16x8.neg` | `0x62`| - | -| `i16x8.any_true` | `0x63`| - | -| `i16x8.all_true` | `0x64`| - | -| `i16x8.shl` | `0x65`| - | -| `i16x8.shr_s` | `0x66`| - | -| `i16x8.shr_u` | `0x67`| - | -| `i16x8.add` | `0x68`| - | -| `i16x8.add_saturate_s` | `0x69`| - | -| `i16x8.add_saturate_u` | `0x6a`| - | -| `i16x8.sub` | `0x6b`| - | -| `i16x8.sub_saturate_s` | `0x6c`| - | -| `i16x8.sub_saturate_u` | `0x6d`| - | -| `i16x8.mul` | `0x6e`| - | -| `i16x8.min_s` | `0x6f`| - | -| `i16x8.min_u` | `0x70`| - | -| `i16x8.max_s` | `0x71`| - | -| `i16x8.max_u` | `0x72`| - | -| `i32x4.neg` | `0x73`| - | -| `i32x4.any_true` | `0x74`| - | -| `i32x4.all_true` | `0x75`| - | -| `i32x4.shl` | `0x76`| - | -| `i32x4.shr_s` | `0x77`| - | -| `i32x4.shr_u` | `0x78`| - | -| `i32x4.add` | `0x79`| - | -| `i32x4.sub` | `0x7c`| - | -| `i32x4.mul` | `0x7f`| - | -| `i32x4.min_s` | `0x80`| - | -| `i32x4.min_u` | `0x81`| - | -| `i32x4.max_s` | `0x82`| - | -| `i32x4.max_u` | `0x83`| - | -| `i64x2.neg` | `0x84`| - | -| `i64x2.shl` | `0x87`| - | -| `i64x2.shr_s` | `0x88`| - | -| `i64x2.shr_u` | `0x89`| - | -| `i64x2.add` | `0x8a`| - | -| `i64x2.sub` | `0x8d`| - | -| `i64x2.mul` | `0x90`| - | -| `f32x4.abs` | `0x95`| - | -| `f32x4.neg` | `0x96`| - | -| `f32x4.sqrt` | `0x97`| - | -| `f32x4.add` | `0x9a`| - | -| `f32x4.sub` | `0x9b`| - | -| `f32x4.mul` | `0x9c`| - | -| `f32x4.div` | `0x9d`| - | -| `f32x4.min` | `0x9e`| - | -| `f32x4.max` | `0x9f`| - | -| `f64x2.abs` | `0xa0`| - | -| `f64x2.neg` | `0xa1`| - | -| `f64x2.sqrt` | `0xa2`| - | -| `f64x2.add` | `0xa5`| - | -| `f64x2.sub` | `0xa6`| - | -| `f64x2.mul` | `0xa7`| - | -| `f64x2.div` | `0xa8`| - | -| `f64x2.min` | `0xa9`| - | -| `f64x2.max` | `0xaa`| - | -| `i32x4.trunc_sat_f32x4_s` | `0xab`| - | -| `i32x4.trunc_sat_f32x4_u` | `0xac`| - | -| `f32x4.convert_i32x4_s` | `0xaf`| - | -| `f32x4.convert_i32x4_u` | `0xb0`| - | -| `v8x16.swizzle` | `0xc0`| - | -| `v8x16.shuffle` | `0xc1`| s:LaneIdx32[16] | -| `v8x16.load_splat` | `0xc2`| - | -| `v16x8.load_splat` | `0xc3`| - | -| `v32x4.load_splat` | `0xc4`| - | -| `v64x2.load_splat` | `0xc5`| - | -| `i8x16.narrow_i16x8_s` | `0xc6`| - | -| `i8x16.narrow_i16x8_u` | `0xc7`| - | -| `i16x8.narrow_i32x4_s` | `0xc8`| - | -| `i16x8.narrow_i32x4_u` | `0xc9`| - | -| `i16x8.widen_low_i8x16_s` | `0xca`| - | -| `i16x8.widen_high_i8x16_s` | `0xcb`| - | -| `i16x8.widen_low_i8x16_u` | `0xcc`| - | -| `i16x8.widen_high_i8x16_u` | `0xcd`| - | -| `i32x4.widen_low_i16x8_s` | `0xce`| - | -| `i32x4.widen_high_i16x8_s` | `0xcf`| - | -| `i32x4.widen_low_i16x8_u` | `0xd0`| - | -| `i32x4.widen_high_i16x8_u` | `0xd1`| - | -| `i16x8.load8x8_s` | `0xd2`| m:memarg | -| `i16x8.load8x8_u` | `0xd3`| m:memarg | -| `i32x4.load16x4_s` | `0xd4`| m:memarg | -| `i32x4.load16x4_u` | `0xd5`| m:memarg | -| `i64x2.load32x2_s` | `0xd6`| m:memarg | -| `i64x2.load32x2_u` | `0xd7`| m:memarg | -| `v128.andnot` | `0xd8`| - | -| `i8x16.avgr_u` | `0xd9`| | -| `i16x8.avgr_u` | `0xda`| | -| `i8x16.abs` | `0xe1`| - | -| `i16x8.abs` | `0xe2`| - | -| `i32x4.abs` | `0xe3`| - | +| `i16x8.load8x8_s` | `0x01`| m:memarg | +| `i16x8.load8x8_u` | `0x02`| m:memarg | +| `i32x4.load16x4_s` | `0x03`| m:memarg | +| `i32x4.load16x4_u` | `0x04`| m:memarg | +| `i64x2.load32x2_s` | `0x05`| m:memarg | +| `i64x2.load32x2_u` | `0x06`| m:memarg | +| `v8x16.load_splat` | `0x07`| m:memarg | +| `v16x8.load_splat` | `0x08`| m:memarg | +| `v32x4.load_splat` | `0x09`| m:memarg | +| `v64x2.load_splat` | `0x0a`| m:memarg | +| `v128.store` | `0x0b`| m:memarg | +| `v128.const` | `0x0c`| i:ImmByte[16] | +| `v8x16.shuffle` | `0x0d`| s:LaneIdx32[16] | +| `v8x16.swizzle` | `0x0e`| - | +| `i8x16.splat` | `0x0f`| - | +| `i16x8.splat` | `0x10`| - | +| `i32x4.splat` | `0x11`| - | +| `i64x2.splat` | `0x12`| - | +| `f32x4.splat` | `0x13`| - | +| `f64x2.splat` | `0x14`| - | +| `i8x16.extract_lane_s` | `0x15`| i:LaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:LaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:LaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:LaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:LaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:LaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:LaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:LaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:LaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:LaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:LaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:LaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:LaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:LaneIdx2 | +| `i8x16.eq` | `0x23`| - | +| `i8x16.ne` | `0x24`| - | +| `i8x16.lt_s` | `0x25`| - | +| `i8x16.lt_u` | `0x26`| - | +| `i8x16.gt_s` | `0x27`| - | +| `i8x16.gt_u` | `0x28`| - | +| `i8x16.le_s` | `0x29`| - | +| `i8x16.le_u` | `0x2a`| - | +| `i8x16.ge_s` | `0x2b`| - | +| `i8x16.ge_u` | `0x2c`| - | +| `i16x8.eq` | `0x2d`| - | +| `i16x8.ne` | `0x2e`| - | +| `i16x8.lt_s` | `0x2f`| - | +| `i16x8.lt_u` | `0x30`| - | +| `i16x8.gt_s` | `0x31`| - | +| `i16x8.gt_u` | `0x32`| - | +| `i16x8.le_s` | `0x33`| - | +| `i16x8.le_u` | `0x34`| - | +| `i16x8.ge_s` | `0x35`| - | +| `i16x8.ge_u` | `0x36`| - | +| `i32x4.eq` | `0x37`| - | +| `i32x4.ne` | `0x38`| - | +| `i32x4.lt_s` | `0x39`| - | +| `i32x4.lt_u` | `0x3a`| - | +| `i32x4.gt_s` | `0x3b`| - | +| `i32x4.gt_u` | `0x3c`| - | +| `i32x4.le_s` | `0x3d`| - | +| `i32x4.le_u` | `0x3e`| - | +| `i32x4.ge_s` | `0x3f`| - | +| `i32x4.ge_u` | `0x40`| - | +| `f32x4.eq` | `0x41`| - | +| `f32x4.ne` | `0x42`| - | +| `f32x4.lt` | `0x43`| - | +| `f32x4.gt` | `0x44`| - | +| `f32x4.le` | `0x45`| - | +| `f32x4.ge` | `0x46`| - | +| `f64x2.eq` | `0x47`| - | +| `f64x2.ne` | `0x48`| - | +| `f64x2.lt` | `0x49`| - | +| `f64x2.gt` | `0x4a`| - | +| `f64x2.le` | `0x4b`| - | +| `f64x2.ge` | `0x4c`| - | +| `v128.not` | `0x4d`| - | +| `v128.and` | `0x4e`| - | +| `v128.andnot` | `0x4f`| - | +| `v128.or` | `0x50`| - | +| `v128.xor` | `0x51`| - | +| `v128.bitselect` | `0x52`| - | +| `i8x16.abs` | `0x60`| - | +| `i8x16.neg` | `0x61`| - | +| `i8x16.any_true` | `0x62`| - | +| `i8x16.all_true` | `0x63`| - | +| `i8x16.narrow_i16x8_s` | `0x65`| - | +| `i8x16.narrow_i16x8_u` | `0x66`| - | +| `i8x16.shl` | `0x6b`| - | +| `i8x16.shr_s` | `0x6c`| - | +| `i8x16.shr_u` | `0x6d`| - | +| `i8x16.add` | `0x6e`| - | +| `i8x16.add_saturate_s` | `0x6f`| - | +| `i8x16.add_saturate_u` | `0x70`| - | +| `i8x16.sub` | `0x71`| - | +| `i8x16.sub_saturate_s` | `0x72`| - | +| `i8x16.sub_saturate_u` | `0x73`| - | +| `i8x16.min_s` | `0x76`| - | +| `i8x16.min_u` | `0x77`| - | +| `i8x16.max_s` | `0x78`| - | +| `i8x16.max_u` | `0x79`| - | +| `i8x16.avgr_u` | `0x7b`| - | +| `i16x8.abs` | `0x80`| - | +| `i16x8.neg` | `0x81`| - | +| `i16x8.any_true` | `0x82`| - | +| `i16x8.all_true` | `0x83`| - | +| `i16x8.narrow_i32x4_s` | `0x85`| - | +| `i16x8.narrow_i32x4_u` | `0x86`| - | +| `i16x8.widen_low_i8x16_s` | `0x87`| - | +| `i16x8.widen_high_i8x16_s` | `0x88`| - | +| `i16x8.widen_low_i8x16_u` | `0x89`| - | +| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.shl` | `0x8b`| - | +| `i16x8.shr_s` | `0x8c`| - | +| `i16x8.shr_u` | `0x8d`| - | +| `i16x8.add` | `0x8e`| - | +| `i16x8.add_saturate_s` | `0x8f`| - | +| `i16x8.add_saturate_u` | `0x90`| - | +| `i16x8.sub` | `0x91`| - | +| `i16x8.sub_saturate_s` | `0x92`| - | +| `i16x8.sub_saturate_u` | `0x93`| - | +| `i16x8.mul` | `0x95`| - | +| `i16x8.min_s` | `0x96`| - | +| `i16x8.min_u` | `0x97`| - | +| `i16x8.max_s` | `0x98`| - | +| `i16x8.max_u` | `0x99`| - | +| `i16x8.avgr_u` | `0x9b`| | +| `i32x4.abs` | `0xa0`| - | +| `i32x4.neg` | `0xa1`| - | +| `i32x4.any_true` | `0xa2`| - | +| `i32x4.all_true` | `0xa3`| - | +| `i32x4.widen_low_i16x8_s` | `0xa7`| - | +| `i32x4.widen_high_i16x8_s` | `0xa8`| - | +| `i32x4.widen_low_i16x8_u` | `0xa9`| - | +| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.shl` | `0xab`| - | +| `i32x4.shr_s` | `0xac`| - | +| `i32x4.shr_u` | `0xad`| - | +| `i32x4.add` | `0xae`| - | +| `i32x4.sub` | `0xb1`| - | +| `i32x4.mul` | `0xb5`| - | +| `i32x4.min_s` | `0xb6`| - | +| `i32x4.min_u` | `0xb7`| - | +| `i32x4.max_s` | `0xb8`| - | +| `i32x4.max_u` | `0xb9`| - | +| `i64x2.neg` | `0xc1`| - | +| `i64x2.shl` | `0xcb`| - | +| `i64x2.shr_s` | `0xcc`| - | +| `i64x2.shr_u` | `0xcd`| - | +| `i64x2.add` | `0xce`| - | +| `i64x2.sub` | `0xd1`| - | +| `i64x2.mul` | `0xd5`| - | +| `f32x4.abs` | `0xe0`| - | +| `f32x4.neg` | `0xe1`| - | +| `f32x4.sqrt` | `0xe3`| - | +| `f32x4.add` | `0xe4`| - | +| `f32x4.sub` | `0xe5`| - | +| `f32x4.mul` | `0xe6`| - | +| `f32x4.div` | `0xe7`| - | +| `f32x4.min` | `0xe8`| - | +| `f32x4.max` | `0xe9`| - | +| `f64x2.abs` | `0xec`| - | +| `f64x2.neg` | `0xed`| - | +| `f64x2.sqrt` | `0xef`| - | +| `f64x2.add` | `0xf0`| - | +| `f64x2.sub` | `0xf1`| - | +| `f64x2.mul` | `0xf2`| - | +| `f64x2.div` | `0xf3`| - | +| `f64x2.min` | `0xf4`| - | +| `f64x2.max` | `0xf5`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | +| `f32x4.convert_i32x4_s` | `0xfa`| - | +| `f32x4.convert_i32x4_u` | `0xfb`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 58444f0c63..65ae4c67f7 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,185 +1,185 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | -| ---------------------------|---------------------------|-----------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v16x8.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v32x4.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v64x2.load_splat` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `v128.or` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | | :heavy_check_mark: | :heavy_check_mark: | | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `v8x16.swizzle` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.load8x8_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.load8x8_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.load16x4_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.load16x4_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i64x2.load32x2_s` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i64x2.load32x2_u` | `-munimplemented-simd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | +| ---------------------------|---------------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | +| `v8x16.load_splat` | `-msimd128` | :heavy_check_mark: | | | +| `v16x8.load_splat` | `-msimd128` | :heavy_check_mark: | | | +| `v32x4.load_splat` | `-msimd128` | :heavy_check_mark: | | | +| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | | +| `v128.const` | `-munimplemented-simd128` | | | | +| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | +| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | | +| `v128.not` | `-msimd128` | :heavy_check_mark: | | | +| `v128.and` | `-msimd128` | :heavy_check_mark: | | | +| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | +| `v128.or` | `-msimd128` | :heavy_check_mark: | | | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | | | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | | +| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | -[1] Tip of tree LLVM as of May 6, 2020 +[1] Tip of tree LLVM as of May 20, 2020 -[2] Tested on V8 8.4.272. Requires flag `--experimental-wasm-simd` +[2] V8 8.4.268. Requires flag `--experimental-wasm-simd` -[3] Tip of tree WAVM as of Feb 16, 2020. Requires flag `--enable simd` +[3] Not known to be updated after latest renumbering. Requires flag `--enable simd` -[4] Requires (case-insensitive) flag `-wasmsimd` +[4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md new file mode 100644 index 0000000000..b7aaae2c0f --- /dev/null +++ b/proposals/simd/NewOpcodes.md @@ -0,0 +1,130 @@ +| Memory instruction | opcode | +| ------------------ | ------ | +| v128.load | 0x00 | +| i16x8.load8x8_s | 0x01 | +| i16x8.load8x8_u | 0x02 | +| i32x4.load16x4_s | 0x03 | +| i32x4.load16x4_u | 0x04 | +| i64x2.load32x2_s | 0x05 | +| i64x2.load32x2_u | 0x06 | +| v8x16.load_splat | 0x07 | +| v16x8.load_splat | 0x08 | +| v32x4.load_splat | 0x09 | +| v64x2.load_splat | 0x0a | +| v128.store | 0x0b | + +| Basic operation | opcode | +| ----------------| ------ | +| v128.const | 0x0c | +| v8x16.shuffle | 0x0d | +| v8x16.swizzle | 0x0e | + +| Splat operation | opcode | +| --------------- | ------ | +| i8x16.splat | 0x0f | +| i16x8.splat | 0x10 | +| i32x4.splat | 0x11 | +| i64x2.splat | 0x12 | +| f32x4.splat | 0x13 | +| f64x2.splat | 0x14 | + +| Lane operation | opcode | +| -------------------- | ------ | +| i8x16.extract_lane_s | 0x15 | +| i8x16.extract_lane_u | 0x16 | +| i8x16.replace_lane | 0x17 | +| i16x8.extract_lane_s | 0x18 | +| i16x8.extract_lane_u | 0x19 | +| i16x8.replace_lane | 0x1a | +| i32x4.extract_lane | 0x1b | +| i32x4.replace_lane | 0x1c | +| i64x2.extract_lane | 0x1d | +| i64x2.replace_lane | 0x1e | +| f32x4.extract_lane | 0x1f | +| f32x4.replace_lane | 0x20 | +| f64x2.extract_lane | 0x21 | +| f64x2.replace_lane | 0x22 | + +| i8x16 Cmp | opcode | i16x8 Cmp | opcode | i32x4 Cmp | opcode | +| ---------- | ------ | ---------- | ------ | ---------- | ------ | +| i8x16.eq | 0x23 | i16x8.eq | 0x2d | i32x4.eq | 0x37 | +| i8x16.ne | 0x24 | i16x8.ne | 0x2e | i32x4.ne | 0x38 | +| i8x16.lt_s | 0x25 | i16x8.lt_s | 0x2f | i32x4.lt_s | 0x39 | +| i8x16.lt_u | 0x26 | i16x8.lt_u | 0x30 | i32x4.lt_u | 0x3a | +| i8x16.gt_s | 0x27 | i16x8.gt_s | 0x31 | i32x4.gt_s | 0x3b | +| i8x16.gt_u | 0x28 | i16x8.gt_u | 0x32 | i32x4.gt_u | 0x3c | +| i8x16.le_s | 0x29 | i16x8.le_s | 0x33 | i32x4.le_s | 0x3d | +| i8x16.le_u | 0x2a | i16x8.le_u | 0x34 | i32x4.le_u | 0x3e | +| i8x16.ge_s | 0x2b | i16x8.ge_s | 0x35 | i32x4.ge_s | 0x3f | +| i8x16.ge_u | 0x2c | i16x8.ge_u | 0x36 | i32x4.ge_u | 0x40 | + +| f32x4 Cmp | opcode | f64x2 Cmp | opcode | +| --------- | ------ | --------- | ------ | +| f32x4.eq | 0x41 | f64x2.eq | 0x47 | +| f32x4.ne | 0x42 | f64x2.ne | 0x48 | +| f32x4.lt | 0x43 | f64x2.lt | 0x49 | +| f32x4.gt | 0x44 | f64x2.gt | 0x4a | +| f32x4.le | 0x45 | f64x2.le | 0x4b | +| f32x4.ge | 0x46 | f64x2.ge | 0x4c | + +| v128 Op | opcode | +| -------------- | ------ | +| v128.not | 0x4d | +| v128.and | 0x4e | +| v128.andnot | 0x4f | +| v128.or | 0x50 | +| v128.xor | 0x51 | +| v128.bitselect | 0x52 | + +| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | +| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ----------- | ------ | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | +| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | +| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | +| ---- bitmask ---- | 0x64 | ---- bitmask ---- | 0x84 | ---- bitmask ---- | 0xa4 | ---- | 0xc4 | +| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | +| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | +| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | ---- | 0xc7 | +| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | ---- | 0xc8 | +| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | ---- | 0xc9 | +| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | ---- | 0xca | +| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | +| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | +| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | +| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | +| i8x16.add_saturate_s | 0x6f | i16x8.add_saturate_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | +| i8x16.add_saturate_u | 0x70 | i16x8.add_saturate_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | +| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | +| i8x16.sub_saturate_s | 0x72 | i16x8.sub_saturate_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | +| i8x16.sub_saturate_u | 0x73 | i16x8.sub_saturate_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | +| ---- dot ---- | 0x74 | ---- dot ---- | 0x94 | ---- dot ---- | 0xb4 | ---- | 0xd4 | +| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | +| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | +| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | +| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | +| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | +| ---- avgr_s ---- | 0x7a | ---- avgr_s ---- | 0x9a | ---- avgr_s ---- | 0xba | ---- | 0xda | +| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | + +| f32x4 Op | opcode | f64x2 Op | opcode | +| --------------- | ------ | --------------- | ------ | +| f32x4.abs | 0xe0 | f64x2.abs | 0xec | +| f32x4.neg | 0xe1 | f64x2.neg | 0xed | +| ---- round ---- | 0xe2 | ---- round ---- | 0xee | +| f32x4.sqrt | 0xe3 | f64x2.sqrt | 0xef | +| f32x4.add | 0xe4 | f64x2.add | 0xf0 | +| f32x4.sub | 0xe5 | f64x2.sub | 0xf1 | +| f32x4.mul | 0xe6 | f64x2.mul | 0xf2 | +| f32x4.div | 0xe7 | f64x2.div | 0xf3 | +| f32x4.min | 0xe8 | f64x2.min | 0xf4 | +| f32x4.max | 0xe9 | f64x2.max | 0xf5 | +| ---- pmin ---- | 0xea | ---- pmin ---- | 0xf6 | +| ---- pmax ---- | 0xeb | ---- pmax ---- | 0xf7 | + +| Conversion Op | opcode | +| ----------------------- | ------ | +| i32x4.trunc_sat_f32x4_s | 0xf8 | +| i32x4.trunc_sat_f32x4_u | 0xf9 | +| f32x4.convert_i32x4_s | 0xfa | +| f32x4.convert_i32x4_u | 0xfb | diff --git a/test/core/simd/simd_const.wast b/test/core/simd/simd_const.wast index 41fb608d88..8080cfb0f9 100644 --- a/test/core/simd/simd_const.wast +++ b/test/core/simd/simd_const.wast @@ -1571,7 +1571,7 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\69\38\78\31\36\00\00" ;; export name (parse_i8x16) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\00\00\00\00" ;; data lane 0~3 (0, 0, 0, 0) "\80\80\80\80" ;; data lane 4~7 (-128, -128, -128, -128) "\ff\ff\ff\ff" ;; data lane 8~11 (0xff, 0xff, 0xff, 0xff) @@ -1588,7 +1588,7 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\69\31\36\78\38\00\00" ;; export name (parse_i16x8) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\00\00\00\00" ;; data lane 0, 1 (0, 0) "\00\80\00\80" ;; data lane 2, 3 (-32768, -32768) "\ff\ff\ff\ff" ;; data lane 4, 5 (65535, 65535) @@ -1605,7 +1605,7 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\69\33\32\78\34\00\00" ;; export name (parse_i32x4) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\d1\ff\ff\ff" ;; data lane 0 (4294967249) "\d1\ff\ff\ff" ;; data lane 1 (4294967249) "\d1\ff\ff\ff" ;; data lane 2 (4294967249) @@ -1622,7 +1622,7 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\69\36\34\78\32\00\00" ;; export name (parse_i64x2) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\ff\ff\ff\ff\ff\ff\ff\7f" ;; data lane 0 (9223372036854775807) "\ff\ff\ff\ff\ff\ff\ff\7f" ;; data lane 1 (9223372036854775807) "\0b" ;; end @@ -1639,7 +1639,7 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\66\33\32\78\34\00\00" ;; export name (parse_f32x4) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\00\00\80\4f" ;; data lane 0 (4294967249) "\00\00\80\4f" ;; data lane 1 (4294967249) "\00\00\80\4f" ;; data lane 2 (4294967249) @@ -1656,9 +1656,9 @@ "\07\0f\01\0b" ;; export section "\70\61\72\73\65\5f\66\36\34\78\32\00\00" ;; export name (parse_f64x2) "\0a\16\01" ;; code section - "\14\00\fd\02" ;; func body + "\14\00\fd\0c" ;; func body "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 0 (0x1.fffffffffffffp+1023) "\ff\ff\ff\ff\ff\ff\ef\7f" ;; data lane 1 (0x1.fffffffffffffp+1023) "\0b" ;; end ) -(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) \ No newline at end of file +(assert_return (invoke "parse_f64x2") (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) From 6f8e0790e9d4ed96f35575974383ecbc9b0101d9 Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Mon, 25 May 2020 11:56:02 +0200 Subject: [PATCH 148/378] Add SpiderMonkey implementation status --- proposals/simd/ImplementationStatus.md | 356 +++++++++++++------------ 1 file changed, 179 insertions(+), 177 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 65ae4c67f7..cc944436ac 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,180 +1,180 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | -| ---------------------------|---------------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | -| `v8x16.load_splat` | `-msimd128` | :heavy_check_mark: | | | -| `v16x8.load_splat` | `-msimd128` | :heavy_check_mark: | | | -| `v32x4.load_splat` | `-msimd128` | :heavy_check_mark: | | | -| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | -| `v128.store` | `-msimd128` | :heavy_check_mark: | | | -| `v128.const` | `-munimplemented-simd128` | | | | -| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | -| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | | -| `v128.not` | `-msimd128` | :heavy_check_mark: | | | -| `v128.and` | `-msimd128` | :heavy_check_mark: | | | -| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | -| `v128.or` | `-msimd128` | :heavy_check_mark: | | | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | | | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | -| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | -| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | | -| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | +| ---------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v8x16.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v16x8.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v32x4.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | | | | :heavy_check_mark: | +| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | [1] Tip of tree LLVM as of May 20, 2020 @@ -183,3 +183,5 @@ [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` [4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` + +[5] FF78 Nightly x64 SSE4.1+ only, enabled by default, disable in about:config under `javascript.options.wasm_simd` From 710f8708906ea4d63107a60842f4c2c95e28b723 Mon Sep 17 00:00:00 2001 From: Arseny Kapoulkine Date: Wed, 27 May 2020 19:37:15 -0700 Subject: [PATCH 149/378] Add .bitmask instruction family (#201) * Add .bitmask instruction family i8x16.bitmask and i32x4.bitmask directly map to SSE movemask instructions; i16x8.bitmask can be synthesized using packs+movemask. These instructions are important to be able to do lane-wise processing after a vector comparison - for example, these can be used together with ctz to find the index of the first lane with the matching values after a comparison instruction. * Update opcode tables with bitmask --- proposals/simd/BinarySIMD.md | 3 +++ proposals/simd/ImplementationStatus.md | 3 +++ proposals/simd/NewOpcodes.md | 2 +- proposals/simd/SIMD.md | 18 ++++++++++++++++++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index ab88336bcd..6c8adcdb25 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -114,6 +114,7 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.neg` | `0x61`| - | | `i8x16.any_true` | `0x62`| - | | `i8x16.all_true` | `0x63`| - | +| `i8x16.bitmask` | `0x64`| - | | `i8x16.narrow_i16x8_s` | `0x65`| - | | `i8x16.narrow_i16x8_u` | `0x66`| - | | `i8x16.shl` | `0x6b`| - | @@ -134,6 +135,7 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i16x8.neg` | `0x81`| - | | `i16x8.any_true` | `0x82`| - | | `i16x8.all_true` | `0x83`| - | +| `i16x8.bitmask` | `0x84`| - | | `i16x8.narrow_i32x4_s` | `0x85`| - | | `i16x8.narrow_i32x4_u` | `0x86`| - | | `i16x8.widen_low_i8x16_s` | `0x87`| - | @@ -159,6 +161,7 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.neg` | `0xa1`| - | | `i32x4.any_true` | `0xa2`| - | | `i32x4.all_true` | `0xa3`| - | +| `i32x4.bitmask` | `0xa4`| - | | `i32x4.widen_low_i16x8_s` | `0xa7`| - | | `i32x4.widen_high_i16x8_s` | `0xa8`| - | | `i32x4.widen_low_i16x8_u` | `0xa9`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index cc944436ac..2353ae98f2 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -87,6 +87,7 @@ | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -107,6 +108,7 @@ | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -132,6 +134,7 @@ | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | | `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index b7aaae2c0f..2752fa2a55 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -82,7 +82,7 @@ | i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | | i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | | i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | -| ---- bitmask ---- | 0x64 | ---- bitmask ---- | 0x84 | ---- bitmask ---- | 0xa4 | ---- | 0xc4 | +| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | ---- | 0xc4 | | i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | | i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | | ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | ---- | 0xc7 | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index bfc81d5c71..56940aa22e 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -648,6 +648,24 @@ def S.all_true(a): return 1 ``` +## Bitmask extraction + +* `i8x16.bitmask(a: v128) -> i32` +* `i16x8.bitmask(a: v128) -> i32` +* `i32x4.bitmask(a: v128) -> i32` + +These operations extract the high bit for each lane in `a` and produce a scalar +mask with all bits concatenated. + +```python +def S.bitmask(a): + result = 0 + for i in range(S.Lanes): + if a[i] < 0: + result = result | (1 << i) + return result +``` + ## Comparisons The comparison operations all compare two vectors lane-wise, and produce a mask From aa8c8332f9a6b68cf82ff5e2d9e02c97070d3bfa Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+arunetm@users.noreply.github.com> Date: Sat, 30 May 2020 19:54:53 -0700 Subject: [PATCH 150/378] Create W3CTAG-SIMDExplainer.md High level explainer document on SIMD for W3C TAG review. --- proposals/simd/W3CTAG-SIMDExplainer.md | 70 ++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 proposals/simd/W3CTAG-SIMDExplainer.md diff --git a/proposals/simd/W3CTAG-SIMDExplainer.md b/proposals/simd/W3CTAG-SIMDExplainer.md new file mode 100644 index 0000000000..6f3b7c90a4 --- /dev/null +++ b/proposals/simd/W3CTAG-SIMDExplainer.md @@ -0,0 +1,70 @@ +# WASM SIMD Web Platform explainer + +## User benefits +Modern processors support running multiple common computations in a single operation, so that instead of multiplying a number with a number, you can add (or multiple, subtract etc) the individual components of a fixed sized vector instead. + +##### Scalar operation ##### + +``` +Ax + Bx = Cx +Ay + By = Cy +Az + Bz = Cz +Aw + Bw = Cw +``` + +##### SIMD Operation of Vector Length 4 ##### + +`Ax`|`Ay`|`Az`|`Aw` +--|--|--|-- + +

+            +
+
+ +`Bx`|`By`|`Bz`|`Bw` +--|--|--|-- + +
+            =
+
+ +`Cx`|`Cy`|`Cz`|`Cw` +--|--|--|-- + + + + + + +This feature is called [Single Instruction Multiple Data (SIMD)](https://en.wikipedia.org/wiki/SIMD), and though there exist hardware that supports vector lengths up to 512 bits, 128-bit SIMD is the most common and is supported across common hardware architectures. + +SIMD has driven large speed ups in certain cases such as image manipulation, video encoding/decoding, machine learning, game engines and physics engines etc[3] - with some of these use-cases not being usable without SIMD support, making SIMD support for the web platform essential for achieving near-native speed with certain native applications. + +This proposal outlines exposing a commonly available subset of 128-bit SIMD hardware instructions through WebAssembly. + +## Design principles +This proposal consists of a portable set of widely used SIMD operations mapping closely to instructions available in modern hardware. The proposal draws heavily on inputs from application developers on the usefulness of the instructions and implementer feedback on performance. + +JavaScript applications can access the SIMD values in WebAssembly module memory indirectly as scalar values through Arraybuffers, and manipulate them using function calls into WebAssembly. The 128-bit values are not currently exposed to JavaScript. There are no known accessibility, security or privacy implications specific to this feature. + +## Prior work +The current proposal builds on top of the [SIMD.js TC39 proposal](https://github.com/tc39/ecmascript_simd), which is no longer under active development. The SIMD.js proposal was abandoned for a few reasons: + +Significant performance cliffs hidden within its high level abstractions making it challenging for real world applications to gain consistent benefits. +Gains only seen in carefully crafted asm.js code, which is not representative of the majority of JavaScript code in the wild. +High cost of implementation and optimization in engines that outweighed performance wins. + +Most of these were offset by the low level abstractions in WebAssembly, where we observed consistent performance across multiple architectures on real world applications. +https://github.com/tc39/ecmascript_simd +## References +[1] GitHub repo: https://github.com/WebAssembly/simd + +[2] Proposal directory: https://github.com/WebAssembly/simd/tree/master/proposals/simd + +[3] Example usage and demos: https://v8.dev/features/simd + +[4] Tests: https://github.com/WebAssembly/simd/tree/master/test/core/simd + +[5] External status/issue trackers for this feature: https://www.chromestatus.com/feature/6533147810332672 + +[6] SIMD.js: https://github.com/tc39/ecmascript_simd From 413da21efe023c883c64982d840b4b0f996509fe Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+arunetm@users.noreply.github.com> Date: Sat, 30 May 2020 19:58:42 -0700 Subject: [PATCH 151/378] Format fixes --- proposals/simd/W3CTAG-SIMDExplainer.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/proposals/simd/W3CTAG-SIMDExplainer.md b/proposals/simd/W3CTAG-SIMDExplainer.md index 6f3b7c90a4..5782b5cff4 100644 --- a/proposals/simd/W3CTAG-SIMDExplainer.md +++ b/proposals/simd/W3CTAG-SIMDExplainer.md @@ -50,9 +50,9 @@ JavaScript applications can access the SIMD values in WebAssembly module memory ## Prior work The current proposal builds on top of the [SIMD.js TC39 proposal](https://github.com/tc39/ecmascript_simd), which is no longer under active development. The SIMD.js proposal was abandoned for a few reasons: -Significant performance cliffs hidden within its high level abstractions making it challenging for real world applications to gain consistent benefits. -Gains only seen in carefully crafted asm.js code, which is not representative of the majority of JavaScript code in the wild. -High cost of implementation and optimization in engines that outweighed performance wins. +* Significant performance cliffs hidden within its high level abstractions making it challenging for real world applications to gain consistent benefits. +* Gains only seen in carefully crafted asm.js code, which is not representative of the majority of JavaScript code in the wild. +* High cost of implementation and optimization in engines that outweighed performance wins. Most of these were offset by the low level abstractions in WebAssembly, where we observed consistent performance across multiple architectures on real world applications. https://github.com/tc39/ecmascript_simd From ca88f93fae0073ecdfc271197ae7bfadeb30ba5e Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+arunetm@users.noreply.github.com> Date: Tue, 2 Jun 2020 07:47:07 -0700 Subject: [PATCH 152/378] Update W3CTAG-SIMDExplainer.md --- proposals/simd/W3CTAG-SIMDExplainer.md | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/proposals/simd/W3CTAG-SIMDExplainer.md b/proposals/simd/W3CTAG-SIMDExplainer.md index 5782b5cff4..4d0e461a7f 100644 --- a/proposals/simd/W3CTAG-SIMDExplainer.md +++ b/proposals/simd/W3CTAG-SIMDExplainer.md @@ -1,7 +1,7 @@ # WASM SIMD Web Platform explainer ## User benefits -Modern processors support running multiple common computations in a single operation, so that instead of multiplying a number with a number, you can add (or multiple, subtract etc) the individual components of a fixed sized vector instead. +Modern processors support running multiple common computations in a single operation, so that instead of multiplying a number with a number, you can add (or multiply, subtract, etc.) the individual components of a fixed sized vector instead. ##### Scalar operation ##### @@ -36,9 +36,9 @@ Aw + Bw = Cw -This feature is called [Single Instruction Multiple Data (SIMD)](https://en.wikipedia.org/wiki/SIMD), and though there exist hardware that supports vector lengths up to 512 bits, 128-bit SIMD is the most common and is supported across common hardware architectures. +This feature is called [Single Instruction Multiple Data (SIMD)](https://en.wikipedia.org/wiki/SIMD), and though there hardware support exists for vector lengths up to 512 bits, 128-bit SIMD is the most common and is supported across common hardware architectures. -SIMD has driven large speed ups in certain cases such as image manipulation, video encoding/decoding, machine learning, game engines and physics engines etc[3] - with some of these use-cases not being usable without SIMD support, making SIMD support for the web platform essential for achieving near-native speed with certain native applications. +SIMD has driven large speed ups in certain cases such as image manipulation, video encoding/decoding, machine learning, game engines and physics engines etc - with some of these use-cases not being usable without SIMD support, making SIMD support for the web platform essential for achieving near-native speed with certain native applications. This proposal outlines exposing a commonly available subset of 128-bit SIMD hardware instructions through WebAssembly. @@ -55,7 +55,7 @@ The current proposal builds on top of the [SIMD.js TC39 proposal](https://github * High cost of implementation and optimization in engines that outweighed performance wins. Most of these were offset by the low level abstractions in WebAssembly, where we observed consistent performance across multiple architectures on real world applications. -https://github.com/tc39/ecmascript_simd + ## References [1] GitHub repo: https://github.com/WebAssembly/simd @@ -68,3 +68,5 @@ https://github.com/tc39/ecmascript_simd [5] External status/issue trackers for this feature: https://www.chromestatus.com/feature/6533147810332672 [6] SIMD.js: https://github.com/tc39/ecmascript_simd + +[7] W3C Tag design reviews - WebAssembly SIMD : https://github.com/w3ctag/design-reviews/issues/487 From fdca37a55c01189ad4f24d61ba2a7236e19674cc Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 18 May 2020 11:46:49 -0700 Subject: [PATCH 153/378] Create a functor MakeInt (similar to MakeFloat) This does little right now, but will make it easier when we add more SIMD int ops later (similar to MakeFloat). --- interpreter/exec/eval_numeric.ml | 2 +- interpreter/exec/simd.ml | 33 +++++++++++++++++++++++++------- interpreter/exec/v128.ml | 5 +++++ 3 files changed, 32 insertions(+), 8 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index ca364ec820..7dca4ad8ce 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -151,7 +151,7 @@ struct | F32x4ExtractLane imm -> (F32Op.to_value (SXX.F32x4.extract_lane imm (of_value 1 v))) | I32x4ExtractLane imm -> - (I32Op.to_value (SXX.i32x4_extract_lane imm (of_value 1 v))) + (I32Op.to_value (SXX.I32x4.extract_lane imm (of_value 1 v))) end module V128Op = SimdOp (V128) (Values.V128Value) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 31c549ea5d..2d834d1e91 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -11,7 +11,8 @@ let lanes shape = | F32x4 -> 4 | F64x2 -> 2 -let f32x4_indices = [0; 4; 8; 12] +let i32x4_indices = [0; 4; 8; 12] +let f32x4_indices = i32x4_indices let f64x2_indices = [0; 8] module type RepType = @@ -25,6 +26,7 @@ sig val of_strings : shape -> string list -> t val to_i32x4 : t -> I32.t list + val of_i32x4 : I32.t list -> t val to_f32x4 : t -> F32.t list val of_f32x4 : F32.t list -> t @@ -33,6 +35,15 @@ sig val of_f64x2 : F64.t list -> t end +(* This signature defines the types and operations SIMD ints can expose. *) +module type Int = +sig + type t + type lane + + val extract_lane : int -> t -> lane +end + (* This signature defines the types and operations SIMD floats can expose. *) module type Float = sig @@ -55,10 +66,9 @@ sig val to_bits : t -> bits val of_strings : shape -> string list -> t - val i32x4_extract_lane : int -> t -> I32.t - (* We need type t = t to ensure that all submodule types are S.t, * then callers don't have to change *) + module I32x4 : Int with type t = t and type lane = I32.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t end @@ -74,10 +84,6 @@ struct let to_bits x = x let of_strings = Rep.of_strings - let to_i32x4 = Rep.to_i32x4 - - let i32x4_extract_lane i x = List.nth (to_i32x4 x) i - module MakeFloat (Float : Float.S) (Convert : sig val to_shape : Rep.t -> Float.t list val of_shape : Float.t list -> Rep.t @@ -93,6 +99,19 @@ struct let extract_lane i s = List.nth (Convert.to_shape s) i end + module MakeInt (Int : Int.S) (Convert : sig + val to_shape : Rep.t -> Int.t list + end) : Int with type t = Rep.t and type lane = Int.t = + struct + type t = Rep.t + type lane = Int.t + let extract_lane i s = List.nth (Convert.to_shape s) i + end + + module I32x4 = MakeInt (I32) (struct + let to_shape = Rep.to_i32x4 + end) + module F32x4 = MakeFloat (F32) (struct let to_shape = Rep.to_f32x4 let of_shape = Rep.of_f32x4 diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 41b2d0a4e1..251a8756d7 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -7,6 +7,11 @@ include Simd.Make let to_i32x4 s = List.map (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices + let of_i32x4 fs = + let b = Bytes.create bytewidth in + List.iter2 (fun i f -> Bytes.set_int32_le b i (I32.to_bits f)) Simd.i32x4_indices fs; + Bytes.to_string b + let to_f32x4 s = List.map (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices From d7b140e10e58b3f1041f09477e2284dc6325216d Mon Sep 17 00:00:00 2001 From: Arun Purushan <39841624+arunetm@users.noreply.github.com> Date: Tue, 2 Jun 2020 20:25:12 -0700 Subject: [PATCH 154/378] Update proposals/simd/W3CTAG-SIMDExplainer.md Co-authored-by: Deepti Gandluri --- proposals/simd/W3CTAG-SIMDExplainer.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/W3CTAG-SIMDExplainer.md b/proposals/simd/W3CTAG-SIMDExplainer.md index 4d0e461a7f..b5d70633e4 100644 --- a/proposals/simd/W3CTAG-SIMDExplainer.md +++ b/proposals/simd/W3CTAG-SIMDExplainer.md @@ -36,7 +36,7 @@ Aw + Bw = Cw -This feature is called [Single Instruction Multiple Data (SIMD)](https://en.wikipedia.org/wiki/SIMD), and though there hardware support exists for vector lengths up to 512 bits, 128-bit SIMD is the most common and is supported across common hardware architectures. +This feature is called [Single Instruction Multiple Data (SIMD)](https://en.wikipedia.org/wiki/SIMD), and though hardware support exists for vector lengths up to 512 bits, 128-bit SIMD is the most common and is supported across common hardware architectures. SIMD has driven large speed ups in certain cases such as image manipulation, video encoding/decoding, machine learning, game engines and physics engines etc - with some of these use-cases not being usable without SIMD support, making SIMD support for the web platform essential for achieving near-native speed with certain native applications. From 4b2556407e8988111706aeddec0798d0dcbc5e0c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 18 May 2020 16:36:59 -0700 Subject: [PATCH 155/378] Implement i32x4 neg add sub mul This required exposing neg from int.ml, to be used by simd.ml Fixes to parsing of v128.const in assert_returns, to handle i32x4. Handle matching i32x4 in script/run.ml. With this, test/core/simd/simd_i32x4_arith.wast passes. --- interpreter/exec/eval_numeric.ml | 4 ++++ interpreter/exec/int.ml | 3 +++ interpreter/exec/simd.ml | 14 ++++++++++++++ interpreter/script/run.ml | 8 ++++++++ interpreter/syntax/ast.ml | 4 ++-- interpreter/syntax/operators.ml | 4 ++++ interpreter/text/lexer.mll | 12 ++++++++++++ interpreter/text/parser.mly | 7 ++++--- 8 files changed, 51 insertions(+), 5 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7dca4ad8ce..8ccba13ce9 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -127,12 +127,16 @@ struct let unop op = fun v -> match op with + | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | _ -> failwith "TODO v128 unimplemented unop" let binop op = let f = match op with + | I32x4 Add -> SXX.I32x4.add + | I32x4 Sub -> SXX.I32x4.sub + | I32x4 Mul -> SXX.I32x4.mul | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max | F64x2 Min -> SXX.F64x2.min diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 81674b15fc..6b5c32656b 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -40,6 +40,7 @@ sig val zero : t + val neg : t -> t val add : t -> t -> t val sub : t -> t -> t val mul : t -> t -> t @@ -113,6 +114,8 @@ struct let one = Rep.one let ten = Rep.of_int 10 + let neg = Rep.neg + (* add, sub, and mul are sign-agnostic and do not trap on overflow. *) let add = Rep.add let sub = Rep.sub diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 2d834d1e91..24a9e2bce7 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -42,6 +42,10 @@ sig type lane val extract_lane : int -> t -> lane + val neg : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val mul : t -> t -> t end (* This signature defines the types and operations SIMD floats can expose. *) @@ -65,6 +69,7 @@ sig val of_bits : bits -> t val to_bits : t -> bits val of_strings : shape -> string list -> t + val to_i32x4 : t -> I32.t list (* We need type t = t to ensure that all submodule types are S.t, * then callers don't have to change *) @@ -83,6 +88,7 @@ struct let of_bits x = x let to_bits x = x let of_strings = Rep.of_strings + let to_i32x4 = Rep.to_i32x4 module MakeFloat (Float : Float.S) (Convert : sig val to_shape : Rep.t -> Float.t list @@ -101,15 +107,23 @@ struct module MakeInt (Int : Int.S) (Convert : sig val to_shape : Rep.t -> Int.t list + val of_shape : Int.t list -> Rep.t end) : Int with type t = Rep.t and type lane = Int.t = struct type t = Rep.t type lane = Int.t let extract_lane i s = List.nth (Convert.to_shape s) i + let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) + let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let neg = unop Int.neg + let add = binop Int.add + let sub = binop Int.sub + let mul = binop Int.mul end module I32x4 = MakeInt (I32) (struct let to_shape = Rep.to_i32x4 + let of_shape = Rep.of_i32x4 end) module F32x4 = MakeFloat (F32) (struct diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 047bcfdc3a..f83ae1afcf 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -375,6 +375,14 @@ let assert_result at got expect = let open Values in let open Simd in match shape, v with + | I32x4, V128 v -> + let l0 = I32 (V128.I32x4.extract_lane 0 v) in + let l1 = I32 (V128.I32x4.extract_lane 1 v) in + let l2 = I32 (V128.I32x4.extract_lane 2 v) in + let l3 = I32 (V128.I32x4.extract_lane 3 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1; l2; l3] vs | F32x4, V128 v -> let l0 = F32 (V128.F32x4.extract_lane 0 v) in let l1 = F32 (V128.F32x4.extract_lane 1 v) in diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 8daa9dd4ae..f987dc0b25 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -47,8 +47,8 @@ end (* FIXME *) module SimdOp = struct - type iunop = TodoIunop - type ibinop = TodoIbinop + type iunop = Neg + type ibinop = Add | Sub | Mul type funop = Abs type fbinop = Min | Max diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index d83c259aa8..cdd04117ac 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -205,6 +205,10 @@ let memory_grow = MemoryGrow (* SIMD *) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) +let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) +let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) +let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) +let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 74434aed66..b57f43613c 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -380,6 +380,18 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } + | (simd_shape as s)".neg" + { if s <> "i32x4" then error lexbuf "unknown operator"; + UNARY (simdop s unreachable unreachable i32x4_neg unreachable unreachable unreachable) } + | (simd_shape as s)".add" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_add unreachable unreachable unreachable) } + | (simd_shape as s)".sub" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_sub unreachable unreachable unreachable) } + | (simd_shape as s)".mul" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_mul unreachable unreachable unreachable) } | (simd_shape as s)".min" { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min f64x2_min) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 6dd7d65ab3..ee1f9c5057 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -58,9 +58,10 @@ let simd_lane_nan shape l at = let simd_lane_lit shape l at = let open Simd in match shape with + | I32x4 -> LitPat (Values.I32 (I32.of_string l) @@ at) @@ at | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at - | _ -> error at "invalid simd constant" + | _ -> error at "unimplemented simd lane lit" let nanop f nan = let open Source in @@ -880,11 +881,11 @@ result : | const { NumResult (LitPat $1 @@ at ()) @@ at () } | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ ati 3) @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat numpat numpat numpat RPAR { - if ($3 <> Simd.F32x4) then error (ati 3) "invalid SIMD shape"; + if ($3 <> Simd.F32x4 && $3 <> Simd.I32x4) then error (ati 3) "unimplemented SIMD shape"; SimdResult ($3, [$4 $3; $5 $3; $6 $3; $7 $3]) @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat numpat RPAR { - if ($3 <> Simd.F64x2) then error (ati 3) "invalid SIMD shape"; + if ($3 <> Simd.F64x2) then error (ati 3) "unimplemented SIMD shape"; SimdResult ($3, [$4 $3; $5 $3]) @@ at () } From 8f8261801b9316af98ce075effaa63d2065bb8d7 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 3 Jun 2020 10:12:04 -0700 Subject: [PATCH 156/378] Fix indentation --- interpreter/script/run.ml | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index f83ae1afcf..a51d973586 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -376,27 +376,27 @@ let assert_result at got expect = let open Simd in match shape, v with | I32x4, V128 v -> - let l0 = I32 (V128.I32x4.extract_lane 0 v) in - let l1 = I32 (V128.I32x4.extract_lane 1 v) in - let l2 = I32 (V128.I32x4.extract_lane 2 v) in - let l3 = I32 (V128.I32x4.extract_lane 3 v) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1; l2; l3] vs + let l0 = I32 (V128.I32x4.extract_lane 0 v) in + let l1 = I32 (V128.I32x4.extract_lane 1 v) in + let l2 = I32 (V128.I32x4.extract_lane 2 v) in + let l3 = I32 (V128.I32x4.extract_lane 3 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1; l2; l3] vs | F32x4, V128 v -> - let l0 = F32 (V128.F32x4.extract_lane 0 v) in - let l1 = F32 (V128.F32x4.extract_lane 1 v) in - let l2 = F32 (V128.F32x4.extract_lane 2 v) in - let l3 = F32 (V128.F32x4.extract_lane 3 v) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1; l2; l3] vs + let l0 = F32 (V128.F32x4.extract_lane 0 v) in + let l1 = F32 (V128.F32x4.extract_lane 1 v) in + let l2 = F32 (V128.F32x4.extract_lane 2 v) in + let l3 = F32 (V128.F32x4.extract_lane 3 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1; l2; l3] vs | F64x2, V128 v -> - let l0 = F64 (V128.F64x2.extract_lane 0 v) in - let l1 = F64 (V128.F64x2.extract_lane 1 v) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1] vs + let l0 = F64 (V128.F64x2.extract_lane 0 v) in + let l1 = F64 (V128.F64x2.extract_lane 1 v) in + List.exists2 (fun v r -> + assert_num_pat at v r + ) [l0; l1] vs | _ -> failwith "impossible" end ) got expect From c5b0537b5aa92db97030a57b6f2de3a354daaac4 Mon Sep 17 00:00:00 2001 From: Andrew Brown Date: Tue, 2 Jun 2020 16:24:40 -0700 Subject: [PATCH 157/378] Fix: assert_return should use canonical NaN for comparison --- test/core/simd/meta/simd_f64x2.py | 4 ++-- test/core/simd/meta/simd_f64x2_arith.py | 2 +- test/core/simd/simd_f64x2.wast | 4 ++-- test/core/simd/simd_f64x2_arith.wast | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/test/core/simd/meta/simd_f64x2.py b/test/core/simd/meta/simd_f64x2.py index 476c9c995c..e6b80ee2c0 100644 --- a/test/core/simd/meta/simd_f64x2.py +++ b/test/core/simd/meta/simd_f64x2.py @@ -144,13 +144,13 @@ def gen_test_func_template(self): [ 'f64x2.min', [['nan', '0'], ['0', '1']], - [['nan', '0']], + [['nan:canonical', '0']], ['f64x2', 'f64x2', 'f64x2'] ], [ 'f64x2.min', [['0', '1'], ['-nan', '0']], - [['-nan', '0']], + [['nan:canonical', '0']], ['f64x2', 'f64x2', 'f64x2'] ], [ diff --git a/test/core/simd/meta/simd_f64x2_arith.py b/test/core/simd/meta/simd_f64x2_arith.py index a0f53b892a..df29d7b2dc 100644 --- a/test/core/simd/meta/simd_f64x2_arith.py +++ b/test/core/simd/meta/simd_f64x2_arith.py @@ -118,7 +118,7 @@ def mixed_nan_test_data(self): ('nan:arithmetic', '2.0'), ], 'sub_arith': [ - ('1.0', '-1.0'), ('-nan', '1.0'), ('nan', '-2.0'), + ('1.0', '-1.0'), ('-nan', '1.0'), ('nan:canonical', '-2.0'), ], 'mul_mixed': [ ('nan:0x8000000000000', '1.0'), ('2.0', 'nan'), diff --git a/test/core/simd/simd_f64x2.wast b/test/core/simd/simd_f64x2.wast index 3051d45079..8ebd33b368 100644 --- a/test/core/simd/simd_f64x2.wast +++ b/test/core/simd/simd_f64x2.wast @@ -109,7 +109,7 @@ (v128.const f64x2 nan 0) (v128.const f64x2 0 1) ) - (v128.const f64x2 nan 0) + (v128.const f64x2 nan:canonical 0) ) ;; f64x2.min (assert_return @@ -117,7 +117,7 @@ (v128.const f64x2 0 1) (v128.const f64x2 -nan 0) ) - (v128.const f64x2 -nan 0) + (v128.const f64x2 nan:canonical 0) ) ;; f64x2.min (assert_return diff --git a/test/core/simd/simd_f64x2_arith.wast b/test/core/simd/simd_f64x2_arith.wast index 9f570f7e6c..4ab3b01e96 100644 --- a/test/core/simd/simd_f64x2_arith.wast +++ b/test/core/simd/simd_f64x2_arith.wast @@ -5296,7 +5296,7 @@ (assert_return (invoke "f64x2_mul_mixed") (v128.const f64x2 nan:arithmetic nan:canonical)) (assert_return (invoke "f64x2_neg_canon") (v128.const f64x2 nan:canonical -1.0)) (assert_return (invoke "f64x2_sqrt_canon") (v128.const f64x2 2.0 nan:canonical)) -(assert_return (invoke "f64x2_sub_arith") (v128.const f64x2 nan -2.0)) +(assert_return (invoke "f64x2_sub_arith") (v128.const f64x2 nan:canonical -2.0)) ;; type check (assert_invalid (module (func (result v128) (f64x2.neg (i64.const 0)))) "type mismatch") From 80e3742f0b146b96d32bb8e9ce5a9b7e21fa3fae Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Jun 2020 09:46:37 -0700 Subject: [PATCH 158/378] Implement i32x4 abs min_s min_u max_s max_u (#240) * Implement i32x4 abs min_s min_u max_s max_u * Fix condition in lexer for abs --- interpreter/exec/eval_numeric.ml | 7 ++++++- interpreter/exec/int.ml | 3 +++ interpreter/exec/simd.ml | 11 +++++++++++ interpreter/syntax/ast.ml | 4 ++-- interpreter/syntax/operators.ml | 5 +++++ interpreter/text/lexer.mll | 16 ++++++++++++++-- 6 files changed, 41 insertions(+), 5 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 8ccba13ce9..1254cf8446 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -125,8 +125,9 @@ struct let to_value = Value.to_value let of_value = of_arg Value.of_value - let unop op = + let unop (op : unop) = fun v -> match op with + | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) @@ -136,6 +137,10 @@ struct let f = match op with | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub + | I32x4 MinS -> SXX.I32x4.min_s + | I32x4 MinU -> SXX.I32x4.min_u + | I32x4 MaxS -> SXX.I32x4.max_s + | I32x4 MaxU -> SXX.I32x4.max_u | I32x4 Mul -> SXX.I32x4.mul | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 6b5c32656b..e25b110837 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -8,6 +8,7 @@ sig val max_int : t val min_int : t + val abs : t -> t val neg : t -> t val add : t -> t -> t val sub : t -> t -> t @@ -40,6 +41,7 @@ sig val zero : t + val abs : t -> t val neg : t -> t val add : t -> t -> t val sub : t -> t -> t @@ -114,6 +116,7 @@ struct let one = Rep.one let ten = Rep.of_int 10 + let abs = Rep.abs let neg = Rep.neg (* add, sub, and mul are sign-agnostic and do not trap on overflow. *) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 24a9e2bce7..47792ade99 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -42,9 +42,14 @@ sig type lane val extract_lane : int -> t -> lane + val abs : t -> t val neg : t -> t val add : t -> t -> t val sub : t -> t -> t + val min_s : t -> t -> t + val min_u : t -> t -> t + val max_s : t -> t -> t + val max_u : t -> t -> t val mul : t -> t -> t end @@ -115,10 +120,16 @@ struct let extract_lane i s = List.nth (Convert.to_shape s) i let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let abs = unop Int.abs let neg = unop Int.neg let add = binop Int.add let sub = binop Int.sub let mul = binop Int.mul + let choose f x y = if f x y then x else y + let min_s = binop (choose Int.le_s) + let min_u = binop (choose Int.le_u) + let max_s = binop (choose Int.ge_s) + let max_u = binop (choose Int.ge_u) end module I32x4 = MakeInt (I32) (struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index f987dc0b25..3c4f031004 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -47,8 +47,8 @@ end (* FIXME *) module SimdOp = struct - type iunop = Neg - type ibinop = Add | Sub | Mul + type iunop = Abs | Neg + type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul type funop = Abs type fbinop = Min | Max diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index cdd04117ac..21a8543cb9 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -205,9 +205,14 @@ let memory_grow = MemoryGrow (* SIMD *) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) +let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) +let i32x4_min_s = Binary (V128 (V128Op.I32x4 V128Op.MinS)) +let i32x4_min_u = Binary (V128 (V128Op.I32x4 V128Op.MinU)) +let i32x4_max_s = Binary (V128 (V128Op.I32x4 V128Op.MaxS)) +let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b57f43613c..ebf5e6690d 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -389,6 +389,18 @@ rule token = parse | (simd_shape as s)".sub" { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_sub unreachable unreachable unreachable) } + | (simd_shape as s)".min_s" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } + | (simd_shape as s)".min_u" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_min_u unreachable unreachable unreachable) } + | (simd_shape as s)".max_s" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_max_s unreachable unreachable unreachable) } + | (simd_shape as s)".max_u" + { if s <> "i32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_mul unreachable unreachable unreachable) } @@ -399,8 +411,8 @@ rule token = parse { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max f64x2_max) } | (simd_shape as s)".abs" - { if s = "i64x2" then error lexbuf "unknown operator"; - UNARY (simdop s unreachable unreachable unreachable unreachable f32x4_abs f64x2_abs) } + { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + UNARY (simdop s unreachable unreachable i32x4_abs unreachable f32x4_abs f64x2_abs) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From 5d6ac624fd79efd871f774402fb38fa962d5a77d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 5 Jun 2020 09:34:15 -0700 Subject: [PATCH 159/378] Add f32x4 add sub mul div neg sqrt (#243) * Add f32x4 add sub mul div neg sqrt This makes simd_f32x4_arith.wast pass. * Fix formatting Co-authored-by: Andreas Rossberg * Split out simd shape into int and float Co-authored-by: Andreas Rossberg * Nicer function name Co-authored-by: Andreas Rossberg Co-authored-by: Andreas Rossberg --- interpreter/exec/eval_numeric.ml | 10 ++++++++-- interpreter/exec/simd.ml | 12 ++++++++++++ interpreter/syntax/ast.ml | 4 ++-- interpreter/syntax/operators.ml | 8 +++++++- interpreter/text/lexer.mll | 32 +++++++++++++++++++++++--------- 5 files changed, 52 insertions(+), 14 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 1254cf8446..8f5408cb37 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -130,10 +130,12 @@ struct | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) + | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) + | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | _ -> failwith "TODO v128 unimplemented unop" - let binop op = + let binop (op : binop) = let f = match op with | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub @@ -142,11 +144,15 @@ struct | I32x4 MaxS -> SXX.I32x4.max_s | I32x4 MaxU -> SXX.I32x4.max_u | I32x4 Mul -> SXX.I32x4.mul + | F32x4 Add -> SXX.F32x4.add + | F32x4 Sub -> SXX.F32x4.sub + | F32x4 Mul -> SXX.F32x4.mul + | F32x4 Div -> SXX.F32x4.div | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max | F64x2 Min -> SXX.F64x2.min | F64x2 Max -> SXX.F64x2.max - | _ -> failwith "TODO v128 unimplemented unop" + | _ -> failwith "TODO v128 unimplemented binop" in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) (* FIXME *) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 47792ade99..8f4b7d3d4d 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -60,6 +60,12 @@ sig type lane val abs : t -> t + val neg : t -> t + val sqrt : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val mul : t -> t -> t + val div : t -> t -> t val min : t -> t -> t val max : t -> t -> t val extract_lane : int -> t -> lane @@ -105,6 +111,12 @@ struct let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) let abs = unop Float.abs + let neg = unop Float.neg + let sqrt = unop Float.sqrt + let add = binop Float.add + let sub = binop Float.sub + let mul = binop Float.mul + let div = binop Float.div let min = binop Float.min let max = binop Float.max let extract_lane i s = List.nth (Convert.to_shape s) i diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 3c4f031004..c22653be4b 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -49,8 +49,8 @@ module SimdOp = struct type iunop = Abs | Neg type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul - type funop = Abs - type fbinop = Min | Max + type funop = Abs | Neg | Sqrt + type fbinop = Add | Sub | Mul | Div | Min | Max type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) v128op = | I8x16 of 'i8x16 diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 21a8543cb9..51947cff27 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -216,9 +216,15 @@ let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) +let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) +let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) +let f32x4_sqrt = Unary (V128 (V128Op.F32x4 V128Op.Sqrt)) +let f32x4_add = Binary (V128 (V128Op.F32x4 V128Op.Add)) +let f32x4_sub = Binary (V128 (V128Op.F32x4 V128Op.Sub)) +let f32x4_mul = Binary (V128 (V128Op.F32x4 V128Op.Mul)) +let f32x4_div = Binary (V128 (V128Op.F32x4 V128Op.Div)) let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) -let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) let f64x2_min = Binary (V128 (V128Op.F64x2 V128Op.Min)) let f64x2_max = Binary (V128 (V128Op.F64x2 V128Op.Max)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index ebf5e6690d..1d2be8bf24 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -85,6 +85,12 @@ let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = | "f64x2" -> f64x2 | _ -> assert false +let simd_float_op s f32x4 f64x2 = + match s with + | "f32x4" -> f32x4 + | "f64x2" -> f64x2 + | _ -> assert false + let memsz sz m8 m16 m32 = match sz with | "8" -> m8 @@ -167,7 +173,9 @@ let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" let mem_size = "8" | "16" | "32" -let simd_shape = "i8x16" | "i16x8" | "i32x4" | "i64x2" | "f32x4" | "f64x2" +let simd_int_shape = "i8x16" | "i16x8" | "i32x4" | "i64x2" +let simd_float_shape = "f32x4" | "f64x2" +let simd_shape = simd_int_shape | simd_float_shape rule token = parse | "(" { LPAR } @@ -381,14 +389,17 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { if s <> "i32x4" then error lexbuf "unknown operator"; - UNARY (simdop s unreachable unreachable i32x4_neg unreachable unreachable unreachable) } + { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; + UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg unreachable) } + | (simd_float as s)".sqrt" + { if s <> "f32x4" then error lexbuf "unknown operator"; + UNARY (simdfloatop s f32x4_sqrt unreachable) } | (simd_shape as s)".add" - { if s <> "i32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_add unreachable unreachable unreachable) } + { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add unreachable) } | (simd_shape as s)".sub" - { if s <> "i32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_sub unreachable unreachable unreachable) } + { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_sub unreachable f32x4_sub unreachable) } | (simd_shape as s)".min_s" { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } @@ -402,8 +413,11 @@ rule token = parse { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" - { if s <> "i32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_mul unreachable unreachable unreachable) } + { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul unreachable) } + | (simd_float as s)".div" + { if s <> "f32x4" then error lexbuf "unknown operator"; + BINARY (simdfloatop s f32x4_div unreachable) } | (simd_shape as s)".min" { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min f64x2_min) } From 90e9f14026ce37b3e85b550c9172b5d02ec95f9d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 5 Jun 2020 15:54:34 -0700 Subject: [PATCH 160/378] Fix lexer (#245) In #243 I accepted some changes without pulling and running locally. My laziness is rewarded with compilation errors. This fixes the issue. --- interpreter/text/lexer.mll | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 1d2be8bf24..c4fb0899a3 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -391,9 +391,9 @@ rule token = parse | (simd_shape as s)".neg" { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg unreachable) } - | (simd_float as s)".sqrt" + | (simd_float_shape as s)".sqrt" { if s <> "f32x4" then error lexbuf "unknown operator"; - UNARY (simdfloatop s f32x4_sqrt unreachable) } + UNARY (simd_float_op s f32x4_sqrt unreachable) } | (simd_shape as s)".add" { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add unreachable) } @@ -415,9 +415,9 @@ rule token = parse | (simd_shape as s)".mul" { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul unreachable) } - | (simd_float as s)".div" + | (simd_float_shape as s)".div" { if s <> "f32x4" then error lexbuf "unknown operator"; - BINARY (simdfloatop s f32x4_div unreachable) } + BINARY (simd_float_op s f32x4_div unreachable) } | (simd_shape as s)".min" { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min f64x2_min) } From 64b67f8ab9c3470eabda21b0e77b1a7cebd28cbe Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Mon, 8 Jun 2020 18:24:09 +0200 Subject: [PATCH 161/378] Update Firefox/SpiderMonkey status (#248) --- proposals/simd/ImplementationStatus.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 2353ae98f2..c217241ee2 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -87,7 +87,7 @@ | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -108,7 +108,7 @@ | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -134,7 +134,7 @@ | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -187,4 +187,4 @@ [4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` -[5] FF78 Nightly x64 SSE4.1+ only, enabled by default, disable in about:config under `javascript.options.wasm_simd` +[5] Firefox Nightly x64/x86 SSE4.1+ only, disable in about:config under `javascript.options.wasm_simd` From 30a0912fe1757344f3af11bfbea7c3598feae63f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 8 Jun 2020 09:54:14 -0700 Subject: [PATCH 162/378] Add f64x2 add sub mul div neg sqrt (#246) This passes f64x2_arith.wast --- interpreter/exec/eval_numeric.ml | 6 ++++++ interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/lexer.mll | 32 ++++++++++++-------------------- 3 files changed, 24 insertions(+), 20 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 8f5408cb37..fd5c04eec3 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -133,6 +133,8 @@ struct | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) + | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) + | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) | _ -> failwith "TODO v128 unimplemented unop" let binop (op : binop) = @@ -150,6 +152,10 @@ struct | F32x4 Div -> SXX.F32x4.div | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max + | F64x2 Add -> SXX.F64x2.add + | F64x2 Sub -> SXX.F64x2.sub + | F64x2 Mul -> SXX.F64x2.mul + | F64x2 Div -> SXX.F64x2.div | F64x2 Min -> SXX.F64x2.min | F64x2 Max -> SXX.F64x2.max | _ -> failwith "TODO v128 unimplemented binop" diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 51947cff27..cda60c3afd 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -226,6 +226,12 @@ let f32x4_div = Binary (V128 (V128Op.F32x4 V128Op.Div)) let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) +let f64x2_neg = Unary (V128 (V128Op.F64x2 V128Op.Neg)) +let f64x2_sqrt = Unary (V128 (V128Op.F64x2 V128Op.Sqrt)) +let f64x2_add = Binary (V128 (V128Op.F64x2 V128Op.Add)) +let f64x2_sub = Binary (V128 (V128Op.F64x2 V128Op.Sub)) +let f64x2_mul = Binary (V128 (V128Op.F64x2 V128Op.Mul)) +let f64x2_div = Binary (V128 (V128Op.F64x2 V128Op.Div)) let f64x2_min = Binary (V128 (V128Op.F64x2 V128Op.Min)) let f64x2_max = Binary (V128 (V128Op.F64x2 V128Op.Max)) let f64x2_abs = Unary (V128 (V128Op.F64x2 V128Op.Abs)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index c4fb0899a3..05336d6eb6 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -389,17 +389,15 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; - UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg unreachable) } - | (simd_float_shape as s)".sqrt" - { if s <> "f32x4" then error lexbuf "unknown operator"; - UNARY (simd_float_op s f32x4_sqrt unreachable) } + { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg f64x2_neg) } + | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } | (simd_shape as s)".add" - { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add unreachable) } + { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_sub unreachable f32x4_sub unreachable) } + { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } @@ -413,17 +411,11 @@ rule token = parse { if s <> "i32x4" then error lexbuf "unknown operator"; BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" - { if s <> "i32x4" && s <> "f32x4" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul unreachable) } - | (simd_float_shape as s)".div" - { if s <> "f32x4" then error lexbuf "unknown operator"; - BINARY (simd_float_op s f32x4_div unreachable) } - | (simd_shape as s)".min" - { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_min f64x2_min) } - | (simd_shape as s)".max" - { if s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; - BINARY (simdop s unreachable unreachable unreachable unreachable f32x4_max f64x2_max) } + { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul f64x2_mul) } + | (simd_float_shape as s)".div" { BINARY (simd_float_op s f32x4_div f64x2_div) } + | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } + | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } | (simd_shape as s)".abs" { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; UNARY (simdop s unreachable unreachable i32x4_abs unreachable f32x4_abs f64x2_abs) } From 5e9685a560e69640ef334178818fb161326b63c6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 8 Jun 2020 10:22:19 -0700 Subject: [PATCH 163/378] Create a helper to check valid simd operations (#249) The "i32x4" case looks trivial now, but we will be adding i64x2 later. --- interpreter/text/lexer.mll | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 05336d6eb6..73a4c6d7d5 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -114,6 +114,10 @@ let simd_shape = function | "f32x4" -> Simd.F32x4 | "f64x2" -> Simd.F64x2 | _ -> assert false + +let only shapes s lexbuf = + if not (List.mem s shapes) then + error lexbuf "unknown operator" } let sign = '+' | '-' @@ -389,35 +393,35 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } | (simd_shape as s)".add" - { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" - { if s <> "i32x4" then error lexbuf "unknown operator"; + { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } | (simd_shape as s)".min_u" - { if s <> "i32x4" then error lexbuf "unknown operator"; + { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_min_u unreachable unreachable unreachable) } | (simd_shape as s)".max_s" - { if s <> "i32x4" then error lexbuf "unknown operator"; + { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_max_s unreachable unreachable unreachable) } | (simd_shape as s)".max_u" - { if s <> "i32x4" then error lexbuf "unknown operator"; + { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" - { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul f64x2_mul) } | (simd_float_shape as s)".div" { BINARY (simd_float_op s f32x4_div f64x2_div) } | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } | (simd_shape as s)".abs" - { if s <> "i32x4" && s <> "f32x4" && s <> "f64x2" then error lexbuf "unknown operator"; + { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; UNARY (simdop s unreachable unreachable i32x4_abs unreachable f32x4_abs f64x2_abs) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } From c1dc9b33492425c5d81371ac990042accc5cb24d Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Mon, 8 Jun 2020 17:02:17 -0700 Subject: [PATCH 164/378] Specify the alignment of splatting and extending loads (#244) Clarify that the natural alignment is always the size of the loaded data. Resolves #230 and resolves and #162. --- proposals/simd/SIMD.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 56940aa22e..0ff87ff453 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -773,7 +773,8 @@ def S.load(memarg): * `v32x4.load_splat(memarg) -> v128` * `v64x2.load_splat(memarg) -> v128` -Load a single element and splat to all lanes of a `v128` vector. +Load a single element and splat to all lanes of a `v128` vector. The natural +alignment is the size of the element loaded. ```python def S.load_splat(memarg): @@ -790,7 +791,8 @@ def S.load_splat(memarg): * `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane * `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane -Fetch consecutive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. +Fetch consecutive integers up to 32-bit wide and produce a vector with lanes up +to 64 bits. The natural alignment is 8 bytes. ```python def S.load_extend(ext, memarg): From 1ab95d1dd71402b1f89ff97e5a1e006b12bb5dc2 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Jun 2020 17:16:37 -0700 Subject: [PATCH 165/378] Document representation of LandIndxN (#252) --- proposals/simd/BinarySIMD.md | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 6c8adcdb25..627aa6ed84 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -23,7 +23,12 @@ instr ::= ... ``` Some SIMD instructions have additional immediate operands following `simdop`. -The `v8x16.shuffle` instruction has 16 bytes after `simdop`. +These immediate operands are encoded as individual bytes. +For example, the `v8x16.shuffle` instruction has 16 bytes after `simdop`. + +In the description below, `LaneIdx{I}` indicates the maximum value of the byte. +For example, `LaneIdx16` is a byte with values in the range 0-15 (inclusive). + | Instruction | `simdop` | Immediate operands | | ---------------------------|---------:|--------------------| From eeefcd360d39a30af234993ec80e9aafa23bf5e5 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Jun 2020 15:20:35 -0700 Subject: [PATCH 166/378] Use ImmLaneIdx consistently (#253) Fixed #242. (again) --- proposals/simd/BinarySIMD.md | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 627aa6ed84..d910bd210d 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -26,8 +26,8 @@ Some SIMD instructions have additional immediate operands following `simdop`. These immediate operands are encoded as individual bytes. For example, the `v8x16.shuffle` instruction has 16 bytes after `simdop`. -In the description below, `LaneIdx{I}` indicates the maximum value of the byte. -For example, `LaneIdx16` is a byte with values in the range 0-15 (inclusive). +In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byte. +For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | Instruction | `simdop` | Immediate operands | @@ -45,7 +45,7 @@ For example, `LaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v64x2.load_splat` | `0x0a`| m:memarg | | `v128.store` | `0x0b`| m:memarg | | `v128.const` | `0x0c`| i:ImmByte[16] | -| `v8x16.shuffle` | `0x0d`| s:LaneIdx32[16] | +| `v8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | | `v8x16.swizzle` | `0x0e`| - | | `i8x16.splat` | `0x0f`| - | | `i16x8.splat` | `0x10`| - | @@ -53,20 +53,20 @@ For example, `LaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.splat` | `0x12`| - | | `f32x4.splat` | `0x13`| - | | `f64x2.splat` | `0x14`| - | -| `i8x16.extract_lane_s` | `0x15`| i:LaneIdx16 | -| `i8x16.extract_lane_u` | `0x16`| i:LaneIdx16 | -| `i8x16.replace_lane` | `0x17`| i:LaneIdx16 | -| `i16x8.extract_lane_s` | `0x18`| i:LaneIdx8 | -| `i16x8.extract_lane_u` | `0x19`| i:LaneIdx8 | -| `i16x8.replace_lane` | `0x1a`| i:LaneIdx8 | -| `i32x4.extract_lane` | `0x1b`| i:LaneIdx4 | -| `i32x4.replace_lane` | `0x1c`| i:LaneIdx4 | -| `i64x2.extract_lane` | `0x1d`| i:LaneIdx2 | -| `i64x2.replace_lane` | `0x1e`| i:LaneIdx2 | -| `f32x4.extract_lane` | `0x1f`| i:LaneIdx4 | -| `f32x4.replace_lane` | `0x20`| i:LaneIdx4 | -| `f64x2.extract_lane` | `0x21`| i:LaneIdx2 | -| `f64x2.replace_lane` | `0x22`| i:LaneIdx2 | +| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | | `i8x16.eq` | `0x23`| - | | `i8x16.ne` | `0x24`| - | | `i8x16.lt_s` | `0x25`| - | From 14e4304239650a513e2fbf32e9a16b426a58d062 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Jun 2020 09:22:32 -0700 Subject: [PATCH 167/378] Consolidate parsing of v128.const (#254) * Consolidate parsing of v128.const * Merge cases --- interpreter/text/parser.mly | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index ee1f9c5057..a1f6c81c96 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -877,16 +877,19 @@ numpat : | literal { fun s -> simd_lane_lit s $1.it $1.at } | NAN { fun s -> simd_lane_nan s $1 (ati 3) } +numpat_list: + | /* empty */ { [] } + | numpat numpat_list { $1 :: $2 } + result : | const { NumResult (LitPat $1 @@ at ()) @@ at () } | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ ati 3) @@ at () } - | LPAR V128_CONST SIMD_SHAPE numpat numpat numpat numpat RPAR { - if ($3 <> Simd.F32x4 && $3 <> Simd.I32x4) then error (ati 3) "unimplemented SIMD shape"; - SimdResult ($3, [$4 $3; $5 $3; $6 $3; $7 $3]) @@ at () - } - | LPAR V128_CONST SIMD_SHAPE numpat numpat RPAR { - if ($3 <> Simd.F64x2) then error (ati 3) "unimplemented SIMD shape"; - SimdResult ($3, [$4 $3; $5 $3]) @@ at () + | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { + if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; + match $3 with + | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> + SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () + | _ -> error (ati 3) "unimplemented SIMD shape" } result_list : From c4066cd9bd8ca667603a9b4085b9cb7503394f18 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 22 Jun 2020 15:16:00 -0700 Subject: [PATCH 168/378] Support i16x8 and implement neg, add, sub, mul (#258) * Support i16x8 and implement neg, add, sub, mul Create a new module I16, which uses Int.Make, and is backed by Int32. It reuses a bunch of logic in Int. It stores 16-bit integers sign-extended in Int32. This means that -1 (0xFFFF) is stored as 0xFFFFFFFF, rather than 0x0000FFFF. All the bytes decode/encode logic is also done using the signed form. * Remove debug code, better names, make sign extend check more generic --- interpreter/exec/eval_numeric.ml | 4 ++++ interpreter/exec/i16.ml | 11 +++++++++++ interpreter/exec/int.ml | 34 +++++++++++++++++++++++++------- interpreter/exec/simd.ml | 12 +++++++++++ interpreter/exec/v128.ml | 10 +++++++++- interpreter/script/run.ml | 5 +++++ interpreter/syntax/operators.ml | 5 +++++ interpreter/text/lexer.mll | 16 +++++++-------- interpreter/text/parser.mly | 3 ++- 9 files changed, 83 insertions(+), 17 deletions(-) create mode 100644 interpreter/exec/i16.ml diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index fd5c04eec3..b17a6d6a2d 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -127,6 +127,7 @@ struct let unop (op : unop) = fun v -> match op with + | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) @@ -139,6 +140,9 @@ struct let binop (op : binop) = let f = match op with + | I16x8 Add -> SXX.I16x8.add + | I16x8 Sub -> SXX.I16x8.sub + | I16x8 Mul -> SXX.I16x8.mul | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub | I32x4 MinS -> SXX.I32x4.min_s diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml new file mode 100644 index 0000000000..f012d6d2d1 --- /dev/null +++ b/interpreter/exec/i16.ml @@ -0,0 +1,11 @@ +(* I16 for SIMD. Uses Int32 as the underlying storage. All int16 values will be + * stored signed-extended. E.g. -1 will be stored with all high bits set. + *) +include Int.Make (struct + include Int32 + + let bitwidth = 16 + + let min_int = Int32.of_int (-32768) + let max_int = Int32.of_int 32767 +end) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index e25b110837..2f728d31f4 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -239,6 +239,23 @@ struct let max_upper, max_lower = divrem_u Rep.minus_one ten + let sign_extend i = + (* This module is used with I32 and I64, but the bitwidth can be less + * than that, e.g. for I16. When used for smaller integers, the stored value + * needs to be signed extened, e.g. parsing -1 into a I16 (backed by Int32) + * shoud have all high bits set. We can do that by logor with a mask, + * where the mask is minus_one left shifted by bitwidth. But if bitwidth + * matches the number of bits of Rep, the shift will be incorrect. + * -1 (Int32) << 32 = -1 + * Then the logor will be also wrong. So we check and bail out early. + * *) + if Rep.add Rep.max_int Rep.one = Rep.min_int then i else + let sign_bit = Rep.logand (Rep.of_int (1 lsl (Rep.bitwidth - 1))) i in + if sign_bit = Rep.zero then i else + (* Build a sign-extension mask *) + let sign_mask = (Rep.shift_left Rep.minus_one Rep.bitwidth) in + Rep.logor sign_mask i + let of_string s = let open Rep in let len = String.length s in @@ -263,13 +280,16 @@ struct else parse_dec i zero in require (len > 0); - match s.[0] with - | '+' -> parse_int 1 - | '-' -> - let n = parse_int 1 in - require (ge_s (sub n one) minus_one); - Rep.neg n - | _ -> parse_int 0 + let parsed = + match s.[0] with + | '+' -> parse_int 1 + | '-' -> + let n = parse_int 1 in + require (ge_s (sub n one) minus_one); + Rep.neg n + | _ -> parse_int 0 + in + sign_extend parsed let of_string_s s = let n = of_string s in diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 8f4b7d3d4d..820d424d01 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -11,6 +11,7 @@ let lanes shape = | F32x4 -> 4 | F64x2 -> 2 +let i16x8_indices = [0; 2; 4; 6; 8; 10; 12; 14] let i32x4_indices = [0; 4; 8; 12] let f32x4_indices = i32x4_indices let f64x2_indices = [0; 8] @@ -25,6 +26,9 @@ sig val bytewidth : int val of_strings : shape -> string list -> t + val to_i16x8 : t -> I16.t list + val of_i16x8 : I16.t list -> t + val to_i32x4 : t -> I32.t list val of_i32x4 : I32.t list -> t @@ -80,10 +84,12 @@ sig val of_bits : bits -> t val to_bits : t -> bits val of_strings : shape -> string list -> t + val to_i16x8 : t -> I16.t list val to_i32x4 : t -> I32.t list (* We need type t = t to ensure that all submodule types are S.t, * then callers don't have to change *) + module I16x8 : Int with type t = t and type lane = I16.t module I32x4 : Int with type t = t and type lane = I32.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t @@ -99,6 +105,7 @@ struct let of_bits x = x let to_bits x = x let of_strings = Rep.of_strings + let to_i16x8 = Rep.to_i16x8 let to_i32x4 = Rep.to_i32x4 module MakeFloat (Float : Float.S) (Convert : sig @@ -144,6 +151,11 @@ struct let max_u = binop (choose Int.ge_u) end + module I16x8 = MakeInt (I16) (struct + let to_shape = Rep.to_i16x8 + let of_shape = Rep.of_i16x8 + end) + module I32x4 = MakeInt (I32) (struct let to_shape = Rep.to_i32x4 let of_shape = Rep.of_i32x4 diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 251a8756d7..ee0de9f0e6 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -4,6 +4,14 @@ include Simd.Make let bytewidth = 16 let to_string s = s + let to_i16x8 s = + List.map (fun i -> I16.of_bits (Int32.of_int (Bytes.get_int16_le (Bytes.of_string s) i))) Simd.i16x8_indices + + let of_i16x8 fs = + let b = Bytes.create bytewidth in + List.iter2 (fun i f -> Bytes.set_int16_le b i (Int32.to_int (I16.to_bits f))) Simd.i16x8_indices fs; + Bytes.to_string b + let to_i32x4 s = List.map (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices @@ -42,7 +50,7 @@ include Simd.Make | Simd.I8x16 -> List.iteri (fun i s -> set_uint8 b i (i8_of_string s)) ss | Simd.I16x8 -> - List.iteri (fun i s -> set_uint16_le b (i * 2) (i16_of_string s)) ss + List.iteri (fun i s -> set_int16_le b (i * 2) (i16_of_string s)) ss | Simd.I32x4 -> List.iteri (fun i s -> set_int32_le b (i * 4) (I32.of_string s)) ss | Simd.I64x2 -> diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index a51d973586..aaa86538d1 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -375,6 +375,11 @@ let assert_result at got expect = let open Values in let open Simd in match shape, v with + | I16x8, V128 v -> + List.exists2 + (fun v r -> assert_num_pat at v r) + (List.mapi (fun i x -> I32 (V128.I16x8.extract_lane i v)) i16x8_indices) + vs | I32x4, V128 v -> let l0 = I32 (V128.I32x4.extract_lane 0 v) in let l1 = I32 (V128.I32x4.extract_lane 1 v) in diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index cda60c3afd..038683bc3d 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -204,6 +204,11 @@ let memory_size = MemorySize let memory_grow = MemoryGrow (* SIMD *) +let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) +let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) +let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) +let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) + let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 73a4c6d7d5..3ccfa0ff32 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -393,15 +393,15 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s unreachable unreachable i32x4_neg unreachable f32x4_neg f64x2_neg) } + { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + UNARY (simdop s unreachable i16x8_neg i32x4_neg unreachable f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } | (simd_shape as s)".add" - { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_add unreachable f32x4_add f64x2_add) } + { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s unreachable i16x8_add i32x4_add unreachable f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_sub unreachable f32x4_sub f64x2_sub) } + { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s unreachable i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } @@ -415,8 +415,8 @@ rule token = parse { only ["i32x4"] s lexbuf; BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" - { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_mul unreachable f32x4_mul f64x2_mul) } + { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s unreachable i16x8_mul i32x4_mul unreachable f32x4_mul f64x2_mul) } | (simd_float_shape as s)".div" { BINARY (simd_float_op s f32x4_div f64x2_div) } | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index a1f6c81c96..bba56dd4d9 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -58,6 +58,7 @@ let simd_lane_nan shape l at = let simd_lane_lit shape l at = let open Simd in match shape with + | I16x8 -> LitPat (Values.I32 (I16.of_string l) @@ at) @@ at | I32x4 -> LitPat (Values.I32 (I32.of_string l) @@ at) @@ at | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at @@ -887,7 +888,7 @@ result : | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; match $3 with - | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> + | Simd.I16x8 | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () | _ -> error (ati 3) "unimplemented SIMD shape" } From 2689d2c282eba67cc23f3248eee18ba0fe35cd14 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 23 Jun 2020 21:53:42 -0700 Subject: [PATCH 169/378] Implement i16x8 operations Abs, MinS, MinU, MaxS, MaxU, AvgrU. Remove max_int and min_int from I16. The interaction with Int was tricky: 1. Int relies on max_int and min_int being the real max_int and min_int of Rep, i.e. max_int has top bit unset and rest of the bit set, and min_int the opposite. cmp_u relies on this for correct overflowing. 2. sign_extend relied on max_int + one == min_int for checking if we are implementing smaller ints inside of Int32. This only worked if we defined max_int and min_int in I16 to the correct 16-bit values. 1 and 2 conflicted, so I choose to tweak the way we check 2. We check that 1 << (bitwidth - 1) == min_int. This should be true for integers that are fully utilizing the representative types, and false for i16 (and i8 in the future). Amongst the operations, AvgrU was the more involved one. I chose to implement it in I16 and I32, since it requires treating the inputs as unsigned, widening, then addition. So in I16 we only needed to mask top bits (since it was already stored in Int32), and in I32 we widen to I64. --- interpreter/exec/eval_numeric.ml | 6 ++++++ interpreter/exec/i16.ml | 9 +++++++-- interpreter/exec/i32.ml | 7 +++++++ interpreter/exec/i64.ml | 1 + interpreter/exec/int.ml | 7 ++++++- interpreter/exec/simd.ml | 4 ++++ interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/lexer.mll | 31 +++++++++++++++++++++---------- 9 files changed, 59 insertions(+), 14 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index ed7f6f6b1f..74bd6181eb 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -129,6 +129,7 @@ struct let unop (op : unop) = fun v -> match op with | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) + | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) @@ -144,6 +145,11 @@ struct | I16x8 Add -> SXX.I16x8.add | I16x8 Sub -> SXX.I16x8.sub | I16x8 Mul -> SXX.I16x8.mul + | I16x8 MinS -> SXX.I16x8.min_s + | I16x8 MinU -> SXX.I16x8.min_u + | I16x8 MaxS -> SXX.I16x8.max_s + | I16x8 MaxU -> SXX.I16x8.max_u + | I16x8 AvgrU -> SXX.I16x8.avgr_u | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub | I32x4 MinS -> SXX.I32x4.min_s diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index 65ee09ee50..4a75b89171 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -6,8 +6,13 @@ include Int.Make (struct let bitwidth = 16 - let min_int = Int32.of_int (-32768) - let max_int = Int32.of_int 32767 (* TODO incorrect for negative values. *) let to_hex_string = Printf.sprintf "%lx" + + let avgr_u x y = + (* Mask top bits to treat the value as unsigned. *) + let mask = Int32.of_int 0xffff in + let x_u16 = logand mask x in + let y_u16 = logand mask y in + Int32.div (Int32.add (Int32.add x_u16 y_u16) one) (Int32.of_int 2) end) diff --git a/interpreter/exec/i32.ml b/interpreter/exec/i32.ml index 573622a602..f7c27d9c35 100644 --- a/interpreter/exec/i32.ml +++ b/interpreter/exec/i32.ml @@ -5,4 +5,11 @@ include Int.Make include Int32 let bitwidth = 32 let to_hex_string = Printf.sprintf "%lx" + + let avgr_u x y = + let open Int64 in + let mask = of_int (-1) in + let x64 = logand mask (of_int32 x) in + let y64 = logand mask (of_int32 y) in + to_int32 (div (add (add x64 y64) one) (of_int 2)) end) diff --git a/interpreter/exec/i64.ml b/interpreter/exec/i64.ml index c6d7a84d6f..e70e1c6f6e 100644 --- a/interpreter/exec/i64.ml +++ b/interpreter/exec/i64.ml @@ -5,4 +5,5 @@ include Int.Make include Int64 let bitwidth = 64 let to_hex_string = Printf.sprintf "%Lx" + let avgr_u x y = failwith "unimplemented i64x2.avgr_u" end) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 2da3e48821..596c914679 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -15,6 +15,7 @@ sig val mul : t -> t -> t val div : t -> t -> t (* raises Division_by_zero *) val rem : t -> t -> t (* raises Division_by_zero *) + val avgr_u : t -> t -> t val logand : t -> t -> t val lognot : t -> t @@ -51,6 +52,7 @@ sig val div_u : t -> t -> t (* raises IntegerDivideByZero *) val rem_s : t -> t -> t (* raises IntegerDivideByZero *) val rem_u : t -> t -> t (* raises IntegerDivideByZero *) + val avgr_u : t -> t -> t val and_ : t -> t -> t val or_ : t -> t -> t val xor : t -> t -> t @@ -150,6 +152,8 @@ struct let rem_u x y = let q, r = divrem_u x y in r + let avgr_u = Rep.avgr_u + let and_ = Rep.logand let or_ = Rep.logor let xor = Rep.logxor @@ -246,6 +250,7 @@ struct let max_upper, max_lower = divrem_u Rep.minus_one ten + let needs_extend = Rep.of_int (1 lsl (Rep.bitwidth - 1)) = Rep.min_int let sign_extend i = (* This module is used with I32 and I64, but the bitwidth can be less * than that, e.g. for I16. When used for smaller integers, the stored value @@ -256,7 +261,7 @@ struct * -1 (Int32) << 32 = -1 * Then the logor will be also wrong. So we check and bail out early. * *) - if Rep.add Rep.max_int Rep.one = Rep.min_int then i else + if needs_extend then i else let sign_bit = Rep.logand (Rep.of_int (1 lsl (Rep.bitwidth - 1))) i in if sign_bit = Rep.zero then i else (* Build a sign-extension mask *) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 820d424d01..6aaf053bdc 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -55,6 +55,7 @@ sig val max_s : t -> t -> t val max_u : t -> t -> t val mul : t -> t -> t + val avgr_u : t -> t -> t end (* This signature defines the types and operations SIMD floats can expose. *) @@ -149,6 +150,9 @@ struct let min_u = binop (choose Int.le_u) let max_s = binop (choose Int.ge_s) let max_u = binop (choose Int.ge_u) + (* The result of avgr_u will not overflow this type, but the intermediate might, + * so have the Int type implement it so they can extend it accordingly *) + let avgr_u = binop Int.avgr_u end module I16x8 = MakeInt (I16) (struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index bd850cbde8..f17a8da49b 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -49,7 +49,7 @@ end module SimdOp = struct type iunop = Abs | Neg - type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul + type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU type funop = Abs | Neg | Sqrt type fbinop = Add | Sub | Mul | Div | Min | Max diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index ad01238e00..5cb7b03c88 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -221,6 +221,12 @@ let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) +let i16x8_abs = Unary (V128 (V128Op.I16x8 V128Op.Abs)) +let i16x8_min_s = Binary (V128 (V128Op.I16x8 V128Op.MinS)) +let i16x8_min_u = Binary (V128 (V128Op.I16x8 V128Op.MinU)) +let i16x8_max_s = Binary (V128 (V128Op.I16x8 V128Op.MaxS)) +let i16x8_max_u = Binary (V128 (V128Op.I16x8 V128Op.MaxU)) +let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index ae69b38d35..a4f44c0939 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -85,6 +85,14 @@ let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = | "f64x2" -> f64x2 | _ -> assert false +let simd_int_op s i8x16 i16x8 i32x4 i64x2 = + match s with + | "i8x16" -> i8x16 + | "i16x8" -> i16x8 + | "i32x4" -> i32x4 + | "i64x2" -> i64x2 + | _ -> assert false + let simd_float_op s f32x4 f64x2 = match s with | "f32x4" -> f32x4 @@ -414,17 +422,17 @@ rule token = parse { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" - { only ["i32x4"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_min_s unreachable unreachable unreachable) } + { only ["i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s unreachable i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } | (simd_shape as s)".min_u" - { only ["i32x4"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_min_u unreachable unreachable unreachable) } + { only ["i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s unreachable i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } | (simd_shape as s)".max_s" - { only ["i32x4"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_max_s unreachable unreachable unreachable) } + { only ["i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s unreachable i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } | (simd_shape as s)".max_u" - { only ["i32x4"] s lexbuf; - BINARY (simdop s unreachable unreachable i32x4_max_u unreachable unreachable unreachable) } + { only ["i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s unreachable i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable i16x8_mul i32x4_mul unreachable f32x4_mul f64x2_mul) } @@ -432,8 +440,11 @@ rule token = parse | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } | (simd_shape as s)".abs" - { only ["i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s unreachable unreachable i32x4_abs unreachable f32x4_abs f64x2_abs) } + { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + UNARY (simdop s unreachable i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } + | (simd_int_shape as s)".avgr_u" + { only ["i16x8"] s lexbuf; + UNARY (simd_int_op s unreachable i16x8_avgr_u unreachable unreachable) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From 89d1040e8c1042c1ac7a5e4e919ab19ac2e7df9d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 25 Jun 2020 14:38:30 -0700 Subject: [PATCH 170/378] Move implementation of avgr_u into Int functor, require Rep to have to_int64 and of_int64 --- interpreter/exec/i16.ml | 9 ++------- interpreter/exec/i32.ml | 8 ++------ interpreter/exec/i64.ml | 4 +++- interpreter/exec/int.ml | 16 ++++++++++++++-- 4 files changed, 21 insertions(+), 16 deletions(-) diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index 4a75b89171..94548be4cc 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -5,14 +5,9 @@ include Int.Make (struct include Int32 let bitwidth = 16 - (* TODO incorrect for negative values. *) let to_hex_string = Printf.sprintf "%lx" - let avgr_u x y = - (* Mask top bits to treat the value as unsigned. *) - let mask = Int32.of_int 0xffff in - let x_u16 = logand mask x in - let y_u16 = logand mask y in - Int32.div (Int32.add (Int32.add x_u16 y_u16) one) (Int32.of_int 2) + let of_int64 = Int64.to_int32 + let to_int64 = Int64.of_int32 end) diff --git a/interpreter/exec/i32.ml b/interpreter/exec/i32.ml index f7c27d9c35..a6bb489b0c 100644 --- a/interpreter/exec/i32.ml +++ b/interpreter/exec/i32.ml @@ -6,10 +6,6 @@ include Int.Make let bitwidth = 32 let to_hex_string = Printf.sprintf "%lx" - let avgr_u x y = - let open Int64 in - let mask = of_int (-1) in - let x64 = logand mask (of_int32 x) in - let y64 = logand mask (of_int32 y) in - to_int32 (div (add (add x64 y64) one) (of_int 2)) + let of_int64 = Int64.to_int32 + let to_int64 = Int64.of_int32 end) diff --git a/interpreter/exec/i64.ml b/interpreter/exec/i64.ml index e70e1c6f6e..497e13a2d0 100644 --- a/interpreter/exec/i64.ml +++ b/interpreter/exec/i64.ml @@ -5,5 +5,7 @@ include Int.Make include Int64 let bitwidth = 64 let to_hex_string = Printf.sprintf "%Lx" - let avgr_u x y = failwith "unimplemented i64x2.avgr_u" + + let of_int64 i = i + let to_int64 i = i end) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 596c914679..f44f49a528 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -15,7 +15,6 @@ sig val mul : t -> t -> t val div : t -> t -> t (* raises Division_by_zero *) val rem : t -> t -> t (* raises Division_by_zero *) - val avgr_u : t -> t -> t val logand : t -> t -> t val lognot : t -> t @@ -27,6 +26,13 @@ sig val of_int : int -> t val to_int : t -> int + (* Required for operations that need to extend to a larger type, such as + * avgr_u. Cast to int64, perform the operations, then convert back to t. + * We don't have such operations onf I64, so using int64 is safe. We + * cannot use int, because on 32-bit platforms int cannot represent + * all values of int32. *) + val of_int64: int64 -> t + val to_int64: t -> int64 val to_string : t -> string val to_hex_string : t -> string @@ -152,7 +158,13 @@ struct let rem_u x y = let q, r = divrem_u x y in r - let avgr_u = Rep.avgr_u + let avgr_u x y = + let open Int64 in + (* Mask with bottom #bitwidth bits set *) + let mask = (shift_right_logical minus_one (64 - Rep.bitwidth)) in + let x64 = (logand mask (Rep.to_int64 x)) in + let y64 = (logand mask (Rep.to_int64 y)) in + Rep.of_int64 (div (add (add x64 y64) one) (of_int 2)) let and_ = Rep.logand let or_ = Rep.logor From d516baa19ac34531d525a79b3ab31ad133a1a0a8 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 30 Jun 2020 10:22:52 -0700 Subject: [PATCH 171/378] Fix typos, remove extra parens --- interpreter/exec/int.ml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index f44f49a528..dfd9ec5b86 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -28,7 +28,7 @@ sig val to_int : t -> int (* Required for operations that need to extend to a larger type, such as * avgr_u. Cast to int64, perform the operations, then convert back to t. - * We don't have such operations onf I64, so using int64 is safe. We + * We don't have such operations on I64, so using int64 is safe. We * cannot use int, because on 32-bit platforms int cannot represent * all values of int32. *) val of_int64: int64 -> t @@ -161,9 +161,9 @@ struct let avgr_u x y = let open Int64 in (* Mask with bottom #bitwidth bits set *) - let mask = (shift_right_logical minus_one (64 - Rep.bitwidth)) in - let x64 = (logand mask (Rep.to_int64 x)) in - let y64 = (logand mask (Rep.to_int64 y)) in + let mask = shift_right_logical minus_one (64 - Rep.bitwidth) in + let x64 = logand mask (Rep.to_int64 x) in + let y64 = logand mask (Rep.to_int64 y) in Rep.of_int64 (div (add (add x64 y64) one) (of_int 2)) let and_ = Rep.logand @@ -266,8 +266,8 @@ struct let sign_extend i = (* This module is used with I32 and I64, but the bitwidth can be less * than that, e.g. for I16. When used for smaller integers, the stored value - * needs to be signed extened, e.g. parsing -1 into a I16 (backed by Int32) - * shoud have all high bits set. We can do that by logor with a mask, + * needs to be signed extended, e.g. parsing -1 into a I16 (backed by Int32) + * should have all high bits set. We can do that by logor with a mask, * where the mask is minus_one left shifted by bitwidth. But if bitwidth * matches the number of bits of Rep, the shift will be incorrect. * -1 (Int32) << 32 = -1 From 6987f8f6b44ef948298fde2d7eb4366f3074ee79 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 1 Jul 2020 12:27:42 -0700 Subject: [PATCH 172/378] Add i8x16 support (#263) Implement add sub neg for i8x16, this passes simd_i8x16_arith.wast. --- interpreter/exec/eval_numeric.ml | 3 +++ interpreter/exec/i8.ml | 13 +++++++++++++ interpreter/exec/simd.ml | 14 +++++++++----- interpreter/exec/v128.ml | 24 ++++++++++++++++-------- interpreter/script/run.ml | 7 ++++++- interpreter/syntax/operators.ml | 4 ++++ interpreter/text/lexer.mll | 12 ++++++------ interpreter/text/parser.mly | 3 ++- 8 files changed, 59 insertions(+), 21 deletions(-) create mode 100644 interpreter/exec/i8.ml diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 74bd6181eb..c15cb67230 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -128,6 +128,7 @@ struct let unop (op : unop) = fun v -> match op with + | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) @@ -142,6 +143,8 @@ struct let binop (op : binop) = let f = match op with + | I8x16 Add -> SXX.I8x16.add + | I8x16 Sub -> SXX.I8x16.sub | I16x8 Add -> SXX.I16x8.add | I16x8 Sub -> SXX.I16x8.sub | I16x8 Mul -> SXX.I16x8.mul diff --git a/interpreter/exec/i8.ml b/interpreter/exec/i8.ml new file mode 100644 index 0000000000..c2b6fa73a2 --- /dev/null +++ b/interpreter/exec/i8.ml @@ -0,0 +1,13 @@ +(* I8 for SIMD. Uses Int32 as the underlying storage. All int8 values will be + * stored signed-extended. E.g. -1 will be stored with all high bits set. + *) +include Int.Make (struct + include Int32 + + let bitwidth = 8 + (* TODO incorrect for negative values. *) + let to_hex_string = Printf.sprintf "%lx" + + let of_int64 = Int64.to_int32 + let to_int64 = Int64.of_int32 +end) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 6aaf053bdc..50e6a82961 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -11,11 +11,6 @@ let lanes shape = | F32x4 -> 4 | F64x2 -> 2 -let i16x8_indices = [0; 2; 4; 6; 8; 10; 12; 14] -let i32x4_indices = [0; 4; 8; 12] -let f32x4_indices = i32x4_indices -let f64x2_indices = [0; 8] - module type RepType = sig type t @@ -26,6 +21,9 @@ sig val bytewidth : int val of_strings : shape -> string list -> t + val to_i8x16 : t -> I8.t list + val of_i8x16 : I8.t list -> t + val to_i16x8 : t -> I16.t list val of_i16x8 : I16.t list -> t @@ -90,6 +88,7 @@ sig (* We need type t = t to ensure that all submodule types are S.t, * then callers don't have to change *) + module I8x16 : Int with type t = t and type lane = I8.t module I16x8 : Int with type t = t and type lane = I16.t module I32x4 : Int with type t = t and type lane = I32.t module F32x4 : Float with type t = t and type lane = F32.t @@ -155,6 +154,11 @@ struct let avgr_u = binop Int.avgr_u end + module I8x16 = MakeInt (I8) (struct + let to_shape = Rep.to_i8x16 + let of_shape = Rep.of_i8x16 + end) + module I16x8 = MakeInt (I16) (struct let to_shape = Rep.to_i16x8 let of_shape = Rep.of_i16x8 diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index ee0de9f0e6..3337632e45 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -4,36 +4,44 @@ include Simd.Make let bytewidth = 16 let to_string s = s + let to_i8x16 s = + List.init 16 (fun i -> (Int32.of_int (Bytes.get_int8 (Bytes.of_string s) i))) + + let of_i8x16 fs = + let b = Bytes.create bytewidth in + List.iteri (fun i f -> Bytes.set_int8 b i (Int32.to_int f)) fs; + Bytes.to_string b + let to_i16x8 s = - List.map (fun i -> I16.of_bits (Int32.of_int (Bytes.get_int16_le (Bytes.of_string s) i))) Simd.i16x8_indices + List.init 8 (fun i -> Int32.of_int (Bytes.get_int16_le (Bytes.of_string s) (i*2))) let of_i16x8 fs = let b = Bytes.create bytewidth in - List.iter2 (fun i f -> Bytes.set_int16_le b i (Int32.to_int (I16.to_bits f))) Simd.i16x8_indices fs; + List.iteri (fun i f -> Bytes.set_int16_le b (i*2) (Int32.to_int f)) fs; Bytes.to_string b let to_i32x4 s = - List.map (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices + List.init 4 (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) (i*4))) let of_i32x4 fs = let b = Bytes.create bytewidth in - List.iter2 (fun i f -> Bytes.set_int32_le b i (I32.to_bits f)) Simd.i32x4_indices fs; + List.iteri (fun i f -> Bytes.set_int32_le b (i*4) (I32.to_bits f)) fs; Bytes.to_string b let to_f32x4 s = - List.map (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) i)) Simd.f32x4_indices + List.init 4 (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) (i*4))) let of_f32x4 fs = let b = Bytes.create bytewidth in - List.iter2 (fun i f -> Bytes.set_int32_le b i (F32.to_bits f)) Simd.f32x4_indices fs; + List.iteri (fun i f -> Bytes.set_int32_le b (i*4) (F32.to_bits f)) fs; Bytes.to_string b let to_f64x2 s = - List.map (fun i -> F64.of_bits (Bytes.get_int64_le (Bytes.of_string s) i)) Simd.f64x2_indices + List.init 2 (fun i -> F64.of_bits (Bytes.get_int64_le (Bytes.of_string s) (i*8))) let of_f64x2 fs = let b = Bytes.create bytewidth in - List.iter2 (fun i f -> Bytes.set_int64_le b i (F64.to_bits f)) Simd.f64x2_indices fs; + List.iteri (fun i f -> Bytes.set_int64_le b (i*8) (F64.to_bits f)) fs; Bytes.to_string b let of_strings shape ss = diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index aaa86538d1..7bd797941e 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -375,10 +375,15 @@ let assert_result at got expect = let open Values in let open Simd in match shape, v with + | I8x16, V128 v -> + List.exists2 + (fun v r -> assert_num_pat at v r) + (List.init 16 (fun i -> I32 (V128.I8x16.extract_lane i v))) + vs | I16x8, V128 v -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.mapi (fun i x -> I32 (V128.I16x8.extract_lane i v)) i16x8_indices) + (List.init 8 (fun i -> I32 (V128.I16x8.extract_lane i v))) vs | I32x4, V128 v -> let l0 = I32 (V128.I32x4.extract_lane 0 v) in diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 5cb7b03c88..373f076e28 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -217,6 +217,10 @@ let memory_size = MemorySize let memory_grow = MemoryGrow (* SIMD *) +let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) +let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) +let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) + let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index a4f44c0939..87936ed3c3 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -412,15 +412,15 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s unreachable i16x8_neg i32x4_neg unreachable f32x4_neg f64x2_neg) } + { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg unreachable f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } | (simd_shape as s)".add" - { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable i16x8_add i32x4_add unreachable f32x4_add f64x2_add) } + { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s i8x16_add i16x8_add i32x4_add unreachable f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } + { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s i8x16_sub i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" { only ["i16x8"; "i32x4"] s lexbuf; BINARY (simdop s unreachable i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 293721e300..50ee1dce22 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -58,6 +58,7 @@ let simd_lane_nan shape l at = let simd_lane_lit shape l at = let open Simd in match shape with + | I8x16 -> LitPat (Values.I32 (I8.of_string l) @@ at) @@ at | I16x8 -> LitPat (Values.I32 (I16.of_string l) @@ at) @@ at | I32x4 -> LitPat (Values.I32 (I32.of_string l) @@ at) @@ at | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at @@ -933,7 +934,7 @@ result : | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; match $3 with - | Simd.I16x8 | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> + | Simd.I8x16 | Simd.I16x8 | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () | _ -> error (ati 3) "unimplemented SIMD shape" } From 225a9b2c01cdf4de0d06f4233ef6752a321dc33e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 14 Jul 2020 15:11:35 -0700 Subject: [PATCH 173/378] Implement 8x16 abs, min_{s,u}, max_{s,u}, avgr_u (#265) This passes simd_i8x16_arith2.wast. --- interpreter/exec/eval_numeric.ml | 6 ++++++ interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/lexer.mll | 24 ++++++++++++------------ 3 files changed, 24 insertions(+), 12 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index c15cb67230..7d60d027ec 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -129,6 +129,7 @@ struct let unop (op : unop) = fun v -> match op with | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) + | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) @@ -145,6 +146,11 @@ struct let f = match op with | I8x16 Add -> SXX.I8x16.add | I8x16 Sub -> SXX.I8x16.sub + | I8x16 MinS -> SXX.I8x16.min_s + | I8x16 MinU -> SXX.I8x16.min_u + | I8x16 MaxS -> SXX.I8x16.max_s + | I8x16 MaxU -> SXX.I8x16.max_u + | I8x16 AvgrU -> SXX.I8x16.avgr_u | I16x8 Add -> SXX.I16x8.add | I16x8 Sub -> SXX.I16x8.sub | I16x8 Mul -> SXX.I16x8.mul diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 373f076e28..42f1fb3430 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -220,6 +220,12 @@ let memory_grow = MemoryGrow let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) +let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) +let i8x16_min_s = Binary (V128 (V128Op.I8x16 V128Op.MinS)) +let i8x16_min_u = Binary (V128 (V128Op.I8x16 V128Op.MinU)) +let i8x16_max_s = Binary (V128 (V128Op.I8x16 V128Op.MaxS)) +let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) +let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 87936ed3c3..37b2e9479f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -422,17 +422,17 @@ rule token = parse { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s i8x16_sub i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" - { only ["i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s unreachable i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_min_s i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } | (simd_shape as s)".min_u" - { only ["i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s unreachable i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_min_u i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } | (simd_shape as s)".max_s" - { only ["i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s unreachable i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_max_s i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } | (simd_shape as s)".max_u" - { only ["i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s unreachable i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_max_u i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; BINARY (simdop s unreachable i16x8_mul i32x4_mul unreachable f32x4_mul f64x2_mul) } @@ -440,11 +440,11 @@ rule token = parse | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } | (simd_shape as s)".abs" - { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s unreachable i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } + { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; + UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } | (simd_int_shape as s)".avgr_u" - { only ["i16x8"] s lexbuf; - UNARY (simd_int_op s unreachable i16x8_avgr_u unreachable unreachable) } + { only ["i8x16"; "i16x8"] s lexbuf; + UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From 7ac7d92cfc2cbfbc8def663d4c8a7cf33b0001ab Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 14 Jul 2020 15:12:01 -0700 Subject: [PATCH 174/378] Support I64x2 (#266) Add i64x2.{neg,add,sub,mul}, now simd/simd_i64x2_arith.wast passes. --- interpreter/exec/eval_numeric.ml | 4 ++++ interpreter/exec/simd.ml | 9 +++++++++ interpreter/exec/v128.ml | 8 ++++++++ interpreter/script/run.ml | 5 +++++ interpreter/syntax/operators.ml | 5 +++++ interpreter/text/lexer.mll | 13 +++++-------- interpreter/text/parser.mly | 7 ++----- 7 files changed, 38 insertions(+), 13 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7d60d027ec..7834432f4f 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -134,6 +134,7 @@ struct | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) + | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) @@ -166,6 +167,9 @@ struct | I32x4 MaxS -> SXX.I32x4.max_s | I32x4 MaxU -> SXX.I32x4.max_u | I32x4 Mul -> SXX.I32x4.mul + | I64x2 Add -> SXX.I64x2.add + | I64x2 Sub -> SXX.I64x2.sub + | I64x2 Mul -> SXX.I64x2.mul | F32x4 Add -> SXX.F32x4.add | F32x4 Sub -> SXX.F32x4.sub | F32x4 Mul -> SXX.F32x4.mul diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 50e6a82961..9b2ef26549 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -30,6 +30,9 @@ sig val to_i32x4 : t -> I32.t list val of_i32x4 : I32.t list -> t + val to_i64x2 : t -> I64.t list + val of_i64x2 : I64.t list -> t + val to_f32x4 : t -> F32.t list val of_f32x4 : F32.t list -> t @@ -91,6 +94,7 @@ sig module I8x16 : Int with type t = t and type lane = I8.t module I16x8 : Int with type t = t and type lane = I16.t module I32x4 : Int with type t = t and type lane = I32.t + module I64x2 : Int with type t = t and type lane = I64.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t end @@ -169,6 +173,11 @@ struct let of_shape = Rep.of_i32x4 end) + module I64x2 = MakeInt (I64) (struct + let to_shape = Rep.to_i64x2 + let of_shape = Rep.of_i64x2 + end) + module F32x4 = MakeFloat (F32) (struct let to_shape = Rep.to_f32x4 let of_shape = Rep.of_f32x4 diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 3337632e45..944ae2ea4c 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -28,6 +28,14 @@ include Simd.Make List.iteri (fun i f -> Bytes.set_int32_le b (i*4) (I32.to_bits f)) fs; Bytes.to_string b + let to_i64x2 s = + List.init 2 (fun i -> I64.of_bits (Bytes.get_int64_le (Bytes.of_string s) (i*8))) + + let of_i64x2 fs = + let b = Bytes.create bytewidth in + List.iteri (fun i f -> Bytes.set_int64_le b (i*8) (I64.to_bits f)) fs; + Bytes.to_string b + let to_f32x4 s = List.init 4 (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) (i*4))) diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 7bd797941e..f6417241e7 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -393,6 +393,11 @@ let assert_result at got expect = List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs + | I64x2, V128 v -> + List.exists2 + (fun v r -> assert_num_pat at v r) + (List.init 2 (fun i -> I64 (V128.I64x2.extract_lane i v))) + vs | F32x4, V128 v -> let l0 = F32 (V128.F32x4.extract_lane 0 v) in let l1 = F32 (V128.F32x4.extract_lane 1 v) in diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 42f1fb3430..e318e29af3 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -249,6 +249,11 @@ let i32x4_max_s = Binary (V128 (V128Op.I32x4 V128Op.MaxS)) let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) +let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) +let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) +let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) +let i64x2_mul = Binary (V128 (V128Op.I64x2 V128Op.Mul)) + let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 37b2e9479f..8589bff77e 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -412,15 +412,12 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".neg" - { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg unreachable f32x4_neg f64x2_neg) } + { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } | (simd_shape as s)".add" - { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s i8x16_add i16x8_add i32x4_add unreachable f32x4_add f64x2_add) } + { BINARY (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s i8x16_sub i16x8_sub i32x4_sub unreachable f32x4_sub f64x2_sub) } + { BINARY (simdop s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; BINARY (simdop s i8x16_min_s i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } @@ -434,8 +431,8 @@ rule token = parse { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; BINARY (simdop s i8x16_max_u i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } | (simd_shape as s)".mul" - { only ["i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable i16x8_mul i32x4_mul unreachable f32x4_mul f64x2_mul) } + { only ["i16x8"; "i32x4"; "i64x2"; "f32x4"; "f64x2"] s lexbuf; + BINARY (simdop s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } | (simd_float_shape as s)".div" { BINARY (simd_float_op s f32x4_div f64x2_div) } | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 50ee1dce22..2eedc3cd56 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -61,9 +61,9 @@ let simd_lane_lit shape l at = | I8x16 -> LitPat (Values.I32 (I8.of_string l) @@ at) @@ at | I16x8 -> LitPat (Values.I32 (I16.of_string l) @@ at) @@ at | I32x4 -> LitPat (Values.I32 (I32.of_string l) @@ at) @@ at + | I64x2 -> LitPat (Values.I64 (I64.of_string l) @@ at) @@ at | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at - | _ -> error at "unimplemented simd lane lit" let nanop f nan = let open Source in @@ -933,10 +933,7 @@ result : | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ ati 3) @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; - match $3 with - | Simd.I8x16 | Simd.I16x8 | Simd.I32x4 | Simd.F32x4 | Simd.F64x2 -> - SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () - | _ -> error (ati 3) "unimplemented SIMD shape" + SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () } result_list : From f65d981d2bff45d345ca5d83fadd9c18ad29b956 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 14 Jul 2020 16:26:05 -0700 Subject: [PATCH 175/378] Update v128.const implementation status for v8 (#268) * Update v128.const implementation status for v8 * Add note about Chrome version --- proposals/simd/ImplementationStatus.md | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index c217241ee2..fc3f0cdd65 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -12,7 +12,7 @@ | `v32x4.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | | | | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -87,7 +87,7 @@ | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -108,7 +108,7 @@ | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -134,7 +134,7 @@ | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -181,10 +181,12 @@ [1] Tip of tree LLVM as of May 20, 2020 -[2] V8 8.4.268. Requires flag `--experimental-wasm-simd` +[2] V8 8.6.136. Requires flag `--experimental-wasm-simd` [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` [4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` [5] Firefox Nightly x64/x86 SSE4.1+ only, disable in about:config under `javascript.options.wasm_simd` + +[6] Will only be in Chrome M87 onwards. From b82988ee0306f51da7d887d443337c25b37d6eaf Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 24 Jul 2020 09:12:21 -0700 Subject: [PATCH 176/378] Implement v128 bitwise operations (#267) Not, and, or, xor, andnot. Create V128 submodule for vector bitwise ops, converting to i64x2 for the actual operations --- interpreter/exec/eval_numeric.ml | 5 +++++ interpreter/exec/int.ml | 2 ++ interpreter/exec/simd.ml | 26 ++++++++++++++++++++++++++ interpreter/syntax/ast.ml | 9 ++++++--- interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/lexer.mll | 10 ++++++++++ 6 files changed, 55 insertions(+), 3 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7834432f4f..7d663d2338 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -141,6 +141,7 @@ struct | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) + | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) | _ -> failwith "TODO v128 unimplemented unop" let binop (op : binop) = @@ -182,6 +183,10 @@ struct | F64x2 Div -> SXX.F64x2.div | F64x2 Min -> SXX.F64x2.min | F64x2 Max -> SXX.F64x2.max + | V128 And -> SXX.V128.and_ + | V128 Or -> SXX.V128.or_ + | V128 Xor -> SXX.V128.xor + | V128 AndNot -> SXX.V128.andnot | _ -> failwith "TODO v128 unimplemented binop" in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index dfd9ec5b86..7b8719344d 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -49,6 +49,7 @@ sig val zero : t + val lognot : t -> t val abs : t -> t val neg : t -> t val add : t -> t -> t @@ -127,6 +128,7 @@ struct let one = Rep.one let ten = Rep.of_int 10 + let lognot = Rep.lognot let abs = Rep.abs let neg = Rep.neg diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 9b2ef26549..504a1a2ace 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -77,6 +77,17 @@ sig val extract_lane : int -> t -> lane end +module type Vec = +sig + type t + + val lognot : t -> t + val and_ : t -> t -> t + val or_ : t -> t -> t + val xor : t -> t -> t + val andnot : t -> t -> t +end + module type S = sig type t @@ -97,6 +108,7 @@ sig module I64x2 : Int with type t = t and type lane = I64.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t + module V128 : Vec with type t = t end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -112,6 +124,20 @@ struct let to_i16x8 = Rep.to_i16x8 let to_i32x4 = Rep.to_i32x4 + module V128 : Vec with type t = Rep.t = struct + type t = Rep.t + let to_shape = Rep.to_i64x2 + let of_shape = Rep.of_i64x2 + let unop f x = of_shape (List.map f (to_shape x)) + let binop f x y = of_shape (List.map2 f (to_shape x) (to_shape y)) + let lognot = unop I64.lognot + let and_ = binop I64.and_ + let or_ = binop I64.or_ + let xor = binop I64.xor + let andnot = binop (fun x y -> I64.and_ x (I64.lognot y)) + end + + module MakeFloat (Float : Float.S) (Convert : sig val to_shape : Rep.t -> Float.t list val of_shape : Float.t list -> Rep.t diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index f17a8da49b..3a39f63fc9 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -52,17 +52,20 @@ struct type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU type funop = Abs | Neg | Sqrt type fbinop = Add | Sub | Mul | Div | Min | Max + type vunop = Not + type vbinop = And | Or | Xor | AndNot - type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) v128op = + type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) v128op = | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 | F32x4 of 'f32x4 | F64x2 of 'f64x2 + | V128 of 'v128 - type unop = (iunop, iunop, iunop, iunop, funop, funop) v128op - type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) v128op + type unop = (iunop, iunop, iunop, iunop, funop, funop, vunop) v128op + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop, vbinop) v128op type testop = TodoTestOp type relop = TodoRelOp type cvtop = TodoCvtOp diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index e318e29af3..e08b9901b7 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -217,6 +217,12 @@ let memory_size = MemorySize let memory_grow = MemoryGrow (* SIMD *) +let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) +let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) +let v128_andnot = Binary (V128 (V128Op.V128 V128Op.AndNot)) +let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) +let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) + let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 8589bff77e..f1f45cc517 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -411,6 +411,16 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } + | vxxx".not" + { UNARY v128_not } + | vxxx".and" + { UNARY v128_and } + | vxxx".andnot" + { UNARY v128_andnot } + | vxxx".or" + { UNARY v128_or } + | vxxx".xor" + { UNARY v128_xor } | (simd_shape as s)".neg" { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } From c8d539eb15d0dac36b6e036d97765e54d7999a57 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 24 Jul 2020 09:20:25 -0700 Subject: [PATCH 177/378] Implement v128 boolean operations (#270) {i8x16,i16x8,i32x4}_{any_true,all_true} v128.bitselect is used in the tests (simd_boolean.wast) so implemented here using a new AST node, Ternary. Bitselect is the only ternary instruction now. --- interpreter/binary/encode.ml | 2 ++ interpreter/exec/eval.ml | 4 ++++ interpreter/exec/eval_numeric.ml | 18 ++++++++++++++++-- interpreter/exec/eval_numeric.mli | 1 + interpreter/exec/simd.ml | 10 ++++++++++ interpreter/syntax/ast.ml | 9 +++++++-- interpreter/syntax/operators.ml | 7 +++++++ interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 22 ++++++++++++---------- interpreter/text/parser.mly | 4 +++- interpreter/valid/valid.ml | 4 ++++ 11 files changed, 67 insertions(+), 15 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index a237eaa297..f6f5746bbb 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -350,6 +350,8 @@ let encode m = | Binary (F64 F64Op.CopySign) -> op 0xa6 | Binary (V128 _) -> failwith "TODO v128" + | Ternary (_) -> failwith "TODO v128" + | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false | Convert (I32 I32Op.WrapI64) -> op 0xa7 diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 8f2ce28b2c..40c70f960d 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -262,6 +262,10 @@ let rec step (c : config) : config = (try Eval_numeric.eval_binop binop v1 v2 :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | Ternary ternop, v3 :: v2 :: v1 :: vs' -> + (try Eval_numeric.eval_ternop ternop v1 v2 v3 :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | Convert cvtop, v :: vs' -> (try Eval_numeric.eval_cvtop cvtop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7d663d2338..51ccd5b708 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -190,8 +190,16 @@ struct | _ -> failwith "TODO v128 unimplemented binop" in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) - (* FIXME *) - let testop op = failwith "TODO v128 unimplemented testop" + let testop (op : testop) = + let f = match op with + | I8x16 AnyTrue -> SXX.I8x16.any_true + | I8x16 AllTrue -> SXX.I8x16.all_true + | I16x8 AnyTrue -> SXX.I16x8.any_true + | I16x8 AllTrue -> SXX.I16x8.all_true + | I32x4 AnyTrue -> SXX.I32x4.any_true + | I32x4 AllTrue -> SXX.I32x4.all_true + | _ -> assert false + in fun v -> f (of_value 1 v) (* FIXME *) let relop op = failwith "TODO v128 unimplemented relop" @@ -202,6 +210,11 @@ struct (F32Op.to_value (SXX.F32x4.extract_lane imm (of_value 1 v))) | I32x4ExtractLane imm -> (I32Op.to_value (SXX.I32x4.extract_lane imm (of_value 1 v))) + + let ternop op = + let f = match op with + | Bitselect -> SXX.V128.bitselect + in fun v1 v2 v3 -> to_value (f (of_value 1 v1) (of_value 2 v2) (of_value 3 v3)) end module V128Op = SimdOp (V128) (Values.V128Value) @@ -289,6 +302,7 @@ struct end let eval_extractop extractop v = V128Op.extractop extractop v +let eval_ternop ternop v= V128Op.ternop ternop v (* Dispatch *) diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index 1e1b3545aa..b7446e14cf 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -8,3 +8,4 @@ val eval_testop : Ast.testop -> value -> bool val eval_relop : Ast.relop -> value -> value -> bool val eval_cvtop : Ast.cvtop -> value -> value val eval_extractop : Ast.extractop -> value -> value +val eval_ternop : Ast.ternop -> value -> value -> value -> value diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 504a1a2ace..bca6447f44 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -57,6 +57,8 @@ sig val max_u : t -> t -> t val mul : t -> t -> t val avgr_u : t -> t -> t + val any_true : t -> bool + val all_true : t -> bool end (* This signature defines the types and operations SIMD floats can expose. *) @@ -86,6 +88,7 @@ sig val or_ : t -> t -> t val xor : t -> t -> t val andnot : t -> t -> t + val bitselect : t -> t -> t -> t end module type S = @@ -135,6 +138,10 @@ struct let or_ = binop I64.or_ let xor = binop I64.xor let andnot = binop (fun x y -> I64.and_ x (I64.lognot y)) + let bitselect v1 v2 c = + let v2_andnot_c = andnot v2 c in + let v1_and_c = binop I64.and_ v1 c in + binop I64.or_ v1_and_c v2_andnot_c end @@ -182,6 +189,9 @@ struct (* The result of avgr_u will not overflow this type, but the intermediate might, * so have the Int type implement it so they can extend it accordingly *) let avgr_u = binop Int.avgr_u + let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (Convert.to_shape s) + let any_true = reduceop (||) false + let all_true = reduceop (&&) true end module I8x16 = MakeInt (I8) (struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 3a39f63fc9..97d8ed1aeb 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -54,6 +54,7 @@ struct type fbinop = Add | Sub | Mul | Div | Min | Max type vunop = Not type vbinop = And | Or | Xor | AndNot + type vtestop = AnyTrue | AllTrue type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) v128op = | I8x16 of 'i8x16 @@ -66,7 +67,8 @@ struct type unop = (iunop, iunop, iunop, iunop, funop, funop, vunop) v128op type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop, vbinop) v128op - type testop = TodoTestOp + type testop = (vtestop, vtestop, vtestop, vtestop, vtestop, vtestop, vtestop) v128op + type ternop = Bitselect type relop = TodoRelOp type cvtop = TodoCvtOp type extractop = I32x4ExtractLane of int | F32x4ExtractLane of int @@ -84,6 +86,8 @@ type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop, V128Op.te type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop, V128Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) Values.op type extractop = V128Op.extractop +(* Ternary operators only exist for V128 types for now *) +type ternop = V128Op.ternop type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} @@ -128,8 +132,9 @@ and instr' = | Compare of relop (* numeric comparison *) | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) + | Ternary of ternop (* ternary numeric operator *) | Convert of cvtop (* conversion *) - | ExtractLane of extractop (* extract lane from v128 value *) + | ExtractLane of extractop (* extract lane from v128 value *) (* Globals & Functions *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index e08b9901b7..d7a64a08ef 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -222,8 +222,11 @@ let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) let v128_andnot = Binary (V128 (V128Op.V128 V128Op.AndNot)) let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) +let v128_bitselect = Ternary (V128Op.Bitselect) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) +let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) +let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) @@ -234,6 +237,8 @@ let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) +let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) +let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) @@ -247,6 +252,8 @@ let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) +let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) +let i32x4_all_true = Test (V128 (V128Op.I32x4 V128Op.AllTrue)) let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) let i32x4_min_s = Binary (V128 (V128Op.I32x4 V128Op.MinS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 2cca9c95f6..02b694f304 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -278,6 +278,7 @@ let rec instr e = | Compare op -> relop op, [] | Unary op -> unop op, [] | Binary op -> binop op, [] + | Ternary op -> failwith "TODO v128 ternary op" | Convert op -> cvtop op, [] | ExtractLane op -> failwith "TODO v128" in Node (head, inner) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index f1f45cc517..b4e92f32d9 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -411,16 +411,12 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } - | vxxx".not" - { UNARY v128_not } - | vxxx".and" - { UNARY v128_and } - | vxxx".andnot" - { UNARY v128_andnot } - | vxxx".or" - { UNARY v128_or } - | vxxx".xor" - { UNARY v128_xor } + | vxxx".not" { UNARY v128_not } + | vxxx".and" { UNARY v128_and } + | vxxx".andnot" { UNARY v128_andnot } + | vxxx".or" { UNARY v128_or } + | vxxx".xor" { UNARY v128_xor } + | vxxx".bitselect" { TERNARY v128_bitselect } | (simd_shape as s)".neg" { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } @@ -449,6 +445,12 @@ rule token = parse | (simd_shape as s)".abs" { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } + | (simd_int_shape as s)".any_true" + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + UNARY (simd_int_op s i8x16_any_true i16x8_any_true i32x4_any_true unreachable) } + | (simd_int_shape as s)".all_true" + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } | (simd_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 2eedc3cd56..0461553327 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -185,7 +185,7 @@ let inline_type_explicit (c : context) x ft at = %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT %token EXTRACT_LANE -%token CONST V128_CONST UNARY BINARY TEST COMPARE CONVERT +%token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA OFFSET IMPORT EXPORT TABLE @@ -206,6 +206,7 @@ let inline_type_explicit (c : context) x ft at = %token Ast.instr' * Values.value> CONST %token UNARY %token BINARY +%token TERNARY %token TEST %token COMPARE %token CONVERT @@ -369,6 +370,7 @@ plain_instr : | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } | BINARY { fun c -> $1 } + | TERNARY { fun c -> $1 } | CONVERT { fun c -> $1 } | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 0fbabf8318..5216093d54 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -297,6 +297,10 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = let t = type_binop binop in [t; t] --> [t] + | Ternary ternop -> + let t = V128Type in + [t; t; t] --> [t] + | Convert cvtop -> let t1, t2 = type_cvtop e.at cvtop in [t1] --> [t2] From 5247c98fd9c9dcfb03156a342bfd0281cad19cd3 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 24 Jul 2020 11:54:41 -0700 Subject: [PATCH 178/378] Add SIMD type and value (#269) Packed data is not defined anywhere. We can specify SIMD as a i128 (128-bit integer). Later when specifying the SIMD instructions, we can use some "expansions" to expand i128 into the required lane shapes. Also, use v128 instead of s128, v128 is already commonly used in many places in this proposal, in the BinarySIMD.md, SIMD.md, and reference interpreter. --- document/core/binary/types.rst | 3 ++- document/core/exec/runtime.rst | 7 ++++--- document/core/intro/overview.rst | 7 +++++++ document/core/syntax/types.rst | 8 ++++++-- document/core/syntax/values.rst | 8 ++++++++ document/core/text/types.rst | 3 ++- document/core/util/macros.def | 2 ++ 7 files changed, 31 insertions(+), 7 deletions(-) diff --git a/document/core/binary/types.rst b/document/core/binary/types.rst index 05e1c02438..8a993bd268 100644 --- a/document/core/binary/types.rst +++ b/document/core/binary/types.rst @@ -20,7 +20,8 @@ Value Types \hex{7F} &\Rightarrow& \I32 \\ &&|& \hex{7E} &\Rightarrow& \I64 \\ &&|& \hex{7D} &\Rightarrow& \F32 \\ &&|& - \hex{7C} &\Rightarrow& \F64 \\ + \hex{7C} &\Rightarrow& \F64 \\ &&|& + \hex{7B} &\Rightarrow& \V128 \\ \end{array} .. note:: diff --git a/document/core/exec/runtime.rst b/document/core/exec/runtime.rst index a736feb37d..e0d242e0f9 100644 --- a/document/core/exec/runtime.rst +++ b/document/core/exec/runtime.rst @@ -7,14 +7,14 @@ Runtime Structure :ref:`Store `, :ref:`stack `, and other *runtime structure* forming the WebAssembly abstract machine, such as :ref:`values ` or :ref:`module instances `, are made precise in terms of additional auxiliary syntax. -.. index:: ! value, constant, value type, integer, floating-point +.. index:: ! value, constant, value type, integer, floating-point, simd pair: abstract syntax; value .. _syntax-val: Values ~~~~~~ -WebAssembly computations manipulate *values* of the four basic :ref:`value types `: :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each, respectively. +WebAssembly computations manipulate *values* of the five basic :ref:`value types `: :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each respectively, and :ref:`SIMD data ` of 128 bit width. In most places of the semantics, values of different types can occur. In order to avoid ambiguities, values are therefore represented with an abstract syntax that makes their type explicit. @@ -26,7 +26,8 @@ It is convenient to reuse the same notation as for the |CONST| :ref:`instruction \I32.\CONST~\i32 \\&&|& \I64.\CONST~\i64 \\&&|& \F32.\CONST~\f32 \\&&|& - \F64.\CONST~\f64 + \F64.\CONST~\f64 \\&&|& + \V128.\CONST~\i128 \end{array} diff --git a/document/core/intro/overview.rst b/document/core/intro/overview.rst index 6973396c0f..267e404503 100644 --- a/document/core/intro/overview.rst +++ b/document/core/intro/overview.rst @@ -23,6 +23,13 @@ This language is structured around the following concepts. Instead, integers are interpreted by respective operations as either unsigned or signed in two’s complement representation. + In addition to the basic value types above, there is a single 128 bit wide + value type representing different types of packed data. + The supported representations are 4 32-bit, or 2 64-bit + |IEEE754|_ numbers, or different widths of packed integer values + specifically 2 64-bit integers, 4 32-bit integers, 8 + 16-bit integers, or 16 8-bit integers. + .. _instruction: **Instructions** diff --git a/document/core/syntax/types.rst b/document/core/syntax/types.rst index 2310a6ef1f..365d121d81 100644 --- a/document/core/syntax/types.rst +++ b/document/core/syntax/types.rst @@ -22,7 +22,7 @@ Value Types .. math:: \begin{array}{llll} \production{value type} & \valtype &::=& - \I32 ~|~ \I64 ~|~ \F32 ~|~ \F64 \\ + \I32 ~|~ \I64 ~|~ \F32 ~|~ \F64 ~|~ \V128 \\ \end{array} The types |I32| and |I64| classify 32 and 64 bit integers, respectively. @@ -31,13 +31,17 @@ Integers are not inherently signed or unsigned, their interpretation is determin The types |F32| and |F64| classify 32 and 64 bit floating-point data, respectively. They correspond to the respective binary floating-point representations, also known as *single* and *double* precision, as defined by the |IEEE754|_ standard (Section 3.3). +The type |V128| corresponds to a 128 bit vector of packed integer or floating-point data. The packed data +can be interpreted as signed or unsigned integers, single or double precision floating-point +values, or a single 128 bit type. The interpretation is determined by individual operations. + Conventions ........... * The meta variable :math:`t` ranges over value types where clear from context. * The notation :math:`|t|` denotes the *bit width* of a value type. - That is, :math:`|\I32| = |\F32| = 32` and :math:`|\I64| = |\F64| = 64`. + That is, :math:`|\I32| = |\F32| = 32`, :math:`|\I64| = |\F64| = 64`, and :math:`|\V128| = 128`. .. index:: ! result type, value type, instruction, execution, function diff --git a/document/core/syntax/values.rst b/document/core/syntax/values.rst index 744384274f..f8f0cd17d5 100644 --- a/document/core/syntax/values.rst +++ b/document/core/syntax/values.rst @@ -145,6 +145,14 @@ Conventions * The meta variable :math:`z` ranges over floating-point values where clear from context. +.. index:: ! simd, fixed-width, vector + pair: abstract syntax; packed simd number +.. _syntax-simd: + +Fixed-Width SIMD +~~~~~~~~~~~~~~~~ + +Fixed-width SIMD are 128-bit values that are represented in the abstract syntax using |i128|. The interpretation of lane types (integers or floating-point numbers) and lane sizes are determined by the specific instruction operating on them. .. index:: ! name, byte, Unicode, UTF-8, character, binary format pair: abstract syntax; name diff --git a/document/core/text/types.rst b/document/core/text/types.rst index 01714835cc..d2508c1666 100644 --- a/document/core/text/types.rst +++ b/document/core/text/types.rst @@ -18,7 +18,8 @@ Value Types \text{i32} &\Rightarrow& \I32 \\ &&|& \text{i64} &\Rightarrow& \I64 \\ &&|& \text{f32} &\Rightarrow& \F32 \\ &&|& - \text{f64} &\Rightarrow& \F64 \\ + \text{f64} &\Rightarrow& \F64 \\ &&|& + \text{v128} &\Rightarrow& \V128 \\ \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index d7523ed127..8bd8a0caa6 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -149,6 +149,7 @@ .. |i16| mathdef:: \xref{syntax/values}{syntax-int}{\X{i16}} .. |i32| mathdef:: \xref{syntax/values}{syntax-int}{\X{i32}} .. |i64| mathdef:: \xref{syntax/values}{syntax-int}{\X{i64}} +.. |i128| mathdef:: \xref{syntax/values}{syntax-int}{\X{i128}} .. |fN| mathdef:: \xref{syntax/values}{syntax-float}{\X{f}N} .. |fNmag| mathdef:: \xref{syntax/values}{syntax-float}{\X{f}\X{Nmag}} @@ -176,6 +177,7 @@ .. |I64| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i64}} .. |F32| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f32}} .. |F64| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f64}} +.. |V128| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{v128}} .. |FUNCREF| mathdef:: \xref{syntax/types}{syntax-elemtype}{\K{funcref}} From 129da6c3631da14fa24fa557ebbc781a019af16e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 09:25:55 -0700 Subject: [PATCH 179/378] Implement SIMD splats using Convert (#274) i8x16, i16x8, i32x4, i64x2, f32x4, f64x2 splats. Implemented using Convert ast as a splat essentially takes a value of every other type to V128. --- interpreter/exec/eval_numeric.ml | 13 +++++++++---- interpreter/exec/simd.ml | 14 +++++++++++++- interpreter/syntax/ast.ml | 3 ++- interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/lexer.mll | 3 +++ interpreter/valid/valid.ml | 10 +++++++++- 6 files changed, 42 insertions(+), 7 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 51ccd5b708..72d173b678 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -293,12 +293,17 @@ end module V128CvtOp = struct - (* TODO open Ast.SimdOp - *) - (* FIXME *) - let cvtop op v = failwith "TODO v128" + let cvtop op v : value = + match op with + | I8x16 Splat -> V128 (V128.I8x16.splat (I32Op.of_value 1 v)) + | I16x8 Splat -> V128 (V128.I16x8.splat (I32Op.of_value 1 v)) + | I32x4 Splat -> V128 (V128.I32x4.splat (I32Op.of_value 1 v)) + | I64x2 Splat -> V128 (V128.I64x2.splat (I64Op.of_value 1 v)) + | F32x4 Splat -> V128 (V128.F32x4.splat (F32Op.of_value 1 v)) + | F64x2 Splat -> V128 (V128.F64x2.splat (F64Op.of_value 1 v)) + | _ -> assert false end let eval_extractop extractop v = V128Op.extractop extractop v diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index bca6447f44..8d0c28343d 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -46,6 +46,7 @@ sig type t type lane + val splat : lane -> t val extract_lane : int -> t -> lane val abs : t -> t val neg : t -> t @@ -67,6 +68,8 @@ sig type t type lane + val splat : lane -> t + val extract_lane : int -> t -> lane val abs : t -> t val neg : t -> t val sqrt : t -> t @@ -76,7 +79,6 @@ sig val div : t -> t -> t val min : t -> t -> t val max : t -> t -> t - val extract_lane : int -> t -> lane end module type Vec = @@ -148,6 +150,7 @@ struct module MakeFloat (Float : Float.S) (Convert : sig val to_shape : Rep.t -> Float.t list val of_shape : Float.t list -> Rep.t + val num_lanes : int end) : Float with type t = Rep.t and type lane = Float.t = struct type t = Rep.t @@ -163,16 +166,19 @@ struct let div = binop Float.div let min = binop Float.min let max = binop Float.max + let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) let extract_lane i s = List.nth (Convert.to_shape s) i end module MakeInt (Int : Int.S) (Convert : sig val to_shape : Rep.t -> Int.t list val of_shape : Int.t list -> Rep.t + val num_lanes : int end) : Int with type t = Rep.t and type lane = Int.t = struct type t = Rep.t type lane = Int.t + let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) let extract_lane i s = List.nth (Convert.to_shape s) i let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) @@ -197,31 +203,37 @@ struct module I8x16 = MakeInt (I8) (struct let to_shape = Rep.to_i8x16 let of_shape = Rep.of_i8x16 + let num_lanes = lanes I8x16 end) module I16x8 = MakeInt (I16) (struct let to_shape = Rep.to_i16x8 let of_shape = Rep.of_i16x8 + let num_lanes = lanes I16x8 end) module I32x4 = MakeInt (I32) (struct let to_shape = Rep.to_i32x4 let of_shape = Rep.of_i32x4 + let num_lanes = lanes I32x4 end) module I64x2 = MakeInt (I64) (struct let to_shape = Rep.to_i64x2 let of_shape = Rep.of_i64x2 + let num_lanes = lanes I64x2 end) module F32x4 = MakeFloat (F32) (struct let to_shape = Rep.to_f32x4 let of_shape = Rep.of_f32x4 + let num_lanes = lanes F32x4 end) module F64x2 = MakeFloat (F64) (struct let to_shape = Rep.to_f64x2 let of_shape = Rep.of_f64x2 + let num_lanes = lanes F64x2 end) end diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 97d8ed1aeb..2e6ee517e9 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -70,7 +70,8 @@ struct type testop = (vtestop, vtestop, vtestop, vtestop, vtestop, vtestop, vtestop) v128op type ternop = Bitselect type relop = TodoRelOp - type cvtop = TodoCvtOp + type vcvtop = Splat + type cvtop = (vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop) v128op type extractop = I32x4ExtractLane of int | F32x4ExtractLane of int end diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index d7a64a08ef..58a2c6f2b9 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -224,6 +224,7 @@ let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) +let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) @@ -236,6 +237,7 @@ let i8x16_max_s = Binary (V128 (V128Op.I8x16 V128Op.MaxS)) let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) +let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) @@ -249,6 +251,7 @@ let i16x8_max_s = Binary (V128 (V128Op.I16x8 V128Op.MaxS)) let i16x8_max_u = Binary (V128 (V128Op.I16x8 V128Op.MaxU)) let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) +let i32x4_splat = Convert (V128 (V128Op.I32x4 V128Op.Splat)) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) @@ -262,11 +265,13 @@ let i32x4_max_s = Binary (V128 (V128Op.I32x4 V128Op.MaxS)) let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) +let i64x2_splat = Convert (V128 (V128Op.I64x2 V128Op.Splat)) let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) let i64x2_mul = Binary (V128 (V128Op.I64x2 V128Op.Mul)) +let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) @@ -278,6 +283,7 @@ let f32x4_div = Binary (V128 (V128Op.F32x4 V128Op.Div)) let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) +let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) let f64x2_neg = Unary (V128 (V128Op.F64x2 V128Op.Neg)) let f64x2_sqrt = Unary (V128 (V128Op.F64x2 V128Op.Sqrt)) let f64x2_add = Binary (V128 (V128Op.F64x2 V128Op.Add)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b4e92f32d9..878d61330b 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -244,6 +244,9 @@ rule token = parse | "global.get" { GLOBAL_GET } | "global.set" { GLOBAL_SET } + | (simd_shape as s)".splat" + { SPLAT (simdop s i8x16_splat i16x8_splat i32x4_splat + i64x2_splat f32x4_splat f64x2_splat) } | (simd_shape as s)".extract_lane" { EXTRACT_LANE (fun imm -> simdop s unimplemented_simd unimplemented_simd i32x4_extract_lane diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 5216093d54..2e7d40b0f8 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -135,7 +135,15 @@ let type_cvtop at = function | PromoteF32 -> F32Type | DemoteF64 -> error at "invalid conversion" ), F64Type - | Values.V128 cvtop -> failwith "TODO v128" + | Values.V128 cvtop -> + let open V128Op in + (match cvtop with + | I8x16 Splat | I16x8 Splat | I32x4 Splat -> I32Type + | I64x2 Splat -> I64Type + | F32x4 Splat -> F32Type + | F64x2 Splat -> F64Type + | V128 Splat -> error at "invalid conversion" + ), V128Type (* Expressions *) From 5ef608769751ba386a7d986d5a38ab984618eeca Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 09:33:39 -0700 Subject: [PATCH 180/378] Implement shl and shr_s for v128 (#272) shr_u is a bit more tricky due for I8 and I16. E.g. -128 in I8 has all top bits set (sign extended) in an int32, and shr_u using Int's implementation will result in 0xffffffc0, instead of 0x000000c0. But we can't simply change the implementation, since parsing relies on this behavior. I'll figure that out in a later patch. --- interpreter/binary/encode.ml | 2 ++ interpreter/exec/eval.ml | 4 ++++ interpreter/exec/eval_numeric.ml | 16 +++++++++++++++- interpreter/exec/eval_numeric.mli | 1 + interpreter/exec/simd.ml | 8 ++++++++ interpreter/syntax/ast.ml | 4 ++++ interpreter/syntax/operators.ml | 8 ++++++++ interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 4 ++++ interpreter/text/parser.mly | 4 +++- interpreter/valid/valid.ml | 3 +++ 11 files changed, 53 insertions(+), 2 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index f6f5746bbb..5efb1ecd0d 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -398,6 +398,8 @@ let encode m = | ExtractLane (V128Op.I32x4ExtractLane imm) -> failwith "TODO v128" | ExtractLane (V128Op.F32x4ExtractLane imm) -> failwith "TODO v128" + | SimdShift (_) -> failwith "TODO v128" + let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 40c70f960d..294f7b0904 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -274,6 +274,10 @@ let rec step (c : config) : config = (try Eval_numeric.eval_extractop extractop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdShift shiftop, s :: v :: vs' -> + (try Eval_numeric.eval_shiftop shiftop v s :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | _ -> let s1 = string_of_values (List.rev vs) in let s2 = string_of_value_types (List.map type_of (List.rev vs)) in diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 72d173b678..2327741dd6 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -215,6 +215,19 @@ struct let f = match op with | Bitselect -> SXX.V128.bitselect in fun v1 v2 v3 -> to_value (f (of_value 1 v1) (of_value 2 v2) (of_value 3 v3)) + + let shiftop (op : shiftop) = + let f = match op with + | I8x16 Shl -> SXX.I8x16.shl + | I8x16 ShrS -> SXX.I8x16.shr_s + | I16x8 Shl -> SXX.I16x8.shl + | I16x8 ShrS -> SXX.I16x8.shr_s + | I32x4 Shl -> SXX.I32x4.shl + | I32x4 ShrS -> SXX.I32x4.shr_s + | I64x2 Shl -> SXX.I64x2.shl + | I64x2 ShrS -> SXX.I64x2.shr_s + | _ -> failwith "unimplemented shr_u" + in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) end module V128Op = SimdOp (V128) (Values.V128Value) @@ -307,7 +320,8 @@ struct end let eval_extractop extractop v = V128Op.extractop extractop v -let eval_ternop ternop v= V128Op.ternop ternop v +let eval_ternop ternop v = V128Op.ternop ternop v +let eval_shiftop shiftop v = V128Op.shiftop shiftop v (* Dispatch *) diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index b7446e14cf..2073db11ba 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -9,3 +9,4 @@ val eval_relop : Ast.relop -> value -> value -> bool val eval_cvtop : Ast.cvtop -> value -> value val eval_extractop : Ast.extractop -> value -> value val eval_ternop : Ast.ternop -> value -> value -> value -> value +val eval_shiftop : Ast.shiftop -> value -> value -> value diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 8d0c28343d..2a8ed39667 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -60,6 +60,8 @@ sig val avgr_u : t -> t -> t val any_true : t -> bool val all_true : t -> bool + val shl : t -> I32.t -> t + val shr_s : t -> I32.t -> t end (* This signature defines the types and operations SIMD floats can expose. *) @@ -198,6 +200,12 @@ struct let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (Convert.to_shape s) let any_true = reduceop (||) false let all_true = reduceop (&&) true + let shl v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shl a shift) v + let shr_s v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shr_s a shift) v end module I8x16 = MakeInt (I8) (struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 2e6ee517e9..a539951bc2 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -73,6 +73,8 @@ struct type vcvtop = Splat type cvtop = (vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop) v128op type extractop = I32x4ExtractLane of int | F32x4ExtractLane of int + type shift = Shl | ShrS | ShrU + type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op end module I32Op = IntOp @@ -89,6 +91,7 @@ type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) type extractop = V128Op.extractop (* Ternary operators only exist for V128 types for now *) type ternop = V128Op.ternop +type shiftop = V128Op.shiftop type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} @@ -136,6 +139,7 @@ and instr' = | Ternary of ternop (* ternary numeric operator *) | Convert of cvtop (* conversion *) | ExtractLane of extractop (* extract lane from v128 value *) + | SimdShift of shiftop (* shifts for v128 value *) (* Globals & Functions *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 58a2c6f2b9..89fc7552f9 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -228,6 +228,8 @@ let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) +let i8x16_shl = SimdShift V128Op.(I8x16 Shl) +let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) @@ -241,6 +243,8 @@ let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) +let i16x8_shl = SimdShift V128Op.(I16x8 Shl) +let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) @@ -257,6 +261,8 @@ let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) let i32x4_all_true = Test (V128 (V128Op.I32x4 V128Op.AllTrue)) +let i32x4_shl = SimdShift V128Op.(I32x4 Shl) +let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) let i32x4_min_s = Binary (V128 (V128Op.I32x4 V128Op.MinS)) @@ -270,6 +276,8 @@ let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) let i64x2_mul = Binary (V128 (V128Op.I64x2 V128Op.Mul)) +let i64x2_shl = SimdShift V128Op.(I64x2 Shl) +let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 02b694f304..3107ff5bbb 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -281,6 +281,7 @@ let rec instr e = | Ternary op -> failwith "TODO v128 ternary op" | Convert op -> cvtop op, [] | ExtractLane op -> failwith "TODO v128" + | SimdShift op -> failwith "TODO v128" in Node (head, inner) let const c = diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 878d61330b..81ba7210f1 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -454,6 +454,10 @@ rule token = parse | (simd_int_shape as s)".all_true" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } + | (simd_int_shape as s)".shl" + { SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } + | (simd_int_shape as s)".shr_s" + { SHIFT (simd_int_op s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } | (simd_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 0461553327..9ec00cd2bd 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -184,7 +184,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT -%token EXTRACT_LANE +%token EXTRACT_LANE SHIFT %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL @@ -216,6 +216,7 @@ let inline_type_explicit (c : context) x ft at = %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT %token SIMD_SHAPE +%token SHIFT %token NAN @@ -373,6 +374,7 @@ plain_instr : | TERNARY { fun c -> $1 } | CONVERT { fun c -> $1 } | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } + | SHIFT { fun c -> $1 } call_instr : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 2e7d40b0f8..f7caa72d84 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -318,6 +318,9 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = | ExtractLane (V128Op.F32x4ExtractLane _) -> [V128Type] --> [F32Type] + | SimdShift _ -> + [V128Type; I32Type] --> [V128Type] + and check_seq (c : context) (s : infer_stack_type) (es : instr list) : infer_stack_type = match es with From 0419529ef988851678e3c1a274927eb4a1ce5298 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 09:52:14 -0700 Subject: [PATCH 181/378] Fix parsing of splat (#277) Lost the token in the parser during rebases. --- interpreter/text/parser.mly | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 9ec00cd2bd..f7a5e95dd1 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -184,7 +184,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT -%token EXTRACT_LANE SHIFT +%token SPLAT EXTRACT_LANE SHIFT %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL @@ -211,6 +211,7 @@ let inline_type_explicit (c : context) x ft at = %token COMPARE %token CONVERT %token Memory.offset -> Ast.instr'> LOAD +%token SPLAT %token Ast.instr'> EXTRACT_LANE %token Memory.offset -> Ast.instr'> STORE %token OFFSET_EQ_NAT From 14772e35d8bc54ef91afe4e1353378b83c2fa912 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 09:53:27 -0700 Subject: [PATCH 182/378] Implement SIMD integer comparisons (#275) i8x16, i16x8, i32x4, i64x2 eq, ne, lt_s, lt_u, le_s, le_u, gt_s, gt_u, ge_s, ge_u. Implemented in terms of Binary operations, since they return the same v128 type, rather than a boolean like for I32 and I64. Lanes that compare true return all 1s, otherwise all 0s. --- interpreter/exec/eval_numeric.ml | 30 ++++++++++++++++++++++++++++ interpreter/exec/simd.ml | 21 ++++++++++++++++++++ interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 30 ++++++++++++++++++++++++++++ interpreter/text/lexer.mll | 34 ++++++++++++++++++++++++++++++++ 5 files changed, 116 insertions(+) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 2327741dd6..45f69e1de7 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -146,6 +146,16 @@ struct let binop (op : binop) = let f = match op with + | I8x16 Eq -> SXX.I8x16.eq + | I8x16 Ne -> SXX.I8x16.ne + | I8x16 LtS -> SXX.I8x16.lt_s + | I8x16 LtU -> SXX.I8x16.lt_u + | I8x16 LeS -> SXX.I8x16.le_s + | I8x16 LeU -> SXX.I8x16.le_u + | I8x16 GtS -> SXX.I8x16.gt_s + | I8x16 GtU -> SXX.I8x16.gt_u + | I8x16 GeS -> SXX.I8x16.ge_s + | I8x16 GeU -> SXX.I8x16.ge_u | I8x16 Add -> SXX.I8x16.add | I8x16 Sub -> SXX.I8x16.sub | I8x16 MinS -> SXX.I8x16.min_s @@ -153,6 +163,16 @@ struct | I8x16 MaxS -> SXX.I8x16.max_s | I8x16 MaxU -> SXX.I8x16.max_u | I8x16 AvgrU -> SXX.I8x16.avgr_u + | I16x8 Eq -> SXX.I16x8.eq + | I16x8 Ne -> SXX.I16x8.ne + | I16x8 LtS -> SXX.I16x8.lt_s + | I16x8 LtU -> SXX.I16x8.lt_u + | I16x8 LeS -> SXX.I16x8.le_s + | I16x8 LeU -> SXX.I16x8.le_u + | I16x8 GtS -> SXX.I16x8.gt_s + | I16x8 GtU -> SXX.I16x8.gt_u + | I16x8 GeS -> SXX.I16x8.ge_s + | I16x8 GeU -> SXX.I16x8.ge_u | I16x8 Add -> SXX.I16x8.add | I16x8 Sub -> SXX.I16x8.sub | I16x8 Mul -> SXX.I16x8.mul @@ -168,6 +188,16 @@ struct | I32x4 MaxS -> SXX.I32x4.max_s | I32x4 MaxU -> SXX.I32x4.max_u | I32x4 Mul -> SXX.I32x4.mul + | I32x4 Eq -> SXX.I32x4.eq + | I32x4 Ne -> SXX.I32x4.ne + | I32x4 LtS -> SXX.I32x4.lt_s + | I32x4 LtU -> SXX.I32x4.lt_u + | I32x4 LeS -> SXX.I32x4.le_s + | I32x4 LeU -> SXX.I32x4.le_u + | I32x4 GtS -> SXX.I32x4.gt_s + | I32x4 GtU -> SXX.I32x4.gt_u + | I32x4 GeS -> SXX.I32x4.ge_s + | I32x4 GeU -> SXX.I32x4.ge_u | I64x2 Add -> SXX.I64x2.add | I64x2 Sub -> SXX.I64x2.sub | I64x2 Mul -> SXX.I64x2.mul diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 2a8ed39667..c25d290325 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -48,6 +48,16 @@ sig val splat : lane -> t val extract_lane : int -> t -> lane + val eq : t -> t -> t + val ne : t -> t -> t + val lt_s : t -> t -> t + val lt_u : t -> t -> t + val le_s : t -> t -> t + val le_u : t -> t -> t + val gt_s : t -> t -> t + val gt_u : t -> t -> t + val ge_s : t -> t -> t + val ge_u : t -> t -> t val abs : t -> t val neg : t -> t val add : t -> t -> t @@ -184,6 +194,17 @@ struct let extract_lane i s = List.nth (Convert.to_shape s) i let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero + let eq = binop (cmp Int.eq) + let ne = binop (cmp Int.ne) + let lt_s = binop (cmp Int.lt_s) + let lt_u = binop (cmp Int.lt_u) + let le_s = binop (cmp Int.le_s) + let le_u = binop (cmp Int.le_u) + let gt_s = binop (cmp Int.gt_s) + let gt_u = binop (cmp Int.gt_u) + let ge_s = binop (cmp Int.ge_s) + let ge_u = binop (cmp Int.ge_u) let abs = unop Int.abs let neg = unop Int.neg let add = binop Int.add diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index a539951bc2..2609376339 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -50,6 +50,7 @@ module SimdOp = struct type iunop = Abs | Neg type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU + | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU type funop = Abs | Neg | Sqrt type fbinop = Add | Sub | Mul | Div | Min | Max type vunop = Not diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 89fc7552f9..442b257985 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -225,6 +225,16 @@ let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) +let i8x16_eq = Binary (V128 V128Op.(I8x16 Eq)) +let i8x16_ne = Binary (V128 V128Op.(I8x16 Ne)) +let i8x16_lt_s = Binary (V128 V128Op.(I8x16 LtS)) +let i8x16_lt_u = Binary (V128 V128Op.(I8x16 LtU)) +let i8x16_le_s = Binary (V128 V128Op.(I8x16 LeS)) +let i8x16_le_u = Binary (V128 V128Op.(I8x16 LeU)) +let i8x16_gt_s = Binary (V128 V128Op.(I8x16 GtS)) +let i8x16_gt_u = Binary (V128 V128Op.(I8x16 GtU)) +let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) +let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) @@ -240,6 +250,16 @@ let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) +let i16x8_eq = Binary (V128 V128Op.(I16x8 Eq)) +let i16x8_ne = Binary (V128 V128Op.(I16x8 Ne)) +let i16x8_lt_s = Binary (V128 V128Op.(I16x8 LtS)) +let i16x8_lt_u = Binary (V128 V128Op.(I16x8 LtU)) +let i16x8_le_s = Binary (V128 V128Op.(I16x8 LeS)) +let i16x8_le_u = Binary (V128 V128Op.(I16x8 LeU)) +let i16x8_gt_s = Binary (V128 V128Op.(I16x8 GtS)) +let i16x8_gt_u = Binary (V128 V128Op.(I16x8 GtU)) +let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) +let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) @@ -257,6 +277,16 @@ let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) let i32x4_splat = Convert (V128 (V128Op.I32x4 V128Op.Splat)) let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) +let i32x4_eq = Binary (V128 V128Op.(I32x4 Eq)) +let i32x4_ne = Binary (V128 V128Op.(I32x4 Ne)) +let i32x4_lt_s = Binary (V128 V128Op.(I32x4 LtS)) +let i32x4_lt_u = Binary (V128 V128Op.(I32x4 LtU)) +let i32x4_le_s = Binary (V128 V128Op.(I32x4 LeS)) +let i32x4_le_u = Binary (V128 V128Op.(I32x4 LeU)) +let i32x4_gt_s = Binary (V128 V128Op.(I32x4 GtS)) +let i32x4_gt_u = Binary (V128 V128Op.(I32x4 GtU)) +let i32x4_ge_s = Binary (V128 V128Op.(I32x4 GeS)) +let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 81ba7210f1..de07c3aa45 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -126,6 +126,10 @@ let simd_shape = function let only shapes s lexbuf = if not (List.mem s shapes) then error lexbuf "unknown operator" + +let except shapes s lexbuf = + if (List.mem s shapes) then + error lexbuf "unknown operator" } let sign = '+' | '-' @@ -414,6 +418,36 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } + | (simd_shape as s)".eq" + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq unreachable unreachable unreachable) } + | (simd_shape as s)".ne" + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne unreachable unreachable unreachable) } + | (simd_int_shape as s)".lt_s" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s unreachable) } + | (simd_int_shape as s)".lt_u" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } + | (simd_int_shape as s)".le_s" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s unreachable) } + | (simd_int_shape as s)".le_u" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } + | (simd_int_shape as s)".gt_s" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s unreachable) } + | (simd_int_shape as s)".gt_u" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } + | (simd_int_shape as s)".ge_s" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s unreachable) } + | (simd_int_shape as s)".ge_u" + { except ["i64x2"] s lexbuf; + BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } | vxxx".not" { UNARY v128_not } | vxxx".and" { UNARY v128_and } | vxxx".andnot" { UNARY v128_andnot } From da8e2605761ca551993a442ab216acb2aa3b6fd6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 10:01:58 -0700 Subject: [PATCH 183/378] Implement SIMD float comparisons (#276) f32x4, f64x2 eq, ne, lt, le, gt, ge. Similar to integer comparisons, this is implemented with the Binary ast node. --- interpreter/exec/eval_numeric.ml | 12 ++++++++++++ interpreter/exec/simd.ml | 14 ++++++++++++++ interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 12 ++++++++++++ interpreter/text/lexer.mll | 12 ++++++++---- 5 files changed, 47 insertions(+), 4 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 45f69e1de7..ea46bd711c 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -201,12 +201,24 @@ struct | I64x2 Add -> SXX.I64x2.add | I64x2 Sub -> SXX.I64x2.sub | I64x2 Mul -> SXX.I64x2.mul + | F32x4 Eq -> SXX.F32x4.eq + | F32x4 Ne -> SXX.F32x4.ne + | F32x4 Lt -> SXX.F32x4.lt + | F32x4 Le -> SXX.F32x4.le + | F32x4 Gt -> SXX.F32x4.gt + | F32x4 Ge -> SXX.F32x4.ge | F32x4 Add -> SXX.F32x4.add | F32x4 Sub -> SXX.F32x4.sub | F32x4 Mul -> SXX.F32x4.mul | F32x4 Div -> SXX.F32x4.div | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max + | F64x2 Eq -> SXX.F64x2.eq + | F64x2 Ne -> SXX.F64x2.ne + | F64x2 Lt -> SXX.F64x2.lt + | F64x2 Le -> SXX.F64x2.le + | F64x2 Gt -> SXX.F64x2.gt + | F64x2 Ge -> SXX.F64x2.ge | F64x2 Add -> SXX.F64x2.add | F64x2 Sub -> SXX.F64x2.sub | F64x2 Mul -> SXX.F64x2.mul diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index c25d290325..96a39b3b0d 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -82,6 +82,12 @@ sig val splat : lane -> t val extract_lane : int -> t -> lane + val eq : t -> t -> t + val ne : t -> t -> t + val lt : t -> t -> t + val le : t -> t -> t + val gt : t -> t -> t + val ge : t -> t -> t val abs : t -> t val neg : t -> t val sqrt : t -> t @@ -169,6 +175,14 @@ struct type lane = Float.t let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let all_ones = Float.of_float (Int64.float_of_bits (Int64.minus_one)) + let cmp f x y = if f x y then all_ones else Float.zero + let eq = binop (cmp Float.eq) + let ne = binop (cmp Float.ne) + let lt = binop (cmp Float.lt) + let le = binop (cmp Float.le) + let gt = binop (cmp Float.gt) + let ge = binop (cmp Float.ge) let abs = unop Float.abs let neg = unop Float.neg let sqrt = unop Float.sqrt diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 2609376339..6ae3d1a7c8 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -53,6 +53,7 @@ struct | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU type funop = Abs | Neg | Sqrt type fbinop = Add | Sub | Mul | Div | Min | Max + | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not type vbinop = And | Or | Xor | AndNot type vtestop = AnyTrue | AllTrue diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 442b257985..fce44c8543 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -311,6 +311,12 @@ let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) +let f32x4_eq = Binary (V128 V128Op.(F32x4 Eq)) +let f32x4_ne = Binary (V128 V128Op.(F32x4 Ne)) +let f32x4_lt = Binary (V128 V128Op.(F32x4 Lt)) +let f32x4_le = Binary (V128 V128Op.(F32x4 Le)) +let f32x4_gt = Binary (V128 V128Op.(F32x4 Gt)) +let f32x4_ge = Binary (V128 V128Op.(F32x4 Ge)) let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) let f32x4_sqrt = Unary (V128 (V128Op.F32x4 V128Op.Sqrt)) @@ -322,6 +328,12 @@ let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) +let f64x2_eq = Binary (V128 V128Op.(F64x2 Eq)) +let f64x2_ne = Binary (V128 V128Op.(F64x2 Ne)) +let f64x2_lt = Binary (V128 V128Op.(F64x2 Lt)) +let f64x2_le = Binary (V128 V128Op.(F64x2 Le)) +let f64x2_gt = Binary (V128 V128Op.(F64x2 Gt)) +let f64x2_ge = Binary (V128 V128Op.(F64x2 Ge)) let f64x2_neg = Unary (V128 (V128Op.F64x2 V128Op.Neg)) let f64x2_sqrt = Unary (V128 (V128Op.F64x2 V128Op.Sqrt)) let f64x2_add = Binary (V128 (V128Op.F64x2 V128Op.Add)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index de07c3aa45..4fc44e1cf5 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -419,11 +419,11 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".eq" - { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq unreachable unreachable unreachable) } + { except ["i64x2"] s lexbuf; + BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq unreachable f32x4_eq f64x2_eq) } | (simd_shape as s)".ne" - { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne unreachable unreachable unreachable) } + { except ["i64x2"] s lexbuf; + BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne unreachable f32x4_ne f64x2_ne) } | (simd_int_shape as s)".lt_s" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s unreachable) } @@ -448,6 +448,10 @@ rule token = parse | (simd_int_shape as s)".ge_u" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } + | (simd_float_shape as s)".lt" { BINARY (simd_float_op s f32x4_lt f64x2_lt) } + | (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) } + | (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) } + | (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) } | vxxx".not" { UNARY v128_not } | vxxx".and" { UNARY v128_and } | vxxx".andnot" { UNARY v128_andnot } From 5d24c2c96213f5e2cc5bafcd8fc810bc20b9ea25 Mon Sep 17 00:00:00 2001 From: Ben Smith Date: Mon, 27 Jul 2020 12:12:09 -0700 Subject: [PATCH 184/378] Setup Travis --- .travis.yml | 2 +- deploy_key.enc | Bin 3248 -> 3360 bytes 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 403e9dc254..d9a461f856 100644 --- a/.travis.yml +++ b/.travis.yml @@ -34,5 +34,5 @@ os: linux env: global: - - ENCRYPTION_LABEL: "304454be9d6c" + - ENCRYPTION_LABEL: "189e52c2c347" - COMMIT_AUTHOR_EMAIL: "noreply@webassembly.org" diff --git a/deploy_key.enc b/deploy_key.enc index b6d3e2f19771652a9711760b1712a77fe1b4e579..36478a13a4ddf2d3232fa41396579b7f334890d5 100644 GIT binary patch literal 3360 zcmV+*4d3#YL@U(+a&!7p1^h?EhwDWCKAec&=GM8;qoO}4$LQ^*@wSF71SCOjIi^7W z8OLaeCwQ&cher8HV2x3DOS{{eHEyB_R^0*h#AmZV0 zm7MXz+nUi24)AhiFp%16$Id;LdIGTY&hQ}%o>58mJYpAr1P7o^L+b0;f6KcT930FrgMq?t;OPzyoT;p56YjJE# zf9vaq%Rv?bOH<7}5Bl|mGD_V?yjBY_OVUIGOG^jPaq)2(11nMhrXxKQHZ_}YM?$Eh zK*3iAsGpqC3^ug?YN=K^w_Hl-#b=8YZ_eNOTEpBf59JzEbs{0yrpLl0#F9Yz&IIf6 zXi6}c<*hX2tcI#2#c~pyg=`eTMI`V5WsyD|GggQ#785Rz+>-M!*Q?gv?o6}pRlCRy zwE!iSM{gaS!y8L>4Rbc&Y3bgp^ahIwF^07PU3|J)Z4Fs`DC?dbvOgVSci8wF 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00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 13:08:03 -0700 Subject: [PATCH 185/378] Fix missing parser non-terminal rule for splat (#280) This got lost in the rebase too, and #277 only partially fixed it. --- interpreter/text/parser.mly | 1 + 1 file changed, 1 insertion(+) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index f7a5e95dd1..2f465eea21 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -374,6 +374,7 @@ plain_instr : | BINARY { fun c -> $1 } | TERNARY { fun c -> $1 } | CONVERT { fun c -> $1 } + | SPLAT { fun c -> $1 } | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } | SHIFT { fun c -> $1 } From 0e85e925e9e702c880aff4b9cfa3faef3919208b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 27 Jul 2020 13:14:26 -0700 Subject: [PATCH 186/378] Set OCaml version to 4.08.1 (#279) The Bytes [0] functions we use require 4.08.1. This should only be set on SIMD repo, since bytes is only used for SIMD implementation. By the time we would like to merge this back into main spec, 4.08.1 should hopefully be widespread enough for us to bump minimum version of OCaml for spec to 4.08.1 too. [0] https://caml.inria.fr/pub/docs/manual-ocaml/libref/Bytes.html see "Binary encoding/decoding of integers" --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index d9a461f856..b61bd58461 100644 --- a/.travis.yml +++ b/.travis.yml @@ -16,7 +16,7 @@ addons: - yarn install: - - opam init --auto-setup --compiler=4.07.1 + - opam init --auto-setup --compiler=4.08.1 - eval $(opam env) - opam --version - ocaml --version From 766d7aac6a6182d6d321282a434e70f59b9cfad2 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 3 Aug 2020 15:29:46 -0700 Subject: [PATCH 187/378] Implement extract lane for the remaining shapes (#281) i8x16, i16x8, i64x2, f64x2. Created a new extractop that is based on v128op. Use extension type to determine signed or unsigned extract (only used for i8x16 and i16x8). --- interpreter/binary/encode.ml | 3 +-- interpreter/exec/eval.ml | 2 +- interpreter/exec/eval_numeric.ml | 14 ++++++++++---- interpreter/exec/int.ml | 11 +++++++++++ interpreter/exec/simd.ml | 6 ++++-- interpreter/script/run.ml | 14 +++++++------- interpreter/syntax/ast.ml | 7 +++++-- interpreter/syntax/operators.ml | 10 ++++++++-- interpreter/text/arrange.ml | 2 +- interpreter/text/lexer.mll | 7 ++++++- interpreter/valid/valid.ml | 27 +++++++++++++++++++++++---- 11 files changed, 77 insertions(+), 26 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 5efb1ecd0d..4530806dad 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -395,8 +395,7 @@ let encode m = | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf | Convert (V128 _) -> failwith "TODO v128" - | ExtractLane (V128Op.I32x4ExtractLane imm) -> failwith "TODO v128" - | ExtractLane (V128Op.F32x4ExtractLane imm) -> failwith "TODO v128" + | SimdExtract _ -> failwith "TODO v128" | SimdShift (_) -> failwith "TODO v128" diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 294f7b0904..ab5dbab3eb 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -270,7 +270,7 @@ let rec step (c : config) : config = (try Eval_numeric.eval_cvtop cvtop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | ExtractLane extractop, v :: vs' -> + | SimdExtract extractop, v :: vs' -> (try Eval_numeric.eval_extractop extractop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index ea46bd711c..5c43da003b 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -247,11 +247,17 @@ struct let relop op = failwith "TODO v128 unimplemented relop" let extractop op v = + let v128 = of_value 1 v in match op with - | F32x4ExtractLane imm -> - (F32Op.to_value (SXX.F32x4.extract_lane imm (of_value 1 v))) - | I32x4ExtractLane imm -> - (I32Op.to_value (SXX.I32x4.extract_lane imm (of_value 1 v))) + | I8x16 (SX, imm) -> (I32Op.to_value (SXX.I8x16.extract_lane_s imm v128)) + | I8x16 (ZX, imm) -> (I32Op.to_value (SXX.I8x16.extract_lane_u imm v128)) + | I16x8 (SX, imm) -> (I32Op.to_value (SXX.I16x8.extract_lane_s imm v128)) + | I16x8 (ZX, imm) -> (I32Op.to_value (SXX.I16x8.extract_lane_u imm v128)) + | I32x4 (_, imm) -> (I32Op.to_value (SXX.I32x4.extract_lane_s imm v128)) + | I64x2 (_, imm) -> (I64Op.to_value (SXX.I64x2.extract_lane_s imm v128)) + | F32x4 (_, imm) -> (F32Op.to_value (SXX.F32x4.extract_lane imm v128)) + | F64x2 (_, imm) -> (F64Op.to_value (SXX.F64x2.extract_lane imm v128)) + | _ -> assert false let ternop op = let f = match op with diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 7b8719344d..9a5db1b430 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -84,6 +84,7 @@ sig val ge_s : t -> t -> bool val ge_u : t -> t -> bool + val as_unsigned : t -> t val of_int_s : int -> t val of_int_u : int -> t val of_string_s : string -> t @@ -245,6 +246,16 @@ struct let ge_s x y = x >= y let ge_u x y = cmp_u x (>=) y + (* + * When Int is used to store a smaller int, it is stored in signed extended + * form. Some instructions require the unsigned form, which requires masking + * away the top 32-bitwidth bits. + *) + let as_unsigned x = + (* Mask with bottom #bitwidth bits set *) + let mask = Rep.(shift_right_logical minus_one (32 - Rep.bitwidth)) in + Rep.logand x mask + let of_int_s = Rep.of_int let of_int_u i = and_ (Rep.of_int i) (or_ (shl (Rep.of_int max_int) one) one) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 96a39b3b0d..ed546122cd 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -47,7 +47,8 @@ sig type lane val splat : lane -> t - val extract_lane : int -> t -> lane + val extract_lane_s : int -> t -> lane + val extract_lane_u : int -> t -> lane val eq : t -> t -> t val ne : t -> t -> t val lt_s : t -> t -> t @@ -205,7 +206,8 @@ struct type t = Rep.t type lane = Int.t let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) - let extract_lane i s = List.nth (Convert.to_shape s) i + let extract_lane_s i s = List.nth (Convert.to_shape s) i + let extract_lane_u i s = Int.as_unsigned (extract_lane_s i s) let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index f6417241e7..e85a21df0b 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -378,25 +378,25 @@ let assert_result at got expect = | I8x16, V128 v -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 16 (fun i -> I32 (V128.I8x16.extract_lane i v))) + (List.init 16 (fun i -> I32 (V128.I8x16.extract_lane_s i v))) vs | I16x8, V128 v -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 8 (fun i -> I32 (V128.I16x8.extract_lane i v))) + (List.init 8 (fun i -> I32 (V128.I16x8.extract_lane_s i v))) vs | I32x4, V128 v -> - let l0 = I32 (V128.I32x4.extract_lane 0 v) in - let l1 = I32 (V128.I32x4.extract_lane 1 v) in - let l2 = I32 (V128.I32x4.extract_lane 2 v) in - let l3 = I32 (V128.I32x4.extract_lane 3 v) in + let l0 = I32 (V128.I32x4.extract_lane_s 0 v) in + let l1 = I32 (V128.I32x4.extract_lane_s 1 v) in + let l2 = I32 (V128.I32x4.extract_lane_s 2 v) in + let l3 = I32 (V128.I32x4.extract_lane_s 3 v) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs | I64x2, V128 v -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 2 (fun i -> I64 (V128.I64x2.extract_lane i v))) + (List.init 2 (fun i -> I64 (V128.I64x2.extract_lane_s i v))) vs | F32x4, V128 v -> let l0 = F32 (V128.F32x4.extract_lane 0 v) in diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 6ae3d1a7c8..0ef0499d9d 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -74,7 +74,10 @@ struct type relop = TodoRelOp type vcvtop = Splat type cvtop = (vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop) v128op - type extractop = I32x4ExtractLane of int | F32x4ExtractLane of int + type extract = + extension (* used for extracting I8 and I16 *) + * int (* lane index *) + type extractop = (extract, extract, extract, extract, extract, extract, extract) v128op type shift = Shl | ShrS | ShrU type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op end @@ -140,7 +143,7 @@ and instr' = | Binary of binop (* binary numeric operator *) | Ternary of ternop (* ternary numeric operator *) | Convert of cvtop (* conversion *) - | ExtractLane of extractop (* extract lane from v128 value *) + | SimdExtract of extractop (* extract lane from v128 value *) | SimdShift of shiftop (* shifts for v128 value *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index fce44c8543..f2932c1762 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -225,6 +225,8 @@ let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) +let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) +let i8x16_extract_lane_u imm = SimdExtract (V128Op.I8x16 (ZX, imm)) let i8x16_eq = Binary (V128 V128Op.(I8x16 Eq)) let i8x16_ne = Binary (V128 V128Op.(I8x16 Ne)) let i8x16_lt_s = Binary (V128 V128Op.(I8x16 LtS)) @@ -250,6 +252,8 @@ let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) +let i16x8_extract_lane_s imm = SimdExtract (V128Op.I16x8 (SX, imm)) +let i16x8_extract_lane_u imm = SimdExtract (V128Op.I16x8 (ZX, imm)) let i16x8_eq = Binary (V128 V128Op.(I16x8 Eq)) let i16x8_ne = Binary (V128 V128Op.(I16x8 Ne)) let i16x8_lt_s = Binary (V128 V128Op.(I16x8 LtS)) @@ -276,7 +280,7 @@ let i16x8_max_u = Binary (V128 (V128Op.I16x8 V128Op.MaxU)) let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) let i32x4_splat = Convert (V128 (V128Op.I32x4 V128Op.Splat)) -let i32x4_extract_lane imm = ExtractLane (V128Op.I32x4ExtractLane imm) +let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) let i32x4_eq = Binary (V128 V128Op.(I32x4 Eq)) let i32x4_ne = Binary (V128 V128Op.(I32x4 Ne)) let i32x4_lt_s = Binary (V128 V128Op.(I32x4 LtS)) @@ -302,6 +306,7 @@ let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) let i64x2_splat = Convert (V128 (V128Op.I64x2 V128Op.Splat)) +let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) @@ -310,7 +315,7 @@ let i64x2_shl = SimdShift V128Op.(I64x2 Shl) let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) -let f32x4_extract_lane imm = ExtractLane (V128Op.F32x4ExtractLane imm) +let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) let f32x4_eq = Binary (V128 V128Op.(F32x4 Eq)) let f32x4_ne = Binary (V128 V128Op.(F32x4 Ne)) let f32x4_lt = Binary (V128 V128Op.(F32x4 Lt)) @@ -328,6 +333,7 @@ let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) +let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) let f64x2_eq = Binary (V128 V128Op.(F64x2 Eq)) let f64x2_ne = Binary (V128 V128Op.(F64x2 Ne)) let f64x2_lt = Binary (V128 V128Op.(F64x2 Lt)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 3107ff5bbb..42c9e29d73 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -280,7 +280,7 @@ let rec instr e = | Binary op -> binop op, [] | Ternary op -> failwith "TODO v128 ternary op" | Convert op -> cvtop op, [] - | ExtractLane op -> failwith "TODO v128" + | SimdExtract op -> failwith "TODO v128" | SimdShift op -> failwith "TODO v128" in Node (head, inner) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 4fc44e1cf5..b1fdecbf0b 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -254,7 +254,12 @@ rule token = parse | (simd_shape as s)".extract_lane" { EXTRACT_LANE (fun imm -> simdop s unimplemented_simd unimplemented_simd i32x4_extract_lane - unimplemented_simd f32x4_extract_lane unimplemented_simd imm) } + i64x2_extract_lane f32x4_extract_lane f64x2_extract_lane imm) } + | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) + { EXTRACT_LANE (fun imm -> + if t = "i8x16" + then ext s i8x16_extract_lane_s i8x16_extract_lane_u imm + else ext s i16x8_extract_lane_s i16x8_extract_lane_u imm )} | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index f7caa72d84..a79ef60f63 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -145,6 +145,14 @@ let type_cvtop at = function | V128 Splat -> error at "invalid conversion" ), V128Type +let type_extract_lane = function + | V128Op.I8x16 _ -> I32Type + | V128Op.I16x8 _ -> I32Type + | V128Op.I32x4 _ -> I32Type + | V128Op.I64x2 _ -> I64Type + | V128Op.F32x4 _ -> F32Type + | V128Op.F64x2 _ -> F64Type + | V128Op.V128 _ -> V128Type (* Expressions *) @@ -169,6 +177,16 @@ let check_memop (c : context) (memop : 'a memop) get_sz at = require (1 lsl memop.align <= size) at "alignment must not be larger than natural" +let check_simd_lane_idx op at = + let max, idx = match op with + | V128Op.I8x16 (_, idx) -> 16, idx + | V128Op.I16x8 (_, idx) -> 8, idx + | V128Op.I32x4 (_, idx) -> 4, idx + | V128Op.I64x2 (_, idx) -> 2, idx + | V128Op.F32x4 (_, idx) -> 4, idx + | V128Op.F64x2 (_, idx) -> 2, idx + | V128Op.V128 (_, idx) -> 1, idx + in require (idx < max) at "invalid lane index" (* * Conventions: @@ -313,10 +331,11 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = let t1, t2 = type_cvtop e.at cvtop in [t1] --> [t2] - | ExtractLane (V128Op.I32x4ExtractLane _) -> - [V128Type] --> [I32Type] - | ExtractLane (V128Op.F32x4ExtractLane _) -> - [V128Type] --> [F32Type] + | SimdExtract (V128Op.V128 _) -> assert false + | SimdExtract extractop -> + check_simd_lane_idx extractop e.at; + let t = type_extract_lane extractop in + [V128Type] --> [t] | SimdShift _ -> [V128Type; I32Type] --> [V128Type] From 2bab880e0a7cb9397411865b6e98f8699b2fc46d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 3 Aug 2020 16:10:22 -0700 Subject: [PATCH 188/378] Implement v128 load and store (#282) --- interpreter/runtime/memory.ml | 31 +++++++++++++++++-------------- interpreter/syntax/operators.ml | 2 ++ interpreter/text/lexer.mll | 12 ++++++++---- 3 files changed, 27 insertions(+), 18 deletions(-) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 9e278d10b8..2c9f198f33 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -97,23 +97,26 @@ let storen mem a o n x = in loop (effective_address a o) n x let load_value mem a o t = - let n = loadn mem a o (Types.size t) in match t with - | I32Type -> I32 (Int64.to_int32 n) - | I64Type -> I64 n - | F32Type -> F32 (F32.of_bits (Int64.to_int32 n)) - | F64Type -> F64 (F64.of_bits n) - | V128Type -> failwith "TODO v128" + | V128Type -> + V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.size t))) + | _ -> + let n = loadn mem a o (Types.size t) in + match t with + | I32Type -> I32 (Int64.to_int32 n) + | I64Type -> I64 n + | F32Type -> F32 (F32.of_bits (Int64.to_int32 n)) + | F64Type -> F64 (F64.of_bits n) + | _ -> assert false let store_value mem a o v = - let x = - match v with - | I32 x -> Int64.of_int32 x - | I64 x -> x - | F32 x -> Int64.of_int32 (F32.to_bits x) - | F64 x -> F64.to_bits x - | V128 x -> failwith "TODO v128" (* FIXME V128.to_bits x requires store to accept something other than int64 *) - in storen mem a o (Types.size (Values.type_of v)) x + let store = storen mem a o (Types.size (Values.type_of v)) in + match v with + | I32 x -> store (Int64.of_int32 x) + | I64 x -> store x + | F32 x -> store (Int64.of_int32 (F32.to_bits x)) + | F64 x -> store (F64.to_bits x) + | V128 x -> store_bytes mem (effective_address a o) (V128.to_bits x) let extend x n = function | ZX -> x diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index f2932c1762..edefcc2240 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -217,6 +217,8 @@ let memory_size = MemorySize let memory_grow = MemoryGrow (* SIMD *) +let v128_load align offset = Load {ty = V128Type; align; offset; sz = None} +let v128_store align offset = Store {ty = V128Type; align; offset; sz = None} let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) let v128_andnot = Binary (V128 (V128Op.V128 V128Op.AndNot)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b1fdecbf0b..2abcad98a4 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -65,12 +65,13 @@ let floatop t f32 f64 = | "f64" -> f64 | _ -> assert false -let numop t i32 i64 f32 f64 = +let numop t i32 i64 f32 f64 v128 = match t with | "i32" -> i32 | "i64" -> i64 | "f32" -> f32 | "f64" -> f64 + | "v128" -> v128 | _ -> assert false let unimplemented_simd = fun _ -> failwith "unimplemented simd" @@ -220,7 +221,8 @@ rule token = parse (fun s -> let n = F32.of_string s.it in f32_const (n @@ s.at), Values.F32 n) (fun s -> let n = F64.of_string s.it in - f64_const (n @@ s.at), Values.F64 n)) + f64_const (n @@ s.at), Values.F64 n) + unimplemented_simd) } | "funcref" { FUNCREF } | "mut" { MUT } @@ -263,11 +265,13 @@ rule token = parse | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) - (f32_load (opt a 2)) (f64_load (opt a 3)) o) } + (f32_load (opt a 2)) (f64_load (opt a 3)) + (v128_load (opt a 4)) o) } | (nxx as t)".store" { STORE (fun a o -> numop t (i32_store (opt a 2)) (i64_store (opt a 3)) - (f32_store (opt a 2)) (f64_store (opt a 3)) o) } + (f32_store (opt a 2)) (f64_store (opt a 3)) + (v128_store (opt a 4)) o) } | (ixx as t)".load"(mem_size as sz)"_"(sign as s) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; LOAD (fun a o -> From c75ca82c083120f1a13715120ffe8449fd9e380f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 3 Aug 2020 21:32:21 -0700 Subject: [PATCH 189/378] Implement v8x16.swizzle (#283) Decided to cheat a little bit, and squeeze v8x16.swizzle into the i8x16 ast node, so that we don't have to create a new v8x16 data type. Semantically it means the same thing, v8x16 is called that way since it doesn't treat the underlying data as any particular type, so treating it as int will work too. --- interpreter/exec/eval_numeric.ml | 1 + interpreter/exec/simd.ml | 16 ++++++++++++++++ interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 2 ++ interpreter/text/lexer.mll | 1 + 5 files changed, 21 insertions(+) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 5c43da003b..7acef3a554 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -146,6 +146,7 @@ struct let binop (op : binop) = let f = match op with + | I8x16 Swizzle -> SXX.V8x16.swizzle | I8x16 Eq -> SXX.I8x16.eq | I8x16 Ne -> SXX.I8x16.ne | I8x16 LtS -> SXX.I8x16.lt_s diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index ed546122cd..3ebb139dbf 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -133,6 +133,9 @@ sig module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t module V128 : Vec with type t = t + module V8x16 : sig + val swizzle : t -> t -> t + end end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -245,6 +248,19 @@ struct unop (fun a -> Int.shr_s a shift) v end + module V8x16 = struct + let swizzle value index = + let vs = Rep.to_i8x16 value in + let is = Rep.to_i8x16 index in + let select i = + Option.( + value + (bind (Int32.unsigned_to_int i) (List.nth_opt vs)) + ~default:Int32.zero) + in + Rep.of_i8x16 (List.map select is) + end + module I8x16 = MakeInt (I8) (struct let to_shape = Rep.to_i8x16 let of_shape = Rep.of_i8x16 diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 0ef0499d9d..35f5541641 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -51,6 +51,7 @@ struct type iunop = Abs | Neg type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU + | Swizzle type funop = Abs | Neg | Sqrt type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index edefcc2240..9a40aaf2f4 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -226,6 +226,8 @@ let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) +let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) + let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) let i8x16_extract_lane_u imm = SimdExtract (V128Op.I8x16 (ZX, imm)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 2abcad98a4..cd53e87f6f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -461,6 +461,7 @@ rule token = parse | (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) } | (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) } | (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) } + | "v8x16.swizzle" { BINARY v8x16_swizzle } | vxxx".not" { UNARY v128_not } | vxxx".and" { UNARY v128_and } | vxxx".andnot" { UNARY v128_andnot } From 686463e55fb85d536b632f75a57cf2a61bede233 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 4 Aug 2020 11:13:11 -0700 Subject: [PATCH 190/378] Implement i32x4 trunc sat and f32x4 convert (#285) --- interpreter/exec/eval_numeric.ml | 4 ++++ interpreter/exec/simd.ml | 19 +++++++++++++++++++ interpreter/syntax/ast.ml | 4 ++-- interpreter/syntax/operators.ml | 4 ++++ interpreter/text/lexer.mll | 4 ++++ 5 files changed, 33 insertions(+), 2 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7acef3a554..890e0fdd56 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -134,10 +134,14 @@ struct | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) + | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_f32x4_s (of_value 1 v)) + | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_f32x4_u (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) + | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) + | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 3ebb139dbf..5b5737e0af 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -136,6 +136,14 @@ sig module V8x16 : sig val swizzle : t -> t -> t end + module I32x4_convert : sig + val trunc_f32x4_s : t -> t + val trunc_f32x4_u : t -> t + end + module F32x4_convert : sig + val convert_i32x4_s : t -> t + val convert_i32x4_u : t -> t + end end module Make (Rep : RepType) : S with type bits = Rep.t = @@ -297,4 +305,15 @@ struct let num_lanes = lanes F64x2 end) + module I32x4_convert = struct + let convert_using f v = Rep.of_i32x4 (List.map f (Rep.to_f32x4 v)) + let trunc_f32x4_s = convert_using I32_convert.trunc_f32_s + let trunc_f32x4_u = convert_using I32_convert.trunc_f32_u + end + + module F32x4_convert = struct + let convert_using f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) + let convert_i32x4_s = convert_using F32_convert.convert_i32_s + let convert_i32x4_u = convert_using F32_convert.convert_i32_u + end end diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 35f5541641..2bafde58cd 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -48,11 +48,11 @@ end (* FIXME *) module SimdOp = struct - type iunop = Abs | Neg + type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle - type funop = Abs | Neg | Sqrt + type funop = Abs | Neg | Sqrt | ConvertI32x4S | ConvertI32x4U type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 9a40aaf2f4..53b2fdd0cb 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -308,6 +308,8 @@ let i32x4_min_u = Binary (V128 (V128Op.I32x4 V128Op.MinU)) let i32x4_max_s = Binary (V128 (V128Op.I32x4 V128Op.MaxS)) let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) +let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) +let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) let i64x2_splat = Convert (V128 (V128Op.I64x2 V128Op.Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) @@ -335,6 +337,8 @@ let f32x4_mul = Binary (V128 (V128Op.F32x4 V128Op.Mul)) let f32x4_div = Binary (V128 (V128Op.F32x4 V128Op.Div)) let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) +let f32x4_convert_i32x4_s = Unary (V128 V128Op.(F32x4 ConvertI32x4S)) +let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index cd53e87f6f..5a89518ef2 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -509,6 +509,10 @@ rule token = parse | (simd_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } + | "i32x4.trunc_sat_f32x4_"(sign as s) + { UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } + | "f32x4.convert_i32x4_"(sign as s) + { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From 377390a069c30f9099b0755231360a09da114dc1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 5 Aug 2020 13:33:09 -0700 Subject: [PATCH 191/378] Implement replace_lane for all shapes (#288) The error messages don't match the tests yet (simd_lane.wast), that still needs to be worked out in #287. --- interpreter/binary/encode.ml | 2 ++ interpreter/exec/eval.ml | 4 ++++ interpreter/exec/eval_numeric.ml | 12 ++++++++++++ interpreter/exec/eval_numeric.mli | 1 + interpreter/exec/simd.ml | 18 ++++++++++++++---- interpreter/syntax/ast.ml | 3 +++ interpreter/syntax/operators.ml | 6 ++++++ interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 +++ interpreter/text/parser.mly | 4 +++- interpreter/valid/valid.ml | 8 ++++++-- 11 files changed, 55 insertions(+), 7 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 4530806dad..49648913a2 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -397,6 +397,8 @@ let encode m = | SimdExtract _ -> failwith "TODO v128" + | SimdReplace _ -> failwith "TODO v128" + | SimdShift (_) -> failwith "TODO v128" let const c = diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index ab5dbab3eb..e7ab76dcbb 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -274,6 +274,10 @@ let rec step (c : config) : config = (try Eval_numeric.eval_extractop extractop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdReplace replaceop, r :: v :: vs' -> + (try Eval_numeric.eval_replaceop replaceop v r :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdShift shiftop, s :: v :: vs' -> (try Eval_numeric.eval_shiftop shiftop v s :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 890e0fdd56..cc41fb7914 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -264,6 +264,17 @@ struct | F64x2 (_, imm) -> (F64Op.to_value (SXX.F64x2.extract_lane imm v128)) | _ -> assert false + let replaceop op v (r : Values.value) = + let v128 = of_value 1 v in + match op, r with + | I8x16 imm, I32 r -> to_value (SXX.I8x16.replace_lane imm v128 r) + | I16x8 imm, I32 r -> to_value (SXX.I16x8.replace_lane imm v128 r) + | I32x4 imm, I32 r -> to_value (SXX.I32x4.replace_lane imm v128 r) + | I64x2 imm, I64 r -> to_value (SXX.I64x2.replace_lane imm v128 r) + | F32x4 imm, F32 r -> to_value (SXX.F32x4.replace_lane imm v128 r) + | F64x2 imm, F64 r -> to_value (SXX.F64x2.replace_lane imm v128 r) + | _ -> assert false + let ternop op = let f = match op with | Bitselect -> SXX.V128.bitselect @@ -373,6 +384,7 @@ struct end let eval_extractop extractop v = V128Op.extractop extractop v +let eval_replaceop replaceop = V128Op.replaceop replaceop let eval_ternop ternop v = V128Op.ternop ternop v let eval_shiftop shiftop v = V128Op.shiftop shiftop v diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index 2073db11ba..9dd85005cd 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -8,5 +8,6 @@ val eval_testop : Ast.testop -> value -> bool val eval_relop : Ast.relop -> value -> value -> bool val eval_cvtop : Ast.cvtop -> value -> value val eval_extractop : Ast.extractop -> value -> value +val eval_replaceop : Ast.replaceop -> value -> value -> value val eval_ternop : Ast.ternop -> value -> value -> value -> value val eval_shiftop : Ast.shiftop -> value -> value -> value diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 5b5737e0af..e1b7594065 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -49,6 +49,7 @@ sig val splat : lane -> t val extract_lane_s : int -> t -> lane val extract_lane_u : int -> t -> lane + val replace_lane : int -> t -> lane -> t val eq : t -> t -> t val ne : t -> t -> t val lt_s : t -> t -> t @@ -83,6 +84,7 @@ sig val splat : lane -> t val extract_lane : int -> t -> lane + val replace_lane : int -> t -> lane -> t val eq : t -> t -> t val ne : t -> t -> t val lt : t -> t -> t @@ -186,7 +188,13 @@ struct type t = Rep.t type lane = Float.t let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) + let unopi f x = Convert.of_shape (List.mapi f (Convert.to_shape x)) let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + + let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) + let extract_lane i s = List.nth (Convert.to_shape s) i + let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v + let all_ones = Float.of_float (Int64.float_of_bits (Int64.minus_one)) let cmp f x y = if f x y then all_ones else Float.zero let eq = binop (cmp Float.eq) @@ -204,8 +212,6 @@ struct let div = binop Float.div let min = binop Float.min let max = binop Float.max - let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) - let extract_lane i s = List.nth (Convert.to_shape s) i end module MakeInt (Int : Int.S) (Convert : sig @@ -216,11 +222,15 @@ struct struct type t = Rep.t type lane = Int.t + let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) + let unopi f x = Convert.of_shape (List.mapi f (Convert.to_shape x)) + let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) let extract_lane_s i s = List.nth (Convert.to_shape s) i let extract_lane_u i s = Int.as_unsigned (extract_lane_s i s) - let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) - let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) + let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v + let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero let eq = binop (cmp Int.eq) let ne = binop (cmp Int.ne) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 2bafde58cd..bda6e749a9 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -79,6 +79,7 @@ struct extension (* used for extracting I8 and I16 *) * int (* lane index *) type extractop = (extract, extract, extract, extract, extract, extract, extract) v128op + type replaceop = (int, int, int, int, int, int, int) v128op type shift = Shl | ShrS | ShrU type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op end @@ -95,6 +96,7 @@ type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop, V128Op.te type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop, V128Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) Values.op type extractop = V128Op.extractop +type replaceop = V128Op.replaceop (* Ternary operators only exist for V128 types for now *) type ternop = V128Op.ternop type shiftop = V128Op.shiftop @@ -145,6 +147,7 @@ and instr' = | Ternary of ternop (* ternary numeric operator *) | Convert of cvtop (* conversion *) | SimdExtract of extractop (* extract lane from v128 value *) + | SimdReplace of replaceop (* replace lane of v128 value *) | SimdShift of shiftop (* shifts for v128 value *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 53b2fdd0cb..9c4e96bbb2 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -231,6 +231,7 @@ let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) let i8x16_extract_lane_u imm = SimdExtract (V128Op.I8x16 (ZX, imm)) +let i8x16_replace_lane imm = SimdReplace (V128Op.I8x16 imm) let i8x16_eq = Binary (V128 V128Op.(I8x16 Eq)) let i8x16_ne = Binary (V128 V128Op.(I8x16 Ne)) let i8x16_lt_s = Binary (V128 V128Op.(I8x16 LtS)) @@ -258,6 +259,7 @@ let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) let i16x8_extract_lane_s imm = SimdExtract (V128Op.I16x8 (SX, imm)) let i16x8_extract_lane_u imm = SimdExtract (V128Op.I16x8 (ZX, imm)) +let i16x8_replace_lane imm = SimdReplace (V128Op.I16x8 imm) let i16x8_eq = Binary (V128 V128Op.(I16x8 Eq)) let i16x8_ne = Binary (V128 V128Op.(I16x8 Ne)) let i16x8_lt_s = Binary (V128 V128Op.(I16x8 LtS)) @@ -285,6 +287,7 @@ let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) let i32x4_splat = Convert (V128 (V128Op.I32x4 V128Op.Splat)) let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) +let i32x4_replace_lane imm = SimdReplace (V128Op.I32x4 imm) let i32x4_eq = Binary (V128 V128Op.(I32x4 Eq)) let i32x4_ne = Binary (V128 V128Op.(I32x4 Ne)) let i32x4_lt_s = Binary (V128 V128Op.(I32x4 LtS)) @@ -313,6 +316,7 @@ let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) let i64x2_splat = Convert (V128 (V128Op.I64x2 V128Op.Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) +let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) @@ -322,6 +326,7 @@ let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) +let f32x4_replace_lane imm = SimdReplace (V128Op.F32x4 imm) let f32x4_eq = Binary (V128 V128Op.(F32x4 Eq)) let f32x4_ne = Binary (V128 V128Op.(F32x4 Ne)) let f32x4_lt = Binary (V128 V128Op.(F32x4 Lt)) @@ -342,6 +347,7 @@ let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) +let f64x2_replace_lane imm = SimdReplace (V128Op.F64x2 imm) let f64x2_eq = Binary (V128 V128Op.(F64x2 Eq)) let f64x2_ne = Binary (V128 V128Op.(F64x2 Ne)) let f64x2_lt = Binary (V128 V128Op.(F64x2 Lt)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 42c9e29d73..78b357294f 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -281,6 +281,7 @@ let rec instr e = | Ternary op -> failwith "TODO v128 ternary op" | Convert op -> cvtop op, [] | SimdExtract op -> failwith "TODO v128" + | SimdReplace op -> failwith "TODO v128" | SimdShift op -> failwith "TODO v128" in Node (head, inner) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 5a89518ef2..9ea75905b5 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -262,6 +262,9 @@ rule token = parse if t = "i8x16" then ext s i8x16_extract_lane_s i8x16_extract_lane_u imm else ext s i16x8_extract_lane_s i16x8_extract_lane_u imm )} + | (simd_shape as s)".replace_lane" + { REPLACE_LANE (simdop s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane + i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 2f465eea21..46e46f07de 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -184,7 +184,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT -%token SPLAT EXTRACT_LANE SHIFT +%token SPLAT EXTRACT_LANE REPLACE_LANE SHIFT %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL @@ -213,6 +213,7 @@ let inline_type_explicit (c : context) x ft at = %token Memory.offset -> Ast.instr'> LOAD %token SPLAT %token Ast.instr'> EXTRACT_LANE +%token Ast.instr'> REPLACE_LANE %token Memory.offset -> Ast.instr'> STORE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT @@ -376,6 +377,7 @@ plain_instr : | CONVERT { fun c -> $1 } | SPLAT { fun c -> $1 } | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } + | REPLACE_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } | SHIFT { fun c -> $1 } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index a79ef60f63..111ec8f694 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -145,7 +145,7 @@ let type_cvtop at = function | V128 Splat -> error at "invalid conversion" ), V128Type -let type_extract_lane = function +let type_simd_lane = function | V128Op.I8x16 _ -> I32Type | V128Op.I16x8 _ -> I32Type | V128Op.I32x4 _ -> I32Type @@ -334,9 +334,13 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = | SimdExtract (V128Op.V128 _) -> assert false | SimdExtract extractop -> check_simd_lane_idx extractop e.at; - let t = type_extract_lane extractop in + let t = type_simd_lane extractop in [V128Type] --> [t] + | SimdReplace replaceop -> + let t = type_simd_lane replaceop in + [V128Type; t] --> [V128Type] + | SimdShift _ -> [V128Type; I32Type] --> [V128Type] From d51c5158411873688481cbc1b126111573a45709 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 6 Aug 2020 09:35:30 -0700 Subject: [PATCH 192/378] Update lane index errors (#289) - lane indices are u8 (nats), negative values are now parse errors ("unexpected token"), as are values with a positive sign +0x1 - changed a bunch of "expected i8 literal" to "unexpected token", in order to differentiate these syntax errors we probably need to change the parser to match on a bunch of EXTRACT_LANE - some "type mismatch" are now unexpected token Fixed #287 --- test/core/simd/simd_lane.wast | 158 ++++++++++++++++------------------ 1 file changed, 76 insertions(+), 82 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 6cbbeebba1..6781a57995 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -393,35 +393,38 @@ (v128.const i64x2 01_234_567_890_123_456_789_0 0x0_1234_5678_90AB_cdef)) (v128.const i32x4 0xeb1f_0ad2 0xab54_a98c 0x90ab_cdef 0x1234_5678)) +;; Syntax errors for negative values + +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))") "unexpected token") + ;; Malformed lane index value -(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -1 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u 256 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane -1 (v128.const i32x4 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i32) (i32x4.extract_lane 256 (v128.const i32x4 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane -1 (v128.const f32x4 0 0 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result f32) (f32x4.extract_lane 256 (v128.const f32x4 0 0 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -1 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (i8x16.replace_lane 256 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane -1 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (i16x8.replace_lane 256 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane -1 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (i32x4.replace_lane 256 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -1 (v128.const f32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (f32x4.replace_lane 256 (v128.const f32x4 0 0 0 0) (i32.const 1)))") "malformed lane index") -(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane -1 (v128.const i64x2 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result i64) (i64x2.extract_lane 256 (v128.const i64x2 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane -1 (v128.const f64x2 0 0)))") "malformed lane index") (assert_malformed (module quote "(func (result f64) (f64x2.extract_lane 256 (v128.const f64x2 0 0)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane -1 (v128.const i64x2 0 0) (i64.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (i64x2.replace_lane 256 (v128.const i64x2 0 0) (i64.const 1)))") "malformed lane index") -(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane -1 (v128.const f64x2 0 0) (f64.const 1)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) (f64x2.replace_lane 256 (v128.const f64x2 0 0) (f64.const 1)))") "malformed lane index") ;; Invalid lane index value @@ -568,43 +571,34 @@ ;; Pass params as the lane index -(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_s (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_u (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_s (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_u (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result i32) (i32x4.extract_lane (local.get 0) (v128.const i32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result f32) (f32x4.extract_lane (local.get 0) (v128.const f32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (i8x16.replace_lane (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (i16x8.replace_lane (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (i32x4.replace_lane (local.get 0) (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (f32x4.replace_lane (local.get 0) (v128.const f32x4 0 0 0 0) (f32.const 1.0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param v128) (result v128) " - "(v8x16.shuffle (local.get 0) " - "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") - -(assert_malformed (module quote "(func (param i32) (result i64) (i64x2.extract_lane (local.get 0) (v128.const i64x2 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result f64) (f64x2.extract_lane (local.get 0) (v128.const f64x2 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (i64x2.replace_lane (local.get 0) (v128.const i64x2 0 0) (i64.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (param i32) (result v128) (f64x2.replace_lane (local.get 0) (v128.const f64x2 0 0) (f64.const 1.0)))") "expected i8 literal") +(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_s (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result i32) (i8x16.extract_lane_u (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_s (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result i32) (i16x8.extract_lane_u (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result i32) (i32x4.extract_lane (local.get 0) (v128.const i32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result f32) (f32x4.extract_lane (local.get 0) (v128.const f32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (i8x16.replace_lane (local.get 0) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (i16x8.replace_lane (local.get 0) (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (i32x4.replace_lane (local.get 0) (v128.const i32x4 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (f32x4.replace_lane (local.get 0) (v128.const f32x4 0 0 0 0) (f32.const 1.0)))") "unexpected token") + +(assert_malformed (module quote "(func (param i32) (result i64) (i64x2.extract_lane (local.get 0) (v128.const i64x2 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result f64) (f64x2.extract_lane (local.get 0) (v128.const f64x2 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (i64x2.replace_lane (local.get 0) (v128.const i64x2 0 0) (i64.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (param i32) (result v128) (f64x2.replace_lane (local.get 0) (v128.const f64x2 0 0) (f64.const 1.0)))") "unexpected token") ;; Pass non-literal as the lane index -(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u nan (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane nan (v128.const i32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane nan (v128.const f32x4 0 0 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -2.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane nan (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane inf (v128.const i32x4 0 0 0 0) (i32.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -inf (v128.const f32x4 0 0 0 0) (f32.const 1.1)))") "expected i8 literal") - -(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane nan (v128.const i64x2 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result f64) (f64x2.extract_lane nan (v128.const f64x2 0 0)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (i64x2.replace_lane inf (v128.const i64x2 0 0) (i64.const 1)))") "expected i8 literal") -(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane -inf (v128.const f64x2 0 0) (f64.const 1.1)))") "expected i8 literal") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u nan (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_s inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i16x8.extract_lane_u -inf (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i32) (i32x4.extract_lane nan (v128.const i32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane nan (v128.const f32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane -2.5 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane nan (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane inf (v128.const i32x4 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -inf (v128.const f32x4 0 0 0 0) (f32.const 1.1)))") "unexpected token") ;; v8x16.shuffle expects a 16-byte literals as first argument (assert_malformed (module quote "(func (result v128) " @@ -882,29 +876,29 @@ (assert_return (invoke "as-local_set-value-1" (v128.const i64x2 -1 -1)) (i64.const -1)) (assert_return (invoke "as-global_set-value-3" (v128.const f64x2 0 0)(f64.const 3.14)) (v128.const f64x2 3.14 0)) +;; Non-nat lane index + +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_u +0x0f (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result f32) (f32x4.extract_lane +03 (v128.const f32x4 0 0 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result i64) (i64x2.extract_lane +1 (v128.const i64x2 0 0)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i8x16.replace_lane +015 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i16x8.replace_lane +0x7 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (i32x4.replace_lane +3 (v128.const i32x4 0 0 0 0) (i32.const 1)))") "unexpected token") +(assert_malformed (module quote "(func (result v128) (f64x2.replace_lane +0x01 (v128.const f64x2 0 0) (f64.const 1.0)))") "unexpected token") + ;; Lane index literal (module (func (result i32) (i8x16.extract_lane_s 0x0f (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) -(module (func (result i32) (i8x16.extract_lane_u +0x0f (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))) (module (func (result i32) (i16x8.extract_lane_s 0x07 (v128.const i16x8 0 0 0 0 0 0 0 0)))) (module (func (result i32) (i16x8.extract_lane_u 0x0_7 (v128.const i16x8 0 0 0 0 0 0 0 0)))) (module (func (result i32) (i32x4.extract_lane 03 (v128.const i32x4 0 0 0 0)))) -(module (func (result f32) (f32x4.extract_lane +03 (v128.const f32x4 0 0 0 0)))) -(module (func (result i64) (i64x2.extract_lane +1 (v128.const i64x2 0 0)))) (module (func (result f64) (f64x2.extract_lane 0x1 (v128.const f64x2 0 0)))) -(module (func (result v128) (i8x16.replace_lane +015 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1)))) -(module (func (result v128) (i16x8.replace_lane +0x7 (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1)))) -(module (func (result v128) (i32x4.replace_lane +3 (v128.const i32x4 0 0 0 0) (i32.const 1)))) (module (func (result v128) (f32x4.replace_lane 0x3 (v128.const f32x4 0 0 0 0) (f32.const 1.0)))) (module (func (result v128) (i64x2.replace_lane 01 (v128.const i64x2 0 0) (i64.const 1)))) -(module (func (result v128) (f64x2.replace_lane +0x01 (v128.const f64x2 0 0) (f64.const 1.0)))) -(module (func (result v128) (v8x16.shuffle 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f - (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))) -) ;; 1.0 is malformed lane index -(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "malformed lane index") +(assert_malformed (module quote "(func (result i32) (i8x16.extract_lane_s 1.0 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unexpected token") ;; Test operation with empty argument @@ -914,7 +908,7 @@ " (i8x16.extract_lane_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -930,7 +924,7 @@ " (i8x16.extract_lane_s)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -938,7 +932,7 @@ " (i16x8.extract_lane_u (v128.const i16x8 0 0 0 0 0 0 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -954,7 +948,7 @@ " (i16x8.extract_lane_u)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -962,7 +956,7 @@ " (i32x4.extract_lane (v128.const i32x4 0 0 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -978,7 +972,7 @@ " (i32x4.extract_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -986,7 +980,7 @@ " (i64x2.extract_lane (v128.const i64x2 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1002,7 +996,7 @@ " (i64x2.extract_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1010,7 +1004,7 @@ " (f32x4.extract_lane (v128.const f32x4 0 0 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1026,7 +1020,7 @@ " (f32x4.extract_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1034,7 +1028,7 @@ " (f64x2.extract_lane (v128.const f64x2 0 0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1050,7 +1044,7 @@ " (f64x2.extract_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1058,7 +1052,7 @@ " (i8x16.replace_lane (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (i32.const 1))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1082,7 +1076,7 @@ " (i8x16.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1090,7 +1084,7 @@ " (i16x8.replace_lane (v128.const i16x8 0 0 0 0 0 0 0 0) (i32.const 1))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1114,7 +1108,7 @@ " (i16x8.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1122,7 +1116,7 @@ " (i32x4.replace_lane (v128.const i32x4 0 0 0 0) (i32.const 1))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1146,7 +1140,7 @@ " (i32x4.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1154,7 +1148,7 @@ " (f32x4.replace_lane (v128.const f32x4 0 0 0 0) (f32.const 1.0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1178,7 +1172,7 @@ " (f32x4.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1186,7 +1180,7 @@ " (i64x2.replace_lane (v128.const i64x2 0 0) (i64.const 1))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module @@ -1210,7 +1204,7 @@ " (i64x2.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1218,7 +1212,7 @@ " (f64x2.replace_lane (v128.const f64x2 0 0) (f64.const 1.0))" ")" ) - "type mismatch" + "unexpected token" ) (assert_invalid (module From 34262048b0e010dcacb067c2d8866e42cfd1df67 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 10 Aug 2020 11:14:31 -0700 Subject: [PATCH 193/378] Fix SIMD trunc sat (#295) It was incorrectly using the non-saturing versions, leading to runtime traps. --- interpreter/exec/eval_numeric.ml | 4 ++-- interpreter/exec/simd.ml | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index cc41fb7914..6d71cf2220 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -134,8 +134,8 @@ struct | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) - | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_f32x4_s (of_value 1 v)) - | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_f32x4_u (of_value 1 v)) + | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) + | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index e1b7594065..0cb9aad86c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -139,8 +139,8 @@ sig val swizzle : t -> t -> t end module I32x4_convert : sig - val trunc_f32x4_s : t -> t - val trunc_f32x4_u : t -> t + val trunc_sat_f32x4_s : t -> t + val trunc_sat_f32x4_u : t -> t end module F32x4_convert : sig val convert_i32x4_s : t -> t @@ -317,8 +317,8 @@ struct module I32x4_convert = struct let convert_using f v = Rep.of_i32x4 (List.map f (Rep.to_f32x4 v)) - let trunc_f32x4_s = convert_using I32_convert.trunc_f32_s - let trunc_f32x4_u = convert_using I32_convert.trunc_f32_u + let trunc_sat_f32x4_s = convert_using I32_convert.trunc_sat_f32_s + let trunc_sat_f32x4_u = convert_using I32_convert.trunc_sat_f32_u end module F32x4_convert = struct From 44e9f896f9e7392686dfca5314f4475c42f40fde Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 12 Aug 2020 11:20:14 -0700 Subject: [PATCH 194/378] Validate lane index (#291) * Extract lane, parse error for i8x16 and i16x8 * Parse error if simd lane index cannot fit in u8 * Validate lane index in extract and replace --- interpreter/text/lexer.mll | 3 ++- interpreter/text/parser.mly | 10 ++++++++-- interpreter/valid/valid.ml | 29 ++++++++++++++++++----------- 3 files changed, 28 insertions(+), 14 deletions(-) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 9ea75905b5..b5d374ffd6 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -254,7 +254,8 @@ rule token = parse { SPLAT (simdop s i8x16_splat i16x8_splat i32x4_splat i64x2_splat f32x4_splat f64x2_splat) } | (simd_shape as s)".extract_lane" - { EXTRACT_LANE (fun imm -> + { except ["i8x16"; "i16x8"] s lexbuf; + EXTRACT_LANE (fun imm -> simdop s unimplemented_simd unimplemented_simd i32x4_extract_lane i64x2_extract_lane f32x4_extract_lane f64x2_extract_lane imm) } | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 46e46f07de..26bd1b9230 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -65,6 +65,12 @@ let simd_lane_lit shape l at = | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at +let simd_lane_index s at = + try + let n = int_of_string s in + if n >= 0 && n < 256 then n else raise (Failure "") + with Failure _ -> error at "malformed lane index" + let nanop f nan = let open Source in let open Values in @@ -376,8 +382,8 @@ plain_instr : | TERNARY { fun c -> $1 } | CONVERT { fun c -> $1 } | SPLAT { fun c -> $1 } - | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } - | REPLACE_LANE NAT { let at = at () in fun c -> $1 (nat $2 at) } + | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } + | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | SHIFT { fun c -> $1 } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 111ec8f694..7513bedf4c 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -177,16 +177,22 @@ let check_memop (c : context) (memop : 'a memop) get_sz at = require (1 lsl memop.align <= size) at "alignment must not be larger than natural" -let check_simd_lane_idx op at = - let max, idx = match op with - | V128Op.I8x16 (_, idx) -> 16, idx - | V128Op.I16x8 (_, idx) -> 8, idx - | V128Op.I32x4 (_, idx) -> 4, idx - | V128Op.I64x2 (_, idx) -> 2, idx - | V128Op.F32x4 (_, idx) -> 4, idx - | V128Op.F64x2 (_, idx) -> 2, idx - | V128Op.V128 (_, idx) -> 1, idx - in require (idx < max) at "invalid lane index" +let check_simd_lane_index get_lane op at = + let max, op' = match op with + | V128Op.I8x16 op' -> 16, op' + | V128Op.I16x8 op' -> 8, op' + | V128Op.I32x4 op' -> 4, op' + | V128Op.I64x2 op' -> 2, op' + | V128Op.F32x4 op' -> 4, op' + | V128Op.F64x2 op' -> 2, op' + | V128Op.V128 op' -> assert false + in require (get_lane op' < max) at "invalid lane index" + +let check_simd_extract_lane_index op at = + check_simd_lane_index snd op at + +let check_simd_replace_lane_index op at = + check_simd_lane_index Fun.id op at (* * Conventions: @@ -333,11 +339,12 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = | SimdExtract (V128Op.V128 _) -> assert false | SimdExtract extractop -> - check_simd_lane_idx extractop e.at; + check_simd_extract_lane_index extractop e.at; let t = type_simd_lane extractop in [V128Type] --> [t] | SimdReplace replaceop -> + check_simd_replace_lane_index replaceop e.at; let t = type_simd_lane replaceop in [V128Type; t] --> [V128Type] From 1f035fcc597ac4039914fede71860b771d11943e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 12 Aug 2020 11:47:10 -0700 Subject: [PATCH 195/378] Implement shuffle (#292) --- interpreter/exec/eval_numeric.ml | 1 + interpreter/exec/simd.ml | 7 +++++++ interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 1 + interpreter/text/lexer.mll | 1 + interpreter/text/parser.mly | 8 +++++++- interpreter/valid/valid.ml | 7 +++++++ 7 files changed, 25 insertions(+), 2 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 6d71cf2220..3e3ee9bde2 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -151,6 +151,7 @@ struct let binop (op : binop) = let f = match op with | I8x16 Swizzle -> SXX.V8x16.swizzle + | I8x16 (Shuffle imms) -> fun a b -> SXX.V8x16.shuffle a b imms | I8x16 Eq -> SXX.I8x16.eq | I8x16 Ne -> SXX.I8x16.ne | I8x16 LtS -> SXX.I8x16.lt_s diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 0cb9aad86c..1b9b047074 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -137,6 +137,7 @@ sig module V128 : Vec with type t = t module V8x16 : sig val swizzle : t -> t -> t + val shuffle : t -> t -> int list -> t end module I32x4_convert : sig val trunc_sat_f32x4_s : t -> t @@ -277,6 +278,12 @@ struct ~default:Int32.zero) in Rep.of_i8x16 (List.map select is) + let shuffle x y imms = + let xs = Rep.to_i8x16 x in + let ys = Rep.to_i8x16 y in + let joined = List.append xs ys in + let result = List.map (fun i -> List.nth joined i) imms in + Rep.of_i8x16 result end module I8x16 = MakeInt (I8) (struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index bda6e749a9..ec227afe6e 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -51,7 +51,7 @@ struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU - | Swizzle + | Swizzle | Shuffle of int list type funop = Abs | Neg | Sqrt | ConvertI32x4S | ConvertI32x4U type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 9c4e96bbb2..77396f258b 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -227,6 +227,7 @@ let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) +let v8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b5d374ffd6..1dd78e9bf7 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -466,6 +466,7 @@ rule token = parse | (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) } | (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) } | "v8x16.swizzle" { BINARY v8x16_swizzle } + | "v8x16.shuffle" { SHUFFLE } | vxxx".not" { UNARY v128_not } | vxxx".and" { UNARY v128_and } | vxxx".andnot" { UNARY v128_andnot } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 26bd1b9230..e0f4b9b2c6 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -71,6 +71,11 @@ let simd_lane_index s at = if n >= 0 && n < 256 then n else raise (Failure "") with Failure _ -> error at "malformed lane index" +let shuffle_literal ss at = + if not (List.length ss = 16) then + error at "invalid lane length"; + List.map (fun s -> simd_lane_index s.it s.at) ss + let nanop f nan = let open Source in let open Values in @@ -190,7 +195,7 @@ let inline_type_explicit (c : context) x ft at = %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT -%token SPLAT EXTRACT_LANE REPLACE_LANE SHIFT +%token SPLAT EXTRACT_LANE REPLACE_LANE SHIFT SHUFFLE %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL @@ -385,6 +390,7 @@ plain_instr : | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | SHIFT { fun c -> $1 } + | SHUFFLE literal_list { let at = at () in fun c -> v8x16_shuffle (shuffle_literal $2 at) } call_instr : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 7513bedf4c..0e2300646e 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -165,6 +165,12 @@ let check_unop unop at = check_pack sz (Values.type_of unop) at | _ -> () +let check_binop binop at = + match binop with + | Values.V128 V128Op.(I8x16 (Shuffle imms)) -> + if List.for_all ((>) 32) imms then () else error at "invalid lane index" + | _ -> () + let check_memop (c : context) (memop : 'a memop) get_sz at = ignore (memory c (0l @@ at)); let size = @@ -326,6 +332,7 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = [t] --> [t] | Binary binop -> + check_binop binop e.at; let t = type_binop binop in [t; t] --> [t] From 49eda2ad647034c8ed43a83b51ab1966e6ddfa7f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 12 Aug 2020 13:17:44 -0700 Subject: [PATCH 196/378] Fix some of the shuffle related error messages (#299) - some test cases were not written in the correct text format - no more "expected i8 literal", it is now "malformed lane index" - "v8x16.shuffle (v128.const)" is parsed as shuffle with no literals, so the error is "invalid lane length" --- test/core/simd/simd_lane.wast | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 6781a57995..f8bffd2d7b 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -513,14 +513,10 @@ ;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 (assert_malformed (module quote "(func (param v128) (result v128)" - "local.get 0" - "local.get 0" - "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14)") + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (local.get 0) (local.get 0)))") "invalid lane length") (assert_malformed (module quote "(func (param v128) (result v128)" - "local.get 0" - "local.get 0" - "v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16)") + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (local.get 0) (local.get 0)))") "invalid lane length") (assert_malformed (module quote "(func (result v128)" "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1" @@ -604,27 +600,27 @@ (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "invalid lane length") (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15.0) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle 0.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle -inf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 inf) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " "(v8x16.shuffle nan 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " - "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "expected i8 literal") + "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") ;; Combination with each other @@ -1236,7 +1232,7 @@ " (f64x2.replace_lane)" ")" ) - "type mismatch" + "unexpected token" ) (assert_malformed (module quote @@ -1247,7 +1243,7 @@ " )" ")" ) - "type mismatch" + "invalid lane length" ) (assert_invalid (module @@ -1265,5 +1261,5 @@ " (v8x16.shuffle)" ")" ) - "type mismatch" + "invalid lane length" ) From 3abad5dd33286b02005dd4700df8f58e1b5dae34 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 13 Aug 2020 09:34:52 -0700 Subject: [PATCH 197/378] Implement SIMD narrow and widen (#296) * Implement SIMD narrow and widen These are the operations implemented: - i8x16.narrow_i16x8_s(a: v128, b: v128) -> v128 - i8x16.narrow_i16x8_u(a: v128, b: v128) -> v128 - i16x8.narrow_i32x4_s(a: v128, b: v128) -> v128 - i16x8.narrow_i32x4_u(a: v128, b: v128) -> v128 - i16x8.widen_low_i8x16_s(a: v128) -> v128 - i16x8.widen_high_i8x16_s(a: v128) -> v128 - i16x8.widen_low_i8x16_u(a: v128) -> v128 - i16x8.widen_high_i8x16_u(a: v128) -> v128 - i32x4.widen_low_i16x8_s(a: v128) -> v128 - i32x4.widen_high_i16x8_s(a: v128) -> v128 - i32x4.widen_low_i16x8_u(a: v128) -> v128 - i32x4.widen_high_i16x8_u(a: v128) -> v128 This now passes test/core/simd/simd_conversions.wast. * Fix formatting and ordering of definitions * Apply suggestions from code review - Remove unnecessary parens - use 0xffl for int32 - inline the masks Co-authored-by: Andreas Rossberg * Have widen take a mask instead of function * Pass param as int32 to avoid conversions * Remove _using suffix Co-authored-by: Andreas Rossberg --- interpreter/exec/eval_numeric.ml | 12 +++++++ interpreter/exec/simd.ml | 61 ++++++++++++++++++++++++++++---- interpreter/syntax/ast.ml | 3 +- interpreter/syntax/operators.ml | 12 +++++++ interpreter/text/lexer.mll | 13 +++++++ 5 files changed, 94 insertions(+), 7 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 3e3ee9bde2..b313d53c4d 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -132,8 +132,16 @@ struct | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) + | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v)) + | I16x8 WidenHighS -> to_value (SXX.I16x8_convert.widen_high_s (of_value 1 v)) + | I16x8 WidenLowU -> to_value (SXX.I16x8_convert.widen_low_u (of_value 1 v)) + | I16x8 WidenHighU -> to_value (SXX.I16x8_convert.widen_high_u (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) + | I32x4 WidenLowS -> to_value (SXX.I32x4_convert.widen_low_s (of_value 1 v)) + | I32x4 WidenHighS -> to_value (SXX.I32x4_convert.widen_high_s (of_value 1 v)) + | I32x4 WidenLowU -> to_value (SXX.I32x4_convert.widen_low_u (of_value 1 v)) + | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) @@ -162,6 +170,8 @@ struct | I8x16 GtU -> SXX.I8x16.gt_u | I8x16 GeS -> SXX.I8x16.ge_s | I8x16 GeU -> SXX.I8x16.ge_u + | I8x16 NarrowS -> SXX.I8x16_convert.narrow_s + | I8x16 NarrowU -> SXX.I8x16_convert.narrow_u | I8x16 Add -> SXX.I8x16.add | I8x16 Sub -> SXX.I8x16.sub | I8x16 MinS -> SXX.I8x16.min_s @@ -179,6 +189,8 @@ struct | I16x8 GtU -> SXX.I16x8.gt_u | I16x8 GeS -> SXX.I16x8.ge_s | I16x8 GeU -> SXX.I16x8.ge_u + | I16x8 NarrowS -> SXX.I16x8_convert.narrow_s + | I16x8 NarrowU -> SXX.I16x8_convert.narrow_u | I16x8 Add -> SXX.I16x8.add | I16x8 Sub -> SXX.I16x8.sub | I16x8 Mul -> SXX.I16x8.mul diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 1b9b047074..d23d9f043d 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -139,9 +139,25 @@ sig val swizzle : t -> t -> t val shuffle : t -> t -> int list -> t end + module I8x16_convert : sig + val narrow_s : t -> t -> t + val narrow_u : t -> t -> t + end + module I16x8_convert : sig + val narrow_s : t -> t -> t + val narrow_u : t -> t -> t + val widen_low_s : t -> t + val widen_high_s : t -> t + val widen_low_u : t -> t + val widen_high_u : t -> t + end module I32x4_convert : sig val trunc_sat_f32x4_s : t -> t val trunc_sat_f32x4_u : t -> t + val widen_low_s : t -> t + val widen_high_s : t -> t + val widen_low_u : t -> t + val widen_high_u : t -> t end module F32x4_convert : sig val convert_i32x4_s : t -> t @@ -322,15 +338,48 @@ struct let num_lanes = lanes F64x2 end) + let clamp low high x = min (max x low) high + + (* Narrow two v128 into one v128 by using to_shape on both operands, + * concatenating them, clamping the element to between low and high, + * then of_shape to reconstruct a v128. *) + let narrow to_shape of_shape low high x y = + let xy = (to_shape x) @ (to_shape y) in + of_shape (List.map (clamp low high) xy) + + module I8x16_convert = struct + let narrow_s = narrow Rep.to_i16x8 Rep.of_i8x16 (-128l) 127l + let narrow_u = narrow Rep.to_i16x8 Rep.of_i8x16 0l 255l + end + + module I16x8_convert = struct + let narrow_s = narrow Rep.to_i32x4 Rep.of_i16x8 (-32768l) 32767l + let narrow_u = narrow Rep.to_i32x4 Rep.of_i16x8 0l 65535l + + let widen take_or_drop mask x = + Rep.of_i16x8 (List.map (Int32.logand mask) (take_or_drop 8 (Rep.to_i8x16 x))) + let widen_low_s = widen Lib.List.take 0xffffffffl + let widen_high_s = widen Lib.List.drop 0xffffffffl + let widen_low_u = widen Lib.List.take 0xffl + let widen_high_u = widen Lib.List.drop 0xffl + end + module I32x4_convert = struct - let convert_using f v = Rep.of_i32x4 (List.map f (Rep.to_f32x4 v)) - let trunc_sat_f32x4_s = convert_using I32_convert.trunc_sat_f32_s - let trunc_sat_f32x4_u = convert_using I32_convert.trunc_sat_f32_u + let convert f v = Rep.of_i32x4 (List.map f (Rep.to_f32x4 v)) + let trunc_sat_f32x4_s = convert I32_convert.trunc_sat_f32_s + let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u + + let widen take_or_drop mask x = + Rep.of_i32x4 (List.map (Int32.logand mask) (take_or_drop 4 (Rep.to_i16x8 x))) + let widen_low_s = widen Lib.List.take 0xffffffffl + let widen_high_s = widen Lib.List.drop 0xffffffffl + let widen_low_u = widen Lib.List.take 0xffffl + let widen_high_u = widen Lib.List.drop 0xffffl end module F32x4_convert = struct - let convert_using f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) - let convert_i32x4_s = convert_using F32_convert.convert_i32_s - let convert_i32x4_u = convert_using F32_convert.convert_i32_u + let convert f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) + let convert_i32x4_s = convert F32_convert.convert_i32_s + let convert_i32x4_u = convert F32_convert.convert_i32_u end end diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index ec227afe6e..df5ac08265 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -49,9 +49,10 @@ end module SimdOp = struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U + | WidenLowS | WidenLowU | WidenHighS | WidenHighU type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU - | Swizzle | Shuffle of int list + | Swizzle | Shuffle of int list | NarrowS | NarrowU type funop = Abs | Neg | Sqrt | ConvertI32x4S | ConvertI32x4U type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 77396f258b..5741f256fa 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -246,6 +246,12 @@ let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) +let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) +let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) +let i16x8_widen_low_i8x16_s = Unary (V128 V128Op.(I16x8 WidenLowS)) +let i16x8_widen_high_i8x16_s = Unary (V128 V128Op.(I16x8 WidenHighS)) +let i16x8_widen_low_i8x16_u = Unary (V128 V128Op.(I16x8 WidenLowU)) +let i16x8_widen_high_i8x16_u = Unary (V128 V128Op.(I16x8 WidenHighU)) let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) @@ -274,6 +280,8 @@ let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) +let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) +let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) let i16x8_shl = SimdShift V128Op.(I16x8 Shl) let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) @@ -303,6 +311,10 @@ let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) let i32x4_all_true = Test (V128 (V128Op.I32x4 V128Op.AllTrue)) +let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) +let i32x4_widen_high_i16x8_s = Unary (V128 V128Op.(I32x4 WidenHighS)) +let i32x4_widen_low_i16x8_u = Unary (V128 V128Op.(I32x4 WidenLowU)) +let i32x4_widen_high_i16x8_u = Unary (V128 V128Op.(I32x4 WidenHighU)) let i32x4_shl = SimdShift V128Op.(I32x4 Shl) let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 1dd78e9bf7..69155018fd 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -518,6 +518,19 @@ rule token = parse { UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } | "f32x4.convert_i32x4_"(sign as s) { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } + | "i8x16.narrow_i16x8_"(sign as s) + { BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } + | "i16x8.narrow_i32x4_"(sign as s) + { BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } + | "i16x8.widen_low_i8x16_"(sign as s) + { UNARY (ext s i16x8_widen_low_i8x16_s i16x8_widen_low_i8x16_u) } + | "i16x8.widen_high_i8x16_"(sign as s) + { UNARY (ext s i16x8_widen_high_i8x16_s i16x8_widen_high_i8x16_u) } + | "i32x4.widen_low_i16x8_"(sign as s) + { UNARY (ext s i32x4_widen_low_i16x8_s i32x4_widen_low_i16x8_u) } + | "i32x4.widen_high_i16x8_"(sign as s) + { UNARY (ext s i32x4_widen_high_i16x8_s i32x4_widen_high_i16x8_u) } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From b9fcded228470c5943580d32ab7f33b522186b5c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 13 Aug 2020 09:58:02 -0700 Subject: [PATCH 198/378] Clean up lane validation code in parser (#301) --- interpreter/text/parser.mly | 7 +++---- interpreter/valid/valid.ml | 3 ++- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index e0f4b9b2c6..b1a93c00cf 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -66,10 +66,9 @@ let simd_lane_lit shape l at = | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at let simd_lane_index s at = - try - let n = int_of_string s in - if n >= 0 && n < 256 then n else raise (Failure "") - with Failure _ -> error at "malformed lane index" + match int_of_string s with + | n when 0 <= n && n < 256 -> n + | _ | exception Failure _ -> error at "malformed lane index" let shuffle_literal ss at = if not (List.length ss = 16) then diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 0e2300646e..e8273ed175 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -168,7 +168,8 @@ let check_unop unop at = let check_binop binop at = match binop with | Values.V128 V128Op.(I8x16 (Shuffle imms)) -> - if List.for_all ((>) 32) imms then () else error at "invalid lane index" + if List.exists ((<=) 32) imms then + error at "invalid lane index" | _ -> () let check_memop (c : context) (memop : 'a memop) get_sz at = From 06bf5d79c9b776a96655c6447f83e6c00a38d436 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 13 Aug 2020 10:28:25 -0700 Subject: [PATCH 199/378] Implement add_saturate_{sx} and sub_saturate_{sx} (#300) These operations are implemented: - i8x16.add_saturate_s(a: v128, b: v128) -> v128 - i8x16.add_saturate_u(a: v128, b: v128) -> v128 - i16x8.add_saturate_s(a: v128, b: v128) -> v128 - i16x8.add_saturate_u(a: v128, b: v128) -> v128 - i8x16.sub_saturate_s(a: v128, b: v128) -> v128 - i8x16.sub_saturate_u(a: v128, b: v128) -> v128 - i16x8.sub_saturate_s(a: v128, b: v128) -> v128 - i16x8.sub_saturate_u(a: v128, b: v128) -> v128 This passes simd_i8x16_sat_arith.wast and simd_i16x8_sat_arith.wast. --- interpreter/exec/eval_numeric.ml | 8 ++++++++ interpreter/exec/int.ml | 29 +++++++++++++++++++++++++++-- interpreter/exec/simd.ml | 25 ++++++++++++++++--------- interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 8 ++++++++ interpreter/text/lexer.mll | 9 +++++++++ 6 files changed, 69 insertions(+), 11 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index b313d53c4d..b9844c4fbc 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -173,7 +173,11 @@ struct | I8x16 NarrowS -> SXX.I8x16_convert.narrow_s | I8x16 NarrowU -> SXX.I8x16_convert.narrow_u | I8x16 Add -> SXX.I8x16.add + | I8x16 AddSatS -> SXX.I8x16.add_sat_s + | I8x16 AddSatU -> SXX.I8x16.add_sat_u | I8x16 Sub -> SXX.I8x16.sub + | I8x16 SubSatS -> SXX.I8x16.sub_sat_s + | I8x16 SubSatU -> SXX.I8x16.sub_sat_u | I8x16 MinS -> SXX.I8x16.min_s | I8x16 MinU -> SXX.I8x16.min_u | I8x16 MaxS -> SXX.I8x16.max_s @@ -192,7 +196,11 @@ struct | I16x8 NarrowS -> SXX.I16x8_convert.narrow_s | I16x8 NarrowU -> SXX.I16x8_convert.narrow_u | I16x8 Add -> SXX.I16x8.add + | I16x8 AddSatS -> SXX.I16x8.add_sat_s + | I16x8 AddSatU -> SXX.I16x8.add_sat_u | I16x8 Sub -> SXX.I16x8.sub + | I16x8 SubSatS -> SXX.I16x8.sub_sat_s + | I16x8 SubSatU -> SXX.I16x8.sub_sat_u | I16x8 Mul -> SXX.I16x8.mul | I16x8 MinS -> SXX.I16x8.min_s | I16x8 MinU -> SXX.I16x8.min_u diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 17ba48138f..ed264cd21e 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -85,6 +85,15 @@ sig val ge_u : t -> t -> bool val as_unsigned : t -> t + + (* Saturating arithmetic, used for small ints. *) + val saturate_s : t -> t + val saturate_u : t -> t + val add_sat_s : t -> t -> t + val add_sat_u : t -> t -> t + val sub_sat_s : t -> t -> t + val sub_sat_u : t -> t -> t + val of_int_s : int -> t val of_int_u : int -> t val of_string_s : string -> t @@ -248,8 +257,6 @@ struct let ge_s x y = x >= y let ge_u x y = cmp_u x (>=) y - let to_int_s = Rep.to_int - let to_int_u i = Rep.to_int i land (Rep.to_int Rep.max_int lsl 1) lor 1 (* * When Int is used to store a smaller int, it is stored in signed extended * form. Some instructions require the unsigned form, which requires masking @@ -260,6 +267,24 @@ struct let mask = Rep.(shift_right_logical minus_one (32 - Rep.bitwidth)) in Rep.logand x mask + (* We don't override min_int and max_int since those are used + * by other functions (like parsing), and rely on it being + * min/max for int32 *) + (* The smallest signed |bitwidth|-bits int. *) + let low_int = Rep.shift_left Rep.minus_one (Rep.bitwidth - 1) + (* The largest signed |bitwidth|-bits int. *) + let high_int = Rep.logxor low_int Rep.minus_one + let saturate_s x = min (max x low_int) high_int + let saturate_u x = min (max x Rep.zero) (as_unsigned Rep.minus_one) + + let add_sat_s x y = saturate_s (add x y) + let add_sat_u x y = saturate_u (add (as_unsigned x) (as_unsigned y)) + let sub_sat_s x y = saturate_s (sub x y) + let sub_sat_u x y = saturate_u (sub (as_unsigned x) (as_unsigned y)) + + let to_int_s = Rep.to_int + let to_int_u i = Rep.to_int i land (Rep.to_int Rep.max_int lsl 1) lor 1 + let of_int_s = Rep.of_int let of_int_u i = and_ (Rep.of_int i) (or_ (shl (Rep.of_int max_int) one) one) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index d23d9f043d..b216c4a747 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -74,6 +74,10 @@ sig val all_true : t -> bool val shl : t -> I32.t -> t val shr_s : t -> I32.t -> t + val add_sat_s : t -> t -> t + val add_sat_u : t -> t -> t + val sub_sat_s : t -> t -> t + val sub_sat_u : t -> t -> t end (* This signature defines the types and operations SIMD floats can expose. *) @@ -281,6 +285,10 @@ struct let shr_s v s = let shift = Int.of_int_u (Int32.to_int s) in unop (fun a -> Int.shr_s a shift) v + let add_sat_s = binop Int.add_sat_s + let add_sat_u = binop Int.add_sat_u + let sub_sat_s = binop Int.sub_sat_s + let sub_sat_u = binop Int.sub_sat_u end module V8x16 = struct @@ -338,23 +346,21 @@ struct let num_lanes = lanes F64x2 end) - let clamp low high x = min (max x low) high - (* Narrow two v128 into one v128 by using to_shape on both operands, - * concatenating them, clamping the element to between low and high, + * concatenating them, saturating the wider type to the narrower type, * then of_shape to reconstruct a v128. *) - let narrow to_shape of_shape low high x y = + let narrow to_shape of_shape sat_op x y = let xy = (to_shape x) @ (to_shape y) in - of_shape (List.map (clamp low high) xy) + of_shape (List.map sat_op xy) module I8x16_convert = struct - let narrow_s = narrow Rep.to_i16x8 Rep.of_i8x16 (-128l) 127l - let narrow_u = narrow Rep.to_i16x8 Rep.of_i8x16 0l 255l + let narrow_s = narrow Rep.to_i16x8 Rep.of_i8x16 I8.saturate_s + let narrow_u = narrow Rep.to_i16x8 Rep.of_i8x16 I8.saturate_u end module I16x8_convert = struct - let narrow_s = narrow Rep.to_i32x4 Rep.of_i16x8 (-32768l) 32767l - let narrow_u = narrow Rep.to_i32x4 Rep.of_i16x8 0l 65535l + let narrow_s = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_s + let narrow_u = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_u let widen take_or_drop mask x = Rep.of_i16x8 (List.map (Int32.logand mask) (take_or_drop 8 (Rep.to_i8x16 x))) @@ -362,6 +368,7 @@ struct let widen_high_s = widen Lib.List.drop 0xffffffffl let widen_low_u = widen Lib.List.take 0xffl let widen_high_u = widen Lib.List.drop 0xffl + end module I32x4_convert = struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index df5ac08265..a9d0fe1a77 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -53,6 +53,7 @@ struct type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU + | AddSatS | AddSatU | SubSatS | SubSatU type funop = Abs | Neg | Sqrt | ConvertI32x4S | ConvertI32x4U type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 5741f256fa..32327f9fe8 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -255,7 +255,11 @@ let i16x8_widen_high_i8x16_u = Unary (V128 V128Op.(I16x8 WidenHighU)) let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) +let i8x16_add_saturate_s = Binary (V128 V128Op.(I8x16 AddSatS)) +let i8x16_add_saturate_u = Binary (V128 V128Op.(I8x16 AddSatU)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) +let i8x16_sub_saturate_s = Binary (V128 V128Op.(I8x16 SubSatS)) +let i8x16_sub_saturate_u = Binary (V128 V128Op.(I8x16 SubSatU)) let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) let i8x16_min_s = Binary (V128 (V128Op.I8x16 V128Op.MinS)) let i8x16_min_u = Binary (V128 (V128Op.I8x16 V128Op.MinU)) @@ -285,7 +289,11 @@ let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) let i16x8_shl = SimdShift V128Op.(I16x8 Shl) let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) +let i16x8_add_saturate_s = Binary (V128 V128Op.(I16x8 AddSatS)) +let i16x8_add_saturate_u = Binary (V128 V128Op.(I16x8 AddSatU)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) +let i16x8_sub_saturate_s = Binary (V128 V128Op.(I16x8 SubSatS)) +let i16x8_sub_saturate_u = Binary (V128 V128Op.(I16x8 SubSatU)) let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) let i16x8_abs = Unary (V128 (V128Op.I16x8 V128Op.Abs)) let i16x8_min_s = Binary (V128 (V128Op.I16x8 V128Op.MinS)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 69155018fd..27615e60d9 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -531,6 +531,15 @@ rule token = parse | "i32x4.widen_high_i16x8_"(sign as s) { UNARY (ext s i32x4_widen_high_i16x8_s i32x4_widen_high_i16x8_u) } + | "i8x16.add_saturate_"(sign as s) + { BINARY (ext s i8x16_add_saturate_s i8x16_add_saturate_u) } + | "i8x16.sub_saturate_"(sign as s) + { BINARY (ext s i8x16_sub_saturate_s i8x16_sub_saturate_u) } + | "i16x8.add_saturate_"(sign as s) + { BINARY (ext s i16x8_add_saturate_s i16x8_add_saturate_u) } + | "i16x8.sub_saturate_"(sign as s) + { BINARY (ext s i16x8_sub_saturate_s i16x8_sub_saturate_u) } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } From c8be84a4ff30ec15616f02765b4d66d97ab70b33 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 13 Aug 2020 16:29:06 -0700 Subject: [PATCH 200/378] Implement some binary<->text support for SIMD (#298) This is sufficient to pass test/core/simd/simd_i32x4_arith.wast. --- interpreter/binary/decode.ml | 13 ++++ interpreter/binary/encode.ml | 24 ++++---- interpreter/exec/simd.ml | 11 ++++ interpreter/exec/v128.ml | 12 +++- interpreter/text/arrange.ml | 115 +++++++++++++++++++++-------------- test/core/run.py | 13 ++-- 6 files changed, 125 insertions(+), 63 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 4e110c211d..7f67fa74f6 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -102,6 +102,7 @@ let vs33 s = I32_convert.wrap_i64 (vsN 33 s) let vs64 s = vsN 64 s let f32 s = F32.of_bits (u32 s) let f64 s = F64.of_bits (u64 s) +let v128 s = V128.of_bits (get_string (Types.size Types.V128Type) s) let len32 s = let pos = pos s in @@ -138,6 +139,7 @@ let value_type s = | -0x02 -> I64Type | -0x03 -> F32Type | -0x04 -> F64Type + | -0x05 -> V128Type | _ -> error s (pos s - 1) "malformed value type" let elem_type s = @@ -216,6 +218,16 @@ let math_prefix s = | 0x07l -> i64_trunc_sat_f64_u | n -> illegal s pos (I32.to_int_u n) +let simd_prefix s = + let pos = pos s in + match vu32 s with + | 0x0cl -> v128_const (at v128 s) + | 0xa1l -> i32x4_neg + | 0xael -> i32x4_add + | 0xb1l -> i32x4_sub + | 0xb5l -> i32x4_mul + | n -> illegal s pos (I32.to_int_u n) + let rec instr s = let pos = pos s in match op s with @@ -455,6 +467,7 @@ let rec instr s = | 0xc4 -> i64_extend32_s | 0xfc -> math_prefix s + | 0xfd -> simd_prefix s | b -> illegal s pos b diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 7397e6ba5b..57eaf5e2c8 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -129,7 +129,7 @@ let encode m = open Values let op n = u8 n - let simd_op n = op 0xfd; op n + let simd_op n = op 0xfd; vu32 n let end_ () = op 0x0b let memop {align; offset; _} = vu32 (Int32.of_int align); vu32 offset @@ -197,10 +197,8 @@ let encode m = op 0x35; memop mo | Load {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Load {ty = V128Type; sz = None; _} -> - failwith "TODO v128" - | Load {ty = V128Type; sz = Some _; _} -> - failwith "TODO v128" + | Load ({ty = V128Type; _} as mo) -> + simd_op 0x00l; memop mo | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo @@ -213,10 +211,8 @@ let encode m = | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Store {ty = V128Type; sz = None; _} -> - failwith "TODO v128" - | Store {ty = V128Type; sz = Some _; _} -> - failwith "TODO v128" + | Store ({ty = V128Type; _} as mo) -> + simd_op 0x0bl; memop mo | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -225,7 +221,7 @@ let encode m = | Const {it = I64 c; _} -> op 0x42; vs64 c | Const {it = F32 c; _} -> op 0x43; f32 c | Const {it = F64 c; _} -> op 0x44; f64 c - | Const {it = V128 c; _} -> simd_op 0x02; v128 c + | Const {it = V128 c; _} -> simd_op 0x0cl; v128 c | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 @@ -299,7 +295,9 @@ let encode m = | Unary (F64 F64Op.Trunc) -> op 0x9d | Unary (F64 F64Op.Nearest) -> op 0x9e | Unary (F64 F64Op.Sqrt) -> op 0x9f - | Unary (V128 _) -> failwith "TODO v128" + + | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l + | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a | Binary (I32 I32Op.Sub) -> op 0x6b @@ -348,6 +346,10 @@ let encode m = | Binary (F64 F64Op.Min) -> op 0xa4 | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + + | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael + | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l + | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l | Binary (V128 _) -> failwith "TODO v128" | Ternary (_) -> failwith "TODO v128" diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index b216c4a747..b3e24bafc9 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -11,6 +11,14 @@ let lanes shape = | F32x4 -> 4 | F64x2 -> 2 +let string_of_shape = function + | I8x16 -> "i8x16" + | I16x8 -> "i16x8" + | I32x4 -> "i32x4" + | I64x2 -> "i64x2" + | F32x4 -> "f32x4" + | F64x2 -> "f64x2" + module type RepType = sig type t @@ -18,6 +26,7 @@ sig val make : int -> char -> t (* ^ bits_make ? *) val to_string : t -> string + val to_hex_string : t -> string val bytewidth : int val of_strings : shape -> string list -> t @@ -124,6 +133,7 @@ sig type bits val default : t (* FIXME good name for default value? *) val to_string : t -> string + val to_hex_string : t -> string val of_bits : bits -> t val to_bits : t -> bits val of_strings : shape -> string list -> t @@ -176,6 +186,7 @@ struct let default = Rep.make Rep.bytewidth (chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) + let to_hex_string = Rep.to_hex_string let of_bits x = x let to_bits x = x let of_strings = Rep.of_strings diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 944ae2ea4c..f91f08a3bb 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -2,7 +2,6 @@ include Simd.Make (struct include String let bytewidth = 16 - let to_string s = s let to_i8x16 s = List.init 16 (fun i -> (Int32.of_int (Bytes.get_int8 (Bytes.of_string s) i))) @@ -76,4 +75,15 @@ include Simd.Make | Simd.F64x2 -> List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss); Bytes.to_string b + + (* This is needed for generating text format. In the text format, we can specify a shape, + * like "v128.const i8x16", but the binary format does not keep the shape, so we have to + * pick one when converting to text. Arbitrary pick i32x4, and make sure to be consistent. + *) + let to_string s = + let i32x4 = to_i32x4 s in + String.concat " " (List.map I32.to_string_s i32x4) + let to_hex_string s = + let i32x4 = to_i32x4 s in + String.concat " " (List.map I32.to_hex_string i32x4) end) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 78b357294f..4f724e1d10 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -185,38 +185,48 @@ struct end (* FIXME *) -module VectorOp = +module SimdOp = struct - (* TODO - open Ast.FloatOp - *) + open Ast.SimdOp let testop xx = fun _ -> failwith "TODO v128" let relop xx = fun _ -> failwith "TODO v128" - let unop xx = fun _ -> failwith "TODO v128" + let unop xx (op : unop) = match op with + | I32x4 Neg -> "i32x4.neg" + | _ -> failwith "Unimplemented v128 unop" - let binop xx = fun _ -> failwith "TODO v128" + let binop xx (op : binop) = match op with + | I32x4 Add -> "i32x4.add" + | I32x4 Sub -> "i32x4.sub" + | I32x4 Mul -> "i32x4.mul" + | _ -> failwith "Unimplemented v128 unop" let cvtop xx = fun _ -> failwith "TODO v128" end -let oper (intop, floatop, vectop) op = - value_type (type_of op) ^ "." ^ - (match op with - | I32 o -> intop "32" o - | I64 o -> intop "64" o - | F32 o -> floatop "32" o - | F64 o -> floatop "64" o - | V128 o -> vectop "128" o - ) - -let unop = oper (IntOp.unop, FloatOp.unop, VectorOp.unop) -let binop = oper (IntOp.binop, FloatOp.binop, VectorOp.binop) -let testop = oper (IntOp.testop, FloatOp.testop, VectorOp.testop) -let relop = oper (IntOp.relop, FloatOp.relop, VectorOp.relop) -let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, VectorOp.cvtop) +let oper (intop, floatop, simdop) op = + (* v128 operations don't need to be prefixed by the type, + * each instruction will specify their prefix (shape). + *) + let prefix = match op with + | V128 o -> "" + | _ -> value_type (type_of op) ^ "." + in + let ops = match op with + | I32 o -> intop "32" o + | I64 o -> intop "64" o + | F32 o -> floatop "32" o + | F64 o -> floatop "64" o + | V128 o -> simdop "128" o + in prefix ^ ops + +let unop = oper (IntOp.unop, FloatOp.unop, SimdOp.unop) +let binop = oper (IntOp.binop, FloatOp.binop, SimdOp.binop) +let testop = oper (IntOp.testop, FloatOp.testop, SimdOp.testop) +let relop = oper (IntOp.relop, FloatOp.relop, SimdOp.relop) +let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, SimdOp.cvtop) let memop name {ty; align; offset; _} sz = value_type ty ^ "." ^ name ^ @@ -239,7 +249,11 @@ let storeop op = let var x = nat32 x.it let value v = string_of_value v.it -let constop v = value_type (type_of v.it) ^ ".const" +let constop v = + let shape = match v.it with + | V128 _ -> "i32x4 " + | _ -> "" + in value_type (type_of v.it) ^ ".const " ^ shape let block_type = function | VarBlockType x -> [Node ("type " ^ var x, [])] @@ -273,7 +287,7 @@ let rec instr e = | Store op -> storeop op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] - | Const lit -> constop lit ^ " " ^ value lit, [] + | Const lit -> constop lit ^ value lit, [] | Test op -> testop op, [] | Compare op -> relop op, [] | Unary op -> unop op, [] @@ -405,23 +419,20 @@ let module_ = module_with_var_opt None (* Scripts *) +(* Converts a value to string depending on mode. *) let literal mode lit = + let choose_mode bin not_bin = if mode = `Binary then bin else not_bin in match lit.it with - | Values.I32 i -> - let f = if mode = `Binary then I32.to_hex_string else I32.to_string_s in - Node ("i32.const " ^ f i, []) - | Values.I64 i -> - let f = if mode = `Binary then I64.to_hex_string else I64.to_string_s in - Node ("i64.const " ^ f i, []) - | Values.F32 z -> - let f = if mode = `Binary then F32.to_hex_string else F32.to_string in - Node ("f32.const " ^ f z, []) - | Values.F64 z -> - let f = if mode = `Binary then F64.to_hex_string else F64.to_string in - Node ("f64.const " ^ f z, []) - | Values.V128 v -> - let f = if mode = `Binary then (failwith "unimplemented v128 binary mode") else V128.to_string in - Node ("v128.const " ^ f v, []) + | Values.I32 i -> choose_mode I32.to_hex_string I32.to_string_s i + | Values.I64 i -> choose_mode I64.to_hex_string I64.to_string_s i + | Values.F32 z -> choose_mode F32.to_hex_string F32.to_string z + | Values.F64 z -> choose_mode F64.to_hex_string F64.to_string z + | Values.V128 v -> choose_mode V128.to_hex_string V128.to_string v + +(* Converts a literal into a constant instruction. *) +let constant mode lit = + let lit_string = literal mode lit in + Node (constop lit ^ lit_string, []) let definition mode x_opt def = try @@ -454,7 +465,7 @@ let access x_opt n = let action mode act = match act.it with | Invoke (x_opt, name, lits) -> - Node ("invoke" ^ access x_opt name, List.map (literal mode) lits) + Node ("invoke" ^ access x_opt name, List.map (constant mode) lits) | Get (x_opt, name) -> Node ("get" ^ access x_opt name, []) @@ -464,16 +475,30 @@ let nan = function let result_numpat mode res = match res with - | LitPat lit -> literal mode lit + | LitPat lit -> constant mode lit | NanPat nanop -> - match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false - | Values.F32 n -> Node ("f32.const " ^ nan n, []) - | Values.F64 n -> Node ("f64.const " ^ nan n, []) + match nanop.it with + | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false + | Values.F32 n -> Node ("f32.const " ^ nan n, []) + | Values.F64 n -> Node ("f64.const " ^ nan n, []) + +let result_simd mode res shape pats = + (* A different text generation for SIMD, since the literals within + * a SimdResult do not need the i32.const instruction *) + let num_pat mode res = + match res.it with + | LitPat lit -> literal mode lit + | NanPat {it = Values.F32 n; _} + | NanPat {it = Values.F64 n; _} -> nan n + | _ -> assert false + in + let lits = (List.map (num_pat mode) pats) in + let tokens = ["v128.const"; Simd.string_of_shape shape;] @ lits in + Node (String.concat " " tokens, []) let result mode res = match res.it with - | SimdResult _ -> failwith "unimplemented" + | SimdResult (shape, pats) -> result_simd mode res shape pats | NumResult n -> result_numpat mode n.it let assertion mode ass = diff --git a/test/core/run.py b/test/core/run.py index ec07929c4a..51973c4b84 100755 --- a/test/core/run.py +++ b/test/core/run.py @@ -92,12 +92,13 @@ def _runTestFile(self, inputPath): self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, wasm2Path, wast2Path), logPath) self._compareFile(wastPath, wast2Path) - # Convert to JavaScript - jsPath = self._auxFile(outputPath.replace(".wast", ".js")) - logPath = self._auxFile(jsPath + ".log") - self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, inputPath, jsPath), logPath) - if jsCommand != None: - self._runCommand(('%s "%s"') % (jsCommand, jsPath), logPath) + # Convert to JavaScript, SIMD has no JS support at all, so don't generate JS files. + if 'simd' not in outputPath: + jsPath = self._auxFile(outputPath.replace(".wast", ".js")) + logPath = self._auxFile(jsPath + ".log") + self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, inputPath, jsPath), logPath) + if jsCommand != None: + self._runCommand(('%s "%s"') % (jsCommand, jsPath), logPath) if __name__ == "__main__": From 0bed616f415a509da5683ba544170ea78ed09d0e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 14 Aug 2020 12:12:13 -0700 Subject: [PATCH 201/378] Implement binary<->text support for SIMD i8x16 i16x8 i32x4 arithmetic ops (#303) This is sufficient to pass: - test/core/simd/simd_i32x4_arith2.wast - test/core/simd/simd_i8x16_arith.wast - test/core/simd/simd_i8x16_arith2.wast - test/core/simd/simd_i16x8_arith.wast. - test/core/simd/simd_i16x8_arith2.wast --- interpreter/binary/decode.ml | 24 ++++++++++++++++++++++++ interpreter/binary/encode.ml | 24 ++++++++++++++++++++++++ interpreter/text/arrange.ml | 26 +++++++++++++++++++++++++- 3 files changed, 73 insertions(+), 1 deletion(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 7f67fa74f6..eeff751e9a 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -222,10 +222,34 @@ let simd_prefix s = let pos = pos s in match vu32 s with | 0x0cl -> v128_const (at v128 s) + | 0x60l -> i8x16_abs + | 0x61l -> i8x16_neg + | 0x6el -> i8x16_add + | 0x71l -> i8x16_sub + | 0x76l -> i8x16_min_s + | 0x77l -> i8x16_min_u + | 0x78l -> i8x16_max_s + | 0x79l -> i8x16_max_u + | 0x7bl -> i8x16_avgr_u + | 0x80l -> i16x8_abs + | 0x81l -> i16x8_neg + | 0x8el -> i16x8_add + | 0x91l -> i16x8_sub + | 0x95l -> i16x8_mul + | 0x96l -> i16x8_min_s + | 0x97l -> i16x8_min_u + | 0x98l -> i16x8_max_s + | 0x99l -> i16x8_max_u + | 0x9bl -> i16x8_avgr_u + | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg | 0xael -> i32x4_add | 0xb1l -> i32x4_sub | 0xb5l -> i32x4_mul + | 0xb6l -> i32x4_min_s + | 0xb7l -> i32x4_min_u + | 0xb8l -> i32x4_max_s + | 0xb9l -> i32x4_max_u | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 57eaf5e2c8..72087e0b15 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -296,6 +296,11 @@ let encode m = | Unary (F64 F64Op.Nearest) -> op 0x9e | Unary (F64 F64Op.Sqrt) -> op 0x9f + | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l + | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l + | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l + | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l + | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l | Unary (V128 _) -> failwith "unimplemented V128 Unary op" @@ -347,8 +352,27 @@ let encode m = | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + | Binary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el + | Binary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l + | Binary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l + | Binary (V128 V128Op.(I8x16 MinU)) -> simd_op 0x77l + | Binary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l + | Binary (V128 V128Op.(I8x16 MaxU)) -> simd_op 0x79l + | Binary (V128 V128Op.(I8x16 AvgrU)) -> simd_op 0x7bl + | Binary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el + | Binary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l + | Binary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l + | Binary (V128 V128Op.(I16x8 MinS)) -> simd_op 0x96l + | Binary (V128 V128Op.(I16x8 MinU)) -> simd_op 0x97l + | Binary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l + | Binary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l + | Binary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l + | Binary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l + | Binary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l + | Binary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l + | Binary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l | Binary (V128 _) -> failwith "TODO v128" diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 4f724e1d10..b1099f1769 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -194,14 +194,38 @@ struct let relop xx = fun _ -> failwith "TODO v128" let unop xx (op : unop) = match op with + | I8x16 Neg -> "i8x16.neg" + | I8x16 Abs -> "i8x16.abs" + | I16x8 Abs -> "i16x8.abs" + | I16x8 Neg -> "i16x8.neg" + | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with + | I8x16 Add -> "i8x16.add" + | I8x16 Sub -> "i8x16.sub" + | I8x16 MinS -> "i8x16.min_s" + | I8x16 MinU -> "i8x16.min_u" + | I8x16 MaxS -> "i8x16.max_s" + | I8x16 MaxU -> "i8x16.max_u" + | I8x16 AvgrU -> "i8x16.avgr_u" + | I16x8 Add -> "i16x8.add" + | I16x8 Sub -> "i16x8.sub" + | I16x8 Mul -> "i16x8.mul" + | I16x8 MinS -> "i16x8.min_s" + | I16x8 MinU -> "i16x8.min_u" + | I16x8 MaxS -> "i16x8.max_s" + | I16x8 MaxU -> "i16x8.max_u" + | I16x8 AvgrU -> "i16x8.avgr_u" | I32x4 Add -> "i32x4.add" | I32x4 Sub -> "i32x4.sub" | I32x4 Mul -> "i32x4.mul" - | _ -> failwith "Unimplemented v128 unop" + | I32x4 MinS -> "i32x4.min_s" + | I32x4 MinU -> "i32x4.min_u" + | I32x4 MaxS -> "i32x4.max_s" + | I32x4 MaxU -> "i32x4.max_u" + | _ -> failwith "Unimplemented v128 binop" let cvtop xx = fun _ -> failwith "TODO v128" end From 6d60a676031214858d9cdea1d98284d36a7b33f1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 09:16:43 -0700 Subject: [PATCH 202/378] Implement more binary<->text support for SIMD (#304) This is sufficient to pass test/core/simd/simd_i64x2_arith.wast. --- interpreter/binary/decode.ml | 4 ++++ interpreter/binary/encode.ml | 4 ++++ interpreter/text/arrange.ml | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index eeff751e9a..4bea2cc43c 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -250,6 +250,10 @@ let simd_prefix s = | 0xb7l -> i32x4_min_u | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u + | 0xc1l -> i64x2_neg + | 0xcel -> i64x2_add + | 0xd1l -> i64x2_sub + | 0xd5l -> i64x2_mul | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 72087e0b15..2c8c88a97c 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -302,6 +302,7 @@ let encode m = | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l + | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a @@ -374,6 +375,9 @@ let encode m = | Binary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l | Binary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l + | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel + | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l + | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l | Binary (V128 _) -> failwith "TODO v128" | Ternary (_) -> failwith "TODO v128" diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index b1099f1769..29de482ac2 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -200,6 +200,7 @@ struct | I16x8 Neg -> "i16x8.neg" | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" + | I64x2 Neg -> "i64x2.neg" | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with @@ -225,6 +226,9 @@ struct | I32x4 MinU -> "i32x4.min_u" | I32x4 MaxS -> "i32x4.max_s" | I32x4 MaxU -> "i32x4.max_u" + | I64x2 Add -> "i64x2.add" + | I64x2 Sub -> "i64x2.sub" + | I64x2 Mul -> "i64x2.mul" | _ -> failwith "Unimplemented v128 binop" let cvtop xx = fun _ -> failwith "TODO v128" From 25462e6561524fceb42f7ce902ab393b7fb55b54 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 09:42:49 -0700 Subject: [PATCH 203/378] Implement more binary<->text support for SIMD (#305) This is sufficient to pass simd_f32x4.wast, simd_f32x4_arith.wast, and simd_f32x4_cmp.wast. --- interpreter/binary/decode.ml | 16 ++++++++++++++++ interpreter/binary/encode.ml | 15 +++++++++++++++ interpreter/text/arrange.ml | 15 +++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 4bea2cc43c..c7e0b3e047 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -221,7 +221,14 @@ let math_prefix s = let simd_prefix s = let pos = pos s in match vu32 s with + | 0x00l -> let a, o = memop s in v128_load a o | 0x0cl -> v128_const (at v128 s) + | 0x41l -> f32x4_eq + | 0x42l -> f32x4_ne + | 0x43l -> f32x4_lt + | 0x44l -> f32x4_gt + | 0x45l -> f32x4_le + | 0x46l -> f32x4_ge | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg | 0x6el -> i8x16_add @@ -254,6 +261,15 @@ let simd_prefix s = | 0xcel -> i64x2_add | 0xd1l -> i64x2_sub | 0xd5l -> i64x2_mul + | 0xe0l -> f32x4_abs + | 0xe1l -> f32x4_neg + | 0xe3l -> f32x4_sqrt + | 0xe4l -> f32x4_add + | 0xe5l -> f32x4_sub + | 0xe6l -> f32x4_mul + | 0xe7l -> f32x4_div + | 0xe8l -> f32x4_min + | 0xe9l -> f32x4_max | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 2c8c88a97c..d07718d76d 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -303,6 +303,9 @@ let encode m = | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l + | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l + | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l + | Unary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a @@ -378,6 +381,18 @@ let encode m = | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l + | Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l + | Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l + | Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l + | Binary (V128 V128Op.(F32x4 Gt)) -> simd_op 0x44l + | Binary (V128 V128Op.(F32x4 Le)) -> simd_op 0x45l + | Binary (V128 V128Op.(F32x4 Ge)) -> simd_op 0x46l + | Binary (V128 V128Op.(F32x4 Add)) -> simd_op 0xe4l + | Binary (V128 V128Op.(F32x4 Sub)) -> simd_op 0xe5l + | Binary (V128 V128Op.(F32x4 Mul)) -> simd_op 0xe6l + | Binary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l + | Binary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l + | Binary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l | Binary (V128 _) -> failwith "TODO v128" | Ternary (_) -> failwith "TODO v128" diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 29de482ac2..b1bfc3ff98 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -201,6 +201,9 @@ struct | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" | I64x2 Neg -> "i64x2.neg" + | F32x4 Abs -> "f32x4.abs" + | F32x4 Neg -> "f32x4.neg" + | F32x4 Sqrt -> "f32x4.sqrt" | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with @@ -229,6 +232,18 @@ struct | I64x2 Add -> "i64x2.add" | I64x2 Sub -> "i64x2.sub" | I64x2 Mul -> "i64x2.mul" + | F32x4 Eq -> "f32x4.eq" + | F32x4 Ne -> "f32x4.ne" + | F32x4 Lt -> "f32x4.lt" + | F32x4 Le -> "f32x4.le" + | F32x4 Gt -> "f32x4.gt" + | F32x4 Ge -> "f32x4.ge" + | F32x4 Add -> "f32x4.add" + | F32x4 Sub -> "f32x4.sub" + | F32x4 Mul -> "f32x4.mul" + | F32x4 Div -> "f32x4.div" + | F32x4 Min -> "f32x4.min" + | F32x4 Max -> "f32x4.max" | _ -> failwith "Unimplemented v128 binop" let cvtop xx = fun _ -> failwith "TODO v128" From e57649a1a805fb221a32781628bc954f2bc9a935 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 13:56:30 -0700 Subject: [PATCH 204/378] Implement binary<->text support for SIMD f64x2 ops (#308) This is sufficient to pass simd_f64x2.wast, simd_f64x2_arith.wast, and simd_f64x2_cmp.wast. --- interpreter/binary/decode.ml | 15 +++++++++++++++ interpreter/binary/encode.ml | 15 +++++++++++++++ interpreter/text/arrange.ml | 15 +++++++++++++++ 3 files changed, 45 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index c7e0b3e047..d7dccc8c77 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -229,6 +229,12 @@ let simd_prefix s = | 0x44l -> f32x4_gt | 0x45l -> f32x4_le | 0x46l -> f32x4_ge + | 0x47l -> f64x2_eq + | 0x48l -> f64x2_ne + | 0x49l -> f64x2_lt + | 0x4al -> f64x2_gt + | 0x4bl -> f64x2_le + | 0x4cl -> f64x2_ge | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg | 0x6el -> i8x16_add @@ -270,6 +276,15 @@ let simd_prefix s = | 0xe7l -> f32x4_div | 0xe8l -> f32x4_min | 0xe9l -> f32x4_max + | 0xecl -> f64x2_abs + | 0xedl -> f64x2_neg + | 0xefl -> f64x2_sqrt + | 0xf0l -> f64x2_add + | 0xf1l -> f64x2_sub + | 0xf2l -> f64x2_mul + | 0xf3l -> f64x2_div + | 0xf4l -> f64x2_min + | 0xf5l -> f64x2_max | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index d07718d76d..21edeb171b 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -306,6 +306,9 @@ let encode m = | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l | Unary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l + | Unary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl + | Unary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl + | Unary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a @@ -393,6 +396,18 @@ let encode m = | Binary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l | Binary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l | Binary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l + | Binary (V128 V128Op.(F64x2 Eq)) -> simd_op 0x47l + | Binary (V128 V128Op.(F64x2 Ne)) -> simd_op 0x48l + | Binary (V128 V128Op.(F64x2 Lt)) -> simd_op 0x49l + | Binary (V128 V128Op.(F64x2 Gt)) -> simd_op 0x4al + | Binary (V128 V128Op.(F64x2 Le)) -> simd_op 0x4bl + | Binary (V128 V128Op.(F64x2 Ge)) -> simd_op 0x4cl + | Binary (V128 V128Op.(F64x2 Add)) -> simd_op 0xf0l + | Binary (V128 V128Op.(F64x2 Sub)) -> simd_op 0xf1l + | Binary (V128 V128Op.(F64x2 Mul)) -> simd_op 0xf2l + | Binary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l + | Binary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l + | Binary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l | Binary (V128 _) -> failwith "TODO v128" | Ternary (_) -> failwith "TODO v128" diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index b1bfc3ff98..87dc3c48dc 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -204,6 +204,9 @@ struct | F32x4 Abs -> "f32x4.abs" | F32x4 Neg -> "f32x4.neg" | F32x4 Sqrt -> "f32x4.sqrt" + | F64x2 Abs -> "f64x2.abs" + | F64x2 Neg -> "f64x2.neg" + | F64x2 Sqrt -> "f64x2.sqrt" | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with @@ -244,6 +247,18 @@ struct | F32x4 Div -> "f32x4.div" | F32x4 Min -> "f32x4.min" | F32x4 Max -> "f32x4.max" + | F64x2 Eq -> "f64x2.eq" + | F64x2 Ne -> "f64x2.ne" + | F64x2 Lt -> "f64x2.lt" + | F64x2 Gt -> "f64x2.gt" + | F64x2 Le -> "f64x2.le" + | F64x2 Ge -> "f64x2.ge" + | F64x2 Add -> "f64x2.add" + | F64x2 Sub -> "f64x2.sub" + | F64x2 Mul -> "f64x2.mul" + | F64x2 Div -> "f64x2.div" + | F64x2 Min -> "f64x2.min" + | F64x2 Max -> "f64x2.max" | _ -> failwith "Unimplemented v128 binop" let cvtop xx = fun _ -> failwith "TODO v128" From 61eb66cd2c8afb8bd117246b1e4a16a7cbe9bdd2 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 14:39:31 -0700 Subject: [PATCH 205/378] Implement more binary<->text support for SIMD (#309) This is sufficient to pass simd_i8x16_cmp.wast, simd_i16x8_cmp.wast, and simd_i32x4_cmp.wast. --- interpreter/binary/decode.ml | 30 ++++++++++++++++++++++++++++++ interpreter/binary/encode.ml | 30 ++++++++++++++++++++++++++++++ interpreter/text/arrange.ml | 30 ++++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index d7dccc8c77..7960c5ee0f 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -223,6 +223,36 @@ let simd_prefix s = match vu32 s with | 0x00l -> let a, o = memop s in v128_load a o | 0x0cl -> v128_const (at v128 s) + | 0x23l -> i8x16_eq + | 0x24l -> i8x16_ne + | 0x25l -> i8x16_lt_s + | 0x26l -> i8x16_lt_u + | 0x27l -> i8x16_gt_s + | 0x28l -> i8x16_gt_u + | 0x29l -> i8x16_le_s + | 0x2al -> i8x16_le_u + | 0x2bl -> i8x16_ge_s + | 0x2cl -> i8x16_ge_u + | 0x2dl -> i16x8_eq + | 0x2el -> i16x8_ne + | 0x2fl -> i16x8_lt_s + | 0x30l -> i16x8_lt_u + | 0x31l -> i16x8_gt_s + | 0x32l -> i16x8_gt_u + | 0x33l -> i16x8_le_s + | 0x34l -> i16x8_le_u + | 0x35l -> i16x8_ge_s + | 0x36l -> i16x8_ge_u + | 0x37l -> i32x4_eq + | 0x38l -> i32x4_ne + | 0x39l -> i32x4_lt_s + | 0x3al -> i32x4_lt_u + | 0x3bl -> i32x4_gt_s + | 0x3cl -> i32x4_gt_u + | 0x3dl -> i32x4_le_s + | 0x3el -> i32x4_le_u + | 0x3fl -> i32x4_ge_s + | 0x40l -> i32x4_ge_u | 0x41l -> f32x4_eq | 0x42l -> f32x4_ne | 0x43l -> f32x4_lt diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 21edeb171b..394672cf9a 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -359,6 +359,16 @@ let encode m = | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + | Binary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l + | Binary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l + | Binary (V128 V128Op.(I8x16 LtS)) -> simd_op 0x25l + | Binary (V128 V128Op.(I8x16 LtU)) -> simd_op 0x26l + | Binary (V128 V128Op.(I8x16 GtS)) -> simd_op 0x27l + | Binary (V128 V128Op.(I8x16 GtU)) -> simd_op 0x28l + | Binary (V128 V128Op.(I8x16 LeS)) -> simd_op 0x29l + | Binary (V128 V128Op.(I8x16 LeU)) -> simd_op 0x2al + | Binary (V128 V128Op.(I8x16 GeS)) -> simd_op 0x2bl + | Binary (V128 V128Op.(I8x16 GeU)) -> simd_op 0x2cl | Binary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el | Binary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l | Binary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l @@ -366,6 +376,16 @@ let encode m = | Binary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l | Binary (V128 V128Op.(I8x16 MaxU)) -> simd_op 0x79l | Binary (V128 V128Op.(I8x16 AvgrU)) -> simd_op 0x7bl + | Binary (V128 V128Op.(I16x8 Eq)) -> simd_op 0x2dl + | Binary (V128 V128Op.(I16x8 Ne)) -> simd_op 0x2el + | Binary (V128 V128Op.(I16x8 LtS)) -> simd_op 0x2fl + | Binary (V128 V128Op.(I16x8 LtU)) -> simd_op 0x30l + | Binary (V128 V128Op.(I16x8 GtS)) -> simd_op 0x31l + | Binary (V128 V128Op.(I16x8 GtU)) -> simd_op 0x32l + | Binary (V128 V128Op.(I16x8 LeS)) -> simd_op 0x33l + | Binary (V128 V128Op.(I16x8 LeU)) -> simd_op 0x34l + | Binary (V128 V128Op.(I16x8 GeS)) -> simd_op 0x35l + | Binary (V128 V128Op.(I16x8 GeU)) -> simd_op 0x36l | Binary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el | Binary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l | Binary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l @@ -381,6 +401,16 @@ let encode m = | Binary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l | Binary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l + | Binary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l + | Binary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l + | Binary (V128 V128Op.(I32x4 LtS)) -> simd_op 0x39l + | Binary (V128 V128Op.(I32x4 LtU)) -> simd_op 0x3al + | Binary (V128 V128Op.(I32x4 GtS)) -> simd_op 0x3bl + | Binary (V128 V128Op.(I32x4 GtU)) -> simd_op 0x3cl + | Binary (V128 V128Op.(I32x4 LeS)) -> simd_op 0x3dl + | Binary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el + | Binary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl + | Binary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 87dc3c48dc..6fe25d6120 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -210,6 +210,36 @@ struct | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with + | I8x16 Eq -> "i8x16.eq" + | I8x16 Ne -> "i8x16.ne" + | I8x16 LtS -> "i8x16.lt_s" + | I8x16 LtU -> "i8x16.lt_u" + | I8x16 GtS -> "i8x16.gt_s" + | I8x16 GtU -> "i8x16.gt_u" + | I8x16 LeS -> "i8x16.le_s" + | I8x16 LeU -> "i8x16.le_u" + | I8x16 GeS -> "i8x16.ge_s" + | I8x16 GeU -> "i8x16.ge_u" + | I16x8 Eq -> "i16x8.eq" + | I16x8 Ne -> "i16x8.ne" + | I16x8 LtS -> "i16x8.lt_s" + | I16x8 LtU -> "i16x8.lt_u" + | I16x8 GtS -> "i16x8.gt_s" + | I16x8 GtU -> "i16x8.gt_u" + | I16x8 LeS -> "i16x8.le_s" + | I16x8 LeU -> "i16x8.le_u" + | I16x8 GeS -> "i16x8.ge_s" + | I16x8 GeU -> "i16x8.ge_u" + | I32x4 Eq -> "i32x4.eq" + | I32x4 Ne -> "i32x4.ne" + | I32x4 LtS -> "i32x4.lt_s" + | I32x4 LtU -> "i32x4.lt_u" + | I32x4 GtS -> "i32x4.gt_s" + | I32x4 GtU -> "i32x4.gt_u" + | I32x4 LeS -> "i32x4.le_s" + | I32x4 LeU -> "i32x4.le_u" + | I32x4 GeS -> "i32x4.ge_s" + | I32x4 GeU -> "i32x4.ge_u" | I8x16 Add -> "i8x16.add" | I8x16 Sub -> "i8x16.sub" | I8x16 MinS -> "i8x16.min_s" From d1d221443cda567206fe9a7623ffb88520c96017 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 15:23:17 -0700 Subject: [PATCH 206/378] Implement more binary<->text support for SIMD (#310) This is sufficient to pass simd_bitwise.wast. --- interpreter/binary/decode.ml | 6 ++++++ interpreter/binary/encode.ml | 8 +++++++- interpreter/text/arrange.ml | 11 ++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 7960c5ee0f..198a98b74e 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -265,6 +265,12 @@ let simd_prefix s = | 0x4al -> f64x2_gt | 0x4bl -> f64x2_le | 0x4cl -> f64x2_ge + | 0x4dl -> v128_not + | 0x4el -> v128_and + | 0x4fl -> v128_andnot + | 0x50l -> v128_or + | 0x51l -> v128_xor + | 0x52l -> v128_bitselect | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg | 0x6el -> i8x16_add diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 394672cf9a..2dbfbac50a 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -296,6 +296,7 @@ let encode m = | Unary (F64 F64Op.Nearest) -> op 0x9e | Unary (F64 F64Op.Sqrt) -> op 0x9f + | Unary (V128 V128Op.(V128 Not)) -> simd_op 0x4dl | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l @@ -438,9 +439,14 @@ let encode m = | Binary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l | Binary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l | Binary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l + | Binary (V128 V128Op.(V128 And)) -> simd_op 0x4el + | Binary (V128 V128Op.(V128 AndNot)) -> simd_op 0x4fl + | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l + | Binary (V128 V128Op.(V128 Xor)) -> simd_op 0x51l | Binary (V128 _) -> failwith "TODO v128" - | Ternary (_) -> failwith "TODO v128" + + | Ternary (V128Op.Bitselect) -> simd_op 0x52l | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 6fe25d6120..73b357c4bd 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -207,6 +207,7 @@ struct | F64x2 Abs -> "f64x2.abs" | F64x2 Neg -> "f64x2.neg" | F64x2 Sqrt -> "f64x2.sqrt" + | V128 Not -> "v128.not" | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with @@ -289,8 +290,15 @@ struct | F64x2 Div -> "f64x2.div" | F64x2 Min -> "f64x2.min" | F64x2 Max -> "f64x2.max" + | V128 And -> "v128.and" + | V128 AndNot -> "v128.andnot" + | V128 Or -> "v128.or" + | V128 Xor -> "v128.xor" | _ -> failwith "Unimplemented v128 binop" + let ternop (op : ternop) = match op with + | Bitselect -> "v128.bitselect" + let cvtop xx = fun _ -> failwith "TODO v128" end @@ -315,6 +323,7 @@ let binop = oper (IntOp.binop, FloatOp.binop, SimdOp.binop) let testop = oper (IntOp.testop, FloatOp.testop, SimdOp.testop) let relop = oper (IntOp.relop, FloatOp.relop, SimdOp.relop) let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, SimdOp.cvtop) +let ternop = SimdOp.ternop let memop name {ty; align; offset; _} sz = value_type ty ^ "." ^ name ^ @@ -380,7 +389,7 @@ let rec instr e = | Compare op -> relop op, [] | Unary op -> unop op, [] | Binary op -> binop op, [] - | Ternary op -> failwith "TODO v128 ternary op" + | Ternary op -> ternop op, [] | Convert op -> cvtop op, [] | SimdExtract op -> failwith "TODO v128" | SimdReplace op -> failwith "TODO v128" From 33b5210b614e04460e63897458da6a25e8f9f1fe Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 16:39:21 -0700 Subject: [PATCH 207/378] Implement more binary<->text support for SIMD (#312) This is sufficient to pass simd_boolean.wast. --- interpreter/binary/decode.ml | 6 ++++++ interpreter/binary/encode.ml | 6 ++++++ interpreter/text/arrange.ml | 9 ++++++++- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 198a98b74e..1b46da57c4 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -273,6 +273,8 @@ let simd_prefix s = | 0x52l -> v128_bitselect | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg + | 0x62l -> i8x16_any_true + | 0x63l -> i8x16_all_true | 0x6el -> i8x16_add | 0x71l -> i8x16_sub | 0x76l -> i8x16_min_s @@ -282,6 +284,8 @@ let simd_prefix s = | 0x7bl -> i8x16_avgr_u | 0x80l -> i16x8_abs | 0x81l -> i16x8_neg + | 0x82l -> i16x8_any_true + | 0x83l -> i16x8_all_true | 0x8el -> i16x8_add | 0x91l -> i16x8_sub | 0x95l -> i16x8_mul @@ -292,6 +296,8 @@ let simd_prefix s = | 0x9bl -> i16x8_avgr_u | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg + | 0xa2l -> i32x4_any_true + | 0xa3l -> i32x4_all_true | 0xael -> i32x4_add | 0xb1l -> i32x4_sub | 0xb5l -> i32x4_mul diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 2dbfbac50a..5688ba77f0 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -227,6 +227,12 @@ let encode m = | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false + | Test (V128 V128Op.(I8x16 AnyTrue)) -> simd_op 0x62l + | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l + | Test (V128 V128Op.(I16x8 AnyTrue)) -> simd_op 0x82l + | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l + | Test (V128 V128Op.(I32x4 AnyTrue)) -> simd_op 0xa2l + | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 73b357c4bd..5d7a336422 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -189,7 +189,14 @@ module SimdOp = struct open Ast.SimdOp - let testop xx = fun _ -> failwith "TODO v128" + let testop xx = function + | I8x16 AnyTrue -> "i8x16.any_true" + | I8x16 AllTrue -> "i8x16.all_true" + | I16x8 AnyTrue -> "i16x8.any_true" + | I16x8 AllTrue -> "i16x8.all_true" + | I32x4 AnyTrue -> "i32x4.any_true" + | I32x4 AllTrue -> "i32x4.all_true" + | _ -> assert false let relop xx = fun _ -> failwith "TODO v128" From 5e0308835b3579b3b3fd2306f4142a4a52091f70 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 17 Aug 2020 17:38:18 -0700 Subject: [PATCH 208/378] Implement more binary<->text support for SIMD (#313) This is sufficient to pass simd_load.wast and simd_store.wast. There are some extra instructions, like swizzle and i8x16.shl that is implemented here, because simd_load.wast uses them. --- interpreter/binary/decode.ml | 15 +++++++++++++++ interpreter/binary/encode.ml | 28 +++++++++++++++++++++------- interpreter/text/arrange.ml | 25 +++++++++++++++++++++++-- 3 files changed, 59 insertions(+), 9 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 1b46da57c4..3f165783f6 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -222,7 +222,17 @@ let simd_prefix s = let pos = pos s in match vu32 s with | 0x00l -> let a, o = memop s in v128_load a o + | 0x0bl -> let a, o = memop s in v128_store a o | 0x0cl -> v128_const (at v128 s) + | 0x0el -> v8x16_swizzle + | 0x15l -> let imm = u8 s in i8x16_extract_lane_s imm + | 0x16l -> let imm = u8 s in i8x16_extract_lane_u imm + | 0x18l -> let imm = u8 s in i16x8_extract_lane_s imm + | 0x19l -> let imm = u8 s in i16x8_extract_lane_u imm + | 0x1bl -> let imm = u8 s in i32x4_extract_lane imm + | 0x1dl -> let imm = u8 s in i64x2_extract_lane imm + | 0x1fl -> let imm = u8 s in f32x4_extract_lane imm + | 0x21l -> let imm = u8 s in f64x2_extract_lane imm | 0x23l -> i8x16_eq | 0x24l -> i8x16_ne | 0x25l -> i8x16_lt_s @@ -275,6 +285,7 @@ let simd_prefix s = | 0x61l -> i8x16_neg | 0x62l -> i8x16_any_true | 0x63l -> i8x16_all_true + | 0x6bl -> i8x16_shl | 0x6el -> i8x16_add | 0x71l -> i8x16_sub | 0x76l -> i8x16_min_s @@ -327,6 +338,10 @@ let simd_prefix s = | 0xf3l -> f64x2_div | 0xf4l -> f64x2_min | 0xf5l -> f64x2_max + | 0xf8l -> i32x4_trunc_sat_f32x4_s + | 0xf9l -> i32x4_trunc_sat_f32x4_u + | 0xfal -> f32x4_convert_i32x4_s + | 0xfbl -> f32x4_convert_i32x4_u | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 5688ba77f0..f6c07bc8f6 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -316,6 +316,10 @@ let encode m = | Unary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl | Unary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl | Unary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl + | Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l + | Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l + | Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal + | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a @@ -366,6 +370,7 @@ let encode m = | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + | Binary (V128 V128Op.(I8x16 Swizzle)) -> simd_op 0x0el | Binary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l | Binary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l | Binary (V128 V128Op.(I8x16 LtS)) -> simd_op 0x25l @@ -495,13 +500,22 @@ let encode m = | Convert (F64 F64Op.PromoteF32) -> op 0xbb | Convert (F64 F64Op.DemoteF64) -> assert false | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf - | Convert (V128 _) -> failwith "TODO v128" - - | SimdExtract _ -> failwith "TODO v128" - - | SimdReplace _ -> failwith "TODO v128" - - | SimdShift (_) -> failwith "TODO v128" + | Convert (V128 _) -> failwith "TODO v128 convert" + + | SimdExtract (V128Op.I8x16 (SX, imm)) -> simd_op 0x15l; u8 imm + | SimdExtract (V128Op.I8x16 (ZX, imm)) -> simd_op 0x16l; u8 imm + | SimdExtract (V128Op.I16x8 (SX, imm)) -> simd_op 0x18l; u8 imm + | SimdExtract (V128Op.I16x8 (ZX, imm)) -> simd_op 0x19l; u8 imm + | SimdExtract (V128Op.I32x4 (ZX, imm)) -> simd_op 0x1bl; u8 imm + | SimdExtract (V128Op.I64x2 (ZX, imm)) -> simd_op 0x1dl; u8 imm + | SimdExtract (V128Op.F32x4 (ZX, imm)) -> simd_op 0x1fl; u8 imm + | SimdExtract (V128Op.F64x2 (ZX, imm)) -> simd_op 0x21l; u8 imm + | SimdExtract _ -> assert false + + | SimdReplace _ -> failwith "TODO v128 replace " + + | SimdShift (V128Op.(I8x16 Shl)) -> simd_op 0x6bl + | SimdShift (_) -> failwith "TODO v128 shift" let const c = list instr c.it; end_ () diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 5d7a336422..e30727fb82 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -207,10 +207,14 @@ struct | I16x8 Neg -> "i16x8.neg" | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" + | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" + | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I64x2 Neg -> "i64x2.neg" | F32x4 Abs -> "f32x4.abs" | F32x4 Neg -> "f32x4.neg" | F32x4 Sqrt -> "f32x4.sqrt" + | F32x4 ConvertI32x4S -> "f32x4.convert_i32x4_s" + | F32x4 ConvertI32x4U -> "f32x4.convert_i32x4_u" | F64x2 Abs -> "f64x2.abs" | F64x2 Neg -> "f64x2.neg" | F64x2 Sqrt -> "f64x2.sqrt" @@ -218,6 +222,7 @@ struct | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with + | I8x16 Swizzle -> "v8x16.swizzle" | I8x16 Eq -> "i8x16.eq" | I8x16 Ne -> "i8x16.ne" | I8x16 LtS -> "i8x16.lt_s" @@ -307,6 +312,22 @@ struct | Bitselect -> "v128.bitselect" let cvtop xx = fun _ -> failwith "TODO v128" + + let extractop = function + | I8x16 (SX, imm) -> "i8x16.extract_lane_s " ^ (nat imm) + | I8x16 (ZX, imm) -> "i8x16.extract_lane_u " ^ (nat imm) + | I16x8 (SX, imm) -> "i16x8.extract_lane_s " ^ (nat imm) + | I16x8 (ZX, imm) -> "i16x8.extract_lane_u " ^ (nat imm) + | I32x4 (ZX, imm) -> "i32x4.extract_lane " ^ (nat imm) + | I64x2 (ZX, imm) -> "i64x2.extract_lane " ^ (nat imm) + | F32x4 (ZX, imm) -> "f32x4.extract_lane " ^ (nat imm) + | F64x2 (ZX, imm) -> "f64x2.extract_lane " ^ (nat imm) + | _ -> assert false + + let shiftop = function + | I8x16 Shl -> "i8x16.shl" + | _ -> assert false + end let oper (intop, floatop, simdop) op = @@ -398,9 +419,9 @@ let rec instr e = | Binary op -> binop op, [] | Ternary op -> ternop op, [] | Convert op -> cvtop op, [] - | SimdExtract op -> failwith "TODO v128" + | SimdExtract op -> SimdOp.extractop op, [] | SimdReplace op -> failwith "TODO v128" - | SimdShift op -> failwith "TODO v128" + | SimdShift op -> SimdOp.shiftop op, [] in Node (head, inner) let const c = From 7ac3c749c8932a615bc2e15fdbe3e697227533ad Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 18 Aug 2020 15:21:46 -0700 Subject: [PATCH 209/378] Implement binary<->text support for SIMD lane operations (#314) This is sufficient to pass simd_lane.wast. --- interpreter/binary/decode.ml | 13 +++++++++++++ interpreter/binary/encode.ml | 18 ++++++++++++++++-- interpreter/text/arrange.ml | 21 +++++++++++++++++++-- 3 files changed, 48 insertions(+), 4 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 3f165783f6..25845b55b7 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -224,15 +224,28 @@ let simd_prefix s = | 0x00l -> let a, o = memop s in v128_load a o | 0x0bl -> let a, o = memop s in v128_store a o | 0x0cl -> v128_const (at v128 s) + | 0x0dl -> v8x16_shuffle (List.init 16 (fun x -> u8 s)) | 0x0el -> v8x16_swizzle + | 0x0fl -> i8x16_splat + | 0x10l -> i16x8_splat + | 0x11l -> i32x4_splat + | 0x12l -> i64x2_splat + | 0x13l -> f32x4_splat + | 0x14l -> f64x2_splat | 0x15l -> let imm = u8 s in i8x16_extract_lane_s imm | 0x16l -> let imm = u8 s in i8x16_extract_lane_u imm + | 0x17l -> let imm = u8 s in i8x16_replace_lane imm | 0x18l -> let imm = u8 s in i16x8_extract_lane_s imm | 0x19l -> let imm = u8 s in i16x8_extract_lane_u imm + | 0x1al -> let imm = u8 s in i16x8_replace_lane imm | 0x1bl -> let imm = u8 s in i32x4_extract_lane imm + | 0x1cl -> let imm = u8 s in i32x4_replace_lane imm | 0x1dl -> let imm = u8 s in i64x2_extract_lane imm + | 0x1el -> let imm = u8 s in i64x2_replace_lane imm | 0x1fl -> let imm = u8 s in f32x4_extract_lane imm + | 0x20l -> let imm = u8 s in f32x4_replace_lane imm | 0x21l -> let imm = u8 s in f64x2_extract_lane imm + | 0x22l -> let imm = u8 s in f64x2_replace_lane imm | 0x23l -> i8x16_eq | 0x24l -> i8x16_ne | 0x25l -> i8x16_lt_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index f6c07bc8f6..7123aaa76c 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -370,6 +370,7 @@ let encode m = | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 + | Binary (V128 V128Op.(I8x16 (Shuffle imms))) -> simd_op 0x0dl; List.iter u8 imms | Binary (V128 V128Op.(I8x16 Swizzle)) -> simd_op 0x0el | Binary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l | Binary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l @@ -500,7 +501,14 @@ let encode m = | Convert (F64 F64Op.PromoteF32) -> op 0xbb | Convert (F64 F64Op.DemoteF64) -> assert false | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf - | Convert (V128 _) -> failwith "TODO v128 convert" + + | Convert (V128 (V128Op.I8x16 V128Op.Splat)) -> simd_op 0x0fl; + | Convert (V128 (V128Op.I16x8 V128Op.Splat)) -> simd_op 0x10l; + | Convert (V128 (V128Op.I32x4 V128Op.Splat)) -> simd_op 0x11l; + | Convert (V128 (V128Op.I64x2 V128Op.Splat)) -> simd_op 0x12l; + | Convert (V128 (V128Op.F32x4 V128Op.Splat)) -> simd_op 0x13l; + | Convert (V128 (V128Op.F64x2 V128Op.Splat)) -> simd_op 0x14l; + | Convert (V128 _) -> assert false | SimdExtract (V128Op.I8x16 (SX, imm)) -> simd_op 0x15l; u8 imm | SimdExtract (V128Op.I8x16 (ZX, imm)) -> simd_op 0x16l; u8 imm @@ -512,7 +520,13 @@ let encode m = | SimdExtract (V128Op.F64x2 (ZX, imm)) -> simd_op 0x21l; u8 imm | SimdExtract _ -> assert false - | SimdReplace _ -> failwith "TODO v128 replace " + | SimdReplace (V128Op.I8x16 imm) -> simd_op 0x17l; u8 imm + | SimdReplace (V128Op.I16x8 imm) -> simd_op 0x1al; u8 imm + | SimdReplace (V128Op.I32x4 imm) -> simd_op 0x1cl; u8 imm + | SimdReplace (V128Op.I64x2 imm) -> simd_op 0x1el; u8 imm + | SimdReplace (V128Op.F32x4 imm) -> simd_op 0x20l; u8 imm + | SimdReplace (V128Op.F64x2 imm) -> simd_op 0x22l; u8 imm + | SimdReplace _ -> assert false | SimdShift (V128Op.(I8x16 Shl)) -> simd_op 0x6bl | SimdShift (_) -> failwith "TODO v128 shift" diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index e30727fb82..84934b217f 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -222,6 +222,7 @@ struct | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with + | I8x16 (Shuffle imms) -> "v8x16.shuffle " ^ (String.concat " " (List.map nat imms)) | I8x16 Swizzle -> "v8x16.swizzle" | I8x16 Eq -> "i8x16.eq" | I8x16 Ne -> "i8x16.ne" @@ -311,7 +312,14 @@ struct let ternop (op : ternop) = match op with | Bitselect -> "v128.bitselect" - let cvtop xx = fun _ -> failwith "TODO v128" + let cvtop xx = function + | I8x16 Splat -> "i8x16.splat" + | I16x8 Splat -> "i16x8.splat" + | I32x4 Splat -> "i32x4.splat" + | I64x2 Splat -> "i64x2.splat" + | F32x4 Splat -> "f32x4.splat" + | F64x2 Splat -> "f64x2.splat" + | _ -> assert false let extractop = function | I8x16 (SX, imm) -> "i8x16.extract_lane_s " ^ (nat imm) @@ -324,6 +332,15 @@ struct | F64x2 (ZX, imm) -> "f64x2.extract_lane " ^ (nat imm) | _ -> assert false + let replaceop = function + | I8x16 imm -> "i8x16.replace_lane " ^ (nat imm) + | I16x8 imm -> "i16x8.replace_lane " ^ (nat imm) + | I32x4 imm -> "i32x4.replace_lane " ^ (nat imm) + | I64x2 imm -> "i64x2.replace_lane " ^ (nat imm) + | F32x4 imm -> "f32x4.replace_lane " ^ (nat imm) + | F64x2 imm -> "f64x2.replace_lane " ^ (nat imm) + | _ -> assert false + let shiftop = function | I8x16 Shl -> "i8x16.shl" | _ -> assert false @@ -420,7 +437,7 @@ let rec instr e = | Ternary op -> ternop op, [] | Convert op -> cvtop op, [] | SimdExtract op -> SimdOp.extractop op, [] - | SimdReplace op -> failwith "TODO v128" + | SimdReplace op -> SimdOp.replaceop op, [] | SimdShift op -> SimdOp.shiftop op, [] in Node (head, inner) From d1c7783b463014527e069917f6ff71a0df1312e0 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 19 Aug 2020 10:08:52 -0700 Subject: [PATCH 210/378] Implement binary<->text support for SIMD conversion operations (#315) This is sufficient to pass simd_conversions.wast. --- interpreter/binary/decode.ml | 12 ++++++++++++ interpreter/binary/encode.ml | 12 ++++++++++++ interpreter/text/arrange.ml | 12 ++++++++++++ 3 files changed, 36 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 25845b55b7..134e94188b 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -299,6 +299,8 @@ let simd_prefix s = | 0x62l -> i8x16_any_true | 0x63l -> i8x16_all_true | 0x6bl -> i8x16_shl + | 0x65l -> i8x16_narrow_i16x8_s + | 0x66l -> i8x16_narrow_i16x8_u | 0x6el -> i8x16_add | 0x71l -> i8x16_sub | 0x76l -> i8x16_min_s @@ -310,6 +312,12 @@ let simd_prefix s = | 0x81l -> i16x8_neg | 0x82l -> i16x8_any_true | 0x83l -> i16x8_all_true + | 0x85l -> i16x8_narrow_i32x4_s + | 0x86l -> i16x8_narrow_i32x4_u + | 0x87l -> i16x8_widen_low_i8x16_s + | 0x88l -> i16x8_widen_high_i8x16_s + | 0x89l -> i16x8_widen_low_i8x16_u + | 0x8al -> i16x8_widen_high_i8x16_u | 0x8el -> i16x8_add | 0x91l -> i16x8_sub | 0x95l -> i16x8_mul @@ -322,6 +330,10 @@ let simd_prefix s = | 0xa1l -> i32x4_neg | 0xa2l -> i32x4_any_true | 0xa3l -> i32x4_all_true + | 0xa7l -> i32x4_widen_low_i16x8_s + | 0xa8l -> i32x4_widen_high_i16x8_s + | 0xa9l -> i32x4_widen_low_i16x8_u + | 0xaal -> i32x4_widen_high_i16x8_u | 0xael -> i32x4_add | 0xb1l -> i32x4_sub | 0xb5l -> i32x4_mul diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 7123aaa76c..c5778a130f 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -307,8 +307,16 @@ let encode m = | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l + | Unary (V128 V128Op.(I16x8 WidenLowS)) -> simd_op 0x87l + | Unary (V128 V128Op.(I16x8 WidenHighS)) -> simd_op 0x88l + | Unary (V128 V128Op.(I16x8 WidenLowU)) -> simd_op 0x89l + | Unary (V128 V128Op.(I16x8 WidenHighU)) -> simd_op 0x8al | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l + | Unary (V128 V128Op.(I32x4 WidenLowS)) -> simd_op 0xa7l + | Unary (V128 V128Op.(I32x4 WidenHighS)) -> simd_op 0xa8l + | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l + | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l @@ -382,6 +390,8 @@ let encode m = | Binary (V128 V128Op.(I8x16 LeU)) -> simd_op 0x2al | Binary (V128 V128Op.(I8x16 GeS)) -> simd_op 0x2bl | Binary (V128 V128Op.(I8x16 GeU)) -> simd_op 0x2cl + | Binary (V128 V128Op.(I8x16 NarrowS)) -> simd_op 0x65l + | Binary (V128 V128Op.(I8x16 NarrowU)) -> simd_op 0x66l | Binary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el | Binary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l | Binary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l @@ -399,6 +409,8 @@ let encode m = | Binary (V128 V128Op.(I16x8 LeU)) -> simd_op 0x34l | Binary (V128 V128Op.(I16x8 GeS)) -> simd_op 0x35l | Binary (V128 V128Op.(I16x8 GeU)) -> simd_op 0x36l + | Binary (V128 V128Op.(I16x8 NarrowS)) -> simd_op 0x85l + | Binary (V128 V128Op.(I16x8 NarrowU)) -> simd_op 0x86l | Binary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el | Binary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l | Binary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 84934b217f..be3d02e019 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -205,8 +205,16 @@ struct | I8x16 Abs -> "i8x16.abs" | I16x8 Abs -> "i16x8.abs" | I16x8 Neg -> "i16x8.neg" + | I16x8 WidenLowS -> "i16x8.widen_low_i8x16_s" + | I16x8 WidenHighS -> "i16x8.widen_high_i8x16_s" + | I16x8 WidenLowU -> "i16x8.widen_low_i8x16_u" + | I16x8 WidenHighU -> "i16x8.widen_high_i8x16_u" | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" + | I32x4 WidenLowS -> "i32x4.widen_low_i16x8_s" + | I32x4 WidenHighS -> "i32x4.widen_high_i16x8_s" + | I32x4 WidenLowU -> "i32x4.widen_low_i16x8_u" + | I32x4 WidenHighU -> "i32x4.widen_high_i16x8_u" | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I64x2 Neg -> "i64x2.neg" @@ -254,6 +262,8 @@ struct | I32x4 LeU -> "i32x4.le_u" | I32x4 GeS -> "i32x4.ge_s" | I32x4 GeU -> "i32x4.ge_u" + | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" + | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" | I8x16 Add -> "i8x16.add" | I8x16 Sub -> "i8x16.sub" | I8x16 MinS -> "i8x16.min_s" @@ -261,6 +271,8 @@ struct | I8x16 MaxS -> "i8x16.max_s" | I8x16 MaxU -> "i8x16.max_u" | I8x16 AvgrU -> "i8x16.avgr_u" + | I16x8 NarrowS -> "i16x8.narrow_i32x4_s" + | I16x8 NarrowU -> "i16x8.narrow_i32x4_u" | I16x8 Add -> "i16x8.add" | I16x8 Sub -> "i16x8.sub" | I16x8 Mul -> "i16x8.mul" From 2d0868d8d8f06eb0ae207e07ebc01606d801313a Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 20 Aug 2020 21:25:40 -0700 Subject: [PATCH 211/378] Implement binary<->text support for SIMD saturating ops and some shifts (#317) This is sufficient to pass simd_splat.wast. --- interpreter/binary/decode.ml | 15 +++++++++++++++ interpreter/binary/encode.ml | 15 ++++++++++++++- interpreter/text/arrange.ml | 13 +++++++++++++ 3 files changed, 42 insertions(+), 1 deletion(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 134e94188b..bf41182757 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -299,10 +299,15 @@ let simd_prefix s = | 0x62l -> i8x16_any_true | 0x63l -> i8x16_all_true | 0x6bl -> i8x16_shl + | 0x6cl -> i8x16_shr_s | 0x65l -> i8x16_narrow_i16x8_s | 0x66l -> i8x16_narrow_i16x8_u | 0x6el -> i8x16_add + | 0x6fl -> i8x16_add_saturate_s + | 0x70l -> i8x16_add_saturate_u | 0x71l -> i8x16_sub + | 0x72l -> i8x16_sub_saturate_s + | 0x73l -> i8x16_sub_saturate_u | 0x76l -> i8x16_min_s | 0x77l -> i8x16_min_u | 0x78l -> i8x16_max_s @@ -318,8 +323,14 @@ let simd_prefix s = | 0x88l -> i16x8_widen_high_i8x16_s | 0x89l -> i16x8_widen_low_i8x16_u | 0x8al -> i16x8_widen_high_i8x16_u + | 0x8bl -> i16x8_shl + | 0x8cl -> i16x8_shr_s | 0x8el -> i16x8_add + | 0x8fl -> i16x8_add_saturate_s + | 0x90l -> i16x8_add_saturate_u | 0x91l -> i16x8_sub + | 0x92l -> i16x8_sub_saturate_s + | 0x93l -> i16x8_sub_saturate_u | 0x95l -> i16x8_mul | 0x96l -> i16x8_min_s | 0x97l -> i16x8_min_u @@ -334,6 +345,8 @@ let simd_prefix s = | 0xa8l -> i32x4_widen_high_i16x8_s | 0xa9l -> i32x4_widen_low_i16x8_u | 0xaal -> i32x4_widen_high_i16x8_u + | 0xabl -> i32x4_shl + | 0xacl -> i32x4_shr_s | 0xael -> i32x4_add | 0xb1l -> i32x4_sub | 0xb5l -> i32x4_mul @@ -342,6 +355,8 @@ let simd_prefix s = | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u | 0xc1l -> i64x2_neg + | 0xcbl -> i64x2_shl + | 0xccl -> i64x2_shr_s | 0xcel -> i64x2_add | 0xd1l -> i64x2_sub | 0xd5l -> i64x2_mul diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index c5778a130f..44f22f9b3f 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -393,7 +393,11 @@ let encode m = | Binary (V128 V128Op.(I8x16 NarrowS)) -> simd_op 0x65l | Binary (V128 V128Op.(I8x16 NarrowU)) -> simd_op 0x66l | Binary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el + | Binary (V128 V128Op.(I8x16 AddSatS)) -> simd_op 0x6fl + | Binary (V128 V128Op.(I8x16 AddSatU)) -> simd_op 0x70l | Binary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l + | Binary (V128 V128Op.(I8x16 SubSatS)) -> simd_op 0x72l + | Binary (V128 V128Op.(I8x16 SubSatU)) -> simd_op 0x73l | Binary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l | Binary (V128 V128Op.(I8x16 MinU)) -> simd_op 0x77l | Binary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l @@ -412,7 +416,11 @@ let encode m = | Binary (V128 V128Op.(I16x8 NarrowS)) -> simd_op 0x85l | Binary (V128 V128Op.(I16x8 NarrowU)) -> simd_op 0x86l | Binary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el + | Binary (V128 V128Op.(I16x8 AddSatS)) -> simd_op 0x8fl + | Binary (V128 V128Op.(I16x8 AddSatU)) -> simd_op 0x90l | Binary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l + | Binary (V128 V128Op.(I16x8 SubSatS)) -> simd_op 0x92l + | Binary (V128 V128Op.(I16x8 SubSatU)) -> simd_op 0x93l | Binary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l | Binary (V128 V128Op.(I16x8 MinS)) -> simd_op 0x96l | Binary (V128 V128Op.(I16x8 MinU)) -> simd_op 0x97l @@ -540,7 +548,12 @@ let encode m = | SimdReplace (V128Op.F64x2 imm) -> simd_op 0x22l; u8 imm | SimdReplace _ -> assert false - | SimdShift (V128Op.(I8x16 Shl)) -> simd_op 0x6bl + | SimdShift V128Op.(I8x16 Shl) -> simd_op 0x6bl + | SimdShift V128Op.(I8x16 ShrS) -> simd_op 0x6cl + | SimdShift V128Op.(I16x8 Shl) -> simd_op 0x8bl + | SimdShift V128Op.(I16x8 ShrS) -> simd_op 0x8cl + | SimdShift V128Op.(I32x4 Shl) -> simd_op 0xabl + | SimdShift V128Op.(I32x4 ShrS) -> simd_op 0xacl | SimdShift (_) -> failwith "TODO v128 shift" let const c = diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index be3d02e019..84936938f7 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -265,7 +265,11 @@ struct | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" | I8x16 Add -> "i8x16.add" + | I8x16 AddSatS -> "i8x16.add_saturate_s" + | I8x16 AddSatU -> "i8x16.add_saturate_u" | I8x16 Sub -> "i8x16.sub" + | I8x16 SubSatS -> "i8x16.sub_saturate_s" + | I8x16 SubSatU -> "i8x16.sub_saturate_u" | I8x16 MinS -> "i8x16.min_s" | I8x16 MinU -> "i8x16.min_u" | I8x16 MaxS -> "i8x16.max_s" @@ -274,7 +278,11 @@ struct | I16x8 NarrowS -> "i16x8.narrow_i32x4_s" | I16x8 NarrowU -> "i16x8.narrow_i32x4_u" | I16x8 Add -> "i16x8.add" + | I16x8 AddSatS -> "i16x8.add_saturate_s" + | I16x8 AddSatU -> "i16x8.add_saturate_u" | I16x8 Sub -> "i16x8.sub" + | I16x8 SubSatS -> "i16x8.sub_saturate_s" + | I16x8 SubSatU -> "i16x8.sub_saturate_u" | I16x8 Mul -> "i16x8.mul" | I16x8 MinS -> "i16x8.min_s" | I16x8 MinU -> "i16x8.min_u" @@ -355,6 +363,11 @@ struct let shiftop = function | I8x16 Shl -> "i8x16.shl" + | I8x16 ShrS -> "i8x16.shr_s" + | I16x8 Shl -> "i16x8.shl" + | I16x8 ShrS -> "i16x8.shr_s" + | I32x4 Shl -> "i32x4.shl" + | I32x4 ShrS -> "i32x4.shr_s" | _ -> assert false end From b81310b22a9fe9e4ad18692e8ca4f7115b684f4e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 20 Aug 2020 21:35:20 -0700 Subject: [PATCH 212/378] Implement SIMD shr_u (#311) Shifting requires masking i8 and i16 top bits first, since we store them sign-extended. Implement `needs_extend` correctly, previously it was implementing the opposite, but it was used by callers correctly, so change all callers to use `not needs_extend`. --- interpreter/exec/eval_numeric.ml | 4 ++++ interpreter/exec/int.ml | 12 +++++++++--- interpreter/exec/simd.ml | 4 ++++ interpreter/syntax/operators.ml | 4 ++++ interpreter/text/lexer.mll | 2 ++ 5 files changed, 23 insertions(+), 3 deletions(-) diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index b9844c4fbc..e431f2f724 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -305,12 +305,16 @@ struct let f = match op with | I8x16 Shl -> SXX.I8x16.shl | I8x16 ShrS -> SXX.I8x16.shr_s + | I8x16 ShrU -> SXX.I8x16.shr_u | I16x8 Shl -> SXX.I16x8.shl | I16x8 ShrS -> SXX.I16x8.shr_s + | I16x8 ShrU -> SXX.I16x8.shr_u | I32x4 Shl -> SXX.I32x4.shl | I32x4 ShrS -> SXX.I32x4.shr_s + | I32x4 ShrU -> SXX.I32x4.shr_u | I64x2 Shl -> SXX.I64x2.shl | I64x2 ShrS -> SXX.I64x2.shr_s + | I64x2 ShrU -> SXX.I64x2.shr_u | _ -> failwith "unimplemented shr_u" in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) end diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index ed264cd21e..883ee70ab0 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -194,8 +194,15 @@ struct let shr_s x y = shift Rep.shift_right x y + (* Check if we are storing smaller ints. *) + let needs_extend = (shl one (Rep.of_int (Rep.bitwidth - 1))) <> Rep.min_int + let shr_u x y = - shift Rep.shift_right_logical x y + (* If we are storing smaller ints, we need to mask out the high bits. *) + let mask = if not needs_extend then Rep.minus_one + else Rep.lognot (Rep.shift_left Rep.minus_one (Rep.bitwidth)) in + let result = shift Rep.shift_right_logical (Rep.logand x mask) y in + result (* We must mask the count to implement rotates via shifts. *) let clamp_rotate_count n = @@ -304,7 +311,6 @@ struct let max_upper, max_lower = divrem_u Rep.minus_one ten - let needs_extend = Rep.of_int (1 lsl (Rep.bitwidth - 1)) = Rep.min_int let sign_extend i = (* This module is used with I32 and I64, but the bitwidth can be less * than that, e.g. for I16. When used for smaller integers, the stored value @@ -315,7 +321,7 @@ struct * -1 (Int32) << 32 = -1 * Then the logor will be also wrong. So we check and bail out early. * *) - if needs_extend then i else + if not needs_extend then i else let sign_bit = Rep.logand (Rep.of_int (1 lsl (Rep.bitwidth - 1))) i in if sign_bit = Rep.zero then i else (* Build a sign-extension mask *) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index b3e24bafc9..845e9fb3d0 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -83,6 +83,7 @@ sig val all_true : t -> bool val shl : t -> I32.t -> t val shr_s : t -> I32.t -> t + val shr_u : t -> I32.t -> t val add_sat_s : t -> t -> t val add_sat_u : t -> t -> t val sub_sat_s : t -> t -> t @@ -296,6 +297,9 @@ struct let shr_s v s = let shift = Int.of_int_u (Int32.to_int s) in unop (fun a -> Int.shr_s a shift) v + let shr_u v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shr_u a shift) v let add_sat_s = binop Int.add_sat_s let add_sat_u = binop Int.add_sat_u let sub_sat_s = binop Int.sub_sat_s diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 32327f9fe8..8282bf3076 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -254,6 +254,7 @@ let i16x8_widen_low_i8x16_u = Unary (V128 V128Op.(I16x8 WidenLowU)) let i16x8_widen_high_i8x16_u = Unary (V128 V128Op.(I16x8 WidenHighU)) let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) +let i8x16_shr_u = SimdShift V128Op.(I8x16 ShrU) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) let i8x16_add_saturate_s = Binary (V128 V128Op.(I8x16 AddSatS)) let i8x16_add_saturate_u = Binary (V128 V128Op.(I8x16 AddSatU)) @@ -288,6 +289,7 @@ let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) let i16x8_shl = SimdShift V128Op.(I16x8 Shl) let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) +let i16x8_shr_u = SimdShift V128Op.(I16x8 ShrU) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) let i16x8_add_saturate_s = Binary (V128 V128Op.(I16x8 AddSatS)) let i16x8_add_saturate_u = Binary (V128 V128Op.(I16x8 AddSatU)) @@ -325,6 +327,7 @@ let i32x4_widen_low_i16x8_u = Unary (V128 V128Op.(I32x4 WidenLowU)) let i32x4_widen_high_i16x8_u = Unary (V128 V128Op.(I32x4 WidenHighU)) let i32x4_shl = SimdShift V128Op.(I32x4 Shl) let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) +let i32x4_shr_u = SimdShift V128Op.(I32x4 ShrU) let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) let i32x4_min_s = Binary (V128 (V128Op.I32x4 V128Op.MinS)) @@ -344,6 +347,7 @@ let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) let i64x2_mul = Binary (V128 (V128Op.I64x2 V128Op.Mul)) let i64x2_shl = SimdShift V128Op.(I64x2 Shl) let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) +let i64x2_shr_u = SimdShift V128Op.(I64x2 ShrU) let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 27615e60d9..b19d8c1e2a 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -511,6 +511,8 @@ rule token = parse { SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } | (simd_int_shape as s)".shr_s" { SHIFT (simd_int_op s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } + | (simd_int_shape as s)".shr_u" + { SHIFT (simd_int_op s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } | (simd_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } From b89087d773ad5b2291157a2a98e0132b7e9c3945 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 24 Aug 2020 09:22:22 -0700 Subject: [PATCH 213/378] Formatting fixes in shr_u (#318) --- interpreter/exec/int.ml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 883ee70ab0..01c84e4c58 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -195,14 +195,14 @@ struct shift Rep.shift_right x y (* Check if we are storing smaller ints. *) - let needs_extend = (shl one (Rep.of_int (Rep.bitwidth - 1))) <> Rep.min_int + let needs_extend = shl one (Rep.of_int (Rep.bitwidth - 1)) <> Rep.min_int let shr_u x y = (* If we are storing smaller ints, we need to mask out the high bits. *) - let mask = if not needs_extend then Rep.minus_one - else Rep.lognot (Rep.shift_left Rep.minus_one (Rep.bitwidth)) in - let result = shift Rep.shift_right_logical (Rep.logand x mask) y in - result + let mask = + if not needs_extend then Rep.minus_one else + Rep.lognot (Rep.shift_left Rep.minus_one (Rep.bitwidth)) + in shift Rep.shift_right_logical (Rep.logand x mask) y (* We must mask the count to implement rotates via shifts. *) let clamp_rotate_count n = From e2e7006c28dc6255e9f6d1fa7cb3b2618e66fe33 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 25 Aug 2020 10:15:06 -0700 Subject: [PATCH 214/378] Implement bitmask for SIMD (#319) i8x16.bitmask, i16x8.bitmask, i32x4.bitmask. Add some tests to simd_boolean.wast (just a simple correctness check, future work is to generate the test, move it into a python script.) This introduces a new AST, SimdBitmask, since it doesn't really fit in with any existing AST (Test returns a bool). --- interpreter/binary/encode.ml | 2 ++ interpreter/exec/eval.ml | 4 ++++ interpreter/exec/eval_numeric.ml | 9 +++++++++ interpreter/exec/eval_numeric.mli | 1 + interpreter/exec/simd.ml | 6 ++++++ interpreter/syntax/ast.ml | 4 ++++ interpreter/syntax/operators.ml | 3 +++ interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 +++ interpreter/valid/valid.ml | 3 +++ test/core/simd/simd_boolean.wast | 16 ++++++++++++++++ 11 files changed, 52 insertions(+) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 44f22f9b3f..ae9ab9c06d 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -556,6 +556,8 @@ let encode m = | SimdShift V128Op.(I32x4 ShrS) -> simd_op 0xacl | SimdShift (_) -> failwith "TODO v128 shift" + | SimdBitmask (_) -> failwith "TODO v128 bitmask" + let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index e7ab76dcbb..14a6ccd9ec 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -282,6 +282,10 @@ let rec step (c : config) : config = (try Eval_numeric.eval_shiftop shiftop v s :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdBitmask bitmaskop, v :: vs' -> + (try Eval_numeric.eval_bitmaskop bitmaskop v :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | _ -> let s1 = string_of_values (List.rev vs) in let s2 = string_of_value_types (List.map type_of (List.rev vs)) in diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index e431f2f724..7e631dcf0e 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -317,6 +317,14 @@ struct | I64x2 ShrU -> SXX.I64x2.shr_u | _ -> failwith "unimplemented shr_u" in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) + + let bitmaskop (op : bitmaskop) v = + let f = match op with + | I8x16 Bitmask -> SXX.I8x16.bitmask + | I16x8 Bitmask -> SXX.I16x8.bitmask + | I32x4 Bitmask -> SXX.I32x4.bitmask + | _ -> assert false + in I32 (f (of_value 1 v)) end module V128Op = SimdOp (V128) (Values.V128Value) @@ -412,6 +420,7 @@ let eval_extractop extractop v = V128Op.extractop extractop v let eval_replaceop replaceop = V128Op.replaceop replaceop let eval_ternop ternop v = V128Op.ternop ternop v let eval_shiftop shiftop v = V128Op.shiftop shiftop v +let eval_bitmaskop bitmaskop v = V128Op.bitmaskop bitmaskop v (* Dispatch *) diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index 9dd85005cd..b5b25759b9 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -11,3 +11,4 @@ val eval_extractop : Ast.extractop -> value -> value val eval_replaceop : Ast.replaceop -> value -> value -> value val eval_ternop : Ast.ternop -> value -> value -> value -> value val eval_shiftop : Ast.shiftop -> value -> value -> value +val eval_bitmaskop : Ast.bitmaskop -> value -> value diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 845e9fb3d0..66a65883cb 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -81,6 +81,7 @@ sig val avgr_u : t -> t -> t val any_true : t -> bool val all_true : t -> bool + val bitmask : t -> Int32.t val shl : t -> I32.t -> t val shr_s : t -> I32.t -> t val shr_u : t -> I32.t -> t @@ -291,6 +292,11 @@ struct let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (Convert.to_shape s) let any_true = reduceop (||) false let all_true = reduceop (&&) true + (* Extract top bits using signed-comparision with zero *) + let bitmask x = + let xs = Convert.to_shape x in + let negs = List.map (fun x -> if Int.(lt_s x zero) then Int32.one else Int32.zero) xs in + List.fold_left (fun a b -> Int32.(logor b (shift_left a 1))) Int32.zero negs let shl v s = let shift = Int.of_int_u (Int32.to_int s) in unop (fun a -> Int.shl a shift) v diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index a9d0fe1a77..eb976f57fb 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -84,6 +84,8 @@ struct type replaceop = (int, int, int, int, int, int, int) v128op type shift = Shl | ShrS | ShrU type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op + type bitmask = Bitmask + type bitmaskop = (bitmask, bitmask, bitmask, bitmask, bitmask, bitmask, bitmask) v128op end module I32Op = IntOp @@ -102,6 +104,7 @@ type replaceop = V128Op.replaceop (* Ternary operators only exist for V128 types for now *) type ternop = V128Op.ternop type shiftop = V128Op.shiftop +type bitmaskop = V128Op.bitmaskop type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} @@ -151,6 +154,7 @@ and instr' = | SimdExtract of extractop (* extract lane from v128 value *) | SimdReplace of replaceop (* replace lane of v128 value *) | SimdShift of shiftop (* shifts for v128 value *) + | SimdBitmask of bitmaskop (* bitmask for v128 value *) (* Globals & Functions *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 8282bf3076..7a51514f29 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -245,6 +245,7 @@ let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) +let i8x16_bitmask = SimdBitmask V128Op.(I8x16 Bitmask) let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) @@ -284,6 +285,7 @@ let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) +let i16x8_bitmask = SimdBitmask V128Op.(I16x8 Bitmask) let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) @@ -320,6 +322,7 @@ let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) +let i32x4_bitmask = SimdBitmask V128Op.(I32x4 Bitmask) let i32x4_all_true = Test (V128 (V128Op.I32x4 V128Op.AllTrue)) let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) let i32x4_widen_high_i16x8_s = Unary (V128 V128Op.(I32x4 WidenHighS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 84936938f7..798edeb79b 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -464,6 +464,7 @@ let rec instr e = | SimdExtract op -> SimdOp.extractop op, [] | SimdReplace op -> SimdOp.replaceop op, [] | SimdShift op -> SimdOp.shiftop op, [] + | SimdBitmask op -> failwith "unimplemented simd bitmask" in Node (head, inner) let const c = diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b19d8c1e2a..0c0ce1c17f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -507,6 +507,9 @@ rule token = parse | (simd_int_shape as s)".all_true" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } + | (simd_int_shape as s)".bitmask" + { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; + UNARY (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask unreachable) } | (simd_int_shape as s)".shl" { SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } | (simd_int_shape as s)".shr_s" diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index e8273ed175..4564820f4d 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -359,6 +359,9 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = | SimdShift _ -> [V128Type; I32Type] --> [V128Type] + | SimdBitmask _ -> + [V128Type] --> [I32Type] + and check_seq (c : context) (s : infer_stack_type) (es : instr list) : infer_stack_type = match es with diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 27d3738bf2..45f2629edf 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -3,12 +3,15 @@ (module (func (export "i8x16.any_true") (param $0 v128) (result i32) (i8x16.any_true (local.get $0))) (func (export "i8x16.all_true") (param $0 v128) (result i32) (i8x16.all_true (local.get $0))) + (func (export "i8x16.bitmask") (param $0 v128) (result i32) (i8x16.bitmask (local.get $0))) (func (export "i16x8.any_true") (param $0 v128) (result i32) (i16x8.any_true (local.get $0))) (func (export "i16x8.all_true") (param $0 v128) (result i32) (i16x8.all_true (local.get $0))) + (func (export "i16x8.bitmask") (param $0 v128) (result i32) (i16x8.bitmask (local.get $0))) (func (export "i32x4.any_true") (param $0 v128) (result i32) (i32x4.any_true (local.get $0))) (func (export "i32x4.all_true") (param $0 v128) (result i32) (i32x4.all_true (local.get $0))) + (func (export "i32x4.bitmask") (param $0 v128) (result i32) (i32x4.bitmask (local.get $0))) ) ;; i8x16 @@ -48,6 +51,10 @@ (i32.const 1)) (assert_return (invoke "i8x16.all_true" (v128.const i8x16 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55)) (i32.const 1)) +(assert_return (invoke "i8x16.bitmask" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) + (i32.const 0x0000FFFF)) +(assert_return (invoke "i8x16.bitmask" (v128.const i8x16 -1 0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD 0xF)) + (i32.const 0x00008000)) ;; i16x8 (assert_return (invoke "i16x8.any_true" (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -94,6 +101,11 @@ (i32.const 1)) (assert_return (invoke "i16x8.all_true" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234)) (i32.const 1)) +(assert_return (invoke "i16x8.bitmask" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) + (i32.const 0x000000FF)) +(assert_return (invoke "i16x8.bitmask" (v128.const i16x8 -1 0 1 2 0xB 0xC 0xD 0xF)) + (i32.const 0x00000080)) + ;; i32x4 (assert_return (invoke "i32x4.any_true" (v128.const i32x4 0 0 0 0)) (i32.const 0)) @@ -139,6 +151,10 @@ (i32.const 1)) (assert_return (invoke "i32x4.all_true" (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) (i32.const 1)) +(assert_return (invoke "i32x4.bitmask" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) + (i32.const 0x0000000F)) +(assert_return (invoke "i32x4.bitmask" (v128.const i32x4 -1 0 1 0xF)) + (i32.const 0x00000008)) ;; Combination From 91fe0077c94ad28b5e97764dafff59ebe299d406 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 25 Aug 2020 14:05:01 -0700 Subject: [PATCH 215/378] Add SIMD instructions to syntax (#271) --- document/core/syntax/instructions.rst | 189 +++++++++++++++++++++++++- document/core/util/macros.def | 26 ++++ 2 files changed, 213 insertions(+), 2 deletions(-) diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 4a21904f74..ad99f9ae32 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -170,6 +170,180 @@ Occasionally, it is convenient to group operators together according to the foll \end{array} +.. index:: ! simd instruction, fixed-width simd, value, value type + pair: abstract syntax; instruction +.. _syntax-laneidx: +.. _syntax-vsunop: +.. _syntax-vsbinop: +.. _syntax-vsternop: +.. _syntax-vtestop: +.. _syntax-virelop: +.. _syntax-vfrelop: +.. _syntax-vshiftop: +.. _syntax-viunop: +.. _syntax-vibinop: +.. _syntax-viminmaxop: +.. _syntax-vsatbinop: +.. _syntax-vfunop: +.. _syntax-vfbinop: +.. _syntax-instr-simd: + +SIMD Instructions +~~~~~~~~~~~~~~~~~ + +SIMD instructions provide basic operations over :ref:`values ` of type |V128|. + +.. math:: + \begin{array}{llcl} + \production{ishape} & \X{ixx} &::=& + \K{i8x16} ~|~ \K{i16x8} ~|~ \K{i32x4} ~|~ \K{i64x2} \\ + \production{fshape} & \X{fxx} &::=& + \K{f32x4} ~|~ \K{f64x2} \\ + \production{vshape} & \X{vxx} &::=& + \X{ixx} ~|~ \X{fxx} \\ + \production{lane index} & \laneidx &::=& \byte \\ + \production{instruction} & \instr &::=& + \dots \\&&|& + \K{v128.}\CONST~\xref{syntax/values}{syntax-simd}{\vX{\X{nnn}}} \\&&|& + \K{v128.}\vsunop \\&&|& + \K{v128.}\vsbinop \\&&|& + \K{v128.}\vsternop \\&&|& + \K{i8x16.}\SHUFFLE~\laneidx^{16} \\&&|& + \K{i8x16.}\SWIZZLE \\&&|& + \X{vxx}\K{.}\SPLAT \\&&|& + \K{i8x16.}\EXTRACTLANE\K{\_}\sx~\laneidx ~|~ + \K{i16x8.}\EXTRACTLANE\K{\_}\sx~\laneidx \\&&|& + \K{i32x4.}\EXTRACTLANE~\laneidx ~|~ + \K{i64x2.}\EXTRACTLANE~\laneidx \\&&|& + \X{fxx}\K{.}\EXTRACTLANE~\laneidx \\&&|& + \X{vxx}\K{.}\REPLACELANE~\laneidx \\&&|& + \X{ixx}\K{.}\virelop \\&&|& + \X{fxx}\K{.}\vfrelop \\&&|& + \K{i8x16.}\viunop ~|~ + \K{i16x8.}\viunop ~|~ + \K{i32x4.}\viunop \\&&|& + \K{i64x2.}\NEG \\&&|& + \X{fxx.}\vfunop \\&&|& + \K{i8x16.}\vtestop ~|~ + \K{i16x8.}\vtestop ~|~ + \K{i32x4.}\vtestop \\&&|& + \K{i8x16.}\BITMASK ~|~ + \K{i16x8.}\BITMASK ~|~ + \K{i32x4.}\BITMASK \\&&|& + \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ + \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\WIDEN\K{\_low}\K{\_i16x8\_}\sx \\&&|& + \K{i16x8.}\WIDEN\K{\_high}\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\WIDEN\K{\_high}\K{\_i16x8\_}\sx \\&&|& + \X{ixx}\K{.}\vshiftop \\&&|& + \X{ixx}\K{.}\vibinop \\&&|& + \K{i8x16.}\viminmaxop ~|~ + \K{i16x8.}\viminmaxop ~|~ + \K{i32x4.}\viminmaxop \\&&|& + \K{i8x16.}\vsatbinop ~|~ + \K{i16x8.}\vsatbinop \\&&|& + \K{i16x8.}\K{mul} ~|~ + \K{i32x4.}\K{mul} ~|~ + \K{i64x2.}\K{mul} \\&&|& + \K{i8x16.}\AVGRU ~|~ + \K{i16x8.}\AVGRU \\&&|& + \X{fxx.}\vfbinop \\&&|& + \K{i32x4.}\TRUNC\K{\_sat\_f32x4\_}\sx ~|~ + \K{f32x4.}\CONVERT\K{\_i32x4\_}\sx \\&&|& + \dots \\ + \production{SIMD unary operator} & \vsunop &::=& + \K{not} \\ + \production{SIMD binary operator} & \vsbinop &::=& + \K{and} ~|~ + \K{andnot} ~|~ + \K{or} ~|~ + \K{xor} \\ + \production{SIMD ternary operator} & \vsternop &::=& + \K{bitselect} \\ + \production{SIMD test operator} & \vtestop &::=& + \K{any\_true} ~|~ + \K{all\_true} \\ + \production{SIMD integer relational operator} & \virelop &::=& + \K{eq} ~|~ + \K{ne} ~|~ + \K{lt\_}\sx ~|~ + \K{gt\_}\sx ~|~ + \K{le\_}\sx ~|~ + \K{ge\_}\sx \\ + \production{SIMD floating-point relational operator} & \vfrelop &::=& + \K{eq} ~|~ + \K{ne} ~|~ + \K{lt} ~|~ + \K{gt} ~|~ + \K{le} ~|~ + \K{ge} \\ + \production{SIMD integer shift operator} & \vshiftop &::=& + \K{shl} ~|~ + \K{shr\_s} ~|~ + \K{shr\_u} \\ + \production{SIMD integer unary operator} & \viunop &::=& + \K{abs} ~|~ + \K{neg} \\ + \production{SIMD integer binary operator} & \vibinop &::=& + \K{add} ~|~ + \K{sub} \\ + \production{SIMD integer binary min/max operator} & \viminmaxop &::=& + \K{min\_}\sx ~|~ + \K{max\_}\sx \\ + \production{SIMD integer saturating binary operator} & \vsatbinop &::=& + \K{add\_sat\_}\sx ~|~ + \K{sub\_sat\_}\sx \\ + \production{SIMD floating-point unary operator} & \vfunop &::=& + \K{abs} ~|~ + \K{neg} ~|~ + \K{sqrt} \\ + \production{SIMD floating-point binary operator} & \vfbinop &::=& + \K{add} ~|~ + \K{sub} ~|~ + \K{mul} ~|~ + \K{div} ~|~ + \K{min} ~|~ + \K{max} \\ + \end{array} + +SIMD instructions have a naming convention involving a prefix that +determines how their operands will be interpreted. +This prefix describes the *shape* of the operand, +written :math:`t\K{x}N`, and consisting of a packed numeric type :math:`t` and the number of *lanes* :math:`N` of that type. +Operations are performed point-wise on the values of each lane. + +.. note:: + For example, the shape :math:`\K{i32x4}` interprets the operand + as four |i32| values, packed into an |i128|. + The bitwidth of the numeric type :math:`t` times :math:`N` always is 128. + +Instructions prefixed with :math:`\K{v128}` do not involve a specific interpretation, and treat the |V128| as an |i128| value or a vector of 128 individual bits. + +SIMD instructions can be grouped into several subcategories: + +* *Constants*: return a static constant. + +* *Unary Operations*: consume one |V128| operand and produce one |V128| result. + +* *Binary Operations*: consume two |V128| operands and produce one |V128| result. + +* *Ternary Operations*: consume three |V128| operands and produce one |V128| result. + +* *Tests*: consume one |V128| operand and produce a Boolean integer result. + +* *Shifts*: consume a |v128| operand and a |i32| operand, producing one |V128| result. + +* *Splats*: consume a value of numeric type and produce a |V128| result of a specified shape. + +* *Extract lanes*: consume a |V128| operand and return the numeric value in a given lane. + +* *Replace lanes*: consume a |V128| operand and a numeric value for a given lane, and produce a |V128| result. + +Some SIMD instructions have a signedness annotation |sx| which distinguishes whether the elements in the operands are to be :ref:`interpreted ` as :ref:`unsigned ` or :ref:`signed ` integers. +For the other SIMD instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness. + + .. index:: ! parametric instruction, value type pair: abstract syntax; instruction .. _syntax-instr-parametric: @@ -235,15 +409,24 @@ Instructions in this group are concerned with linear :ref:`memory `. \production{instruction} & \instr &::=& \dots \\&&|& \K{i}\X{nn}\K{.}\LOAD~\memarg ~|~ - \K{f}\X{nn}\K{.}\LOAD~\memarg \\&&|& + \K{f}\X{nn}\K{.}\LOAD~\memarg ~|~ + \K{v128.}\LOAD~\memarg \\&&|& \K{i}\X{nn}\K{.}\STORE~\memarg ~|~ - \K{f}\X{nn}\K{.}\STORE~\memarg \\&&|& + \K{f}\X{nn}\K{.}\STORE~\memarg ~|~ + \K{v128.}\STORE~\memarg \\&&|& \K{i}\X{nn}\K{.}\LOAD\K{8\_}\sx~\memarg ~|~ \K{i}\X{nn}\K{.}\LOAD\K{16\_}\sx~\memarg ~|~ \K{i64.}\LOAD\K{32\_}\sx~\memarg \\&&|& \K{i}\X{nn}\K{.}\STORE\K{8}~\memarg ~|~ \K{i}\X{nn}\K{.}\STORE\K{16}~\memarg ~|~ \K{i64.}\STORE\K{32}~\memarg \\&&|& + \K{v128.}\LOAD\K{8x8}\_\sx~\memarg ~|~ + \K{v128.}\LOAD\K{16x4}\_\sx~\memarg ~|~ + \K{v128.}\LOAD\K{32x2}\_\sx~\memarg \\&&|& + \K{v128.}\LOAD\K{8\_splat}~\memarg ~|~ + \K{v128.}\LOAD\K{16\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\K{32\_splat}~\memarg ~|~ + \K{v128.}\LOAD\K{64\_splat}~\memarg \\&&|& \MEMORYSIZE \\&&|& \MEMORYGROW \\ \end{array} @@ -253,6 +436,8 @@ They all take a *memory immediate* |memarg| that contains an address *offset* an Integer loads and stores can optionally specify a *storage size* that is smaller than the :ref:`bit width ` of the respective value type. In the case of loads, a sign extension mode |sx| is then required to select appropriate behavior. +SIMD loads can specify a shape that is half the :ref:`bit width ` of |V128|. Each lane is half its usual size, and the sign extension mode |sx| then specifies how the smaller lane is extended to the larger lane. Alternatively, SIMD loads can perform a *splat*, such that only a single lane of the specified storage size is loaded, and the result is duplicated to all lanes. + The static address offset is added to the dynamic address operand, yielding a 33 bit *effective address* that is the zero-based index at which the memory is accessed. All values are read and written in |LittleEndian|_ byte order. A :ref:`trap ` results if any of the accessed memory bytes lies outside the address range implied by the memory's current size. diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 8bd8a0caa6..b37f9230bd 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -129,6 +129,7 @@ .. |sX#1| mathdef:: {\X{s#1}} .. |iX#1| mathdef:: {\X{i#1}} .. |fX#1| mathdef:: {\X{f#1}} +.. |vX#1| mathdef:: {\X{v#1}} .. |uN| mathdef:: \xref{syntax/values}{syntax-int}{\X{u}N} .. |uM| mathdef:: \xref{syntax/values}{syntax-int}{\X{u}M} @@ -378,6 +379,16 @@ .. |DEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{demote}} .. |REINTERPRET| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{reinterpret}} +.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{shuffle}} +.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{swizzle}} +.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{splat}} +.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{extract\_lane}} +.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{replace\_lane}} +.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{bitmask}} +.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{narrow}} +.. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{widen}} +.. |AVGRU| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{avgr\_u}} + .. Instructions, non-terminals @@ -397,6 +408,21 @@ .. |ftestop| mathdef:: \xref{syntax/instructions}{syntax-ftestop}{\X{ftestop}} .. |frelop| mathdef:: \xref{syntax/instructions}{syntax-frelop}{\X{frelop}} +.. |laneidx| mathdef:: \xref{syntax/instructions}{syntax-laneidx}{\X{laneidx}} +.. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} +.. |vsbinop| mathdef:: \xref{syntax/instructions}{syntax-vsbinop}{\X{vsbinop}} +.. |vsternop| mathdef:: \xref{syntax/instructions}{syntax-vsternop}{\X{vsternop}} +.. |vtestop| mathdef:: \xref{syntax/instructions}{syntax-vtestop}{\X{vtestop}} +.. |vshiftop| mathdef:: \xref{syntax/instructions}{syntax-vshiftop}{\X{vshiftop}} +.. |viunop| mathdef:: \xref{syntax/instructions}{syntax-viunop}{\X{viunop}} +.. |vibinop| mathdef:: \xref{syntax/instructions}{syntax-vibinop}{\X{vibinop}} +.. |viminmaxop| mathdef:: \xref{syntax/instructions}{syntax-viminmaxop}{\X{viminmaxop}} +.. |vsatbinop| mathdef:: \xref{syntax/instructions}{syntax-vsatbinop}{\X{vsatbinop}} +.. |vfunop| mathdef:: \xref{syntax/instructions}{syntax-vfunop}{\X{vfunop}} +.. |vfbinop| mathdef:: \xref{syntax/instructions}{syntax-vfbinop}{\X{vfbinop}} +.. |virelop| mathdef:: \xref{syntax/instructions}{syntax-virelop}{\X{virelop}} +.. |vfrelop| mathdef:: \xref{syntax/instructions}{syntax-vfrelop}{\X{vfrelop}} + .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} From e06fca29ef988f62992d562b2965927ee7b7c554 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 25 Aug 2020 15:17:53 -0700 Subject: [PATCH 216/378] Implement binary<->text for SIMD bitmask (#324) --- interpreter/binary/decode.ml | 3 +++ interpreter/binary/encode.ml | 5 ++++- interpreter/text/arrange.ml | 8 +++++++- 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index bf41182757..d889082fa3 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -298,6 +298,7 @@ let simd_prefix s = | 0x61l -> i8x16_neg | 0x62l -> i8x16_any_true | 0x63l -> i8x16_all_true + | 0x64l -> i8x16_bitmask | 0x6bl -> i8x16_shl | 0x6cl -> i8x16_shr_s | 0x65l -> i8x16_narrow_i16x8_s @@ -317,6 +318,7 @@ let simd_prefix s = | 0x81l -> i16x8_neg | 0x82l -> i16x8_any_true | 0x83l -> i16x8_all_true + | 0x84l -> i16x8_bitmask | 0x85l -> i16x8_narrow_i32x4_s | 0x86l -> i16x8_narrow_i32x4_u | 0x87l -> i16x8_widen_low_i8x16_s @@ -341,6 +343,7 @@ let simd_prefix s = | 0xa1l -> i32x4_neg | 0xa2l -> i32x4_any_true | 0xa3l -> i32x4_all_true + | 0xa4l -> i32x4_bitmask | 0xa7l -> i32x4_widen_low_i16x8_s | 0xa8l -> i32x4_widen_high_i16x8_s | 0xa9l -> i32x4_widen_low_i16x8_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index ae9ab9c06d..99a515ae6f 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -556,7 +556,10 @@ let encode m = | SimdShift V128Op.(I32x4 ShrS) -> simd_op 0xacl | SimdShift (_) -> failwith "TODO v128 shift" - | SimdBitmask (_) -> failwith "TODO v128 bitmask" + | SimdBitmask V128Op.(I8x16 Bitmask) -> simd_op 0x64l + | SimdBitmask V128Op.(I16x8 Bitmask) -> simd_op 0x84l + | SimdBitmask V128Op.(I32x4 Bitmask) -> simd_op 0xa4l + | SimdBitmask (_) -> assert false let const c = list instr c.it; end_ () diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 798edeb79b..69e2b00f0b 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -370,6 +370,12 @@ struct | I32x4 ShrS -> "i32x4.shr_s" | _ -> assert false + let bitmaskop = function + | I8x16 Bitmask -> "i8x16.bitmask" + | I16x8 Bitmask -> "i16x8.bitmask" + | I32x4 Bitmask -> "i32x4.bitmask" + | _ -> assert false + end let oper (intop, floatop, simdop) op = @@ -464,7 +470,7 @@ let rec instr e = | SimdExtract op -> SimdOp.extractop op, [] | SimdReplace op -> SimdOp.replaceop op, [] | SimdShift op -> SimdOp.shiftop op, [] - | SimdBitmask op -> failwith "unimplemented simd bitmask" + | SimdBitmask op -> SimdOp.bitmaskop op, [] in Node (head, inner) let const c = From b7aea060c737be59ec8d85da070e98067628da1c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 25 Aug 2020 15:26:56 -0700 Subject: [PATCH 217/378] Fix to_hex_string for I8 and I16 (#320) Print out the full i32 hex string, then extract the lower 2 or 4 chars. --- interpreter/exec/i16.ml | 7 +++++-- interpreter/exec/i8.ml | 7 +++++-- interpreter/text/arrange.ml | 20 +++++++++++--------- 3 files changed, 21 insertions(+), 13 deletions(-) diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index 94548be4cc..7aadf53f9c 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -5,8 +5,11 @@ include Int.Make (struct include Int32 let bitwidth = 16 - (* TODO incorrect for negative values. *) - let to_hex_string = Printf.sprintf "%lx" + let to_hex_string i = + (* Always print the full 32-bits (8 hex characters), and pad with 0s. + * Then only take the 4 least significant characters. *) + let s = Printf.sprintf "%08lx" i in + String.sub s ((String.length s) - 4) 4 let of_int64 = Int64.to_int32 let to_int64 = Int64.of_int32 diff --git a/interpreter/exec/i8.ml b/interpreter/exec/i8.ml index c2b6fa73a2..4643904df9 100644 --- a/interpreter/exec/i8.ml +++ b/interpreter/exec/i8.ml @@ -5,8 +5,11 @@ include Int.Make (struct include Int32 let bitwidth = 8 - (* TODO incorrect for negative values. *) - let to_hex_string = Printf.sprintf "%lx" + let to_hex_string i = + (* Always print the full 32-bits (8 hex characters), and pad with 0s. + * Then only take the 2 least significant characters. *) + let s = Printf.sprintf "%08lx" i in + String.sub s ((String.length s) - 2) 2 let of_int64 = Int64.to_int32 let to_int64 = Int64.of_int32 diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 69e2b00f0b..c5d7926e95 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -594,18 +594,20 @@ let module_ = module_with_var_opt None (* Scripts *) (* Converts a value to string depending on mode. *) -let literal mode lit = +let literal mode lit shape = let choose_mode bin not_bin = if mode = `Binary then bin else not_bin in - match lit.it with - | Values.I32 i -> choose_mode I32.to_hex_string I32.to_string_s i - | Values.I64 i -> choose_mode I64.to_hex_string I64.to_string_s i - | Values.F32 z -> choose_mode F32.to_hex_string F32.to_string z - | Values.F64 z -> choose_mode F64.to_hex_string F64.to_string z - | Values.V128 v -> choose_mode V128.to_hex_string V128.to_string v + match lit.it, shape with + | Values.I32 i, Some Simd.I8x16 -> choose_mode I8.to_hex_string I8.to_string_s i + | Values.I32 i, Some Simd.I16x8 -> choose_mode I16.to_hex_string I16.to_string_s i + | Values.I32 i, _ -> choose_mode I32.to_hex_string I32.to_string_s i + | Values.I64 i, _ -> choose_mode I64.to_hex_string I64.to_string_s i + | Values.F32 z, _ -> choose_mode F32.to_hex_string F32.to_string z + | Values.F64 z, _ -> choose_mode F64.to_hex_string F64.to_string z + | Values.V128 v, _ -> choose_mode V128.to_hex_string V128.to_string v (* Converts a literal into a constant instruction. *) let constant mode lit = - let lit_string = literal mode lit in + let lit_string = literal mode lit None in Node (constop lit ^ lit_string, []) let definition mode x_opt def = @@ -661,7 +663,7 @@ let result_simd mode res shape pats = * a SimdResult do not need the i32.const instruction *) let num_pat mode res = match res.it with - | LitPat lit -> literal mode lit + | LitPat lit -> literal mode lit (Some shape) | NanPat {it = Values.F32 n; _} | NanPat {it = Values.F64 n; _} -> nan n | _ -> assert false From 6c852bba2632b7e1009c8ef6960c91534a0231bb Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 26 Aug 2020 09:07:28 -0700 Subject: [PATCH 218/378] Complete binary<->text for SIMD shifts (#325) Adding all shr_u and also i64x2 shifts. --- interpreter/binary/decode.ml | 4 ++++ interpreter/binary/encode.ml | 8 +++++++- interpreter/text/arrange.ml | 6 ++++++ 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index d889082fa3..47ade495de 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -301,6 +301,7 @@ let simd_prefix s = | 0x64l -> i8x16_bitmask | 0x6bl -> i8x16_shl | 0x6cl -> i8x16_shr_s + | 0x6dl -> i8x16_shr_u | 0x65l -> i8x16_narrow_i16x8_s | 0x66l -> i8x16_narrow_i16x8_u | 0x6el -> i8x16_add @@ -327,6 +328,7 @@ let simd_prefix s = | 0x8al -> i16x8_widen_high_i8x16_u | 0x8bl -> i16x8_shl | 0x8cl -> i16x8_shr_s + | 0x8dl -> i16x8_shr_u | 0x8el -> i16x8_add | 0x8fl -> i16x8_add_saturate_s | 0x90l -> i16x8_add_saturate_u @@ -350,6 +352,7 @@ let simd_prefix s = | 0xaal -> i32x4_widen_high_i16x8_u | 0xabl -> i32x4_shl | 0xacl -> i32x4_shr_s + | 0xadl -> i32x4_shr_u | 0xael -> i32x4_add | 0xb1l -> i32x4_sub | 0xb5l -> i32x4_mul @@ -360,6 +363,7 @@ let simd_prefix s = | 0xc1l -> i64x2_neg | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s + | 0xcdl -> i64x2_shr_u | 0xcel -> i64x2_add | 0xd1l -> i64x2_sub | 0xd5l -> i64x2_mul diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 99a515ae6f..87a14624bd 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -550,11 +550,17 @@ let encode m = | SimdShift V128Op.(I8x16 Shl) -> simd_op 0x6bl | SimdShift V128Op.(I8x16 ShrS) -> simd_op 0x6cl + | SimdShift V128Op.(I8x16 ShrU) -> simd_op 0x6dl | SimdShift V128Op.(I16x8 Shl) -> simd_op 0x8bl | SimdShift V128Op.(I16x8 ShrS) -> simd_op 0x8cl + | SimdShift V128Op.(I16x8 ShrU) -> simd_op 0x8dl | SimdShift V128Op.(I32x4 Shl) -> simd_op 0xabl | SimdShift V128Op.(I32x4 ShrS) -> simd_op 0xacl - | SimdShift (_) -> failwith "TODO v128 shift" + | SimdShift V128Op.(I32x4 ShrU) -> simd_op 0xadl + | SimdShift V128Op.(I64x2 Shl) -> simd_op 0xcbl + | SimdShift V128Op.(I64x2 ShrS) -> simd_op 0xccl + | SimdShift V128Op.(I64x2 ShrU) -> simd_op 0xcdl + | SimdShift (_) -> assert false | SimdBitmask V128Op.(I8x16 Bitmask) -> simd_op 0x64l | SimdBitmask V128Op.(I16x8 Bitmask) -> simd_op 0x84l diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index c5d7926e95..7998e270c4 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -364,10 +364,16 @@ struct let shiftop = function | I8x16 Shl -> "i8x16.shl" | I8x16 ShrS -> "i8x16.shr_s" + | I8x16 ShrU -> "i8x16.shr_u" | I16x8 Shl -> "i16x8.shl" | I16x8 ShrS -> "i16x8.shr_s" + | I16x8 ShrU -> "i16x8.shr_u" | I32x4 Shl -> "i32x4.shl" | I32x4 ShrS -> "i32x4.shr_s" + | I32x4 ShrU -> "i32x4.shr_u" + | I64x2 Shl -> "i64x2.shl" + | I64x2 ShrS -> "i64x2.shr_s" + | I64x2 ShrU -> "i64x2.shr_u" | _ -> assert false let bitmaskop = function From d051fb6874850e01114e9181cde00708b2990f9e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 7 Aug 2020 18:03:26 -0700 Subject: [PATCH 219/378] Implement SIMD load splat and load extend Add more pack types for SIMD load splat and load extends. --- interpreter/binary/encode.ml | 2 ++ interpreter/exec/simd.ml | 14 ++++++++++++++ interpreter/runtime/memory.ml | 18 ++++++++++++++++++ interpreter/syntax/operators.ml | 21 +++++++++++++++++++++ interpreter/syntax/types.ml | 4 ++-- interpreter/text/arrange.ml | 4 ++++ interpreter/text/lexer.mll | 14 ++++++++++++++ test/core/simd/simd_align.wast | 24 ++++++++++++------------ 8 files changed, 87 insertions(+), 14 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 87a14624bd..9adbbe75e0 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -567,6 +567,8 @@ let encode m = | SimdBitmask V128Op.(I32x4 Bitmask) -> simd_op 0xa4l | SimdBitmask (_) -> assert false + | _ -> assert false + let const c = list instr c.it; end_ () diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 66a65883cb..f087c8ecd7 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -175,6 +175,10 @@ sig val widen_low_u : t -> t val widen_high_u : t -> t end + module I64x2_convert : sig + val widen_low_s : t -> t + val widen_low_u : t -> t + end module F32x4_convert : sig val convert_i32x4_s : t -> t val convert_i32x4_u : t -> t @@ -405,6 +409,16 @@ struct let widen_high_u = widen Lib.List.drop 0xffffl end + module I64x2_convert = struct + let widen mask x = + Rep.of_i64x2 + (List.map + (fun i32 -> Int64.(logand mask (of_int32 i32))) + (Lib.List.take 2 (Rep.to_i32x4 x))) + let widen_low_s = widen 0xffffffffffffffffL + let widen_low_u = widen 0xffffffffL + end + module F32x4_convert = struct let convert f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) let convert_i32x4_s = convert F32_convert.convert_i32_s diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 2c9f198f33..9fb1b30fb9 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -122,6 +122,23 @@ let extend x n = function | ZX -> x | SX -> let sh = 64 - 8 * n in Int64.(shift_right (shift_left x sh) sh) +let load_simd_packed sz ext x = + let b = Bytes.create 16 in + Bytes.set_int64_le b 0 x; + let v = V128.of_bits (Bytes.to_string b) in + match sz, ext with + | (Pack8x8, SX) -> V128 (V128.I16x8_convert.widen_low_s v) + | (Pack8x8, ZX) -> V128 (V128.I16x8_convert.widen_low_u v) + | (Pack16x4, SX) -> V128 (V128.I32x4_convert.widen_low_s v) + | (Pack16x4, ZX) -> V128 (V128.I32x4_convert.widen_low_u v) + | (Pack32x2, SX) -> V128 (V128.I64x2_convert.widen_low_s v) + | (Pack32x2, ZX) -> V128 (V128.I64x2_convert.widen_low_u v) + | (Pack8, ZX) -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) + | (Pack16, ZX) -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) + | (Pack32, ZX) -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) + | (Pack64, ZX) -> V128 (V128.I64x2.splat x) + | _ -> assert false + let load_packed sz ext mem a o t = assert (packed_size sz <= Types.size t); let n = packed_size sz in @@ -129,6 +146,7 @@ let load_packed sz ext mem a o t = match t with | I32Type -> I32 (Int64.to_int32 x) | I64Type -> I64 x + | V128Type -> load_simd_packed sz ext x | _ -> raise Type let store_packed sz mem a o v = diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 7a51514f29..33568f87fb 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -218,7 +218,28 @@ let memory_grow = MemoryGrow (* SIMD *) let v128_load align offset = Load {ty = V128Type; align; offset; sz = None} +let i16x8_load8x8_s align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack8x8, SX)} +let i16x8_load8x8_u align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack8x8, ZX)} +let i32x4_load16x4_s align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack16x4, SX)} +let i32x4_load16x4_u align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack16x4, ZX)} +let i64x2_load32x2_s align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack32x2, SX)} +let i64x2_load32x2_u align offset = + Load {ty = V128Type; align; offset; sz = Some (Pack32x2, ZX)} +let v8x16_load_splat align offset = + Load {ty= V128Type; align; offset; sz = Some (Pack8, ZX)} +let v16x8_load_splat align offset = + Load {ty= V128Type; align; offset; sz = Some (Pack16, ZX)} +let v32x4_load_splat align offset = + Load {ty= V128Type; align; offset; sz = Some (Pack32, ZX)} +let v64x2_load_splat align offset = + Load {ty= V128Type; align; offset; sz = Some (Pack64, ZX)} let v128_store align offset = Store {ty = V128Type; align; offset; sz = None} + let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) let v128_andnot = Binary (V128 (V128Op.V128 V128Op.AndNot)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index db06fabf80..f67e16ed1f 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -16,7 +16,7 @@ type extern_type = | ExternMemoryType of memory_type | ExternGlobalType of global_type -type pack_size = Pack8 | Pack16 | Pack32 +type pack_size = Pack8 | Pack16 | Pack32 | Pack64 | Pack8x8 | Pack16x4 | Pack32x2 type extension = SX | ZX @@ -31,7 +31,7 @@ let packed_size = function | Pack8 -> 1 | Pack16 -> 2 | Pack32 -> 4 - + | Pack64 | Pack8x8 | Pack16x4 | Pack32x2 -> 8 (* Subtyping *) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 7998e270c4..26484d66a3 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -77,6 +77,10 @@ let pack_size = function | Pack8 -> "8" | Pack16 -> "16" | Pack32 -> "32" + | Pack64 -> "64" + | Pack8x8 -> "8x8" + | Pack16x4 -> "16x4" + | Pack32x2 -> "32x2" let extension = function | SX -> "_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 0c0ce1c17f..1dd17338e4 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -288,6 +288,20 @@ rule token = parse (ext s i64_load8_s i64_load8_u (opt a 0)) (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } + | "i16x8.load8x8_"(sign as s) + { LOAD (fun a o -> (ext s i16x8_load8x8_s i16x8_load8x8_u (opt a 3)) o) } + | "i32x4.load16x4_"(sign as s) + { LOAD (fun a o -> (ext s i32x4_load16x4_s i32x4_load16x4_u (opt a 3)) o) } + | "i64x2.load32x2_"(sign as s) + { LOAD (fun a o -> (ext s i64x2_load32x2_s i64x2_load32x2_u (opt a 3)) o) } + | "v8x16.load_splat" + { LOAD (fun a o -> (v8x16_load_splat (opt a 0)) o) } + | "v16x8.load_splat" + { LOAD (fun a o -> (v16x8_load_splat (opt a 1)) o) } + | "v32x4.load_splat" + { LOAD (fun a o -> (v32x4_load_splat (opt a 2)) o) } + | "v64x2.load_splat" + { LOAD (fun a o -> (v64x2_load_splat (opt a 3)) o) } | (ixx as t)".store"(mem_size as sz) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; STORE (fun a o -> diff --git a/test/core/simd/simd_align.wast b/test/core/simd/simd_align.wast index 35fb68036b..79628f226c 100644 --- a/test/core/simd/simd_align.wast +++ b/test/core/simd/simd_align.wast @@ -105,7 +105,7 @@ (module quote "(memory 1) (func (drop (v128.load align=-1 (i32.const 0))))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -123,7 +123,7 @@ (module quote "(memory 1) (func (v128.store align=-1 (i32.const 0) (v128.const i32x4 0 0 0 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -141,7 +141,7 @@ (module quote "(memory 1) (func (result v128) (i16x8.load8x8_s align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -159,7 +159,7 @@ (module quote "(memory 1) (func (result v128) (i16x8.load8x8_u align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -177,7 +177,7 @@ (module quote "(memory 1) (func (result v128) (i32x4.load16x4_s align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -195,7 +195,7 @@ (module quote "(memory 1) (func (result v128) (i32x4.load16x4_u align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -213,7 +213,7 @@ (module quote "(memory 1) (func (result v128) (i64x2.load32x2_s align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -231,7 +231,7 @@ (module quote "(memory 1) (func (result v128) (i64x2.load32x2_u align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -249,7 +249,7 @@ (module quote "(memory 1) (func (result v128) (v8x16.load_splat align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -261,7 +261,7 @@ (module quote "(memory 1) (func (result v128) (v16x8.load_splat align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -273,7 +273,7 @@ (module quote "(memory 1) (func (result v128) (v32x4.load_splat align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote @@ -291,7 +291,7 @@ (module quote "(memory 1) (func (result v128) (v64x2.load_splat align=-1 (i32.const 0)))" ) - "alignment must be a power of two" + "unknown operator" ) (assert_malformed (module quote From 9303b606e7fc05e214f77b93ec93fa5cd6d86247 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 27 Aug 2020 14:09:35 -0700 Subject: [PATCH 220/378] Create new pack_simd type and SimdLoad AST --- interpreter/exec/eval.ml | 11 +++++++++ interpreter/runtime/memory.ml | 41 ++++++++++++++++++--------------- interpreter/runtime/memory.mli | 3 +++ interpreter/syntax/ast.ml | 2 ++ interpreter/syntax/operators.ml | 22 +++++++++--------- interpreter/syntax/types.ml | 16 ++++++++++--- interpreter/text/arrange.ml | 4 +--- interpreter/valid/valid.ml | 4 ++++ 8 files changed, 68 insertions(+), 35 deletions(-) diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 14a6ccd9ec..f764c21914 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -220,6 +220,17 @@ let rec step (c : config) : config = in v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) + | SimdLoad {offset; ty; sz; _}, I32 i :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let addr = I64_convert.extend_i32_u i in + (try + let v = + match sz with + | None -> Memory.load_value mem addr offset ty + | Some (simd_load) -> Memory.load_simd_packed simd_load mem addr offset ty + in v :: vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) + | Store {offset; sz; _}, v :: I32 i :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 9fb1b30fb9..640dbf7323 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -122,23 +122,6 @@ let extend x n = function | ZX -> x | SX -> let sh = 64 - 8 * n in Int64.(shift_right (shift_left x sh) sh) -let load_simd_packed sz ext x = - let b = Bytes.create 16 in - Bytes.set_int64_le b 0 x; - let v = V128.of_bits (Bytes.to_string b) in - match sz, ext with - | (Pack8x8, SX) -> V128 (V128.I16x8_convert.widen_low_s v) - | (Pack8x8, ZX) -> V128 (V128.I16x8_convert.widen_low_u v) - | (Pack16x4, SX) -> V128 (V128.I32x4_convert.widen_low_s v) - | (Pack16x4, ZX) -> V128 (V128.I32x4_convert.widen_low_u v) - | (Pack32x2, SX) -> V128 (V128.I64x2_convert.widen_low_s v) - | (Pack32x2, ZX) -> V128 (V128.I64x2_convert.widen_low_u v) - | (Pack8, ZX) -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) - | (Pack16, ZX) -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) - | (Pack32, ZX) -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) - | (Pack64, ZX) -> V128 (V128.I64x2.splat x) - | _ -> assert false - let load_packed sz ext mem a o t = assert (packed_size sz <= Types.size t); let n = packed_size sz in @@ -146,7 +129,6 @@ let load_packed sz ext mem a o t = match t with | I32Type -> I32 (Int64.to_int32 x) | I64Type -> I64 x - | V128Type -> load_simd_packed sz ext x | _ -> raise Type let store_packed sz mem a o v = @@ -158,3 +140,26 @@ let store_packed sz mem a o v = | I64 x -> x | _ -> raise Type in storen mem a o n x + +let load_simd_packed simd_load mem a o t = + let ext = match simd_load with + | PackExtend (_, ext) -> ext + | _ -> ZX + in + let n = packed_simd_size simd_load in + let x = extend (loadn mem a o n) n ext in + let b = Bytes.create 16 in + Bytes.set_int64_le b 0 x; + let v = V128.of_bits (Bytes.to_string b) in + match simd_load with + | PackExtend (Pack8, SX) -> V128 (V128.I16x8_convert.widen_low_s v) + | PackExtend (Pack8, ZX) -> V128 (V128.I16x8_convert.widen_low_u v) + | PackExtend (Pack16, SX) -> V128 (V128.I32x4_convert.widen_low_s v) + | PackExtend (Pack16, ZX) -> V128 (V128.I32x4_convert.widen_low_u v) + | PackExtend (Pack32, SX) -> V128 (V128.I64x2_convert.widen_low_s v) + | PackExtend (Pack32, ZX) -> V128 (V128.I64x2_convert.widen_low_u v) + | PackSplat (Pack8) -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) + | PackSplat (Pack16) -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) + | PackSplat (Pack32) -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) + | PackSplat (Pack64) -> V128 (V128.I64x2.splat x) + | _ -> assert false diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index f611e46477..8c90d03713 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -38,3 +38,6 @@ val load_packed : val store_packed : pack_size -> memory -> address -> offset -> value -> unit (* raises Type, Bounds *) +val load_simd_packed : + pack_simd -> memory -> address -> offset -> value_type -> value + (* raises Type, Bounds *) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index eb976f57fb..8820ccb9fe 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -111,6 +111,7 @@ type 'a memop = type loadop = (pack_size * extension) memop type storeop = pack_size memop +type simd_loadop = pack_simd memop (* Expressions *) @@ -141,6 +142,7 @@ and instr' = | GlobalGet of var (* read global variable *) | GlobalSet of var (* write global variable *) | Load of loadop (* read memory at address *) + | SimdLoad of simd_loadop (* read memory at address *) | Store of storeop (* write memory at address *) | MemorySize (* size of linear memory *) | MemoryGrow (* grow linear memory *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 33568f87fb..9b472871c0 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -217,27 +217,27 @@ let memory_size = MemorySize let memory_grow = MemoryGrow (* SIMD *) -let v128_load align offset = Load {ty = V128Type; align; offset; sz = None} +let v128_load align offset = SimdLoad {ty = V128Type; align; offset; sz = None} let i16x8_load8x8_s align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack8x8, SX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack8, SX))} let i16x8_load8x8_u align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack8x8, ZX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack8, ZX))} let i32x4_load16x4_s align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack16x4, SX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack16, SX))} let i32x4_load16x4_u align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack16x4, ZX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack16, ZX))} let i64x2_load32x2_s align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack32x2, SX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack32, SX))} let i64x2_load32x2_u align offset = - Load {ty = V128Type; align; offset; sz = Some (Pack32x2, ZX)} + SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack32, ZX))} let v8x16_load_splat align offset = - Load {ty= V128Type; align; offset; sz = Some (Pack8, ZX)} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack8))} let v16x8_load_splat align offset = - Load {ty= V128Type; align; offset; sz = Some (Pack16, ZX)} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack16))} let v32x4_load_splat align offset = - Load {ty= V128Type; align; offset; sz = Some (Pack32, ZX)} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack32))} let v64x2_load_splat align offset = - Load {ty= V128Type; align; offset; sz = Some (Pack64, ZX)} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack64))} let v128_store align offset = Store {ty = V128Type; align; offset; sz = None} let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index f67e16ed1f..98c63d8e4d 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -16,9 +16,11 @@ type extern_type = | ExternMemoryType of memory_type | ExternGlobalType of global_type -type pack_size = Pack8 | Pack16 | Pack32 | Pack64 | Pack8x8 | Pack16x4 | Pack32x2 +type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX - +type pack_simd = + | PackSplat of pack_size + | PackExtend of pack_size * extension (* Attributes *) @@ -31,7 +33,15 @@ let packed_size = function | Pack8 -> 1 | Pack16 -> 2 | Pack32 -> 4 - | Pack64 | Pack8x8 | Pack16x4 | Pack32x2 -> 8 + | Pack64 -> 8 + +let packed_simd_size = function + | PackSplat sx -> packed_size sx + | PackExtend _ -> 8 + +let pack_size_of_pack_simd = function + | PackSplat sx -> sx + | PackExtend _ -> Pack64 (* Subtyping *) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 26484d66a3..d13ebf7e28 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -78,9 +78,6 @@ let pack_size = function | Pack16 -> "16" | Pack32 -> "32" | Pack64 -> "64" - | Pack8x8 -> "8x8" - | Pack16x4 -> "16x4" - | Pack32x2 -> "32x2" let extension = function | SX -> "_s" @@ -467,6 +464,7 @@ let rec instr e = | GlobalGet x -> "global.get " ^ var x, [] | GlobalSet x -> "global.set " ^ var x, [] | Load op -> loadop op, [] + | SimdLoad op -> failwith "unimplemented SimdLoad arrange" | Store op -> storeop op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 4564820f4d..a51ff945c3 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -303,6 +303,10 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = check_memop c memop (Lib.Option.map fst) e.at; [I32Type] --> [memop.ty] + | SimdLoad memop -> + check_memop c memop (Lib.Option.map pack_size_of_pack_simd) e.at; + [I32Type] --> [memop.ty] + | Store memop -> check_memop c memop (fun sz -> sz) e.at; [I32Type; memop.ty] --> [] From c5d59f5e0189e80a4e5e39ec11a717e4f433da4a Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 27 Aug 2020 14:13:54 -0700 Subject: [PATCH 221/378] Reorder functions --- interpreter/runtime/memory.ml | 20 ++++++++++---------- interpreter/runtime/memory.mli | 6 +++--- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 640dbf7323..b51c3b8290 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -131,16 +131,6 @@ let load_packed sz ext mem a o t = | I64Type -> I64 x | _ -> raise Type -let store_packed sz mem a o v = - assert (packed_size sz <= Types.size (Values.type_of v)); - let n = packed_size sz in - let x = - match v with - | I32 x -> Int64.of_int32 x - | I64 x -> x - | _ -> raise Type - in storen mem a o n x - let load_simd_packed simd_load mem a o t = let ext = match simd_load with | PackExtend (_, ext) -> ext @@ -163,3 +153,13 @@ let load_simd_packed simd_load mem a o t = | PackSplat (Pack32) -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) | PackSplat (Pack64) -> V128 (V128.I64x2.splat x) | _ -> assert false + +let store_packed sz mem a o v = + assert (packed_size sz <= Types.size (Values.type_of v)); + let n = packed_size sz in + let x = + match v with + | I32 x -> Int64.of_int32 x + | I64 x -> x + | _ -> raise Type + in storen mem a o n x diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index 8c90d03713..5affaf36f0 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -35,9 +35,9 @@ val store_value : val load_packed : pack_size -> extension -> memory -> address -> offset -> value_type -> value (* raises Type, Bounds *) -val store_packed : - pack_size -> memory -> address -> offset -> value -> unit - (* raises Type, Bounds *) val load_simd_packed : pack_simd -> memory -> address -> offset -> value_type -> value (* raises Type, Bounds *) +val store_packed : + pack_size -> memory -> address -> offset -> value -> unit + (* raises Type, Bounds *) From 38045d7ea7a1d523e9ebb0408a5570a56458c4c9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 27 Aug 2020 14:14:18 -0700 Subject: [PATCH 222/378] Formatting --- interpreter/syntax/operators.ml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 9b472871c0..005d11dd76 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -231,13 +231,13 @@ let i64x2_load32x2_s align offset = let i64x2_load32x2_u align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack32, ZX))} let v8x16_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack8))} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack8)} let v16x8_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack16))} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack16)} let v32x4_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack32))} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack32)} let v64x2_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat (Pack64))} + SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack64)} let v128_store align offset = Store {ty = V128Type; align; offset; sz = None} let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) From 0f07076d0df7c9fd4a554d4c11ac605a6f44b082 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 27 Aug 2020 14:18:24 -0700 Subject: [PATCH 223/378] Simplify simd packed loads --- interpreter/runtime/memory.ml | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index b51c3b8290..93deb52d66 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -132,12 +132,9 @@ let load_packed sz ext mem a o t = | _ -> raise Type let load_simd_packed simd_load mem a o t = - let ext = match simd_load with - | PackExtend (_, ext) -> ext - | _ -> ZX - in let n = packed_simd_size simd_load in - let x = extend (loadn mem a o n) n ext in + assert (n <= Types.size t); + let x = loadn mem a o n in let b = Bytes.create 16 in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in From e8b2f1f3b498fc2f3ab1d78f8824c8d9b3d5aa3e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 28 Aug 2020 09:53:20 -0700 Subject: [PATCH 224/378] Add SimdStore and make simd_loadop more consistent --- interpreter/exec/eval.ml | 10 +++++++++- interpreter/runtime/memory.ml | 26 +++++++++++++------------- interpreter/runtime/memory.mli | 2 +- interpreter/syntax/ast.ml | 7 +++++-- interpreter/syntax/operators.ml | 22 +++++++++++----------- interpreter/syntax/types.ml | 14 ++++---------- interpreter/text/arrange.ml | 1 + interpreter/valid/valid.ml | 6 +++++- 8 files changed, 49 insertions(+), 39 deletions(-) diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index f764c21914..14135ea0c8 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -227,7 +227,7 @@ let rec step (c : config) : config = let v = match sz with | None -> Memory.load_value mem addr offset ty - | Some (simd_load) -> Memory.load_simd_packed simd_load mem addr offset ty + | Some (pack_size, simd_load) -> Memory.load_simd_packed pack_size simd_load mem addr offset ty in v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) @@ -242,6 +242,14 @@ let rec step (c : config) : config = vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); + | SimdStore {offset; sz; _}, v :: I32 i :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let addr = I64_convert.extend_i32_u i in + (try + Memory.store_value mem addr offset v; + vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); + | MemorySize, vs -> let mem = memory frame.inst (0l @@ e.at) in I32 (Memory.size mem) :: vs, [] diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 93deb52d66..ffb65432fc 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -131,24 +131,24 @@ let load_packed sz ext mem a o t = | I64Type -> I64 x | _ -> raise Type -let load_simd_packed simd_load mem a o t = - let n = packed_simd_size simd_load in +let load_simd_packed pack_size simd_load mem a o t = + let n = packed_size pack_size in assert (n <= Types.size t); let x = loadn mem a o n in let b = Bytes.create 16 in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in - match simd_load with - | PackExtend (Pack8, SX) -> V128 (V128.I16x8_convert.widen_low_s v) - | PackExtend (Pack8, ZX) -> V128 (V128.I16x8_convert.widen_low_u v) - | PackExtend (Pack16, SX) -> V128 (V128.I32x4_convert.widen_low_s v) - | PackExtend (Pack16, ZX) -> V128 (V128.I32x4_convert.widen_low_u v) - | PackExtend (Pack32, SX) -> V128 (V128.I64x2_convert.widen_low_s v) - | PackExtend (Pack32, ZX) -> V128 (V128.I64x2_convert.widen_low_u v) - | PackSplat (Pack8) -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) - | PackSplat (Pack16) -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) - | PackSplat (Pack32) -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) - | PackSplat (Pack64) -> V128 (V128.I64x2.splat x) + match pack_size, simd_load with + | Pack64, Pack8x8 SX -> V128 (V128.I16x8_convert.widen_low_s v) + | Pack64, Pack8x8 ZX -> V128 (V128.I16x8_convert.widen_low_u v) + | Pack64, Pack16x4 SX -> V128 (V128.I32x4_convert.widen_low_s v) + | Pack64, Pack16x4 ZX -> V128 (V128.I32x4_convert.widen_low_u v) + | Pack64, Pack32x2 SX -> V128 (V128.I64x2_convert.widen_low_s v) + | Pack64, Pack32x2 ZX -> V128 (V128.I64x2_convert.widen_low_u v) + | Pack8, PackSplat -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) + | Pack16, PackSplat -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) + | Pack32, PackSplat -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) + | Pack64, PackSplat -> V128 (V128.I64x2.splat x) | _ -> assert false let store_packed sz mem a o v = diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index 5affaf36f0..7936d02418 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -36,7 +36,7 @@ val load_packed : pack_size -> extension -> memory -> address -> offset -> value_type -> value (* raises Type, Bounds *) val load_simd_packed : - pack_simd -> memory -> address -> offset -> value_type -> value + pack_size -> pack_simd -> memory -> address -> offset -> value_type -> value (* raises Type, Bounds *) val store_packed : pack_size -> memory -> address -> offset -> value -> unit diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 8820ccb9fe..1a73ec0c10 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -111,7 +111,9 @@ type 'a memop = type loadop = (pack_size * extension) memop type storeop = pack_size memop -type simd_loadop = pack_simd memop +type simd_loadop = (pack_size * pack_simd) memop +type empty = | +type simd_storeop = empty memop (* Expressions *) @@ -142,8 +144,9 @@ and instr' = | GlobalGet of var (* read global variable *) | GlobalSet of var (* write global variable *) | Load of loadop (* read memory at address *) - | SimdLoad of simd_loadop (* read memory at address *) | Store of storeop (* write memory at address *) + | SimdLoad of simd_loadop (* read memory at address *) + | SimdStore of simd_storeop (* write memory at address *) | MemorySize (* size of linear memory *) | MemoryGrow (* grow linear memory *) | Const of literal (* constant *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 005d11dd76..8ac4feea01 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -219,26 +219,26 @@ let memory_grow = MemoryGrow (* SIMD *) let v128_load align offset = SimdLoad {ty = V128Type; align; offset; sz = None} let i16x8_load8x8_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack8, SX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 SX)} let i16x8_load8x8_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack8, ZX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 ZX)} let i32x4_load16x4_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack16, SX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 SX)} let i32x4_load16x4_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack16, ZX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 ZX)} let i64x2_load32x2_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack32, SX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 SX)} let i64x2_load32x2_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (PackExtend (Pack32, ZX))} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 ZX)} let v8x16_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack8)} + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack8, PackSplat)} let v16x8_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack16)} + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack16, PackSplat)} let v32x4_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack32)} + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackSplat)} let v64x2_load_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (PackSplat Pack64)} -let v128_store align offset = Store {ty = V128Type; align; offset; sz = None} + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} +let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = None} let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 98c63d8e4d..4b440e1967 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -19,8 +19,10 @@ type extern_type = type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX type pack_simd = - | PackSplat of pack_size - | PackExtend of pack_size * extension + | PackSplat + | Pack8x8 of extension + | Pack16x4 of extension + | Pack32x2 of extension (* Attributes *) @@ -35,14 +37,6 @@ let packed_size = function | Pack32 -> 4 | Pack64 -> 8 -let packed_simd_size = function - | PackSplat sx -> packed_size sx - | PackExtend _ -> 8 - -let pack_size_of_pack_simd = function - | PackSplat sx -> sx - | PackExtend _ -> Pack64 - (* Subtyping *) let match_limits lim1 lim2 = diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index d13ebf7e28..7a146f79c1 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -465,6 +465,7 @@ let rec instr e = | GlobalSet x -> "global.set " ^ var x, [] | Load op -> loadop op, [] | SimdLoad op -> failwith "unimplemented SimdLoad arrange" + | SimdStore op -> failwith "unimplemented SimdStore arrange" | Store op -> storeop op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index a51ff945c3..7a6dd4f17d 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -304,13 +304,17 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = [I32Type] --> [memop.ty] | SimdLoad memop -> - check_memop c memop (Lib.Option.map pack_size_of_pack_simd) e.at; + check_memop c memop (Lib.Option.map fst) e.at; [I32Type] --> [memop.ty] | Store memop -> check_memop c memop (fun sz -> sz) e.at; [I32Type; memop.ty] --> [] + | SimdStore memop -> + check_memop c memop (fun _ -> None) e.at; + [I32Type; memop.ty] --> [] + | MemorySize -> ignore (memory c (0l @@ e.at)); [] --> [I32Type] From 403859f50c46a30d9a089a2f5b532881e9cf79b9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 28 Aug 2020 09:57:00 -0700 Subject: [PATCH 225/378] Implement JS output for SIMD (#331) * Implement JS output for SIMD V128 is not exposed to JS at all, so transform all functions with V128 in the signatures into consts, compare with the expected value, and reduce it to a int32. An assertion against a SimdResult needs to be converted into a plain Const containing a v128. This conversion is tricky since SimdResult can contain both LitPat and NanPat. NaNs need special treatment to mask and compare to a canonical value. For simplicity, we build a mask for all the patterns in a SimdResult (even for literals, which will have a mask with all bits set). That way the test is consistent: - v128.const(mask) - v128.and - v128.const(expected) - i8x16.eq - i8x16.all_true - br_if 0 to unreachable * Formatting fixes Co-authored-by: Andreas Rossberg * Remove redundant prefixes Co-authored-by: Andreas Rossberg --- interpreter/exec/simd.ml | 10 ++++++ interpreter/script/js.ml | 66 ++++++++++++++++++++++++++++++++-------- test/core/run.py | 12 +++----- 3 files changed, 68 insertions(+), 20 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 66a65883cb..fe59621904 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -142,6 +142,11 @@ sig val to_i16x8 : t -> I16.t list val to_i32x4 : t -> I32.t list + val of_i8x16 : I32.t list -> t + val of_i16x8 : I32.t list -> t + val of_i32x4 : I32.t list -> t + val of_i64x2 : I64.t list -> t + (* We need type t = t to ensure that all submodule types are S.t, * then callers don't have to change *) module I8x16 : Int with type t = t and type lane = I8.t @@ -195,6 +200,11 @@ struct let to_i16x8 = Rep.to_i16x8 let to_i32x4 = Rep.to_i32x4 + let of_i8x16 = Rep.of_i8x16 + let of_i16x8 = Rep.of_i16x8 + let of_i32x4 = Rep.of_i32x4 + let of_i64x2 = Rep.of_i64x2 + module V128 : Vec with type t = Rep.t = struct type t = Rep.t let to_shape = Rep.to_i64x2 diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index d2347301f8..446fcf5da2 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -231,6 +231,10 @@ let run ts at = let assert_return ress ts at = let test res = + let nan_bitmask_of = function + | CanonicalNan -> abs_mask_of (* must only differ from the canonical NaN in its sign bit *) + | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) + in match res.it with | NumResult { it = LitPat lit; _ } -> let t', reinterpret = reinterpret_of (Values.type_of lit.it) in @@ -246,21 +250,53 @@ let assert_return ress ts at = | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> n in - let nan_bitmask_of = - match nan with - | CanonicalNan -> abs_mask_of (* must only differ from the canonical NaN in its sign bit *) - | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) - in let t = Values.type_of nanop.it in let t', reinterpret = reinterpret_of t in [ reinterpret @@ at; - Const (nan_bitmask_of t' @@ at) @@ at; + Const (nan_bitmask_of nan t' @@ at) @@ at; Binary (and_of t') @@ at; Const (canonical_nan_of t' @@ at) @@ at; Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | SimdResult _ -> failwith "unimplemented" + | SimdResult (shape, pats) -> + (* SimdResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals + * and NaNs. For NaNs, we need to mask it and compare with a canonical NaN. To simplify + * comparison, we build masks even for literals (will just be all set), collect them into + * a v128, then compare the entire 128 bits. + *) + let mask_and_canonical = function + | LitPat {it = Values.I32 _ as i; _} -> Values.I32 (Int32.minus_one), i + | LitPat {it = Values.I64 _ as i; _} -> Values.I64 (Int64.minus_one), i + | LitPat {it = Values.F32 f; _} -> Values.I32 (Int32.minus_one), Values.I32 (I32_convert.reinterpret_f32 f) + | LitPat {it = Values.F64 f; _} -> Values.I64 (Int64.minus_one), Values.I64 (I64_convert.reinterpret_f64 f) + | NanPat {it = Values.F32 nan; _} -> nan_bitmask_of nan I32Type, canonical_nan_of I32Type + | NanPat {it = Values.F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type + | _ -> assert false + in + let masks, canons = List.split (List.map (fun p -> mask_and_canonical p.it) pats) in + let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in + let mask, expected = match shape with + | Simd.I8x16 -> all_ones, V128.of_i8x16 (List.map Values.I32Value.of_value canons) + | Simd.I16x8 -> all_ones, V128.of_i16x8 (List.map Values.I32Value.of_value canons) + | Simd.I32x4 -> all_ones, V128.of_i32x4 (List.map Values.I32Value.of_value canons) + | Simd.I64x2 -> all_ones, V128.of_i64x2 (List.map Values.I64Value.of_value canons) + | Simd.F32x4 -> + V128.of_i32x4 (List.map Values.I32Value.of_value masks), + V128.of_i32x4 (List.map Values.I32Value.of_value canons) + | Simd.F64x2 -> + V128.of_i64x2 (List.map Values.I64Value.of_value masks), + V128.of_i64x2 (List.map Values.I64Value.of_value canons) + in + [ + Const (Values.V128 mask @@ at) @@ at; + Binary (Values.V128 V128Op.(V128 And)) @@ at; + Const (Values.V128 expected @@ at) @@ at; + Binary (Values.V128 V128Op.(I8x16 Eq)) @@ at; + (* If all lanes are non-zero, then they are equal *) + Test (Values.V128 V128Op.(I8x16 AllTrue)) @@ at; + Test (Values.I32 I32Op.Eqz) @@ at; + BrIf (0l @@ at) @@ at ] in [], List.flatten (List.rev_map test ress) let wrap module_name item_name wrap_action wrap_assertion at = @@ -332,21 +368,25 @@ let of_literal lit = | Values.I64 i -> "int64(\"" ^ I64.to_string_s i ^ "\")" | Values.F32 z -> of_float (F32.to_float z) | Values.F64 z -> of_float (F64.to_float z) - | Values.V128 v -> failwith "TODO v128" (* FIXME should this be even valid *) + | Values.V128 v -> "v128(\"" ^ V128.to_string v ^ "\")" let of_nan = function | CanonicalNan -> "nan:canonical" | ArithmeticNan -> "nan:arithmetic" -let of_result res = - match res.it with - | NumResult { it = LitPat lit; _ } -> of_literal lit - | SimdResult _ -> failwith "unimplemented" - | NumResult { it = NanPat nanop; _ } -> +let of_numpat = function + | LitPat lit -> of_literal lit + | NanPat nanop -> match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> of_nan n +let of_result res = + match res.it with + | NumResult n -> of_numpat n.it + | SimdResult (shape, pats) -> + Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map (fun x -> of_numpat x.it) pats)) + let rec of_definition def = match def.it with | Textual m -> of_bytes (Encode.encode m) diff --git a/test/core/run.py b/test/core/run.py index 51973c4b84..074e57190d 100755 --- a/test/core/run.py +++ b/test/core/run.py @@ -92,13 +92,11 @@ def _runTestFile(self, inputPath): self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, wasm2Path, wast2Path), logPath) self._compareFile(wastPath, wast2Path) - # Convert to JavaScript, SIMD has no JS support at all, so don't generate JS files. - if 'simd' not in outputPath: - jsPath = self._auxFile(outputPath.replace(".wast", ".js")) - logPath = self._auxFile(jsPath + ".log") - self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, inputPath, jsPath), logPath) - if jsCommand != None: - self._runCommand(('%s "%s"') % (jsCommand, jsPath), logPath) + jsPath = self._auxFile(outputPath.replace(".wast", ".js")) + logPath = self._auxFile(jsPath + ".log") + self._runCommand(('%s -d "%s" -o "%s"') % (wasmCommand, inputPath, jsPath), logPath) + if jsCommand != None: + self._runCommand(('%s "%s"') % (jsCommand, jsPath), logPath) if __name__ == "__main__": From 61085bd7fa7ec99ac3c68ff5a9178a47f30eaf69 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 26 Aug 2020 10:57:50 -0700 Subject: [PATCH 226/378] Implement binary<->text support for SIMD load splats and extends The names are still pre #297, once that's finalize I can fix this up (after the sync #323). With this change, test/core/run.py passes on all test cases in simd/. --- interpreter/binary/decode.ml | 10 ++++++++++ interpreter/binary/encode.ml | 27 ++++++++++++++++++++++++--- interpreter/text/arrange.ml | 31 +++++++++++++++++++++++++++---- 3 files changed, 61 insertions(+), 7 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 47ade495de..29848203dd 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -222,6 +222,16 @@ let simd_prefix s = let pos = pos s in match vu32 s with | 0x00l -> let a, o = memop s in v128_load a o + | 0x01l -> let a, o = memop s in i16x8_load8x8_s a o + | 0x02l -> let a, o = memop s in i16x8_load8x8_u a o + | 0x03l -> let a, o = memop s in i32x4_load16x4_s a o + | 0x04l -> let a, o = memop s in i32x4_load16x4_u a o + | 0x05l -> let a, o = memop s in i64x2_load32x2_s a o + | 0x06l -> let a, o = memop s in i64x2_load32x2_u a o + | 0x07l -> let a, o = memop s in v8x16_load_splat a o + | 0x08l -> let a, o = memop s in v16x8_load_splat a o + | 0x09l -> let a, o = memop s in v32x4_load_splat a o + | 0x0al -> let a, o = memop s in v64x2_load_splat a o | 0x0bl -> let a, o = memop s in v128_store a o | 0x0cl -> v128_const (at v128 s) | 0x0dl -> v8x16_shuffle (List.init 16 (fun x -> u8 s)) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 9adbbe75e0..1bca433972 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -197,8 +197,29 @@ let encode m = op 0x35; memop mo | Load {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Load ({ty = V128Type; _} as mo) -> + + | SimdLoad ({ty = V128Type; sz = None; _} as mo) -> simd_op 0x00l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack8x8 SX); _} as mo) -> + simd_op 0x01l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack8x8 ZX); _} as mo) -> + simd_op 0x02l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack16x4 SX); _} as mo) -> + simd_op 0x03l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack16x4 ZX); _} as mo) -> + simd_op 0x04l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack32x2 SX); _} as mo) -> + simd_op 0x05l; memop mo + | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack32x2 ZX); _} as mo) -> + simd_op 0x06l; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack8, PackSplat); _} as mo) -> + simd_op 0x07l; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack16, PackSplat); _} as mo) -> + simd_op 0x08l; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack32, PackSplat); _} as mo) -> + simd_op 0x09l; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> + simd_op 0x0al; memop mo | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo @@ -211,8 +232,8 @@ let encode m = | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Store ({ty = V128Type; _} as mo) -> - simd_op 0x0bl; memop mo + + | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 7a146f79c1..e771061177 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -408,8 +408,9 @@ let relop = oper (IntOp.relop, FloatOp.relop, SimdOp.relop) let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, SimdOp.cvtop) let ternop = SimdOp.ternop -let memop name {ty; align; offset; _} sz = - value_type ty ^ "." ^ name ^ +(* Temporary wart here while we finalize the names of SIMD loads and extends. *) +let memop ?(type_in_name=true) name {ty; align; offset; _} sz = + (if type_in_name then value_type ty ^ "." else "") ^ name ^ (if offset = 0l then "" else " offset=" ^ nat32 offset) ^ (if 1 lsl align = sz then "" else " align=" ^ nat (1 lsl align)) @@ -419,11 +420,33 @@ let loadop op = | Some (sz, ext) -> memop ("load" ^ pack_size sz ^ extension ext) op (packed_size sz) +let simd_loadop (op : simd_loadop) = + match op.sz with + | None -> memop "load" op (size op.ty) + | Some (sz, pack_simd) -> + let prefix, suffix, ext = + (match sz, pack_simd with + | Pack64, Pack8x8 ext -> "i16x8", "8x8", extension ext + | Pack64, Pack16x4 ext -> "i32x4", "16x4", extension ext + | Pack64, Pack32x2 ext -> "i64x2", "32x2", extension ext + | Pack8, PackSplat -> "v8x16", "_splat", "" + | Pack16, PackSplat -> "v16x8", "_splat", "" + | Pack32, PackSplat -> "v32x4", "_splat", "" + | Pack64, PackSplat -> "v64x2", "_splat", "" + | _ -> assert false + ) in + memop ~type_in_name:false (prefix ^ ".load" ^ suffix ^ ext) op (packed_size sz) + let storeop op = match op.sz with | None -> memop "store" op (size op.ty) | Some sz -> memop ("store" ^ pack_size sz) op (packed_size sz) +let simd_storeop op = + match op.sz with + | None -> memop "store" op (size op.ty) + | Some _ -> assert false + (* Expressions *) @@ -464,8 +487,8 @@ let rec instr e = | GlobalGet x -> "global.get " ^ var x, [] | GlobalSet x -> "global.set " ^ var x, [] | Load op -> loadop op, [] - | SimdLoad op -> failwith "unimplemented SimdLoad arrange" - | SimdStore op -> failwith "unimplemented SimdStore arrange" + | SimdLoad op -> simd_loadop op, [] + | SimdStore op -> simd_storeop op, [] | Store op -> storeop op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] From bd0f5afeb5dc249add78b647c49e3e942dbc74e7 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 31 Aug 2020 16:44:57 -0700 Subject: [PATCH 227/378] Fix SIMD bitmask (#335) Bitmask was confused about endianness. The text format for v128.const is little endian, so the lowest lane set translates to the least significant bit set. --- interpreter/exec/simd.ml | 2 +- test/core/simd/simd_boolean.wast | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index b9af3728a6..fa24e9f1d7 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -310,7 +310,7 @@ struct let bitmask x = let xs = Convert.to_shape x in let negs = List.map (fun x -> if Int.(lt_s x zero) then Int32.one else Int32.zero) xs in - List.fold_left (fun a b -> Int32.(logor b (shift_left a 1))) Int32.zero negs + List.fold_right (fun a b -> Int32.(logor a (shift_left b 1))) negs Int32.zero let shl v s = let shift = Int.of_int_u (Int32.to_int s) in unop (fun a -> Int.shl a shift) v diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 45f2629edf..2828f604c9 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -54,7 +54,7 @@ (assert_return (invoke "i8x16.bitmask" (v128.const i8x16 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF)) (i32.const 0x0000FFFF)) (assert_return (invoke "i8x16.bitmask" (v128.const i8x16 -1 0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD 0xF)) - (i32.const 0x00008000)) + (i32.const 0x00000001)) ;; i16x8 (assert_return (invoke "i16x8.any_true" (v128.const i16x8 0 0 0 0 0 0 0 0)) @@ -104,7 +104,7 @@ (assert_return (invoke "i16x8.bitmask" (v128.const i16x8 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF)) (i32.const 0x000000FF)) (assert_return (invoke "i16x8.bitmask" (v128.const i16x8 -1 0 1 2 0xB 0xC 0xD 0xF)) - (i32.const 0x00000080)) + (i32.const 0x00000001)) ;; i32x4 (assert_return (invoke "i32x4.any_true" (v128.const i32x4 0 0 0 0)) @@ -154,7 +154,7 @@ (assert_return (invoke "i32x4.bitmask" (v128.const i32x4 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF)) (i32.const 0x0000000F)) (assert_return (invoke "i32x4.bitmask" (v128.const i32x4 -1 0 1 0xF)) - (i32.const 0x00000008)) + (i32.const 0x00000001)) ;; Combination From 70769390afb2b359ada4be2fa42e0c19771c91e9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 1 Sep 2020 11:24:21 -0700 Subject: [PATCH 228/378] Run SIMD tests (#326) This enables running all the SIMD tests (in test/core/simd) whenever we do `make test`. --- test/core/run.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/test/core/run.py b/test/core/run.py index 074e57190d..924b42c69d 100755 --- a/test/core/run.py +++ b/test/core/run.py @@ -22,10 +22,14 @@ arguments = parser.parse_args() sys.argv = sys.argv[:1] +main_test_files = glob.glob(os.path.join(inputDir, "*.wast")) +# SIMD test files are in a subdirectory. +simd_test_files = glob.glob(os.path.join(inputDir, "simd", "*.wast")) + wasmCommand = arguments.wasm jsCommand = arguments.js outputDir = arguments.out -inputFiles = arguments.file if arguments.file else glob.glob(os.path.join(inputDir, "*.wast")) +inputFiles = arguments.file if arguments.file else main_test_files + simd_test_files if not os.path.exists(wasmCommand): sys.stderr.write("""\ From 71d4fa7ad88865b4575bcbd7bdf0ebe8bb03f58d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 1 Sep 2020 11:48:51 -0700 Subject: [PATCH 229/378] Specify binary format for SIMD (#333) --- document/core/binary/conventions.rst | 3 +- document/core/binary/instructions.rst | 310 ++++++++++++++++++++++++++ document/core/syntax/instructions.rst | 4 +- document/core/util/macros.def | 54 ++++- 4 files changed, 358 insertions(+), 13 deletions(-) diff --git a/document/core/binary/conventions.rst b/document/core/binary/conventions.rst index 8d38399773..07a29cdb99 100644 --- a/document/core/binary/conventions.rst +++ b/document/core/binary/conventions.rst @@ -68,7 +68,8 @@ In order to distinguish symbols of the binary syntax from symbols of the abstrac \hex{7F} &\Rightarrow& \I32 \\ &&|& \hex{7E} &\Rightarrow& \I64 \\ &&|& \hex{7D} &\Rightarrow& \F32 \\ &&|& - \hex{7C} &\Rightarrow& \F64 \\ + \hex{7C} &\Rightarrow& \F64 \\ &&|& + \hex{7B} &\Rightarrow& \V128 \\ \end{array} Consequently, the byte :math:`\hex{7F}` encodes the type |I32|, diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 0c481b73f8..5f93c16b5f 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -403,6 +403,316 @@ whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer \end{array} +.. index:: simd instruction + pair: binary format; instruction +.. _binary-instr-simd: + +SIMD Instructions +~~~~~~~~~~~~~~~~~~~~ + +All variants of :ref:`SIMD instructions ` are represented by separate byte codes. +The all have a one byte prefix, whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer `. + +SIMD loads and stores are followed by the encoding of their |memarg| immediate. + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Binstr &::=& \dots \\&&|& + \hex{FD}~~0{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD~m \\ &&|& + \hex{FD}~~1{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{8x8\_s}~m \\ &&|& + \hex{FD}~~2{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{8x8\_u}~m \\ &&|& + \hex{FD}~~3{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{16x4\_s}~m \\ &&|& + \hex{FD}~~4{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{16x4\_u}~m \\ &&|& + \hex{FD}~~5{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{32x2\_s}~m \\ &&|& + \hex{FD}~~6{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{32x2\_u}~m \\ &&|& + \hex{FD}~~7{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I8X16.\LOAD\K{\_splat}~m \\ &&|& + \hex{FD}~~8{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{\_splat}~m \\ &&|& + \hex{FD}~~9{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{\_splat}~m \\ &&|& + \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{\_splat}~m \\ &&|& + \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ + \end{array} + +The |VCONST| instruction is followed by 16 immediate bytes, which are converted into a |i128| in |littleendian| byte order: + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Binstr &::=& \dots \\&&|& + \hex{FD}~~12{:}\Bu32~~(b{:}\Bbyte)^{16} &\Rightarrow& \V128.\VCONST~ + bytes_{\K{i128}}^{-1}(b_{0}~\dots~b_{15}) \\ + \end{array} + +.. _binary-vternop: + +The |SHUFFLE| instruction is also followed by 16 immediate bytes: + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Binstr &::=& \dots \\&&|& + \hex{FD}~~13{:}\Bu32~~(b{:}\Bbyte)^{16} &\Rightarrow& \I8X16.\SHUFFLE~b^{16} \\ + \end{array} + +|EXTRACTLANE| and |REPLACELANE| instructions are followed by 1 immediate byte. + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Binstr &::=& \dots \\&&|& + \hex{FD}~~21{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_s}~b \\ &&|& + \hex{FD}~~22{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_u}~b \\ &&|& + \hex{FD}~~23{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\REPLACELANE~b \\ &&|& + \hex{FD}~~24{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_s}~b \\ &&|& + \hex{FD}~~25{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_u}~b \\ &&|& + \hex{FD}~~26{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\REPLACELANE~b \\ &&|& + \hex{FD}~~27{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I32X4.\EXTRACTLANE~b \\ &&|& + \hex{FD}~~28{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I32X4.\REPLACELANE~b \\ &&|& + \hex{FD}~~29{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I64X2.\EXTRACTLANE~b \\ &&|& + \hex{FD}~~30{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I64X2.\REPLACELANE~b \\ &&|& + \hex{FD}~~31{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F32X4.\EXTRACTLANE~b \\ &&|& + \hex{FD}~~32{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F32X4.\REPLACELANE~b \\ &&|& + \hex{FD}~~33{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F64X2.\EXTRACTLANE~b \\ &&|& + \hex{FD}~~34{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F64X2.\REPLACELANE~b \\ + \end{array} + +All other SIMD instructions are plain opcodes without any immediates. + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Binstr &::=& \dots && \phantom{simdhaslongerinstructionnames} \\&&|& + \hex{FD}~~14{:}\Bu32 &\Rightarrow& \I8X16.\SWIZZLE \\ &&|& + \hex{FD}~~15{:}\Bu32 &\Rightarrow& \I8X16.\SPLAT \\ &&|& + \hex{FD}~~16{:}\Bu32 &\Rightarrow& \I16X8.\SPLAT \\ &&|& + \hex{FD}~~17{:}\Bu32 &\Rightarrow& \I32X4.\SPLAT \\ &&|& + \hex{FD}~~18{:}\Bu32 &\Rightarrow& \I64X2.\SPLAT \\ &&|& + \hex{FD}~~19{:}\Bu32 &\Rightarrow& \F32X4.\SPLAT \\ &&|& + \hex{FD}~~20{:}\Bu32 &\Rightarrow& \F64X2.\SPLAT \\ + \end{array} + +.. _binary-virelop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~35{:}\Bu32 &\Rightarrow& \I8X16.\VEQ \\ &&|& + \hex{FD}~~36{:}\Bu32 &\Rightarrow& \I8X16.\VNE \\ &&|& + \hex{FD}~~37{:}\Bu32 &\Rightarrow& \I8X16.\VLT\K{\_s} \\ &&|& + \hex{FD}~~38{:}\Bu32 &\Rightarrow& \I8X16.\VLT\K{\_u} \\ &&|& + \hex{FD}~~39{:}\Bu32 &\Rightarrow& \I8X16.\VGT\K{\_s} \\ &&|& + \hex{FD}~~40{:}\Bu32 &\Rightarrow& \I8X16.\VGT\K{\_u} \\ &&|& + \hex{FD}~~41{:}\Bu32 &\Rightarrow& \I8X16.\VLE\K{\_s} \\ &&|& + \hex{FD}~~42{:}\Bu32 &\Rightarrow& \I8X16.\VLE\K{\_u} \\ &&|& + \hex{FD}~~43{:}\Bu32 &\Rightarrow& \I8X16.\VGE\K{\_s} \\ &&|& + \hex{FD}~~44{:}\Bu32 &\Rightarrow& \I8X16.\VGE\K{\_u} \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~45{:}\Bu32 &\Rightarrow& \I16X8.\VEQ \\ &&|& + \hex{FD}~~46{:}\Bu32 &\Rightarrow& \I16X8.\VNE \\ &&|& + \hex{FD}~~47{:}\Bu32 &\Rightarrow& \I16X8.\VLT\K{\_s} \\ &&|& + \hex{FD}~~48{:}\Bu32 &\Rightarrow& \I16X8.\VLT\K{\_u} \\ &&|& + \hex{FD}~~49{:}\Bu32 &\Rightarrow& \I16X8.\VGT\K{\_s} \\ &&|& + \hex{FD}~~50{:}\Bu32 &\Rightarrow& \I16X8.\VGT\K{\_u} \\ &&|& + \hex{FD}~~51{:}\Bu32 &\Rightarrow& \I16X8.\VLE\K{\_s} \\ &&|& + \hex{FD}~~52{:}\Bu32 &\Rightarrow& \I16X8.\VLE\K{\_u} \\ &&|& + \hex{FD}~~53{:}\Bu32 &\Rightarrow& \I16X8.\VGE\K{\_s} \\ &&|& + \hex{FD}~~54{:}\Bu32 &\Rightarrow& \I16X8.\VGE\K{\_u} \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~55{:}\Bu32 &\Rightarrow& \I32X4.\VEQ \\ &&|& + \hex{FD}~~56{:}\Bu32 &\Rightarrow& \I32X4.\VNE \\ &&|& + \hex{FD}~~57{:}\Bu32 &\Rightarrow& \I32X4.\VLT\K{\_s} \\ &&|& + \hex{FD}~~58{:}\Bu32 &\Rightarrow& \I32X4.\VLT\K{\_u} \\ &&|& + \hex{FD}~~59{:}\Bu32 &\Rightarrow& \I32X4.\VGT\K{\_s} \\ &&|& + \hex{FD}~~60{:}\Bu32 &\Rightarrow& \I32X4.\VGT\K{\_u} \\ &&|& + \hex{FD}~~61{:}\Bu32 &\Rightarrow& \I32X4.\VLE\K{\_s} \\ &&|& + \hex{FD}~~62{:}\Bu32 &\Rightarrow& \I32X4.\VLE\K{\_u} \\ &&|& + \hex{FD}~~63{:}\Bu32 &\Rightarrow& \I32X4.\VGE\K{\_s} \\ &&|& + \hex{FD}~~64{:}\Bu32 &\Rightarrow& \I32X4.\VGE\K{\_u} \\ + \end{array} + +.. _binary-vfrelop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~65{:}\Bu32 &\Rightarrow& \F32X4.\VEQ \\ &&|& + \hex{FD}~~66{:}\Bu32 &\Rightarrow& \F32X4.\VNE \\ &&|& + \hex{FD}~~67{:}\Bu32 &\Rightarrow& \F32X4.\VLT \\ &&|& + \hex{FD}~~68{:}\Bu32 &\Rightarrow& \F32X4.\VGT \\ &&|& + \hex{FD}~~69{:}\Bu32 &\Rightarrow& \F32X4.\VLE \\ &&|& + \hex{FD}~~70{:}\Bu32 &\Rightarrow& \F32X4.\VGE \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~71{:}\Bu32 &\Rightarrow& \F64X2.\VEQ \\ &&|& + \hex{FD}~~72{:}\Bu32 &\Rightarrow& \F64X2.\VNE \\ &&|& + \hex{FD}~~73{:}\Bu32 &\Rightarrow& \F64X2.\VLT \\ &&|& + \hex{FD}~~74{:}\Bu32 &\Rightarrow& \F64X2.\VGT \\ &&|& + \hex{FD}~~75{:}\Bu32 &\Rightarrow& \F64X2.\VLE \\ &&|& + \hex{FD}~~76{:}\Bu32 &\Rightarrow& \F64X2.\VGE \\ + \end{array} + +.. _binary-vsunop: +.. _binary-vsbinop: +.. _binary-vsternop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~77{:}\Bu32 &\Rightarrow& \V128.\VNOT \\ &&|& + \hex{FD}~~78{:}\Bu32 &\Rightarrow& \V128.\VAND \\ &&|& + \hex{FD}~~79{:}\Bu32 &\Rightarrow& \V128.\VANDNOT \\ &&|& + \hex{FD}~~80{:}\Bu32 &\Rightarrow& \V128.\VOR \\ &&|& + \hex{FD}~~81{:}\Bu32 &\Rightarrow& \V128.\VXOR \\ &&|& + \hex{FD}~~82{:}\Bu32 &\Rightarrow& \V128.\BITSELECT + \end{array} + +.. _binary-vtestop: +.. _binary-vshiftop: +.. _binary-viunop: +.. _binary-vibinop: +.. _binary-viminmaxop: +.. _binary-vsatbinop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~96{:}\Bu32 &\Rightarrow& \I8X16.\VABS \\ &&|& + \hex{FD}~~97{:}\Bu32 &\Rightarrow& \I8X16.\VNEG \\ &&|& + \hex{FD}~~98{:}\Bu32 &\Rightarrow& \I8X16.\ANYTRUE \\ &&|& + \hex{FD}~~99{:}\Bu32 &\Rightarrow& \I8X16.\ALLTRUE \\ &&|& + \hex{FD}~~100{:}\Bu32 &\Rightarrow& \I8X16.\BITMASK \\ &&|& + \hex{FD}~~101{:}\Bu32 &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_s} \\ &&|& + \hex{FD}~~102{:}\Bu32 &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_u} \\ &&|& + \hex{FD}~~107{:}\Bu32 &\Rightarrow& \I8X16.\VSHL \\ &&|& + \hex{FD}~~108{:}\Bu32 &\Rightarrow& \I8X16.\VSHR\K{\_s} \\ &&|& + \hex{FD}~~109{:}\Bu32 &\Rightarrow& \I8X16.\VSHR\K{\_u} \\ &&|& + \hex{FD}~~110{:}\Bu32 &\Rightarrow& \I8X16.\VADD \\ &&|& + \hex{FD}~~111{:}\Bu32 &\Rightarrow& \I8X16.\VADD\K{\_sat\_s} \\ &&|& + \hex{FD}~~112{:}\Bu32 &\Rightarrow& \I8X16.\VADD\K{\_sat\_u} \\ &&|& + \hex{FD}~~113{:}\Bu32 &\Rightarrow& \I8X16.\VSUB \\ &&|& + \hex{FD}~~114{:}\Bu32 &\Rightarrow& \I8X16.\VSUB\K{\_sat\_s} \\ &&|& + \hex{FD}~~115{:}\Bu32 &\Rightarrow& \I8X16.\VSUB\K{\_sat\_u} \\ &&|& + \hex{FD}~~118{:}\Bu32 &\Rightarrow& \I8X16.\VMIN\K{\_s} \\ &&|& + \hex{FD}~~119{:}\Bu32 &\Rightarrow& \I8X16.\VMIN\K{\_u} \\ &&|& + \hex{FD}~~120{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_s} \\ &&|& + \hex{FD}~~121{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_u} \\ &&|& + \hex{FD}~~123{:}\Bu32 &\Rightarrow& \I8X16.\AVGR\K{\_u} \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~128{:}\Bu32 &\Rightarrow& \I16X8.\VABS \\ &&|& + \hex{FD}~~129{:}\Bu32 &\Rightarrow& \I16X8.\VNEG \\ &&|& + \hex{FD}~~130{:}\Bu32 &\Rightarrow& \I16X8.\ANYTRUE \\ &&|& + \hex{FD}~~131{:}\Bu32 &\Rightarrow& \I16X8.\ALLTRUE \\ &&|& + \hex{FD}~~132{:}\Bu32 &\Rightarrow& \I16X8.\BITMASK \\ &&|& + \hex{FD}~~133{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s} \\ &&|& + \hex{FD}~~134{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_u} \\ &&|& + \hex{FD}~~135{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_s} \\ &&|& + \hex{FD}~~136{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_s} \\ &&|& + \hex{FD}~~137{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_u} \\ &&|& + \hex{FD}~~138{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_u} \\ &&|& + \hex{FD}~~139{:}\Bu32 &\Rightarrow& \I16X8.\VSHL \\ &&|& + \hex{FD}~~140{:}\Bu32 &\Rightarrow& \I16X8.\VSHR\K{\_s} \\ &&|& + \hex{FD}~~141{:}\Bu32 &\Rightarrow& \I16X8.\VSHR\K{\_u} \\ &&|& + \hex{FD}~~142{:}\Bu32 &\Rightarrow& \I16X8.\VADD \\ &&|& + \hex{FD}~~143{:}\Bu32 &\Rightarrow& \I16X8.\VADD\K{\_sat\_s} \\ &&|& + \hex{FD}~~144{:}\Bu32 &\Rightarrow& \I16X8.\VADD\K{\_sat\_u} \\ &&|& + \hex{FD}~~145{:}\Bu32 &\Rightarrow& \I16X8.\VSUB \\ &&|& + \hex{FD}~~146{:}\Bu32 &\Rightarrow& \I16X8.\VSUB\K{\_sat\_s} \\ &&|& + \hex{FD}~~147{:}\Bu32 &\Rightarrow& \I16X8.\VSUB\K{\_sat\_u} \\ &&|& + \hex{FD}~~149{:}\Bu32 &\Rightarrow& \I16X8.\VMUL \\ &&|& + \hex{FD}~~150{:}\Bu32 &\Rightarrow& \I16X8.\VMIN\K{\_s} \\ &&|& + \hex{FD}~~151{:}\Bu32 &\Rightarrow& \I16X8.\VMIN\K{\_u} \\ &&|& + \hex{FD}~~152{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_s} \\ &&|& + \hex{FD}~~153{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_u} \\ &&|& + \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~160{:}\Bu32 &\Rightarrow& \I32X4.\VABS \\ &&|& + \hex{FD}~~161{:}\Bu32 &\Rightarrow& \I32X4.\VNEG \\ &&|& + \hex{FD}~~162{:}\Bu32 &\Rightarrow& \I32X4.\ANYTRUE \\ &&|& + \hex{FD}~~163{:}\Bu32 &\Rightarrow& \I32X4.\ALLTRUE \\ &&|& + \hex{FD}~~164{:}\Bu32 &\Rightarrow& \I32X4.\BITMASK \\ &&|& + \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s} \\ &&|& + \hex{FD}~~168{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_s} \\ &&|& + \hex{FD}~~169{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_u} \\ &&|& + \hex{FD}~~170{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_u} \\ &&|& + \hex{FD}~~171{:}\Bu32 &\Rightarrow& \I32X4.\VSHL \\ &&|& + \hex{FD}~~172{:}\Bu32 &\Rightarrow& \I32X4.\VSHR\K{\_s} \\ &&|& + \hex{FD}~~173{:}\Bu32 &\Rightarrow& \I32X4.\VSHR\K{\_u} \\ &&|& + \hex{FD}~~174{:}\Bu32 &\Rightarrow& \I32X4.\VADD \\ &&|& + \hex{FD}~~177{:}\Bu32 &\Rightarrow& \I32X4.\VSUB \\ &&|& + \hex{FD}~~181{:}\Bu32 &\Rightarrow& \I32X4.\VMUL \\ &&|& + \hex{FD}~~182{:}\Bu32 &\Rightarrow& \I32X4.\VMIN\K{\_s} \\ &&|& + \hex{FD}~~183{:}\Bu32 &\Rightarrow& \I32X4.\VMIN\K{\_u} \\ &&|& + \hex{FD}~~184{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_s} \\ &&|& + \hex{FD}~~185{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_u} \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& + \hex{FD}~~203{:}\Bu32 &\Rightarrow& \I64X2.\VSHL \\ &&|& + \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& + \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& + \hex{FD}~~206{:}\Bu32 &\Rightarrow& \I64X2.\VADD \\ &&|& + \hex{FD}~~209{:}\Bu32 &\Rightarrow& \I64X2.\VSUB \\ &&|& + \hex{FD}~~213{:}\Bu32 &\Rightarrow& \I64X2.\VMUL \\ + \end{array} + +.. _binary-vfunop: +.. _binary-vfbinop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~224{:}\Bu32 &\Rightarrow& \F32X4.\VABS \\ &&|& + \hex{FD}~~225{:}\Bu32 &\Rightarrow& \F32X4.\VNEG \\ &&|& + \hex{FD}~~227{:}\Bu32 &\Rightarrow& \F32X4.\VSQRT \\ &&|& + \hex{FD}~~228{:}\Bu32 &\Rightarrow& \F32X4.\VADD \\ &&|& + \hex{FD}~~229{:}\Bu32 &\Rightarrow& \F32X4.\VSUB \\ &&|& + \hex{FD}~~230{:}\Bu32 &\Rightarrow& \F32X4.\VMUL \\ &&|& + \hex{FD}~~231{:}\Bu32 &\Rightarrow& \F32X4.\VDIV \\ &&|& + \hex{FD}~~232{:}\Bu32 &\Rightarrow& \F32X4.\VMIN \\ &&|& + \hex{FD}~~233{:}\Bu32 &\Rightarrow& \F32X4.\VMAX \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~236{:}\Bu32 &\Rightarrow& \F64X2.\VABS \\ &&|& + \hex{FD}~~237{:}\Bu32 &\Rightarrow& \F64X2.\VNEG \\ &&|& + \hex{FD}~~239{:}\Bu32 &\Rightarrow& \F64X2.\VSQRT \\ &&|& + \hex{FD}~~240{:}\Bu32 &\Rightarrow& \F64X2.\VADD \\ &&|& + \hex{FD}~~241{:}\Bu32 &\Rightarrow& \F64X2.\VSUB \\ &&|& + \hex{FD}~~242{:}\Bu32 &\Rightarrow& \F64X2.\VMUL \\ &&|& + \hex{FD}~~243{:}\Bu32 &\Rightarrow& \F64X2.\VDIV \\ &&|& + \hex{FD}~~244{:}\Bu32 &\Rightarrow& \F64X2.\VMIN \\ &&|& + \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VMAX \\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~248{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_s} \\ &&|& + \hex{FD}~~249{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u} \\ &&|& + \hex{FD}~~250{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s} \\ &&|& + \hex{FD}~~251{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u} \\ + \end{array} + + .. index:: expression pair: binary format; expression single: expression; constant diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 1320db74de..4594a7b869 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -247,8 +247,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8.}\K{mul} ~|~ \K{i32x4.}\K{mul} ~|~ \K{i64x2.}\K{mul} \\&&|& - \K{i8x16.}\AVGRU ~|~ - \K{i16x8.}\AVGRU \\&&|& + \K{i8x16.}\AVGR\K{\_u} ~|~ + \K{i16x8.}\AVGR\K{\_u} \\&&|& \X{fxx.}\vfbinop \\&&|& \K{i32x4.}\TRUNC\K{\_sat\_f32x4\_}\sx ~|~ \K{f32x4.}\CONVERT\K{\_i32x4\_}\sx \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index ea1e09903c..9cf38e67a3 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -179,6 +179,12 @@ .. |F32| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f32}} .. |F64| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f64}} .. |V128| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{v128}} +.. |I8X16| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i8x16}} +.. |I16X8| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i16x8}} +.. |I32X4| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i32x4}} +.. |I64X2| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i64x2}} +.. |F32X4| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f32x4}} +.. |F64X2| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f64x2}} .. |FUNCREF| mathdef:: \xref{syntax/types}{syntax-elemtype}{\K{funcref}} @@ -379,15 +385,43 @@ .. |DEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{demote}} .. |REINTERPRET| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{reinterpret}} -.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{shuffle}} -.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{swizzle}} -.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{splat}} -.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{extract\_lane}} -.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{replace\_lane}} -.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{bitmask}} -.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{narrow}} -.. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{widen}} -.. |AVGRU| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{avgr\_u}} +.. |VCONST| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{const}} +.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shuffle}} +.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{swizzle}} +.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{splat}} +.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extract\_lane}} +.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{replace\_lane}} +.. |VNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{not}} +.. |VAND| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{and}} +.. |VANDNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{andnot}} +.. |VOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{or}} +.. |VXOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{xor}} +.. |BITSELECT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{bitselect}} +.. |VEQ| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{eq}} +.. |VNE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ne}} +.. |VLT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{lt}} +.. |VGT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{gt}} +.. |VLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{le}} +.. |VGE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ge}} +.. |VABS| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{abs}} +.. |VNEG| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{neg}} +.. |ANYTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{any\_true}} +.. |ALLTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{all\_true}} +.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{bitmask}} +.. |VSHL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shl}} +.. |VSHR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shr}} +.. |VSQRT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{sqrt}} +.. |VADD| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{add}} +.. |VSUB| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{sub}} +.. |VMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{mul}} +.. |VDIV| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{div}} +.. |VMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{min}} +.. |VMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{max}} +.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} +.. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{widen}} +.. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} +.. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} +.. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} .. Instructions, non-terminals @@ -1006,7 +1040,7 @@ .. |fsign| mathdef:: \xref{exec/numerics}{aux-fsign}{\F{fsign}} .. |fbias| mathdef:: \xref{exec/numerics}{aux-fbias}{\F{fbias}} .. |bytes| mathdef:: \xref{exec/numerics}{aux-bytes}{\F{bytes}} -.. |littleendian| mathdef:: \xref{exec/numerics}{aux-littleendian}{\F{littleendian}} +.. |littleendian| mathdef:: \xref{exec/numerics}{aux-littleendian}{\F{little~endian}} .. |signed| mathdef:: \xref{exec/numerics}{aux-signed}{\F{signed}} .. |bool| mathdef:: \xref{exec/numerics}{aux-bool}{\F{bool}} From 13da9620db5048afb8039778acb702e9b4ec1c9b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 8 Sep 2020 10:34:22 -0700 Subject: [PATCH 230/378] Rename shuffle and swizzle to i8x16 prefix (#321) v8x16.shuffle and v8x16.swizzle is now i8x16.shuffle and i8x16.swizzle respectively. Fixed #316. --- interpreter/binary/decode.ml | 4 +- interpreter/syntax/operators.ml | 4 +- interpreter/text/arrange.ml | 4 +- interpreter/text/lexer.mll | 4 +- interpreter/text/parser.mly | 2 +- proposals/simd/BinarySIMD.md | 6 +- proposals/simd/ImplementationStatus.md | 4 +- proposals/simd/NewOpcodes.md | 4 +- proposals/simd/SIMD.md | 4 +- proposals/simd/TextSIMD.md | 4 +- test/core/simd/simd_lane.wast | 90 +++++++++++++------------- test/core/simd/simd_load.wast | 6 +- test/core/simd/simd_splat.wast | 2 +- 13 files changed, 69 insertions(+), 69 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 29848203dd..993cb7bbcc 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -234,8 +234,8 @@ let simd_prefix s = | 0x0al -> let a, o = memop s in v64x2_load_splat a o | 0x0bl -> let a, o = memop s in v128_store a o | 0x0cl -> v128_const (at v128 s) - | 0x0dl -> v8x16_shuffle (List.init 16 (fun x -> u8 s)) - | 0x0el -> v8x16_swizzle + | 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s)) + | 0x0el -> i8x16_swizzle | 0x0fl -> i8x16_splat | 0x10l -> i16x8_splat | 0x11l -> i32x4_splat diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 8ac4feea01..94f0bd01f3 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -247,8 +247,8 @@ let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) -let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) -let v8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) +let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) +let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index e771061177..a519615ebd 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -231,8 +231,8 @@ struct | _ -> failwith "Unimplemented v128 unop" let binop xx (op : binop) = match op with - | I8x16 (Shuffle imms) -> "v8x16.shuffle " ^ (String.concat " " (List.map nat imms)) - | I8x16 Swizzle -> "v8x16.swizzle" + | I8x16 (Shuffle imms) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat imms)) + | I8x16 Swizzle -> "i8x16.swizzle" | I8x16 Eq -> "i8x16.eq" | I8x16 Ne -> "i8x16.ne" | I8x16 LtS -> "i8x16.lt_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index fee8b7fffb..bc60afde9f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -479,8 +479,8 @@ rule token = parse | (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) } | (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) } | (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) } - | "v8x16.swizzle" { BINARY v8x16_swizzle } - | "v8x16.shuffle" { SHUFFLE } + | "i8x16.swizzle" { BINARY i8x16_swizzle } + | "i8x16.shuffle" { SHUFFLE } | vxxx".not" { UNARY v128_not } | vxxx".and" { UNARY v128_and } | vxxx".andnot" { UNARY v128_andnot } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 6b6f4c830f..7685ef08df 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -400,7 +400,7 @@ plain_instr : | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | SHIFT { fun c -> $1 } - | SHUFFLE literal_list { let at = at () in fun c -> v8x16_shuffle (shuffle_literal $2 at) } + | SHUFFLE literal_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) } call_instr : diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index d910bd210d..c84c40b3f1 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -24,7 +24,7 @@ instr ::= ... Some SIMD instructions have additional immediate operands following `simdop`. These immediate operands are encoded as individual bytes. -For example, the `v8x16.shuffle` instruction has 16 bytes after `simdop`. +For example, the `i8x16.shuffle` instruction has 16 bytes after `simdop`. In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byte. For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). @@ -45,8 +45,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v64x2.load_splat` | `0x0a`| m:memarg | | `v128.store` | `0x0b`| m:memarg | | `v128.const` | `0x0c`| i:ImmByte[16] | -| `v8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | -| `v8x16.swizzle` | `0x0e`| - | +| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | +| `i8x16.swizzle` | `0x0e`| - | | `i8x16.splat` | `0x0f`| - | | `i16x8.splat` | `0x10`| - | | `i32x4.splat` | `0x11`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index fc3f0cdd65..961e53f4a8 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -13,8 +13,8 @@ | `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 2752fa2a55..6ab88a8401 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -16,8 +16,8 @@ | Basic operation | opcode | | ----------------| ------ | | v128.const | 0x0c | -| v8x16.shuffle | 0x0d | -| v8x16.swizzle | 0x0e | +| i8x16.shuffle | 0x0d | +| i8x16.swizzle | 0x0e | | Splat operation | opcode | | --------------- | ------ | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 0ff87ff453..35729d2a0e 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -300,7 +300,7 @@ The input lane value, `x`, is interpreted the same way as for the splat instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored. ### Shuffling using immediate indices -* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` +* `i8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128` Returns a new vector with lanes selected from the lanes of the two input vectors `a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This @@ -320,7 +320,7 @@ def S.shuffle(a, b, s): ``` ### Swizzling using variable indices -* `v8x16.swizzle(a: v128, s: v128) -> v128` +* `i8x16.swizzle(a: v128, s: v128) -> v128` Returns a new vector with lanes selected from the lanes of the first input vector `a` specified in the second input vector `s`. The indices `i` in range diff --git a/proposals/simd/TextSIMD.md b/proposals/simd/TextSIMD.md index 8ba2e4a7b6..0f4fc6eb8f 100644 --- a/proposals/simd/TextSIMD.md +++ b/proposals/simd/TextSIMD.md @@ -20,8 +20,8 @@ The canonical text format used for printing `v128.const` instructions is v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN ``` -### v8x16.shuffle +### i8x16.shuffle ``` -v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 +i8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 ``` diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index f8bffd2d7b..55cbfd2ce0 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -61,21 +61,21 @@ ;; Swizzle and shuffle (func (export "v8x16_swizzle") (param v128 v128) (result v128) - (v8x16.swizzle (local.get 0) (local.get 1))) + (i8x16.swizzle (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-1") (param v128 v128) (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1))) + (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-2") (param v128 v128) (result v128) - (v8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) + (i8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-3") (param v128 v128) (result v128) - (v8x16.shuffle 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 (local.get 0) (local.get 1))) + (i8x16.shuffle 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-4") (param v128 v128) (result v128) - (v8x16.shuffle 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (local.get 0) (local.get 1))) + (i8x16.shuffle 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-5") (param v128 v128) (result v128) - (v8x16.shuffle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (local.get 0) (local.get 1))) + (i8x16.shuffle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-6") (param v128 v128) (result v128) - (v8x16.shuffle 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) + (i8x16.shuffle 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) (func (export "v8x16_shuffle-7") (param v128 v128) (result v128) - (v8x16.shuffle 0 0 0 0 0 0 0 0 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) + (i8x16.shuffle 0 0 0 0 0 0 0 0 16 16 16 16 16 16 16 16 (local.get 0) (local.get 1))) ) (assert_return (invoke "i8x16_extract_lane_s-first" (v128.const i8x16 127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (i32.const 127)) @@ -501,33 +501,33 @@ ;; Invalid types for swizzle and shuffle values (assert_invalid (module (func (result v128) - (v8x16.swizzle (i32.const 1) (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") + (i8x16.swizzle (i32.const 1) (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") (assert_invalid (module (func (result v128) - (v8x16.swizzle (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (i32.const 2)))) "type mismatch") + (i8x16.swizzle (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (i32.const 2)))) "type mismatch") (assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (f32.const 3.0) + (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (f32.const 3.0) (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))) "type mismatch") (assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 + (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (f32.const 4.0)))) "type mismatch") -;; v8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 +;; i8x16.shuffle: the 1st argument must be 16-byte literals in 0..32 (assert_malformed (module quote "(func (param v128) (result v128)" - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (local.get 0) (local.get 0)))") + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (local.get 0) (local.get 0)))") "invalid lane length") (assert_malformed (module quote "(func (param v128) (result v128)" - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (local.get 0) (local.get 0)))") + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (local.get 0) (local.get 0)))") "invalid lane length") (assert_malformed (module quote "(func (result v128)" - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1" + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -1" "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)" "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128)" - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 256" + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 256" "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)" "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_invalid (module (func (result v128) - (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 255 + (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 255 (v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))) "invalid lane index") @@ -543,21 +543,21 @@ ;; Old shuffle instruction names will not work (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle1 (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(i8x16.shuffle1 (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") "unknown operator") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle2_imm 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " + "(i8x16.shuffle2_imm 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)))") "unknown operator") -;; v8x16 not i8x16 +;; i8x16 not v8x16 (assert_malformed (module quote "(func (result v128) " - "(i8x16.swizzle (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(v8x16.swizzle (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))") "unknown operator") (assert_malformed (module quote "(func (result v128) " - "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " + "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31)))") "unknown operator") @@ -596,29 +596,29 @@ (assert_malformed (module quote "(func (result v128) (i32x4.replace_lane inf (v128.const i32x4 0 0 0 0) (i32.const 1)))") "unexpected token") (assert_malformed (module quote "(func (result v128) (f32x4.replace_lane -inf (v128.const f32x4 0 0 0 0) (f32.const 1.1)))") "unexpected token") -;; v8x16.shuffle expects a 16-byte literals as first argument +;; i8x16.shuffle expects a 16-byte literals as first argument (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) " + "(i8x16.shuffle (v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "invalid lane length") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15.0) " + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15.0) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle 0.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(i8x16.shuffle 0.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle -inf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(i8x16.shuffle -inf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 inf) " + "(i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 inf) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") (assert_malformed (module quote "(func (result v128) " - "(v8x16.shuffle nan 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " + "(i8x16.shuffle nan 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) " "(v128.const i8x16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0) " "(v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))") "malformed lane index") @@ -664,9 +664,9 @@ ;; i8x16.replace outputs as shuffle operand (func (export "as-v8x16_swizzle-operand") (param v128 i32 v128) (result v128) - (v8x16.swizzle (i8x16.replace_lane 0 (local.get 0) (local.get 1)) (local.get 2))) + (i8x16.swizzle (i8x16.replace_lane 0 (local.get 0) (local.get 1)) (local.get 2))) (func (export "as-v8x16_shuffle-operands") (param v128 i32 v128 i32) (result v128) - (v8x16.shuffle 16 1 18 3 20 5 22 7 24 9 26 11 28 13 30 15 + (i8x16.shuffle 16 1 18 3 20 5 22 7 24 9 26 11 28 13 30 15 (i8x16.replace_lane 0 (local.get 0) (local.get 1)) (i8x16.replace_lane 15 (local.get 2) (local.get 3)))) ) @@ -726,10 +726,10 @@ (i64x2.add (i64x2.replace_lane 0 (local.get 0) (local.get 1)) (i64x2.replace_lane 1 (local.get 2) (local.get 3)))) (func (export "swizzle-as-i8x16_add-operands") (param v128 v128 v128 v128) (result v128) - (i8x16.add (v8x16.swizzle (local.get 0) (local.get 1)) (v8x16.swizzle (local.get 2) (local.get 3)))) + (i8x16.add (i8x16.swizzle (local.get 0) (local.get 1)) (i8x16.swizzle (local.get 2) (local.get 3)))) (func (export "shuffle-as-i8x16_sub-operands") (param v128 v128 v128 v128) (result v128) - (i8x16.sub (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)) - (v8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 2) (local.get 3)))) + (i8x16.sub (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)) + (i8x16.shuffle 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 (local.get 2) (local.get 3)))) ;; Boolean horizontal reductions (func (export "as-i8x16_any_true-operand") (param v128 i32) (result i32) @@ -742,9 +742,9 @@ (i32x4.any_true (i64x2.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "swizzle-as-i8x16_all_true-operands") (param v128 v128) (result i32) - (i8x16.all_true (v8x16.swizzle (local.get 0) (local.get 1)))) + (i8x16.all_true (i8x16.swizzle (local.get 0) (local.get 1)))) (func (export "shuffle-as-i8x16_any_true-operands") (param v128 v128) (result i32) - (i8x16.any_true (v8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)))) + (i8x16.any_true (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)))) ) (assert_return (invoke "as-i8x16_splat-operand" (v128.const i8x16 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) @@ -842,9 +842,9 @@ (return (global.get $g))) (func (export "as-return-value-2") (param v128 v128) (result v128) - (return (v8x16.swizzle (local.get 0) (local.get 1)))) + (return (i8x16.swizzle (local.get 0) (local.get 1)))) (func (export "as-global_set-value-2") (param v128 v128) (result v128) - (global.set $h (v8x16.shuffle 0 1 2 3 4 5 6 7 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) + (global.set $h (i8x16.shuffle 0 1 2 3 4 5 6 7 24 25 26 27 28 29 30 31 (local.get 0) (local.get 1))) (return (global.get $h))) (func (export "as-local_set-value-1") (param v128) (result i64) (local i64) @@ -1236,8 +1236,8 @@ ) (assert_malformed (module quote - "(func $v8x16.shuffle-1st-arg-empty (result v128)" - " (v8x16.shuffle" + "(func $i8x16.shuffle-1st-arg-empty (result v128)" + " (i8x16.shuffle" " (v128.const i8x16 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15)" " (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16)" " )" @@ -1247,8 +1247,8 @@ ) (assert_invalid (module - (func $v8x16.shuffle-2nd-arg-empty (result v128) - (v8x16.shuffle 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 + (func $i8x16.shuffle-2nd-arg-empty (result v128) + (i8x16.shuffle 0 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 (v128.const i8x16 1 2 3 5 6 6 7 8 9 10 11 12 13 14 15 16) ) ) @@ -1257,8 +1257,8 @@ ) (assert_malformed (module quote - "(func $v8x16.shuffle-arg-empty (result v128)" - " (v8x16.shuffle)" + "(func $i8x16.shuffle-arg-empty (result v128)" + " (i8x16.shuffle)" ")" ) "invalid lane length" diff --git a/test/core/simd/simd_load.wast b/test/core/simd/simd_load.wast index 78c6c93cf8..4b2edc160b 100644 --- a/test/core/simd/simd_load.wast +++ b/test/core/simd/simd_load.wast @@ -120,11 +120,11 @@ (module (memory 1) (data (offset (i32.const 0)) "\64\65\66\67\68\69\6a\6b\6c\6d\6e\6f\70\71\72\73") ;; 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 (data (offset (i32.const 16)) "\0f\0e\0d\0c\0b\0a\09\08\07\06\05\04\03\02\01\00") ;; 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 - (func (export "as-v8x16.swizzle-operand") (result v128) - (v8x16.swizzle (v128.load (i32.const 0)) (v128.load offset=15 (i32.const 1))) + (func (export "as-i8x16.swizzle-operand") (result v128) + (i8x16.swizzle (v128.load (i32.const 0)) (v128.load offset=15 (i32.const 1))) ) ) -(assert_return(invoke "as-v8x16.swizzle-operand") (v128.const i8x16 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100)) +(assert_return(invoke "as-i8x16.swizzle-operand") (v128.const i8x16 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100)) (module (memory 1) (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f\00\01\02\03") diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast index 94004b7b4d..fcd88ca273 100644 --- a/test/core/simd/simd_splat.wast +++ b/test/core/simd/simd_splat.wast @@ -188,7 +188,7 @@ (func (export "as-f32x4_extract_lane_s-operand-last") (param f32) (result f32) (f32x4.extract_lane 3 (f32x4.splat (local.get 0)))) (func (export "as-v8x16_swizzle-operands") (param i32) (param i32) (result v128) - (v8x16.swizzle (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (i8x16.swizzle (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) (func (export "as-i64x2_extract_lane-operand-first") (param i64) (result i64) (i64x2.extract_lane 0 (i64x2.splat (local.get 0)))) (func (export "as-i64x2_extract_lane-operand-last") (param i64) (result i64) From 3e652c379a1cba40f9427c173445fa8d8f9ed033 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 8 Sep 2020 10:35:19 -0700 Subject: [PATCH 231/378] Rename SIMD load splats and load extends. (#322) Following suggestions in #297, renaming load splats and load extends to something more consistent. Fixed #297. --- interpreter/binary/decode.ml | 20 +- interpreter/syntax/operators.ml | 20 +- interpreter/text/arrange.ml | 22 +- interpreter/text/lexer.mll | 28 +- proposals/simd/BinarySIMD.md | 20 +- proposals/simd/ImplementationStatus.md | 20 +- proposals/simd/NewOpcodes.md | 20 +- proposals/simd/SIMD.md | 20 +- test/core/simd/simd_align.wast | 146 ++++---- test/core/simd/simd_load_extend.wast | 468 ++++++++++++------------- test/core/simd/simd_load_splat.wast | 208 +++++------ 11 files changed, 496 insertions(+), 496 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 993cb7bbcc..8eded90287 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -222,16 +222,16 @@ let simd_prefix s = let pos = pos s in match vu32 s with | 0x00l -> let a, o = memop s in v128_load a o - | 0x01l -> let a, o = memop s in i16x8_load8x8_s a o - | 0x02l -> let a, o = memop s in i16x8_load8x8_u a o - | 0x03l -> let a, o = memop s in i32x4_load16x4_s a o - | 0x04l -> let a, o = memop s in i32x4_load16x4_u a o - | 0x05l -> let a, o = memop s in i64x2_load32x2_s a o - | 0x06l -> let a, o = memop s in i64x2_load32x2_u a o - | 0x07l -> let a, o = memop s in v8x16_load_splat a o - | 0x08l -> let a, o = memop s in v16x8_load_splat a o - | 0x09l -> let a, o = memop s in v32x4_load_splat a o - | 0x0al -> let a, o = memop s in v64x2_load_splat a o + | 0x01l -> let a, o = memop s in v128_load8x8_s a o + | 0x02l -> let a, o = memop s in v128_load8x8_u a o + | 0x03l -> let a, o = memop s in v128_load16x4_s a o + | 0x04l -> let a, o = memop s in v128_load16x4_u a o + | 0x05l -> let a, o = memop s in v128_load32x2_s a o + | 0x06l -> let a, o = memop s in v128_load32x2_u a o + | 0x07l -> let a, o = memop s in v128_load8_splat a o + | 0x08l -> let a, o = memop s in v128_load16_splat a o + | 0x09l -> let a, o = memop s in v128_load32_splat a o + | 0x0al -> let a, o = memop s in v128_load64_splat a o | 0x0bl -> let a, o = memop s in v128_store a o | 0x0cl -> v128_const (at v128 s) | 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s)) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 94f0bd01f3..eee0dcd4b4 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -218,25 +218,25 @@ let memory_grow = MemoryGrow (* SIMD *) let v128_load align offset = SimdLoad {ty = V128Type; align; offset; sz = None} -let i16x8_load8x8_s align offset = +let v128_load8x8_s align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 SX)} -let i16x8_load8x8_u align offset = +let v128_load8x8_u align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 ZX)} -let i32x4_load16x4_s align offset = +let v128_load16x4_s align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 SX)} -let i32x4_load16x4_u align offset = +let v128_load16x4_u align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 ZX)} -let i64x2_load32x2_s align offset = +let v128_load32x2_s align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 SX)} -let i64x2_load32x2_u align offset = +let v128_load32x2_u align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 ZX)} -let v8x16_load_splat align offset = +let v128_load8_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack8, PackSplat)} -let v16x8_load_splat align offset = +let v128_load16_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack16, PackSplat)} -let v32x4_load_splat align offset = +let v128_load32_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackSplat)} -let v64x2_load_splat align offset = +let v128_load64_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = None} diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index a519615ebd..9eeac2da5e 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -409,8 +409,8 @@ let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, SimdOp.cvtop) let ternop = SimdOp.ternop (* Temporary wart here while we finalize the names of SIMD loads and extends. *) -let memop ?(type_in_name=true) name {ty; align; offset; _} sz = - (if type_in_name then value_type ty ^ "." else "") ^ name ^ +let memop name {ty; align; offset; _} sz = + value_type ty ^ "." ^ name ^ (if offset = 0l then "" else " offset=" ^ nat32 offset) ^ (if 1 lsl align = sz then "" else " align=" ^ nat (1 lsl align)) @@ -424,18 +424,18 @@ let simd_loadop (op : simd_loadop) = match op.sz with | None -> memop "load" op (size op.ty) | Some (sz, pack_simd) -> - let prefix, suffix, ext = + let suffix = (match sz, pack_simd with - | Pack64, Pack8x8 ext -> "i16x8", "8x8", extension ext - | Pack64, Pack16x4 ext -> "i32x4", "16x4", extension ext - | Pack64, Pack32x2 ext -> "i64x2", "32x2", extension ext - | Pack8, PackSplat -> "v8x16", "_splat", "" - | Pack16, PackSplat -> "v16x8", "_splat", "" - | Pack32, PackSplat -> "v32x4", "_splat", "" - | Pack64, PackSplat -> "v64x2", "_splat", "" + | Pack64, Pack8x8 ext -> "8x8" ^ extension ext + | Pack64, Pack16x4 ext -> "16x4" ^ extension ext + | Pack64, Pack32x2 ext -> "32x2" ^ extension ext + | Pack8, PackSplat -> "8_splat" + | Pack16, PackSplat -> "16_splat" + | Pack32, PackSplat -> "32_splat" + | Pack64, PackSplat -> "64_splat" | _ -> assert false ) in - memop ~type_in_name:false (prefix ^ ".load" ^ suffix ^ ext) op (packed_size sz) + memop ("load" ^ suffix) op (packed_size sz) let storeop op = match op.sz with diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index bc60afde9f..f7f69aa489 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -288,20 +288,20 @@ rule token = parse (ext s i64_load8_s i64_load8_u (opt a 0)) (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } - | "i16x8.load8x8_"(sign as s) - { LOAD (fun a o -> (ext s i16x8_load8x8_s i16x8_load8x8_u (opt a 3)) o) } - | "i32x4.load16x4_"(sign as s) - { LOAD (fun a o -> (ext s i32x4_load16x4_s i32x4_load16x4_u (opt a 3)) o) } - | "i64x2.load32x2_"(sign as s) - { LOAD (fun a o -> (ext s i64x2_load32x2_s i64x2_load32x2_u (opt a 3)) o) } - | "v8x16.load_splat" - { LOAD (fun a o -> (v8x16_load_splat (opt a 0)) o) } - | "v16x8.load_splat" - { LOAD (fun a o -> (v16x8_load_splat (opt a 1)) o) } - | "v32x4.load_splat" - { LOAD (fun a o -> (v32x4_load_splat (opt a 2)) o) } - | "v64x2.load_splat" - { LOAD (fun a o -> (v64x2_load_splat (opt a 3)) o) } + | "v128.load8x8_"(sign as s) + { LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } + | "v128.load16x4_"(sign as s) + { LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } + | "v128.load32x2_"(sign as s) + { LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } + | "v128.load8_splat" + { LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } + | "v128.load16_splat" + { LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } + | "v128.load32_splat" + { LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } + | "v128.load64_splat" + { LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } | (ixx as t)".store"(mem_size as sz) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; STORE (fun a o -> diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index c84c40b3f1..91acfc22e3 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -33,16 +33,16 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | Instruction | `simdop` | Immediate operands | | ---------------------------|---------:|--------------------| | `v128.load` | `0x00`| m:memarg | -| `i16x8.load8x8_s` | `0x01`| m:memarg | -| `i16x8.load8x8_u` | `0x02`| m:memarg | -| `i32x4.load16x4_s` | `0x03`| m:memarg | -| `i32x4.load16x4_u` | `0x04`| m:memarg | -| `i64x2.load32x2_s` | `0x05`| m:memarg | -| `i64x2.load32x2_u` | `0x06`| m:memarg | -| `v8x16.load_splat` | `0x07`| m:memarg | -| `v16x8.load_splat` | `0x08`| m:memarg | -| `v32x4.load_splat` | `0x09`| m:memarg | -| `v64x2.load_splat` | `0x0a`| m:memarg | +| `v128.load8x8_s` | `0x01`| m:memarg | +| `v128.load8x8_u` | `0x02`| m:memarg | +| `v128.load16x4_s` | `0x03`| m:memarg | +| `v128.load16x4_u` | `0x04`| m:memarg | +| `v128.load32x2_s` | `0x05`| m:memarg | +| `v128.load32x2_u` | `0x06`| m:memarg | +| `v128.load8_splat` | `0x07`| m:memarg | +| `v128.load16_splat` | `0x08`| m:memarg | +| `v128.load32_splat` | `0x09`| m:memarg | +| `v128.load64_splat` | `0x0a`| m:memarg | | `v128.store` | `0x0b`| m:memarg | | `v128.const` | `0x0c`| i:ImmByte[16] | | `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 961e53f4a8..e3c48535fb 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,16 +1,16 @@ | Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | | ---------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| | `v128.load` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v8x16.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v16x8.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v32x4.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 6ab88a8401..50daf4d824 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -1,16 +1,16 @@ | Memory instruction | opcode | | ------------------ | ------ | | v128.load | 0x00 | -| i16x8.load8x8_s | 0x01 | -| i16x8.load8x8_u | 0x02 | -| i32x4.load16x4_s | 0x03 | -| i32x4.load16x4_u | 0x04 | -| i64x2.load32x2_s | 0x05 | -| i64x2.load32x2_u | 0x06 | -| v8x16.load_splat | 0x07 | -| v16x8.load_splat | 0x08 | -| v32x4.load_splat | 0x09 | -| v64x2.load_splat | 0x0a | +| v128.load8x8_s | 0x01 | +| v128.load8x8_u | 0x02 | +| v128.load16x4_s | 0x03 | +| v128.load16x4_u | 0x04 | +| v128.load32x2_s | 0x05 | +| v128.load32x2_u | 0x06 | +| v128.load8_splat | 0x07 | +| v128.load16_splat | 0x08 | +| v128.load32_splat | 0x09 | +| v128.load64_splat | 0x0a | | v128.store | 0x0b | | Basic operation | opcode | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 35729d2a0e..78b19c11d4 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -768,10 +768,10 @@ def S.load(memarg): ### Load and Splat -* `v8x16.load_splat(memarg) -> v128` -* `v16x8.load_splat(memarg) -> v128` -* `v32x4.load_splat(memarg) -> v128` -* `v64x2.load_splat(memarg) -> v128` +* `v128.load8_splat(memarg) -> v128` +* `v128.load16_splat(memarg) -> v128` +* `v128.load32_splat(memarg) -> v128` +* `v128.load64_splat(memarg) -> v128` Load a single element and splat to all lanes of a `v128` vector. The natural alignment is the size of the element loaded. @@ -784,12 +784,12 @@ def S.load_splat(memarg): ### Load and Extend -* `i16x8.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane -* `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane -* `i32x4.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane -* `i32x4.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane -* `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane -* `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane +* `v128.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane +* `v128.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane +* `v128.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane +* `v128.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane +* `v128.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane +* `v128.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane Fetch consecutive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. The natural alignment is 8 bytes. diff --git a/test/core/simd/simd_align.wast b/test/core/simd/simd_align.wast index 79628f226c..ed91ed5c60 100644 --- a/test/core/simd/simd_align.wast +++ b/test/core/simd/simd_align.wast @@ -12,41 +12,41 @@ (module (memory 1) (func (v128.store align=8 (i32.const 0) (v128.const i32x4 0 1 2 3)))) (module (memory 1) (func (v128.store align=16 (i32.const 0) (v128.const i32x4 0 1 2 3)))) -(module (memory 1) (func (drop (i16x8.load8x8_s align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_s align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_s align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_s align=8 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_u align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_u align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_u align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i16x8.load8x8_u align=8 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_s align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_s align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_s align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_s align=8 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_u align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_u align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_u align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i32x4.load16x4_u align=8 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_s align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_s align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_s align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_s align=8 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_u align=1 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_u align=2 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_u align=4 (i32.const 0))))) -(module (memory 1) (func (drop (i64x2.load32x2_u align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8x8_u align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16x4_u align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_s align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_s align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_s align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_s align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_u align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_u align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_u align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32x2_u align=8 (i32.const 0))))) -(module (memory 1) (func (drop (v8x16.load_splat align=1 (i32.const 0))))) -(module (memory 1) (func (drop (v16x8.load_splat align=1 (i32.const 0))))) -(module (memory 1) (func (drop (v16x8.load_splat align=2 (i32.const 0))))) -(module (memory 1) (func (drop (v32x4.load_splat align=1 (i32.const 0))))) -(module (memory 1) (func (drop (v32x4.load_splat align=2 (i32.const 0))))) -(module (memory 1) (func (drop (v32x4.load_splat align=4 (i32.const 0))))) -(module (memory 1) (func (drop (v64x2.load_splat align=1 (i32.const 0))))) -(module (memory 1) (func (drop (v64x2.load_splat align=2 (i32.const 0))))) -(module (memory 1) (func (drop (v64x2.load_splat align=4 (i32.const 0))))) -(module (memory 1) (func (drop (v64x2.load_splat align=8 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load8_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load16_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load32_splat align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load64_splat align=1 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load64_splat align=2 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load64_splat align=4 (i32.const 0))))) +(module (memory 1) (func (drop (v128.load64_splat align=8 (i32.const 0))))) ;; Invalid alignment @@ -59,43 +59,43 @@ "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i16x8.load8x8_s align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load8x8_s align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i16x8.load8x8_u align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load8x8_u align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i32x4.load16x4_s align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load16x4_s align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i32x4.load16x4_u align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load16x4_u align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i64x2.load32x2_s align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load32x2_s align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (i64x2.load32x2_u align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load32x2_u align=16 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (v8x16.load_splat align=2 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load8_splat align=2 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (v16x8.load_splat align=4 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load16_splat align=4 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (v32x4.load_splat align=8 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load32_splat align=8 (i32.const 0)))) "alignment must not be larger than natural" ) (assert_invalid - (module (memory 1) (func (result v128) (v64x2.load_splat align=16 (i32.const 0)))) + (module (memory 1) (func (result v128) (v128.load64_splat align=16 (i32.const 0)))) "alignment must not be larger than natural" ) @@ -139,169 +139,169 @@ ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_s align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_s align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_s align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_s align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_s align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_s align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_u align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_u align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_u align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_u align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i16x8.load8x8_u align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8x8_u align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_s align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_s align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_s align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_s align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_s align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_s align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_u align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_u align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_u align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_u align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i32x4.load16x4_u align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16x4_u align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_s align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_s align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_s align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_s align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_s align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_s align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_u align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_u align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_u align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_u align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (i64x2.load32x2_u align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32x2_u align=7 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v8x16.load_splat align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8_splat align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v8x16.load_splat align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load8_splat align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v16x8.load_splat align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16_splat align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v16x8.load_splat align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load16_splat align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v32x4.load_splat align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32_splat align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v32x4.load_splat align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32_splat align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v32x4.load_splat align=3 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load32_splat align=3 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v64x2.load_splat align=-1 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load64_splat align=-1 (i32.const 0)))" ) "unknown operator" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v64x2.load_splat align=0 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load64_splat align=0 (i32.const 0)))" ) "alignment must be a power of two" ) (assert_malformed (module quote - "(memory 1) (func (result v128) (v64x2.load_splat align=7 (i32.const 0)))" + "(memory 1) (func (result v128) (v128.load64_splat align=7 (i32.const 0)))" ) "alignment must be a power of two" ) @@ -352,4 +352,4 @@ (assert_return (invoke "v128_unaligned_read_and_write") (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (assert_return (invoke "v128_aligned_read_and_write") (v128.const i16x8 0 1 2 3 4 5 6 7)) (assert_return (invoke "v128_aligned_read_and_unaligned_write") (v128.const i32x4 0 1 2 3)) -(assert_return (invoke "v128_unaligned_read_and_aligned_write") (v128.const i32x4 0 1 2 3)) \ No newline at end of file +(assert_return (invoke "v128_unaligned_read_and_aligned_write") (v128.const i32x4 0 1 2 3)) diff --git a/test/core/simd/simd_load_extend.wast b/test/core/simd/simd_load_extend.wast index 8f47fab4f6..b9982bbfd0 100644 --- a/test/core/simd/simd_load_extend.wast +++ b/test/core/simd/simd_load_extend.wast @@ -5,292 +5,292 @@ (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") (data (i32.const 65520) "\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") - (func (export "i16x8.load8x8_s") (param $0 i32) (result v128) - (i16x8.load8x8_s (local.get $0)) + (func (export "v128.load8x8_s") (param $0 i32) (result v128) + (v128.load8x8_s (local.get $0)) ) - (func (export "i16x8.load8x8_u") (param $0 i32) (result v128) - (i16x8.load8x8_u (local.get $0)) + (func (export "v128.load8x8_u") (param $0 i32) (result v128) + (v128.load8x8_u (local.get $0)) ) - (func (export "i32x4.load16x4_s") (param $0 i32) (result v128) - (i32x4.load16x4_s (local.get $0)) + (func (export "v128.load16x4_s") (param $0 i32) (result v128) + (v128.load16x4_s (local.get $0)) ) - (func (export "i32x4.load16x4_u") (param $0 i32) (result v128) - (i32x4.load16x4_u (local.get $0)) + (func (export "v128.load16x4_u") (param $0 i32) (result v128) + (v128.load16x4_u (local.get $0)) ) - (func (export "i64x2.load32x2_s") (param $0 i32) (result v128) - (i64x2.load32x2_s (local.get $0)) + (func (export "v128.load32x2_s") (param $0 i32) (result v128) + (v128.load32x2_s (local.get $0)) ) - (func (export "i64x2.load32x2_u") (param $0 i32) (result v128) - (i64x2.load32x2_u (local.get $0)) + (func (export "v128.load32x2_u") (param $0 i32) (result v128) + (v128.load32x2_u (local.get $0)) ) ;; load by a constant amount - (func (export "i16x8.load8x8_s_const0") (result v128) - (i16x8.load8x8_s (i32.const 0)) + (func (export "v128.load8x8_s_const0") (result v128) + (v128.load8x8_s (i32.const 0)) ) - (func (export "i16x8.load8x8_u_const8") (result v128) - (i16x8.load8x8_u (i32.const 8)) + (func (export "v128.load8x8_u_const8") (result v128) + (v128.load8x8_u (i32.const 8)) ) - (func (export "i32x4.load16x4_s_const10") (result v128) - (i32x4.load16x4_s (i32.const 10)) + (func (export "v128.load16x4_s_const10") (result v128) + (v128.load16x4_s (i32.const 10)) ) - (func (export "i32x4.load16x4_u_const20") (result v128) - (i32x4.load16x4_u (i32.const 20)) + (func (export "v128.load16x4_u_const20") (result v128) + (v128.load16x4_u (i32.const 20)) ) - (func (export "i64x2.load32x2_s_const65520") (result v128) - (i64x2.load32x2_s (i32.const 65520)) + (func (export "v128.load32x2_s_const65520") (result v128) + (v128.load32x2_s (i32.const 65520)) ) - (func (export "i64x2.load32x2_u_const65526") (result v128) - (i64x2.load32x2_u (i32.const 65526)) + (func (export "v128.load32x2_u_const65526") (result v128) + (v128.load32x2_u (i32.const 65526)) ) ;; load data with different offset/align arguments ;; i16x8 - (func (export "i16x8.load8x8_s_offset0") (param $0 i32) (result v128) - (i16x8.load8x8_s offset=0 (local.get $0)) + (func (export "v128.load8x8_s_offset0") (param $0 i32) (result v128) + (v128.load8x8_s offset=0 (local.get $0)) ) - (func (export "i16x8.load8x8_s_align1") (param $0 i32) (result v128) - (i16x8.load8x8_s align=1 (local.get $0)) + (func (export "v128.load8x8_s_align1") (param $0 i32) (result v128) + (v128.load8x8_s align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_s_offset0_align1") (param $0 i32) (result v128) - (i16x8.load8x8_s offset=0 align=1 (local.get $0)) + (func (export "v128.load8x8_s_offset0_align1") (param $0 i32) (result v128) + (v128.load8x8_s offset=0 align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_s_offset1_align1") (param $0 i32) (result v128) - (i16x8.load8x8_s offset=1 align=1 (local.get $0)) + (func (export "v128.load8x8_s_offset1_align1") (param $0 i32) (result v128) + (v128.load8x8_s offset=1 align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_s_offset10_align4") (param $0 i32) (result v128) - (i16x8.load8x8_s offset=10 align=4 (local.get $0)) + (func (export "v128.load8x8_s_offset10_align4") (param $0 i32) (result v128) + (v128.load8x8_s offset=10 align=4 (local.get $0)) ) - (func (export "i16x8.load8x8_s_offset20_align8") (param $0 i32) (result v128) - (i16x8.load8x8_s offset=20 align=8 (local.get $0)) + (func (export "v128.load8x8_s_offset20_align8") (param $0 i32) (result v128) + (v128.load8x8_s offset=20 align=8 (local.get $0)) ) - (func (export "i16x8.load8x8_u_offset0") (param $0 i32) (result v128) - (i16x8.load8x8_u offset=0 (local.get $0)) + (func (export "v128.load8x8_u_offset0") (param $0 i32) (result v128) + (v128.load8x8_u offset=0 (local.get $0)) ) - (func (export "i16x8.load8x8_u_align1") (param $0 i32) (result v128) - (i16x8.load8x8_u align=1 (local.get $0)) + (func (export "v128.load8x8_u_align1") (param $0 i32) (result v128) + (v128.load8x8_u align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_u_offset0_align1") (param $0 i32) (result v128) - (i16x8.load8x8_u offset=0 align=1 (local.get $0)) + (func (export "v128.load8x8_u_offset0_align1") (param $0 i32) (result v128) + (v128.load8x8_u offset=0 align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_u_offset1_align1") (param $0 i32) (result v128) - (i16x8.load8x8_u offset=1 align=1 (local.get $0)) + (func (export "v128.load8x8_u_offset1_align1") (param $0 i32) (result v128) + (v128.load8x8_u offset=1 align=1 (local.get $0)) ) - (func (export "i16x8.load8x8_u_offset10_align4") (param $0 i32) (result v128) - (i16x8.load8x8_u offset=10 align=4 (local.get $0)) + (func (export "v128.load8x8_u_offset10_align4") (param $0 i32) (result v128) + (v128.load8x8_u offset=10 align=4 (local.get $0)) ) - (func (export "i16x8.load8x8_u_offset20_align8") (param $0 i32) (result v128) - (i16x8.load8x8_u offset=20 align=8 (local.get $0)) + (func (export "v128.load8x8_u_offset20_align8") (param $0 i32) (result v128) + (v128.load8x8_u offset=20 align=8 (local.get $0)) ) ;; i32x4 - (func (export "i32x4.load16x4_s_offset0") (param $0 i32) (result v128) - (i32x4.load16x4_s offset=0 (local.get $0)) + (func (export "v128.load16x4_s_offset0") (param $0 i32) (result v128) + (v128.load16x4_s offset=0 (local.get $0)) ) - (func (export "i32x4.load16x4_s_align1") (param $0 i32) (result v128) - (i32x4.load16x4_s align=1 (local.get $0)) + (func (export "v128.load16x4_s_align1") (param $0 i32) (result v128) + (v128.load16x4_s align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_s_offset0_align1") (param $0 i32) (result v128) - (i32x4.load16x4_s offset=0 align=1 (local.get $0)) + (func (export "v128.load16x4_s_offset0_align1") (param $0 i32) (result v128) + (v128.load16x4_s offset=0 align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_s_offset1_align1") (param $0 i32) (result v128) - (i32x4.load16x4_s offset=1 align=1 (local.get $0)) + (func (export "v128.load16x4_s_offset1_align1") (param $0 i32) (result v128) + (v128.load16x4_s offset=1 align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_s_offset10_align4") (param $0 i32) (result v128) - (i32x4.load16x4_s offset=10 align=4 (local.get $0)) + (func (export "v128.load16x4_s_offset10_align4") (param $0 i32) (result v128) + (v128.load16x4_s offset=10 align=4 (local.get $0)) ) - (func (export "i32x4.load16x4_s_offset20_align8") (param $0 i32) (result v128) - (i32x4.load16x4_s offset=20 align=8 (local.get $0)) + (func (export "v128.load16x4_s_offset20_align8") (param $0 i32) (result v128) + (v128.load16x4_s offset=20 align=8 (local.get $0)) ) - (func (export "i32x4.load16x4_u_offset0") (param $0 i32) (result v128) - (i32x4.load16x4_u offset=0 (local.get $0)) + (func (export "v128.load16x4_u_offset0") (param $0 i32) (result v128) + (v128.load16x4_u offset=0 (local.get $0)) ) - (func (export "i32x4.load16x4_u_align1") (param $0 i32) (result v128) - (i32x4.load16x4_u align=1 (local.get $0)) + (func (export "v128.load16x4_u_align1") (param $0 i32) (result v128) + (v128.load16x4_u align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_u_offset0_align1") (param $0 i32) (result v128) - (i32x4.load16x4_u offset=0 align=1 (local.get $0)) + (func (export "v128.load16x4_u_offset0_align1") (param $0 i32) (result v128) + (v128.load16x4_u offset=0 align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_u_offset1_align1") (param $0 i32) (result v128) - (i32x4.load16x4_u offset=1 align=1 (local.get $0)) + (func (export "v128.load16x4_u_offset1_align1") (param $0 i32) (result v128) + (v128.load16x4_u offset=1 align=1 (local.get $0)) ) - (func (export "i32x4.load16x4_u_offset10_align4") (param $0 i32) (result v128) - (i32x4.load16x4_u offset=10 align=4 (local.get $0)) + (func (export "v128.load16x4_u_offset10_align4") (param $0 i32) (result v128) + (v128.load16x4_u offset=10 align=4 (local.get $0)) ) - (func (export "i32x4.load16x4_u_offset20_align8") (param $0 i32) (result v128) - (i32x4.load16x4_u offset=20 align=8 (local.get $0)) + (func (export "v128.load16x4_u_offset20_align8") (param $0 i32) (result v128) + (v128.load16x4_u offset=20 align=8 (local.get $0)) ) ;; i64x2 - (func (export "i64x2.load32x2_s_offset0") (param $0 i32) (result v128) - (i64x2.load32x2_s offset=0 (local.get $0)) + (func (export "v128.load32x2_s_offset0") (param $0 i32) (result v128) + (v128.load32x2_s offset=0 (local.get $0)) ) - (func (export "i64x2.load32x2_s_align1") (param $0 i32) (result v128) - (i64x2.load32x2_s align=1 (local.get $0)) + (func (export "v128.load32x2_s_align1") (param $0 i32) (result v128) + (v128.load32x2_s align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_s_offset0_align1") (param $0 i32) (result v128) - (i64x2.load32x2_s offset=0 align=1 (local.get $0)) + (func (export "v128.load32x2_s_offset0_align1") (param $0 i32) (result v128) + (v128.load32x2_s offset=0 align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_s_offset1_align1") (param $0 i32) (result v128) - (i64x2.load32x2_s offset=1 align=1 (local.get $0)) + (func (export "v128.load32x2_s_offset1_align1") (param $0 i32) (result v128) + (v128.load32x2_s offset=1 align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_s_offset10_align4") (param $0 i32) (result v128) - (i64x2.load32x2_s offset=10 align=4 (local.get $0)) + (func (export "v128.load32x2_s_offset10_align4") (param $0 i32) (result v128) + (v128.load32x2_s offset=10 align=4 (local.get $0)) ) - (func (export "i64x2.load32x2_s_offset20_align8") (param $0 i32) (result v128) - (i64x2.load32x2_s offset=20 align=8 (local.get $0)) + (func (export "v128.load32x2_s_offset20_align8") (param $0 i32) (result v128) + (v128.load32x2_s offset=20 align=8 (local.get $0)) ) - (func (export "i64x2.load32x2_u_offset0") (param $0 i32) (result v128) - (i64x2.load32x2_u offset=0 (local.get $0)) + (func (export "v128.load32x2_u_offset0") (param $0 i32) (result v128) + (v128.load32x2_u offset=0 (local.get $0)) ) - (func (export "i64x2.load32x2_u_align1") (param $0 i32) (result v128) - (i64x2.load32x2_u align=1 (local.get $0)) + (func (export "v128.load32x2_u_align1") (param $0 i32) (result v128) + (v128.load32x2_u align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_u_offset0_align1") (param $0 i32) (result v128) - (i64x2.load32x2_u offset=0 align=1 (local.get $0)) + (func (export "v128.load32x2_u_offset0_align1") (param $0 i32) (result v128) + (v128.load32x2_u offset=0 align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_u_offset1_align1") (param $0 i32) (result v128) - (i64x2.load32x2_u offset=1 align=1 (local.get $0)) + (func (export "v128.load32x2_u_offset1_align1") (param $0 i32) (result v128) + (v128.load32x2_u offset=1 align=1 (local.get $0)) ) - (func (export "i64x2.load32x2_u_offset10_align4") (param $0 i32) (result v128) - (i64x2.load32x2_u offset=10 align=4 (local.get $0)) + (func (export "v128.load32x2_u_offset10_align4") (param $0 i32) (result v128) + (v128.load32x2_u offset=10 align=4 (local.get $0)) ) - (func (export "i64x2.load32x2_u_offset20_align8") (param $0 i32) (result v128) - (i64x2.load32x2_u offset=20 align=8 (local.get $0)) + (func (export "v128.load32x2_u_offset20_align8") (param $0 i32) (result v128) + (v128.load32x2_u offset=20 align=8 (local.get $0)) ) ) ;; normal -(assert_return (invoke "i16x8.load8x8_s" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i16x8.load8x8_u" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i32x4.load16x4_s" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) -(assert_return (invoke "i32x4.load16x4_u" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) -(assert_return (invoke "i64x2.load32x2_s" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) -(assert_return (invoke "i64x2.load32x2_u" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) -(assert_return (invoke "i16x8.load8x8_s" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0xFF80 0xFF81)) -(assert_return (invoke "i16x8.load8x8_u" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0x0080 0x0081)) -(assert_return (invoke "i32x4.load16x4_s" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) -(assert_return (invoke "i32x4.load16x4_u" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0x00008180)) -(assert_return (invoke "i64x2.load32x2_s" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) -(assert_return (invoke "i64x2.load32x2_u" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0x0000000081800F0E)) -(assert_return (invoke "i16x8.load8x8_s" (i32.const 20)) (v128.const i16x8 0xff84 0xff85 0xff86 0xff87 0xff88 0xff89 0x0000 0x0000)) -(assert_return (invoke "i16x8.load8x8_u" (i32.const 20)) (v128.const i16x8 0x0084 0x0085 0x0086 0x0087 0x0088 0x0089 0x0000 0x0000)) -(assert_return (invoke "i32x4.load16x4_s" (i32.const 20)) (v128.const i32x4 0xffff8584 0xffff8786 0xffff8988 0x00000000)) -(assert_return (invoke "i32x4.load16x4_u" (i32.const 20)) (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) -(assert_return (invoke "i64x2.load32x2_s" (i32.const 20)) (v128.const i64x2 0xFFFFFFFF87868584 0x0000000000008988)) -(assert_return (invoke "i64x2.load32x2_u" (i32.const 20)) (v128.const i64x2 0x0000000087868584 0x0000000000008988)) +(assert_return (invoke "v128.load8x8_s" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load8x8_u" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load16x4_s" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "v128.load16x4_u" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "v128.load32x2_s" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "v128.load32x2_u" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "v128.load8x8_s" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0xFF80 0xFF81)) +(assert_return (invoke "v128.load8x8_u" (i32.const 10)) (v128.const i16x8 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F 0x0080 0x0081)) +(assert_return (invoke "v128.load16x4_s" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) +(assert_return (invoke "v128.load16x4_u" (i32.const 10)) (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0x00008180)) +(assert_return (invoke "v128.load32x2_s" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "v128.load32x2_u" (i32.const 10)) (v128.const i64x2 0x000000000D0C0B0A 0x0000000081800F0E)) +(assert_return (invoke "v128.load8x8_s" (i32.const 20)) (v128.const i16x8 0xff84 0xff85 0xff86 0xff87 0xff88 0xff89 0x0000 0x0000)) +(assert_return (invoke "v128.load8x8_u" (i32.const 20)) (v128.const i16x8 0x0084 0x0085 0x0086 0x0087 0x0088 0x0089 0x0000 0x0000)) +(assert_return (invoke "v128.load16x4_s" (i32.const 20)) (v128.const i32x4 0xffff8584 0xffff8786 0xffff8988 0x00000000)) +(assert_return (invoke "v128.load16x4_u" (i32.const 20)) (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) +(assert_return (invoke "v128.load32x2_s" (i32.const 20)) (v128.const i64x2 0xFFFFFFFF87868584 0x0000000000008988)) +(assert_return (invoke "v128.load32x2_u" (i32.const 20)) (v128.const i64x2 0x0000000087868584 0x0000000000008988)) ;; load by a constant amount -(assert_return (invoke "i16x8.load8x8_s_const0") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i16x8.load8x8_u_const8") (v128.const i16x8 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F)) -(assert_return (invoke "i32x4.load16x4_s_const10") (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) -(assert_return (invoke "i32x4.load16x4_u_const20") (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) -(assert_return (invoke "i64x2.load32x2_s_const65520") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) -(assert_return (invoke "i64x2.load32x2_u_const65526") (v128.const i64x2 0x0000000083828180 0x0000000087868584)) +(assert_return (invoke "v128.load8x8_s_const0") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load8x8_u_const8") (v128.const i16x8 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E 0x000F)) +(assert_return (invoke "v128.load16x4_s_const10") (v128.const i32x4 0x00000B0A 0x00000D0C 0x00000F0E 0xFFFF8180)) +(assert_return (invoke "v128.load16x4_u_const20") (v128.const i32x4 0x00008584 0x00008786 0x00008988 0x00000000)) +(assert_return (invoke "v128.load32x2_s_const65520") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "v128.load32x2_u_const65526") (v128.const i64x2 0x0000000083828180 0x0000000087868584)) ;; load data with different offset/align arguments ;; i16x8 -(assert_return (invoke "i16x8.load8x8_s_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i16x8.load8x8_s_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) -(assert_return (invoke "i16x8.load8x8_s_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) -(assert_return (invoke "i16x8.load8x8_s_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0xFF80 0xFF81 0xFF82 0xFF83 0xFF84)) -(assert_return (invoke "i16x8.load8x8_s_offset20_align8" (i32.const 4)) (v128.const i16x8 0xFF88 0xFF89 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) -(assert_return (invoke "i16x8.load8x8_u_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i16x8.load8x8_u_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) -(assert_return (invoke "i16x8.load8x8_u_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) -(assert_return (invoke "i16x8.load8x8_u_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0x0080 0x0081 0x0082 0x0083 0x0084)) -(assert_return (invoke "i16x8.load8x8_u_offset20_align8" (i32.const 4)) (v128.const i16x8 0x0088 0x0089 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) +(assert_return (invoke "v128.load8x8_s_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load8x8_s_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "v128.load8x8_s_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) +(assert_return (invoke "v128.load8x8_s_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0xFF80 0xFF81 0xFF82 0xFF83 0xFF84)) +(assert_return (invoke "v128.load8x8_s_offset20_align8" (i32.const 4)) (v128.const i16x8 0xFF88 0xFF89 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) +(assert_return (invoke "v128.load8x8_u_offset0" (i32.const 0)) (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load8x8_u_align1" (i32.const 1)) (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "v128.load8x8_u_offset0_align1" (i32.const 2)) (v128.const i16x8 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009)) +(assert_return (invoke "v128.load8x8_u_offset10_align4" (i32.const 3)) (v128.const i16x8 0x000D 0x000E 0x000F 0x0080 0x0081 0x0082 0x0083 0x0084)) +(assert_return (invoke "v128.load8x8_u_offset20_align8" (i32.const 4)) (v128.const i16x8 0x0088 0x0089 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000)) ;; i32x4 -(assert_return (invoke "i32x4.load16x4_s_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) -(assert_return (invoke "i32x4.load16x4_s_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) -(assert_return (invoke "i32x4.load16x4_s_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) -(assert_return (invoke "i32x4.load16x4_s_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0xFFFF800F 0xFFFF8281 0xFFFF8483)) -(assert_return (invoke "i32x4.load16x4_s_offset20_align8" (i32.const 4)) (v128.const i32x4 0xFFFF8988 0x00000000 0x00000000 0x00000000)) -(assert_return (invoke "i32x4.load16x4_u_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) -(assert_return (invoke "i32x4.load16x4_u_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) -(assert_return (invoke "i32x4.load16x4_u_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) -(assert_return (invoke "i32x4.load16x4_u_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0x0000800F 0x00008281 0x00008483)) -(assert_return (invoke "i32x4.load16x4_u_offset20_align8" (i32.const 4)) (v128.const i32x4 0x00008988 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load16x4_s_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "v128.load16x4_s_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) +(assert_return (invoke "v128.load16x4_s_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "v128.load16x4_s_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0xFFFF800F 0xFFFF8281 0xFFFF8483)) +(assert_return (invoke "v128.load16x4_s_offset20_align8" (i32.const 4)) (v128.const i32x4 0xFFFF8988 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load16x4_u_offset0" (i32.const 0)) (v128.const i32x4 0x00000100 0x00000302 0x00000504 0x00000706)) +(assert_return (invoke "v128.load16x4_u_align1" (i32.const 1)) (v128.const i32x4 0x00000201 0x00000403 0x00000605 0x00000807)) +(assert_return (invoke "v128.load16x4_u_offset0_align1" (i32.const 2)) (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "v128.load16x4_u_offset10_align4" (i32.const 3)) (v128.const i32x4 0x00000E0D 0x0000800F 0x00008281 0x00008483)) +(assert_return (invoke "v128.load16x4_u_offset20_align8" (i32.const 4)) (v128.const i32x4 0x00008988 0x00000000 0x00000000 0x00000000)) ;; i64x2 -(assert_return (invoke "i64x2.load32x2_s_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) -(assert_return (invoke "i64x2.load32x2_s_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) -(assert_return (invoke "i64x2.load32x2_s_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) -(assert_return (invoke "i64x2.load32x2_s_offset10_align4" (i32.const 3)) (v128.const i64x2 0xFFFFFFFF800F0E0D 0xFFFFFFFF84838281)) -(assert_return (invoke "i64x2.load32x2_s_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) -(assert_return (invoke "i64x2.load32x2_u_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) -(assert_return (invoke "i64x2.load32x2_u_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) -(assert_return (invoke "i64x2.load32x2_u_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) -(assert_return (invoke "i64x2.load32x2_u_offset10_align4" (i32.const 3)) (v128.const i64x2 0x00000000800F0E0D 0x0000000084838281)) -(assert_return (invoke "i64x2.load32x2_u_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) +(assert_return (invoke "v128.load32x2_s_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "v128.load32x2_s_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) +(assert_return (invoke "v128.load32x2_s_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) +(assert_return (invoke "v128.load32x2_s_offset10_align4" (i32.const 3)) (v128.const i64x2 0xFFFFFFFF800F0E0D 0xFFFFFFFF84838281)) +(assert_return (invoke "v128.load32x2_s_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) +(assert_return (invoke "v128.load32x2_u_offset0" (i32.const 0)) (v128.const i64x2 0x0000000003020100 0x0000000007060504)) +(assert_return (invoke "v128.load32x2_u_align1" (i32.const 1)) (v128.const i64x2 0x0000000004030201 0x0000000008070605)) +(assert_return (invoke "v128.load32x2_u_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0000000005040302 0x0000000009080706)) +(assert_return (invoke "v128.load32x2_u_offset10_align4" (i32.const 3)) (v128.const i64x2 0x00000000800F0E0D 0x0000000084838281)) +(assert_return (invoke "v128.load32x2_u_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) ;; out of bounds memory access -(assert_trap (invoke "i16x8.load8x8_s" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i16x8.load8x8_u" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i32x4.load16x4_s" (i32.const 65536)) "out of bounds memory access") -(assert_trap (invoke "i32x4.load16x4_u" (i32.const 65536)) "out of bounds memory access") -(assert_trap (invoke "i64x2.load32x2_s" (i32.const 65529)) "out of bounds memory access") -(assert_trap (invoke "i64x2.load32x2_u" (i32.const 65529)) "out of bounds memory access") +(assert_trap (invoke "v128.load8x8_s" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load8x8_u" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load16x4_s" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "v128.load16x4_u" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "v128.load32x2_s" (i32.const 65529)) "out of bounds memory access") +(assert_trap (invoke "v128.load32x2_u" (i32.const 65529)) "out of bounds memory access") -(assert_trap (invoke "i16x8.load8x8_s_offset1_align1" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i16x8.load8x8_u_offset1_align1" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i32x4.load16x4_s_offset1_align1" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i32x4.load16x4_u_offset1_align1" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i64x2.load32x2_s_offset1_align1" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "i64x2.load32x2_u_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load8x8_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load8x8_u_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load16x4_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load16x4_u_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load32x2_s_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load32x2_u_offset1_align1" (i32.const -1)) "out of bounds memory access") ;; type check -(assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_s (f32.const 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (i16x8.load8x8_u (f32.const 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (i32x4.load16x4_s (f64.const 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (i32x4.load16x4_u (f64.const 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_s (v128.const i32x4 0 0 0 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (i64x2.load32x2_u (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load8x8_s (f32.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load8x8_u (f32.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load16x4_s (f64.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load16x4_u (f64.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load32x2_s (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load32x2_u (v128.const i32x4 0 0 0 0)))) "type mismatch") ;; Test operation with empty argument (assert_invalid (module (memory 0) - (func $i16x8.load8x8_s-arg-empty (result v128) - (i16x8.load8x8_s) + (func $v128.load8x8_s-arg-empty (result v128) + (v128.load8x8_s) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $i16x8.load8x8_u-arg-empty (result v128) - (i16x8.load8x8_u) + (func $v128.load8x8_u-arg-empty (result v128) + (v128.load8x8_u) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $i32x4.load16x4_s-arg-empty (result v128) - (i32x4.load16x4_s) + (func $v128.load16x4_s-arg-empty (result v128) + (v128.load16x4_s) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $i32x4.load16x4_u-arg-empty (result v128) - (i32x4.load16x4_u) + (func $v128.load16x4_u-arg-empty (result v128) + (v128.load16x4_u) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $i64x2.load32x2_s-arg-empty (result v128) - (i64x2.load32x2_s) + (func $v128.load32x2_s-arg-empty (result v128) + (v128.load32x2_s) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $i64x2.load32x2_u-arg-empty (result v128) - (i64x2.load32x2_u) + (func $v128.load32x2_u-arg-empty (result v128) + (v128.load32x2_u) ) ) "type mismatch" @@ -309,76 +309,76 @@ (module (memory 1) (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") - (func (export "i16x8.load8x8_s-in-block") (result v128) - (block (result v128) (block (result v128) (i16x8.load8x8_s (i32.const 0)))) + (func (export "v128.load8x8_s-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load8x8_s (i32.const 0)))) ) - (func (export "i16x8.load8x8_u-in-block") (result v128) - (block (result v128) (block (result v128) (i16x8.load8x8_u (i32.const 1)))) + (func (export "v128.load8x8_u-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load8x8_u (i32.const 1)))) ) - (func (export "i32x4.load16x4_s-in-block") (result v128) - (block (result v128) (block (result v128) (i32x4.load16x4_s (i32.const 2)))) + (func (export "v128.load16x4_s-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load16x4_s (i32.const 2)))) ) - (func (export "i32x4.load16x4_u-in-block") (result v128) - (block (result v128) (block (result v128) (i32x4.load16x4_u (i32.const 3)))) + (func (export "v128.load16x4_u-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load16x4_u (i32.const 3)))) ) - (func (export "i64x2.load32x2_s-in-block") (result v128) - (block (result v128) (block (result v128) (i64x2.load32x2_s (i32.const 4)))) + (func (export "v128.load32x2_s-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load32x2_s (i32.const 4)))) ) - (func (export "i64x2.load32x2_u-in-block") (result v128) - (block (result v128) (block (result v128) (i64x2.load32x2_u (i32.const 5)))) + (func (export "v128.load32x2_u-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load32x2_u (i32.const 5)))) ) - (func (export "i16x8.load8x8_s-as-br-value") (result v128) - (block (result v128) (br 0 (i16x8.load8x8_s (i32.const 6)))) + (func (export "v128.load8x8_s-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load8x8_s (i32.const 6)))) ) - (func (export "i16x8.load8x8_u-as-br-value") (result v128) - (block (result v128) (br 0 (i16x8.load8x8_u (i32.const 7)))) + (func (export "v128.load8x8_u-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load8x8_u (i32.const 7)))) ) - (func (export "i32x4.load16x4_s-as-br-value") (result v128) - (block (result v128) (br 0 (i32x4.load16x4_s (i32.const 8)))) + (func (export "v128.load16x4_s-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load16x4_s (i32.const 8)))) ) - (func (export "i32x4.load16x4_u-as-br-value") (result v128) - (block (result v128) (br 0 (i32x4.load16x4_u (i32.const 9)))) + (func (export "v128.load16x4_u-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load16x4_u (i32.const 9)))) ) - (func (export "i64x2.load32x2_s-as-br-value") (result v128) - (block (result v128) (br 0 (i64x2.load32x2_s (i32.const 10)))) + (func (export "v128.load32x2_s-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load32x2_s (i32.const 10)))) ) - (func (export "i64x2.load32x2_u-as-br-value") (result v128) - (block (result v128) (br 0 (i64x2.load32x2_u (i32.const 11)))) + (func (export "v128.load32x2_u-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load32x2_u (i32.const 11)))) ) - (func (export "i16x8.load8x8_s-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i16x8.load8x8_s (i32.const 12))) + (func (export "v128.load8x8_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load8x8_s (i32.const 12))) ) - (func (export "i16x8.load8x8_u-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i16x8.load8x8_u (i32.const 13))) + (func (export "v128.load8x8_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load8x8_u (i32.const 13))) ) - (func (export "i32x4.load16x4_s-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i32x4.load16x4_s (i32.const 14))) + (func (export "v128.load16x4_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load16x4_s (i32.const 14))) ) - (func (export "i32x4.load16x4_u-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i32x4.load16x4_u (i32.const 15))) + (func (export "v128.load16x4_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load16x4_u (i32.const 15))) ) - (func (export "i64x2.load32x2_s-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i64x2.load32x2_s (i32.const 16))) + (func (export "v128.load32x2_s-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load32x2_s (i32.const 16))) ) - (func (export "i64x2.load32x2_u-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (i64x2.load32x2_u (i32.const 17))) + (func (export "v128.load32x2_u-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load32x2_u (i32.const 17))) ) ) -(assert_return (invoke "i16x8.load8x8_s-in-block") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) -(assert_return (invoke "i16x8.load8x8_u-in-block") (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) -(assert_return (invoke "i32x4.load16x4_s-in-block") (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) -(assert_return (invoke "i32x4.load16x4_u-in-block") (v128.const i32x4 0x00000403 0x00000605 0x00000807 0x00000A09)) -(assert_return (invoke "i64x2.load32x2_s-in-block") (v128.const i64x2 0x0000000007060504 0x000000000B0A0908)) -(assert_return (invoke "i64x2.load32x2_u-in-block") (v128.const i64x2 0x0000000008070605 0x000000000C0B0A09)) -(assert_return (invoke "i16x8.load8x8_s-as-br-value") (v128.const i16x8 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D)) -(assert_return (invoke "i16x8.load8x8_u-as-br-value") (v128.const i16x8 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E)) -(assert_return (invoke "i32x4.load16x4_s-as-br-value") (v128.const i32x4 0x00000908 0x00000B0A 0x00000D0C 0x00000F0E)) -(assert_return (invoke "i32x4.load16x4_u-as-br-value") (v128.const i32x4 0x00000A09 0x00000C0B 0x00000E0D 0x0000800F)) -(assert_return (invoke "i64x2.load32x2_s-as-br-value") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) -(assert_return (invoke "i64x2.load32x2_u-as-br-value") (v128.const i64x2 0x000000000E0D0C0B 0x000000008281800F)) -(assert_return (invoke "i16x8.load8x8_s-extract_lane_s-operand") (i32.const 12)) -(assert_return (invoke "i16x8.load8x8_u-extract_lane_s-operand") (i32.const 13)) -(assert_return (invoke "i32x4.load16x4_s-extract_lane_s-operand") (i32.const 14)) -(assert_return (invoke "i32x4.load16x4_u-extract_lane_s-operand") (i32.const 15)) -(assert_return (invoke "i64x2.load32x2_s-extract_lane_s-operand") (i32.const -128)) -(assert_return (invoke "i64x2.load32x2_u-extract_lane_s-operand") (i32.const -127)) +(assert_return (invoke "v128.load8x8_s-in-block") (v128.const i16x8 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007)) +(assert_return (invoke "v128.load8x8_u-in-block") (v128.const i16x8 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008)) +(assert_return (invoke "v128.load16x4_s-in-block") (v128.const i32x4 0x00000302 0x00000504 0x00000706 0x00000908)) +(assert_return (invoke "v128.load16x4_u-in-block") (v128.const i32x4 0x00000403 0x00000605 0x00000807 0x00000A09)) +(assert_return (invoke "v128.load32x2_s-in-block") (v128.const i64x2 0x0000000007060504 0x000000000B0A0908)) +(assert_return (invoke "v128.load32x2_u-in-block") (v128.const i64x2 0x0000000008070605 0x000000000C0B0A09)) +(assert_return (invoke "v128.load8x8_s-as-br-value") (v128.const i16x8 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D)) +(assert_return (invoke "v128.load8x8_u-as-br-value") (v128.const i16x8 0x0007 0x0008 0x0009 0x000A 0x000B 0x000C 0x000D 0x000E)) +(assert_return (invoke "v128.load16x4_s-as-br-value") (v128.const i32x4 0x00000908 0x00000B0A 0x00000D0C 0x00000F0E)) +(assert_return (invoke "v128.load16x4_u-as-br-value") (v128.const i32x4 0x00000A09 0x00000C0B 0x00000E0D 0x0000800F)) +(assert_return (invoke "v128.load32x2_s-as-br-value") (v128.const i64x2 0x000000000D0C0B0A 0xFFFFFFFF81800F0E)) +(assert_return (invoke "v128.load32x2_u-as-br-value") (v128.const i64x2 0x000000000E0D0C0B 0x000000008281800F)) +(assert_return (invoke "v128.load8x8_s-extract_lane_s-operand") (i32.const 12)) +(assert_return (invoke "v128.load8x8_u-extract_lane_s-operand") (i32.const 13)) +(assert_return (invoke "v128.load16x4_s-extract_lane_s-operand") (i32.const 14)) +(assert_return (invoke "v128.load16x4_u-extract_lane_s-operand") (i32.const 15)) +(assert_return (invoke "v128.load32x2_s-extract_lane_s-operand") (i32.const -128)) +(assert_return (invoke "v128.load32x2_u-extract_lane_s-operand") (i32.const -127)) diff --git a/test/core/simd/simd_load_splat.wast b/test/core/simd/simd_load_splat.wast index 837dafcb08..d9642f8bd6 100644 --- a/test/core/simd/simd_load_splat.wast +++ b/test/core/simd/simd_load_splat.wast @@ -5,61 +5,61 @@ (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") (data (i32.const 65520) "\10\11\12\13\14\15\16\17\18\19\1A\1B\1C\1D\1E\1F") - (func (export "v8x16.load_splat") (param $address i32) (result v128) (v8x16.load_splat (local.get $address))) - (func (export "v16x8.load_splat") (param $address i32) (result v128) (v16x8.load_splat (local.get $address))) - (func (export "v32x4.load_splat") (param $address i32) (result v128) (v32x4.load_splat (local.get $address))) - (func (export "v64x2.load_splat") (param $address i32) (result v128) (v64x2.load_splat (local.get $address))) + (func (export "v128.load8_splat") (param $address i32) (result v128) (v128.load8_splat (local.get $address))) + (func (export "v128.load16_splat") (param $address i32) (result v128) (v128.load16_splat (local.get $address))) + (func (export "v128.load32_splat") (param $address i32) (result v128) (v128.load32_splat (local.get $address))) + (func (export "v128.load64_splat") (param $address i32) (result v128) (v128.load64_splat (local.get $address))) ;; Load data with different offset/align arguments - (func (export "v8x16.offset0") (param $address i32) (result v128) (v8x16.load_splat offset=0 (local.get $address))) - (func (export "v8x16.align1") (param $address i32) (result v128) (v8x16.load_splat align=1 (local.get $address))) - (func (export "v8x16.offset1_align1") (param $address i32) (result v128) (v8x16.load_splat offset=1 align=1 (local.get $address))) - (func (export "v8x16.offset2_align1") (param $address i32) (result v128) (v8x16.load_splat offset=2 align=1 (local.get $address))) - (func (export "v8x16.offset15_align1") (param $address i32) (result v128) (v8x16.load_splat offset=15 align=1 (local.get $address))) + (func (export "v8x16.offset0") (param $address i32) (result v128) (v128.load8_splat offset=0 (local.get $address))) + (func (export "v8x16.align1") (param $address i32) (result v128) (v128.load8_splat align=1 (local.get $address))) + (func (export "v8x16.offset1_align1") (param $address i32) (result v128) (v128.load8_splat offset=1 align=1 (local.get $address))) + (func (export "v8x16.offset2_align1") (param $address i32) (result v128) (v128.load8_splat offset=2 align=1 (local.get $address))) + (func (export "v8x16.offset15_align1") (param $address i32) (result v128) (v128.load8_splat offset=15 align=1 (local.get $address))) - (func (export "v16x8.offset0") (param $address i32) (result v128) (v16x8.load_splat offset=0 (local.get $address))) - (func (export "v16x8.align1") (param $address i32) (result v128) (v16x8.load_splat align=1 (local.get $address))) - (func (export "v16x8.offset1_align1") (param $address i32) (result v128) (v16x8.load_splat offset=1 align=1 (local.get $address))) - (func (export "v16x8.offset2_align1") (param $address i32) (result v128) (v16x8.load_splat offset=2 align=1 (local.get $address))) - (func (export "v16x8.offset15_align2") (param $address i32) (result v128) (v16x8.load_splat offset=15 align=2 (local.get $address))) + (func (export "v16x8.offset0") (param $address i32) (result v128) (v128.load16_splat offset=0 (local.get $address))) + (func (export "v16x8.align1") (param $address i32) (result v128) (v128.load16_splat align=1 (local.get $address))) + (func (export "v16x8.offset1_align1") (param $address i32) (result v128) (v128.load16_splat offset=1 align=1 (local.get $address))) + (func (export "v16x8.offset2_align1") (param $address i32) (result v128) (v128.load16_splat offset=2 align=1 (local.get $address))) + (func (export "v16x8.offset15_align2") (param $address i32) (result v128) (v128.load16_splat offset=15 align=2 (local.get $address))) - (func (export "v32x4.offset0") (param $address i32) (result v128) (v32x4.load_splat offset=0 (local.get $address))) - (func (export "v32x4.align1") (param $address i32) (result v128) (v32x4.load_splat align=1 (local.get $address))) - (func (export "v32x4.offset1_align1") (param $address i32) (result v128) (v32x4.load_splat offset=1 align=1 (local.get $address))) - (func (export "v32x4.offset2_align2") (param $address i32) (result v128) (v32x4.load_splat offset=2 align=2 (local.get $address))) - (func (export "v32x4.offset15_align4") (param $address i32) (result v128) (v32x4.load_splat offset=15 align=4 (local.get $address))) + (func (export "v32x4.offset0") (param $address i32) (result v128) (v128.load32_splat offset=0 (local.get $address))) + (func (export "v32x4.align1") (param $address i32) (result v128) (v128.load32_splat align=1 (local.get $address))) + (func (export "v32x4.offset1_align1") (param $address i32) (result v128) (v128.load32_splat offset=1 align=1 (local.get $address))) + (func (export "v32x4.offset2_align2") (param $address i32) (result v128) (v128.load32_splat offset=2 align=2 (local.get $address))) + (func (export "v32x4.offset15_align4") (param $address i32) (result v128) (v128.load32_splat offset=15 align=4 (local.get $address))) - (func (export "v64x2.offset0") (param $address i32) (result v128) (v64x2.load_splat offset=0 (local.get $address))) - (func (export "v64x2.align1") (param $address i32) (result v128) (v64x2.load_splat align=1 (local.get $address))) - (func (export "v64x2.offset1_align2") (param $address i32) (result v128) (v64x2.load_splat offset=1 align=2 (local.get $address))) - (func (export "v64x2.offset2_align4") (param $address i32) (result v128) (v64x2.load_splat offset=2 align=4 (local.get $address))) - (func (export "v64x2.offset15_align8") (param $address i32) (result v128) (v64x2.load_splat offset=15 align=8 (local.get $address))) + (func (export "v64x2.offset0") (param $address i32) (result v128) (v128.load64_splat offset=0 (local.get $address))) + (func (export "v64x2.align1") (param $address i32) (result v128) (v128.load64_splat align=1 (local.get $address))) + (func (export "v64x2.offset1_align2") (param $address i32) (result v128) (v128.load64_splat offset=1 align=2 (local.get $address))) + (func (export "v64x2.offset2_align4") (param $address i32) (result v128) (v128.load64_splat offset=2 align=4 (local.get $address))) + (func (export "v64x2.offset15_align8") (param $address i32) (result v128) (v128.load64_splat offset=15 align=8 (local.get $address))) - (func (export "v8x16.offset65536") (param $address i32) (result v128) (v8x16.load_splat offset=65536 (local.get $address))) - (func (export "v16x8.offset65535") (param $address i32) (result v128) (v16x8.load_splat offset=65535 (local.get $address))) - (func (export "v32x4.offset65533") (param $address i32) (result v128) (v32x4.load_splat offset=65533 (local.get $address))) - (func (export "v64x2.offset65529") (param $address i32) (result v128) (v64x2.load_splat offset=65529 (local.get $address))) + (func (export "v8x16.offset65536") (param $address i32) (result v128) (v128.load8_splat offset=65536 (local.get $address))) + (func (export "v16x8.offset65535") (param $address i32) (result v128) (v128.load16_splat offset=65535 (local.get $address))) + (func (export "v32x4.offset65533") (param $address i32) (result v128) (v128.load32_splat offset=65533 (local.get $address))) + (func (export "v64x2.offset65529") (param $address i32) (result v128) (v128.load64_splat offset=65529 (local.get $address))) ) -(assert_return (invoke "v8x16.load_splat" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "v8x16.load_splat" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "v8x16.load_splat" (i32.const 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) -(assert_return (invoke "v8x16.load_splat" (i32.const 3)) (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) -(assert_return (invoke "v8x16.load_splat" (i32.const 65535)) (v128.const i8x16 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31)) -(assert_return (invoke "v16x8.load_splat" (i32.const 4)) (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) -(assert_return (invoke "v16x8.load_splat" (i32.const 5)) (v128.const i16x8 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605)) -(assert_return (invoke "v16x8.load_splat" (i32.const 6)) (v128.const i16x8 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706)) -(assert_return (invoke "v16x8.load_splat" (i32.const 7)) (v128.const i16x8 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807)) -(assert_return (invoke "v16x8.load_splat" (i32.const 65534)) (v128.const i16x8 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E)) -(assert_return (invoke "v32x4.load_splat" (i32.const 8)) (v128.const i32x4 0x0B0A0908 0x0B0A0908 0x0B0A0908 0x0B0A0908)) -(assert_return (invoke "v32x4.load_splat" (i32.const 9)) (v128.const i32x4 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09)) -(assert_return (invoke "v32x4.load_splat" (i32.const 10)) (v128.const i32x4 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A)) -(assert_return (invoke "v32x4.load_splat" (i32.const 11)) (v128.const i32x4 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B)) -(assert_return (invoke "v32x4.load_splat" (i32.const 65532)) (v128.const i32x4 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C)) -(assert_return (invoke "v64x2.load_splat" (i32.const 12)) (v128.const i64x2 0x000000000F0E0D0C 0x000000000F0E0D0C)) -(assert_return (invoke "v64x2.load_splat" (i32.const 13)) (v128.const i64x2 0x00000000000F0E0D 0x00000000000F0E0D)) -(assert_return (invoke "v64x2.load_splat" (i32.const 14)) (v128.const i64x2 0x0000000000000F0E 0x0000000000000F0E)) -(assert_return (invoke "v64x2.load_splat" (i32.const 15)) (v128.const i64x2 0x000000000000000F 0x000000000000000F)) -(assert_return (invoke "v64x2.load_splat" (i32.const 65528)) (v128.const i64x2 0x1F1E1D1C1B1A1918 0x1F1E1D1C1B1A1918)) +(assert_return (invoke "v128.load8_splat" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_splat" (i32.const 1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "v128.load8_splat" (i32.const 2)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "v128.load8_splat" (i32.const 3)) (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "v128.load8_splat" (i32.const 65535)) (v128.const i8x16 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31)) +(assert_return (invoke "v128.load16_splat" (i32.const 4)) (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) +(assert_return (invoke "v128.load16_splat" (i32.const 5)) (v128.const i16x8 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605 0x0605)) +(assert_return (invoke "v128.load16_splat" (i32.const 6)) (v128.const i16x8 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706 0x0706)) +(assert_return (invoke "v128.load16_splat" (i32.const 7)) (v128.const i16x8 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807 0x0807)) +(assert_return (invoke "v128.load16_splat" (i32.const 65534)) (v128.const i16x8 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E 0x1F1E)) +(assert_return (invoke "v128.load32_splat" (i32.const 8)) (v128.const i32x4 0x0B0A0908 0x0B0A0908 0x0B0A0908 0x0B0A0908)) +(assert_return (invoke "v128.load32_splat" (i32.const 9)) (v128.const i32x4 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09 0x0C0B0A09)) +(assert_return (invoke "v128.load32_splat" (i32.const 10)) (v128.const i32x4 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A 0x0D0C0B0A)) +(assert_return (invoke "v128.load32_splat" (i32.const 11)) (v128.const i32x4 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B 0x0E0D0C0B)) +(assert_return (invoke "v128.load32_splat" (i32.const 65532)) (v128.const i32x4 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C 0x1F1E1D1C)) +(assert_return (invoke "v128.load64_splat" (i32.const 12)) (v128.const i64x2 0x000000000F0E0D0C 0x000000000F0E0D0C)) +(assert_return (invoke "v128.load64_splat" (i32.const 13)) (v128.const i64x2 0x00000000000F0E0D 0x00000000000F0E0D)) +(assert_return (invoke "v128.load64_splat" (i32.const 14)) (v128.const i64x2 0x0000000000000F0E 0x0000000000000F0E)) +(assert_return (invoke "v128.load64_splat" (i32.const 15)) (v128.const i64x2 0x000000000000000F 0x000000000000000F)) +(assert_return (invoke "v128.load64_splat" (i32.const 65528)) (v128.const i64x2 0x1F1E1D1C1B1A1918 0x1F1E1D1C1B1A1918)) ;; v8x16 (assert_return (invoke "v8x16.offset0" (i32.const 0)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) @@ -116,14 +116,14 @@ ;; Out of bounds memory access -(assert_trap (invoke "v8x16.load_splat" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "v16x8.load_splat" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "v32x4.load_splat" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "v64x2.load_splat" (i32.const -1)) "out of bounds memory access") -(assert_trap (invoke "v8x16.load_splat" (i32.const 65536)) "out of bounds memory access") -(assert_trap (invoke "v16x8.load_splat" (i32.const 65535)) "out of bounds memory access") -(assert_trap (invoke "v32x4.load_splat" (i32.const 65533)) "out of bounds memory access") -(assert_trap (invoke "v64x2.load_splat" (i32.const 65529)) "out of bounds memory access") +(assert_trap (invoke "v128.load8_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load16_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load32_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load64_splat" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load8_splat" (i32.const 65536)) "out of bounds memory access") +(assert_trap (invoke "v128.load16_splat" (i32.const 65535)) "out of bounds memory access") +(assert_trap (invoke "v128.load32_splat" (i32.const 65533)) "out of bounds memory access") +(assert_trap (invoke "v128.load64_splat" (i32.const 65529)) "out of bounds memory access") (assert_trap (invoke "v8x16.offset1_align1" (i32.const 65535)) "out of bounds memory access") (assert_trap (invoke "v8x16.offset2_align1" (i32.const 65535)) "out of bounds memory access") @@ -158,63 +158,63 @@ (module (memory 1) (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A") - (func (export "v8x16.load_splat-in-block") (result v128) - (block (result v128) (block (result v128) (v8x16.load_splat (i32.const 0)))) + (func (export "v128.load8_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load8_splat (i32.const 0)))) ) - (func (export "v16x8.load_splat-in-block") (result v128) - (block (result v128) (block (result v128) (v16x8.load_splat (i32.const 1)))) + (func (export "v128.load16_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load16_splat (i32.const 1)))) ) - (func (export "v32x4.load_splat-in-block") (result v128) - (block (result v128) (block (result v128) (v32x4.load_splat (i32.const 2)))) + (func (export "v128.load32_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load32_splat (i32.const 2)))) ) - (func (export "v64x2.load_splat-in-block") (result v128) - (block (result v128) (block (result v128) (v64x2.load_splat (i32.const 9)))) + (func (export "v128.load64_splat-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load64_splat (i32.const 9)))) ) - (func (export "v8x16.load_splat-as-br-value") (result v128) - (block (result v128) (br 0 (v8x16.load_splat (i32.const 3)))) + (func (export "v128.load8_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load8_splat (i32.const 3)))) ) - (func (export "v16x8.load_splat-as-br-value") (result v128) - (block (result v128) (br 0 (v16x8.load_splat (i32.const 4)))) + (func (export "v128.load16_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load16_splat (i32.const 4)))) ) - (func (export "v32x4.load_splat-as-br-value") (result v128) - (block (result v128) (br 0 (v32x4.load_splat (i32.const 5)))) + (func (export "v128.load32_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load32_splat (i32.const 5)))) ) - (func (export "v64x2.load_splat-as-br-value") (result v128) - (block (result v128) (br 0 (v64x2.load_splat (i32.const 10)))) + (func (export "v128.load64_splat-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load64_splat (i32.const 10)))) ) - (func (export "v8x16.load_splat-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (v8x16.load_splat (i32.const 6))) + (func (export "v128.load8_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load8_splat (i32.const 6))) ) - (func (export "v16x8.load_splat-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (v16x8.load_splat (i32.const 7))) + (func (export "v128.load16_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load16_splat (i32.const 7))) ) - (func (export "v32x4.load_splat-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (v32x4.load_splat (i32.const 8))) + (func (export "v128.load32_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load32_splat (i32.const 8))) ) - (func (export "v64x2.load_splat-extract_lane_s-operand") (result i32) - (i8x16.extract_lane_s 0 (v64x2.load_splat (i32.const 11))) + (func (export "v128.load64_splat-extract_lane_s-operand") (result i32) + (i8x16.extract_lane_s 0 (v128.load64_splat (i32.const 11))) ) ) -(assert_return (invoke "v8x16.load_splat-in-block") (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "v16x8.load_splat-in-block") (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) -(assert_return (invoke "v32x4.load_splat-in-block") (v128.const i32x4 0x05040302 0x05040302 0x05040302 0x05040302)) -(assert_return (invoke "v64x2.load_splat-in-block") (v128.const i64x2 0x0000000000000A09 0x0000000000000A09)) -(assert_return (invoke "v8x16.load_splat-as-br-value") (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) -(assert_return (invoke "v16x8.load_splat-as-br-value") (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) -(assert_return (invoke "v32x4.load_splat-as-br-value") (v128.const i32x4 0x08070605 0x08070605 0x08070605 0x08070605)) -(assert_return (invoke "v64x2.load_splat-as-br-value") (v128.const i64x2 0x000000000000000A 0x000000000000000A)) -(assert_return (invoke "v8x16.load_splat-extract_lane_s-operand") (i32.const 6)) -(assert_return (invoke "v16x8.load_splat-extract_lane_s-operand") (i32.const 7)) -(assert_return (invoke "v32x4.load_splat-extract_lane_s-operand") (i32.const 8)) -(assert_return (invoke "v64x2.load_splat-extract_lane_s-operand") (i32.const 0)) +(assert_return (invoke "v128.load8_splat-in-block") (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_splat-in-block") (v128.const i16x8 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201 0x0201)) +(assert_return (invoke "v128.load32_splat-in-block") (v128.const i32x4 0x05040302 0x05040302 0x05040302 0x05040302)) +(assert_return (invoke "v128.load64_splat-in-block") (v128.const i64x2 0x0000000000000A09 0x0000000000000A09)) +(assert_return (invoke "v128.load8_splat-as-br-value") (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "v128.load16_splat-as-br-value") (v128.const i16x8 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504 0x0504)) +(assert_return (invoke "v128.load32_splat-as-br-value") (v128.const i32x4 0x08070605 0x08070605 0x08070605 0x08070605)) +(assert_return (invoke "v128.load64_splat-as-br-value") (v128.const i64x2 0x000000000000000A 0x000000000000000A)) +(assert_return (invoke "v128.load8_splat-extract_lane_s-operand") (i32.const 6)) +(assert_return (invoke "v128.load16_splat-extract_lane_s-operand") (i32.const 7)) +(assert_return (invoke "v128.load32_splat-extract_lane_s-operand") (i32.const 8)) +(assert_return (invoke "v128.load64_splat-extract_lane_s-operand") (i32.const 0)) ;; Type check -(assert_invalid (module (memory 0) (func (result v128) (v8x16.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (v16x8.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (v32x4.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") -(assert_invalid (module (memory 0) (func (result v128) (v64x2.load_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load8_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load16_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load32_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load64_splat (v128.const i32x4 0 0 0 0)))) "type mismatch") ;; Unknown operator @@ -229,32 +229,32 @@ (assert_invalid (module (memory 0) - (func $v8x16.load_splat-arg-empty (result v128) - (v8x16.load_splat) + (func $v128.load8_splat-arg-empty (result v128) + (v128.load8_splat) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $v16x8.load_splat-arg-empty (result v128) - (v16x8.load_splat) + (func $v128.load16_splat-arg-empty (result v128) + (v128.load16_splat) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $v32x4.load_splat-arg-empty (result v128) - (v32x4.load_splat) + (func $v128.load32_splat-arg-empty (result v128) + (v128.load32_splat) ) ) "type mismatch" ) (assert_invalid (module (memory 0) - (func $v64x2.load_splat-arg-empty (result v128) - (v64x2.load_splat) + (func $v128.load64_splat-arg-empty (result v128) + (v128.load64_splat) ) ) "type mismatch" From 163e122445b1750f3b7a82aa15a7de5bfe7ee48c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 8 Sep 2020 13:13:23 -0700 Subject: [PATCH 232/378] Specify text format for SIMD (#336) * Specify text format for SIMD * Reword description of SIMD memory instructions Co-authored-by: Ben Smith --- document/core/exec/numerics.rst | 1 + document/core/syntax/instructions.rst | 2 + document/core/text/conventions.rst | 3 +- document/core/text/instructions.rst | 298 ++++++++++++++++++++++++++ document/core/util/macros.def | 2 + 5 files changed, 305 insertions(+), 1 deletion(-) diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index 04783a4424..b69ce66c1d 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -126,6 +126,7 @@ When a number is stored into :ref:`memory `, it is converted into a .. math:: \begin{array}{lll@{\qquad}l} + \bytes_t(i^\ast) &=& (\bytes_t(i))^\ast \\[1ex] \bytes_t(i) &=& \littleendian(\bits_t(i)) \\[1ex] \littleendian(\epsilon) &=& \epsilon \\ \littleendian(d^8~{d'}^\ast~) &=& \littleendian({d'}^\ast)~\ibits_8^{-1}(d^8) \\ diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 4594a7b869..c1e459bde9 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -308,6 +308,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{max} \\ \end{array} +.. _syntax-simd-shape: + SIMD instructions have a naming convention involving a prefix that determines how their operands will be interpreted. This prefix describes the *shape* of the operand, diff --git a/document/core/text/conventions.rst b/document/core/text/conventions.rst index c73e9c000a..d5b126cc0e 100644 --- a/document/core/text/conventions.rst +++ b/document/core/text/conventions.rst @@ -67,7 +67,8 @@ In order to distinguish symbols of the textual syntax from symbols of the abstra \text{i32} &\Rightarrow& \I32 \\ &&|& \text{i64} &\Rightarrow& \I64 \\ &&|& \text{f32} &\Rightarrow& \F32 \\ &&|& - \text{f64} &\Rightarrow& \F64 \\ + \text{f64} &\Rightarrow& \F64 \\ &&|& + \text{v128} &\Rightarrow& \V128 \\ \end{array} The :ref:`textual grammar ` for :ref:`limits ` is defined as follows: diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index a3add4ae07..d9be02f0c9 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -447,6 +447,304 @@ Numeric Instructions \end{array} +.. index:: simd instruction + pair: text format; instruction +.. _text-instr-simd: + +SIMD Instructions +~~~~~~~~~~~~~~~~~~~~ + +SIMD memory instructions have optional offset and alignment immediates, like the :ref:`memory instructions `. + +.. math:: + \begin{array}{llclll} + \production{instruction} & \Tplaininstr_I &::=& \dots \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\ &&|& + \text{v128.load}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\LOAD~m \\ &&|& + \text{i16x8.load8x8\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I16X8.\LOAD\K{8x8\_s}~m \\ &&|& + \text{i16x8.load8x8\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I16X8.\LOAD\K{8x8\_u}~m \\ &&|& + \text{i32x4.load16x4\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I32X4.\LOAD\K{16x4\_s}~m \\ &&|& + \text{i32x4.load16x4\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I32X4.\LOAD\K{16x4\_u}~m \\ &&|& + \text{i64x2.load32x2\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{32x2\_s}~m \\ &&|& + \text{i64x2.load32x2\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{32x2\_u}~m \\ &&|& + \text{i8x16.load\_splat}~~m{:}\Tmemarg_1 &\Rightarrow& \I8X16.\LOAD\K{\_splat}~m \\ &&|& + \text{i16x8.load\_splat}~~m{:}\Tmemarg_2 &\Rightarrow& \I16X8.\LOAD\K{\_splat}~m \\ &&|& + \text{i32x4.load\_splat}~~m{:}\Tmemarg_4 &\Rightarrow& \I32X4.\LOAD\K{\_splat}~m \\ &&|& + \text{i64x2.load\_splat}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{\_splat}~m \\ &&|& + \text{v128.store}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\STORE~m \\ + \end{array} + +SIMD const instructions have a mandatory :ref:`shape ` descriptor, which determines how the following values are parsed. + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{v128.const}~~\text{i8x16}~~(n{:}\Ti8)^{16} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i8}(n^{16})) \\ &&|& + \text{v128.const}~~\text{i16x8}~~(n{:}\Ti16)^{8} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i16}(n^8)) \\ &&|& + \text{v128.const}~~\text{i32x4}~~(n{:}\Ti32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i32}(n^4)) \\ &&|& + \text{v128.const}~~\text{i64x2}~~(n{:}\Ti64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i64}(n^2)) \\ &&|& + \text{v128.const}~~\text{f32x4}~~(z{:}\Tf32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f32}(z^4)) \\ &&|& + \text{v128.const}~~\text{f64x2}~~(z{:}\Tf64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f64}(z^2)) \\ &&|& + \text{i8x16.shuffle}~~(laneidx{:}\Tu8)^{16} &\Rightarrow& \I8X16.\SHUFFLE~laneidx^{16} \\ &&|& + \text{i8x16.swizzle} &\Rightarrow& \I8X16.\SWIZZLE\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i8x16.splat} &\Rightarrow& \I8X16.\SPLAT\\ &&|& + \text{i16x8.splat} &\Rightarrow& \I16X8.\SPLAT\\ &&|& + \text{i32x4.splat} &\Rightarrow& \I32X4.\SPLAT\\ &&|& + \text{i64x2.splat} &\Rightarrow& \I64X2.\SPLAT\\ &&|& + \text{f32x4.splat} &\Rightarrow& \F32X4.\SPLAT\\ &&|& + \text{f64x2.splat} &\Rightarrow& \F64X2.\SPLAT\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i8x16.extract\_lane\_s}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_s}~laneidx \\ &&|& + \text{i8x16.extract\_lane\_u}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_u}~laneidx \\ &&|& + \text{i8x16.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\REPLACELANE~laneidx \\ &&|& + \text{i16x8.extract\_lane\_s}~~laneidx{:}\Tu8 &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_s}~laneidx \\ &&|& + \text{i16x8.extract\_lane\_u}~~laneidx{:}\Tu8 &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_u}~laneidx \\ &&|& + \text{i16x8.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I16X8.\REPLACELANE~laneidx \\ &&|& + \text{i32x4.extract\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I32X4.\EXTRACTLANE~laneidx \\ &&|& + \text{i32x4.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I32X4.\REPLACELANE~laneidx \\ &&|& + \text{i64x2.extract\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I64X2.\EXTRACTLANE~laneidx \\ &&|& + \text{i64x2.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I64X2.\REPLACELANE~laneidx \\ &&|& + \text{f32x4.extract\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \F32X4.\EXTRACTLANE~laneidx \\ &&|& + \text{f32x4.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \F32X4.\REPLACELANE~laneidx \\ &&|& + \text{f64x2.extract\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \F64X2.\EXTRACTLANE~laneidx \\ &&|& + \text{f64x2.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \F64X2.\REPLACELANE~laneidx \\ + \end{array} + +.. _text-virelop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i8x16.eq} &\Rightarrow& \I8X16.\VEQ\\ &&|& + \text{i8x16.ne} &\Rightarrow& \I8X16.\VNE\\ &&|& + \text{i8x16.lt\_s} &\Rightarrow& \I8X16.\VLT\K{\_s}\\ &&|& + \text{i8x16.lt\_u} &\Rightarrow& \I8X16.\VLT\K{\_u}\\ &&|& + \text{i8x16.gt\_s} &\Rightarrow& \I8X16.\VGT\K{\_s}\\ &&|& + \text{i8x16.gt\_u} &\Rightarrow& \I8X16.\VGT\K{\_u}\\ &&|& + \text{i8x16.le\_s} &\Rightarrow& \I8X16.\VLE\K{\_s}\\ &&|& + \text{i8x16.le\_u} &\Rightarrow& \I8X16.\VLE\K{\_u}\\ &&|& + \text{i8x16.ge\_s} &\Rightarrow& \I8X16.\VGE\K{\_s}\\ &&|& + \text{i8x16.ge\_u} &\Rightarrow& \I8X16.\VGE\K{\_u}\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i16x8.eq} &\Rightarrow& \I16X8.\VEQ\\ &&|& + \text{i16x8.ne} &\Rightarrow& \I16X8.\VNE\\ &&|& + \text{i16x8.lt\_s} &\Rightarrow& \I16X8.\VLT\K{\_s}\\ &&|& + \text{i16x8.lt\_u} &\Rightarrow& \I16X8.\VLT\K{\_u}\\ &&|& + \text{i16x8.gt\_s} &\Rightarrow& \I16X8.\VGT\K{\_s}\\ &&|& + \text{i16x8.gt\_u} &\Rightarrow& \I16X8.\VGT\K{\_u}\\ &&|& + \text{i16x8.le\_s} &\Rightarrow& \I16X8.\VLE\K{\_s}\\ &&|& + \text{i16x8.le\_u} &\Rightarrow& \I16X8.\VLE\K{\_u}\\ &&|& + \text{i16x8.ge\_s} &\Rightarrow& \I16X8.\VGE\K{\_s}\\ &&|& + \text{i16x8.ge\_u} &\Rightarrow& \I16X8.\VGE\K{\_u}\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i32x4.eq} &\Rightarrow& \I32X4.\VEQ\\ &&|& + \text{i32x4.ne} &\Rightarrow& \I32X4.\VNE\\ &&|& + \text{i32x4.lt\_s} &\Rightarrow& \I32X4.\VLT\K{\_s}\\ &&|& + \text{i32x4.lt\_u} &\Rightarrow& \I32X4.\VLT\K{\_u}\\ &&|& + \text{i32x4.gt\_s} &\Rightarrow& \I32X4.\VGT\K{\_s}\\ &&|& + \text{i32x4.gt\_u} &\Rightarrow& \I32X4.\VGT\K{\_u}\\ &&|& + \text{i32x4.le\_s} &\Rightarrow& \I32X4.\VLE\K{\_s}\\ &&|& + \text{i32x4.le\_u} &\Rightarrow& \I32X4.\VLE\K{\_u}\\ &&|& + \text{i32x4.ge\_s} &\Rightarrow& \I32X4.\VGE\K{\_s}\\ &&|& + \text{i32x4.ge\_u} &\Rightarrow& \I32X4.\VGE\K{\_u}\\ + \end{array} + +.. _text-vfrelop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{f32x4.eq} &\Rightarrow& \F32X4.\VEQ\\ &&|& + \text{f32x4.ne} &\Rightarrow& \F32X4.\VNE\\ &&|& + \text{f32x4.lt} &\Rightarrow& \F32X4.\VLT\\ &&|& + \text{f32x4.gt} &\Rightarrow& \F32X4.\VGT\\ &&|& + \text{f32x4.le} &\Rightarrow& \F32X4.\VLE\\ &&|& + \text{f32x4.ge} &\Rightarrow& \F32X4.\VGE\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{f64x2.eq} &\Rightarrow& \F64X2.\VEQ\\ &&|& + \text{f64x2.ne} &\Rightarrow& \F64X2.\VNE\\ &&|& + \text{f64x2.lt} &\Rightarrow& \F64X2.\VLT\\ &&|& + \text{f64x2.gt} &\Rightarrow& \F64X2.\VGT\\ &&|& + \text{f64x2.le} &\Rightarrow& \F64X2.\VLE\\ &&|& + \text{f64x2.ge} &\Rightarrow& \F64X2.\VGE\\ + \end{array} + +.. _text-vsunop: +.. _text-vsbinop: +.. _text-vsternop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{v128.not} &\Rightarrow& \V128.\VNOT\\ &&|& + \text{v128.and} &\Rightarrow& \V128.\VAND\\ &&|& + \text{v128.andnot} &\Rightarrow& \V128.\VANDNOT\\ &&|& + \text{v128.or} &\Rightarrow& \V128.\VOR\\ &&|& + \text{v128.xor} &\Rightarrow& \V128.\VXOR\\ &&|& + \text{v128.bitselect} &\Rightarrow& \V128.\BITSELECT + \end{array} + +.. _text-vtestop: +.. _text-vshiftop: +.. _text-viunop: +.. _text-vibinop: +.. _text-viminmaxop: +.. _text-vsatbinop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i8x16.abs} &\Rightarrow& \I8X16.\VABS\\ &&|& + \text{i8x16.neg} &\Rightarrow& \I8X16.\VNEG\\ &&|& + \text{i8x16.any\_true} &\Rightarrow& \I8X16.\ANYTRUE\\ &&|& + \text{i8x16.all\_true} &\Rightarrow& \I8X16.\ALLTRUE\\ &&|& + \text{i8x16.bitmask} &\Rightarrow& \I8X16.\BITMASK\\ &&|& + \text{i8x16.narrow\_i16x8\_s} &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_s}\\ &&|& + \text{i8x16.narrow\_i16x8\_u} &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_u}\\ &&|& + \text{i8x16.shl} &\Rightarrow& \I8X16.\VSHL\\ &&|& + \text{i8x16.shr\_s} &\Rightarrow& \I8X16.\VSHR\K{\_s}\\ &&|& + \text{i8x16.shr\_u} &\Rightarrow& \I8X16.\VSHR\K{\_u}\\ &&|& + \text{i8x16.add} &\Rightarrow& \I8X16.\VADD\\ &&|& + \text{i8x16.add\_sat\_s} &\Rightarrow& \I8X16.\VADD\K{\_sat\_s}\\ &&|& + \text{i8x16.add\_sat\_u} &\Rightarrow& \I8X16.\VADD\K{\_sat\_u}\\ &&|& + \text{i8x16.sub} &\Rightarrow& \I8X16.\VSUB\\ &&|& + \text{i8x16.sub\_sat\_s} &\Rightarrow& \I8X16.\VSUB\K{\_sat\_s}\\ &&|& + \text{i8x16.sub\_sat\_u} &\Rightarrow& \I8X16.\VSUB\K{\_sat\_u}\\ &&|& + \text{i8x16.min\_s} &\Rightarrow& \I8X16.\VMIN\K{\_s}\\ &&|& + \text{i8x16.min\_u} &\Rightarrow& \I8X16.\VMIN\K{\_u}\\ &&|& + \text{i8x16.max\_s} &\Rightarrow& \I8X16.\VMAX\K{\_s}\\ &&|& + \text{i8x16.max\_u} &\Rightarrow& \I8X16.\VMAX\K{\_u}\\ &&|& + \text{i8x16.avgr\_u} &\Rightarrow& \I8X16.\AVGR\K{\_u}\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i16x8.abs} &\Rightarrow& \I16X8.\VABS\\ &&|& + \text{i16x8.neg} &\Rightarrow& \I16X8.\VNEG\\ &&|& + \text{i16x8.any\_true} &\Rightarrow& \I16X8.\ANYTRUE\\ &&|& + \text{i16x8.all\_true} &\Rightarrow& \I16X8.\ALLTRUE\\ &&|& + \text{i16x8.bitmask} &\Rightarrow& \I16X8.\BITMASK\\ &&|& + \text{i16x8.narrow\_i32x4\_s} &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s}\\ &&|& + \text{i16x8.narrow\_i32x4\_u} &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_u}\\ &&|& + \text{i16x8.widen\_low\_i8x16\_s} &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_s}\\ &&|& + \text{i16x8.widen\_high\_i8x16\_s} &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_s}\\ &&|& + \text{i16x8.widen\_low\_i8x16\_u} &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_u}\\ &&|& + \text{i16x8.widen\_high\_i8x16\_u} &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_u}\\ &&|& + \text{i16x8.shl} &\Rightarrow& \I16X8.\VSHL\\ &&|& + \text{i16x8.shr\_s} &\Rightarrow& \I16X8.\VSHR\K{\_s}\\ &&|& + \text{i16x8.shr\_u} &\Rightarrow& \I16X8.\VSHR\K{\_u}\\ &&|& + \text{i16x8.add} &\Rightarrow& \I16X8.\VADD\\ &&|& + \text{i16x8.add\_sat\_s} &\Rightarrow& \I16X8.\VADD\K{\_sat\_s}\\ &&|& + \text{i16x8.add\_sat\_u} &\Rightarrow& \I16X8.\VADD\K{\_sat\_u}\\ &&|& + \text{i16x8.sub} &\Rightarrow& \I16X8.\VSUB\\ &&|& + \text{i16x8.sub\_sat\_s} &\Rightarrow& \I16X8.\VSUB\K{\_sat\_s}\\ &&|& + \text{i16x8.sub\_sat\_u} &\Rightarrow& \I16X8.\VSUB\K{\_sat\_u}\\ &&|& + \text{i16x8.mul} &\Rightarrow& \I16X8.\VMUL\\ &&|& + \text{i16x8.min\_s} &\Rightarrow& \I16X8.\VMIN\K{\_s}\\ &&|& + \text{i16x8.min\_u} &\Rightarrow& \I16X8.\VMIN\K{\_u}\\ &&|& + \text{i16x8.max\_s} &\Rightarrow& \I16X8.\VMAX\K{\_s}\\ &&|& + \text{i16x8.max\_u} &\Rightarrow& \I16X8.\VMAX\K{\_u}\\ &&|& + \text{i16x8.avgr\_u} &\Rightarrow& \I16X8.\AVGR\K{\_u}\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i32x4.abs} &\Rightarrow& \I32X4.\VABS\\ &&|& + \text{i32x4.neg} &\Rightarrow& \I32X4.\VNEG\\ &&|& + \text{i32x4.any\_true} &\Rightarrow& \I32X4.\ANYTRUE\\ &&|& + \text{i32x4.all\_true} &\Rightarrow& \I32X4.\ALLTRUE\\ &&|& + \text{i32x4.bitmask} &\Rightarrow& \I32X4.\BITMASK\\ &&|& + \text{i32x4.widen\_low\_i16x8\_s} &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s}\\ &&|& + \text{i32x4.widen\_high\_i16x8\_s} &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_s}\\ &&|& + \text{i32x4.widen\_low\_i16x8\_u} &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_u}\\ &&|& + \text{i32x4.widen\_high\_i16x8\_u} &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_u}\\ &&|& + \text{i32x4.shl} &\Rightarrow& \I32X4.\VSHL\\ &&|& + \text{i32x4.shr\_s} &\Rightarrow& \I32X4.\VSHR\K{\_s}\\ &&|& + \text{i32x4.shr\_u} &\Rightarrow& \I32X4.\VSHR\K{\_u}\\ &&|& + \text{i32x4.add} &\Rightarrow& \I32X4.\VADD\\ &&|& + \text{i32x4.sub} &\Rightarrow& \I32X4.\VSUB\\ &&|& + \text{i32x4.mul} &\Rightarrow& \I32X4.\VMUL\\ &&|& + \text{i32x4.min\_s} &\Rightarrow& \I32X4.\VMIN\K{\_s}\\ &&|& + \text{i32x4.min\_u} &\Rightarrow& \I32X4.\VMIN\K{\_u}\\ &&|& + \text{i32x4.max\_s} &\Rightarrow& \I32X4.\VMAX\K{\_s}\\ &&|& + \text{i32x4.max\_u} &\Rightarrow& \I32X4.\VMAX\K{\_u}\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& + \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& + \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& + \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& + \text{i64x2.add} &\Rightarrow& \I64X2.\VADD\\ &&|& + \text{i64x2.sub} &\Rightarrow& \I64X2.\VSUB\\ &&|& + \text{i64x2.mul} &\Rightarrow& \I64X2.\VMUL\\ + \end{array} + +.. _text-vfunop: +.. _text-vfbinop: + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{f32x4.abs} &\Rightarrow& \F32X4.\VABS\\ &&|& + \text{f32x4.neg} &\Rightarrow& \F32X4.\VNEG\\ &&|& + \text{f32x4.sqrt} &\Rightarrow& \F32X4.\VSQRT\\ &&|& + \text{f32x4.add} &\Rightarrow& \F32X4.\VADD\\ &&|& + \text{f32x4.sub} &\Rightarrow& \F32X4.\VSUB\\ &&|& + \text{f32x4.mul} &\Rightarrow& \F32X4.\VMUL\\ &&|& + \text{f32x4.div} &\Rightarrow& \F32X4.\VDIV\\ &&|& + \text{f32x4.min} &\Rightarrow& \F32X4.\VMIN\\ &&|& + \text{f32x4.max} &\Rightarrow& \F32X4.\VMAX\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{f64x2.abs} &\Rightarrow& \F64X2.\VABS\\ &&|& + \text{f64x2.neg} &\Rightarrow& \F64X2.\VNEG\\ &&|& + \text{f64x2.sqrt} &\Rightarrow& \F64X2.\VSQRT\\ &&|& + \text{f64x2.add} &\Rightarrow& \F64X2.\VADD\\ &&|& + \text{f64x2.sub} &\Rightarrow& \F64X2.\VSUB\\ &&|& + \text{f64x2.mul} &\Rightarrow& \F64X2.\VMUL\\ &&|& + \text{f64x2.div} &\Rightarrow& \F64X2.\VDIV\\ &&|& + \text{f64x2.min} &\Rightarrow& \F64X2.\VMIN\\ &&|& + \text{f64x2.max} &\Rightarrow& \F64X2.\VMAX\\ + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i32x4.trunc\_sat\_f32x4\_s} &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_s}\\ &&|& + \text{i32x4.trunc\_sat\_f32x4\_u} &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u}\\ &&|& + \text{f32x4.convert\_i32x4\_s} &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s}\\ &&|& + \text{f32x4.convert\_i32x4\_u} &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u}\\ + \end{array} + + .. index:: ! folded instruction, S-expression .. _text-foldedinstr: diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 9cf38e67a3..de9071bd6d 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -652,6 +652,8 @@ .. |Ts64| mathdef:: \xref{text/values}{text-int}{\TsX{\T{64}}} .. |TiN| mathdef:: \xref{text/values}{text-int}{\TiX{N}} +.. |Ti8| mathdef:: \xref{text/values}{text-int}{\TiX{\T{8}}} +.. |Ti16| mathdef:: \xref{text/values}{text-int}{\TiX{\T{16}}} .. |Ti32| mathdef:: \xref{text/values}{text-int}{\TiX{\T{32}}} .. |Ti64| mathdef:: \xref{text/values}{text-int}{\TiX{\T{64}}} From e7c20029673067d39d4f74e25a1cfef06c3177fd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 10 Sep 2020 13:39:48 -0700 Subject: [PATCH 233/378] Shorten saturating instructions to sat (#341) Also update the test generation script, and regenerate all test files. Adressess #332 (not closing so other tools can also use it to track their rename progress). --- interpreter/binary/decode.ml | 16 +- interpreter/syntax/operators.ml | 16 +- interpreter/text/arrange.ml | 16 +- interpreter/text/lexer.mll | 16 +- proposals/simd/BinarySIMD.md | 16 +- proposals/simd/ImplementationStatus.md | 16 +- proposals/simd/NewOpcodes.md | 8 +- proposals/simd/SIMD.md | 24 +- test/core/simd/meta/simd_integer_op.py | 16 +- test/core/simd/meta/simd_sat_arith.py | 70 +- test/core/simd/simd_i16x8_sat_arith.wast | 1256 +++++++++++----------- test/core/simd/simd_i8x16_sat_arith.wast | 1176 ++++++++++---------- test/core/simd/simd_splat.wast | 24 +- 13 files changed, 1335 insertions(+), 1335 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 8eded90287..b0a66eb36f 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -315,11 +315,11 @@ let simd_prefix s = | 0x65l -> i8x16_narrow_i16x8_s | 0x66l -> i8x16_narrow_i16x8_u | 0x6el -> i8x16_add - | 0x6fl -> i8x16_add_saturate_s - | 0x70l -> i8x16_add_saturate_u + | 0x6fl -> i8x16_add_sat_s + | 0x70l -> i8x16_add_sat_u | 0x71l -> i8x16_sub - | 0x72l -> i8x16_sub_saturate_s - | 0x73l -> i8x16_sub_saturate_u + | 0x72l -> i8x16_sub_sat_s + | 0x73l -> i8x16_sub_sat_u | 0x76l -> i8x16_min_s | 0x77l -> i8x16_min_u | 0x78l -> i8x16_max_s @@ -340,11 +340,11 @@ let simd_prefix s = | 0x8cl -> i16x8_shr_s | 0x8dl -> i16x8_shr_u | 0x8el -> i16x8_add - | 0x8fl -> i16x8_add_saturate_s - | 0x90l -> i16x8_add_saturate_u + | 0x8fl -> i16x8_add_sat_s + | 0x90l -> i16x8_add_sat_u | 0x91l -> i16x8_sub - | 0x92l -> i16x8_sub_saturate_s - | 0x93l -> i16x8_sub_saturate_u + | 0x92l -> i16x8_sub_sat_s + | 0x93l -> i16x8_sub_sat_u | 0x95l -> i16x8_mul | 0x96l -> i16x8_min_s | 0x97l -> i16x8_min_u diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index eee0dcd4b4..ffe7c713c5 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -278,11 +278,11 @@ let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_shr_u = SimdShift V128Op.(I8x16 ShrU) let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) -let i8x16_add_saturate_s = Binary (V128 V128Op.(I8x16 AddSatS)) -let i8x16_add_saturate_u = Binary (V128 V128Op.(I8x16 AddSatU)) +let i8x16_add_sat_s = Binary (V128 V128Op.(I8x16 AddSatS)) +let i8x16_add_sat_u = Binary (V128 V128Op.(I8x16 AddSatU)) let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) -let i8x16_sub_saturate_s = Binary (V128 V128Op.(I8x16 SubSatS)) -let i8x16_sub_saturate_u = Binary (V128 V128Op.(I8x16 SubSatU)) +let i8x16_sub_sat_s = Binary (V128 V128Op.(I8x16 SubSatS)) +let i8x16_sub_sat_u = Binary (V128 V128Op.(I8x16 SubSatU)) let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) let i8x16_min_s = Binary (V128 (V128Op.I8x16 V128Op.MinS)) let i8x16_min_u = Binary (V128 (V128Op.I8x16 V128Op.MinU)) @@ -314,11 +314,11 @@ let i16x8_shl = SimdShift V128Op.(I16x8 Shl) let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) let i16x8_shr_u = SimdShift V128Op.(I16x8 ShrU) let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) -let i16x8_add_saturate_s = Binary (V128 V128Op.(I16x8 AddSatS)) -let i16x8_add_saturate_u = Binary (V128 V128Op.(I16x8 AddSatU)) +let i16x8_add_sat_s = Binary (V128 V128Op.(I16x8 AddSatS)) +let i16x8_add_sat_u = Binary (V128 V128Op.(I16x8 AddSatU)) let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) -let i16x8_sub_saturate_s = Binary (V128 V128Op.(I16x8 SubSatS)) -let i16x8_sub_saturate_u = Binary (V128 V128Op.(I16x8 SubSatU)) +let i16x8_sub_sat_s = Binary (V128 V128Op.(I16x8 SubSatS)) +let i16x8_sub_sat_u = Binary (V128 V128Op.(I16x8 SubSatU)) let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) let i16x8_abs = Unary (V128 (V128Op.I16x8 V128Op.Abs)) let i16x8_min_s = Binary (V128 (V128Op.I16x8 V128Op.MinS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 9eeac2da5e..336e99a426 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -266,11 +266,11 @@ struct | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" | I8x16 Add -> "i8x16.add" - | I8x16 AddSatS -> "i8x16.add_saturate_s" - | I8x16 AddSatU -> "i8x16.add_saturate_u" + | I8x16 AddSatS -> "i8x16.add_sat_s" + | I8x16 AddSatU -> "i8x16.add_sat_u" | I8x16 Sub -> "i8x16.sub" - | I8x16 SubSatS -> "i8x16.sub_saturate_s" - | I8x16 SubSatU -> "i8x16.sub_saturate_u" + | I8x16 SubSatS -> "i8x16.sub_sat_s" + | I8x16 SubSatU -> "i8x16.sub_sat_u" | I8x16 MinS -> "i8x16.min_s" | I8x16 MinU -> "i8x16.min_u" | I8x16 MaxS -> "i8x16.max_s" @@ -279,11 +279,11 @@ struct | I16x8 NarrowS -> "i16x8.narrow_i32x4_s" | I16x8 NarrowU -> "i16x8.narrow_i32x4_u" | I16x8 Add -> "i16x8.add" - | I16x8 AddSatS -> "i16x8.add_saturate_s" - | I16x8 AddSatU -> "i16x8.add_saturate_u" + | I16x8 AddSatS -> "i16x8.add_sat_s" + | I16x8 AddSatU -> "i16x8.add_sat_u" | I16x8 Sub -> "i16x8.sub" - | I16x8 SubSatS -> "i16x8.sub_saturate_s" - | I16x8 SubSatU -> "i16x8.sub_saturate_u" + | I16x8 SubSatS -> "i16x8.sub_sat_s" + | I16x8 SubSatU -> "i16x8.sub_sat_u" | I16x8 Mul -> "i16x8.mul" | I16x8 MinS -> "i16x8.min_s" | I16x8 MinU -> "i16x8.min_u" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index f7f69aa489..b6977a6b2b 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -550,14 +550,14 @@ rule token = parse | "i32x4.widen_high_i16x8_"(sign as s) { UNARY (ext s i32x4_widen_high_i16x8_s i32x4_widen_high_i16x8_u) } - | "i8x16.add_saturate_"(sign as s) - { BINARY (ext s i8x16_add_saturate_s i8x16_add_saturate_u) } - | "i8x16.sub_saturate_"(sign as s) - { BINARY (ext s i8x16_sub_saturate_s i8x16_sub_saturate_u) } - | "i16x8.add_saturate_"(sign as s) - { BINARY (ext s i16x8_add_saturate_s i16x8_add_saturate_u) } - | "i16x8.sub_saturate_"(sign as s) - { BINARY (ext s i16x8_sub_saturate_s i16x8_sub_saturate_u) } + | "i8x16.add_sat_"(sign as s) + { BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } + | "i8x16.sub_sat_"(sign as s) + { BINARY (ext s i8x16_sub_sat_s i8x16_sub_sat_u) } + | "i16x8.add_sat_"(sign as s) + { BINARY (ext s i16x8_add_sat_s i16x8_add_sat_u) } + | "i16x8.sub_sat_"(sign as s) + { BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 91acfc22e3..6699e7c61b 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -126,11 +126,11 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i8x16.shr_s` | `0x6c`| - | | `i8x16.shr_u` | `0x6d`| - | | `i8x16.add` | `0x6e`| - | -| `i8x16.add_saturate_s` | `0x6f`| - | -| `i8x16.add_saturate_u` | `0x70`| - | +| `i8x16.add_sat_s` | `0x6f`| - | +| `i8x16.add_sat_u` | `0x70`| - | | `i8x16.sub` | `0x71`| - | -| `i8x16.sub_saturate_s` | `0x72`| - | -| `i8x16.sub_saturate_u` | `0x73`| - | +| `i8x16.sub_sat_s` | `0x72`| - | +| `i8x16.sub_sat_u` | `0x73`| - | | `i8x16.min_s` | `0x76`| - | | `i8x16.min_u` | `0x77`| - | | `i8x16.max_s` | `0x78`| - | @@ -151,11 +151,11 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i16x8.shr_s` | `0x8c`| - | | `i16x8.shr_u` | `0x8d`| - | | `i16x8.add` | `0x8e`| - | -| `i16x8.add_saturate_s` | `0x8f`| - | -| `i16x8.add_saturate_u` | `0x90`| - | +| `i16x8.add_sat_s` | `0x8f`| - | +| `i16x8.add_sat_u` | `0x90`| - | | `i16x8.sub` | `0x91`| - | -| `i16x8.sub_saturate_s` | `0x92`| - | -| `i16x8.sub_saturate_u` | `0x93`| - | +| `i16x8.sub_sat_s` | `0x92`| - | +| `i16x8.sub_sat_u` | `0x93`| - | | `i16x8.mul` | `0x95`| - | | `i16x8.min_s` | `0x96`| - | | `i16x8.min_u` | `0x97`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index e3c48535fb..8b5ba53aad 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -94,11 +94,11 @@ | `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -119,11 +119,11 @@ | `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.add_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.add_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 50daf4d824..8cac717f34 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -93,11 +93,11 @@ | i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | | i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | | i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | -| i8x16.add_saturate_s | 0x6f | i16x8.add_saturate_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | -| i8x16.add_saturate_u | 0x70 | i16x8.add_saturate_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | +| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | +| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | | i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | -| i8x16.sub_saturate_s | 0x72 | i16x8.sub_saturate_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | -| i8x16.sub_saturate_u | 0x73 | i16x8.sub_saturate_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | +| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | +| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | | ---- dot ---- | 0x74 | ---- dot ---- | 0x94 | ---- dot ---- | 0xb4 | ---- | 0xd4 | | ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | | i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 78b19c11d4..27cbb2eaa8 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -433,40 +433,40 @@ def S.UnsignedSaturate(x): ``` ### Saturating integer addition -* `i8x16.add_saturate_s(a: v128, b: v128) -> v128` -* `i8x16.add_saturate_u(a: v128, b: v128) -> v128` -* `i16x8.add_saturate_s(a: v128, b: v128) -> v128` -* `i16x8.add_saturate_u(a: v128, b: v128) -> v128` +* `i8x16.add_sat_s(a: v128, b: v128) -> v128` +* `i8x16.add_sat_u(a: v128, b: v128) -> v128` +* `i16x8.add_sat_s(a: v128, b: v128) -> v128` +* `i16x8.add_sat_u(a: v128, b: v128) -> v128` Lane-wise saturating addition: ```python -def S.add_saturate_s(a, b): +def S.add_sat_s(a, b): def addsat(x, y): return S.SignedSaturate(x + y) return S.lanewise_binary(addsat, S.AsSigned(a), S.AsSigned(b)) -def S.add_saturate_u(a, b): +def S.add_sat_u(a, b): def addsat(x, y): return S.UnsignedSaturate(x + y) return S.lanewise_binary(addsat, S.AsUnsigned(a), S.AsUnsigned(b)) ``` ### Saturating integer subtraction -* `i8x16.sub_saturate_s(a: v128, b: v128) -> v128` -* `i8x16.sub_saturate_u(a: v128, b: v128) -> v128` -* `i16x8.sub_saturate_s(a: v128, b: v128) -> v128` -* `i16x8.sub_saturate_u(a: v128, b: v128) -> v128` +* `i8x16.sub_sat_s(a: v128, b: v128) -> v128` +* `i8x16.sub_sat_u(a: v128, b: v128) -> v128` +* `i16x8.sub_sat_s(a: v128, b: v128) -> v128` +* `i16x8.sub_sat_u(a: v128, b: v128) -> v128` Lane-wise saturating subtraction: ```python -def S.sub_saturate_s(a, b): +def S.sub_sat_s(a, b): def subsat(x, y): return S.SignedSaturate(x - y) return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b)) -def S.sub_saturate_u(a, b): +def S.sub_sat_u(a, b): def subsat(x, y): return S.UnsignedSaturate(x - y) return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b)) diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 85a2ac94d6..ec7fede839 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -12,8 +12,8 @@ class ArithmeticOp: may be required for the operations. The following operators are covered: add, sub, mul, neg, - add_saturate_s, add_saturate_u, - sub_saturate_s, sub_saturate_u, + add_sat_s, add_sat_u, + sub_sat_s, sub_sat_u, min_s, min_u, max_s, max_u, avgr_u, abs """ def __init__(self, op: str): @@ -45,7 +45,7 @@ def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: """Get the result of saturating arithmetic operation on 2 operands. The operands can be both signed or unsigned. The following ops are covered: - add_saturate_s, sub_saturate_s, add_saturate_u, sub_saturate_u, + add_sat_s, sub_sat_s, add_sat_u, sub_sat_u, Saturating arithmetic can make sure: When the operation result is less than the minimum, return the minimum. @@ -56,7 +56,7 @@ def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: :param lane: the LaneValue instance of a lane in v128 :return: the result of the saturating arithmetic operation """ - if self.op.endswith('saturate_s'): + if self.op.endswith('sat_s'): if operand1 > lane.max: operand1 -= lane.mod if operand2 > lane.max: @@ -72,7 +72,7 @@ def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: if value < lane.min: return lane.min - if self.op.endswith('saturate_u'): + if self.op.endswith('sat_u'): if operand1 < 0: operand1 += lane.mod if operand2 < 0: @@ -127,8 +127,8 @@ def binary_op(self, operand1, operand2, lane): Supported ops: add, sub, mul, - add_saturate_s, add_saturate_u, - sub_saturate_s, sub_saturate_u, + add_sat_s, add_sat_u, + sub_sat_s, sub_sat_u, min_s, min_u, max_s, max_u, avgr_u :param operand1: the operand 1, integer or literal string in hex or decimal format @@ -155,7 +155,7 @@ def binary_op(self, operand1, operand2, lane): value = v1 - v2 elif self.op == 'mul': value = v1 * v2 - elif 'saturate' in self.op: + elif 'sat' in self.op: value = self._saturate(v1, v2, lane) if self.op.endswith('_u'): result_signed = False diff --git a/test/core/simd/meta/simd_sat_arith.py b/test/core/simd/meta/simd_sat_arith.py index 547ee25cfb..5831f5c76c 100644 --- a/test/core/simd/meta/simd_sat_arith.py +++ b/test/core/simd/meta/simd_sat_arith.py @@ -11,8 +11,8 @@ class SimdSaturateArithmeticCases(SimdArithmeticCase): UNARY_OPS = () - BINARY_OPS = ('add_saturate_s', 'add_saturate_u', - 'sub_saturate_s', 'sub_saturate_u') + BINARY_OPS = ('add_sat_s', 'add_sat_u', + 'sub_sat_s', 'sub_sat_u') malformed_template = '(assert_malformed (module quote\n "(func (result v128) ' \ '({lane_type}.{op} ({operand_1}) ({operand_2})))")\n "unknown operator")' @@ -39,7 +39,7 @@ def get_malformed_cases(self): # for saturating integer arithmetic operation for op in inst_ops: malformed_cases.append(self.malformed_template.format( - lane_type=self.LANE_TYPE, op='_'.join([op, 'saturate']), + lane_type=self.LANE_TYPE, op='_'.join([op, 'sat']), operand_1=self.v128_const(self.LANE_TYPE, '1'), operand_2=self.v128_const(self.LANE_TYPE, '2'))) return '\n'.join(malformed_cases) @@ -139,8 +139,8 @@ def get_combine_cases(self): '(local.get 2)))' for func in sorted(self.combine_ternary_arith_test_data): func_parts = func.split('-') - op1 = func_parts[1].replace('_', '_saturate_') - op2 = func_parts[2].replace('_', '_saturate_') + op1 = func_parts[1].replace('_', '_sat_') + op2 = func_parts[2].replace('_', '_sat_') combine_cases.append(ternary_func_template.format(func=func, lane=self.LANE_TYPE, op1=op1, @@ -149,7 +149,7 @@ def get_combine_cases(self): ' ({lane}.{op1} ({lane}.{op2} (local.get 0)) (local.get 1)))' for func in sorted(self.combine_binary_arith_test_data): func_parts = func.split('-') - op1 = func_parts[1].replace('_', '_saturate_') + op1 = func_parts[1].replace('_', '_sat_') combine_cases.append(binary_func_template.format(func=func, lane=self.LANE_TYPE, op1=op1, @@ -197,28 +197,28 @@ def hex_unary_op_test_data(self): @property def i8x16_f32x4_test_data(self): return { - 'i8x16.add_saturate_s': [ + 'i8x16.add_sat_s': [ [['0x80', '-0.0'], '0x80', ['i8x16', 'f32x4', 'i8x16']], [['1', '+inf'], ['0x01', '0x01', '0x81', '0x7f'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-inf'], ['0x01', '0x01', '0x81', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', 'nan'], ['0x01', '0x01', '0xc1', '0x7f'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-nan'], ['0x01', '0x01', '0xc1', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']] ], - 'i8x16.add_saturate_u': [ + 'i8x16.add_sat_u': [ [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '+inf'], ['0x01', '0x01', '0x81', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-inf'], ['0x01', '0x01', '0x81', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', 'nan'], ['0x01', '0x01', '0xc1', '0x80'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-nan'], ['0x01', '0x01', '0xc1', '0xff'] * 4, ['i8x16', 'f32x4', 'i8x16']], ], - 'i8x16.sub_saturate_s': [ + 'i8x16.sub_sat_s': [ [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '+inf'], ['0x01', '0x01', '0x7f', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-inf'], ['0x01', '0x01', '0x7f', '0x02'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', 'nan'], ['0x01', '0x01', '0x41', '0x82'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-nan'], ['0x01', '0x01', '0x41', '0x02'] * 4, ['i8x16', 'f32x4', 'i8x16']], ], - 'i8x16.sub_saturate_u': [ + 'i8x16.sub_sat_u': [ [['0x80', '-0.0'], ['0x80', '0x80', '0x80', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '+inf'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], [['1', '-inf'], ['0x01', '0x01', '0', '0'] * 4, ['i8x16', 'f32x4', 'i8x16']], @@ -230,19 +230,19 @@ def i8x16_f32x4_test_data(self): @property def combine_dec_hex_test_data(self): return { - 'i8x16.add_saturate_s': [ + 'i8x16.add_sat_s': [ [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', '0xf4', '0xf3', '0xf2', '0xf1']], ['0'] * 16, ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.add_saturate_u': [ + 'i8x16.add_sat_u': [ [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', '0xf4', '0xf3', '0xf2', '0xf1']], ['0'] + ['0xff'] * 15, ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.sub_saturate_s': [ + 'i8x16.sub_sat_s': [ [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', '0xf4', '0xf3', '0xf2', '0xf1']], @@ -250,7 +250,7 @@ def combine_dec_hex_test_data(self): '0x18', '0x1a', '0x1c', '0x1e'], ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.sub_saturate_u': [ + 'i8x16.sub_sat_u': [ [[['0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10', '11', '12', '13', '14', '15'], ['0', '0xff', '0xfe', '0xfd', '0xfc', '0xfb', '0xfa', '0xf9', '0xf8', '0xf7', '0xf6', '0xf5', '0xf4', '0xf3', '0xf2', '0xf1']], @@ -262,19 +262,19 @@ def combine_dec_hex_test_data(self): @property def range_test_data(self): return { - 'i8x16.add_saturate_s': [ + 'i8x16.add_sat_s': [ [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], [str(i * 3) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.add_saturate_u': [ + 'i8x16.add_sat_u': [ [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], [str(i * 3) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.sub_saturate_s': [ + 'i8x16.sub_sat_s': [ [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], [str(-i) for i in range(16)], ['i8x16', 'i8x16', 'i8x16']] ], - 'i8x16.sub_saturate_u': [ + 'i8x16.sub_sat_u': [ [[[str(i) for i in range(16)], [str(i * 2) for i in range(16)]], ['0'] * 16, ['i8x16', 'i8x16', 'i8x16']] ], @@ -295,7 +295,7 @@ def get_malformed_cases(self): for op in ['add', 'sub']: for suffix in ['s', 'u']: malformed_cases.append(self.malformed_template.format( - lane_type=prefix, op='_'.join([op, 'saturate', suffix]), + lane_type=prefix, op='_'.join([op, 'sat', suffix]), operand_1=self.v128_const(prefix, '0', lane_len=4), operand_2=self.v128_const(prefix, '0', lane_len=4) )) @@ -330,25 +330,25 @@ def hex_unary_op_test_data(self): @property def underscore_literal_test_data(self): return { - 'i16x8.add_saturate_s': [ + 'i16x8.add_sat_s': [ [['012_345', '032_123'], '032_767', ['i16x8'] * 3], [['012_345', '056_789'], '03_598', ['i16x8'] * 3], [['0x0_1234', '0x0_5678'], '0x0_68ac', ['i16x8'] * 3], [['0x0_90AB', '0x0_cdef'], '-0x0_8000', ['i16x8'] * 3] ], - 'i16x8.add_saturate_u': [ + 'i16x8.add_sat_u': [ [['012_345', '056_789'], '065_535', ['i16x8'] * 3], [['012_345', '-012_345'], '065_535', ['i16x8'] * 3], [['0x0_1234', '0x0_5678'], '0x0_68ac', ['i16x8'] * 3], [['0x0_90AB', '0x0_cdef'], '0x0_ffff', ['i16x8'] * 3] ], - 'i16x8.sub_saturate_s': [ + 'i16x8.sub_sat_s': [ [['012_345', '056_789'], '021_092', ['i16x8'] * 3], [['012_345', '-012_345'], '024_690', ['i16x8'] * 3], [['0x0_1234', '0x0_5678'], '0x0_bbbc', ['i16x8'] * 3], [['0x0_90AB', '-0x1234'], '0xa2df', ['i16x8'] * 3] ], - 'i16x8.sub_saturate_u': [ + 'i16x8.sub_sat_u': [ [['012_345', '056_789'], '0', ['i16x8'] * 3], [['056_789', '-12_345'], '03_598', ['i16x8'] * 3], [['0x0_1234', '-0x0_5678'], '0', ['i16x8'] * 3], @@ -359,28 +359,28 @@ def underscore_literal_test_data(self): @property def i16x8_f32x4_test_data(self): return { - 'i16x8.add_saturate_s': [ + 'i16x8.add_sat_s': [ [['0x8000', '-0.0'], '0x8000', ['i16x8', 'f32x4', 'i16x8']], [['1', '+inf'], ['0x01', '0x7f81'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-inf'], ['0x01', '0xff81'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-nan'], ['0x01', '0xffc1'] * 4, ['i16x8', 'f32x4', 'i16x8']] ], - 'i16x8.add_saturate_u': [ + 'i16x8.add_sat_u': [ [['0x8000', '-0.0'], ['0x8000', '0xffff'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '+inf'], ['0x01', '0x7f81'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-inf'], ['0x01', '0xff81'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', 'nan'], ['0x01', '0x7fc1'] * 4, ['i16x8', 'f32x4', 'i16x8']] ], - 'i16x8.sub_saturate_s': [ + 'i16x8.sub_sat_s': [ [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '+inf'], ['0x01', '0x8081'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-inf'], ['0x01', '0x81'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', 'nan'], ['0x01', '0x8041'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-nan'], ['0x01', '0x41'] * 4, ['i16x8', 'f32x4', 'i16x8']] ], - 'i16x8.sub_saturate_u': [ + 'i16x8.sub_sat_u': [ [['0x8000', '-0.0'], ['0x8000', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '+inf'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], [['1', '-inf'], ['0x01', '0'] * 4, ['i16x8', 'f32x4', 'i16x8']], @@ -392,22 +392,22 @@ def i16x8_f32x4_test_data(self): @property def combine_dec_hex_test_data(self): return { - 'i16x8.add_saturate_s': [ + 'i16x8.add_sat_s': [ [[['0', '1', '2', '3', '4', '5', '6', '7'], ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], ['0'] * 8, ['i16x8'] * 3] ], - 'i16x8.add_saturate_u': [ + 'i16x8.add_sat_u': [ [[['0', '1', '2', '3', '4', '5', '6', '7'], ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], ['0'] + ['0xffff'] * 7, ['i16x8'] * 3] ], - 'i16x8.sub_saturate_s': [ + 'i16x8.sub_sat_s': [ [[['0', '1', '2', '3', '4', '5', '6', '7'], ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], ['0', '2', '4', '6', '8', '10', '12', '14'], ['i16x8'] * 3] ], - 'i16x8.sub_saturate_u': [ + 'i16x8.sub_sat_u': [ [[['0', '1', '2', '3', '4', '5', '6', '7'], ['0', '0xffff', '0xfffe', '0xfffd', '0xfffc', '0xfffb', '0xfffa', '0xfff9']], ['0'] * 8, ['i16x8'] * 3] @@ -417,19 +417,19 @@ def combine_dec_hex_test_data(self): @property def range_test_data(self): return { - 'i16x8.add_saturate_s': [ + 'i16x8.add_sat_s': [ [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], [str(i * 3) for i in range(8)], ['i16x8'] * 3] ], - 'i16x8.add_saturate_u': [ + 'i16x8.add_sat_u': [ [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], [str(i * 3) for i in range(8)], ['i16x8'] * 3] ], - 'i16x8.sub_saturate_s': [ + 'i16x8.sub_sat_s': [ [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], [str(-i) for i in range(8)], ['i16x8'] * 3] ], - 'i16x8.sub_saturate_u': [ + 'i16x8.sub_sat_u': [ [[[str(i) for i in range(8)], [str(i * 2) for i in range(8)]], ['0'] * 8, ['i16x8'] * 3] ] diff --git a/test/core/simd/simd_i16x8_sat_arith.wast b/test/core/simd/simd_i16x8_sat_arith.wast index 44f859aa55..cea4ebbc7f 100644 --- a/test/core/simd/simd_i16x8_sat_arith.wast +++ b/test/core/simd/simd_i16x8_sat_arith.wast @@ -2,691 +2,691 @@ (module - (func (export "i16x8.add_saturate_s") (param v128 v128) (result v128) (i16x8.add_saturate_s (local.get 0) (local.get 1))) - (func (export "i16x8.add_saturate_u") (param v128 v128) (result v128) (i16x8.add_saturate_u (local.get 0) (local.get 1))) - (func (export "i16x8.sub_saturate_s") (param v128 v128) (result v128) (i16x8.sub_saturate_s (local.get 0) (local.get 1))) - (func (export "i16x8.sub_saturate_u") (param v128 v128) (result v128) (i16x8.sub_saturate_u (local.get 0) (local.get 1))) + (func (export "i16x8.add_sat_s") (param v128 v128) (result v128) (i16x8.add_sat_s (local.get 0) (local.get 1))) + (func (export "i16x8.add_sat_u") (param v128 v128) (result v128) (i16x8.add_sat_u (local.get 0) (local.get 1))) + (func (export "i16x8.sub_sat_s") (param v128 v128) (result v128) (i16x8.sub_sat_s (local.get 0) (local.get 1))) + (func (export "i16x8.sub_sat_u") (param v128 v128) (result v128) (i16x8.sub_sat_u (local.get 0) (local.get 1))) ) -;; i16x8.add_saturate_s -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i16x8 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 2 4 6 8 10 12 14)) - (v128.const i16x8 0 3 6 9 12 15 18 21)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 032_123 032_123 032_123 032_123 032_123 032_123 032_123 032_123)) - (v128.const i16x8 032_767 032_767 032_767 032_767 032_767 032_767 032_767 032_767)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) - (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) - (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) -(assert_return (invoke "i16x8.add_saturate_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) - (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) - (v128.const i16x8 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000)) +;; i16x8.add_sat_s +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1 0x01 0xffc1)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 3 6 9 12 15 18 21)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 032_123 032_123 032_123 032_123 032_123 032_123 032_123 032_123)) + (v128.const i16x8 032_767 032_767 032_767 032_767 032_767 032_767 032_767 032_767)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) +(assert_return (invoke "i16x8.add_sat_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) + (v128.const i16x8 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000 -0x0_8000)) -;; i16x8.add_saturate_u -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32769 32769 32769 32769 32769 32769 32769 32769)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i16x8 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) - (v128.const i16x8 0 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 2 4 6 8 10 12 14)) - (v128.const i16x8 0 3 6 9 12 15 18 21)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) - (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) - (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) - (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) -(assert_return (invoke "i16x8.add_saturate_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) - (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) - (v128.const i16x8 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff)) +;; i16x8.add_sat_u +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32769 32769 32769 32769 32769 32769 32769 32769)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff 0x8000 0xffff)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81 0x01 0x7f81)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0xff81 0x01 0xff81 0x01 0xff81 0x01 0xff81)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1 0x01 0x7fc1)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 3 6 9 12 15 18 21)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) + (v128.const i16x8 065_535 065_535 065_535 065_535 065_535 065_535 065_535 065_535)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac 0x0_68ac)) +(assert_return (invoke "i16x8.add_sat_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef)) + (v128.const i16x8 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff 0x0_ffff)) -;; i16x8.sub_saturate_s -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32765 -32765 -32765 -32765 -32765 -32765 -32765 -32765)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i16x8 0x01 0x8081 0x01 0x8081 0x01 0x8081 0x01 0x8081)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i16x8 0x01 0x81 0x01 0x81 0x01 0x81 0x01 0x81)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i16x8 0x01 0x8041 0x01 0x8041 0x01 0x8041 0x01 0x8041)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i16x8 0x01 0x41 0x01 0x41 0x01 0x41 0x01 0x41)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) - (v128.const i16x8 0 2 4 6 8 10 12 14)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 2 4 6 8 10 12 14)) - (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i16x8 021_092 021_092 021_092 021_092 021_092 021_092 021_092 021_092)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) - (v128.const i16x8 024_690 024_690 024_690 024_690 024_690 024_690 024_690 024_690)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) - (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) - (v128.const i16x8 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc)) -(assert_return (invoke "i16x8.sub_saturate_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) - (v128.const i16x8 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234)) - (v128.const i16x8 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df)) +;; i16x8.sub_sat_s +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32765 -32765 -32765 -32765 -32765 -32765 -32765 -32765)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0x8081 0x01 0x8081 0x01 0x8081 0x01 0x8081)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0x81 0x01 0x81 0x01 0x81 0x01 0x81)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0x8041 0x01 0x8041 0x01 0x8041 0x01 0x8041)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0x41 0x01 0x41 0x01 0x41 0x01 0x41)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 2 4 6 8 10 12 14)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 -1 -2 -3 -4 -5 -6 -7)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 021_092 021_092 021_092 021_092 021_092 021_092 021_092 021_092)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345 -012_345)) + (v128.const i16x8 024_690 024_690 024_690 024_690 024_690 024_690 024_690 024_690)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678 0x0_5678)) + (v128.const i16x8 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc 0x0_bbbc)) +(assert_return (invoke "i16x8.sub_sat_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB) + (v128.const i16x8 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234 -0x1234)) + (v128.const i16x8 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df 0xa2df)) -;; i16x8.sub_saturate_u -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 0 0 0 0 0 0 0) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) - (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) - (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) - (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 1 1 1 1 1 1 1 1)) - (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) - (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) - (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) - (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0 1 2 3 4 5 6 7) - (v128.const i16x8 0 2 4 6 8 10 12 14)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) - (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789) - (v128.const i16x8 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345)) - (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) - (v128.const i16x8 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.sub_saturate_u" (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef) - (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) - (v128.const i16x8 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44)) +;; i16x8.sub_sat_u +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32764 32764 32764 32764 32764 32764 32764 32764)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff 0x3fff) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000) + (v128.const i16x8 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000 0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff -0x3fff) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000 -0x4000) + (v128.const i16x8 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001 -0x4001)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i16x8 65534 65534 65534 65534 65534 65534 65534 65534)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff) + (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i16x8 0x8000 0 0x8000 0 0x8000 0 0x8000 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i16x8 0x01 0 0x01 0 0x01 0 0x01 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 0xffff 0xfffe 0xfffd 0xfffc 0xfffb 0xfffa 0xfff9)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0 1 2 3 4 5 6 7) + (v128.const i16x8 0 2 4 6 8 10 12 14)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 012_345 012_345 012_345 012_345 012_345 012_345 012_345 012_345) + (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789) + (v128.const i16x8 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345 -12_345)) + (v128.const i16x8 03_598 03_598 03_598 03_598 03_598 03_598 03_598 03_598)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234 0x0_1234) + (v128.const i16x8 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678 -0x0_5678)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.sub_sat_u" (v128.const i16x8 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef 0x0_cdef) + (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) + (v128.const i16x8 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44 0x0_3d44)) ;; Malformed cases: non-existent op names (assert_malformed (module quote - "(func (result v128) (i16x8.add_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i16x8.add_sat (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.sub_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i16x8.sub_sat (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.mul_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i16x8.mul_sat (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.div_saturate (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i16x8.div_sat (v128.const i16x8 1 1 1 1 1 1 1 1) (v128.const i16x8 2 2 2 2 2 2 2 2)))") "unknown operator") ;; type check -(assert_invalid (module (func (result v128) (i16x8.add_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.add_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.add_sat_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.add_sat_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.sub_sat_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.sub_sat_u (i32.const 0) (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument (assert_invalid (module - (func $i16x8.add_saturate_s-1st-arg-empty (result v128) - (i16x8.add_saturate_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + (func $i16x8.add_sat_s-1st-arg-empty (result v128) + (i16x8.add_sat_s (v128.const i16x8 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.add_saturate_s-arg-empty (result v128) - (i16x8.add_saturate_s) + (func $i16x8.add_sat_s-arg-empty (result v128) + (i16x8.add_sat_s) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.add_saturate_u-1st-arg-empty (result v128) - (i16x8.add_saturate_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + (func $i16x8.add_sat_u-1st-arg-empty (result v128) + (i16x8.add_sat_u (v128.const i16x8 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.add_saturate_u-arg-empty (result v128) - (i16x8.add_saturate_u) + (func $i16x8.add_sat_u-arg-empty (result v128) + (i16x8.add_sat_u) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.sub_saturate_s-1st-arg-empty (result v128) - (i16x8.sub_saturate_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + (func $i16x8.sub_sat_s-1st-arg-empty (result v128) + (i16x8.sub_sat_s (v128.const i16x8 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.sub_saturate_s-arg-empty (result v128) - (i16x8.sub_saturate_s) + (func $i16x8.sub_sat_s-arg-empty (result v128) + (i16x8.sub_sat_s) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.sub_saturate_u-1st-arg-empty (result v128) - (i16x8.sub_saturate_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + (func $i16x8.sub_sat_u-1st-arg-empty (result v128) + (i16x8.sub_sat_u (v128.const i16x8 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i16x8.sub_saturate_u-arg-empty (result v128) - (i16x8.sub_saturate_u) + (func $i16x8.sub_sat_u-arg-empty (result v128) + (i16x8.sub_sat_u) ) ) "type mismatch" @@ -695,21 +695,21 @@ ;; combination (module (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) - (i16x8.add_saturate_s (i16x8.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (i16x8.add_sat_s (i16x8.sub_sat_s (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_s-sub_u") (param v128 v128 v128) (result v128) - (i16x8.add_saturate_s (i16x8.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (i16x8.add_sat_s (i16x8.sub_sat_u (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_u-sub_s") (param v128 v128 v128) (result v128) - (i16x8.add_saturate_u (i16x8.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (i16x8.add_sat_u (i16x8.sub_sat_s (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_u-sub_u") (param v128 v128 v128) (result v128) - (i16x8.add_saturate_u (i16x8.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (i16x8.add_sat_u (i16x8.sub_sat_u (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_s-neg") (param v128 v128) (result v128) - (i16x8.add_saturate_s (i16x8.neg (local.get 0)) (local.get 1))) + (i16x8.add_sat_s (i16x8.neg (local.get 0)) (local.get 1))) (func (export "sat-add_u-neg") (param v128 v128) (result v128) - (i16x8.add_saturate_u (i16x8.neg (local.get 0)) (local.get 1))) + (i16x8.add_sat_u (i16x8.neg (local.get 0)) (local.get 1))) (func (export "sat-sub_s-neg") (param v128 v128) (result v128) - (i16x8.sub_saturate_s (i16x8.neg (local.get 0)) (local.get 1))) + (i16x8.sub_sat_s (i16x8.neg (local.get 0)) (local.get 1))) (func (export "sat-sub_u-neg") (param v128 v128) (result v128) - (i16x8.sub_saturate_u (i16x8.neg (local.get 0)) (local.get 1))) + (i16x8.sub_sat_u (i16x8.neg (local.get 0)) (local.get 1))) ) (assert_return (invoke "sat-add_s-sub_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) diff --git a/test/core/simd/simd_i8x16_sat_arith.wast b/test/core/simd/simd_i8x16_sat_arith.wast index 6a178e55c9..a799a8b739 100644 --- a/test/core/simd/simd_i8x16_sat_arith.wast +++ b/test/core/simd/simd_i8x16_sat_arith.wast @@ -2,667 +2,667 @@ (module - (func (export "i8x16.add_saturate_s") (param v128 v128) (result v128) (i8x16.add_saturate_s (local.get 0) (local.get 1))) - (func (export "i8x16.add_saturate_u") (param v128 v128) (result v128) (i8x16.add_saturate_u (local.get 0) (local.get 1))) - (func (export "i8x16.sub_saturate_s") (param v128 v128) (result v128) (i8x16.sub_saturate_s (local.get 0) (local.get 1))) - (func (export "i8x16.sub_saturate_u") (param v128 v128) (result v128) (i8x16.sub_saturate_u (local.get 0) (local.get 1))) + (func (export "i8x16.add_sat_s") (param v128 v128) (result v128) (i8x16.add_sat_s (local.get 0) (local.get 1))) + (func (export "i8x16.add_sat_u") (param v128 v128) (result v128) (i8x16.add_sat_u (local.get 0) (local.get 1))) + (func (export "i8x16.sub_sat_s") (param v128 v128) (result v128) (i8x16.sub_sat_s (local.get 0) (local.get 1))) + (func (export "i8x16.sub_sat_u") (param v128 v128) (result v128) (i8x16.sub_sat_u (local.get 0) (local.get 1))) ) -;; i8x16.add_saturate_s -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i8x16 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i8x16 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i8x16 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i8x16 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) - (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) +;; i8x16.add_sat_s +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f 0x01 0x01 0x81 0x7f)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0 0x01 0x01 0x81 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f 0x01 0x01 0xc1 0x7f)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0 0x01 0x01 0xc1 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) -;; i8x16.add_saturate_u -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i8x16 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i8x16 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i8x16 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i8x16 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i8x16 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) - (v128.const i8x16 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i8x16.add_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) - (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) +;; i8x16.add_sat_u +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff 0x80 0x80 0x80 0xff)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80 0x01 0x01 0x81 0x80)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff 0x01 0x01 0x81 0xff)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80 0x01 0x01 0xc1 0x80)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff 0x01 0x01 0xc1 0xff)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) +(assert_return (invoke "i8x16.add_sat_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45)) -;; i8x16.sub_saturate_s -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i8x16 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i8x16 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i8x16 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i8x16 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) - (v128.const i8x16 0 0x02 0x04 0x06 0x08 0x0a 0x0c 0x0e 0x10 0x12 0x14 0x16 0x18 0x1a 0x1c 0x1e)) -(assert_return (invoke "i8x16.sub_saturate_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) - (v128.const i8x16 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15)) +;; i8x16.sub_sat_s +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125 -125)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82 0x01 0x01 0x7f 0x82)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02 0x01 0x01 0x7f 0x02)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82 0x01 0x01 0x41 0x82)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02 0x01 0x01 0x41 0x02)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0x02 0x04 0x06 0x08 0x0a 0x0c 0x0e 0x10 0x12 0x14 0x16 0x18 0x1a 0x1c 0x1e)) +(assert_return (invoke "i8x16.sub_sat_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15)) -;; i8x16.sub_saturate_u -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) - (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) - (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) - (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) - (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) - (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) - (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) - (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) - (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) - (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) - (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) - (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 nan nan nan nan)) - (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) - (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i8x16.sub_saturate_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) - (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) - (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +;; i8x16.sub_sat_u +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124 124)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40) + (v128.const i8x16 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f -0x3f) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40 -0x40) + (v128.const i8x16 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41 -0x41)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01 -0x01)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01)) + (v128.const i8x16 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff) + (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80) + (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i8x16 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0 0x80 0x80 0x80 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 nan nan nan nan)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i8x16 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0 0x01 0x01 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 0xff 0xfe 0xfd 0xfc 0xfb 0xfa 0xf9 0xf8 0xf7 0xf6 0xf5 0xf4 0xf3 0xf2 0xf1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.sub_sat_u" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) + (v128.const i8x16 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ;; Malformed cases: non-existent op names (assert_malformed (module quote - "(func (result v128) (i8x16.add_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i8x16.add_sat (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.sub_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i8x16.sub_sat (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.mul_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i8x16.mul_sat (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.div_saturate (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") + "(func (result v128) (i8x16.div_sat (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.add_saturate_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i32x4.add_sat_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.add_saturate_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i32x4.add_sat_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.sub_saturate_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i32x4.sub_sat_s (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.sub_saturate_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i32x4.sub_sat_u (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f32x4.add_saturate_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "(func (result v128) (f32x4.add_sat_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f32x4.add_saturate_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "(func (result v128) (f32x4.add_sat_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f32x4.sub_saturate_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "(func (result v128) (f32x4.sub_sat_s (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (f32x4.sub_saturate_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") + "(func (result v128) (f32x4.sub_sat_u (v128.const f32x4 0 0 0 0) (v128.const f32x4 0 0 0 0)))") "unknown operator") ;; type check -(assert_invalid (module (func (result v128) (i8x16.add_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i8x16.add_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i8x16.sub_saturate_s (i32.const 0) (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i8x16.sub_saturate_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.add_sat_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.add_sat_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.sub_sat_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.sub_sat_u (i32.const 0) (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument (assert_invalid (module - (func $i8x16.add_saturate_s-1st-arg-empty (result v128) - (i8x16.add_saturate_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (func $i8x16.add_sat_s-1st-arg-empty (result v128) + (i8x16.add_sat_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.add_saturate_s-arg-empty (result v128) - (i8x16.add_saturate_s) + (func $i8x16.add_sat_s-arg-empty (result v128) + (i8x16.add_sat_s) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.add_saturate_u-1st-arg-empty (result v128) - (i8x16.add_saturate_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (func $i8x16.add_sat_u-1st-arg-empty (result v128) + (i8x16.add_sat_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.add_saturate_u-arg-empty (result v128) - (i8x16.add_saturate_u) + (func $i8x16.add_sat_u-arg-empty (result v128) + (i8x16.add_sat_u) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.sub_saturate_s-1st-arg-empty (result v128) - (i8x16.sub_saturate_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (func $i8x16.sub_sat_s-1st-arg-empty (result v128) + (i8x16.sub_sat_s (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.sub_saturate_s-arg-empty (result v128) - (i8x16.sub_saturate_s) + (func $i8x16.sub_sat_s-arg-empty (result v128) + (i8x16.sub_sat_s) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.sub_saturate_u-1st-arg-empty (result v128) - (i8x16.sub_saturate_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (func $i8x16.sub_sat_u-1st-arg-empty (result v128) + (i8x16.sub_sat_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ) ) "type mismatch" ) (assert_invalid (module - (func $i8x16.sub_saturate_u-arg-empty (result v128) - (i8x16.sub_saturate_u) + (func $i8x16.sub_sat_u-arg-empty (result v128) + (i8x16.sub_sat_u) ) ) "type mismatch" @@ -671,21 +671,21 @@ ;; combination (module (func (export "sat-add_s-sub_s") (param v128 v128 v128) (result v128) - (i8x16.add_saturate_s (i8x16.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (i8x16.add_sat_s (i8x16.sub_sat_s (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_s-sub_u") (param v128 v128 v128) (result v128) - (i8x16.add_saturate_s (i8x16.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (i8x16.add_sat_s (i8x16.sub_sat_u (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_u-sub_s") (param v128 v128 v128) (result v128) - (i8x16.add_saturate_u (i8x16.sub_saturate_s (local.get 0) (local.get 1))(local.get 2))) + (i8x16.add_sat_u (i8x16.sub_sat_s (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_u-sub_u") (param v128 v128 v128) (result v128) - (i8x16.add_saturate_u (i8x16.sub_saturate_u (local.get 0) (local.get 1))(local.get 2))) + (i8x16.add_sat_u (i8x16.sub_sat_u (local.get 0) (local.get 1))(local.get 2))) (func (export "sat-add_s-neg") (param v128 v128) (result v128) - (i8x16.add_saturate_s (i8x16.neg (local.get 0)) (local.get 1))) + (i8x16.add_sat_s (i8x16.neg (local.get 0)) (local.get 1))) (func (export "sat-add_u-neg") (param v128 v128) (result v128) - (i8x16.add_saturate_u (i8x16.neg (local.get 0)) (local.get 1))) + (i8x16.add_sat_u (i8x16.neg (local.get 0)) (local.get 1))) (func (export "sat-sub_s-neg") (param v128 v128) (result v128) - (i8x16.sub_saturate_s (i8x16.neg (local.get 0)) (local.get 1))) + (i8x16.sub_sat_s (i8x16.neg (local.get 0)) (local.get 1))) (func (export "sat-sub_u-neg") (param v128 v128) (result v128) - (i8x16.sub_saturate_u (i8x16.neg (local.get 0)) (local.get 1))) + (i8x16.sub_sat_u (i8x16.neg (local.get 0)) (local.get 1))) ) (assert_return (invoke "sat-add_s-sub_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) diff --git a/test/core/simd/simd_splat.wast b/test/core/simd/simd_splat.wast index fcd88ca273..4be04ef177 100644 --- a/test/core/simd/simd_splat.wast +++ b/test/core/simd/simd_splat.wast @@ -221,14 +221,14 @@ (f64x2.mul (f64x2.splat (local.get 2)) (f64x2.splat (local.get 3)))))) ;; Saturating integer arithmetic - (func (export "as-i8x16_add_saturate_s-operands") (param i32 i32) (result v128) - (i8x16.add_saturate_s (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) - (func (export "as-i16x8_add_saturate_s-operands") (param i32 i32) (result v128) - (i16x8.add_saturate_s (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) - (func (export "as-i8x16_sub_saturate_u-operands") (param i32 i32) (result v128) - (i8x16.sub_saturate_u (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) - (func (export "as-i16x8_sub_saturate_u-operands") (param i32 i32) (result v128) - (i16x8.sub_saturate_u (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + (func (export "as-i8x16_add_sat_s-operands") (param i32 i32) (result v128) + (i8x16.add_sat_s (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i16x8_add_sat_s-operands") (param i32 i32) (result v128) + (i16x8.add_sat_s (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) + (func (export "as-i8x16_sub_sat_u-operands") (param i32 i32) (result v128) + (i8x16.sub_sat_u (i8x16.splat (local.get 0)) (i8x16.splat (local.get 1)))) + (func (export "as-i16x8_sub_sat_u-operands") (param i32 i32) (result v128) + (i16x8.sub_sat_u (i16x8.splat (local.get 0)) (i16x8.splat (local.get 1)))) ;; Bit shifts (func (export "as-i8x16_shr_s-operand") (param i32 i32) (result v128) @@ -309,10 +309,10 @@ (assert_return (invoke "as-i64x2_add_sub_mul-operands" (i64.const 0x7fffffff) (i64.const 0x1_0000_0001) (i64.const 65536) (i64.const 65536)) (v128.const i64x2 0x8000_0000 0x8000_0000)) (assert_return (invoke "as-f64x2_add_sub_mul-operands" (f64.const 0x1p-1) (f64.const 0.75) (f64.const 0x1p-1) (f64.const 0.5)) (v128.const f64x2 0x1p+0 0x1p+0)) -(assert_return (invoke "as-i8x16_add_saturate_s-operands" (i32.const 0x7f) (i32.const 1)) (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "as-i16x8_add_saturate_s-operands" (i32.const 0x7fff) (i32.const 1)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "as-i8x16_sub_saturate_u-operands" (i32.const 0x7f) (i32.const 0xff)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) -(assert_return (invoke "as-i16x8_sub_saturate_u-operands" (i32.const 0x7fff) (i32.const 0xffff)) (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-i8x16_add_sat_s-operands" (i32.const 0x7f) (i32.const 1)) (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) +(assert_return (invoke "as-i16x8_add_sat_s-operands" (i32.const 0x7fff) (i32.const 1)) (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) +(assert_return (invoke "as-i8x16_sub_sat_u-operands" (i32.const 0x7f) (i32.const 0xff)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "as-i16x8_sub_sat_u-operands" (i32.const 0x7fff) (i32.const 0xffff)) (v128.const i16x8 0 0 0 0 0 0 0 0)) (assert_return (invoke "as-i8x16_shr_s-operand" (i32.const 0xf0) (i32.const 3)) (v128.const i8x16 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2)) (assert_return (invoke "as-i16x8_shr_s-operand" (i32.const 0x100) (i32.const 4)) (v128.const i16x8 16 16 16 16 16 16 16 16)) From e1ff82e1a9d6df0e6030ad4098ac501a859123fc Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 11 Sep 2020 11:22:09 -0700 Subject: [PATCH 234/378] Pseudo-Minimum and Pseudo-Maximum instructions (#122) Introduce Pseudo-Minimum (`f32x4.pmin` and `f64x2.pmin`) and Pseudo-Maximum (`f32x4.pmax` and `f64x2.pmax`) instructions, which implement Pseudo-Minimum and Pseudo-Maximum operations with slightly different semantics than the Minimum and Maximum in the current spec. Pseudo-Minimum is defined as `pmin(a, b) := b < a ? b : a` and Pseudo-Maximum is defined as `pmax(a, b) := a < b ? b : a`. "Pseudo" in the name refers to the fact that these operations may not return the minimum in case of signed zero inputs, in particular: - `pmin(+0.0, -0.0) == +0.0` - `pmax(-0.0, +0.0) == -0.0` --- proposals/simd/BinarySIMD.md | 4 ++++ proposals/simd/SIMD.md | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 6699e7c61b..3031eac20b 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -197,6 +197,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `f32x4.div` | `0xe7`| - | | `f32x4.min` | `0xe8`| - | | `f32x4.max` | `0xe9`| - | +| `f32x4.pmin` | `0xea`| - | +| `f32x4.pmax` | `0xeb`| - | | `f64x2.abs` | `0xec`| - | | `f64x2.neg` | `0xed`| - | | `f64x2.sqrt` | `0xef`| - | @@ -206,6 +208,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `f64x2.div` | `0xf3`| - | | `f64x2.min` | `0xf4`| - | | `f64x2.max` | `0xf5`| - | +| `f64x2.pmin` | `0xf6`| - | +| `f64x2.pmax` | `0xf7`| - | | `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | | `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | | `f32x4.convert_i32x4_s` | `0xfa`| - | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 27cbb2eaa8..84a1e338e3 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -867,6 +867,18 @@ Lane-wise minimum value, propagating NaNs. Lane-wise maximum value, propagating NaNs. +### Pseudo-minimum +* `f32x4.pmin(a: v128, b: v128) -> v128` +* `f64x2.pmin(a: v128, b: v128) -> v128` + +Lane-wise minimum value, defined as `b < a ? b : a`. + +### Pseudo-maximum +* `f32x4.pmax(a: v128, b: v128) -> v128` +* `f64x2.pmax(a: v128, b: v128) -> v128` + +Lane-wise maximum value, defined as `a < b ? b : a`. + ## Floating-point arithmetic The floating-point arithmetic operations are all lane-wise versions of the From 8e87db70fe237937fa10d735cc2a2aa8c851f476 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 11 Sep 2020 13:45:46 -0700 Subject: [PATCH 235/378] Floating-point rounding instructions (#232) New floating-point rounding instructions: - Round to nearest integer, ties to even: `f32x4.nearest`/`f64x2.nearest` - Round to integer towards zero (truncate to integer): `f32x4.trunc`/`f64x2.trunc` - Round to integer above (ceiling): `f32x4.ceil`/`f64x2.ceil` - Round to integer below (floor): `f32x4.floor`/`f64x2.floor` --- proposals/simd/BinarySIMD.md | 8 ++++++++ proposals/simd/ImplementationStatus.md | 8 ++++++++ proposals/simd/SIMD.md | 24 ++++++++++++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 3031eac20b..4297afbd38 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -188,6 +188,14 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.add` | `0xce`| - | | `i64x2.sub` | `0xd1`| - | | `i64x2.mul` | `0xd5`| - | +| `f32x4.ceil` | `0xd8`| - | +| `f32x4.floor` | `0xd9`| - | +| `f32x4.trunc` | `0xda`| - | +| `f32x4.nearest` | `0xdb`| - | +| `f64x2.ceil` | `0xdc`| - | +| `f64x2.floor` | `0xdd`| - | +| `f64x2.trunc` | `0xde`| - | +| `f64x2.nearest` | `0xdf`| - | | `f32x4.abs` | `0xe0`| - | | `f32x4.neg` | `0xe1`| - | | `f32x4.sqrt` | `0xe3`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8b5ba53aad..00afc614d7 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -165,6 +165,10 @@ | `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ceil` | | | | | | +| `f32x4.floor` | | | | | | +| `f32x4.trunc` | | | | | | +| `f32x4.nearest` | | | | | | | `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -174,6 +178,10 @@ | `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ceil` | | | | | | +| `f64x2.floor` | | | | | | +| `f64x2.trunc` | | | | | | +| `f64x2.nearest` | | | | | | | `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 84a1e338e3..5e503bb348 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -914,6 +914,30 @@ Lane-wise IEEE `multiplication`. Lane-wise IEEE `squareRoot`. +### Round to integer above (ceiling) +* `f32x4.ceil(a: v128) -> v128` +* `f64x2.ceil(a: v128) -> v128` + +Lane-wise rounding to the nearest integral value not smaller than the input. + +### Round to integer below (floor) +* `f32x4.floor(a: v128) -> v128` +* `f64x2.floor(a: v128) -> v128` + +Lane-wise rounding to the nearest integral value not greater than the input. + +### Round to integer toward zero (truncate to integer) +* `f32x4.trunc(a: v128) -> v128` +* `f64x2.trunc(a: v128) -> v128` + +Lane-wise rounding to the nearest integral value with the magnitude not larger than the input. + +### Round to nearest integer, ties to even +* `f32x4.nearest(a: v128) -> v128` +* `f64x2.nearest(a: v128) -> v128` + +Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one. + ## Conversions ### Integer to floating point * `f32x4.convert_i32x4_s(a: v128) -> v128` From 1167507e4c2a8aee0ce53f93007907356c202d52 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 17 Sep 2020 10:09:05 -0700 Subject: [PATCH 236/378] Define empty type (#345) --- interpreter/syntax/ast.ml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 1a73ec0c10..b44c3ac5cc 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -112,7 +112,7 @@ type loadop = (pack_size * extension) memop type storeop = pack_size memop type simd_loadop = (pack_size * pack_simd) memop -type empty = | +type empty type simd_storeop = empty memop (* Expressions *) From 9576fd0c8b9777f668e7e303cbf18347eb3c5f58 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 17 Sep 2020 11:50:31 -0700 Subject: [PATCH 237/378] Inline bytes expansion into text format (#347) Also formatting of SIMD instructions --- document/core/exec/numerics.rst | 1 - document/core/text/instructions.rst | 19 ++++++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index b69ce66c1d..04783a4424 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -126,7 +126,6 @@ When a number is stored into :ref:`memory `, it is converted into a .. math:: \begin{array}{lll@{\qquad}l} - \bytes_t(i^\ast) &=& (\bytes_t(i))^\ast \\[1ex] \bytes_t(i) &=& \littleendian(\bits_t(i)) \\[1ex] \littleendian(\epsilon) &=& \epsilon \\ \littleendian(d^8~{d'}^\ast~) &=& \littleendian({d'}^\ast)~\ibits_8^{-1}(d^8) \\ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index d9be02f0c9..458da57429 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -478,14 +478,19 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& - \text{v128.const}~~\text{i8x16}~~(n{:}\Ti8)^{16} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i8}(n^{16})) \\ &&|& - \text{v128.const}~~\text{i16x8}~~(n{:}\Ti16)^{8} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i16}(n^8)) \\ &&|& - \text{v128.const}~~\text{i32x4}~~(n{:}\Ti32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i32}(n^4)) \\ &&|& - \text{v128.const}~~\text{i64x2}~~(n{:}\Ti64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i64}(n^2)) \\ &&|& - \text{v128.const}~~\text{f32x4}~~(z{:}\Tf32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f32}(z^4)) \\ &&|& - \text{v128.const}~~\text{f64x2}~~(z{:}\Tf64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f64}(z^2)) \\ &&|& + \text{v128.const}~~\text{i8x16}~~(n{:}\Ti8)^{16} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i8}(n)^{16}) \\ &&|& + \text{v128.const}~~\text{i16x8}~~(n{:}\Ti16)^{8} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i16}(n)^8) \\ &&|& + \text{v128.const}~~\text{i32x4}~~(n{:}\Ti32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i32}(n)^4) \\ &&|& + \text{v128.const}~~\text{i64x2}~~(n{:}\Ti64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i64}(n)^2) \\ &&|& + \text{v128.const}~~\text{f32x4}~~(z{:}\Tf32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f32}(z)^4) \\ &&|& + \text{v128.const}~~\text{f64x2}~~(z{:}\Tf64)^{2} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{f64}(z)^2) + \end{array} + +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.shuffle}~~(laneidx{:}\Tu8)^{16} &\Rightarrow& \I8X16.\SHUFFLE~laneidx^{16} \\ &&|& - \text{i8x16.swizzle} &\Rightarrow& \I8X16.\SWIZZLE\\ + \text{i8x16.swizzle} &\Rightarrow& \I8X16.\SWIZZLE \end{array} .. math:: From da4f63b161e6840b9bb26384840e49401d03fc02 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 17 Sep 2020 12:57:42 -0700 Subject: [PATCH 238/378] Implement floating-point rounding in interpreter (#344) Implement f32x4 and f64x2 ceil, floor, trunc, nearest. They have the same behavior as the f32 and f64 instructions. Also implemented to encoding and decoding. These new instructions were added to simd_f32x4.wast test case, and the test generation script is updated with these new instructions. --- interpreter/binary/decode.ml | 8 + interpreter/binary/encode.ml | 8 + interpreter/exec/eval_numeric.ml | 8 + interpreter/exec/simd.ml | 8 + interpreter/syntax/ast.ml | 4 +- interpreter/syntax/operators.ml | 8 + interpreter/text/arrange.ml | 8 + interpreter/text/lexer.mll | 4 + test/core/simd/meta/README.md | 2 + test/core/simd/meta/gen_tests.py | 4 +- test/core/simd/meta/simd_f32x4_rounding.py | 85 +++++ test/core/simd/meta/simd_f64x2_rounding.py | 29 ++ test/core/simd/meta/simd_float_op.py | 51 ++- test/core/simd/simd_f32x4_rounding.wast | 424 +++++++++++++++++++++ test/core/simd/simd_f64x2_rounding.wast | 424 +++++++++++++++++++++ 15 files changed, 1072 insertions(+), 3 deletions(-) create mode 100644 test/core/simd/meta/simd_f32x4_rounding.py create mode 100644 test/core/simd/meta/simd_f64x2_rounding.py create mode 100644 test/core/simd/simd_f32x4_rounding.wast create mode 100644 test/core/simd/simd_f64x2_rounding.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index b0a66eb36f..2834475b70 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -377,6 +377,14 @@ let simd_prefix s = | 0xcel -> i64x2_add | 0xd1l -> i64x2_sub | 0xd5l -> i64x2_mul + | 0xd8l -> f32x4_ceil + | 0xd9l -> f32x4_floor + | 0xdal -> f32x4_trunc + | 0xdbl -> f32x4_nearest + | 0xdcl -> f64x2_ceil + | 0xddl -> f64x2_floor + | 0xdel -> f64x2_trunc + | 0xdfl -> f64x2_nearest | 0xe0l -> f32x4_abs | 0xe1l -> f32x4_neg | 0xe3l -> f32x4_sqrt diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 1bca433972..389e8b2b5b 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -339,6 +339,14 @@ let encode m = | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l + | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0xd8l + | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0xd9l + | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0xdal + | Unary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0xdbl + | Unary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0xdcl + | Unary (V128 V128Op.(F64x2 Floor)) -> simd_op 0xddl + | Unary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0xdel + | Unary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0xdfl | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l | Unary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 7e631dcf0e..dba292740a 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -148,11 +148,19 @@ struct | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) + | F32x4 Ceil -> to_value (SXX.F32x4.ceil (of_value 1 v)) + | F32x4 Floor -> to_value (SXX.F32x4.floor (of_value 1 v)) + | F32x4 Trunc -> to_value (SXX.F32x4.trunc (of_value 1 v)) + | F32x4 Nearest -> to_value (SXX.F32x4.nearest (of_value 1 v)) | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) + | F64x2 Ceil -> to_value (SXX.F64x2.ceil (of_value 1 v)) + | F64x2 Floor -> to_value (SXX.F64x2.floor (of_value 1 v)) + | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) + | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) | _ -> failwith "TODO v128 unimplemented unop" diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index fa24e9f1d7..bed78710b1 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -109,6 +109,10 @@ sig val abs : t -> t val neg : t -> t val sqrt : t -> t + val ceil : t -> t + val floor : t -> t + val trunc : t -> t + val nearest : t -> t val add : t -> t -> t val sub : t -> t -> t val mul : t -> t -> t @@ -254,6 +258,10 @@ struct let abs = unop Float.abs let neg = unop Float.neg let sqrt = unop Float.sqrt + let ceil = unop Float.ceil + let floor = unop Float.floor + let trunc = unop Float.trunc + let nearest = unop Float.nearest let add = binop Float.add let sub = binop Float.sub let mul = binop Float.mul diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index b44c3ac5cc..52aba76ce8 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -54,7 +54,9 @@ struct | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU - type funop = Abs | Neg | Sqrt | ConvertI32x4S | ConvertI32x4U + type funop = Abs | Neg | Sqrt + | Ceil | Floor | Trunc | Nearest + | ConvertI32x4S | ConvertI32x4U type fbinop = Add | Sub | Mul | Div | Min | Max | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index ffe7c713c5..b518c5307f 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -385,6 +385,10 @@ let f32x4_ge = Binary (V128 V128Op.(F32x4 Ge)) let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) let f32x4_sqrt = Unary (V128 (V128Op.F32x4 V128Op.Sqrt)) +let f32x4_ceil = Unary (V128 (V128Op.(F32x4 Ceil))) +let f32x4_floor = Unary (V128 (V128Op.(F32x4 Floor))) +let f32x4_trunc = Unary (V128 (V128Op.(F32x4 Trunc))) +let f32x4_nearest = Unary (V128 (V128Op.(F32x4 Nearest))) let f32x4_add = Binary (V128 (V128Op.F32x4 V128Op.Add)) let f32x4_sub = Binary (V128 (V128Op.F32x4 V128Op.Sub)) let f32x4_mul = Binary (V128 (V128Op.F32x4 V128Op.Mul)) @@ -405,6 +409,10 @@ let f64x2_gt = Binary (V128 V128Op.(F64x2 Gt)) let f64x2_ge = Binary (V128 V128Op.(F64x2 Ge)) let f64x2_neg = Unary (V128 (V128Op.F64x2 V128Op.Neg)) let f64x2_sqrt = Unary (V128 (V128Op.F64x2 V128Op.Sqrt)) +let f64x2_ceil = Unary (V128 (V128Op.(F64x2 Ceil))) +let f64x2_floor = Unary (V128 (V128Op.(F64x2 Floor))) +let f64x2_trunc = Unary (V128 (V128Op.(F64x2 Trunc))) +let f64x2_nearest = Unary (V128 (V128Op.(F64x2 Nearest))) let f64x2_add = Binary (V128 (V128Op.F64x2 V128Op.Add)) let f64x2_sub = Binary (V128 (V128Op.F64x2 V128Op.Sub)) let f64x2_mul = Binary (V128 (V128Op.F64x2 V128Op.Mul)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 336e99a426..f75d0ed4c4 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -219,6 +219,14 @@ struct | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I64x2 Neg -> "i64x2.neg" + | F32x4 Ceil -> "f32x4.ceil" + | F32x4 Floor -> "f32x4.floor" + | F32x4 Trunc -> "f32x4.trunc" + | F32x4 Nearest -> "f32x4.nearest" + | F64x2 Ceil -> "f64x2.ceil" + | F64x2 Floor -> "f64x2.floor" + | F64x2 Trunc -> "f64x2.trunc" + | F64x2 Nearest -> "f64x2.nearest" | F32x4 Abs -> "f32x4.abs" | F32x4 Neg -> "f32x4.neg" | F32x4 Sqrt -> "f32x4.sqrt" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b6977a6b2b..c027e50ebd 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -490,6 +490,10 @@ rule token = parse | (simd_shape as s)".neg" { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } + | (simd_float_shape as s)".ceil" { UNARY (simd_float_op s f32x4_ceil f64x2_ceil) } + | (simd_float_shape as s)".floor" { UNARY (simd_float_op s f32x4_floor f64x2_floor) } + | (simd_float_shape as s)".trunc" { UNARY (simd_float_op s f32x4_trunc f64x2_trunc) } + | (simd_float_shape as s)".nearest" { UNARY (simd_float_op s f32x4_nearest f64x2_nearest) } | (simd_shape as s)".add" { BINARY (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } | (simd_shape as s)".sub" diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index 032b4e4e5f..a10b58eea6 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -22,6 +22,8 @@ Currently it only support following simd test files generation. - 'simd_i16x8_sat_arith.wast' - 'simd_f32x4.wast' - 'simd_f64x2.wast' +- 'simd_f32x4_rounding' +- 'simd_f64x2_rounding' Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 86d0cbceaa..6eabaee80b 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -26,6 +26,8 @@ 'simd_f32x4', 'simd_f64x2', 'simd_int_arith2', + 'simd_f32x4_rounding', + 'simd_f64x2_rounding', ) @@ -61,4 +63,4 @@ def main(): if __name__ == '__main__': main() - print('Done.') \ No newline at end of file + print('Done.') diff --git a/test/core/simd/meta/simd_f32x4_rounding.py b/test/core/simd/meta/simd_f32x4_rounding.py new file mode 100644 index 0000000000..2512326d6d --- /dev/null +++ b/test/core/simd/meta/simd_f32x4_rounding.py @@ -0,0 +1,85 @@ +#!/usr/bin/env python3 + +""" +Generate f32x4 [ceil, floor, trunc, nearest] cases. +""" + +from simd_f32x4_arith import Simdf32x4ArithmeticCase +from simd_float_op import FloatingPointRoundingOp +from simd import SIMD +from test_assert import AssertReturn + + +class Simdf32x4RoundingCase(Simdf32x4ArithmeticCase): + UNARY_OPS = ('ceil', 'floor', 'trunc', 'nearest') + BINARY_OPS = () + floatOp = FloatingPointRoundingOp() + + def get_combine_cases(self): + return '' + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests. + """ + cases = [] + unary_test_data = [] + + for op in self.UNARY_OPS: + op_name = self.full_op_name(op) + for operand in self.FLOAT_NUMBERS: + result = self.floatOp.unary_op(op, operand) + if 'nan' in result: + unary_test_data.append([op_name, operand, 'nan:canonical']) + else: + unary_test_data.append([op_name, operand, result]) + + for operand in self.LITERAL_NUMBERS: + result = self.floatOp.unary_op(op, operand, hex_form=False) + unary_test_data.append([op_name, operand, result]) + + for operand in self.NAN_NUMBERS: + if 'nan:' in operand: + unary_test_data.append([op_name, operand, 'nan:arithmetic']) + else: + unary_test_data.append([op_name, operand, 'nan:canonical']) + + for case in unary_test_data: + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(elem, self.LANE_TYPE) for elem in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) + + self.get_unknown_operator_case(cases) + + return '\n'.join(cases) + + def get_unknown_operator_case(self, cases): + """Unknown operator cases. + """ + + tpl_assert = "(assert_malformed (module quote \"(memory 1) (func (result v128) " \ + "({lane_type}.{op} {value}))\") \"unknown operator\")" + + unknown_op_cases = ['\n\n;; Unknown operators\n'] + cases.extend(unknown_op_cases) + + for lane_type in ['i8x16', 'i16x8', 'i32x4', 'i64x2']: + for op in self.UNARY_OPS: + cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=self.v128_const('i32x4', '0'))) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}_rounding.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + txt_test_case = self.get_all_cases() + txt_test_case = txt_test_case.replace( + self.LANE_TYPE + ' arithmetic', + self.LANE_TYPE + ' [ceil, floor, trunc, nearest]') + fp.write(txt_test_case) + + +def gen_test_cases(): + simd_f32x4_case = Simdf32x4RoundingCase() + simd_f32x4_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_f64x2_rounding.py b/test/core/simd/meta/simd_f64x2_rounding.py new file mode 100644 index 0000000000..a0a389e2f2 --- /dev/null +++ b/test/core/simd/meta/simd_f64x2_rounding.py @@ -0,0 +1,29 @@ +#!/usr/bin/env python3 + +""" +Generate f64x2 [ceil, floor, trunc, nearest] cases. +""" + +from simd_f32x4_rounding import Simdf32x4RoundingCase +from simd_f64x2 import Simdf64x2Case +from simd_f64x2_arith import Simdf64x2ArithmeticCase +from simd_float_op import FloatingPointRoundingOp +from simd import SIMD +from test_assert import AssertReturn + + +class Simdf64x2RoundingCase(Simdf32x4RoundingCase): + + LANE_TYPE = 'f64x2' + FLOAT_NUMBERS = Simdf64x2ArithmeticCase.FLOAT_NUMBERS + LITERAL_NUMBERS = Simdf64x2ArithmeticCase.LITERAL_NUMBERS + NAN_NUMBERS = Simdf64x2ArithmeticCase.NAN_NUMBERS + + +def gen_test_cases(): + simd_f64x2_case = Simdf64x2RoundingCase() + simd_f64x2_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index 0546ce54bc..d458ed34c9 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -252,4 +252,53 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: elif op == 'ge': return '-1' if f1 >= f2 else '0' else: - raise Exception('Unknown binary operation') \ No newline at end of file + raise Exception('Unknown binary operation') + + +class FloatingPointRoundingOp(FloatingPointOp): + def unary_op(self, op: str, p1: str, hex_form=True) -> str: + """Unnary operation on p1 with the operation specified by op + + :param op: ceil, floor, trunc, nearest + :param p1: float number in hex + :return: + """ + if '0x' in p1: + f1 = float.fromhex(p1) + else: + f1 = float(p1) + + if 'nan' in p1: + return 'nan' + + if 'inf' in p1: + return p1 + + # The rounding ops don't treat -0.0 correctly, e.g.: + # math.ceil(-0.4) returns +0.0, so copy the sign. + elif op == 'ceil': + r = math.copysign(math.ceil(f1), f1) + if hex_form: + return r.hex() + else: + return str(r) + elif op == 'floor': + r = math.copysign(math.floor(f1), f1) + if hex_form: + return r.hex() + else: + return str(r) + elif op == 'trunc': + r = math.copysign(math.trunc(f1), f1) + if hex_form: + return r.hex() + else: + return str(r) + elif op == 'nearest': + r = math.copysign(round(f1), f1) + if hex_form: + return r.hex() + else: + return str(r) + else: + raise Exception('Unknown binary operation') diff --git a/test/core/simd/simd_f32x4_rounding.wast b/test/core/simd/simd_f32x4_rounding.wast new file mode 100644 index 0000000000..e59f99a77b --- /dev/null +++ b/test/core/simd/simd_f32x4_rounding.wast @@ -0,0 +1,424 @@ +;; Tests for f32x4 [ceil, floor, trunc, nearest] operations on major boundary values and all special values. + + +(module + (func (export "f32x4.ceil") (param v128) (result v128) (f32x4.ceil (local.get 0))) + (func (export "f32x4.floor") (param v128) (result v128) (f32x4.floor (local.get 0))) + (func (export "f32x4.trunc") (param v128) (result v128) (f32x4.trunc (local.get 0))) + (func (export "f32x4.nearest") (param v128) (result v128) (f32x4.nearest (local.get 0))) +) + +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.c000000000000p+2 0x1.c000000000000p+2 0x1.c000000000000p+2 0x1.c000000000000p+2)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 123456790.0 123456790.0 123456790.0 123456790.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 1.0 1.0 1.0 1.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 156374987062.0 156374987062.0 156374987062.0 156374987062.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 156374987062.0 156374987062.0 156374987062.0 156374987062.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 156374987062.0 156374987062.0 156374987062.0 156374987062.0)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.ceil" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.c000000000000p+2 -0x1.c000000000000p+2 -0x1.c000000000000p+2 -0x1.c000000000000p+2)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.floor" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.trunc" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 1.23456789e+27 1.23456789e+27 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 123456789.0 123456789.0 123456789.0 123456789.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0.0 0.0 0.0 0.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16 8.19855292164869e+16)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22 4.298402914185348e+22)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 156374987061.0 156374987061.0 156374987061.0 156374987061.0)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical nan:canonical nan:canonical)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f32x4.nearest" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic nan:arithmetic nan:arithmetic)) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f32x4.ceil (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.floor (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.trunc (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.nearest (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $f32x4.ceil-arg-empty (result v128) + (f32x4.ceil) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.floor-arg-empty (result v128) + (f32x4.floor) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.trunc-arg-empty (result v128) + (f32x4.trunc) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.nearest-arg-empty (result v128) + (f32x4.nearest) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_f64x2_rounding.wast b/test/core/simd/simd_f64x2_rounding.wast new file mode 100644 index 0000000000..f82c6d2941 --- /dev/null +++ b/test/core/simd/simd_f64x2_rounding.wast @@ -0,0 +1,424 @@ +;; Tests for f64x2 [ceil, floor, trunc, nearest] operations on major boundary values and all special values. + + +(module + (func (export "f64x2.ceil") (param v128) (result v128) (f64x2.ceil (local.get 0))) + (func (export "f64x2.floor") (param v128) (result v128) (f64x2.floor (local.get 0))) + (func (export "f64x2.trunc") (param v128) (result v128) (f64x2.trunc (local.get 0))) + (func (export "f64x2.nearest") (param v128) (result v128) (f64x2.nearest (local.get 0))) +) + +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.c000000000000p+2 0x1.c000000000000p+2)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 123456790.0 123456790.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.ceil" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.c000000000000p+2 -0x1.c000000000000p+2)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.floor" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.trunc" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.8000000000000p+2 0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.8000000000000p+2 -0x1.8000000000000p+2)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 1.23456789e+27 1.23456789e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 123456789.0 123456789.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 1.2345678901234569e+27 1.2345678901234569e+27)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 1.3754889325393114e+24 1.3754889325393114e+24)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 7.211523414631705e+29 7.211523414631705e+29)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 2.6235369349275807e+18 2.6235369349275807e+18)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.nearest" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.ceil (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.floor (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.trunc (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.nearest (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f64x2.ceil (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.floor (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.trunc (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.nearest (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $f64x2.ceil-arg-empty (result v128) + (f64x2.ceil) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.floor-arg-empty (result v128) + (f64x2.floor) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.trunc-arg-empty (result v128) + (f64x2.trunc) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.nearest-arg-empty (result v128) + (f64x2.nearest) + ) + ) + "type mismatch" +) + From 34a5da51d791d733ae565ac6f30d76533311db64 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 21 Sep 2020 16:59:01 -0700 Subject: [PATCH 239/378] Create Blaneidx production, and encode lane index as u8 (#346) --- document/core/binary/instructions.rst | 39 ++++++++++++++------------- document/core/syntax/instructions.rst | 2 +- document/core/util/macros.def | 3 +++ 3 files changed, 25 insertions(+), 19 deletions(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 5f93c16b5f..f360273992 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -411,7 +411,7 @@ SIMD Instructions ~~~~~~~~~~~~~~~~~~~~ All variants of :ref:`SIMD instructions ` are represented by separate byte codes. -The all have a one byte prefix, whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer `. +They all have a one byte prefix, whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer `. SIMD loads and stores are followed by the encoding of their |memarg| immediate. @@ -442,34 +442,37 @@ The |VCONST| instruction is followed by 16 immediate bytes, which are converted \end{array} .. _binary-vternop: +.. _binary-laneidx: -The |SHUFFLE| instruction is also followed by 16 immediate bytes: +The |SHUFFLE| instruction is also followed by the encoding of 16 |laneidx| immediates. .. math:: \begin{array}{llclll} + \production{lane index} & \Blaneidx &::=& + l{:}\Bu8 &\Rightarrow& l \\ \production{instruction} & \Binstr &::=& \dots \\&&|& - \hex{FD}~~13{:}\Bu32~~(b{:}\Bbyte)^{16} &\Rightarrow& \I8X16.\SHUFFLE~b^{16} \\ + \hex{FD}~~13{:}\Bu32~~(l{:}\Blaneidx)^{16} &\Rightarrow& \I8X16.\SHUFFLE~l^{16} \\ \end{array} -|EXTRACTLANE| and |REPLACELANE| instructions are followed by 1 immediate byte. +|EXTRACTLANE| and |REPLACELANE| instructions are followed by the encoding of a |laneidx| immediate. .. math:: \begin{array}{llclll} \production{instruction} & \Binstr &::=& \dots \\&&|& - \hex{FD}~~21{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_s}~b \\ &&|& - \hex{FD}~~22{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_u}~b \\ &&|& - \hex{FD}~~23{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I8X16.\REPLACELANE~b \\ &&|& - \hex{FD}~~24{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_s}~b \\ &&|& - \hex{FD}~~25{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_u}~b \\ &&|& - \hex{FD}~~26{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I16X8.\REPLACELANE~b \\ &&|& - \hex{FD}~~27{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I32X4.\EXTRACTLANE~b \\ &&|& - \hex{FD}~~28{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I32X4.\REPLACELANE~b \\ &&|& - \hex{FD}~~29{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I64X2.\EXTRACTLANE~b \\ &&|& - \hex{FD}~~30{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \I64X2.\REPLACELANE~b \\ &&|& - \hex{FD}~~31{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F32X4.\EXTRACTLANE~b \\ &&|& - \hex{FD}~~32{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F32X4.\REPLACELANE~b \\ &&|& - \hex{FD}~~33{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F64X2.\EXTRACTLANE~b \\ &&|& - \hex{FD}~~34{:}\Bu32~~b{:}\Bbyte &\Rightarrow& \F64X2.\REPLACELANE~b \\ + \hex{FD}~~21{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_s}~l \\ &&|& + \hex{FD}~~22{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_u}~l \\ &&|& + \hex{FD}~~23{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I8X16.\REPLACELANE~l \\ &&|& + \hex{FD}~~24{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_s}~l \\ &&|& + \hex{FD}~~25{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I16X8.\EXTRACTLANE\K{\_u}~l \\ &&|& + \hex{FD}~~26{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I16X8.\REPLACELANE~l \\ &&|& + \hex{FD}~~27{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I32X4.\EXTRACTLANE~l \\ &&|& + \hex{FD}~~28{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I32X4.\REPLACELANE~l \\ &&|& + \hex{FD}~~29{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I64X2.\EXTRACTLANE~l \\ &&|& + \hex{FD}~~30{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \I64X2.\REPLACELANE~l \\ &&|& + \hex{FD}~~31{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \F32X4.\EXTRACTLANE~l \\ &&|& + \hex{FD}~~32{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \F32X4.\REPLACELANE~l \\ &&|& + \hex{FD}~~33{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \F64X2.\EXTRACTLANE~l \\ &&|& + \hex{FD}~~34{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \F64X2.\REPLACELANE~l \\ \end{array} All other SIMD instructions are plain opcodes without any immediates. diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index c1e459bde9..d91254e593 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -202,7 +202,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{f32x4} ~|~ \K{f64x2} \\ \production{vshape} & \X{vxx} &::=& \X{ixx} ~|~ \X{fxx} \\ - \production{lane index} & \laneidx &::=& \byte \\ + \production{lane index} & \laneidx &::=& \u8 \\ \production{instruction} & \instr &::=& \dots \\&&|& \K{v128.}\CONST~\xref{syntax/values}{syntax-simd}{\vX{\X{nnn}}} \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index de9071bd6d..e1c6472290 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -584,6 +584,9 @@ .. |Binstr| mathdef:: \xref{binary/instructions}{binary-instr}{\B{instr}} .. |Bexpr| mathdef:: \xref{binary/instructions}{binary-expr}{\B{expr}} +.. SIMD + +.. |Blaneidx| mathdef:: \xref{binary/instructions}{binary-laneidx}{\B{laneidx}} .. Text Format From bbb88f2a6b5eb1909495062c1a1a3c07b843ecc2 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 21 Sep 2020 20:05:57 -0700 Subject: [PATCH 240/378] Add pmin/pmax to NewOpcodes.md (#354) --- proposals/simd/NewOpcodes.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 8cac717f34..e9aa7efb56 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -119,8 +119,8 @@ | f32x4.div | 0xe7 | f64x2.div | 0xf3 | | f32x4.min | 0xe8 | f64x2.min | 0xf4 | | f32x4.max | 0xe9 | f64x2.max | 0xf5 | -| ---- pmin ---- | 0xea | ---- pmin ---- | 0xf6 | -| ---- pmax ---- | 0xeb | ---- pmax ---- | 0xf7 | +| f32x4.pmin | 0xea | f64x2.pmin | 0xf6 | +| f32x4.pmax | 0xeb | f64x2.pmax | 0xf7 | | Conversion Op | opcode | | ----------------------- | ------ | From 65d35048ab38780181ebfba2ded88f104980468a Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 22 Sep 2020 09:03:30 -0700 Subject: [PATCH 241/378] Update implementation status (#355) Add pmin/pmax and mark pmin/pmax and floating-point rounding instructions as implemented on both V8 and SM (based on this https://github.com/mozilla/gecko-dev/commit/807022887f155153d398f9f6f94ef59e214489a2). --- proposals/simd/ImplementationStatus.md | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 00afc614d7..e50409829b 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -165,10 +165,12 @@ | `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ceil` | | | | | | -| `f32x4.floor` | | | | | | -| `f32x4.trunc` | | | | | | -| `f32x4.nearest` | | | | | | +| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -178,10 +180,12 @@ | `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ceil` | | | | | | -| `f64x2.floor` | | | | | | -| `f64x2.trunc` | | | | | | -| `f64x2.nearest` | | | | | | +| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -189,7 +193,7 @@ [1] Tip of tree LLVM as of May 20, 2020 -[2] V8 8.6.136. Requires flag `--experimental-wasm-simd` +[2] V8 8.7.153. Requires flag `--experimental-wasm-simd` [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` From e0fff326fc131e277caeefa57904fa26505fe107 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 22 Sep 2020 09:04:14 -0700 Subject: [PATCH 242/378] Add SIMD pmin/pmax and floating point round instructions to syntax (#353) --- document/core/syntax/instructions.rst | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index d91254e593..446be0f47a 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -298,14 +298,20 @@ SIMD instructions provide basic operations over :ref:`values ` of \production{SIMD floating-point unary operator} & \vfunop &::=& \K{abs} ~|~ \K{neg} ~|~ - \K{sqrt} \\ + \K{sqrt} ~|~ + \K{ceil} ~|~ + \K{floor} ~|~ + \K{trunc} ~|~ + \K{nearest} \\ \production{SIMD floating-point binary operator} & \vfbinop &::=& \K{add} ~|~ \K{sub} ~|~ \K{mul} ~|~ \K{div} ~|~ \K{min} ~|~ - \K{max} \\ + \K{max} ~|~ + \K{pmin} ~|~ + \K{pmax} \\ \end{array} .. _syntax-simd-shape: From f49eb1751128524be7312bc7008d3d7132b2a5f0 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 22 Sep 2020 09:05:55 -0700 Subject: [PATCH 243/378] Implement pmin/pmax in interpreter (#349) Implement f32x4 pmin, pmax, and f64x2 pmin, pmax. Encoding/decoding is included. Added new test generation scripts and generated tests. --- interpreter/binary/decode.ml | 4 + interpreter/binary/encode.ml | 4 + interpreter/exec/eval_numeric.ml | 4 + interpreter/exec/simd.ml | 4 + interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 4 + interpreter/text/arrange.ml | 4 + interpreter/text/lexer.mll | 2 + test/core/simd/meta/README.md | 2 + test/core/simd/meta/gen_tests.py | 2 + test/core/simd/meta/simd_f32x4.py | 2 +- test/core/simd/meta/simd_f32x4_pmin_pmax.py | 83 + test/core/simd/meta/simd_f64x2_pmin_pmax.py | 27 + test/core/simd/meta/simd_float_op.py | 17 +- test/core/simd/simd_f32x4_pmin_pmax.wast | 11676 ++++++++++++++++++ test/core/simd/simd_f64x2_pmin_pmax.wast | 11676 ++++++++++++++++++ 16 files changed, 23510 insertions(+), 3 deletions(-) create mode 100644 test/core/simd/meta/simd_f32x4_pmin_pmax.py create mode 100644 test/core/simd/meta/simd_f64x2_pmin_pmax.py create mode 100644 test/core/simd/simd_f32x4_pmin_pmax.wast create mode 100644 test/core/simd/simd_f64x2_pmin_pmax.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 2834475b70..ea0baf815c 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -394,6 +394,8 @@ let simd_prefix s = | 0xe7l -> f32x4_div | 0xe8l -> f32x4_min | 0xe9l -> f32x4_max + | 0xeal -> f32x4_pmin + | 0xebl -> f32x4_pmax | 0xecl -> f64x2_abs | 0xedl -> f64x2_neg | 0xefl -> f64x2_sqrt @@ -403,6 +405,8 @@ let simd_prefix s = | 0xf3l -> f64x2_div | 0xf4l -> f64x2_min | 0xf5l -> f64x2_max + | 0xf6l -> f64x2_pmin + | 0xf7l -> f64x2_pmax | 0xf8l -> i32x4_trunc_sat_f32x4_s | 0xf9l -> i32x4_trunc_sat_f32x4_u | 0xfal -> f32x4_convert_i32x4_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 389e8b2b5b..3139116b76 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -488,6 +488,8 @@ let encode m = | Binary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l | Binary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l | Binary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l + | Binary (V128 V128Op.(F32x4 Pmin)) -> simd_op 0xeal + | Binary (V128 V128Op.(F32x4 Pmax)) -> simd_op 0xebl | Binary (V128 V128Op.(F64x2 Eq)) -> simd_op 0x47l | Binary (V128 V128Op.(F64x2 Ne)) -> simd_op 0x48l | Binary (V128 V128Op.(F64x2 Lt)) -> simd_op 0x49l @@ -500,6 +502,8 @@ let encode m = | Binary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l | Binary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l | Binary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l + | Binary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l + | Binary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l | Binary (V128 V128Op.(V128 And)) -> simd_op 0x4el | Binary (V128 V128Op.(V128 AndNot)) -> simd_op 0x4fl | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index dba292740a..358d60f0fd 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -247,6 +247,8 @@ struct | F32x4 Div -> SXX.F32x4.div | F32x4 Min -> SXX.F32x4.min | F32x4 Max -> SXX.F32x4.max + | F32x4 Pmin -> SXX.F32x4.pmin + | F32x4 Pmax -> SXX.F32x4.pmax | F64x2 Eq -> SXX.F64x2.eq | F64x2 Ne -> SXX.F64x2.ne | F64x2 Lt -> SXX.F64x2.lt @@ -259,6 +261,8 @@ struct | F64x2 Div -> SXX.F64x2.div | F64x2 Min -> SXX.F64x2.min | F64x2 Max -> SXX.F64x2.max + | F64x2 Pmin -> SXX.F64x2.pmin + | F64x2 Pmax -> SXX.F64x2.pmax | V128 And -> SXX.V128.and_ | V128 Or -> SXX.V128.or_ | V128 Xor -> SXX.V128.xor diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index bed78710b1..f2a7069442 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -119,6 +119,8 @@ sig val div : t -> t -> t val min : t -> t -> t val max : t -> t -> t + val pmin : t -> t -> t + val pmax : t -> t -> t end module type Vec = @@ -268,6 +270,8 @@ struct let div = binop Float.div let min = binop Float.min let max = binop Float.max + let pmin = binop (fun x y -> if Float.lt y x then y else x) + let pmax = binop (fun x y -> if Float.lt x y then y else x) end module MakeInt (Int : Int.S) (Convert : sig diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 52aba76ce8..0eb05f00f3 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -57,7 +57,7 @@ struct type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest | ConvertI32x4S | ConvertI32x4U - type fbinop = Add | Sub | Mul | Div | Min | Max + type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not type vbinop = And | Or | Xor | AndNot diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index b518c5307f..b94166bc55 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -397,6 +397,8 @@ let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) let f32x4_convert_i32x4_s = Unary (V128 V128Op.(F32x4 ConvertI32x4S)) let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) +let f32x4_pmin = Binary (V128 (V128Op.F32x4 V128Op.Pmin)) +let f32x4_pmax = Binary (V128 (V128Op.F32x4 V128Op.Pmax)) let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) @@ -420,3 +422,5 @@ let f64x2_div = Binary (V128 (V128Op.F64x2 V128Op.Div)) let f64x2_min = Binary (V128 (V128Op.F64x2 V128Op.Min)) let f64x2_max = Binary (V128 (V128Op.F64x2 V128Op.Max)) let f64x2_abs = Unary (V128 (V128Op.F64x2 V128Op.Abs)) +let f64x2_pmin = Binary (V128 (V128Op.F64x2 V128Op.Pmin)) +let f64x2_pmax = Binary (V128 (V128Op.F64x2 V128Op.Pmax)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index f75d0ed4c4..012de7440a 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -320,6 +320,8 @@ struct | F32x4 Div -> "f32x4.div" | F32x4 Min -> "f32x4.min" | F32x4 Max -> "f32x4.max" + | F32x4 Pmin -> "f32x4.pmin" + | F32x4 Pmax -> "f32x4.pmax" | F64x2 Eq -> "f64x2.eq" | F64x2 Ne -> "f64x2.ne" | F64x2 Lt -> "f64x2.lt" @@ -332,6 +334,8 @@ struct | F64x2 Div -> "f64x2.div" | F64x2 Min -> "f64x2.min" | F64x2 Max -> "f64x2.max" + | F64x2 Pmin -> "f64x2.pmin" + | F64x2 Pmax -> "f64x2.pmax" | V128 And -> "v128.and" | V128 AndNot -> "v128.andnot" | V128 Or -> "v128.or" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index c027e50ebd..ae2cb2c984 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -494,6 +494,8 @@ rule token = parse | (simd_float_shape as s)".floor" { UNARY (simd_float_op s f32x4_floor f64x2_floor) } | (simd_float_shape as s)".trunc" { UNARY (simd_float_op s f32x4_trunc f64x2_trunc) } | (simd_float_shape as s)".nearest" { UNARY (simd_float_op s f32x4_nearest f64x2_nearest) } + | (simd_float_shape as s)".pmin" { BINARY (simd_float_op s f32x4_pmin f64x2_pmin) } + | (simd_float_shape as s)".pmax" { BINARY (simd_float_op s f32x4_pmax f64x2_pmax) } | (simd_shape as s)".add" { BINARY (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } | (simd_shape as s)".sub" diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index a10b58eea6..d1ade7c721 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -24,6 +24,8 @@ Currently it only support following simd test files generation. - 'simd_f64x2.wast' - 'simd_f32x4_rounding' - 'simd_f64x2_rounding' +- 'simd_f32x4_pmin_pmax' +- 'simd_f64x2_pmin_pmax' Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 6eabaee80b..6a7cdde488 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -28,6 +28,8 @@ 'simd_int_arith2', 'simd_f32x4_rounding', 'simd_f64x2_rounding', + 'simd_f32x4_pmin_pmax', + 'simd_f64x2_pmin_pmax', ) diff --git a/test/core/simd/meta/simd_f32x4.py b/test/core/simd/meta/simd_f32x4.py index 6e503c0617..b9b6b0f9f8 100644 --- a/test/core/simd/meta/simd_f32x4.py +++ b/test/core/simd/meta/simd_f32x4.py @@ -373,4 +373,4 @@ def gen_test_cases(): if __name__ == '__main__': - gen_test_cases() \ No newline at end of file + gen_test_cases() diff --git a/test/core/simd/meta/simd_f32x4_pmin_pmax.py b/test/core/simd/meta/simd_f32x4_pmin_pmax.py new file mode 100644 index 0000000000..42fa6229b7 --- /dev/null +++ b/test/core/simd/meta/simd_f32x4_pmin_pmax.py @@ -0,0 +1,83 @@ +#!/usr/bin/env python3 + +""" +Generate f32x4 [pmin, pmax] cases. +""" + +from simd_f32x4_arith import Simdf32x4ArithmeticCase +from simd_float_op import FloatingPointSimpleOp +from simd import SIMD +from test_assert import AssertReturn + + +class Simdf32x4PminPmaxCase(Simdf32x4ArithmeticCase): + UNARY_OPS = () + BINARY_OPS = ('pmin', 'pmax',) + floatOp = FloatingPointSimpleOp() + + def get_combine_cases(self): + return '' + + def get_normal_case(self): + """Normal test cases from WebAssembly core tests. + """ + cases = [] + binary_test_data = [] + unary_test_data = [] + + for op in self.BINARY_OPS: + op_name = self.full_op_name(op) + for operand1 in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: + for operand2 in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: + result = self.floatOp.binary_op(op, operand1, operand2) + binary_test_data.append([op_name, operand1, operand2, result]) + + # pmin and pmax always return operand1 if either operand is a nan + for operand1 in self.NAN_NUMBERS: + for operand2 in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS + self.NAN_NUMBERS: + binary_test_data.append([op_name, operand1, operand2, operand1]) + for operand2 in self.NAN_NUMBERS: + for operand1 in self.FLOAT_NUMBERS + self.LITERAL_NUMBERS: + binary_test_data.append([op_name, operand1, operand2, operand1]) + + for case in binary_test_data: + cases.append(str(AssertReturn(case[0], + [SIMD.v128_const(c, self.LANE_TYPE) for c in case[1:-1]], + SIMD.v128_const(case[-1], self.LANE_TYPE)))) + + self.get_unknown_operator_case(cases) + + return '\n'.join(cases) + + def get_unknown_operator_case(self, cases): + """Unknown operator cases. + """ + + tpl_assert = "(assert_malformed (module quote \"(memory 1) (func (result v128) " \ + "({lane_type}.{op} {value}))\") \"unknown operator\")" + + unknown_op_cases = ['\n\n;; Unknown operators\n'] + cases.extend(unknown_op_cases) + + for lane_type in ['i8x16', 'i16x8', 'i32x4', 'i64x2']: + + for op in self.BINARY_OPS: + cases.append(tpl_assert.format(lane_type=lane_type, op=op, value=' '.join([self.v128_const('i32x4', '0')]*2))) + + def gen_test_cases(self): + wast_filename = '../simd_{lane_type}_pmin_pmax.wast'.format(lane_type=self.LANE_TYPE) + with open(wast_filename, 'w') as fp: + txt_test_case = self.get_all_cases() + txt_test_case = txt_test_case.replace( + self.LANE_TYPE + ' arithmetic', + self.LANE_TYPE + ' [pmin, pmax]') + fp.write(txt_test_case) + + +def gen_test_cases(): + simd_f32x4_pmin_pmax_case = Simdf32x4PminPmaxCase() + simd_f32x4_pmin_pmax_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_f64x2_pmin_pmax.py b/test/core/simd/meta/simd_f64x2_pmin_pmax.py new file mode 100644 index 0000000000..c97badd487 --- /dev/null +++ b/test/core/simd/meta/simd_f64x2_pmin_pmax.py @@ -0,0 +1,27 @@ +#!/usr/bin/env python3 + +""" +Generate f64x2 [pmin, pmax] cases. +""" + +from simd_f32x4_pmin_pmax import Simdf32x4PminPmaxCase +from simd_f64x2_arith import Simdf64x2ArithmeticCase +from simd_float_op import FloatingPointSimpleOp +from simd import SIMD +from test_assert import AssertReturn + + +class Simdf64x2PminPmaxCase(Simdf32x4PminPmaxCase): + LANE_TYPE = 'f64x2' + FLOAT_NUMBERS = Simdf64x2ArithmeticCase.FLOAT_NUMBERS + LITERAL_NUMBERS = Simdf64x2ArithmeticCase.LITERAL_NUMBERS + NAN_NUMBERS = Simdf64x2ArithmeticCase.NAN_NUMBERS + + +def gen_test_cases(): + simd_f64x2_pmin_pmax_case = Simdf64x2PminPmaxCase() + simd_f64x2_pmin_pmax_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index d458ed34c9..8d9bb1fa33 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -135,7 +135,7 @@ def float_neg(self, p): class FloatingPointSimpleOp(FloatingPointOp): - """Common simple ops for both f32x4 and f64x2: abs, min, max""" + """Common simple ops for both f32x4 and f64x2: abs, min, max, pmin, pmax""" def binary_op(self, op: str, p1: str, p2: str, hex_form=True) -> str: """Binary operation on p1 and p2 with the operation specified by op @@ -164,6 +164,21 @@ def binary_op(self, op: str, p1: str, p2: str, hex_form=True) -> str: if '-nan' in [p1, p2]: return '-nan' + # pmin and pmax semantics follow C++'s std::min std::max + if op == 'pmin': + r = f2 if f2 < f1 else f1 + if hex_form: + return r.hex() + else: + return str(r) + + if op == 'pmax': + r = f2 if f1 < f2 else f1 + if hex_form: + return r.hex() + else: + return str(r) + if op == 'min': if '-0x0p+0' in [p1, p2] and '0x0p+0' in [p1, p2]: return '-0x0p+0' diff --git a/test/core/simd/simd_f32x4_pmin_pmax.wast b/test/core/simd/simd_f32x4_pmin_pmax.wast new file mode 100644 index 0000000000..b0f47b380c --- /dev/null +++ b/test/core/simd/simd_f32x4_pmin_pmax.wast @@ -0,0 +1,11676 @@ +;; Tests for f32x4 [pmin, pmax] operations on major boundary values and all special values. + + +(module + (func (export "f32x4.pmin") (param v128 v128) (result v128) (f32x4.pmin (local.get 0) (local.get 1))) + (func (export "f32x4.pmax") (param v128 v128) (result v128) (f32x4.pmax (local.get 0) (local.get 1))) +) + +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmin" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x0.0p+0 0x0.0p+0 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149 0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149 -0x1.0000000000000p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126 0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126 -0x1.0000000000000p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2 -0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127 -0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2 0x1.921fb60000000p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127 0x1.fffffe0000000p+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56 0x1.23456789abcdfp+56)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75 0x1.23456789abcdfp+75)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37 0x1.23456789abcdfp+37)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan nan nan nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan nan nan nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan -nan -nan -nan) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -nan -nan -nan -nan)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 inf inf inf inf)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 nan nan nan nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0p+0 0x0p+0 0x0p+0 0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x0p+0 -0x0p+0 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 inf inf inf inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 inf inf inf inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 -inf -inf -inf -inf) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 -inf -inf -inf -inf)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789 0123456789 0123456789 0123456789) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789 0123456789 0123456789 0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e019 0123456789e019 0123456789e019 0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e+019 0123456789e+019 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789e-019 0123456789e-019 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789. 0123456789. 0123456789. 0123456789.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e019 0123456789.e019 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e+019 0123456789.e+019 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.e-019 0123456789.e-019 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF 0x0123456789ABCDEF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019 0x0123456789ABCDEFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019 0x0123456789ABCDEFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019 0x0123456789ABCDEFp-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF. 0x0123456789ABCDEF.)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019 0x0123456789ABCDEF.p019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019 0x0123456789ABCDEF.p+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019 0x0123456789ABCDEF.p-019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF 0x0123456789ABCDEF.019aF)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019 0x0123456789ABCDEF.019aFp019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019 0x0123456789ABCDEF.019aFp+019)) +(assert_return (invoke "f32x4.pmax" (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019) + (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f32x4 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019 0x0123456789ABCDEF.019aFp-019)) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f32x4.pmin (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f32x4.pmax (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $f32x4.pmin-1st-arg-empty (result v128) + (f32x4.pmin (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.pmin-arg-empty (result v128) + (f32x4.pmin) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.pmax-1st-arg-empty (result v128) + (f32x4.pmax (v128.const f32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f32x4.pmax-arg-empty (result v128) + (f32x4.pmax) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_f64x2_pmin_pmax.wast b/test/core/simd/simd_f64x2_pmin_pmax.wast new file mode 100644 index 0000000000..e8167b0e54 --- /dev/null +++ b/test/core/simd/simd_f64x2_pmin_pmax.wast @@ -0,0 +1,11676 @@ +;; Tests for f64x2 [pmin, pmax] operations on major boundary values and all special values. + + +(module + (func (export "f64x2.pmin") (param v128 v128) (result v128) (f64x2.pmin (local.get 0) (local.get 1))) + (func (export "f64x2.pmax") (param v128 v128) (result v128) (f64x2.pmax (local.get 0) (local.get 1))) +) + +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmin" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x0.0p+0 0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -0x0.0p+0 -0x0.0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.0000000000000p-1022 0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -0x1.0000000000000p-1022 -0x1.0000000000000p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -0x1.0000000000000p-1 -0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -0x1.0000000000000p+0 -0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd62b4311p-37 0x1.b25ffd62b4311p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.0000000000000p-1 0x1.0000000000000p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.0000000000000p+0 0x1.0000000000000p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.d6f3454000000p+26 0x1.d6f3454000000p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.d6f34540ca458p+26 0x1.d6f34540ca458p+26)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.b25ffd636ec12p-37 0x1.b25ffd636ec12p-37)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 0x1.fe9af5b5e16fap+89 0x1.fe9af5b5e16fap+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 0x1.fe9af5b6bcbd5p+89 0x1.fe9af5b6bcbd5p+89)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 0x1.23456789abcdfp+80 0x1.23456789abcdfp+80)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 0x1.23456789abcdfp+99 0x1.23456789abcdfp+99)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 0x1.23456789abcdfp+61 0x1.23456789abcdfp+61)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan -nan) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -nan -nan)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0p+0 0x0p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x0p+0 -0x0p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 inf inf)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -inf -inf)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789 0123456789)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e019 0123456789e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e+019 0123456789e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789e-019 0123456789e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789. 0123456789.)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e019 0123456789.e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan nan)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan -nan)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0p+0 0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0p+0 0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x0p+0 -0x0p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x0p+0 -0x0p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1022 0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p-1022 0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1022 -0x1p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1022 -0x1p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p-1 0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p-1 0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p-1 -0x1p-1) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p-1 -0x1p-1)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1p+0 0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1p+0 0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1p+0 -0x1p+0) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1p+0 -0x1p+0)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1.921fb54442d18p+2 0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1.921fb54442d18p+2 -0x1.921fb54442d18p+2)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x1.fffffffffffffp+1023 0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -0x1.fffffffffffffp+1023 -0x1.fffffffffffffp+1023)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 inf inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 -inf -inf) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789 0123456789) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789 0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e019 0123456789e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e019 0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e+019 0123456789e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e+019 0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789e-019 0123456789e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789e-019 0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789. 0123456789.) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789. 0123456789.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e019 0123456789.e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e019 0123456789.e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e+019 0123456789.e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e+019 0123456789.e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.e-019 0123456789.e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.e-019 0123456789.e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789 0123456789.0123456789) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789 0123456789.0123456789)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e019 0123456789.0123456789e019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e+019 0123456789.0123456789e+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0123456789.0123456789e-019 0123456789.0123456789e-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdefp-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef. 0x0123456789ABCDEFabcdef.)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p019 0x0123456789ABCDEFabcdef.p019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p+019 0x0123456789ABCDEFabcdef.p+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.p-019 0x0123456789ABCDEFabcdef.p-019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdef)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp+019)) +(assert_return (invoke "f64x2.pmax" (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019) + (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f64x2 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019 0x0123456789ABCDEFabcdef.0123456789ABCDEFabcdefp-019)) + + +;; Unknown operators + +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i8x16.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.pmin (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.pmax (v128.const i32x4 0 0 0 0) (v128.const i32x4 0 0 0 0)))") "unknown operator") + +;; type check +(assert_invalid (module (func (result v128) (f64x2.pmin (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (f64x2.pmax (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $f64x2.pmin-1st-arg-empty (result v128) + (f64x2.pmin (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.pmin-arg-empty (result v128) + (f64x2.pmin) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.pmax-1st-arg-empty (result v128) + (f64x2.pmax (v128.const f64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $f64x2.pmax-arg-empty (result v128) + (f64x2.pmax) + ) + ) + "type mismatch" +) + From 334a9236b66e9067131273e3587d2483e9fdd34b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 22 Sep 2020 14:06:49 -0700 Subject: [PATCH 244/378] Add validation for SIMD instructions (#327) --- document/core/binary/instructions.rst | 2 +- document/core/syntax/instructions.rst | 79 ++++--- document/core/util/macros.def | 15 +- document/core/valid/instructions.rst | 283 ++++++++++++++++++++++++++ 4 files changed, 351 insertions(+), 28 deletions(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index f360273992..8e33f81eac 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -575,7 +575,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~82{:}\Bu32 &\Rightarrow& \V128.\BITSELECT \end{array} -.. _binary-vtestop: +.. _binary-vitestop: .. _binary-vshiftop: .. _binary-viunop: .. _binary-vibinop: diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 446be0f47a..634b5f3464 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -174,17 +174,21 @@ Occasionally, it is convenient to group operators together according to the foll .. index:: ! simd instruction, fixed-width simd, value, value type pair: abstract syntax; instruction .. _syntax-laneidx: +.. _syntax-shape: +.. _syntax-vunop: +.. _syntax-vbinop: +.. _syntax-vternop: .. _syntax-vsunop: .. _syntax-vsbinop: .. _syntax-vsternop: -.. _syntax-vtestop: +.. _syntax-vitestop: .. _syntax-virelop: .. _syntax-vfrelop: .. _syntax-vshiftop: .. _syntax-viunop: .. _syntax-vibinop: .. _syntax-viminmaxop: -.. _syntax-vsatbinop: +.. _syntax-visatbinop: .. _syntax-vfunop: .. _syntax-vfbinop: .. _syntax-instr-simd: @@ -196,38 +200,38 @@ SIMD instructions provide basic operations over :ref:`values ` of .. math:: \begin{array}{llcl} - \production{ishape} & \X{ixx} &::=& + \production{ishape} & \ishape &::=& \K{i8x16} ~|~ \K{i16x8} ~|~ \K{i32x4} ~|~ \K{i64x2} \\ - \production{fshape} & \X{fxx} &::=& + \production{fshape} & \fshape &::=& \K{f32x4} ~|~ \K{f64x2} \\ - \production{vshape} & \X{vxx} &::=& - \X{ixx} ~|~ \X{fxx} \\ + \production{shape} & \shape &::=& + \ishape ~|~ \fshape \\ \production{lane index} & \laneidx &::=& \u8 \\ \production{instruction} & \instr &::=& \dots \\&&|& - \K{v128.}\CONST~\xref{syntax/values}{syntax-simd}{\vX{\X{nnn}}} \\&&|& + \K{v128.}\VCONST~\i128 \\&&|& \K{v128.}\vsunop \\&&|& \K{v128.}\vsbinop \\&&|& \K{v128.}\vsternop \\&&|& \K{i8x16.}\SHUFFLE~\laneidx^{16} \\&&|& \K{i8x16.}\SWIZZLE \\&&|& - \X{vxx}\K{.}\SPLAT \\&&|& + \shape\K{.}\SPLAT \\&&|& \K{i8x16.}\EXTRACTLANE\K{\_}\sx~\laneidx ~|~ \K{i16x8.}\EXTRACTLANE\K{\_}\sx~\laneidx \\&&|& \K{i32x4.}\EXTRACTLANE~\laneidx ~|~ \K{i64x2.}\EXTRACTLANE~\laneidx \\&&|& - \X{fxx}\K{.}\EXTRACTLANE~\laneidx \\&&|& - \X{vxx}\K{.}\REPLACELANE~\laneidx \\&&|& - \X{ixx}\K{.}\virelop \\&&|& - \X{fxx}\K{.}\vfrelop \\&&|& + \fshape\K{.}\EXTRACTLANE~\laneidx \\&&|& + \shape\K{.}\REPLACELANE~\laneidx \\&&|& + \ishape\K{.}\virelop \\&&|& + \fshape\K{.}\vfrelop \\&&|& \K{i8x16.}\viunop ~|~ \K{i16x8.}\viunop ~|~ \K{i32x4.}\viunop \\&&|& \K{i64x2.}\NEG \\&&|& - \X{fxx.}\vfunop \\&&|& - \K{i8x16.}\vtestop ~|~ - \K{i16x8.}\vtestop ~|~ - \K{i32x4.}\vtestop \\&&|& + \fshape\K{.}\vfunop \\&&|& + \K{i8x16.}\vitestop ~|~ + \K{i16x8.}\vitestop ~|~ + \K{i32x4.}\vitestop \\&&|& \K{i8x16.}\BITMASK ~|~ \K{i16x8.}\BITMASK ~|~ \K{i32x4.}\BITMASK \\&&|& @@ -237,21 +241,21 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i32x4.}\WIDEN\K{\_low}\K{\_i16x8\_}\sx \\&&|& \K{i16x8.}\WIDEN\K{\_high}\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\WIDEN\K{\_high}\K{\_i16x8\_}\sx \\&&|& - \X{ixx}\K{.}\vshiftop \\&&|& - \X{ixx}\K{.}\vibinop \\&&|& + \ishape\K{.}\vshiftop \\&&|& + \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ \K{i16x8.}\viminmaxop ~|~ \K{i32x4.}\viminmaxop \\&&|& - \K{i8x16.}\vsatbinop ~|~ - \K{i16x8.}\vsatbinop \\&&|& + \K{i8x16.}\visatbinop ~|~ + \K{i16x8.}\visatbinop \\&&|& \K{i16x8.}\K{mul} ~|~ \K{i32x4.}\K{mul} ~|~ \K{i64x2.}\K{mul} \\&&|& \K{i8x16.}\AVGR\K{\_u} ~|~ \K{i16x8.}\AVGR\K{\_u} \\&&|& - \X{fxx.}\vfbinop \\&&|& - \K{i32x4.}\TRUNC\K{\_sat\_f32x4\_}\sx ~|~ - \K{f32x4.}\CONVERT\K{\_i32x4\_}\sx \\&&|& + \fshape\K{.}\vfbinop \\&&|& + \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx \\ &&|& + \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx \\&&|& \dots \\ \production{SIMD unary operator} & \vsunop &::=& \K{not} \\ @@ -262,7 +266,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{xor} \\ \production{SIMD ternary operator} & \vsternop &::=& \K{bitselect} \\ - \production{SIMD test operator} & \vtestop &::=& + \production{SIMD test operator} & \vitestop &::=& \K{any\_true} ~|~ \K{all\_true} \\ \production{SIMD integer relational operator} & \virelop &::=& @@ -292,7 +296,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \production{SIMD integer binary min/max operator} & \viminmaxop &::=& \K{min\_}\sx ~|~ \K{max\_}\sx \\ - \production{SIMD integer saturating binary operator} & \vsatbinop &::=& + \production{SIMD integer saturating binary operator} & \visatbinop &::=& \K{add\_sat\_}\sx ~|~ \K{sub\_sat\_}\sx \\ \production{SIMD floating-point unary operator} & \vfunop &::=& @@ -353,6 +357,31 @@ Some SIMD instructions have a signedness annotation |sx| which distinguishes whe For the other SIMD instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness. +Conventions +........... + +Occasionally, it is convenient to group operators together according to the following grammar shorthands: + +.. math:: + \begin{array}{llll} + \production{unary operator} & \vunop &::=& + \viunop ~|~ + \vfunop \\&&|& + \VNEG ~|~ + \WIDEN \\ + \production{binary operator} & \vbinop &::=& + \vibinop ~|~ \vfbinop \\&&|& + \virelop ~|~ \vfrelop \\&&|& + \viminmaxop ~|~ \visatbinop \\&&|& + \SWIZZLE ~|~ + \NARROW ~|~ + \VMUL ~|~ + \AVGR\K{\_u} ~|~ + \VTRUNC ~|~ + \VCONVERT \\ + \end{array} + + .. index:: ! parametric instruction, value type pair: abstract syntax; instruction .. _syntax-instr-parametric: diff --git a/document/core/util/macros.def b/document/core/util/macros.def index e1c6472290..ea66a6cf58 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -442,16 +442,24 @@ .. |ftestop| mathdef:: \xref{syntax/instructions}{syntax-ftestop}{\X{ftestop}} .. |frelop| mathdef:: \xref{syntax/instructions}{syntax-frelop}{\X{frelop}} +.. |ishape| mathdef:: \xref{syntax/instructions}{syntax-shape}{\X{ishape}} +.. |fshape| mathdef:: \xref{syntax/instructions}{syntax-shape}{\X{fshape}} +.. |shape| mathdef:: \xref{syntax/instructions}{syntax-shape}{\X{shape}} + +.. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}} +.. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}} +.. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} + .. |laneidx| mathdef:: \xref{syntax/instructions}{syntax-laneidx}{\X{laneidx}} .. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} .. |vsbinop| mathdef:: \xref{syntax/instructions}{syntax-vsbinop}{\X{vsbinop}} .. |vsternop| mathdef:: \xref{syntax/instructions}{syntax-vsternop}{\X{vsternop}} -.. |vtestop| mathdef:: \xref{syntax/instructions}{syntax-vtestop}{\X{vtestop}} +.. |vitestop| mathdef:: \xref{syntax/instructions}{syntax-vitestop}{\X{vitestop}} .. |vshiftop| mathdef:: \xref{syntax/instructions}{syntax-vshiftop}{\X{vshiftop}} .. |viunop| mathdef:: \xref{syntax/instructions}{syntax-viunop}{\X{viunop}} .. |vibinop| mathdef:: \xref{syntax/instructions}{syntax-vibinop}{\X{vibinop}} .. |viminmaxop| mathdef:: \xref{syntax/instructions}{syntax-viminmaxop}{\X{viminmaxop}} -.. |vsatbinop| mathdef:: \xref{syntax/instructions}{syntax-vsatbinop}{\X{vsatbinop}} +.. |visatbinop| mathdef:: \xref{syntax/instructions}{syntax-visatbinop}{\X{visatbinop}} .. |vfunop| mathdef:: \xref{syntax/instructions}{syntax-vfunop}{\X{vfunop}} .. |vfbinop| mathdef:: \xref{syntax/instructions}{syntax-vfbinop}{\X{vfbinop}} .. |virelop| mathdef:: \xref{syntax/instructions}{syntax-virelop}{\X{virelop}} @@ -822,6 +830,9 @@ .. |vdashimportdesc| mathdef:: \xref{valid/modules}{valid-importdesc}{\vdash} .. |vdashmodule| mathdef:: \xref{valid/modules}{valid-module}{\vdash} +.. |unpacked| mathdef:: \xref{valid/instructions}{aux-unpacked}{\F{unpacked}} +.. |lanes| mathdef:: \xref{valid/instructions}{aux-lanes}{\F{lanes}} + .. Execution .. --------- diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 91c52f21c0..ae615fd4cf 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -154,6 +154,247 @@ Numeric Instructions } +.. index:: simd instruction + pair: validation; instruction + single: abstract syntax; instruction + +.. _valid-instr-simd: + +SIMD Instructions +~~~~~~~~~~~~~~~~~ + +.. _aux-unpacked: + +SIMD instructions can have a prefix to describe the :ref:`shape ` of the operand. Packed numeric types, |I8| and |I16|, are not :ref:`value type `, we define an auxiliary function to map such packed types into value types: + +.. math:: + \begin{array}{lll@{\qquad}l} + \unpacked(\K{i8x16}) &=& \I32 \\ + \unpacked(\K{i16x8}) &=& \I32 \\ + \unpacked(t\K{x}N) &=& t + \end{array} + + +We also define an auxiliary function to get number of packed numeric types in a |V128|: + +.. _aux-lanes: + +.. math:: + \begin{array}{lll@{\qquad}l} + \lanes(t\K{x}N) &=& N + \end{array} + + +.. _valid-vconst: + +:math:`\V128\K{.}\VCONST~c` +........................... + +* The instruction is valid with type :math:`[] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \V128\K{.}\VCONST~c : [] \to [\V128] + } + + +.. _valid-vsunop: + +:math:`\V128\K{.}\vsunop` +......................... + +* The instruction is valid with type :math:`[\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \V128\K{.}\vsunop : [\V128] \to [\V128] + } + + +.. _valid-vsbinop: + +:math:`\V128\K{.}\vsbinop` +.......................... + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \V128\K{.}\vsbinop : [\V128~\V128] \to [\V128] + } + + +.. _valid-vsternop: + +:math:`\V128\K{.}\vsternop` +........................... + +* The instruction is valid with type :math:`[\V128~\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \V128\K{.}\vsternop : [\V128~\V128~\V128] \to [\V128] + } + + +.. _valid-simd-shuffle: + +:math:`\K{i8x16.}\SHUFFLE~\laneidx^{16}` +........................................ + +* For all :math:`\laneidx_i`, in :math:`\laneidx^{16}`, :math:`\laneidx_i` must be smaller than :math:`32`. + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + (\laneidx < 32)^{16} + }{ + C \vdashinstr \K{i8x16.}\SHUFFLE~\laneidx^{16} : [\V128~\V128] \to [\V128] + } + + +.. _valid-simd-splat: + +:math:`\shape\K{.}\SPLAT` +......................... + +* Let :math:`t` be :math:`\unpacked(\shape)`. + +* The instruction is valid with type :math:`[t] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\SPLAT : [\unpacked(\shape)] \to [\V128] + } + + +.. _valid-simd-extract-lane: +.. _valid-simd-extract-lane-sx: + +:math:`\shape\K{.}\EXTRACTLANE\K{\_}\sx^?~\laneidx` +................................................... + +* The lane index :math:`\laneidx` must be smaller than :math:`\lanes(\shape)`. + +* The instruction is valid with type :math:`[\V128] \to [\unpacked(\shape)]`. + +.. math:: + \frac{ + \laneidx < \lanes(\shape) + }{ + C \vdashinstr t\K{x}N\K{.}\EXTRACTLANE\K{\_}\sx^?~\laneidx : [\V128] \to [\unpacked(\shape)] + } + + +.. _valid-simd-replace-lane: + +:math:`\shape\K{.}\REPLACELANE~\laneidx` +........................................ + +* The lane index :math:`\laneidx` must be smaller than :math:`\lanes(\shape)`. + +* Let :math:`t` be :math:`\unpacked(\shape)`. + +* The instruction is valid with type :math:`[\V128~t] \to [\V128]`. + +.. math:: + \frac{ + \laneidx < \lanes(\shape) + }{ + C \vdashinstr \shape\K{.}\REPLACELANE~\laneidx : [\V128~\unpacked(\shape)] \to [\V128] + } + + +.. _valid-vunop: + +:math:`\shape\K{.}\vunop` +......................... + +* The instruction is valid with type :math:`[\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vunop : [\V128] \to [\V128] + } + + +.. _valid-vbinop: + +:math:`\shape\K{.}\vbinop` +.......................... + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vbinop : [\V128~\V128] \to [\V128] + } + + +.. _valid-vternop: + +:math:`\shape\K{.}\vternop` +........................... + +* The instruction is valid with type :math:`[\V128~\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vternop : [\V128~\V128~\V128] \to [\V128] + } + + +.. _valid-vshiftop: + +:math:`\ishape\K{.}\vshiftop` +............................. + +* The instruction is valid with type :math:`[\V128~\I32] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \ishape\K{.}\vshiftop : [\V128~\I32] \to [\V128] + } + + +.. _valid-vitestop: + +:math:`\shape\K{.}\vitestop` +............................ + +* The instruction is valid with type :math:`[\V128] \to [\I32]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vitestop : [\V128] \to [\I32] + } + + +.. _valid-simd-bitmask: + +:math:`\ishape\K{.}\BITMASK` +............................ + +* The instruction is valid with type :math:`[\V128] \to [\I32]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \ishape\K{.}\BITMASK : [\V128] \to [\I32] + } + + .. index:: parametric instructions, value type, polymorphism pair: validation; instruction single: abstract syntax; instruction @@ -389,6 +630,48 @@ Memory Instructions } +.. _valid-load-extend: + +:math:`\K{v128.}\LOAD{N}\K{x}M\_\sx~\memarg` +............................................... + +* The memory :math:`C.\CMEMS[0]` must be defined in the context. + +* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8 \cdot M`. + +* Then the instruction is valid with type :math:`[\I32] \to [\V128]`. + +.. math:: + \frac{ + C.\CMEMS[0] = \memtype + \qquad + 2^{\memarg.\ALIGN} \leq N/8 \cdot M + }{ + C \vdashinstr \K{v128.}\K{.}\LOAD{N}\K{x}M\_\sx~\memarg : [\I32] \to [\V128] + } + + +.. _valid-load-splat: + +:math:`\K{v128.}\LOAD{N}\K{\_splat}~\memarg` +............................................... + +* The memory :math:`C.\CMEMS[0]` must be defined in the context. + +* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`. + +* Then the instruction is valid with type :math:`[\I32] \to [\V128]`. + +.. math:: + \frac{ + C.\CMEMS[0] = \memtype + \qquad + 2^{\memarg.\ALIGN} \leq N/8 + }{ + C \vdashinstr \K{v128.}\LOAD{N}\K{\_splat}~\memarg : [\I32] \to [\V128] + } + + .. _valid-memory.size: :math:`\MEMORYSIZE` From 43825a2349e5d1f100d4e9819ede7346ce51951f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 23 Sep 2020 08:58:37 -0700 Subject: [PATCH 245/378] Fix laneidx binary definition (#357) --- document/core/binary/instructions.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 8e33f81eac..436cd27f31 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -449,7 +449,7 @@ The |SHUFFLE| instruction is also followed by the encoding of 16 |laneidx| immed .. math:: \begin{array}{llclll} \production{lane index} & \Blaneidx &::=& - l{:}\Bu8 &\Rightarrow& l \\ + l{:}\Bbyte &\Rightarrow& l \\ \production{instruction} & \Binstr &::=& \dots \\&&|& \hex{FD}~~13{:}\Bu32~~(l{:}\Blaneidx)^{16} &\Rightarrow& \I8X16.\SHUFFLE~l^{16} \\ \end{array} From 9579d435305e72c7401655324a2e50b6dc260443 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 23 Sep 2020 08:59:06 -0700 Subject: [PATCH 246/378] Add V128 to validation algorithm and index of types (#359) --- document/core/appendix/algorithm.rst | 2 +- document/core/appendix/index-types.rst | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/document/core/appendix/algorithm.rst b/document/core/appendix/algorithm.rst index 488eca36e1..7dec8b44db 100644 --- a/document/core/appendix/algorithm.rst +++ b/document/core/appendix/algorithm.rst @@ -27,7 +27,7 @@ the latter surrounding :ref:`structured control instructions ` |I64| :math:`\hex{7E}` (-2 as |Bs7|) :ref:`Value type ` |F32| :math:`\hex{7D}` (-3 as |Bs7|) :ref:`Value type ` |F64| :math:`\hex{7C}` (-4 as |Bs7|) -(reserved) :math:`\hex{7B}` .. :math:`\hex{71}` +:ref:`Value type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) +(reserved) :math:`\hex{7A}` .. :math:`\hex{71}` :ref:`Element type ` |FUNCREF| :math:`\hex{70}` (-16 as |Bs7|) (reserved) :math:`\hex{6F}` .. :math:`\hex{61}` :ref:`Function type ` :math:`[\valtype^\ast] \to [\valtype^\ast]` :math:`\hex{60}` (-32 as |Bs7|) From d9e9d222b5f85b5b510471997a1adeef376a9a66 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 29 Sep 2020 09:14:01 -0700 Subject: [PATCH 247/378] Clean up some SIMD TODOs (#367) Replace them with assert false, to indicate that those aren't supposed to happen, rather than unimplemented. --- interpreter/binary/encode.ml | 4 +--- interpreter/exec/eval_numeric.ml | 7 +++---- interpreter/script/js.ml | 12 ++++++------ interpreter/text/arrange.ml | 2 +- 4 files changed, 11 insertions(+), 14 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 3139116b76..1d39d3ffb6 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -291,7 +291,7 @@ let encode m = | Compare (F64 F64Op.Gt) -> op 0x64 | Compare (F64 F64Op.Le) -> op 0x65 | Compare (F64 F64Op.Ge) -> op 0x66 - | Compare (V128 _) -> failwith "TODO v128" + | Compare (V128 _) -> assert false | Unary (I32 I32Op.Clz) -> op 0x67 | Unary (I32 I32Op.Ctz) -> op 0x68 @@ -508,8 +508,6 @@ let encode m = | Binary (V128 V128Op.(V128 AndNot)) -> simd_op 0x4fl | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l | Binary (V128 V128Op.(V128 Xor)) -> simd_op 0x51l - | Binary (V128 _) -> failwith "TODO v128" - | Ternary (V128Op.Bitselect) -> simd_op 0x52l diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 358d60f0fd..44e27b0c36 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -162,7 +162,7 @@ struct | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) - | _ -> failwith "TODO v128 unimplemented unop" + | _ -> assert false let binop (op : binop) = let f = match op with @@ -267,7 +267,7 @@ struct | V128 Or -> SXX.V128.or_ | V128 Xor -> SXX.V128.xor | V128 AndNot -> SXX.V128.andnot - | _ -> failwith "TODO v128 unimplemented binop" + | _ -> assert false in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) let testop (op : testop) = @@ -281,8 +281,7 @@ struct | _ -> assert false in fun v -> f (of_value 1 v) - (* FIXME *) - let relop op = failwith "TODO v128 unimplemented relop" + let relop op = assert false let extractop op v = let v128 = of_value 1 v in diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 446fcf5da2..934718d04b 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -195,29 +195,29 @@ let eq_of = function | I64Type -> Values.I64 I64Op.Eq | F32Type -> Values.F32 F32Op.Eq | F64Type -> Values.F64 F64Op.Eq - | V128Type -> failwith "TODO v128" + | V128Type -> assert false let and_of = function | I32Type | F32Type -> Values.I32 I32Op.And | I64Type | F64Type -> Values.I64 I64Op.And - | V128Type -> failwith "TODO v128" + | V128Type -> Values.V128 V128Op.(V128 And) let reinterpret_of = function | I32Type -> I32Type, Nop | I64Type -> I64Type, Nop | F32Type -> I32Type, Convert (Values.I32 I32Op.ReinterpretFloat) | F64Type -> I64Type, Convert (Values.I64 I64Op.ReinterpretFloat) - | V128Type -> failwith "TODO v128" + | V128Type -> assert false let canonical_nan_of = function | I32Type | F32Type -> Values.I32 (F32.to_bits F32.pos_nan) | I64Type | F64Type -> Values.I64 (F64.to_bits F64.pos_nan) - | V128Type -> failwith "TODO v128" + | V128Type -> assert false let abs_mask_of = function | I32Type | F32Type -> Values.I32 Int32.max_int | I64Type | F64Type -> Values.I64 Int64.max_int - | V128Type -> failwith "TODO v128" + | V128Type -> assert false let invoke ft lits at = [ft @@ at], FuncImport (1l @@ at) @@ at, @@ -290,7 +290,7 @@ let assert_return ress ts at = in [ Const (Values.V128 mask @@ at) @@ at; - Binary (Values.V128 V128Op.(V128 And)) @@ at; + Binary (and_of V128Type) @@ at; Const (Values.V128 expected @@ at) @@ at; Binary (Values.V128 V128Op.(I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 012de7440a..f2507a513a 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -199,7 +199,7 @@ struct | I32x4 AllTrue -> "i32x4.all_true" | _ -> assert false - let relop xx = fun _ -> failwith "TODO v128" + let relop xx = assert false let unop xx (op : unop) = match op with | I8x16 Neg -> "i8x16.neg" From 1a0854785f79de6fc43e861f9af65c4697cdc841 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 29 Sep 2020 10:38:03 -0700 Subject: [PATCH 248/378] Add SIMD instructions to index of instructions (#366) --- .../core/appendix/gen-index-instructions.py | 178 ++++++ document/core/appendix/index-instructions.rst | 596 ++++++++++++------ 2 files changed, 565 insertions(+), 209 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 300f6cbec1..5801b67788 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -266,6 +266,184 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~5', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), Instruction(r'\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}', r'\hex{FC}~~6', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'), Instruction(r'\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~7', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), + Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~0', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~1', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~2', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~3', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~4', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~5', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~6', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~7', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~8', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~15', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~16', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~17', r'[\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~18', r'[\I64] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~19', r'[\F32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~20', r'[\F64] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~21', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~22', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~23', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~24', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~25', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128 \I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~27', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~28', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~29', r'[\V128] \to [\I64]', r'validation ', r'execution '), + Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~30', r'[\V128~\I64] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~31', r'[\V128] \to [\F32]', r'validation ', r'execution '), + Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~32', r'[\V128~\F32] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~33', r'[\V128] \to [\F64]', r'validation ', r'execution '), + Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~34', r'[\V128~\F64] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~35', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VNE', r'\hex{FD}~~36', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~37', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~38', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~39', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~40', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~41', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~42', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~43', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~44', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~45', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VNE', r'\hex{FD}~~46', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~47', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~48', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~49', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~50', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~51', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~52', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~53', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~54', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~55', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VNE', r'\hex{FD}~~56', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~57', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~58', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~59', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~60', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~61', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VGT', r'\hex{FD}~~68', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VLE', r'\hex{FD}~~69', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VGE', r'\hex{FD}~~70', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~71', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VNE', r'\hex{FD}~~72', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VLT', r'\hex{FD}~~73', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VGT', r'\hex{FD}~~74', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VLE', r'\hex{FD}~~75', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VGE', r'\hex{FD}~~76', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\VNOT', r'\hex{FD}~~77', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\VAND', r'\hex{FD}~~78', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~79', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~102', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~107', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~108', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~109', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VADD', r'\hex{FD}~~110', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~111', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~112', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~113', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~114', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~115', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~118', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~119', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\ANYTRUE', r'\hex{FD}~~130', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VADD', r'\hex{FD}~~142', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~143', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~144', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~145', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~146', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~147', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~149', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~150', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~151', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\ANYTRUE', r'\hex{FD}~~162', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'validation ', r'execution '), + Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VADD', r'\hex{FD}~~174', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~177', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~181', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VMIN\K{\_s}', r'\hex{FD}~~182', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VADD', r'\hex{FD}~~228', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~229', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~230', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~231', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~232', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~233', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\I32]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VADD', r'\hex{FD}~~240', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~241', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), ] def ColumnWidth(n): diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 686f67674b..543966e3bc 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,212 +6,390 @@ Index of Instructions --------------------- -========================================= =================== ============================================= ======================================= =============================================================== -Instruction Binary Opcode Type Validation Execution -========================================= =================== ============================================= ======================================= =============================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1C}` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{25}` -(reserved) :math:`\hex{26}` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -========================================= =================== ============================================= ======================================= =============================================================== +=========================================== ===================== ============================================= =========================================================== ======================================================================================== +Instruction Binary Opcode Type Validation Execution +=========================================== ===================== ============================================= =========================================================== ======================================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` 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` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, 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[\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` 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>` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +=========================================== ===================== ============================================= =========================================================== ======================================================================================== From 8a7c1455a9cc99534f97e0fac5316aaa399f2a27 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 5 Oct 2020 11:53:39 -0700 Subject: [PATCH 249/378] Clarify out-of-range behaviour of i8x16.swizzle (#370) --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 5e503bb348..0b6b9cde6b 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -325,7 +325,7 @@ def S.shuffle(a, b, s): Returns a new vector with lanes selected from the lanes of the first input vector `a` specified in the second input vector `s`. The indices `i` in range `[0, 15]` select the `i`-th element of `a`. For indices outside of the range -the resulting lane is 0. +the resulting lane is initialized to 0. ```python def S.swizzle(a, s): From 9c0aaec3ecd6cc02ed39e92e85095e1c5e291d0f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 6 Oct 2020 10:13:49 -0700 Subject: [PATCH 250/378] Cleanup operators to remove duplicated V128Op (#358) --- interpreter/syntax/operators.ml | 158 ++++++++++++++++---------------- 1 file changed, 79 insertions(+), 79 deletions(-) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index b94166bc55..8c77f75d93 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -240,17 +240,17 @@ let v128_load64_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = None} -let v128_not = Unary (V128 (V128Op.V128 V128Op.Not)) -let v128_and = Binary (V128 (V128Op.V128 V128Op.And)) -let v128_andnot = Binary (V128 (V128Op.V128 V128Op.AndNot)) -let v128_or = Binary (V128 (V128Op.V128 V128Op.Or)) -let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor)) +let v128_not = Unary (V128 V128Op.(V128 Not)) +let v128_and = Binary (V128 V128Op.(V128 And)) +let v128_andnot = Binary (V128 V128Op.(V128 AndNot)) +let v128_or = Binary (V128 V128Op.(V128 Or)) +let v128_xor = Binary (V128 V128Op.(V128 Xor)) let v128_bitselect = Ternary (V128Op.Bitselect) let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) -let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat)) +let i8x16_splat = Convert (V128 V128Op.(I8x16 Splat)) let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) let i8x16_extract_lane_u imm = SimdExtract (V128Op.I8x16 (ZX, imm)) let i8x16_replace_lane imm = SimdReplace (V128Op.I8x16 imm) @@ -264,10 +264,10 @@ let i8x16_gt_s = Binary (V128 V128Op.(I8x16 GtS)) let i8x16_gt_u = Binary (V128 V128Op.(I8x16 GtU)) let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) -let i8x16_neg = Unary (V128 (V128Op.I8x16 V128Op.Neg)) -let i8x16_any_true = Test (V128 (V128Op.I8x16 V128Op.AnyTrue)) +let i8x16_neg = Unary (V128 V128Op.(I8x16 Neg)) +let i8x16_any_true = Test (V128 V128Op.(I8x16 AnyTrue)) let i8x16_bitmask = SimdBitmask V128Op.(I8x16 Bitmask) -let i8x16_all_true = Test (V128 (V128Op.I8x16 V128Op.AllTrue)) +let i8x16_all_true = Test (V128 V128Op.(I8x16 AllTrue)) let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) let i16x8_widen_low_i8x16_s = Unary (V128 V128Op.(I16x8 WidenLowS)) @@ -277,20 +277,20 @@ let i16x8_widen_high_i8x16_u = Unary (V128 V128Op.(I16x8 WidenHighU)) let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_shr_u = SimdShift V128Op.(I8x16 ShrU) -let i8x16_add = Binary (V128 (V128Op.I8x16 V128Op.Add)) +let i8x16_add = Binary (V128 V128Op.(I8x16 Add)) let i8x16_add_sat_s = Binary (V128 V128Op.(I8x16 AddSatS)) let i8x16_add_sat_u = Binary (V128 V128Op.(I8x16 AddSatU)) -let i8x16_sub = Binary (V128 (V128Op.I8x16 V128Op.Sub)) +let i8x16_sub = Binary (V128 V128Op.(I8x16 Sub)) let i8x16_sub_sat_s = Binary (V128 V128Op.(I8x16 SubSatS)) let i8x16_sub_sat_u = Binary (V128 V128Op.(I8x16 SubSatU)) -let i8x16_abs = Unary (V128 (V128Op.I8x16 V128Op.Abs)) -let i8x16_min_s = Binary (V128 (V128Op.I8x16 V128Op.MinS)) -let i8x16_min_u = Binary (V128 (V128Op.I8x16 V128Op.MinU)) -let i8x16_max_s = Binary (V128 (V128Op.I8x16 V128Op.MaxS)) -let i8x16_max_u = Binary (V128 (V128Op.I8x16 V128Op.MaxU)) -let i8x16_avgr_u = Binary (V128 (V128Op.I8x16 V128Op.AvgrU)) +let i8x16_abs = Unary (V128 V128Op.(I8x16 Abs)) +let i8x16_min_s = Binary (V128 V128Op.(I8x16 MinS)) +let i8x16_min_u = Binary (V128 V128Op.(I8x16 MinU)) +let i8x16_max_s = Binary (V128 V128Op.(I8x16 MaxS)) +let i8x16_max_u = Binary (V128 V128Op.(I8x16 MaxU)) +let i8x16_avgr_u = Binary (V128 V128Op.(I8x16 AvgrU)) -let i16x8_splat = Convert (V128 (V128Op.I16x8 V128Op.Splat)) +let i16x8_splat = Convert (V128 V128Op.(I16x8 Splat)) let i16x8_extract_lane_s imm = SimdExtract (V128Op.I16x8 (SX, imm)) let i16x8_extract_lane_u imm = SimdExtract (V128Op.I16x8 (ZX, imm)) let i16x8_replace_lane imm = SimdReplace (V128Op.I16x8 imm) @@ -304,30 +304,30 @@ let i16x8_gt_s = Binary (V128 V128Op.(I16x8 GtS)) let i16x8_gt_u = Binary (V128 V128Op.(I16x8 GtU)) let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) -let i16x8_neg = Unary (V128 (V128Op.I16x8 V128Op.Neg)) -let i16x8_any_true = Test (V128 (V128Op.I16x8 V128Op.AnyTrue)) +let i16x8_neg = Unary (V128 V128Op.(I16x8 Neg)) +let i16x8_any_true = Test (V128 V128Op.(I16x8 AnyTrue)) let i16x8_bitmask = SimdBitmask V128Op.(I16x8 Bitmask) -let i16x8_all_true = Test (V128 (V128Op.I16x8 V128Op.AllTrue)) +let i16x8_all_true = Test (V128 V128Op.(I16x8 AllTrue)) let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) let i16x8_shl = SimdShift V128Op.(I16x8 Shl) let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) let i16x8_shr_u = SimdShift V128Op.(I16x8 ShrU) -let i16x8_add = Binary (V128 (V128Op.I16x8 V128Op.Add)) +let i16x8_add = Binary (V128 V128Op.(I16x8 Add)) let i16x8_add_sat_s = Binary (V128 V128Op.(I16x8 AddSatS)) let i16x8_add_sat_u = Binary (V128 V128Op.(I16x8 AddSatU)) -let i16x8_sub = Binary (V128 (V128Op.I16x8 V128Op.Sub)) +let i16x8_sub = Binary (V128 V128Op.(I16x8 Sub)) let i16x8_sub_sat_s = Binary (V128 V128Op.(I16x8 SubSatS)) let i16x8_sub_sat_u = Binary (V128 V128Op.(I16x8 SubSatU)) -let i16x8_mul = Binary (V128 (V128Op.I16x8 V128Op.Mul)) -let i16x8_abs = Unary (V128 (V128Op.I16x8 V128Op.Abs)) -let i16x8_min_s = Binary (V128 (V128Op.I16x8 V128Op.MinS)) -let i16x8_min_u = Binary (V128 (V128Op.I16x8 V128Op.MinU)) -let i16x8_max_s = Binary (V128 (V128Op.I16x8 V128Op.MaxS)) -let i16x8_max_u = Binary (V128 (V128Op.I16x8 V128Op.MaxU)) -let i16x8_avgr_u = Binary (V128 (V128Op.I16x8 V128Op.AvgrU)) +let i16x8_mul = Binary (V128 V128Op.(I16x8 Mul)) +let i16x8_abs = Unary (V128 V128Op.(I16x8 Abs)) +let i16x8_min_s = Binary (V128 V128Op.(I16x8 MinS)) +let i16x8_min_u = Binary (V128 V128Op.(I16x8 MinU)) +let i16x8_max_s = Binary (V128 V128Op.(I16x8 MaxS)) +let i16x8_max_u = Binary (V128 V128Op.(I16x8 MaxU)) +let i16x8_avgr_u = Binary (V128 V128Op.(I16x8 AvgrU)) -let i32x4_splat = Convert (V128 (V128Op.I32x4 V128Op.Splat)) +let i32x4_splat = Convert (V128 V128Op.(I32x4 Splat)) let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) let i32x4_replace_lane imm = SimdReplace (V128Op.I32x4 imm) let i32x4_eq = Binary (V128 V128Op.(I32x4 Eq)) @@ -340,11 +340,11 @@ let i32x4_gt_s = Binary (V128 V128Op.(I32x4 GtS)) let i32x4_gt_u = Binary (V128 V128Op.(I32x4 GtU)) let i32x4_ge_s = Binary (V128 V128Op.(I32x4 GeS)) let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) -let i32x4_abs = Unary (V128 (V128Op.I32x4 V128Op.Abs)) -let i32x4_neg = Unary (V128 (V128Op.I32x4 V128Op.Neg)) -let i32x4_any_true = Test (V128 (V128Op.I32x4 V128Op.AnyTrue)) +let i32x4_abs = Unary (V128 V128Op.(I32x4 Abs)) +let i32x4_neg = Unary (V128 V128Op.(I32x4 Neg)) +let i32x4_any_true = Test (V128 V128Op.(I32x4 AnyTrue)) let i32x4_bitmask = SimdBitmask V128Op.(I32x4 Bitmask) -let i32x4_all_true = Test (V128 (V128Op.I32x4 V128Op.AllTrue)) +let i32x4_all_true = Test (V128 V128Op.(I32x4 AllTrue)) let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) let i32x4_widen_high_i16x8_s = Unary (V128 V128Op.(I32x4 WidenHighS)) let i32x4_widen_low_i16x8_u = Unary (V128 V128Op.(I32x4 WidenLowU)) @@ -352,28 +352,28 @@ let i32x4_widen_high_i16x8_u = Unary (V128 V128Op.(I32x4 WidenHighU)) let i32x4_shl = SimdShift V128Op.(I32x4 Shl) let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) let i32x4_shr_u = SimdShift V128Op.(I32x4 ShrU) -let i32x4_add = Binary (V128 (V128Op.I32x4 V128Op.Add)) -let i32x4_sub = Binary (V128 (V128Op.I32x4 V128Op.Sub)) -let i32x4_min_s = Binary (V128 (V128Op.I32x4 V128Op.MinS)) -let i32x4_min_u = Binary (V128 (V128Op.I32x4 V128Op.MinU)) -let i32x4_max_s = Binary (V128 (V128Op.I32x4 V128Op.MaxS)) -let i32x4_max_u = Binary (V128 (V128Op.I32x4 V128Op.MaxU)) -let i32x4_mul = Binary (V128 (V128Op.I32x4 V128Op.Mul)) +let i32x4_add = Binary (V128 V128Op.(I32x4 Add)) +let i32x4_sub = Binary (V128 V128Op.(I32x4 Sub)) +let i32x4_min_s = Binary (V128 V128Op.(I32x4 MinS)) +let i32x4_min_u = Binary (V128 V128Op.(I32x4 MinU)) +let i32x4_max_s = Binary (V128 V128Op.(I32x4 MaxS)) +let i32x4_max_u = Binary (V128 V128Op.(I32x4 MaxU)) +let i32x4_mul = Binary (V128 V128Op.(I32x4 Mul)) let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -let i64x2_splat = Convert (V128 (V128Op.I64x2 V128Op.Splat)) +let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) -let i64x2_neg = Unary (V128 (V128Op.I64x2 V128Op.Neg)) -let i64x2_add = Binary (V128 (V128Op.I64x2 V128Op.Add)) -let i64x2_sub = Binary (V128 (V128Op.I64x2 V128Op.Sub)) -let i64x2_mul = Binary (V128 (V128Op.I64x2 V128Op.Mul)) +let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) +let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) +let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub)) +let i64x2_mul = Binary (V128 V128Op.(I64x2 Mul)) let i64x2_shl = SimdShift V128Op.(I64x2 Shl) let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let i64x2_shr_u = SimdShift V128Op.(I64x2 ShrU) -let f32x4_splat = Convert (V128 (V128Op.F32x4 V128Op.Splat)) +let f32x4_splat = Convert (V128 V128Op.(F32x4 Splat)) let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) let f32x4_replace_lane imm = SimdReplace (V128Op.F32x4 imm) let f32x4_eq = Binary (V128 V128Op.(F32x4 Eq)) @@ -382,25 +382,25 @@ let f32x4_lt = Binary (V128 V128Op.(F32x4 Lt)) let f32x4_le = Binary (V128 V128Op.(F32x4 Le)) let f32x4_gt = Binary (V128 V128Op.(F32x4 Gt)) let f32x4_ge = Binary (V128 V128Op.(F32x4 Ge)) -let f32x4_abs = Unary (V128 (V128Op.F32x4 V128Op.Abs)) -let f32x4_neg = Unary (V128 (V128Op.F32x4 V128Op.Neg)) -let f32x4_sqrt = Unary (V128 (V128Op.F32x4 V128Op.Sqrt)) -let f32x4_ceil = Unary (V128 (V128Op.(F32x4 Ceil))) -let f32x4_floor = Unary (V128 (V128Op.(F32x4 Floor))) -let f32x4_trunc = Unary (V128 (V128Op.(F32x4 Trunc))) -let f32x4_nearest = Unary (V128 (V128Op.(F32x4 Nearest))) -let f32x4_add = Binary (V128 (V128Op.F32x4 V128Op.Add)) -let f32x4_sub = Binary (V128 (V128Op.F32x4 V128Op.Sub)) -let f32x4_mul = Binary (V128 (V128Op.F32x4 V128Op.Mul)) -let f32x4_div = Binary (V128 (V128Op.F32x4 V128Op.Div)) -let f32x4_min = Binary (V128 (V128Op.F32x4 V128Op.Min)) -let f32x4_max = Binary (V128 (V128Op.F32x4 V128Op.Max)) +let f32x4_abs = Unary (V128 V128Op.(F32x4 Abs)) +let f32x4_neg = Unary (V128 V128Op.(F32x4 Neg)) +let f32x4_sqrt = Unary (V128 V128Op.(F32x4 Sqrt)) +let f32x4_ceil = Unary (V128 V128Op.(F32x4 Ceil)) +let f32x4_floor = Unary (V128 V128Op.(F32x4 Floor)) +let f32x4_trunc = Unary (V128 V128Op.(F32x4 Trunc)) +let f32x4_nearest = Unary (V128 V128Op.(F32x4 Nearest)) +let f32x4_add = Binary (V128 V128Op.(F32x4 Add)) +let f32x4_sub = Binary (V128 V128Op.(F32x4 Sub)) +let f32x4_mul = Binary (V128 V128Op.(F32x4 Mul)) +let f32x4_div = Binary (V128 V128Op.(F32x4 Div)) +let f32x4_min = Binary (V128 V128Op.(F32x4 Min)) +let f32x4_max = Binary (V128 V128Op.(F32x4 Max)) let f32x4_convert_i32x4_s = Unary (V128 V128Op.(F32x4 ConvertI32x4S)) let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -let f32x4_pmin = Binary (V128 (V128Op.F32x4 V128Op.Pmin)) -let f32x4_pmax = Binary (V128 (V128Op.F32x4 V128Op.Pmax)) +let f32x4_pmin = Binary (V128 V128Op.(F32x4 Pmin)) +let f32x4_pmax = Binary (V128 V128Op.(F32x4 Pmax)) -let f64x2_splat = Convert (V128 (V128Op.F64x2 V128Op.Splat)) +let f64x2_splat = Convert (V128 V128Op.(F64x2 Splat)) let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) let f64x2_replace_lane imm = SimdReplace (V128Op.F64x2 imm) let f64x2_eq = Binary (V128 V128Op.(F64x2 Eq)) @@ -409,18 +409,18 @@ let f64x2_lt = Binary (V128 V128Op.(F64x2 Lt)) let f64x2_le = Binary (V128 V128Op.(F64x2 Le)) let f64x2_gt = Binary (V128 V128Op.(F64x2 Gt)) let f64x2_ge = Binary (V128 V128Op.(F64x2 Ge)) -let f64x2_neg = Unary (V128 (V128Op.F64x2 V128Op.Neg)) -let f64x2_sqrt = Unary (V128 (V128Op.F64x2 V128Op.Sqrt)) -let f64x2_ceil = Unary (V128 (V128Op.(F64x2 Ceil))) -let f64x2_floor = Unary (V128 (V128Op.(F64x2 Floor))) -let f64x2_trunc = Unary (V128 (V128Op.(F64x2 Trunc))) -let f64x2_nearest = Unary (V128 (V128Op.(F64x2 Nearest))) -let f64x2_add = Binary (V128 (V128Op.F64x2 V128Op.Add)) -let f64x2_sub = Binary (V128 (V128Op.F64x2 V128Op.Sub)) -let f64x2_mul = Binary (V128 (V128Op.F64x2 V128Op.Mul)) -let f64x2_div = Binary (V128 (V128Op.F64x2 V128Op.Div)) -let f64x2_min = Binary (V128 (V128Op.F64x2 V128Op.Min)) -let f64x2_max = Binary (V128 (V128Op.F64x2 V128Op.Max)) -let f64x2_abs = Unary (V128 (V128Op.F64x2 V128Op.Abs)) -let f64x2_pmin = Binary (V128 (V128Op.F64x2 V128Op.Pmin)) -let f64x2_pmax = Binary (V128 (V128Op.F64x2 V128Op.Pmax)) +let f64x2_neg = Unary (V128 V128Op.(F64x2 Neg)) +let f64x2_sqrt = Unary (V128 V128Op.(F64x2 Sqrt)) +let f64x2_ceil = Unary (V128 V128Op.(F64x2 Ceil)) +let f64x2_floor = Unary (V128 V128Op.(F64x2 Floor)) +let f64x2_trunc = Unary (V128 V128Op.(F64x2 Trunc)) +let f64x2_nearest = Unary (V128 V128Op.(F64x2 Nearest)) +let f64x2_add = Binary (V128 V128Op.(F64x2 Add)) +let f64x2_sub = Binary (V128 V128Op.(F64x2 Sub)) +let f64x2_mul = Binary (V128 V128Op.(F64x2 Mul)) +let f64x2_div = Binary (V128 V128Op.(F64x2 Div)) +let f64x2_min = Binary (V128 V128Op.(F64x2 Min)) +let f64x2_max = Binary (V128 V128Op.(F64x2 Max)) +let f64x2_abs = Unary (V128 V128Op.(F64x2 Abs)) +let f64x2_pmin = Binary (V128 V128Op.(F64x2 Pmin)) +let f64x2_pmax = Binary (V128 V128Op.(F64x2 Pmax)) From 1839dc123420fee2ba288b22fa8f1baef20e2539 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 8 Oct 2020 09:06:42 -0700 Subject: [PATCH 251/378] Update README to require Ocaml 4.08 (#378) --- interpreter/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/interpreter/README.md b/interpreter/README.md index 54b9fd0048..5f3914e6fd 100644 --- a/interpreter/README.md +++ b/interpreter/README.md @@ -15,7 +15,7 @@ The text format defines modules in S-expression syntax. Moreover, it is generali ## Building -You'll need OCaml 4.07 or higher. Instructions for installing a recent version of OCaml on multiple platforms are available [here](https://ocaml.org/docs/install.html). On most platforms, the recommended way is through [OPAM](https://ocaml.org/docs/install.html#OPAM). +You'll need OCaml 4.08 or higher. Instructions for installing a recent version of OCaml on multiple platforms are available [here](https://ocaml.org/docs/install.html). On most platforms, the recommended way is through [OPAM](https://ocaml.org/docs/install.html#OPAM). Once you have OCaml, simply do From 73bbae819ff492b6009f5fef70a18ee1a29fabd9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 8 Oct 2020 10:06:11 -0700 Subject: [PATCH 252/378] Move simd operations out into a new file (#377) * Move simd operations out into a new file * Rename Ternary to SimdTernary --- interpreter/binary/encode.ml | 4 +- interpreter/exec/eval.ml | 16 +- interpreter/exec/eval_numeric.ml | 255 +---------------------------- interpreter/exec/eval_numeric.mli | 5 - interpreter/exec/eval_simd.ml | 256 ++++++++++++++++++++++++++++++ interpreter/exec/eval_simd.mli | 15 ++ interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 2 +- interpreter/text/arrange.ml | 2 +- interpreter/valid/valid.ml | 8 +- 10 files changed, 294 insertions(+), 271 deletions(-) create mode 100644 interpreter/exec/eval_simd.ml create mode 100644 interpreter/exec/eval_simd.mli diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 1d39d3ffb6..aea746bcf0 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -509,8 +509,6 @@ let encode m = | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l | Binary (V128 V128Op.(V128 Xor)) -> simd_op 0x51l - | Ternary (V128Op.Bitselect) -> simd_op 0x52l - | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false | Convert (I32 I32Op.WrapI64) -> op 0xa7 @@ -561,6 +559,8 @@ let encode m = | Convert (V128 (V128Op.F64x2 V128Op.Splat)) -> simd_op 0x14l; | Convert (V128 _) -> assert false + | SimdTernary (V128Op.Bitselect) -> simd_op 0x52l + | SimdExtract (V128Op.I8x16 (SX, imm)) -> simd_op 0x15l; u8 imm | SimdExtract (V128Op.I8x16 (ZX, imm)) -> simd_op 0x16l; u8 imm | SimdExtract (V128Op.I16x8 (SX, imm)) -> simd_op 0x18l; u8 imm diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 14135ea0c8..3fdc0b5a86 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -281,28 +281,28 @@ let rec step (c : config) : config = (try Eval_numeric.eval_binop binop v1 v2 :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | Ternary ternop, v3 :: v2 :: v1 :: vs' -> - (try Eval_numeric.eval_ternop ternop v1 v2 v3 :: vs', [] - with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | Convert cvtop, v :: vs' -> (try Eval_numeric.eval_cvtop cvtop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdTernary ternop, v3 :: v2 :: v1 :: vs' -> + (try Eval_simd.eval_ternop ternop v1 v2 v3 :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdExtract extractop, v :: vs' -> - (try Eval_numeric.eval_extractop extractop v :: vs', [] + (try Eval_simd.eval_extractop extractop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdReplace replaceop, r :: v :: vs' -> - (try Eval_numeric.eval_replaceop replaceop v r :: vs', [] + (try Eval_simd.eval_replaceop replaceop v r :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdShift shiftop, s :: v :: vs' -> - (try Eval_numeric.eval_shiftop shiftop v s :: vs', [] + (try Eval_simd.eval_shiftop shiftop v s :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdBitmask bitmaskop, v :: vs' -> - (try Eval_numeric.eval_bitmaskop bitmaskop v :: vs', [] + (try Eval_simd.eval_bitmaskop bitmaskop v :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | _ -> diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 44e27b0c36..fee21fa49d 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -117,229 +117,6 @@ end module F32Op = FloatOp (F32) (Values.F32Value) module F64Op = FloatOp (F64) (Values.F64Value) -(* Simd operators *) - -module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = -struct - open Ast.SimdOp - - let to_value = Value.to_value - let of_value = of_arg Value.of_value - - let unop (op : unop) = - fun v -> match op with - | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) - | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) - | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) - | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) - | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v)) - | I16x8 WidenHighS -> to_value (SXX.I16x8_convert.widen_high_s (of_value 1 v)) - | I16x8 WidenLowU -> to_value (SXX.I16x8_convert.widen_low_u (of_value 1 v)) - | I16x8 WidenHighU -> to_value (SXX.I16x8_convert.widen_high_u (of_value 1 v)) - | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) - | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) - | I32x4 WidenLowS -> to_value (SXX.I32x4_convert.widen_low_s (of_value 1 v)) - | I32x4 WidenHighS -> to_value (SXX.I32x4_convert.widen_high_s (of_value 1 v)) - | I32x4 WidenLowU -> to_value (SXX.I32x4_convert.widen_low_u (of_value 1 v)) - | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) - | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) - | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) - | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) - | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) - | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) - | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) - | F32x4 Ceil -> to_value (SXX.F32x4.ceil (of_value 1 v)) - | F32x4 Floor -> to_value (SXX.F32x4.floor (of_value 1 v)) - | F32x4 Trunc -> to_value (SXX.F32x4.trunc (of_value 1 v)) - | F32x4 Nearest -> to_value (SXX.F32x4.nearest (of_value 1 v)) - | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) - | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) - | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) - | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) - | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) - | F64x2 Ceil -> to_value (SXX.F64x2.ceil (of_value 1 v)) - | F64x2 Floor -> to_value (SXX.F64x2.floor (of_value 1 v)) - | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) - | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) - | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) - | _ -> assert false - - let binop (op : binop) = - let f = match op with - | I8x16 Swizzle -> SXX.V8x16.swizzle - | I8x16 (Shuffle imms) -> fun a b -> SXX.V8x16.shuffle a b imms - | I8x16 Eq -> SXX.I8x16.eq - | I8x16 Ne -> SXX.I8x16.ne - | I8x16 LtS -> SXX.I8x16.lt_s - | I8x16 LtU -> SXX.I8x16.lt_u - | I8x16 LeS -> SXX.I8x16.le_s - | I8x16 LeU -> SXX.I8x16.le_u - | I8x16 GtS -> SXX.I8x16.gt_s - | I8x16 GtU -> SXX.I8x16.gt_u - | I8x16 GeS -> SXX.I8x16.ge_s - | I8x16 GeU -> SXX.I8x16.ge_u - | I8x16 NarrowS -> SXX.I8x16_convert.narrow_s - | I8x16 NarrowU -> SXX.I8x16_convert.narrow_u - | I8x16 Add -> SXX.I8x16.add - | I8x16 AddSatS -> SXX.I8x16.add_sat_s - | I8x16 AddSatU -> SXX.I8x16.add_sat_u - | I8x16 Sub -> SXX.I8x16.sub - | I8x16 SubSatS -> SXX.I8x16.sub_sat_s - | I8x16 SubSatU -> SXX.I8x16.sub_sat_u - | I8x16 MinS -> SXX.I8x16.min_s - | I8x16 MinU -> SXX.I8x16.min_u - | I8x16 MaxS -> SXX.I8x16.max_s - | I8x16 MaxU -> SXX.I8x16.max_u - | I8x16 AvgrU -> SXX.I8x16.avgr_u - | I16x8 Eq -> SXX.I16x8.eq - | I16x8 Ne -> SXX.I16x8.ne - | I16x8 LtS -> SXX.I16x8.lt_s - | I16x8 LtU -> SXX.I16x8.lt_u - | I16x8 LeS -> SXX.I16x8.le_s - | I16x8 LeU -> SXX.I16x8.le_u - | I16x8 GtS -> SXX.I16x8.gt_s - | I16x8 GtU -> SXX.I16x8.gt_u - | I16x8 GeS -> SXX.I16x8.ge_s - | I16x8 GeU -> SXX.I16x8.ge_u - | I16x8 NarrowS -> SXX.I16x8_convert.narrow_s - | I16x8 NarrowU -> SXX.I16x8_convert.narrow_u - | I16x8 Add -> SXX.I16x8.add - | I16x8 AddSatS -> SXX.I16x8.add_sat_s - | I16x8 AddSatU -> SXX.I16x8.add_sat_u - | I16x8 Sub -> SXX.I16x8.sub - | I16x8 SubSatS -> SXX.I16x8.sub_sat_s - | I16x8 SubSatU -> SXX.I16x8.sub_sat_u - | I16x8 Mul -> SXX.I16x8.mul - | I16x8 MinS -> SXX.I16x8.min_s - | I16x8 MinU -> SXX.I16x8.min_u - | I16x8 MaxS -> SXX.I16x8.max_s - | I16x8 MaxU -> SXX.I16x8.max_u - | I16x8 AvgrU -> SXX.I16x8.avgr_u - | I32x4 Add -> SXX.I32x4.add - | I32x4 Sub -> SXX.I32x4.sub - | I32x4 MinS -> SXX.I32x4.min_s - | I32x4 MinU -> SXX.I32x4.min_u - | I32x4 MaxS -> SXX.I32x4.max_s - | I32x4 MaxU -> SXX.I32x4.max_u - | I32x4 Mul -> SXX.I32x4.mul - | I32x4 Eq -> SXX.I32x4.eq - | I32x4 Ne -> SXX.I32x4.ne - | I32x4 LtS -> SXX.I32x4.lt_s - | I32x4 LtU -> SXX.I32x4.lt_u - | I32x4 LeS -> SXX.I32x4.le_s - | I32x4 LeU -> SXX.I32x4.le_u - | I32x4 GtS -> SXX.I32x4.gt_s - | I32x4 GtU -> SXX.I32x4.gt_u - | I32x4 GeS -> SXX.I32x4.ge_s - | I32x4 GeU -> SXX.I32x4.ge_u - | I64x2 Add -> SXX.I64x2.add - | I64x2 Sub -> SXX.I64x2.sub - | I64x2 Mul -> SXX.I64x2.mul - | F32x4 Eq -> SXX.F32x4.eq - | F32x4 Ne -> SXX.F32x4.ne - | F32x4 Lt -> SXX.F32x4.lt - | F32x4 Le -> SXX.F32x4.le - | F32x4 Gt -> SXX.F32x4.gt - | F32x4 Ge -> SXX.F32x4.ge - | F32x4 Add -> SXX.F32x4.add - | F32x4 Sub -> SXX.F32x4.sub - | F32x4 Mul -> SXX.F32x4.mul - | F32x4 Div -> SXX.F32x4.div - | F32x4 Min -> SXX.F32x4.min - | F32x4 Max -> SXX.F32x4.max - | F32x4 Pmin -> SXX.F32x4.pmin - | F32x4 Pmax -> SXX.F32x4.pmax - | F64x2 Eq -> SXX.F64x2.eq - | F64x2 Ne -> SXX.F64x2.ne - | F64x2 Lt -> SXX.F64x2.lt - | F64x2 Le -> SXX.F64x2.le - | F64x2 Gt -> SXX.F64x2.gt - | F64x2 Ge -> SXX.F64x2.ge - | F64x2 Add -> SXX.F64x2.add - | F64x2 Sub -> SXX.F64x2.sub - | F64x2 Mul -> SXX.F64x2.mul - | F64x2 Div -> SXX.F64x2.div - | F64x2 Min -> SXX.F64x2.min - | F64x2 Max -> SXX.F64x2.max - | F64x2 Pmin -> SXX.F64x2.pmin - | F64x2 Pmax -> SXX.F64x2.pmax - | V128 And -> SXX.V128.and_ - | V128 Or -> SXX.V128.or_ - | V128 Xor -> SXX.V128.xor - | V128 AndNot -> SXX.V128.andnot - | _ -> assert false - in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) - - let testop (op : testop) = - let f = match op with - | I8x16 AnyTrue -> SXX.I8x16.any_true - | I8x16 AllTrue -> SXX.I8x16.all_true - | I16x8 AnyTrue -> SXX.I16x8.any_true - | I16x8 AllTrue -> SXX.I16x8.all_true - | I32x4 AnyTrue -> SXX.I32x4.any_true - | I32x4 AllTrue -> SXX.I32x4.all_true - | _ -> assert false - in fun v -> f (of_value 1 v) - - let relop op = assert false - - let extractop op v = - let v128 = of_value 1 v in - match op with - | I8x16 (SX, imm) -> (I32Op.to_value (SXX.I8x16.extract_lane_s imm v128)) - | I8x16 (ZX, imm) -> (I32Op.to_value (SXX.I8x16.extract_lane_u imm v128)) - | I16x8 (SX, imm) -> (I32Op.to_value (SXX.I16x8.extract_lane_s imm v128)) - | I16x8 (ZX, imm) -> (I32Op.to_value (SXX.I16x8.extract_lane_u imm v128)) - | I32x4 (_, imm) -> (I32Op.to_value (SXX.I32x4.extract_lane_s imm v128)) - | I64x2 (_, imm) -> (I64Op.to_value (SXX.I64x2.extract_lane_s imm v128)) - | F32x4 (_, imm) -> (F32Op.to_value (SXX.F32x4.extract_lane imm v128)) - | F64x2 (_, imm) -> (F64Op.to_value (SXX.F64x2.extract_lane imm v128)) - | _ -> assert false - - let replaceop op v (r : Values.value) = - let v128 = of_value 1 v in - match op, r with - | I8x16 imm, I32 r -> to_value (SXX.I8x16.replace_lane imm v128 r) - | I16x8 imm, I32 r -> to_value (SXX.I16x8.replace_lane imm v128 r) - | I32x4 imm, I32 r -> to_value (SXX.I32x4.replace_lane imm v128 r) - | I64x2 imm, I64 r -> to_value (SXX.I64x2.replace_lane imm v128 r) - | F32x4 imm, F32 r -> to_value (SXX.F32x4.replace_lane imm v128 r) - | F64x2 imm, F64 r -> to_value (SXX.F64x2.replace_lane imm v128 r) - | _ -> assert false - - let ternop op = - let f = match op with - | Bitselect -> SXX.V128.bitselect - in fun v1 v2 v3 -> to_value (f (of_value 1 v1) (of_value 2 v2) (of_value 3 v3)) - - let shiftop (op : shiftop) = - let f = match op with - | I8x16 Shl -> SXX.I8x16.shl - | I8x16 ShrS -> SXX.I8x16.shr_s - | I8x16 ShrU -> SXX.I8x16.shr_u - | I16x8 Shl -> SXX.I16x8.shl - | I16x8 ShrS -> SXX.I16x8.shr_s - | I16x8 ShrU -> SXX.I16x8.shr_u - | I32x4 Shl -> SXX.I32x4.shl - | I32x4 ShrS -> SXX.I32x4.shr_s - | I32x4 ShrU -> SXX.I32x4.shr_u - | I64x2 Shl -> SXX.I64x2.shl - | I64x2 ShrS -> SXX.I64x2.shr_s - | I64x2 ShrU -> SXX.I64x2.shr_u - | _ -> failwith "unimplemented shr_u" - in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) - - let bitmaskop (op : bitmaskop) v = - let f = match op with - | I8x16 Bitmask -> SXX.I8x16.bitmask - | I16x8 Bitmask -> SXX.I16x8.bitmask - | I32x4 Bitmask -> SXX.I32x4.bitmask - | _ -> assert false - in I32 (f (of_value 1 v)) -end - -module V128Op = SimdOp (V128) (Values.V128Value) - (* Conversion operators *) module I32CvtOp = @@ -412,27 +189,6 @@ struct | DemoteF64 -> raise (TypeError (1, v, F64Type)) end -module V128CvtOp = -struct - open Ast.SimdOp - - let cvtop op v : value = - match op with - | I8x16 Splat -> V128 (V128.I8x16.splat (I32Op.of_value 1 v)) - | I16x8 Splat -> V128 (V128.I16x8.splat (I32Op.of_value 1 v)) - | I32x4 Splat -> V128 (V128.I32x4.splat (I32Op.of_value 1 v)) - | I64x2 Splat -> V128 (V128.I64x2.splat (I64Op.of_value 1 v)) - | F32x4 Splat -> V128 (V128.F32x4.splat (F32Op.of_value 1 v)) - | F64x2 Splat -> V128 (V128.F64x2.splat (F64Op.of_value 1 v)) - | _ -> assert false -end - -let eval_extractop extractop v = V128Op.extractop extractop v -let eval_replaceop replaceop = V128Op.replaceop replaceop -let eval_ternop ternop v = V128Op.ternop ternop v -let eval_shiftop shiftop v = V128Op.shiftop shiftop v -let eval_bitmaskop bitmaskop v = V128Op.bitmaskop bitmaskop v - (* Dispatch *) let op i32 i64 f32 f64 v128 = function @@ -442,8 +198,9 @@ let op i32 i64 f32 f64 v128 = function | F64 x -> f64 x | V128 x -> v128 x -let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop V128Op.unop -let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop V128Op.binop -let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop V128Op.testop -let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop V128Op.relop -let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop V128CvtOp.cvtop +let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop Eval_simd.unop +let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop Eval_simd.binop +let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop Eval_simd.testop +let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop Eval_simd.relop +let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop Eval_simd.cvtop + diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index b5b25759b9..7435b3c6bb 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -7,8 +7,3 @@ val eval_binop : Ast.binop -> value -> value -> value val eval_testop : Ast.testop -> value -> bool val eval_relop : Ast.relop -> value -> value -> bool val eval_cvtop : Ast.cvtop -> value -> value -val eval_extractop : Ast.extractop -> value -> value -val eval_replaceop : Ast.replaceop -> value -> value -> value -val eval_ternop : Ast.ternop -> value -> value -> value -> value -val eval_shiftop : Ast.shiftop -> value -> value -> value -val eval_bitmaskop : Ast.bitmaskop -> value -> value diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml new file mode 100644 index 0000000000..5214e53e71 --- /dev/null +++ b/interpreter/exec/eval_simd.ml @@ -0,0 +1,256 @@ +open Types +open Values + +exception TypeError of int * value * value_type + +let of_arg f n v = try f v with Value t -> raise (TypeError (n, v, t)) + +module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct + open Ast.SimdOp + + let to_value = Value.to_value + + let of_value = of_arg Value.of_value + + let unop (op : unop) = + fun v -> match op with + | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) + | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) + | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) + | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) + | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v)) + | I16x8 WidenHighS -> to_value (SXX.I16x8_convert.widen_high_s (of_value 1 v)) + | I16x8 WidenLowU -> to_value (SXX.I16x8_convert.widen_low_u (of_value 1 v)) + | I16x8 WidenHighU -> to_value (SXX.I16x8_convert.widen_high_u (of_value 1 v)) + | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) + | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) + | I32x4 WidenLowS -> to_value (SXX.I32x4_convert.widen_low_s (of_value 1 v)) + | I32x4 WidenHighS -> to_value (SXX.I32x4_convert.widen_high_s (of_value 1 v)) + | I32x4 WidenLowU -> to_value (SXX.I32x4_convert.widen_low_u (of_value 1 v)) + | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) + | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) + | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) + | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) + | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) + | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) + | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) + | F32x4 Ceil -> to_value (SXX.F32x4.ceil (of_value 1 v)) + | F32x4 Floor -> to_value (SXX.F32x4.floor (of_value 1 v)) + | F32x4 Trunc -> to_value (SXX.F32x4.trunc (of_value 1 v)) + | F32x4 Nearest -> to_value (SXX.F32x4.nearest (of_value 1 v)) + | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) + | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) + | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) + | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) + | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) + | F64x2 Ceil -> to_value (SXX.F64x2.ceil (of_value 1 v)) + | F64x2 Floor -> to_value (SXX.F64x2.floor (of_value 1 v)) + | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) + | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) + | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) + | _ -> assert false + + let binop (op : binop) = + let f = match op with + | I8x16 Swizzle -> SXX.V8x16.swizzle + | I8x16 (Shuffle imms) -> fun a b -> SXX.V8x16.shuffle a b imms + | I8x16 Eq -> SXX.I8x16.eq + | I8x16 Ne -> SXX.I8x16.ne + | I8x16 LtS -> SXX.I8x16.lt_s + | I8x16 LtU -> SXX.I8x16.lt_u + | I8x16 LeS -> SXX.I8x16.le_s + | I8x16 LeU -> SXX.I8x16.le_u + | I8x16 GtS -> SXX.I8x16.gt_s + | I8x16 GtU -> SXX.I8x16.gt_u + | I8x16 GeS -> SXX.I8x16.ge_s + | I8x16 GeU -> SXX.I8x16.ge_u + | I8x16 NarrowS -> SXX.I8x16_convert.narrow_s + | I8x16 NarrowU -> SXX.I8x16_convert.narrow_u + | I8x16 Add -> SXX.I8x16.add + | I8x16 AddSatS -> SXX.I8x16.add_sat_s + | I8x16 AddSatU -> SXX.I8x16.add_sat_u + | I8x16 Sub -> SXX.I8x16.sub + | I8x16 SubSatS -> SXX.I8x16.sub_sat_s + | I8x16 SubSatU -> SXX.I8x16.sub_sat_u + | I8x16 MinS -> SXX.I8x16.min_s + | I8x16 MinU -> SXX.I8x16.min_u + | I8x16 MaxS -> SXX.I8x16.max_s + | I8x16 MaxU -> SXX.I8x16.max_u + | I8x16 AvgrU -> SXX.I8x16.avgr_u + | I16x8 Eq -> SXX.I16x8.eq + | I16x8 Ne -> SXX.I16x8.ne + | I16x8 LtS -> SXX.I16x8.lt_s + | I16x8 LtU -> SXX.I16x8.lt_u + | I16x8 LeS -> SXX.I16x8.le_s + | I16x8 LeU -> SXX.I16x8.le_u + | I16x8 GtS -> SXX.I16x8.gt_s + | I16x8 GtU -> SXX.I16x8.gt_u + | I16x8 GeS -> SXX.I16x8.ge_s + | I16x8 GeU -> SXX.I16x8.ge_u + | I16x8 NarrowS -> SXX.I16x8_convert.narrow_s + | I16x8 NarrowU -> SXX.I16x8_convert.narrow_u + | I16x8 Add -> SXX.I16x8.add + | I16x8 AddSatS -> SXX.I16x8.add_sat_s + | I16x8 AddSatU -> SXX.I16x8.add_sat_u + | I16x8 Sub -> SXX.I16x8.sub + | I16x8 SubSatS -> SXX.I16x8.sub_sat_s + | I16x8 SubSatU -> SXX.I16x8.sub_sat_u + | I16x8 Mul -> SXX.I16x8.mul + | I16x8 MinS -> SXX.I16x8.min_s + | I16x8 MinU -> SXX.I16x8.min_u + | I16x8 MaxS -> SXX.I16x8.max_s + | I16x8 MaxU -> SXX.I16x8.max_u + | I16x8 AvgrU -> SXX.I16x8.avgr_u + | I32x4 Add -> SXX.I32x4.add + | I32x4 Sub -> SXX.I32x4.sub + | I32x4 MinS -> SXX.I32x4.min_s + | I32x4 MinU -> SXX.I32x4.min_u + | I32x4 MaxS -> SXX.I32x4.max_s + | I32x4 MaxU -> SXX.I32x4.max_u + | I32x4 Mul -> SXX.I32x4.mul + | I32x4 Eq -> SXX.I32x4.eq + | I32x4 Ne -> SXX.I32x4.ne + | I32x4 LtS -> SXX.I32x4.lt_s + | I32x4 LtU -> SXX.I32x4.lt_u + | I32x4 LeS -> SXX.I32x4.le_s + | I32x4 LeU -> SXX.I32x4.le_u + | I32x4 GtS -> SXX.I32x4.gt_s + | I32x4 GtU -> SXX.I32x4.gt_u + | I32x4 GeS -> SXX.I32x4.ge_s + | I32x4 GeU -> SXX.I32x4.ge_u + | I64x2 Add -> SXX.I64x2.add + | I64x2 Sub -> SXX.I64x2.sub + | I64x2 Mul -> SXX.I64x2.mul + | F32x4 Eq -> SXX.F32x4.eq + | F32x4 Ne -> SXX.F32x4.ne + | F32x4 Lt -> SXX.F32x4.lt + | F32x4 Le -> SXX.F32x4.le + | F32x4 Gt -> SXX.F32x4.gt + | F32x4 Ge -> SXX.F32x4.ge + | F32x4 Add -> SXX.F32x4.add + | F32x4 Sub -> SXX.F32x4.sub + | F32x4 Mul -> SXX.F32x4.mul + | F32x4 Div -> SXX.F32x4.div + | F32x4 Min -> SXX.F32x4.min + | F32x4 Max -> SXX.F32x4.max + | F32x4 Pmin -> SXX.F32x4.pmin + | F32x4 Pmax -> SXX.F32x4.pmax + | F64x2 Eq -> SXX.F64x2.eq + | F64x2 Ne -> SXX.F64x2.ne + | F64x2 Lt -> SXX.F64x2.lt + | F64x2 Le -> SXX.F64x2.le + | F64x2 Gt -> SXX.F64x2.gt + | F64x2 Ge -> SXX.F64x2.ge + | F64x2 Add -> SXX.F64x2.add + | F64x2 Sub -> SXX.F64x2.sub + | F64x2 Mul -> SXX.F64x2.mul + | F64x2 Div -> SXX.F64x2.div + | F64x2 Min -> SXX.F64x2.min + | F64x2 Max -> SXX.F64x2.max + | F64x2 Pmin -> SXX.F64x2.pmin + | F64x2 Pmax -> SXX.F64x2.pmax + | V128 And -> SXX.V128.and_ + | V128 Or -> SXX.V128.or_ + | V128 Xor -> SXX.V128.xor + | V128 AndNot -> SXX.V128.andnot + | _ -> assert false + in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) + + let testop (op : testop) = + let f = match op with + | I8x16 AnyTrue -> SXX.I8x16.any_true + | I8x16 AllTrue -> SXX.I8x16.all_true + | I16x8 AnyTrue -> SXX.I16x8.any_true + | I16x8 AllTrue -> SXX.I16x8.all_true + | I32x4 AnyTrue -> SXX.I32x4.any_true + | I32x4 AllTrue -> SXX.I32x4.all_true + | _ -> assert false + in fun v -> f (of_value 1 v) + + let relop op = assert false + + let extractop op v = + let v128 = of_value 1 v in + match op with + | I8x16 (SX, imm) -> (I32 (SXX.I8x16.extract_lane_s imm v128)) + | I8x16 (ZX, imm) -> (I32 (SXX.I8x16.extract_lane_u imm v128)) + | I16x8 (SX, imm) -> (I32 (SXX.I16x8.extract_lane_s imm v128)) + | I16x8 (ZX, imm) -> (I32 (SXX.I16x8.extract_lane_u imm v128)) + | I32x4 (_, imm) -> (I32 (SXX.I32x4.extract_lane_s imm v128)) + | I64x2 (_, imm) -> (I64 (SXX.I64x2.extract_lane_s imm v128)) + | F32x4 (_, imm) -> (F32 (SXX.F32x4.extract_lane imm v128)) + | F64x2 (_, imm) -> (F64 (SXX.F64x2.extract_lane imm v128)) + | _ -> assert false + + let replaceop op v (r : Values.value) = + let v128 = of_value 1 v in + match op, r with + | I8x16 imm, I32 r -> to_value (SXX.I8x16.replace_lane imm v128 r) + | I16x8 imm, I32 r -> to_value (SXX.I16x8.replace_lane imm v128 r) + | I32x4 imm, I32 r -> to_value (SXX.I32x4.replace_lane imm v128 r) + | I64x2 imm, I64 r -> to_value (SXX.I64x2.replace_lane imm v128 r) + | F32x4 imm, F32 r -> to_value (SXX.F32x4.replace_lane imm v128 r) + | F64x2 imm, F64 r -> to_value (SXX.F64x2.replace_lane imm v128 r) + | _ -> assert false + + let ternop op = + let f = match op with + | Bitselect -> SXX.V128.bitselect + in fun v1 v2 v3 -> to_value (f (of_value 1 v1) (of_value 2 v2) (of_value 3 v3)) + + let shiftop (op : shiftop) = + let f = match op with + | I8x16 Shl -> SXX.I8x16.shl + | I8x16 ShrS -> SXX.I8x16.shr_s + | I8x16 ShrU -> SXX.I8x16.shr_u + | I16x8 Shl -> SXX.I16x8.shl + | I16x8 ShrS -> SXX.I16x8.shr_s + | I16x8 ShrU -> SXX.I16x8.shr_u + | I32x4 Shl -> SXX.I32x4.shl + | I32x4 ShrS -> SXX.I32x4.shr_s + | I32x4 ShrU -> SXX.I32x4.shr_u + | I64x2 Shl -> SXX.I64x2.shl + | I64x2 ShrS -> SXX.I64x2.shr_s + | I64x2 ShrU -> SXX.I64x2.shr_u + | _ -> failwith "unimplemented shr_u" + in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) + + let bitmaskop (op : bitmaskop) v = + let f = match op with + | I8x16 Bitmask -> SXX.I8x16.bitmask + | I16x8 Bitmask -> SXX.I16x8.bitmask + | I32x4 Bitmask -> SXX.I32x4.bitmask + | _ -> assert false + in I32 (f (of_value 1 v)) + +end + +module V128Op = SimdOp (V128) (Values.V128Value) + +module V128CvtOp = +struct + open Ast.SimdOp + + let cvtop op v : value = + match op with + | I8x16 Splat -> V128 (V128.I8x16.splat (of_arg I32Value.of_value 1 v)) + | I16x8 Splat -> V128 (V128.I16x8.splat (of_arg I32Value.of_value 1 v)) + | I32x4 Splat -> V128 (V128.I32x4.splat (of_arg I32Value.of_value 1 v)) + | I64x2 Splat -> V128 (V128.I64x2.splat (of_arg I64Value.of_value 1 v)) + | F32x4 Splat -> V128 (V128.F32x4.splat (of_arg F32Value.of_value 1 v)) + | F64x2 Splat -> V128 (V128.F64x2.splat (of_arg F64Value.of_value 1 v)) + | _ -> assert false +end + + +let unop = V128Op.unop +let binop = V128Op.binop +let testop = V128Op.testop +let relop = V128Op.relop +let cvtop = V128CvtOp.cvtop + +let eval_extractop extractop v = V128Op.extractop extractop v +let eval_replaceop replaceop v r = V128Op.replaceop replaceop v r +let eval_ternop = V128Op.ternop +let eval_shiftop = V128Op.shiftop +let eval_bitmaskop = V128Op.bitmaskop diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli new file mode 100644 index 0000000000..89687f75db --- /dev/null +++ b/interpreter/exec/eval_simd.mli @@ -0,0 +1,15 @@ +open Values + +exception TypeError of int * value * Types.value_type + +val unop : Ast.V128Op.unop -> value -> value +val binop : Ast.V128Op.binop -> value -> value -> value +val testop : Ast.V128Op.testop -> value -> bool +val relop : Ast.V128Op.relop -> value -> value -> bool +val cvtop : Ast.V128Op.cvtop -> value -> value + +val eval_ternop : Ast.V128Op.ternop -> value -> value -> value -> value +val eval_shiftop : Ast.V128Op.shiftop -> value -> value -> value +val eval_bitmaskop : Ast.V128Op.bitmaskop -> value -> value +val eval_extractop : Ast.V128Op.extractop -> value -> value +val eval_replaceop : Ast.V128Op.replaceop -> value -> value -> value diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 0eb05f00f3..a7ebf5e33d 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -156,8 +156,8 @@ and instr' = | Compare of relop (* numeric comparison *) | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) - | Ternary of ternop (* ternary numeric operator *) | Convert of cvtop (* conversion *) + | SimdTernary of ternop (* ternary v128 operator *) | SimdExtract of extractop (* extract lane from v128 value *) | SimdReplace of replaceop (* replace lane of v128 value *) | SimdShift of shiftop (* shifts for v128 value *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 8c77f75d93..2e0d008b06 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -245,7 +245,7 @@ let v128_and = Binary (V128 V128Op.(V128 And)) let v128_andnot = Binary (V128 V128Op.(V128 AndNot)) let v128_or = Binary (V128 V128Op.(V128 Or)) let v128_xor = Binary (V128 V128Op.(V128 Xor)) -let v128_bitselect = Ternary (V128Op.Bitselect) +let v128_bitselect = SimdTernary (V128Op.Bitselect) let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index f2507a513a..416df398ee 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -509,8 +509,8 @@ let rec instr e = | Compare op -> relop op, [] | Unary op -> unop op, [] | Binary op -> binop op, [] - | Ternary op -> ternop op, [] | Convert op -> cvtop op, [] + | SimdTernary op -> ternop op, [] | SimdExtract op -> SimdOp.extractop op, [] | SimdReplace op -> SimdOp.replaceop op, [] | SimdShift op -> SimdOp.shiftop op, [] diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 7a6dd4f17d..f919674382 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -345,14 +345,14 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = let t = type_binop binop in [t; t] --> [t] - | Ternary ternop -> - let t = V128Type in - [t; t; t] --> [t] - | Convert cvtop -> let t1, t2 = type_cvtop e.at cvtop in [t1] --> [t2] + | SimdTernary ternop -> + let t = V128Type in + [t; t; t] --> [t] + | SimdExtract (V128Op.V128 _) -> assert false | SimdExtract extractop -> check_simd_extract_lane_index extractop e.at; From 8af851e2947a16766e64076a06926908a1b9721a Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Thu, 15 Oct 2020 17:46:43 +0200 Subject: [PATCH 253/378] Tweak Firefox implementation status (#384) --- proposals/simd/ImplementationStatus.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index e50409829b..68178f9a73 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -199,6 +199,6 @@ [4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` -[5] Firefox Nightly x64/x86 SSE4.1+ only, disable in about:config under `javascript.options.wasm_simd` +[5] Firefox x64/x86 SSE4.1+ only, enabled in Nightly, disabled in other channels, control in about:config under `javascript.options.wasm_simd` [6] Will only be in Chrome M87 onwards. From a5eb71a418f876578fe7719a658368812b1500e6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 19 Oct 2020 09:22:50 -0700 Subject: [PATCH 254/378] Remove unnecessary types for Bitmask (#385) --- interpreter/binary/encode.ml | 6 +++--- interpreter/exec/eval_simd.ml | 8 ++++---- interpreter/exec/eval_simd.mli | 2 +- interpreter/syntax/ast.ml | 5 +---- interpreter/syntax/operators.ml | 6 +++--- interpreter/text/arrange.ml | 6 +++--- 6 files changed, 15 insertions(+), 18 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index aea746bcf0..3dccb42434 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -593,9 +593,9 @@ let encode m = | SimdShift V128Op.(I64x2 ShrU) -> simd_op 0xcdl | SimdShift (_) -> assert false - | SimdBitmask V128Op.(I8x16 Bitmask) -> simd_op 0x64l - | SimdBitmask V128Op.(I16x8 Bitmask) -> simd_op 0x84l - | SimdBitmask V128Op.(I32x4 Bitmask) -> simd_op 0xa4l + | SimdBitmask Simd.I8x16 -> simd_op 0x64l + | SimdBitmask Simd.I16x8 -> simd_op 0x84l + | SimdBitmask Simd.I32x4 -> simd_op 0xa4l | SimdBitmask (_) -> assert false | _ -> assert false diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 5214e53e71..624062919a 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -215,11 +215,11 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | _ -> failwith "unimplemented shr_u" in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) - let bitmaskop (op : bitmaskop) v = + let bitmaskop (op : Simd.shape) v = let f = match op with - | I8x16 Bitmask -> SXX.I8x16.bitmask - | I16x8 Bitmask -> SXX.I16x8.bitmask - | I32x4 Bitmask -> SXX.I32x4.bitmask + | Simd.I8x16 -> SXX.I8x16.bitmask + | Simd.I16x8 -> SXX.I16x8.bitmask + | Simd.I32x4 -> SXX.I32x4.bitmask | _ -> assert false in I32 (f (of_value 1 v)) diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli index 89687f75db..3e47f8bb27 100644 --- a/interpreter/exec/eval_simd.mli +++ b/interpreter/exec/eval_simd.mli @@ -10,6 +10,6 @@ val cvtop : Ast.V128Op.cvtop -> value -> value val eval_ternop : Ast.V128Op.ternop -> value -> value -> value -> value val eval_shiftop : Ast.V128Op.shiftop -> value -> value -> value -val eval_bitmaskop : Ast.V128Op.bitmaskop -> value -> value +val eval_bitmaskop : Simd.shape -> value -> value val eval_extractop : Ast.V128Op.extractop -> value -> value val eval_replaceop : Ast.V128Op.replaceop -> value -> value -> value diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index a7ebf5e33d..748b852cef 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -86,8 +86,6 @@ struct type replaceop = (int, int, int, int, int, int, int) v128op type shift = Shl | ShrS | ShrU type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op - type bitmask = Bitmask - type bitmaskop = (bitmask, bitmask, bitmask, bitmask, bitmask, bitmask, bitmask) v128op end module I32Op = IntOp @@ -106,7 +104,6 @@ type replaceop = V128Op.replaceop (* Ternary operators only exist for V128 types for now *) type ternop = V128Op.ternop type shiftop = V128Op.shiftop -type bitmaskop = V128Op.bitmaskop type 'a memop = {ty : value_type; align : int; offset : Memory.offset; sz : 'a option} @@ -161,7 +158,7 @@ and instr' = | SimdExtract of extractop (* extract lane from v128 value *) | SimdReplace of replaceop (* replace lane of v128 value *) | SimdShift of shiftop (* shifts for v128 value *) - | SimdBitmask of bitmaskop (* bitmask for v128 value *) + | SimdBitmask of Simd.shape (* bitmask for v128 value *) (* Globals & Functions *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 2e0d008b06..34bffee9b9 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -266,7 +266,7 @@ let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) let i8x16_neg = Unary (V128 V128Op.(I8x16 Neg)) let i8x16_any_true = Test (V128 V128Op.(I8x16 AnyTrue)) -let i8x16_bitmask = SimdBitmask V128Op.(I8x16 Bitmask) +let i8x16_bitmask = SimdBitmask Simd.I8x16 let i8x16_all_true = Test (V128 V128Op.(I8x16 AllTrue)) let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) @@ -306,7 +306,7 @@ let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) let i16x8_neg = Unary (V128 V128Op.(I16x8 Neg)) let i16x8_any_true = Test (V128 V128Op.(I16x8 AnyTrue)) -let i16x8_bitmask = SimdBitmask V128Op.(I16x8 Bitmask) +let i16x8_bitmask = SimdBitmask Simd.I16x8 let i16x8_all_true = Test (V128 V128Op.(I16x8 AllTrue)) let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) @@ -343,7 +343,7 @@ let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) let i32x4_abs = Unary (V128 V128Op.(I32x4 Abs)) let i32x4_neg = Unary (V128 V128Op.(I32x4 Neg)) let i32x4_any_true = Test (V128 V128Op.(I32x4 AnyTrue)) -let i32x4_bitmask = SimdBitmask V128Op.(I32x4 Bitmask) +let i32x4_bitmask = SimdBitmask Simd.I32x4 let i32x4_all_true = Test (V128 V128Op.(I32x4 AllTrue)) let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) let i32x4_widen_high_i16x8_s = Unary (V128 V128Op.(I32x4 WidenHighS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 416df398ee..88c443e96d 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -390,9 +390,9 @@ struct | _ -> assert false let bitmaskop = function - | I8x16 Bitmask -> "i8x16.bitmask" - | I16x8 Bitmask -> "i16x8.bitmask" - | I32x4 Bitmask -> "i32x4.bitmask" + | Simd.I8x16 -> "i8x16.bitmask" + | Simd.I16x8 -> "i16x8.bitmask" + | Simd.I32x4 -> "i32x4.bitmask" | _ -> assert false end From b9b54b065cbf732b04e39d336a0aefdba3196d44 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 19 Oct 2020 15:51:29 -0700 Subject: [PATCH 255/378] v128.load32_zero and v128.load64_zero instructions (#237) --- proposals/simd/BinarySIMD.md | 2 ++ proposals/simd/ImplementationStatus.md | 2 ++ proposals/simd/NewOpcodes.md | 2 ++ proposals/simd/SIMD.md | 18 ++++++++++++++++++ 4 files changed, 24 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 4297afbd38..5991031b92 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -222,3 +222,5 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | | `f32x4.convert_i32x4_s` | `0xfa`| - | | `f32x4.convert_i32x4_u` | `0xfb`| - | +| `v128.load32_zero` | `0xfc`| - | +| `v128.load64_zero` | `0xfd`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 68178f9a73..2879f64862 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -190,6 +190,8 @@ | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_zero` | | | | | | +| `v128.load64_zero` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index e9aa7efb56..6b2b77adfe 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -12,6 +12,8 @@ | v128.load32_splat | 0x09 | | v128.load64_splat | 0x0a | | v128.store | 0x0b | +| v128.load32_zero | 0xfc | +| v128.load64_zero | 0xfd | | Basic operation | opcode | | ----------------| ------ | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 0b6b9cde6b..4d217a4479 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -766,6 +766,24 @@ def S.load(memarg): return S.from_bytes(memory[memarg.offset:memarg.offset + 16]) ``` +### Load and Zero-Pad + +* `v128.load32_zero(memarg) -> v128` +* `v128.load64_zero(memarg) -> v128` + +Load a single 32-bit or 64-bit element into the lowest bits of a `v128` vector, +and initialize all other bits of the `v128` vector to zero. + +```python +def S.load32_zero(memarg): + return S.from_bytes(memory[memarg.offset:memarg.offset + 4]) +``` + +```python +def S.load64_zero(memarg): + return S.from_bytes(memory[memarg.offset:memarg.offset + 8]) +``` + ### Load and Splat * `v128.load8_splat(memarg) -> v128` From 1cfd484b8a414c2208c400f093dfd5c91d81b10a Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 19 Oct 2020 15:52:43 -0700 Subject: [PATCH 256/378] i32x4.dot_i16x8_s instruction (#127) * i32x4.dot_i16x8_s instruction * Update proposals/simd/ImplementationStatus.md Co-authored-by: Thomas Lively <7121787+tlively@users.noreply.github.com> Co-authored-by: Thomas Lively <7121787+tlively@users.noreply.github.com> --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/NewOpcodes.md | 4 ++-- proposals/simd/SIMD.md | 5 +++++ 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 5991031b92..19077bb2e3 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -181,6 +181,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.min_u` | `0xb7`| - | | `i32x4.max_s` | `0xb8`| - | | `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | | `i64x2.neg` | `0xc1`| - | | `i64x2.shl` | `0xcb`| - | | `i64x2.shr_s` | `0xcc`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 2879f64862..8e36f82708 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,6 +149,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.dot_i16x8_s` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 6b2b77adfe..a92c44b17a 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -100,13 +100,13 @@ | i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | | i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | | i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | -| ---- dot ---- | 0x74 | ---- dot ---- | 0x94 | ---- dot ---- | 0xb4 | ---- | 0xd4 | +| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | | ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | | i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | | i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | | i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | | i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | -| ---- avgr_s ---- | 0x7a | ---- avgr_s ---- | 0x9a | ---- avgr_s ---- | 0xba | ---- | 0xda | +| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | | i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | | f32x4 Op | opcode | f64x2 Op | opcode | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 4d217a4479..8e4a940804 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -395,6 +395,11 @@ def S.mul(a, b): return S.lanewise_binary(mul, a, b) ``` +### Integer dot product +* `i32x4.dot_i16x8_s(a: v128, b: v128) -> v128` + +Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results. + ### Integer negation * `i8x16.neg(a: v128) -> v128` * `i16x8.neg(a: v128) -> v128` From 2e2e494363aa2f2677996bb09c9d129a99e6e196 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 2 Nov 2020 16:41:44 +0800 Subject: [PATCH 257/378] Implement v128.load32_zero and v128.load64_zero (#388) The tests are adapted from load_extend tests. --- interpreter/runtime/memory.ml | 6 +- interpreter/syntax/operators.ml | 6 ++ interpreter/syntax/types.ml | 1 + interpreter/text/lexer.mll | 4 + test/core/simd/simd_load_zero.wast | 154 +++++++++++++++++++++++++++++ 5 files changed, 169 insertions(+), 2 deletions(-) create mode 100644 test/core/simd/simd_load_zero.wast diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index ffb65432fc..5d4ccfb493 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -133,9 +133,9 @@ let load_packed sz ext mem a o t = let load_simd_packed pack_size simd_load mem a o t = let n = packed_size pack_size in - assert (n <= Types.size t); + assert (n < Types.size t); let x = loadn mem a o n in - let b = Bytes.create 16 in + let b = Bytes.make 16 '\x00' in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in match pack_size, simd_load with @@ -149,6 +149,8 @@ let load_simd_packed pack_size simd_load mem a o t = | Pack16, PackSplat -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) | Pack32, PackSplat -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) | Pack64, PackSplat -> V128 (V128.I64x2.splat x) + | Pack32, PackZero -> V128 v + | Pack64, PackZero -> V128 v | _ -> assert false let store_packed sz mem a o v = diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 34bffee9b9..1a5a92b4f0 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -238,6 +238,12 @@ let v128_load32_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackSplat)} let v128_load64_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} + +let v128_load32_zero align offset = + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackZero)} +let v128_load64_zero align offset = + SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackZero)} + let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = None} let v128_not = Unary (V128 V128Op.(V128 Not)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 4b440e1967..9c912e4ba2 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -23,6 +23,7 @@ type pack_simd = | Pack8x8 of extension | Pack16x4 of extension | Pack32x2 of extension + | PackZero (* Attributes *) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index ae2cb2c984..b24310a2ac 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -302,6 +302,10 @@ rule token = parse { LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } | "v128.load64_splat" { LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } + | "v128.load32_zero" + { LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } + | "v128.load64_zero" + { LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } | (ixx as t)".store"(mem_size as sz) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; STORE (fun a o -> diff --git a/test/core/simd/simd_load_zero.wast b/test/core/simd/simd_load_zero.wast new file mode 100644 index 0000000000..6276a68637 --- /dev/null +++ b/test/core/simd/simd_load_zero.wast @@ -0,0 +1,154 @@ +;; Load and Zero extend test cases + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + (data (i32.const 65520) "\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + + (func (export "v128.load32_zero") (param $0 i32) (result v128) + (v128.load32_zero (local.get $0)) + ) + (func (export "v128.load64_zero") (param $0 i32) (result v128) + (v128.load64_zero (local.get $0)) + ) + + ;; load by a constant amount + (func (export "v128.load32_zero_const0") (result v128) + (v128.load32_zero (i32.const 0)) + ) + (func (export "v128.load64_zero_const8") (result v128) + (v128.load64_zero (i32.const 8)) + ) + + ;; load data with different offset/align arguments + ;; i16x8 + (func (export "v128.load32_zero_offset0") (param $0 i32) (result v128) + (v128.load32_zero offset=0 (local.get $0)) + ) + (func (export "v128.load32_zero_align1") (param $0 i32) (result v128) + (v128.load32_zero align=1 (local.get $0)) + ) + (func (export "v128.load32_zero_offset0_align1") (param $0 i32) (result v128) + (v128.load32_zero offset=0 align=1 (local.get $0)) + ) + (func (export "v128.load32_zero_offset1_align1") (param $0 i32) (result v128) + (v128.load32_zero offset=1 align=1 (local.get $0)) + ) + (func (export "v128.load32_zero_offset10_align4") (param $0 i32) (result v128) + (v128.load32_zero offset=10 align=4 (local.get $0)) + ) + (func (export "v128.load64_zero_offset0") (param $0 i32) (result v128) + (v128.load64_zero offset=0 (local.get $0)) + ) + (func (export "v128.load64_zero_align1") (param $0 i32) (result v128) + (v128.load64_zero align=1 (local.get $0)) + ) + (func (export "v128.load64_zero_offset0_align1") (param $0 i32) (result v128) + (v128.load64_zero offset=0 align=1 (local.get $0)) + ) + (func (export "v128.load64_zero_offset1_align1") (param $0 i32) (result v128) + (v128.load64_zero offset=1 align=1 (local.get $0)) + ) + (func (export "v128.load64_zero_offset10_align4") (param $0 i32) (result v128) + (v128.load64_zero offset=10 align=4 (local.get $0)) + ) + (func (export "v128.load64_zero_offset20_align8") (param $0 i32) (result v128) + (v128.load64_zero offset=20 align=8 (local.get $0)) + ) +) + + +;; normal +(assert_return (invoke "v128.load32_zero" (i32.const 0)) (v128.const i32x4 0x03020100 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero" (i32.const 0)) (v128.const i64x2 0x0706050403020100 0x0000000000000000)) +(assert_return (invoke "v128.load32_zero" (i32.const 10)) (v128.const i32x4 0x0D0C0B0A 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero" (i32.const 10)) (v128.const i64x2 0x81800F0E0D0C0B0A 0x0000000000000000)) +(assert_return (invoke "v128.load32_zero" (i32.const 20)) (v128.const i32x4 0x87868584 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero" (i32.const 20)) (v128.const i64x2 0x0000898887868584 0x0000000000000000)) + +;; load by a constant amount +(assert_return (invoke "v128.load32_zero_const0") (v128.const i32x4 0x03020100 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero_const8") (v128.const i64x2 0x0F0E0D0C0B0A0908 0x0000000000000000)) + +;; load data with different offset/align arguments +;; load32_zero +(assert_return (invoke "v128.load32_zero_offset0" (i32.const 0)) (v128.const i32x4 0x03020100 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load32_zero_align1" (i32.const 1)) (v128.const i32x4 0x04030201 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load32_zero_offset0_align1" (i32.const 2)) (v128.const i32x4 0x05040302 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load32_zero_offset10_align4" (i32.const 3)) (v128.const i32x4 0x800F0E0D 0x00000000 0x00000000 0x00000000)) + +;; load64_zero +(assert_return (invoke "v128.load64_zero_offset0" (i32.const 0)) (v128.const i64x2 0x0706050403020100 0x0000000000000000)) +(assert_return (invoke "v128.load64_zero_align1" (i32.const 1)) (v128.const i64x2 0x0807060504030201 0x0000000000000000)) +(assert_return (invoke "v128.load64_zero_offset0_align1" (i32.const 2)) (v128.const i64x2 0x0908070605040302 0x0000000000000000)) +(assert_return (invoke "v128.load64_zero_offset10_align4" (i32.const 3)) (v128.const i64x2 0x84838281800F0E0D 0x0000000000000000)) +(assert_return (invoke "v128.load64_zero_offset20_align8" (i32.const 4)) (v128.const i64x2 0x0000000000008988 0x0000000000000000)) + +;; out of bounds memory access +(assert_trap (invoke "v128.load32_zero" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load64_zero" (i32.const -1)) "out of bounds memory access") + +(assert_trap (invoke "v128.load32_zero_offset1_align1" (i32.const -1)) "out of bounds memory access") +(assert_trap (invoke "v128.load64_zero_offset1_align1" (i32.const -1)) "out of bounds memory access") + +;; type check +(assert_invalid (module (memory 0) (func (result v128) (v128.load32_zero (f32.const 0)))) "type mismatch") +(assert_invalid (module (memory 0) (func (result v128) (v128.load64_zero (f32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module (memory 0) + (func $v128.load32_zero-arg-empty (result v128) + (v128.load32_zero) + ) + ) + "type mismatch" +) +(assert_invalid + (module (memory 0) + (func $v128.load64_zero-arg-empty (result v128) + (v128.load64_zero) + ) + ) + "type mismatch" +) + +;; Unknown operator + +(assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i16x8.load16x4_u (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i32x4.load32x2_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i32x4.load32x2_u (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load64x1_s (i32.const 0))))") "unknown operator") +(assert_malformed (module quote "(memory 1) (func (drop (i64x2.load64x1_u (i32.const 0))))") "unknown operator") + +;; combination +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\80\81\82\83\84\85\86\87\88\89") + (func (export "v128.load32_zero-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load32_zero (i32.const 0)))) + ) + (func (export "v128.load64_zero-in-block") (result v128) + (block (result v128) (block (result v128) (v128.load64_zero (i32.const 1)))) + ) + (func (export "v128.load32_zero-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load32_zero (i32.const 6)))) + ) + (func (export "v128.load64_zero-as-br-value") (result v128) + (block (result v128) (br 0 (v128.load64_zero (i32.const 7)))) + ) + (func (export "v128.load32_zero-extract_lane_s-operand") (result i32) + (i32x4.extract_lane 0 (v128.load32_zero (i32.const 12))) + ) + (func (export "v128.load64_zero-extract_lane_s-operand") (result i64) + (i64x2.extract_lane 0 (v128.load64_zero (i32.const 13))) + ) +) +(assert_return (invoke "v128.load32_zero-in-block") (v128.const i32x4 0x03020100 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero-in-block") (v128.const i64x2 0x0807060504030201 0x0000000000000000)) +(assert_return (invoke "v128.load32_zero-as-br-value") (v128.const i32x4 0x09080706 0x00000000 0x00000000 0x00000000)) +(assert_return (invoke "v128.load64_zero-as-br-value") (v128.const i64x2 0x0E0D0C0B0A090807 0x0000000000000000)) +(assert_return (invoke "v128.load32_zero-extract_lane_s-operand") (i32.const 0x0F0E0D0C)) +(assert_return (invoke "v128.load64_zero-extract_lane_s-operand") (i64.const 0x84838281800F0E0D)) From 2f4dc50406e5f882d4aaec3f97e5f3d8897fcecb Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 2 Nov 2020 19:41:34 +0800 Subject: [PATCH 258/378] Fix encode, decode for load_zero (#391) --- interpreter/binary/decode.ml | 2 ++ interpreter/binary/encode.ml | 4 ++++ interpreter/text/arrange.ml | 2 ++ 3 files changed, 8 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index ea0baf815c..482f263a2b 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -411,6 +411,8 @@ let simd_prefix s = | 0xf9l -> i32x4_trunc_sat_f32x4_u | 0xfal -> f32x4_convert_i32x4_s | 0xfbl -> f32x4_convert_i32x4_u + | 0xfcl -> let a, o = memop s in v128_load32_zero a o + | 0xfdl -> let a, o = memop s in v128_load64_zero a o | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 3dccb42434..0761c81c88 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -220,6 +220,10 @@ let encode m = simd_op 0x09l; memop mo | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> simd_op 0x0al; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack32, PackZero); _} as mo) -> + simd_op 0xfcl; memop mo + | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackZero); _} as mo) -> + simd_op 0xfdl; memop mo | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 88c443e96d..7d5ea0a1a7 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -445,6 +445,8 @@ let simd_loadop (op : simd_loadop) = | Pack16, PackSplat -> "16_splat" | Pack32, PackSplat -> "32_splat" | Pack64, PackSplat -> "64_splat" + | Pack32, PackZero -> "32_zero" + | Pack64, PackZero -> "64_zero" | _ -> assert false ) in memop ("load" ^ suffix) op (packed_size sz) From 468695871a440103aed32dccf5c397efd687a0a3 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 4 Nov 2020 10:29:30 +0800 Subject: [PATCH 259/378] Update V8 implementation status (#392) --- proposals/simd/ImplementationStatus.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8e36f82708..8500fb9636 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,7 +149,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.dot_i16x8_s` | | | | | | +| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -191,12 +191,12 @@ | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_zero` | | | | | | -| `v128.load64_zero` | | | | | | +| `v128.load32_zero` | | :heavy_check_mark: | | | | +| `v128.load64_zero` | | :heavy_check_mark: | | | | [1] Tip of tree LLVM as of May 20, 2020 -[2] V8 8.7.153. Requires flag `--experimental-wasm-simd` +[2] V8 8.8.218. Requires flag `--experimental-wasm-simd` [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` From 9d6d59dd4cb93f07fb4495b354bf2f43cc25f62a Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Wed, 4 Nov 2020 05:38:05 +0100 Subject: [PATCH 260/378] Update SpiderMonkey implementation status Dot and LoadZero landed a while back, should be in FF83. --- proposals/simd/ImplementationStatus.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8500fb9636..7e33288e24 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,7 +149,7 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -191,8 +191,8 @@ | `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_zero` | | :heavy_check_mark: | | | | -| `v128.load64_zero` | | :heavy_check_mark: | | | | +| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | [1] Tip of tree LLVM as of May 20, 2020 From d154084f29c9c8390ca819dcb255bf8c47ebc27e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 4 Nov 2020 17:44:32 +0800 Subject: [PATCH 261/378] Implement i32x4.dot_i16x8_s (#393) It multiplies respective lanes from the 2 input operands, then adds adjacent lanes. This was merged into the proposal in #127. --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/exec/simd.ml | 12 +++ interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 + test/core/simd/meta/README.md | 1 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_i32x4_dot_i16x8.py | 56 ++++++++++ test/core/simd/simd_i32x4_dot_i16x8.wast | 110 ++++++++++++++++++++ 12 files changed, 189 insertions(+) create mode 100644 test/core/simd/meta/simd_i32x4_dot_i16x8.py create mode 100644 test/core/simd/simd_i32x4_dot_i16x8.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 482f263a2b..9fd176392e 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -370,6 +370,7 @@ let simd_prefix s = | 0xb7l -> i32x4_min_u | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u + | 0xbal -> i32x4_dot_i16x8_s | 0xc1l -> i64x2_neg | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 0761c81c88..164863fa6a 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -466,6 +466,7 @@ let encode m = | Binary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l | Binary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l | Binary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l + | Binary (V128 V128Op.(I32x4 DotI16x8S)) -> simd_op 0xbal | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l | Binary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l | Binary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 624062919a..9c34718af7 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -118,6 +118,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 GtU -> SXX.I32x4.gt_u | I32x4 GeS -> SXX.I32x4.ge_s | I32x4 GeU -> SXX.I32x4.ge_u + | I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s | I64x2 Add -> SXX.I64x2.add | I64x2 Sub -> SXX.I64x2.sub | I64x2 Mul -> SXX.I64x2.mul diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index f2a7069442..dfbbdbd407 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -185,6 +185,7 @@ sig val widen_high_s : t -> t val widen_low_u : t -> t val widen_high_u : t -> t + val dot_i16x8_s : t -> t -> t end module I64x2_convert : sig val widen_low_s : t -> t @@ -429,6 +430,17 @@ struct let widen_high_s = widen Lib.List.drop 0xffffffffl let widen_low_u = widen Lib.List.take 0xffffl let widen_high_u = widen Lib.List.drop 0xffffl + + let dot_i16x8_s x y = + let xs = Rep.to_i16x8 x in + let ys = Rep.to_i16x8 y in + let rec dot xs ys = + match xs, ys with + | x1::x2::xss, y1::y2::yss -> + Int32.(add (mul x1 y1) (mul x2 y2)) :: dot xss yss + | [], [] -> [] + | _, _ -> assert false + in Rep.of_i32x4 (dot xs ys) end module I64x2_convert = struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 748b852cef..5943ede40c 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -54,6 +54,7 @@ struct | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU + | DotI16x8S type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest | ConvertI32x4S | ConvertI32x4U diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 1a5a92b4f0..fc1bd258d2 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -367,6 +367,7 @@ let i32x4_max_u = Binary (V128 V128Op.(I32x4 MaxU)) let i32x4_mul = Binary (V128 V128Op.(I32x4 Mul)) let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) +let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 7d5ea0a1a7..9e88f21753 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -305,6 +305,7 @@ struct | I32x4 MinU -> "i32x4.min_u" | I32x4 MaxS -> "i32x4.max_s" | I32x4 MaxU -> "i32x4.max_u" + | I32x4 DotI16x8S -> "i32x4.dot_i16x8_s" | I64x2 Add -> "i64x2.add" | I64x2 Sub -> "i64x2.sub" | I64x2 Mul -> "i64x2.mul" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index b24310a2ac..85d1351247 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -569,6 +569,9 @@ rule token = parse | "i16x8.sub_sat_"(sign as s) { BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } + | "i32x4.dot_i16x8_s" + { BINARY i32x4_dot_i16x8_s } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index d1ade7c721..6ae6747b52 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -26,6 +26,7 @@ Currently it only support following simd test files generation. - 'simd_f64x2_rounding' - 'simd_f32x4_pmin_pmax' - 'simd_f64x2_pmin_pmax' +- 'simd_i32x4_dot_i16x8' Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 6a7cdde488..7ea8436b31 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -30,6 +30,7 @@ 'simd_f64x2_rounding', 'simd_f32x4_pmin_pmax', 'simd_f64x2_pmin_pmax', + 'simd_i32x4_dot_i16x8', ) diff --git a/test/core/simd/meta/simd_i32x4_dot_i16x8.py b/test/core/simd/meta/simd_i32x4_dot_i16x8.py new file mode 100644 index 0000000000..1d62fc102a --- /dev/null +++ b/test/core/simd/meta/simd_i32x4_dot_i16x8.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python3 + +from simd_arithmetic import SimdArithmeticCase, i16 +from simd_integer_op import ArithmeticOp + + +class SimdI32x4DotI16x8TestCase(SimdArithmeticCase): + LANE_TYPE = 'i32x4' + UNARY_OPS = () + BINARY_OPS = ('dot_i16x8_s',) + + @property + def lane(self): + return i16 + + def binary_op(self, x, y, lane): + # For test data we always splat a single value to the + # entire v128, so '* 2' will work here. + return ArithmeticOp.get_valid_value(x, i16) * ArithmeticOp.get_valid_value(y, i16) * 2 + + @property + def hex_binary_op_test_data(self): + return [] + + @property + def bin_test_data(self): + return [ + (self.normal_binary_op_test_data, ['i16x8', 'i16x8', 'i32x4']), + (self.hex_binary_op_test_data, ['i16x8', 'i16x8', 'i32x4']) + ] + + def get_case_data(self): + case_data = [] + op_name = 'i32x4.dot_i16x8_s' + case_data.append(['#', op_name]) + for data_group, v128_forms in self.bin_test_data: + for data in data_group: + case_data.append([op_name, [str(data[0]), str(data[1])], + str(self.binary_op(data[0], data[1], self.lane)), + v128_forms]) + return case_data + + def get_combine_cases(self): + return '' + + def gen_test_cases(self): + wast_filename = '../simd_i32x4_dot_i16x8.wast' + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + +def gen_test_cases(): + simd_i16x8_arith = SimdI32x4DotI16x8TestCase() + simd_i16x8_arith.gen_test_cases() + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/simd_i32x4_dot_i16x8.wast b/test/core/simd/simd_i32x4_dot_i16x8.wast new file mode 100644 index 0000000000..b41de74d00 --- /dev/null +++ b/test/core/simd/simd_i32x4_dot_i16x8.wast @@ -0,0 +1,110 @@ +;; Tests for i32x4 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i32x4.dot_i16x8_s") (param v128 v128) (result v128) (i32x4.dot_i16x8_s (local.get 0) (local.get 1))) +) + + +;; i32x4.dot_i16x8_s +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 536838144 536838144 536838144 536838144)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 536870912 536870912 536870912 536870912)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 536838144 536838144 536838144 536838144)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 536870912 536870912 536870912 536870912)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 536903680 536903680 536903680 536903680)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 65530 65530 65530 65530)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 65532 65532 65532 65532)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -65536 -65536 -65536 -65536)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 65532 65532 65532 65532)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 65534 65534 65534 65534)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 65536 65536 65536 65536)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 2147352578 2147352578 2147352578 2147352578)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 2147418112 2147418112 2147418112 2147418112)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 -65534 -65534 -65534 -65534)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 65536 65536 65536 65536)) +(assert_return (invoke "i32x4.dot_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 2 2 2 2)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.dot_i16x8_s (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.dot_i16x8_s-1st-arg-empty (result v128) + (i32x4.dot_i16x8_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.dot_i16x8_s-arg-empty (result v128) + (i32x4.dot_i16x8_s) + ) + ) + "type mismatch" +) + From 8551a32bbc9a8de66bdc97bb536c883b359ee0f9 Mon Sep 17 00:00:00 2001 From: Petr Penzin <41971413+penzn@users.noreply.github.com> Date: Tue, 1 Dec 2020 17:27:39 -0800 Subject: [PATCH 262/378] Update ChakraCore status (#399) --- proposals/simd/ImplementationStatus.md | 272 ++++++++++++------------- 1 file changed, 136 insertions(+), 136 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 7e33288e24..204222b0cf 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,6 +1,6 @@ | Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | | ---------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -11,185 +11,185 @@ | `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| 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`i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | @@ -200,7 +200,7 @@ [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` -[4] Not known to be updated after latest renumbering. Requires (case-insensitive) flag `-wasmsimd` +[4] Only in 1.12.* (development branch). Requires (case-insensitive) flag `-wasmsimd` [5] Firefox x64/x86 SSE4.1+ only, enabled in Nightly, disabled in other channels, control in about:config under `javascript.options.wasm_simd` From 890c0431d28f7d89b4528d6b9e4a51d6acbd7708 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 7 Dec 2020 18:20:02 -0800 Subject: [PATCH 263/378] Execution semantics (#340) - Add execution semantics for SIMD instructions. - Add new numeric primitives required for SIMD instructions. - Rename auxiliary lanes function to dim (number of elements in a shape) - Define auxiliary lanes function to interpret i128 as a sequence of numeric values - Define auxiliary saturation operators, and use it for existing trunc sat - Fix definition of trunc and convert in SIMD instruction syntax, pull them out into their own production, and add validation for them. --- document/core/exec/instructions.rst | 661 ++++++++++++++++++++++++++ document/core/exec/numerics.rst | 336 ++++++++++++- document/core/syntax/instructions.rst | 20 +- document/core/text/instructions.rst | 2 +- document/core/util/macros.def | 27 +- document/core/valid/instructions.rst | 65 ++- 6 files changed, 1073 insertions(+), 38 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 9dc6727f43..5844e8b35f 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -182,6 +182,549 @@ Where the underlying operators are non-deterministic, because they may return on \end{array} +.. index:: SIMD instruction + pair: execution; instruction + single: abstract syntax; instruction +.. _exec-instr-simd: + +SIMD Instructions +~~~~~~~~~~~~~~~~~~~~ + +SIMD instructions are defined in terms of generic numeric operators applied lane-wise based on the :ref:`shape `. + +.. math:: + \begin{array}{lll@{\qquad}l} + \X{op}_{t\K{x}N}(n_1,\dots,n_k) &=& + \lanes^{-1}_{t\K{x}N}(op_t(\lanes_{t\K{x}N}(n_1) ~\dots~ \lanes_{t\K{x}N}(n_k)) + \end{array} + +.. note:: + For example, the result of instruction :math:`\K{i32x4}.\ADD` applied to operands :math:`i_1, i_2` + invokes :math:`\ADD_{\K{i32x4}}(i_1, i_2)`, which maps to + :math:`\lanes^{-1}_{\K{i32x4}}(\ADD_{\I32}(i_1^+, i_2^+))`, + where :math:`i_1^+` and :math:`i_2^+` are sequences resulting from invoking + :math:`\lanes_{\K{i32x4}}(i_1)` and :math:`\lanes_{\K{i32x4}}(i_2)` + respectively. + + +.. _exec-simd-const: + +:math:`\V128\K{.}\VCONST~c` +........................... + +1. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. note:: + No formal reduction rule is required for this instruction, since |VCONST| instructions coincide with :ref:`values `. + + +.. _exec-vsunop: + +:math:`\V128\K{.}\vsunop` +......................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`c` be the result of computing :math:`\vsunop_{\I128}(c_1)`. + +4. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~\V128\K{.}\vsunop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vsunop_{\I128}(c_1)) \\ + \end{array} + + +.. _exec-vsbinop: + +:math:`\V128\K{.}\vsbinop` +.......................... + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. Let :math:`c` be the result of computing :math:`\vsbinop_{\I128}(c_1, c_2)`. + +5. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vsbinop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vsbinop_{\I128}(c_1, c_2)) \\ + \end{array} + + +.. _exec-vsternop: + +:math:`\V128\K{.}\vsternop` +........................... + +1. Assert: due to :ref:`validation `, three values of :ref:`value type ` |V128| are on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_3` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +4. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +5. Let :math:`c` be the result of computing :math:`\vsternop_{\I128}(c_1, c_2, c_3)`. + +6. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~(\V128\K{.}\VCONST~c_3)~\V128\K{.}\vsternop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vsternop_{\I128}(c_1, c_2, c_3)) \\ + \end{array} + + +.. _exec-simd-swizzle: + +:math:`\K{i8x16.}\SWIZZLE` +.......................... + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{i8x16}(c_2)`. + +4. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +5. Let :math:`j^\ast` be the sequence :math:`\lanes_{i8x16}(c_1)`. + +6. Let :math:`c^\ast` be the concatenation of the two sequences :math:`j^\ast~0^{240}` + +7. Let :math:`c'` be the result of :math:`\lanes^{-1}_{i8x16}(c^\ast[ i^\ast[0] ] \dots c^\ast[ i^\ast[15] ])`. + +8. Push the value :math:`\V128.\VCONST~c'` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\SWIZZLE &\stepto& (\V128\K{.}\VCONST~c') + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{i8x16}(c_2) \\ + \wedge & c^\ast = \lanes_{i8x16}(c_1)~0^{240} \\ + \wedge & c' = \lanes^{-1}_{i8x16}(c^\ast[ i^\ast[0] ] \dots c^\ast[ i^\ast[15] ]) + \end{array} + \end{array} + + +.. _exec-simd-shuffle: + +:math:`\K{i8x16.}\SHUFFLE~x^\ast` +................................. + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. + +2. Assert: due to :ref:`validation `, for all :math:`x_i` in :math:`x^\ast` it holds that :math:`x_i < 32`. + +3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +4. Let :math:`i_2^\ast` be the sequence :math:`\lanes_{i8x16}(c_2)`. + +5. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +6. Let :math:`i_1^\ast` be the sequence :math:`\lanes_{i8x16}(c_1)`. + +7. Let :math:`i^\ast` be the concatenation of the two sequences :math:`i_1^\ast~i_2^\ast`. + +8. Let :math:`c` be the result of :math:`\lanes^{-1}_{i8x16}(i^\ast[x^\ast[0]] \dots i^\ast[x^\ast[15]])`. + +9. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\SHUFFLE~x^\ast &\stepto& (\V128\K{.}\VCONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{i8x16}(c_1)~\lanes_{i8x16}(c_2) \\ + \wedge & c = \lanes^{-1}_{i8x16}(i^\ast[x^\ast[0]] \dots i^\ast[x^\ast[15]]) + \end{array} + \end{array} + + +.. _exec-simd-splat: + +:math:`\shape\K{.}\SPLAT` +......................... + +1. Let :math:`t` be the type :math:`\unpacked(\shape)`. + +2. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t` is on the top of the stack. + +3. Pop the value :math:`t.\CONST~c_1` from the stack. + +4. Let :math:`N` be the integer :math:`\dim(\shape)`. + +5. Let :math:`c` be the result of :math:`\lanes^{-1}_{\shape}(c_1^N)`. + +6. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (t\K{.}\CONST~c_1)~\shape\K{.}\SPLAT &\stepto& (\V128\K{.}\VCONST~c) + & (\iff t = \unpacked(\shape) + \wedge c = \lanes^{-1}_{\shape}(c_1^{\dim(\shape)})) + \\ + \end{array} + + +.. _exec-simd-extract_lane: + +:math:`t_1\K{x}N\K{.}\EXTRACTLANE\K{\_}\sx^?~x` +............................................... + +1. Assert: due to :ref:`validation `, :math:`x < N`. + +2. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}N}(c_1)`. + +5. Let :math:`t_2` be the type :math:`\unpacked(t_1\K{x}N)`. + +6. Let :math:`c_2` be the result of computing :math:`\extend^{sx^?}_{|t_1|,|t_2|}(i^\ast[x])`. + +7. Push the value :math:`t_2.\CONST~c_2` to the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_1\K{x}N\K{.}\EXTRACTLANE~x &\stepto& (t_2\K{.}\CONST~c_2) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & t_2 = \unpacked(t_1\K{x}N) \\ + \wedge & c_2 = \extend^{sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}N}(c_1)[x]) + \end{array} + \end{array} + + +.. _exec-simd-replace_lane: + +:math:`\shape\K{.}\REPLACELANE~x` +................................. + +1. Assert: due to :ref:`validation `, :math:`x < \dim(\shape)`. + +2. Let :math:`t_1` be the type :math:`\unpacked(\shape)`. + +3. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t_1` is on the top of the stack. + +4. Pop the value :math:`t_1.\CONST~c_1` from the stack. + +5. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +6. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +7. Let :math:`i_2^\ast` be the sequence :math:`\lanes_{\shape}(c_2)`. + +8. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\shape}(i_2^\ast \with [x] = c_1)` + +9. Push :math:`\V128.\VCONST~c` on the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (t_1\K{.}\CONST~c_1)~(\V128\K{.}\VCONST~c_2)~\shape\K{.}\REPLACELANE~x &\stepto& (\V128\K{.}\VCONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i_2^\ast = \lanes_{\shape}(c_2)) \\ + \wedge & c = \lanes^{-1}_{\shape}(i_2^\ast \with [x] = c_1) + \end{array} + \end{array} + + +.. _exec-vunop: + +:math:`\shape\K{.}\vunop` +......................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`c` be the result of computing :math:`\vunop_{\shape}(c_1)`. + +4. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~\V128\K{.}\vunop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vunop_{\shape}(c_1)) + \end{array} + + +.. _exec-vbinop: + +:math:`\shape\K{.}\vbinop` +.......................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. If :math:`\vbinop_{\shape}(c_1, c_2)` is defined: + + a. Let :math:`c` be a possible result of computing :math:`\vbinop_{\shape}(c_1, c_2)`. + + b. Push the value :math:`\V128.\VCONST~c` to the stack. + +5. Else: + + a. Trap. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vbinop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c \in \vbinop_{\shape}(c_1, c_2)) \\ + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vbinop &\stepto& \TRAP + & (\iff \vbinop_{\shape}(c_1, c_2) = \{\}) + \end{array} + + +.. _exec-vshiftop: + +:math:`t\K{x}N\K{.}\vshiftop` +............................. + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +2. Pop the value :math:`\I32.\CONST~s` from the stack. + +3. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +4. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +5. Let :math:`i^\ast` be the sequence :math:`\lanes_{t\K{x}N}(c_1)`. + +6. Let :math:`c` be :math:`\lanes^{-1}_{t\K{x}N}(\vshiftop_{t}(i^\ast, s^N))`. + +7. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\I32\K{.}\CONST~s)~t\K{x}N\K{.}\vshiftop &\stepto& (\V128\K{.}\VCONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{t\K{x}N}(c_1) \\ + \wedge & c = \lanes^{-1}_{t\K{x}N}(\vshiftop_{t}(i^\ast, s^N))) + \end{array} + \end{array} + + +.. _exec-vitestop: +.. _exec-simd-all_true: + +:math:`\shape\K{.}\ALLTRUE` +........................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i_1^\ast` be the sequence :math:`\lanes_{\shape}(c_1)` + +4. Let :math:`i` be the result of computing :math:`\bool(\bigwedge(i_1 \neq 0)^\ast)`. + +5. Push the value :math:`\I32.\CONST~i` onto the stack. + + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~\shape\K{.}\ALLTRUE &\stepto& (\I32\K{.}\CONST~i) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i_1^\ast = \lanes_{\shape}(c) \\ + \wedge & i = \bool(\bigwedge(i_1 \neq 0)^\ast) + \end{array} + \end{array} + + +.. _exec-simd-any_true: + +:math:`\shape\K{.}\ANYTRUE` +........................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i` be the result of computing :math:`\ine_{128}(c_1, 0)`. + +4. Push the value :math:`\I32.\CONST~i` onto the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~\shape\K{.}\ANYTRUE &\stepto& (\I32\K{.}\CONST~i) + & (\iff i = \ine_{128}(c_1, 0)) \\ + \end{array} + + +.. _exec-simd-bitmask: + +:math:`t\K{x}N\K{.}\BITMASK` +............................ + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i_1^N` be the sequence :math:`\lanes_{t\K{x}N}(c)`. + +4. Let :math:`B` be the :ref:`bit width ` :math:`|t|` of :ref:`value type ` :math:`t`. + +5. Let :math:`i_2^N` be the sequence as a result of computing :math:`\ilts_{B}(i_1^N, 0^N)`. + +6. Let :math:`c` be the integer :math:`\ibits_{32}^{-1}(i_2^N~0^{32-N})`. + +7. Push the value :math:`\I32.\CONST~c` onto the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t\K{x}N\K{.}\BITMASK &\stepto& (\I32\K{.}\CONST~c) + & (\iff c = \ibits_{32}^{-1}(\ilts_{|t|}(\lanes_{t\K{x}N}(c), 0^N))) + \\ + \end{array} + + +.. _exec-vcvtop: + +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx` +..................................................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. + +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast))` + +5. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1) \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast)) + \end{array} + \end{array} + + +.. _exec-simd-narrow: + +:math:`t_2\K{x}N\K{.}\NARROW\K{\_}t_1\K{x}M\K{\_}\sx` +..................................................... + +1. Assert: due to :ref:`syntax `, :math:`N = 2\cdot M`. + +2. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. + +3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +4. Let :math:`d_2^M` be the result of computing :math:`\narrow^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_2))`. + +5. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +6. Let :math:`d_1^M` be the result of computing :math:`\narrow^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))`. + +7. Let :math:`c` be the result of :math:`\lanes^{-1}_{t_2\K{x}N}(d_1^M~d_2^M)`. + +8. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\NARROW\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & d_1^M = \narrow^{\sx}_{M,N}( \lanes_{t_1\K{x}M}(c_1)) \\ + \wedge & d_2^M = \narrow^{\sx}_{M,N}( \lanes_{t_1\K{x}M}(c_2)) \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(d_1^M~d_2^M) + \end{array} + \end{array} + + +.. _exec-simd-widen: + +:math:`t_2\K{x}N\K{.}\WIDEN\_\K{low}\_t_1\K{x}M\_\sx` +..................................................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i_1^N` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. + +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{t_1,t_2}(i_1))^N)` + +5. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\WIDEN\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i_1^N = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{M,N}(i_1))^N) + \end{array} + \end{array} + + +:math:`t_2\K{x}N\K{.}\WIDEN\_\K{high}\_t_1\K{x}M\_\sx` +...................................................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i_1^N` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. + +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{t_1,t_2}(i_1))^N)` + +5. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\WIDEN\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i_1^N = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{M,N}(i_1))^N) + \end{array} + \end{array} + + .. index:: parametric instructions, value pair: execution; instruction single: abstract syntax; instruction @@ -464,6 +1007,124 @@ Memory Instructions \end{array} +.. _exec-load-extend: + +:math:`\V128\K{.}\LOAD{M}\K{x}N\_\sx~\memarg` +............................................. + +1. Let :math:`F` be the :ref:`current ` :ref:`frame `. + +2. Assert: due to :ref:`validation `, :math:`F.\AMODULE.\MIMEMS[0]` exists. + +3. Let :math:`a` be the :ref:`memory address ` :math:`F.\AMODULE.\MIMEMS[0]`. + +4. Assert: due to :ref:`validation `, :math:`S.\SMEMS[a]` exists. + +5. Let :math:`\X{mem}` be the :ref:`memory instance ` :math:`S.\SMEMS[a]`. + +6. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +7. Pop the value :math:`\I32.\CONST~i` from the stack. + +8. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`. + +9. If :math:`\X{ea} + M \cdot N /8` is larger than the length of :math:`\X{mem}.\MIDATA`, then: + + a. Trap. + +10. Let :math:`b^\ast` be the byte sequence :math:`\X{mem}.\MIDATA[\X{ea} \slice M \cdot N /8]`. + +11. Let :math:`m_k` be the integer for which :math:`\bytes_{\iM}(m_k) = b^\ast[k \cdot M/8 \slice M/8]`. + +12. Let :math:`W` be the integer :math:`M \cdot 2`. + +13. Let :math:`n_k` be the result of :math:`\extend^{\sx}_{M,W}(m_k)`. + +14. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\X{i}W\K{x}N}(n_0 \dots n_{N-1})`. + +15. Push the value :math:`\V128.\CONST~c` to the stack. + +.. math:: + ~\\[-1ex] + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~i)~(\V128.\LOAD{M}\K{x}N\_\sx~\memarg) &\stepto& + S; F; (\V128.\CONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & \X{ea} = i + \memarg.\OFFSET \\ + \wedge & \X{ea} + M \cdot N / 8 \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\ + \wedge & \bytes_{\iM}(m_k) = S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} + k \cdot M/8 \slice M/8]) \\ + \wedge & W = M \cdot 2 \\ + \wedge & c = \lanes^{-1}_{\X{i}W\K{x}N}(\extend^{\sx}_{M,W}(m_0) \dots \extend^{\sx}_{M,W}(m_{N-1})) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~k)~(\V128.\LOAD{M}\K{x}N\K{\_}\sx~\memarg) &\stepto& S; F; \TRAP + \end{array} + \\ \qquad + (\otherwise) \\ + \end{array} + + +.. _exec-load-splat: + +:math:`\V128\K{.}\LOAD{N}\K{\_splat}~\memarg` +............................................. + +1. Let :math:`F` be the :ref:`current ` :ref:`frame `. + +2. Assert: due to :ref:`validation `, :math:`F.\AMODULE.\MIMEMS[0]` exists. + +3. Let :math:`a` be the :ref:`memory address ` :math:`F.\AMODULE.\MIMEMS[0]`. + +4. Assert: due to :ref:`validation `, :math:`S.\SMEMS[a]` exists. + +5. Let :math:`\X{mem}` be the :ref:`memory instance ` :math:`S.\SMEMS[a]`. + +6. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +7. Pop the value :math:`\I32.\CONST~i` from the stack. + +8. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`. + +9. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then: + + a. Trap. + +10. Let :math:`b^\ast` be the byte sequence :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]`. + +11. Let :math:`n` be the integer for which :math:`\bytes_{\iN}(n) = b^\ast`. + +12. Let :math:`L` be the integer :math:`128 / N`. + +13. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\iN\K{x}L}(n^L)`. + +14. Push the value :math:`\V128.\CONST~c` to the stack. + +.. math:: + ~\\[-1ex] + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~i)~(\V128\K{.}\LOAD{N}\K{\_splat}~\memarg) &\stepto& S; F; (\V128.\CONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & \X{ea} = i + \memarg.\OFFSET \\ + \wedge & \X{ea} + N/8 \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\ + \wedge & \bytes_{\iN}(n) = S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8]) \\ + \wedge & c = \lanes^{-1}_{\iN\K{x}L}(n^L) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~k)~(\V128.\LOAD{N}\K{\_splat}~\memarg) &\stepto& S; F; \TRAP + \end{array} + \\ \qquad + (\otherwise) \\ + \end{array} + + .. _exec-store: .. _exec-storen: diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index 748ca605aa..a8641b67c3 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -38,6 +38,28 @@ When several of these placeholders occur in a single clause, then they must be r \fcopysign_N(- p_1, + p_2) &=& + p_1 \\ \end{array} +Numeric operators are lifted to input sequences by applying the operator element-wise, returning a sequence of results. When there are multiple inputs, they must be of equal length. + +.. math:: + \begin{array}{lll@{\qquad}l} + op(c_1^n, \dots, c_k^n) &=& op(c_1^n[0], \dots, c_k^n[0])~\dots~op(c_1^n[n-1], \dots, c_k^n[n-1]) + \end{array} + +.. note:: + For example, the unary operator |fabs|, when given a sequence of floating-point values, return a sequence of floating-point results: + + .. math:: + \begin{array}{lll@{\qquad}l} + \fabs_N(z^n) &=& \fabs_N(z[0])~\dots~\fabs_N(z[n]) + \end{array} + + The binary operator |iadd|, when given two sequences of integers of the same length, :math:`n`, return a sequence of integer results: + + .. math:: + \begin{array}{lll@{\qquad}l} + \iadd_N(i_1^n, i_2^n) &=& \iadd_N(i_1[0], i_2[0])~\dots~\iadd_N(i_1[n], i_2[n]) + \end{array} + .. _aux-trunc: Conventions: @@ -57,6 +79,30 @@ Conventions: \trunc(\pm q) &=& \pm i & (\iff i \in \mathbb{N} \wedge +q - 1 < i \leq +q) \\ \end{array} +.. _aux-sat_u: +.. _aux-sat_s: + +* Saturation of integers is written :math:`\satu_N(i)` and :math:`\sats_N(i)`. The arguments to these two functions range over arbitrary signed integers. + + * Unsigned saturation, :math:`\satu_N(i)` clamps :math:`i` to between :math:`0` and :math:`2^N-1`: + + .. math:: + \begin{array}{lll@{\qquad}l} + \satu_N(i) &=& 2^N-1 & (\iff i > 2^N-1)\\ + \satu_N(i) &=& 0 & (\iff i < 0) \\ + \satu_N(i) &=& i & (\otherwise) \\ + \end{array} + + * Signed saturation, :math:`\sats_N(i)` clamps :math:`i` to between :math:`-2^{N-1}` and :math:`2^{N-1}-1`: + + .. math:: + \begin{array}{lll@{\qquad}l} + \sats_N(i) &=& \signed_N^{-1}(-2^{N-1}) & (\iff i < -2^{N-1})\\ + \sats_N(i) &=& \signed_N^{-1}(2^{N-1}-1) & (\iff i > 2^{N-1}-1)\\ + \sats_N(i) &=& i & (\otherwise) + \end{array} + + .. index:: bit, integer, floating-point .. _aux-bits: @@ -134,6 +180,31 @@ When a number is stored into :ref:`memory `, it is converted into a Again these functions are invertable bijections. +.. index:: SIMD, shape +.. _aux-lanes: + +SIMD +.... + +SIMD values have the same underlying representation as an |i128|. They can also be interpreted as a sequence numeric values packed into a |V128| with a particular |shape|. + +.. math:: + \begin{array}{l} + \begin{array}{lll@{\qquad}l} + \lanes_{t\K{x}N}(c) &=& + c_0~\dots~c_{N-1} \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\where & B = |t| / 8 \\ + \wedge & b^{16} = bytes_{\i128}(c) \\ + \wedge & c_i = \bytes_{t}^{-1}(b^{16}[i \cdot B \slice B])) + \end{array} + \end{array} + +These functions are bijections, so they are invertible. + + .. index:: integer .. _int-ops: @@ -302,6 +373,18 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: it holds that :math:`i_1 = i_2\cdot\idivs(i_1, i_2) + \irems(i_1, i_2)`. +.. _op-inot: + +:math:`\inot_N(i)` +.................. + +* Return the bitwise negation of :math:`i`. + +.. math:: + \begin{array}{@{}lcll} + \inot_N(i) &=& \ibits_N^{-1}(\ibits_N(i) \veebar \ibits_N(2^N-1)) + \end{array} + .. _op-iand: :math:`\iand_N(i_1, i_2)` @@ -314,6 +397,18 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: \iand_N(i_1, i_2) &=& \ibits_N^{-1}(\ibits_N(i_1) \wedge \ibits_N(i_2)) \end{array} +.. _op-iandnot: + +:math:`\iandnot_N(i_1, i_2)` +............................ + +* Return the bitwise conjunction of :math:`i_1` and the bitwise negation of :math:`i_2`. + +.. math:: + \begin{array}{@{}lcll} + \iandnot_N(i_1, i_2) &=& \iand_N(i_1, \inot_N(i2)) + \end{array} + .. _op-ior: :math:`\ior_N(i_1, i_2)` @@ -625,6 +720,197 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: \end{array} +.. _op-ibitselect: + +:math:`\ibitselect_N(i_1, i_2, i_3)` +.................................... + +* Let :math:`j_1` be the bitwise conjunction of :math:`i_1` and :math:`i_3`. + +* Let :math:`j_3'` be the bitwise negation of :math:`i_3`. + +* Let :math:`j_2` be the bitwise conjunction of :math:`i_2` and :math:`j_3'`. + +* Return the bitwise disjunction of :math:`j_1` and :math:`j_2`. + +.. math:: + \begin{array}{@{}lcll} + \ibitselect_N(i_1, i_2, i_3) &=& \ior_N(\iand_N(i_1, i_3), \iand_N(i_2, \inot_N(i_3))) + \end{array} + + +.. _op-iabs: + +:math:`\iabs_N(i)` +.................. + +* Let :math:`j` be the :ref:`signed interpretation ` of :math:`i`. + +* If :math:`j` greater than or equal to :math:`0`, then return :math:`i`. + +* Else return the negation of `j`, modulo :math:`2^N`. + +.. math:: + \begin{array}{@{}lcll} + \iabs_N(i) &=& i & (\iff \signed_N(i) \ge 0) \\ + \iabs_N(i) &=& -\signed_N(i) \mod 2^N & (\otherwise) \\ + \end{array} + + +.. _op-ineg: + +:math:`\ineg_N(i)` +.................. + +* Return the result of negating :math:`i`, modulo :math:`2^N`. + +.. math:: + \begin{array}{@{}lcll} + \ineg_N(i) &=& (2^N - i) \mod 2^N + \end{array} + + +.. _op-imin_u: + +:math:`\iminu_N(i_1, i_2)` +.......................... + +* Return :math:`i_1` if :math:`\iltu_N(i_1, i_2)` is :math:`1`, return :math:`i_2` otherwise. + +.. math:: + \begin{array}{@{}lcll} + \iminu_N(i_1, i_2) &=& i_1 & (\iff \iltu_N(i_1, i_2) = 1)\\ + \iminu_N(i_1, i_2) &=& i_2 & (\otherwise) + \end{array} + + +.. _op-imin_s: + +:math:`\imins_N(i_1, i_2)` +.......................... + +* Return :math:`i_1` if :math:`\ilts_N(i_1, i_2)` is :math:`1`, return :math:`i_2` otherwise. + +.. math:: + \begin{array}{@{}lcll} + \iminu_N(i_1, i_2) &=& i_1 & (\iff \ilts_N(i_1, i_2) = 1)\\ + \iminu_N(i_1, i_2) &=& i_2 & (\otherwise) + \end{array} + + +.. _op-imax_u: + +:math:`\imaxu_N(i_1, i_2)` +.......................... + +* Return :math:`i_1` if :math:`\igtu_N(i_1, i_2)` is :math:`1`, return :math:`i_2` otherwise. + +.. math:: + \begin{array}{@{}lcll} + \iminu_N(i_1, i_2) &=& i_1 & (\iff \igtu_N(i_1, i_2) = 1)\\ + \iminu_N(i_1, i_2) &=& i_2 & (\otherwise) + \end{array} + + +.. _op-imax_s: + +:math:`\imaxs_N(i_1, i_2)` +.......................... + +* Return :math:`i_1` if :math:`\igts_N(i_1, i_2)` is :math:`1`, return :math:`i_2` otherwise. + +.. math:: + \begin{array}{@{}lcll} + \iminu_N(i_1, i_2) &=& i_1 & (\iff \igts_N(i_1, i_2) = 1)\\ + \iminu_N(i_1, i_2) &=& i_2 & (\otherwise) + \end{array} + + +.. _op-iadd_sat_u: + +:math:`\iaddsatu_N(i_1, i_2)` +............................. + +* Let :math:`i` be the result of adding :math:`i_1` and :math:`i_2`. + +* Return :math:`\satu_N(i)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \iaddsatu_N(i_1, i_2) &=& \satu_N(i_1 + i_2) + \end{array} + + +.. _op-iadd_sat_s: + +:math:`\iaddsats_N(i_1, i_2)` +............................. + +* Let :math:`j_1` be the signed interpretation of :math:`i_1` + +* Let :math:`j_2` be the signed interpretation of :math:`i_2` + +* Let :math:`j` be the result of adding :math:`j_1` and :math:`j_2`. + +* Return :math:`\sats_N(j)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \iaddsats_N(i_1, i_2) &=& \sats_N(\signed_N(i_1) + \signed_N(i_2)) + \end{array} + + +.. _op-isub_sat_u: + +:math:`\isubsatu_N(i_1, i_2)` +............................. + +* Let :math:`i` be the result of subtracting :math:`i_2` from :math:`i_1`. + +* Return :math:`\satu_N(i)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \isubsatu_N(i_1, i_2) &=& \satu_N(i_1 - i_2) + \end{array} + + +.. _op-isub_sat_s: + +:math:`\isubsats_N(i_1, i_2)` +............................. + +* Let :math:`j_1` be the signed interpretation of :math:`i_1` + +* Let :math:`j_2` be the signed interpretation of :math:`i_2` + +* Let :math:`j` be the result of subtracting :math:`j_2` from :math:`j_1`. + +* Return :math:`\sats_N(j)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \isubsats_N(i_1, i_2) &=& \sats_N(\signed_N(i_1) - \signed_N(i_2)) + \end{array} + + +.. _op-iavgr_u: + +:math:`\iavgru_N(i_1, i_2)` +............................. + +* Let :math:`j` be the result of adding :math:`i_1`, :math:`i_2`, and :math:`1`. + +* Return the result of dividing :math:`j` by :math:`2`, truncated toward zero. + +.. math:: + \begin{array}{lll@{\qquad}l} + \iavgru_N(i_1, i_2) &=& \trunc((i_1 + i_2 + 1) / 2) + \end{array} + + + + .. index:: floating-point, IEEE 754 .. _float-ops: @@ -1490,20 +1776,14 @@ Conversions * Else if :math:`z` is positive infinity, then return :math:`2^N - 1`. -* Else if :math:`\trunc(z)` is less than :math:`0`, then return :math:`0`. - -* Else if :math:`\trunc(z)` is greater than :math:`2^N - 1`, then return :math:`2^N - 1`. - -* Else, return :math:`\trunc(z)`. +* Else, return :math:`\satu_N(\trunc(z))`. .. math:: \begin{array}{lll@{\qquad}l} \truncsatu_{M,N}(\pm \NAN(n)) &=& 0 \\ \truncsatu_{M,N}(- \infty) &=& 0 \\ \truncsatu_{M,N}(+ \infty) &=& 2^N - 1 \\ - \truncsatu_{M,N}(- q) &=& 0 & (\iff \trunc(- q) < 0) \\ - \truncsatu_{M,N}(+ q) &=& 2^N - 1 & (\iff \trunc(+ q) > 2^N - 1) \\ - \truncsatu_{M,N}(\pm q) &=& \trunc(\pm q) & (otherwise) \\ + \truncsatu_{M,N}(z) &=& \satu_N(\trunc(z)) \\ \end{array} @@ -1518,20 +1798,14 @@ Conversions * Else if :math:`z` is positive infinity, then return :math:`2^{N-1} - 1`. -* Else if :math:`\trunc(z)` is less than :math:`-2^{N-1}`, then return :math:`-2^{N-1}`. - -* Else if :math:`\trunc(z)` is greater than :math:`2^{N-1} - 1`, then return :math:`2^{N-1} - 1`. - -* Else, return :math:`\trunc(z)`. +* Else, return :math:`\sats_N(\trunc(z))`. .. math:: \begin{array}{lll@{\qquad}l} \truncsats_{M,N}(\pm \NAN(n)) &=& 0 \\ \truncsats_{M,N}(- \infty) &=& -2^{N-1} \\ \truncsats_{M,N}(+ \infty) &=& 2^{N-1}-1 \\ - \truncsats_{M,N}(- q) &=& -2^{N-1} & (\iff \trunc(- q) < -2^{N-1}) \\ - \truncsats_{M,N}(+ q) &=& 2^{N-1} - 1 & (\iff \trunc(+ q) > 2^{N-1} - 1) \\ - \truncsats_{M,N}(\pm q) &=& \trunc(\pm q) & (otherwise) \\ + \truncsats_{M,N}(z) &=& \sats_N(\trunc(z)) \\ \end{array} @@ -1620,3 +1894,33 @@ Conversions \begin{array}{lll@{\qquad}l} \reinterpret_{t_1,t_2}(c) &=& \bits_{t_2}^{-1}(\bits_{t_1}(c)) \\ \end{array} + + +.. _op-narrow_s: + +:math:`\narrows_{M,N}(i)` +......................... + +* Let :math:`j` be the :ref:`signed interpretation ` of :math:`i` of size :math:`M`. + +* Return :math:`\sats_N(j)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \narrows_{M,N}(i) &=& \sats_N(\signed_M(i)) + \end{array} + + +.. _op-narrow_u: + +:math:`\narrowu_{M,N}(i)` +......................... + +* Let :math:`j` be the :ref:`signed interpretation ` of :math:`i` of size :math:`M`. + +* Return :math:`\satu_N(j)`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \narrowu_{M,N}(i) &=& \satu_N(\signed_M(i)) + \end{array} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 634b5f3464..ce1d8518b0 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -175,8 +175,6 @@ Occasionally, it is convenient to group operators together according to the foll pair: abstract syntax; instruction .. _syntax-laneidx: .. _syntax-shape: -.. _syntax-vunop: -.. _syntax-vbinop: .. _syntax-vternop: .. _syntax-vsunop: .. _syntax-vsbinop: @@ -357,6 +355,10 @@ Some SIMD instructions have a signedness annotation |sx| which distinguishes whe For the other SIMD instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness. +.. _syntax-vunop: +.. _syntax-vbinop: +.. _syntax-vwiden: + Conventions ........... @@ -366,19 +368,21 @@ Occasionally, it is convenient to group operators together according to the foll \begin{array}{llll} \production{unary operator} & \vunop &::=& \viunop ~|~ - \vfunop \\&&|& - \VNEG ~|~ - \WIDEN \\ + \vfunop ~|~ + \VNEG \\ \production{binary operator} & \vbinop &::=& \vibinop ~|~ \vfbinop \\&&|& \virelop ~|~ \vfrelop \\&&|& \viminmaxop ~|~ \visatbinop \\&&|& \SWIZZLE ~|~ - \NARROW ~|~ \VMUL ~|~ - \AVGR\K{\_u} ~|~ - \VTRUNC ~|~ + \AVGR\K{\_u} \\ + \production{conversion operator} & \vcvtop &::=& + \VTRUNC\K{\_sat} ~|~ \VCONVERT \\ + \production{widen operator} & \vwiden &::=& + \WIDEN\K{\_low\_}\shape\K{\_}\sx ~|~ + \WIDEN\K{\_high\_}\shape\K{\_}\sx \\ \end{array} diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 639cd14597..a6b2338c3a 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -609,7 +609,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{v128.bitselect} &\Rightarrow& \V128.\BITSELECT \end{array} -.. _text-vtestop: +.. _text-vitestop: .. _text-vshiftop: .. _text-viunop: .. _text-vibinop: diff --git a/document/core/util/macros.def b/document/core/util/macros.def index ea66a6cf58..094dc40ef4 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -145,6 +145,7 @@ .. |s32| mathdef:: \xref{syntax/values}{syntax-int}{\X{s32}} .. |s64| mathdef:: \xref{syntax/values}{syntax-int}{\X{s64}} +.. |iM| mathdef:: \xref{syntax/values}{syntax-int}{\X{i}M} .. |iN| mathdef:: \xref{syntax/values}{syntax-int}{\X{i}N} .. |i8| mathdef:: \xref{syntax/values}{syntax-int}{\X{i8}} .. |i16| mathdef:: \xref{syntax/values}{syntax-int}{\X{i16}} @@ -185,6 +186,7 @@ .. |I64X2| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{i64x2}} .. |F32X4| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f32x4}} .. |F64X2| mathdef:: \xref{syntax/types}{syntax-valtype}{\K{f64x2}} +.. |I128| mathdef:: \K{i128} .. |FUNCREF| mathdef:: \xref{syntax/types}{syntax-elemtype}{\K{funcref}} @@ -449,6 +451,8 @@ .. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}} .. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}} .. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} +.. |vwiden| mathdef:: \xref{syntax/instructions}{syntax-vwiden}{\X{vwiden}} +.. |vcvtop| mathdef:: \xref{syntax/instructions}{syntax-vcvtop}{\X{vcvtop}} .. |laneidx| mathdef:: \xref{syntax/instructions}{syntax-laneidx}{\X{laneidx}} .. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} @@ -831,7 +835,7 @@ .. |vdashmodule| mathdef:: \xref{valid/modules}{valid-module}{\vdash} .. |unpacked| mathdef:: \xref{valid/instructions}{aux-unpacked}{\F{unpacked}} -.. |lanes| mathdef:: \xref{valid/instructions}{aux-lanes}{\F{lanes}} +.. |dim| mathdef:: \xref{valid/instructions}{aux-dim}{\F{dim}} .. Execution @@ -988,7 +992,9 @@ .. |idivs| mathdef:: \xref{exec/numerics}{op-idiv_s}{\F{idiv\_s}} .. |iremu| mathdef:: \xref{exec/numerics}{op-irem_u}{\F{irem\_u}} .. |irems| mathdef:: \xref{exec/numerics}{op-irem_s}{\F{irem\_s}} +.. |inot| mathdef:: \xref{exec/numerics}{op-inot}{\F{inot}} .. |iand| mathdef:: \xref{exec/numerics}{op-iand}{\F{iand}} +.. |iandnot| mathdef:: \xref{exec/numerics}{op-iandnot}{\F{iandnot}} .. |ior| mathdef:: \xref{exec/numerics}{op-ior}{\F{ior}} .. |ixor| mathdef:: \xref{exec/numerics}{op-ixor}{\F{ixor}} .. |ishl| mathdef:: \xref{exec/numerics}{op-ishl}{\F{ishl}} @@ -1011,6 +1017,18 @@ .. |igeu| mathdef:: \xref{exec/numerics}{op-ige_u}{\F{ige\_u}} .. |iges| mathdef:: \xref{exec/numerics}{op-ige_s}{\F{ige\_s}} .. |iextendMs| mathdef:: \xref{exec/numerics}{op-iextendn_s}{\F{iextend}M\F{\_s}} +.. |ibitselect| mathdef:: \xref{exec/numerics}{op-ibitselect}{\F{ibitselect}} +.. |iabs| mathdef:: \xref{exec/numerics}{op-iabs}{\F{iabs}} +.. |ineg| mathdef:: \xref{exec/numerics}{op-ineg}{\F{ineg}} +.. |iminu| mathdef:: \xref{exec/numerics}{op-imin_u}{\F{imin\_u}} +.. |imins| mathdef:: \xref{exec/numerics}{op-imin_s}{\F{imin\_s}} +.. |imaxu| mathdef:: \xref{exec/numerics}{op-imax_u}{\F{imax\_u}} +.. |imaxs| mathdef:: \xref{exec/numerics}{op-imax_s}{\F{imax\_s}} +.. |iaddsatu| mathdef:: \xref{exec/numerics}{op-iaddsat_u}{\F{iaddsat\_u}} +.. |iaddsats| mathdef:: \xref{exec/numerics}{op-iaddsat_s}{\F{iaddsat\_s}} +.. |isubsatu| mathdef:: \xref{exec/numerics}{op-isubsat_u}{\F{isubsat\_u}} +.. |isubsats| mathdef:: \xref{exec/numerics}{op-isubsat_s}{\F{isubsat\_s}} +.. |iavgru| mathdef:: \xref{exec/numerics}{op-iavgr_u}{\F{iavgr\_u}} .. |fadd| mathdef:: \xref{exec/numerics}{op-fadd}{\F{fadd}} .. |fsub| mathdef:: \xref{exec/numerics}{op-fsub}{\F{fsub}} @@ -1046,6 +1064,9 @@ .. |convertu| mathdef:: \xref{exec/numerics}{op-convert_u}{\F{convert}^{\K{u}}} .. |converts| mathdef:: \xref{exec/numerics}{op-convert_s}{\F{convert}^{\K{s}}} .. |reinterpret| mathdef:: \xref{exec/numerics}{op-reinterpret}{\F{reinterpret}} +.. |narrow| mathdef:: \xref{exec/numerics}{op-narrow_u}{\F{narrow}} +.. |narrowu| mathdef:: \xref{exec/numerics}{op-narrow_u}{\F{narrow}^{\K{u}}} +.. |narrows| mathdef:: \xref{exec/numerics}{op-narrow_s}{\F{narrow}^{\K{s}}} .. Numerics, meta functions @@ -1063,6 +1084,10 @@ .. |ieee| mathdef:: \xref{exec/numerics}{aux-ieee}{\F{float}} .. |nans| mathdef:: \xref{exec/numerics}{aux-nans}{\F{nans}} .. |trunc| mathdef:: \xref{exec/numerics}{aux-trunc}{\F{trunc}} +.. |satu| mathdef:: \xref{exec/numerics}{aux-sat_u}{\F{sat}^{\K{u}}} +.. |sats| mathdef:: \xref{exec/numerics}{aux-sat_s}{\F{sat}^{\K{s}}} + +.. |lanes| mathdef:: \xref{exec/numerics}{aux-lanes}{\F{lanes}} .. Other meta functions diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index ae615fd4cf..a4afaf0e6f 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -159,12 +159,11 @@ Numeric Instructions single: abstract syntax; instruction .. _valid-instr-simd: +.. _aux-unpacked: SIMD Instructions ~~~~~~~~~~~~~~~~~ -.. _aux-unpacked: - SIMD instructions can have a prefix to describe the :ref:`shape ` of the operand. Packed numeric types, |I8| and |I16|, are not :ref:`value type `, we define an auxiliary function to map such packed types into value types: .. math:: @@ -175,13 +174,13 @@ SIMD instructions can have a prefix to describe the :ref:`shape Date: Thu, 10 Dec 2020 20:59:47 -0800 Subject: [PATCH 264/378] Small cleanup of simd exec/instructions (#401) - `extend` can have types as params, we don't need to take the bitwidth - bunch of places using `i_1^N` or `i_2^N` can be changed to `i^\ast` --- document/core/exec/instructions.rst | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 5844e8b35f..2059785dd5 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -396,7 +396,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 5. Let :math:`t_2` be the type :math:`\unpacked(t_1\K{x}N)`. -6. Let :math:`c_2` be the result of computing :math:`\extend^{sx^?}_{|t_1|,|t_2|}(i^\ast[x])`. +6. Let :math:`c_2` be the result of computing :math:`\extend^{sx^?}_{t_1,t_2}(i^\ast[x])`. 7. Push the value :math:`t_2.\CONST~c_2` to the stack. @@ -408,7 +408,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} (\iff & t_2 = \unpacked(t_1\K{x}N) \\ - \wedge & c_2 = \extend^{sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}N}(c_1)[x]) + \wedge & c_2 = \extend^{sx^?}_{t_1,t_2}(\lanes_{t_1\K{x}N}(c_1)[x]) \end{array} \end{array} @@ -430,9 +430,9 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 6. Pop the value :math:`\V128.\VCONST~c_2` from the stack. -7. Let :math:`i_2^\ast` be the sequence :math:`\lanes_{\shape}(c_2)`. +7. Let :math:`i^\ast` be the sequence :math:`\lanes_{\shape}(c_2)`. -8. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\shape}(i_2^\ast \with [x] = c_1)` +8. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\shape}(i^\ast \with [x] = c_1)` 9. Push :math:`\V128.\VCONST~c` on the stack. @@ -443,8 +443,8 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i_2^\ast = \lanes_{\shape}(c_2)) \\ - \wedge & c = \lanes^{-1}_{\shape}(i_2^\ast \with [x] = c_1) + (\iff & i^\ast = \lanes_{\shape}(c_2)) \\ + \wedge & c = \lanes^{-1}_{\shape}(i^\ast \with [x] = c_1) \end{array} \end{array} @@ -680,9 +680,9 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`i_1^N` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{t_1,t_2}(i_1))^N)` +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{t_1,t_2}(i^\ast))` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -693,8 +693,8 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i_1^N = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{M,N}(i_1))^N) + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast)) \end{array} \end{array} @@ -706,9 +706,9 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`i_1^N` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{t_1,t_2}(i_1))^N)` +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{t_1,t_2}(i^\ast))` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -719,8 +719,8 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i_1^N = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}((\extend^{\sx}_{M,N}(i_1))^N) + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast)) \end{array} \end{array} From 20e914b30c9acf78bdd0338bf2a1b39ad9a0bf71 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 14 Dec 2020 11:28:56 -0800 Subject: [PATCH 265/378] Extended multiplication instructions (#376) --- proposals/simd/BinarySIMD.md | 402 +++++++++++++------------ proposals/simd/ImplementationStatus.md | 402 +++++++++++++------------ proposals/simd/SIMD.md | 32 ++ 3 files changed, 446 insertions(+), 390 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 19077bb2e3..865112f5e8 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -30,198 +30,210 @@ In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byt For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). -| Instruction | `simdop` | Immediate operands | -| ---------------------------|---------:|--------------------| -| `v128.load` | `0x00`| m:memarg | -| `v128.load8x8_s` | `0x01`| m:memarg | -| `v128.load8x8_u` | `0x02`| m:memarg | -| `v128.load16x4_s` | `0x03`| m:memarg | -| `v128.load16x4_u` | `0x04`| m:memarg | -| `v128.load32x2_s` | `0x05`| m:memarg | -| `v128.load32x2_u` | `0x06`| m:memarg | -| `v128.load8_splat` | `0x07`| m:memarg | -| `v128.load16_splat` | `0x08`| m:memarg | -| `v128.load32_splat` | `0x09`| m:memarg | -| `v128.load64_splat` | `0x0a`| m:memarg | -| `v128.store` | `0x0b`| m:memarg | -| `v128.const` | `0x0c`| i:ImmByte[16] | -| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | -| `i8x16.swizzle` | `0x0e`| - | -| `i8x16.splat` | `0x0f`| - | -| `i16x8.splat` | `0x10`| - | -| `i32x4.splat` | `0x11`| - | -| `i64x2.splat` | `0x12`| - | -| `f32x4.splat` | `0x13`| - | -| `f64x2.splat` | `0x14`| - | -| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | -| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | -| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | -| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | -| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | -| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | -| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | -| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | -| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | -| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | -| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | -| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | -| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | -| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | -| `i8x16.eq` | `0x23`| - | -| `i8x16.ne` | `0x24`| - | -| `i8x16.lt_s` | `0x25`| - | -| `i8x16.lt_u` | `0x26`| - | -| `i8x16.gt_s` | `0x27`| - | -| `i8x16.gt_u` | `0x28`| - | -| `i8x16.le_s` | `0x29`| - | -| `i8x16.le_u` | `0x2a`| - | -| `i8x16.ge_s` | `0x2b`| - | -| `i8x16.ge_u` | `0x2c`| - | -| `i16x8.eq` | `0x2d`| - | -| `i16x8.ne` | `0x2e`| - | -| `i16x8.lt_s` | `0x2f`| - | -| `i16x8.lt_u` | `0x30`| - | -| `i16x8.gt_s` | `0x31`| - | -| `i16x8.gt_u` | `0x32`| - | -| `i16x8.le_s` | `0x33`| - | -| `i16x8.le_u` | `0x34`| - | -| `i16x8.ge_s` | `0x35`| - | -| `i16x8.ge_u` | `0x36`| - | -| `i32x4.eq` | `0x37`| - | -| `i32x4.ne` | `0x38`| - | -| `i32x4.lt_s` | `0x39`| - | -| `i32x4.lt_u` | `0x3a`| - | -| `i32x4.gt_s` | `0x3b`| - | -| `i32x4.gt_u` | `0x3c`| - | -| `i32x4.le_s` | `0x3d`| - | -| `i32x4.le_u` | `0x3e`| - | -| `i32x4.ge_s` | `0x3f`| - | -| `i32x4.ge_u` | `0x40`| - | -| `f32x4.eq` | `0x41`| - | -| `f32x4.ne` | `0x42`| - | -| `f32x4.lt` | `0x43`| - | -| `f32x4.gt` | `0x44`| - | -| `f32x4.le` | `0x45`| - | -| `f32x4.ge` | `0x46`| - | -| `f64x2.eq` | `0x47`| - | -| `f64x2.ne` | `0x48`| - | -| `f64x2.lt` | `0x49`| - | -| `f64x2.gt` | `0x4a`| - | -| `f64x2.le` | `0x4b`| - | -| `f64x2.ge` | `0x4c`| - | -| `v128.not` | `0x4d`| - | -| `v128.and` | `0x4e`| - | -| `v128.andnot` | `0x4f`| - | -| `v128.or` | `0x50`| - | -| `v128.xor` | `0x51`| - | -| `v128.bitselect` | `0x52`| - | -| `i8x16.abs` | `0x60`| - | -| `i8x16.neg` | `0x61`| - | -| `i8x16.any_true` | `0x62`| - | -| `i8x16.all_true` | `0x63`| - | -| `i8x16.bitmask` | `0x64`| - | -| `i8x16.narrow_i16x8_s` | `0x65`| - | -| `i8x16.narrow_i16x8_u` | `0x66`| - | -| `i8x16.shl` | `0x6b`| - | -| `i8x16.shr_s` | `0x6c`| - | -| `i8x16.shr_u` | `0x6d`| - | -| `i8x16.add` | `0x6e`| - | -| `i8x16.add_sat_s` | `0x6f`| - | -| `i8x16.add_sat_u` | `0x70`| - | -| `i8x16.sub` | `0x71`| - | -| `i8x16.sub_sat_s` | `0x72`| - | -| `i8x16.sub_sat_u` | `0x73`| - | -| `i8x16.min_s` | `0x76`| - | -| `i8x16.min_u` | `0x77`| - | -| `i8x16.max_s` | `0x78`| - | -| `i8x16.max_u` | `0x79`| - | -| `i8x16.avgr_u` | `0x7b`| - | -| `i16x8.abs` | `0x80`| - | -| `i16x8.neg` | `0x81`| - | -| `i16x8.any_true` | `0x82`| - | -| `i16x8.all_true` | `0x83`| - | -| `i16x8.bitmask` | `0x84`| - | -| `i16x8.narrow_i32x4_s` | `0x85`| - | -| `i16x8.narrow_i32x4_u` | `0x86`| - | -| `i16x8.widen_low_i8x16_s` | `0x87`| - | -| `i16x8.widen_high_i8x16_s` | `0x88`| - | -| `i16x8.widen_low_i8x16_u` | `0x89`| - | -| `i16x8.widen_high_i8x16_u` | `0x8a`| - | -| `i16x8.shl` | `0x8b`| - | -| `i16x8.shr_s` | `0x8c`| - | -| `i16x8.shr_u` | `0x8d`| - | -| `i16x8.add` | `0x8e`| - | -| `i16x8.add_sat_s` | `0x8f`| - | -| `i16x8.add_sat_u` | `0x90`| - | -| `i16x8.sub` | `0x91`| - | -| `i16x8.sub_sat_s` | `0x92`| - | -| `i16x8.sub_sat_u` | `0x93`| - | -| `i16x8.mul` | `0x95`| - | -| `i16x8.min_s` | `0x96`| - | -| `i16x8.min_u` | `0x97`| - | -| `i16x8.max_s` | `0x98`| - | -| `i16x8.max_u` | `0x99`| - | -| `i16x8.avgr_u` | `0x9b`| | -| `i32x4.abs` | `0xa0`| - | -| `i32x4.neg` | `0xa1`| - | -| `i32x4.any_true` | `0xa2`| - | -| `i32x4.all_true` | `0xa3`| - | -| `i32x4.bitmask` | `0xa4`| - | -| `i32x4.widen_low_i16x8_s` | `0xa7`| - | -| `i32x4.widen_high_i16x8_s` | `0xa8`| - | -| `i32x4.widen_low_i16x8_u` | `0xa9`| - | -| `i32x4.widen_high_i16x8_u` | `0xaa`| - | -| `i32x4.shl` | `0xab`| - | -| `i32x4.shr_s` | `0xac`| - | -| `i32x4.shr_u` | `0xad`| - | -| `i32x4.add` | `0xae`| - | -| `i32x4.sub` | `0xb1`| - | -| `i32x4.mul` | `0xb5`| - | -| `i32x4.min_s` | `0xb6`| - | -| `i32x4.min_u` | `0xb7`| - | -| `i32x4.max_s` | `0xb8`| - | -| `i32x4.max_u` | `0xb9`| - | -| `i32x4.dot_i16x8_s` | `0xba`| - | -| `i64x2.neg` | `0xc1`| - | -| `i64x2.shl` | `0xcb`| - | -| `i64x2.shr_s` | `0xcc`| - | -| `i64x2.shr_u` | `0xcd`| - | -| `i64x2.add` | `0xce`| - | -| `i64x2.sub` | `0xd1`| - | -| `i64x2.mul` | `0xd5`| - | -| `f32x4.ceil` | `0xd8`| - | -| `f32x4.floor` | `0xd9`| - | -| `f32x4.trunc` | `0xda`| - | -| `f32x4.nearest` | `0xdb`| - | -| `f64x2.ceil` | `0xdc`| - | -| `f64x2.floor` | `0xdd`| - | -| `f64x2.trunc` | `0xde`| - | -| `f64x2.nearest` | `0xdf`| - | -| `f32x4.abs` | `0xe0`| - | -| `f32x4.neg` | `0xe1`| - | -| `f32x4.sqrt` | `0xe3`| - | -| `f32x4.add` | `0xe4`| - | -| `f32x4.sub` | `0xe5`| - | -| `f32x4.mul` | `0xe6`| - | -| `f32x4.div` | `0xe7`| - | -| `f32x4.min` | `0xe8`| - | -| `f32x4.max` | `0xe9`| - | -| `f32x4.pmin` | `0xea`| - | -| `f32x4.pmax` | `0xeb`| - | -| `f64x2.abs` | `0xec`| - | -| `f64x2.neg` | `0xed`| - | -| `f64x2.sqrt` | `0xef`| - | -| `f64x2.add` | `0xf0`| - | -| `f64x2.sub` | `0xf1`| - | -| `f64x2.mul` | `0xf2`| - | -| `f64x2.div` | `0xf3`| - | -| `f64x2.min` | `0xf4`| - | -| `f64x2.max` | `0xf5`| - | -| `f64x2.pmin` | `0xf6`| - | -| `f64x2.pmax` | `0xf7`| - | -| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | -| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | -| `f32x4.convert_i32x4_s` | `0xfa`| - | -| `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0xfc`| - | -| `v128.load64_zero` | `0xfd`| - | +| Instruction | `simdop` | Immediate operands | +| ----------------------------|---------:|--------------------| +| `v128.load` | `0x00`| m:memarg | +| `v128.load8x8_s` | `0x01`| m:memarg | +| `v128.load8x8_u` | `0x02`| m:memarg | +| `v128.load16x4_s` | `0x03`| m:memarg | +| `v128.load16x4_u` | `0x04`| m:memarg | +| `v128.load32x2_s` | `0x05`| m:memarg | +| `v128.load32x2_u` | `0x06`| m:memarg | +| `v128.load8_splat` | `0x07`| m:memarg | +| `v128.load16_splat` | `0x08`| m:memarg | +| `v128.load32_splat` | `0x09`| m:memarg | +| `v128.load64_splat` | `0x0a`| m:memarg | +| `v128.store` | `0x0b`| m:memarg | +| `v128.const` | `0x0c`| i:ImmByte[16] | +| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | +| `i8x16.swizzle` | `0x0e`| - | +| `i8x16.splat` | `0x0f`| - | +| `i16x8.splat` | `0x10`| - | +| `i32x4.splat` | `0x11`| - | +| `i64x2.splat` | `0x12`| - | +| `f32x4.splat` | `0x13`| - | +| `f64x2.splat` | `0x14`| - | +| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | +| `i8x16.eq` | `0x23`| - | +| `i8x16.ne` | `0x24`| - | +| `i8x16.lt_s` | `0x25`| - | +| `i8x16.lt_u` | `0x26`| - | +| `i8x16.gt_s` | `0x27`| - | +| `i8x16.gt_u` | `0x28`| - | +| `i8x16.le_s` | `0x29`| - | +| `i8x16.le_u` | `0x2a`| - | +| `i8x16.ge_s` | `0x2b`| - | +| `i8x16.ge_u` | `0x2c`| - | +| `i16x8.eq` | `0x2d`| - | +| `i16x8.ne` | `0x2e`| - | +| `i16x8.lt_s` | `0x2f`| - | +| `i16x8.lt_u` | `0x30`| - | +| `i16x8.gt_s` | `0x31`| - | +| `i16x8.gt_u` | `0x32`| - | +| `i16x8.le_s` | `0x33`| - | +| `i16x8.le_u` | `0x34`| - | +| `i16x8.ge_s` | `0x35`| - | +| `i16x8.ge_u` | `0x36`| - | +| `i32x4.eq` | `0x37`| - | +| `i32x4.ne` | `0x38`| - | +| `i32x4.lt_s` | `0x39`| - | +| `i32x4.lt_u` | `0x3a`| - | +| `i32x4.gt_s` | `0x3b`| - | +| `i32x4.gt_u` | `0x3c`| - | +| `i32x4.le_s` | `0x3d`| - | +| `i32x4.le_u` | `0x3e`| - | +| `i32x4.ge_s` | `0x3f`| - | +| `i32x4.ge_u` | `0x40`| - | +| `f32x4.eq` | `0x41`| - | +| `f32x4.ne` | `0x42`| - | +| `f32x4.lt` | `0x43`| - | +| `f32x4.gt` | `0x44`| - | +| `f32x4.le` | `0x45`| - | +| `f32x4.ge` | `0x46`| - | +| `f64x2.eq` | `0x47`| - | +| `f64x2.ne` | `0x48`| - | +| `f64x2.lt` | `0x49`| - | +| `f64x2.gt` | `0x4a`| - | +| `f64x2.le` | `0x4b`| - | +| `f64x2.ge` | `0x4c`| - | +| `v128.not` | `0x4d`| - | +| `v128.and` | `0x4e`| - | +| `v128.andnot` | `0x4f`| - | +| `v128.or` | `0x50`| - | +| `v128.xor` | `0x51`| - | +| `v128.bitselect` | `0x52`| - | +| `i8x16.abs` | `0x60`| - | +| `i8x16.neg` | `0x61`| - | +| `i8x16.any_true` | `0x62`| - | +| `i8x16.all_true` | `0x63`| - | +| `i8x16.bitmask` | `0x64`| - | +| `i8x16.narrow_i16x8_s` | `0x65`| - | +| `i8x16.narrow_i16x8_u` | `0x66`| - | +| `i8x16.shl` | `0x6b`| - | +| `i8x16.shr_s` | `0x6c`| - | +| `i8x16.shr_u` | `0x6d`| - | +| `i8x16.add` | `0x6e`| - | +| `i8x16.add_sat_s` | `0x6f`| - | +| `i8x16.add_sat_u` | `0x70`| - | +| `i8x16.sub` | `0x71`| - | +| `i8x16.sub_sat_s` | `0x72`| - | +| `i8x16.sub_sat_u` | `0x73`| - | +| `i8x16.min_s` | `0x76`| - | +| `i8x16.min_u` | `0x77`| - | +| `i8x16.max_s` | `0x78`| - | +| `i8x16.max_u` | `0x79`| - | +| `i8x16.avgr_u` | `0x7b`| - | +| `i16x8.abs` | `0x80`| - | +| `i16x8.neg` | `0x81`| - | +| `i16x8.any_true` | `0x82`| - | +| `i16x8.all_true` | `0x83`| - | +| `i16x8.bitmask` | `0x84`| - | +| `i16x8.narrow_i32x4_s` | `0x85`| - | +| `i16x8.narrow_i32x4_u` | `0x86`| - | +| `i16x8.widen_low_i8x16_s` | `0x87`| - | +| `i16x8.widen_high_i8x16_s` | `0x88`| - | +| `i16x8.widen_low_i8x16_u` | `0x89`| - | +| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.shl` | `0x8b`| - | +| `i16x8.shr_s` | `0x8c`| - | +| `i16x8.shr_u` | `0x8d`| - | +| `i16x8.add` | `0x8e`| - | +| `i16x8.add_sat_s` | `0x8f`| - | +| `i16x8.add_sat_u` | `0x90`| - | +| `i16x8.sub` | `0x91`| - | +| `i16x8.sub_sat_s` | `0x92`| - | +| `i16x8.sub_sat_u` | `0x93`| - | +| `i16x8.mul` | `0x95`| - | +| `i16x8.min_s` | `0x96`| - | +| `i16x8.min_u` | `0x97`| - | +| `i16x8.max_s` | `0x98`| - | +| `i16x8.max_u` | `0x99`| - | +| `i16x8.avgr_u` | `0x9b`| | +| `i32x4.abs` | `0xa0`| - | +| `i32x4.neg` | `0xa1`| - | +| `i32x4.any_true` | `0xa2`| - | +| `i32x4.all_true` | `0xa3`| - | +| `i32x4.bitmask` | `0xa4`| - | +| `i32x4.widen_low_i16x8_s` | `0xa7`| - | +| `i32x4.widen_high_i16x8_s` | `0xa8`| - | +| `i32x4.widen_low_i16x8_u` | `0xa9`| - | +| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.shl` | `0xab`| - | +| `i32x4.shr_s` | `0xac`| - | +| `i32x4.shr_u` | `0xad`| - | +| `i32x4.add` | `0xae`| - | +| `i32x4.sub` | `0xb1`| - | +| `i32x4.mul` | `0xb5`| - | +| `i32x4.min_s` | `0xb6`| - | +| `i32x4.min_u` | `0xb7`| - | +| `i32x4.max_s` | `0xb8`| - | +| `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | +| `i64x2.neg` | `0xc1`| - | +| `i64x2.shl` | `0xcb`| - | +| `i64x2.shr_s` | `0xcc`| - | +| `i64x2.shr_u` | `0xcd`| - | +| `i64x2.add` | `0xce`| - | +| `i64x2.sub` | `0xd1`| - | +| `i64x2.mul` | `0xd5`| - | +| `f32x4.ceil` | `0xd8`| - | +| `f32x4.floor` | `0xd9`| - | +| `f32x4.trunc` | `0xda`| - | +| `f32x4.nearest` | `0xdb`| - | +| `f64x2.ceil` | `0xdc`| - | +| `f64x2.floor` | `0xdd`| - | +| `f64x2.trunc` | `0xde`| - | +| `f64x2.nearest` | `0xdf`| - | +| `f32x4.abs` | `0xe0`| - | +| `f32x4.neg` | `0xe1`| - | +| `f32x4.sqrt` | `0xe3`| - | +| `f32x4.add` | `0xe4`| - | +| `f32x4.sub` | `0xe5`| - | +| `f32x4.mul` | `0xe6`| - | +| `f32x4.div` | `0xe7`| - | +| `f32x4.min` | `0xe8`| - | +| `f32x4.max` | `0xe9`| - | +| `f32x4.pmin` | `0xea`| - | +| `f32x4.pmax` | `0xeb`| - | +| `f64x2.abs` | `0xec`| - | +| `f64x2.neg` | `0xed`| - | +| `f64x2.sqrt` | `0xef`| - | +| `f64x2.add` | `0xf0`| - | +| `f64x2.sub` | `0xf1`| - | +| `f64x2.mul` | `0xf2`| - | +| `f64x2.div` | `0xf3`| - | +| `f64x2.min` | `0xf4`| - | +| `f64x2.max` | `0xf5`| - | +| `f64x2.pmin` | `0xf6`| - | +| `f64x2.pmax` | `0xf7`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | +| `f32x4.convert_i32x4_s` | `0xfa`| - | +| `f32x4.convert_i32x4_u` | `0xfb`| - | +| `v128.load32_zero` | `0xfc`| - | +| `v128.load64_zero` | `0xfd`| - | +| `i16x8.extmul_low_i8x16_s` | `0x110`| - | +| `i16x8.extmul_high_i8x16_s` | `0x111`| - | +| `i16x8.extmul_low_i8x16_u` | `0x112`| - | +| `i16x8.extmul_high_i8x16_u` | `0x113`| - | +| `i32x4.extmul_low_i16x8_s` | `0x114`| - | +| `i32x4.extmul_high_i16x8_s` | `0x115`| - | +| `i32x4.extmul_low_i16x8_u` | `0x116`| - | +| `i32x4.extmul_high_i16x8_u` | `0x117`| - | +| `i64x2.extmul_low_i32x4_s` | `0x118`| - | +| `i64x2.extmul_high_i32x4_s` | `0x119`| - | +| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | +| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 204222b0cf..1608357e1d 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,198 +1,210 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | -| ---------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | +| ----------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_low_i8x16_s` | | | | | | +| `i16x8.extmul_high_i8x16_s` | | | | | | +| `i16x8.extmul_low_i8x16_u` | | | | | | +| `i16x8.extmul_high_i8x16_u` | | | | | | +| `i32x4.extmul_low_i16x8_s` | | | | | | +| `i32x4.extmul_high_i16x8_s` | | | | | | +| `i32x4.extmul_low_i16x8_u` | | | | | | +| `i32x4.extmul_high_i16x8_u` | | | | | | +| `i64x2.extmul_low_i32x4_s` | | | | | | +| `i64x2.extmul_high_i32x4_s` | | | | | | +| `i64x2.extmul_low_i32x4_u` | | | | | | +| `i64x2.extmul_high_i32x4_u` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 8e4a940804..8aca4796fc 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -416,6 +416,38 @@ def S.neg(a): return S.lanewise_unary(neg, a) ``` +## Extended integer arithmetic + +### Extended integer multiplication +* `i16x8.extmul_low_i8x16_s(a: v128, b: v128) -> v128` +* `i16x8.extmul_high_i8x16_s(a: v128, b: v128) -> v128` +* `i16x8.extmul_low_i8x16_u(a: v128, b: v128) -> v128` +* `i16x8.extmul_high_i8x16_u(a: v128, b: v128) -> v128` +* `i32x4.extmul_low_i16x8_s(a: v128, b: v128) -> v128` +* `i32x4.extmul_high_i16x8_s(a: v128, b: v128) -> v128` +* `i32x4.extmul_low_i16x8_u(a: v128, b: v128) -> v128` +* `i32x4.extmul_high_i16x8_u(a: v128, b: v128) -> v128` +* `i64x2.extmul_low_i32x4_s(a: v128, b: v128) -> v128` +* `i64x2.extmul_high_i32x4_s(a: v128, b: v128) -> v128` +* `i64x2.extmul_low_i32x4_u(a: v128, b: v128) -> v128` +* `i64x2.extmul_high_i32x4_u(a: v128, b: v128) -> v128` + +Lane-wise integer extended multiplication producing twice wider result than the inputs. + +These instructions provide a more performant equivalent to the following composite operations: +- `i16x8.extmul_low_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.widen_low_i8x16_s(a), i16x8.widen_low_i8x16_s(b))`. +- `i16x8.extmul_high_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.widen_high_i8x16_s(a), i16x8.widen_high_i8x16_s(b))`. +- `i16x8.extmul_low_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.widen_low_i8x16_u(a), i16x8.widen_low_i8x16_u(b))`. +- `i16x8.extmul_high_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.widen_high_i8x16_u(a), i16x8.widen_high_i8x16_u(b))`. +- `i32x4.extmul_low_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.widen_low_i16x8_s(a), i32x4.widen_low_i16x8_s(b))`. +- `i32x4.extmul_high_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.widen_high_i16x8_s(a), i32x4.widen_high_i16x8_s(b))`. +- `i32x4.extmul_low_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.widen_low_i16x8_u(a), i32x4.widen_low_i16x8_u(b))`. +- `i32x4.extmul_high_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.widen_high_i16x8_u(a), i32x4.widen_high_i16x8_u(b))`. +- `i64x2.extmul_low_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.widen_low_i32x4_s(a), i64x2.widen_low_i32x4_s(b))`. +- `i64x2.extmul_high_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.widen_high_i32x4_s(a), i64x2.widen_high_i32x4_s(b))`. +- `i64x2.extmul_low_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_low_i32x4_u(a), i64x2.widen_low_i32x4_u(b))`. +- `i64x2.extmul_high_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_high_i32x4_u(a), i64x2.widen_high_i32x4_u(b))`. + ## Saturating integer arithmetic Saturating integer arithmetic behaves differently on signed and unsigned lanes. From 2fd21c0bda211b7258409260f1c411578e42eafc Mon Sep 17 00:00:00 2001 From: Anonymous <65428781+00ff0000red@users.noreply.github.com> Date: Sun, 20 Dec 2020 18:22:48 -0800 Subject: [PATCH 266/378] Fix typo in SIMD.md (#409) --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 8aca4796fc..0b324e48ea 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -349,7 +349,7 @@ def S.Reduce(x): ``` There is no integer division operation provided here. This operation is not -commonly part of bit 128-bit SIMD ISAs. +commonly part of 128-bit SIMD ISAs. ### Integer addition * `i8x16.add(a: v128, b: v128) -> v128` From df999c87487f95ff6f3250c184329508807e9d64 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 11 Jan 2021 10:53:02 -0800 Subject: [PATCH 267/378] i16x8.q15rmul_sat_s instruction (#365) Merging with TBD opcodes. --- proposals/simd/BinarySIMD.md | 3 ++- proposals/simd/ImplementationStatus.md | 1 + proposals/simd/SIMD.md | 13 +++++++++++++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 865112f5e8..c86c9ab21e 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -161,7 +161,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i16x8.min_u` | `0x97`| - | | `i16x8.max_s` | `0x98`| - | | `i16x8.max_u` | `0x99`| - | -| `i16x8.avgr_u` | `0x9b`| | +| `i16x8.avgr_u` | `0x9b`| - | | `i32x4.abs` | `0xa0`| - | | `i32x4.neg` | `0xa1`| - | | `i32x4.any_true` | `0xa2`| - | @@ -237,3 +237,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.extmul_high_i32x4_s` | `0x119`| - | | `i64x2.extmul_low_i32x4_u` | `0x11a`| - | | `i64x2.extmul_high_i32x4_u` | `0x11b`| - | +| `i16x8.q15mulr_sat_s` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 1608357e1d..75d6e69996 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -130,6 +130,7 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.q15mulr_sat_s` | | | | | | | `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 0b324e48ea..2cd33c5517 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -509,6 +509,19 @@ def S.sub_sat_u(a, b): return S.lanewise_binary(subsat, S.AsUnsigned(a), S.AsUnsigned(b)) ``` +### Saturating integer Q-format rounding multiplication + +* `i16x8.q15mulr_sat_s(a: v128, b: v128) -> v128` + +Lane-wise saturating rounding multiplication in Q15 format: + +```python +def S.q15mulr_sat_s(a, b): + def subq15mulr(x, y): + return S.SignedSaturate((x * y + 0x4000) >> 15) + return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b)) +``` + ### Lane-wise integer minimum * `i8x16.min_s(a: v128, b: v128) -> v128` * `i8x16.min_u(a: v128, b: v128) -> v128` From 364e89f103d1d4ba4fcfb686715b4e1a918faf0a Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 11 Jan 2021 10:54:48 -0800 Subject: [PATCH 268/378] Merge from upstream spec (#407) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * [spec] automate instruction index rebuild (#1259) * [test] Add test for malformed functype (#1254) * [test] Correct tests for missing elements (#1251) Remove the code section in tests for malformed element section. Otherwise the code section id (0x0a) is taken as an element's table index what is a validation error. This is similar to the previously reported issue: https://github.com/WebAssembly/spec/issues/1170. * [test] Add tests for data segment with memidx 1 (#1249) * [test] Correct i32.store alignment in a LEB128 test (#1261) In the binary-leb128.wast, change the alignment of an i32.store instruction from 3 (invalid) to 2 (the intention suggested by the comment). Co-authored-by: Andreas Rossberg Co-authored-by: Paweł Bylica --- document/core/Makefile | 8 ++- .../core/appendix/gen-index-instructions.py | 55 ++++++++++++++++ document/core/appendix/index-instructions.rst | 55 ++++++++++++++++ test/core/binary-leb128.wast | 2 +- test/core/binary.wast | 33 +++++++++- test/core/data.wast | 63 +++++++++++++++++++ 6 files changed, 211 insertions(+), 5 deletions(-) diff --git a/document/core/Makefile b/document/core/Makefile index aaa01b4f99..3ff1a87cbb 100644 --- a/document/core/Makefile +++ b/document/core/Makefile @@ -89,8 +89,12 @@ bikeshed-keep: echo Downloaded Bikeshed. +.PHONY: index +index: + (cd appendix; ./gen-index-instructions.py) + .PHONY: pdf -pdf: latexpdf +pdf: index latexpdf mkdir -p $(BUILDDIR)/html/$(DOWNLOADDIR) ln -f $(BUILDDIR)/latex/$(NAME).pdf $(BUILDDIR)/html/$(DOWNLOADDIR)/$(NAME).pdf @@ -101,7 +105,7 @@ clean: rm -rf $(STATICDIR) .PHONY: html -html: +html: index $(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/html for file in `ls $(BUILDDIR)/html/*.html`; \ do \ diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 5801b67788..4660361de3 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -258,6 +258,61 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64.\EXTEND\K{8\_s}', r'\hex{C2}', r'[\I64] \to [\I64]', r'valid-unop', r'exec-unop', r'op-iextendn_s'), Instruction(r'\I64.\EXTEND\K{16\_s}', r'\hex{C3}', r'[\I64] \to [\I64]', r'valid-unop', r'exec-unop', r'op-iextendn_s'), Instruction(r'\I64.\EXTEND\K{32\_s}', r'\hex{C4}', r'[\I64] \to [\I64]', r'valid-unop', r'exec-unop', r'op-iextendn_s'), + Instruction(None, r'\hex{C5}'), + Instruction(None, r'\hex{C6}'), + Instruction(None, r'\hex{C7}'), + Instruction(None, r'\hex{C8}'), + Instruction(None, r'\hex{C9}'), + Instruction(None, r'\hex{CA}'), + Instruction(None, r'\hex{CB}'), + Instruction(None, r'\hex{CC}'), + Instruction(None, r'\hex{CD}'), + Instruction(None, r'\hex{CE}'), + Instruction(None, r'\hex{CF}'), + Instruction(None, r'\hex{D0}'), + Instruction(None, r'\hex{D1}'), + Instruction(None, r'\hex{D2}'), + Instruction(None, r'\hex{D3}'), + Instruction(None, r'\hex{D4}'), + Instruction(None, r'\hex{D5}'), + Instruction(None, r'\hex{D6}'), + Instruction(None, r'\hex{D7}'), + Instruction(None, r'\hex{D8}'), + Instruction(None, r'\hex{D9}'), + Instruction(None, r'\hex{DA}'), + Instruction(None, r'\hex{DB}'), + Instruction(None, r'\hex{DC}'), + Instruction(None, r'\hex{DD}'), + Instruction(None, r'\hex{DE}'), + Instruction(None, r'\hex{DF}'), + Instruction(None, r'\hex{E0}'), + Instruction(None, r'\hex{E1}'), + Instruction(None, r'\hex{E2}'), + Instruction(None, r'\hex{E3}'), + Instruction(None, r'\hex{E4}'), + Instruction(None, r'\hex{E5}'), + Instruction(None, r'\hex{E6}'), + Instruction(None, r'\hex{E7}'), + Instruction(None, r'\hex{E8}'), + Instruction(None, r'\hex{E9}'), + Instruction(None, r'\hex{EA}'), + Instruction(None, r'\hex{EB}'), + Instruction(None, r'\hex{EC}'), + Instruction(None, r'\hex{ED}'), + Instruction(None, r'\hex{EE}'), + Instruction(None, r'\hex{EF}'), + Instruction(None, r'\hex{F0}'), + Instruction(None, r'\hex{F1}'), + Instruction(None, r'\hex{F2}'), + Instruction(None, r'\hex{F3}'), + Instruction(None, r'\hex{F4}'), + Instruction(None, r'\hex{F5}'), + Instruction(None, r'\hex{F6}'), + Instruction(None, r'\hex{F7}'), + Instruction(None, r'\hex{F8}'), + Instruction(None, r'\hex{F9}'), + Instruction(None, r'\hex{FA}'), + Instruction(None, r'\hex{FB}'), Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}', r'\hex{FC}~~0', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'), Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~1', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), Instruction(r'\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}', r'\hex{FC}~~2', r'[\F64] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 543966e3bc..bd95266a6a 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -206,6 +206,61 @@ Instruction Binary Opcode Type :math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +(reserved) :math:`\hex{D0}` +(reserved) :math:`\hex{D1}` +(reserved) :math:`\hex{D2}` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` :math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/test/core/binary-leb128.wast b/test/core/binary-leb128.wast index cd39a5d2c9..8503c9ae9e 100644 --- a/test/core/binary-leb128.wast +++ b/test/core/binary-leb128.wast @@ -852,7 +852,7 @@ "\41\00" ;; i32.const 0 "\41\03" ;; i32.const 3 "\36" ;; i32.store - "\03" ;; alignment 2 + "\02" ;; alignment 2 "\82\80\80\80\10" ;; offset 2 with unused bits set "\0b" ;; end ) diff --git a/test/core/binary.wast b/test/core/binary.wast index 8b5bcfc4ce..fd188d760c 100644 --- a/test/core/binary.wast +++ b/test/core/binary.wast @@ -52,6 +52,20 @@ (assert_malformed (module binary "\00asm" "\01\00\00\00" "\ff\00\01\00") "malformed section id") +;; Type section with signed LEB128 encoded type +(assert_malformed + (module binary + "\00asm" "\01\00\00\00" + "\01" ;; Type section id + "\05" ;; Type section length + "\01" ;; Types vector length + "\e0\7f" ;; Malformed functype, -0x20 in signed LEB128 encoding + "\00\00" + ) + "integer representation too long" +) + + ;; call_indirect reserved byte equal to zero. (assert_malformed (module binary @@ -773,8 +787,23 @@ "\09\07\02" ;; elem with inconsistent segment count (2 declared, 1 given) "\00\41\00\0b\01\00" ;; elem 0 ;; "\00\41\00\0b\01\00" ;; elem 1 (missed) - "\0a\04\01" ;; code section - "\02\00\0b" ;; function body + ) + "unexpected end" +) + +;; 2 elem segment declared, 1.5 given +(assert_malformed + (module binary + "\00asm" "\01\00\00\00" + "\01\04\01" ;; type section + "\60\00\00" ;; type 0 + "\03\02\01\00" ;; func section + "\04\04\01" ;; table section + "\70\00\01" ;; table 0 + "\09\07\02" ;; elem with inconsistent segment count (2 declared, 1 given) + "\00\41\00\0b\01\00" ;; elem 0 + "\00\41\00" ;; elem 1 (partial) + ;; "\0b\01\00" ;; elem 1 (missing part) ) "unexpected end" ) diff --git a/test/core/data.wast b/test/core/data.wast index 7d69454173..d65abf36f8 100644 --- a/test/core/data.wast +++ b/test/core/data.wast @@ -286,6 +286,69 @@ "unknown memory" ) +;; Data segment with memory index 1 (only memory 0 available) +(assert_invalid + (module binary + "\00asm" "\01\00\00\00" + "\05\03\01" ;; memory section + "\00\00" ;; memory 0 + "\0b\06\01" ;; data section + "\01\41\00\0b" ;; data segment 0 for memory 1 + "\00" ;; empty vec(byte) + ) + "unknown memory 1" +) + +;; Data segment with memory index 1 (no memory section) +(assert_invalid + (module binary + "\00asm" "\01\00\00\00" + "\0b\06\01" ;; data section + "\01\41\00\0b" ;; data segment 0 for memory 1 + "\00" ;; empty vec(byte) + ) + "unknown memory 1" +) + +;; Data segment with memory index 1 and vec(byte) as above, +;; only memory 0 available. +(assert_invalid + (module binary + "\00asm" "\01\00\00\00" + "\05\03\01" ;; memory section + "\00\00" ;; memory 0 + "\0b\44\01" ;; data section + "\01" ;; memory index + "\41\00\0b" ;; offset constant expression + "\3e" ;; vec(byte) length + "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f" + "\10\11\12\13\14\15\16\17\18\19\1a\1b\1c\1d\1e\1f" + "\20\21\22\23\24\25\26\27\28\29\2a\2b\2c\2d\2e\2f" + "\30\31\32\33\34\35\36\37\38\39\3a\3b\3c\3d" + ) + "unknown memory 1" +) + +;; Data segment with memory index 1 and specially crafted vec(byte) after. +;; This is to detect incorrect validation where memory index is interpreted +;; as a flag followed by "\41" interpreted as the size of vec(byte) +;; with the expected number of bytes following. +(assert_invalid + (module binary + "\00asm" "\01\00\00\00" + "\0b\44\01" ;; data section + "\01" ;; memory index + "\41\00\0b" ;; offset constant expression + "\3e" ;; vec(byte) length + "\00\01\02\03\04\05\06\07\08\09\0a\0b\0c\0d\0e\0f" + "\10\11\12\13\14\15\16\17\18\19\1a\1b\1c\1d\1e\1f" + "\20\21\22\23\24\25\26\27\28\29\2a\2b\2c\2d\2e\2f" + "\30\31\32\33\34\35\36\37\38\39\3a\3b\3c\3d" + ) + "unknown memory 1" +) + + ;; Invalid offsets (assert_invalid From dc1646a55f4fe5a1fcb054c4285ca8c67a22b98f Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 11 Jan 2021 11:01:29 -0800 Subject: [PATCH 269/378] i64x2.bitmask instruction (#368) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/NewOpcodes.md | 60 +++++++++++++------------- proposals/simd/SIMD.md | 1 + 4 files changed, 33 insertions(+), 30 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index c86c9ab21e..f3d0ce37db 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -183,6 +183,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.max_u` | `0xb9`| - | | `i32x4.dot_i16x8_s` | `0xba`| - | | `i64x2.neg` | `0xc1`| - | +| `i64x2.bitmask` | `0xc4`| - | | `i64x2.shl` | `0xcb`| - | | `i64x2.shr_s` | `0xcc`| - | | `i64x2.shr_u` | `0xcd`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 75d6e69996..b7df7b78be 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -152,6 +152,7 @@ | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.bitmask` | | | | | | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index a92c44b17a..4e8eb7293c 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -78,36 +78,36 @@ | v128.xor | 0x51 | | v128.bitselect | 0x52 | -| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | -| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ----------- | ------ | -| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | -| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | -| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | -| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | -| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | ---- | 0xc4 | -| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | -| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | -| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | ---- | 0xc7 | -| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | ---- | 0xc8 | -| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | ---- | 0xc9 | -| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | ---- | 0xca | -| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | -| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | -| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | -| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | -| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | -| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | -| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | -| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | -| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | -| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | -| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | -| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | -| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | -| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | -| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | -| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | -| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | +| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | +| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------- | ------ | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | +| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | +| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | +| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | +| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | +| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | +| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | ---- | 0xc7 | +| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | ---- | 0xc8 | +| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | ---- | 0xc9 | +| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | ---- | 0xca | +| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | +| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | +| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | +| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | +| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | +| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | +| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | +| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | +| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | +| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | +| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | +| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | +| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | +| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | +| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | +| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | +| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | | f32x4 Op | opcode | f64x2 Op | opcode | | --------------- | ------ | --------------- | ------ | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 2cd33c5517..ce77981dfd 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -703,6 +703,7 @@ def S.all_true(a): * `i8x16.bitmask(a: v128) -> i32` * `i16x8.bitmask(a: v128) -> i32` * `i32x4.bitmask(a: v128) -> i32` +* `i64x2.bitmask(a: v128) -> i32` These operations extract the high bit for each lane in `a` and produce a scalar mask with all bits concatenated. From daa35f5e0eb9685bb31e05241cd8488a67941d5f Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 11 Jan 2021 14:54:35 -0800 Subject: [PATCH 270/378] i64x4.widen_(low/high)_i32x8_(s/u) instructions (#290) --- proposals/simd/BinarySIMD.md | 4 ++ proposals/simd/ImplementationStatus.md | 4 ++ proposals/simd/NewOpcodes.md | 60 +++++++++++++------------- proposals/simd/SIMD.md | 4 ++ 4 files changed, 42 insertions(+), 30 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index f3d0ce37db..761c2af1ea 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -184,6 +184,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.dot_i16x8_s` | `0xba`| - | | `i64x2.neg` | `0xc1`| - | | `i64x2.bitmask` | `0xc4`| - | +| `i64x2.widen_low_i32x4_s` | `0xc7`| - | +| `i64x2.widen_high_i32x4_s` | `0xc8`| - | +| `i64x2.widen_low_i32x4_u` | `0xc9`| - | +| `i64x2.widen_high_i32x4_u` | `0xca`| - | | `i64x2.shl` | `0xcb`| - | | `i64x2.shr_s` | `0xcc`| - | | `i64x2.shr_u` | `0xcd`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index b7df7b78be..8038813b16 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -159,6 +159,10 @@ | `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.widen_low_i32x4_s` | | | | | | +| `i64x2.widen_high_i32x4_s` | | | | | | +| `i64x2.widen_low_i32x4_u` | | | | | | +| `i64x2.widen_high_i32x4_u` | | | | | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 4e8eb7293c..dce79a535d 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -78,36 +78,36 @@ | v128.xor | 0x51 | | v128.bitselect | 0x52 | -| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | -| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------- | ------ | -| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | -| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | -| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | -| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | -| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | -| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | -| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | -| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | ---- | 0xc7 | -| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | ---- | 0xc8 | -| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | ---- | 0xc9 | -| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | ---- | 0xca | -| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | -| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | -| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | -| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | -| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | -| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | -| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | -| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | -| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | -| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | -| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | -| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | -| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | -| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | -| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | -| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | -| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | +| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | +| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | +| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | +| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | +| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | +| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | +| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | +| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 | +| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 | +| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 | +| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca | +| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | +| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | +| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | +| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | +| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | +| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | +| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | +| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | +| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | +| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | +| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | +| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | +| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | +| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | +| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | +| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | +| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | | f32x4 Op | opcode | f64x2 Op | opcode | | --------------- | ------ | --------------- | ------ | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index ce77981dfd..eb64ecdeb2 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -1065,6 +1065,10 @@ def S.narrow_T_u(a, b): * `i32x4.widen_high_i16x8_s(a: v128) -> v128` * `i32x4.widen_low_i16x8_u(a: v128) -> v128` * `i32x4.widen_high_i16x8_u(a: v128) -> v128` +* `i64x2.widen_low_i32x4_s(a: v128) -> v128` +* `i64x2.widen_high_i32x4_s(a: v128) -> v128` +* `i64x2.widen_low_i32x4_u(a: v128) -> v128` +* `i64x2.widen_high_i32x4_u(a: v128) -> v128` Converts low or high half of the smaller lane vector to a larger lane vector, sign extended or zero (unsigned) extended. From c0a5ddee0067a76d9938b94c156e610f34f7cd92 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 11 Jan 2021 16:41:48 -0800 Subject: [PATCH 271/378] Replace i8x16/i16x8/i32x4.any_true with v128.any_true (#423) --- proposals/simd/BinarySIMD.md | 4 +--- proposals/simd/ImplementationStatus.md | 4 +--- proposals/simd/NewOpcodes.md | 32 +++++++++++++------------- proposals/simd/SIMD.md | 16 +++---------- 4 files changed, 21 insertions(+), 35 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 761c2af1ea..e003399fa2 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -117,7 +117,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v128.bitselect` | `0x52`| - | | `i8x16.abs` | `0x60`| - | | `i8x16.neg` | `0x61`| - | -| `i8x16.any_true` | `0x62`| - | | `i8x16.all_true` | `0x63`| - | | `i8x16.bitmask` | `0x64`| - | | `i8x16.narrow_i16x8_s` | `0x65`| - | @@ -138,7 +137,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i8x16.avgr_u` | `0x7b`| - | | `i16x8.abs` | `0x80`| - | | `i16x8.neg` | `0x81`| - | -| `i16x8.any_true` | `0x82`| - | | `i16x8.all_true` | `0x83`| - | | `i16x8.bitmask` | `0x84`| - | | `i16x8.narrow_i32x4_s` | `0x85`| - | @@ -164,7 +162,6 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i16x8.avgr_u` | `0x9b`| - | | `i32x4.abs` | `0xa0`| - | | `i32x4.neg` | `0xa1`| - | -| `i32x4.any_true` | `0xa2`| - | | `i32x4.all_true` | `0xa3`| - | | `i32x4.bitmask` | `0xa4`| - | | `i32x4.widen_low_i16x8_s` | `0xa7`| - | @@ -243,3 +240,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.extmul_low_i32x4_u` | `0x11a`| - | | `i64x2.extmul_high_i32x4_u` | `0x11b`| - | | `i16x8.q15mulr_sat_s` | `TBD`| - | +| `v128.any_true` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8038813b16..d28f933be2 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -85,7 +85,6 @@ | `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -106,7 +105,6 @@ | `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -133,7 +131,6 @@ | `i16x8.q15mulr_sat_s` | | | | | | | `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -211,6 +208,7 @@ | `i64x2.extmul_high_i32x4_s` | | | | | | | `i64x2.extmul_low_i32x4_u` | | | | | | | `i64x2.extmul_high_i32x4_u` | | | | | | +| `v128.any_true` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index dce79a535d..8241be0f89 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -80,13 +80,13 @@ | i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | | -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ | -| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ---- | 0xc0 | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ------------- | 0xc0 | | i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | -| i8x16.any_true | 0x62 | i16x8.any_true | 0x82 | i32x4.any_true | 0xa2 | ---- | 0xc2 | -| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ---- | 0xc3 | +| ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ------------- | 0xc3 | | i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | -| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ---- | 0xc5 | -| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ---- | 0xc6 | +| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 | +| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 | | ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 | | ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 | | ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 | @@ -95,19 +95,19 @@ | i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | | i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | | i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | -| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ---- | 0xcf | -| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ---- | 0xd0 | +| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ------------- | 0xcf | +| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ------------- | 0xd0 | | i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | -| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | -| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | -| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | +| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 | +| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 | +| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 | | ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | -| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | -| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | -| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | -| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | -| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | -| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | +| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ------------- | 0xd6 | +| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ------------- | 0xd7 | +| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ------------- | 0xd8 | +| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ------------- | 0xd9 | +| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ------------- | 0xda | +| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ------------- | 0xdb | | f32x4 Op | opcode | f64x2 Op | opcode | | --------------- | ------ | --------------- | ------ | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index eb64ecdeb2..47a958f3e6 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -668,20 +668,10 @@ rather than selecting bits controlled by a control mask vector. These operations reduce all the lanes of an integer vector to a single scalar 0 or 1 value. A lane is considered "true" if it is non-zero. -### Any lane true -* `i8x16.any_true(a: v128) -> i32` -* `i16x8.any_true(a: v128) -> i32` -* `i32x4.any_true(a: v128) -> i32` +### Any bit true +* `v128.any_true(a: v128) -> i32` -These functions return 1 if any lane in `a` is non-zero, 0 otherwise. - -```python -def S.any_true(a): - for i in range(S.Lanes): - if a[i] != 0: - return 1 - return 0 -``` +These functions return 1 if any bit in `a` is non-zero, 0 otherwise. ### All lanes true * `i8x16.all_true(a: v128) -> i32` From 32d700a110c6b6bf2e3ccd532737a77743733a80 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Tue, 12 Jan 2021 09:13:02 -0800 Subject: [PATCH 272/378] Load Lane and Store Lane instructions (#350) --- proposals/simd/BinarySIMD.md | 430 +++++++++++++------------ proposals/simd/ImplementationStatus.md | 8 + proposals/simd/SIMD.md | 19 ++ 3 files changed, 246 insertions(+), 211 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index e003399fa2..57971f1657 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -30,214 +30,222 @@ In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byt For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). -| Instruction | `simdop` | Immediate operands | -| ----------------------------|---------:|--------------------| -| `v128.load` | `0x00`| m:memarg | -| `v128.load8x8_s` | `0x01`| m:memarg | -| `v128.load8x8_u` | `0x02`| m:memarg | -| `v128.load16x4_s` | `0x03`| m:memarg | -| `v128.load16x4_u` | `0x04`| m:memarg | -| `v128.load32x2_s` | `0x05`| m:memarg | -| `v128.load32x2_u` | `0x06`| m:memarg | -| `v128.load8_splat` | `0x07`| m:memarg | -| `v128.load16_splat` | `0x08`| m:memarg | -| `v128.load32_splat` | `0x09`| m:memarg | -| `v128.load64_splat` | `0x0a`| m:memarg | -| `v128.store` | `0x0b`| m:memarg | -| `v128.const` | `0x0c`| i:ImmByte[16] | -| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | -| `i8x16.swizzle` | `0x0e`| - | -| `i8x16.splat` | `0x0f`| - | -| `i16x8.splat` | `0x10`| - | -| `i32x4.splat` | `0x11`| - | -| `i64x2.splat` | `0x12`| - | -| `f32x4.splat` | `0x13`| - | -| `f64x2.splat` | `0x14`| - | -| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | -| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | -| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | -| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | -| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | -| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | -| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | -| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | -| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | -| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | -| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | -| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | -| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | -| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | -| `i8x16.eq` | `0x23`| - | -| `i8x16.ne` | `0x24`| - | -| `i8x16.lt_s` | `0x25`| - | -| `i8x16.lt_u` | `0x26`| - | -| `i8x16.gt_s` | `0x27`| - | -| `i8x16.gt_u` | `0x28`| - | -| `i8x16.le_s` | `0x29`| - | -| `i8x16.le_u` | `0x2a`| - | -| `i8x16.ge_s` | `0x2b`| - | -| `i8x16.ge_u` | `0x2c`| - | -| `i16x8.eq` | `0x2d`| - | -| `i16x8.ne` | `0x2e`| - | -| `i16x8.lt_s` | `0x2f`| - | -| `i16x8.lt_u` | `0x30`| - | -| `i16x8.gt_s` | `0x31`| - | -| `i16x8.gt_u` | `0x32`| - | -| `i16x8.le_s` | `0x33`| - | -| `i16x8.le_u` | `0x34`| - | -| `i16x8.ge_s` | `0x35`| - | -| `i16x8.ge_u` | `0x36`| - | -| `i32x4.eq` | `0x37`| - | -| `i32x4.ne` | `0x38`| - | -| `i32x4.lt_s` | `0x39`| - | -| `i32x4.lt_u` | `0x3a`| - | -| `i32x4.gt_s` | `0x3b`| - | -| `i32x4.gt_u` | `0x3c`| - | -| `i32x4.le_s` | `0x3d`| - | -| `i32x4.le_u` | `0x3e`| - | -| `i32x4.ge_s` | `0x3f`| - | -| `i32x4.ge_u` | `0x40`| - | -| `f32x4.eq` | `0x41`| - | -| `f32x4.ne` | `0x42`| - | -| `f32x4.lt` | `0x43`| - | -| `f32x4.gt` | `0x44`| - | -| `f32x4.le` | `0x45`| - | -| `f32x4.ge` | `0x46`| - | -| `f64x2.eq` | `0x47`| - | -| `f64x2.ne` | `0x48`| - | -| `f64x2.lt` | `0x49`| - | -| `f64x2.gt` | `0x4a`| - | -| `f64x2.le` | `0x4b`| - | -| `f64x2.ge` | `0x4c`| - | -| `v128.not` | `0x4d`| - | -| `v128.and` | `0x4e`| - | -| `v128.andnot` | `0x4f`| - | -| `v128.or` | `0x50`| - | -| `v128.xor` | `0x51`| - | -| `v128.bitselect` | `0x52`| - | -| `i8x16.abs` | `0x60`| - | -| `i8x16.neg` | `0x61`| - | -| `i8x16.all_true` | `0x63`| - | -| `i8x16.bitmask` | `0x64`| - | -| `i8x16.narrow_i16x8_s` | `0x65`| - | -| `i8x16.narrow_i16x8_u` | `0x66`| - | -| `i8x16.shl` | `0x6b`| - | -| `i8x16.shr_s` | `0x6c`| - | -| `i8x16.shr_u` | `0x6d`| - | -| `i8x16.add` | `0x6e`| - | -| `i8x16.add_sat_s` | `0x6f`| - | -| `i8x16.add_sat_u` | `0x70`| - | -| `i8x16.sub` | `0x71`| - | -| `i8x16.sub_sat_s` | `0x72`| - | -| `i8x16.sub_sat_u` | `0x73`| - | -| `i8x16.min_s` | `0x76`| - | -| `i8x16.min_u` | `0x77`| - | -| `i8x16.max_s` | `0x78`| - | -| `i8x16.max_u` | `0x79`| - | -| `i8x16.avgr_u` | `0x7b`| - | -| `i16x8.abs` | `0x80`| - | -| `i16x8.neg` | `0x81`| - | -| `i16x8.all_true` | `0x83`| - | -| `i16x8.bitmask` | `0x84`| - | -| `i16x8.narrow_i32x4_s` | `0x85`| - | -| `i16x8.narrow_i32x4_u` | `0x86`| - | -| `i16x8.widen_low_i8x16_s` | `0x87`| - | -| `i16x8.widen_high_i8x16_s` | `0x88`| - | -| `i16x8.widen_low_i8x16_u` | `0x89`| - | -| `i16x8.widen_high_i8x16_u` | `0x8a`| - | -| `i16x8.shl` | `0x8b`| - | -| `i16x8.shr_s` | `0x8c`| - | -| `i16x8.shr_u` | `0x8d`| - | -| `i16x8.add` | `0x8e`| - | -| `i16x8.add_sat_s` | `0x8f`| - | -| `i16x8.add_sat_u` | `0x90`| - | -| `i16x8.sub` | `0x91`| - | -| `i16x8.sub_sat_s` | `0x92`| - | -| `i16x8.sub_sat_u` | `0x93`| - | -| `i16x8.mul` | `0x95`| - | -| `i16x8.min_s` | `0x96`| - | -| `i16x8.min_u` | `0x97`| - | -| `i16x8.max_s` | `0x98`| - | -| `i16x8.max_u` | `0x99`| - | -| `i16x8.avgr_u` | `0x9b`| - | -| `i32x4.abs` | `0xa0`| - | -| `i32x4.neg` | `0xa1`| - | -| `i32x4.all_true` | `0xa3`| - | -| `i32x4.bitmask` | `0xa4`| - | -| `i32x4.widen_low_i16x8_s` | `0xa7`| - | -| `i32x4.widen_high_i16x8_s` | `0xa8`| - | -| `i32x4.widen_low_i16x8_u` | `0xa9`| - | -| `i32x4.widen_high_i16x8_u` | `0xaa`| - | -| `i32x4.shl` | `0xab`| - | -| `i32x4.shr_s` | `0xac`| - | -| `i32x4.shr_u` | `0xad`| - | -| `i32x4.add` | `0xae`| - | -| `i32x4.sub` | `0xb1`| - | -| `i32x4.mul` | `0xb5`| - | -| `i32x4.min_s` | `0xb6`| - | -| `i32x4.min_u` | `0xb7`| - | -| `i32x4.max_s` | `0xb8`| - | -| `i32x4.max_u` | `0xb9`| - | -| `i32x4.dot_i16x8_s` | `0xba`| - | -| `i64x2.neg` | `0xc1`| - | -| `i64x2.bitmask` | `0xc4`| - | -| `i64x2.widen_low_i32x4_s` | `0xc7`| - | -| `i64x2.widen_high_i32x4_s` | `0xc8`| - | -| `i64x2.widen_low_i32x4_u` | `0xc9`| - | -| `i64x2.widen_high_i32x4_u` | `0xca`| - | -| `i64x2.shl` | `0xcb`| - | -| `i64x2.shr_s` | `0xcc`| - | -| `i64x2.shr_u` | `0xcd`| - | -| `i64x2.add` | `0xce`| - | -| `i64x2.sub` | `0xd1`| - | -| `i64x2.mul` | `0xd5`| - | -| `f32x4.ceil` | `0xd8`| - | -| `f32x4.floor` | `0xd9`| - | -| `f32x4.trunc` | `0xda`| - | -| `f32x4.nearest` | `0xdb`| - | -| `f64x2.ceil` | `0xdc`| - | -| `f64x2.floor` | `0xdd`| - | -| `f64x2.trunc` | `0xde`| - | -| `f64x2.nearest` | `0xdf`| - | -| `f32x4.abs` | `0xe0`| - | -| `f32x4.neg` | `0xe1`| - | -| `f32x4.sqrt` | `0xe3`| - | -| `f32x4.add` | `0xe4`| - | -| `f32x4.sub` | `0xe5`| - | -| `f32x4.mul` | `0xe6`| - | -| `f32x4.div` | `0xe7`| - | -| `f32x4.min` | `0xe8`| - | -| `f32x4.max` | `0xe9`| - | -| `f32x4.pmin` | `0xea`| - | -| `f32x4.pmax` | `0xeb`| - | -| `f64x2.abs` | `0xec`| - | -| `f64x2.neg` | `0xed`| - | -| `f64x2.sqrt` | `0xef`| - | -| `f64x2.add` | `0xf0`| - | -| `f64x2.sub` | `0xf1`| - | -| `f64x2.mul` | `0xf2`| - | -| `f64x2.div` | `0xf3`| - | -| `f64x2.min` | `0xf4`| - | -| `f64x2.max` | `0xf5`| - | -| `f64x2.pmin` | `0xf6`| - | -| `f64x2.pmax` | `0xf7`| - | -| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | -| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | -| `f32x4.convert_i32x4_s` | `0xfa`| - | -| `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0xfc`| - | -| `v128.load64_zero` | `0xfd`| - | -| `i16x8.extmul_low_i8x16_s` | `0x110`| - | -| `i16x8.extmul_high_i8x16_s` | `0x111`| - | -| `i16x8.extmul_low_i8x16_u` | `0x112`| - | -| `i16x8.extmul_high_i8x16_u` | `0x113`| - | -| `i32x4.extmul_low_i16x8_s` | `0x114`| - | -| `i32x4.extmul_high_i16x8_s` | `0x115`| - | -| `i32x4.extmul_low_i16x8_u` | `0x116`| - | -| `i32x4.extmul_high_i16x8_u` | `0x117`| - | -| `i64x2.extmul_low_i32x4_s` | `0x118`| - | -| `i64x2.extmul_high_i32x4_s` | `0x119`| - | -| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | -| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | -| `i16x8.q15mulr_sat_s` | `TBD`| - | -| `v128.any_true` | `TBD`| - | +| Instruction | `simdop` | Immediate operands | +| ----------------------------|---------:|--------------------------| +| `v128.load` | `0x00`| m:memarg | +| `v128.load8x8_s` | `0x01`| m:memarg | +| `v128.load8x8_u` | `0x02`| m:memarg | +| `v128.load16x4_s` | `0x03`| m:memarg | +| `v128.load16x4_u` | `0x04`| m:memarg | +| `v128.load32x2_s` | `0x05`| m:memarg | +| `v128.load32x2_u` | `0x06`| m:memarg | +| `v128.load8_splat` | `0x07`| m:memarg | +| `v128.load16_splat` | `0x08`| m:memarg | +| `v128.load32_splat` | `0x09`| m:memarg | +| `v128.load64_splat` | `0x0a`| m:memarg | +| `v128.store` | `0x0b`| m:memarg | +| `v128.const` | `0x0c`| i:ImmByte[16] | +| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | +| `i8x16.swizzle` | `0x0e`| - | +| `i8x16.splat` | `0x0f`| - | +| `i16x8.splat` | `0x10`| - | +| `i32x4.splat` | `0x11`| - | +| `i64x2.splat` | `0x12`| - | +| `f32x4.splat` | `0x13`| - | +| `f64x2.splat` | `0x14`| - | +| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | +| `i8x16.eq` | `0x23`| - | +| `i8x16.ne` | `0x24`| - | +| `i8x16.lt_s` | `0x25`| - | +| `i8x16.lt_u` | `0x26`| - | +| `i8x16.gt_s` | `0x27`| - | +| `i8x16.gt_u` | `0x28`| - | +| `i8x16.le_s` | `0x29`| - | +| `i8x16.le_u` | `0x2a`| - | +| `i8x16.ge_s` | `0x2b`| - | +| `i8x16.ge_u` | `0x2c`| - | +| `i16x8.eq` | `0x2d`| - | +| `i16x8.ne` | `0x2e`| - | +| `i16x8.lt_s` | `0x2f`| - | +| `i16x8.lt_u` | `0x30`| - | +| `i16x8.gt_s` | `0x31`| - | +| `i16x8.gt_u` | `0x32`| - | +| `i16x8.le_s` | `0x33`| - | +| `i16x8.le_u` | `0x34`| - | +| `i16x8.ge_s` | `0x35`| - | +| `i16x8.ge_u` | `0x36`| - | +| `i32x4.eq` | `0x37`| - | +| `i32x4.ne` | `0x38`| - | +| `i32x4.lt_s` | `0x39`| - | +| `i32x4.lt_u` | `0x3a`| - | +| `i32x4.gt_s` | `0x3b`| - | +| `i32x4.gt_u` | `0x3c`| - | +| `i32x4.le_s` | `0x3d`| - | +| `i32x4.le_u` | `0x3e`| - | +| `i32x4.ge_s` | `0x3f`| - | +| `i32x4.ge_u` | `0x40`| - | +| `f32x4.eq` | `0x41`| - | +| `f32x4.ne` | `0x42`| - | +| `f32x4.lt` | `0x43`| - | +| `f32x4.gt` | `0x44`| - | +| `f32x4.le` | `0x45`| - | +| `f32x4.ge` | `0x46`| - | +| `f64x2.eq` | `0x47`| - | +| `f64x2.ne` | `0x48`| - | +| `f64x2.lt` | `0x49`| - | +| `f64x2.gt` | `0x4a`| - | +| `f64x2.le` | `0x4b`| - | +| `f64x2.ge` | `0x4c`| - | +| `v128.not` | `0x4d`| - | +| `v128.and` | `0x4e`| - | +| `v128.andnot` | `0x4f`| - | +| `v128.or` | `0x50`| - | +| `v128.xor` | `0x51`| - | +| `v128.bitselect` | `0x52`| - | +| `i8x16.abs` | `0x60`| - | +| `i8x16.neg` | `0x61`| - | +| `i8x16.all_true` | `0x63`| - | +| `i8x16.bitmask` | `0x64`| - | +| `i8x16.narrow_i16x8_s` | `0x65`| - | +| `i8x16.narrow_i16x8_u` | `0x66`| - | +| `i8x16.shl` | `0x6b`| - | +| `i8x16.shr_s` | `0x6c`| - | +| `i8x16.shr_u` | `0x6d`| - | +| `i8x16.add` | `0x6e`| - | +| `i8x16.add_sat_s` | `0x6f`| - | +| `i8x16.add_sat_u` | `0x70`| - | +| `i8x16.sub` | `0x71`| - | +| `i8x16.sub_sat_s` | `0x72`| - | +| `i8x16.sub_sat_u` | `0x73`| - | +| `i8x16.min_s` | `0x76`| - | +| `i8x16.min_u` | `0x77`| - | +| `i8x16.max_s` | `0x78`| - | +| `i8x16.max_u` | `0x79`| - | +| `i8x16.avgr_u` | `0x7b`| - | +| `i16x8.abs` | `0x80`| - | +| `i16x8.neg` | `0x81`| - | +| `i16x8.all_true` | `0x83`| - | +| `i16x8.bitmask` | `0x84`| - | +| `i16x8.narrow_i32x4_s` | `0x85`| - | +| `i16x8.narrow_i32x4_u` | `0x86`| - | +| `i16x8.widen_low_i8x16_s` | `0x87`| - | +| `i16x8.widen_high_i8x16_s` | `0x88`| - | +| `i16x8.widen_low_i8x16_u` | `0x89`| - | +| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.shl` | `0x8b`| - | +| `i16x8.shr_s` | `0x8c`| - | +| `i16x8.shr_u` | `0x8d`| - | +| `i16x8.add` | `0x8e`| - | +| `i16x8.add_sat_s` | `0x8f`| - | +| `i16x8.add_sat_u` | `0x90`| - | +| `i16x8.sub` | `0x91`| - | +| `i16x8.sub_sat_s` | `0x92`| - | +| `i16x8.sub_sat_u` | `0x93`| - | +| `i16x8.mul` | `0x95`| - | +| `i16x8.min_s` | `0x96`| - | +| `i16x8.min_u` | `0x97`| - | +| `i16x8.max_s` | `0x98`| - | +| `i16x8.max_u` | `0x99`| - | +| `i16x8.avgr_u` | `0x9b`| - | +| `i32x4.abs` | `0xa0`| - | +| `i32x4.neg` | `0xa1`| - | +| `i32x4.all_true` | `0xa3`| - | +| `i32x4.bitmask` | `0xa4`| - | +| `i32x4.widen_low_i16x8_s` | `0xa7`| - | +| `i32x4.widen_high_i16x8_s` | `0xa8`| - | +| `i32x4.widen_low_i16x8_u` | `0xa9`| - | +| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.shl` | `0xab`| - | +| `i32x4.shr_s` | `0xac`| - | +| `i32x4.shr_u` | `0xad`| - | +| `i32x4.add` | `0xae`| - | +| `i32x4.sub` | `0xb1`| - | +| `i32x4.mul` | `0xb5`| - | +| `i32x4.min_s` | `0xb6`| - | +| `i32x4.min_u` | `0xb7`| - | +| `i32x4.max_s` | `0xb8`| - | +| `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | +| `i64x2.neg` | `0xc1`| - | +| `i64x2.bitmask` | `0xc4`| - | +| `i64x2.widen_low_i32x4_s` | `0xc7`| - | +| `i64x2.widen_high_i32x4_s` | `0xc8`| - | +| `i64x2.widen_low_i32x4_u` | `0xc9`| - | +| `i64x2.widen_high_i32x4_u` | `0xca`| - | +| `i64x2.shl` | `0xcb`| - | +| `i64x2.shr_s` | `0xcc`| - | +| `i64x2.shr_u` | `0xcd`| - | +| `i64x2.add` | `0xce`| - | +| `i64x2.sub` | `0xd1`| - | +| `i64x2.mul` | `0xd5`| - | +| `f32x4.ceil` | `0xd8`| - | +| `f32x4.floor` | `0xd9`| - | +| `f32x4.trunc` | `0xda`| - | +| `f32x4.nearest` | `0xdb`| - | +| `f64x2.ceil` | `0xdc`| - | +| `f64x2.floor` | `0xdd`| - | +| `f64x2.trunc` | `0xde`| - | +| `f64x2.nearest` | `0xdf`| - | +| `f32x4.abs` | `0xe0`| - | +| `f32x4.neg` | `0xe1`| - | +| `f32x4.sqrt` | `0xe3`| - | +| `f32x4.add` | `0xe4`| - | +| `f32x4.sub` | `0xe5`| - | +| `f32x4.mul` | `0xe6`| - | +| `f32x4.div` | `0xe7`| - | +| `f32x4.min` | `0xe8`| - | +| `f32x4.max` | `0xe9`| - | +| `f32x4.pmin` | `0xea`| - | +| `f32x4.pmax` | `0xeb`| - | +| `f64x2.abs` | `0xec`| - | +| `f64x2.neg` | `0xed`| - | +| `f64x2.sqrt` | `0xef`| - | +| `f64x2.add` | `0xf0`| - | +| `f64x2.sub` | `0xf1`| - | +| `f64x2.mul` | `0xf2`| - | +| `f64x2.div` | `0xf3`| - | +| `f64x2.min` | `0xf4`| - | +| `f64x2.max` | `0xf5`| - | +| `f64x2.pmin` | `0xf6`| - | +| `f64x2.pmax` | `0xf7`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | +| `f32x4.convert_i32x4_s` | `0xfa`| - | +| `f32x4.convert_i32x4_u` | `0xfb`| - | +| `v128.load32_zero` | `0xfc`| - | +| `v128.load64_zero` | `0xfd`| - | +| `i16x8.extmul_low_i8x16_s` | `0x110`| - | +| `i16x8.extmul_high_i8x16_s` | `0x111`| - | +| `i16x8.extmul_low_i8x16_u` | `0x112`| - | +| `i16x8.extmul_high_i8x16_u` | `0x113`| - | +| `i32x4.extmul_low_i16x8_s` | `0x114`| - | +| `i32x4.extmul_high_i16x8_s` | `0x115`| - | +| `i32x4.extmul_low_i16x8_u` | `0x116`| - | +| `i32x4.extmul_high_i16x8_u` | `0x117`| - | +| `i64x2.extmul_low_i32x4_s` | `0x118`| - | +| `i64x2.extmul_high_i32x4_s` | `0x119`| - | +| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | +| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | +| `i16x8.q15mulr_sat_s` | `TBD`| - | +| `v128.any_true` | `TBD`| - | +| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index d28f933be2..2379601345 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -209,6 +209,14 @@ | `i64x2.extmul_low_i32x4_u` | | | | | | | `i64x2.extmul_high_i32x4_u` | | | | | | | `v128.any_true` | | | | | | +| `v128.load8_lane` | | | | | | +| `v128.load16_lane` | | | | | | +| `v128.load32_lane` | | | | | | +| `v128.load64_lane` | | | | | | +| `v128.store8_lane` | | | | | | +| `v128.store16_lane` | | | | | | +| `v128.store32_lane` | | | | | | +| `v128.store64_lane` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 47a958f3e6..6062a80bf3 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -841,6 +841,16 @@ def S.load_splat(memarg): return S.splat(S.LaneType.from_bytes(val_bytes)) ``` +### Load Lane + +* `v128.load8_lane(m: memarg, x: v128, imm: ImmLaneIdx16) -> v128` +* `v128.load16_lane(m: memarg, x: v128, imm: ImmLaneIdx8) -> v128` +* `v128.load32_lane(m: memarg, x: v128, imm: ImmLaneIdx4) -> v128` +* `v128.load64_lane(m: memarg, x: v128, imm: ImmLaneIdx2) -> v128` + +Load a single element from `m` into the lane of `x` specified in the immediate +mode operand `imm`. The values of all other lanes of `x` are bypassed as is. + ### Load and Extend * `v128.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane @@ -879,6 +889,15 @@ def S.store(memarg, a): memory[memarg.offset:memarg.offset + 16] = bytes(a) ``` +### Store Lane + +* `v128.store8_lane(m: memarg, data: v128, imm: ImmLaneIdx16)` +* `v128.store16_lane(m: memarg, data: v128, imm: ImmLaneIdx8)` +* `v128.store32_lane(m: memarg, data: v128, imm: ImmLaneIdx4)` +* `v128.store64_lane(m: memarg, data: v128, imm: ImmLaneIdx2)` + +Store into `m` the lane of `data` specified in the immediate mode operand `imm`. + ## Floating-point sign bit operations These floating point operations are simple manipulations of the sign bit. No From 10d3153ccf13de42b59329dc45c3f33652bf0dc7 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 13 Jan 2021 19:08:15 -0800 Subject: [PATCH 273/378] Fix SIMD load splat/extend names in binary and text section of spec (#405) --- document/core/binary/instructions.rst | 20 ++++++++++---------- document/core/text/instructions.rst | 20 ++++++++++---------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 436cd27f31..224e5a46a0 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -419,16 +419,16 @@ SIMD loads and stores are followed by the encoding of their |memarg| immediate. \begin{array}{llclll} \production{instruction} & \Binstr &::=& \dots \\&&|& \hex{FD}~~0{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD~m \\ &&|& - \hex{FD}~~1{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{8x8\_s}~m \\ &&|& - \hex{FD}~~2{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{8x8\_u}~m \\ &&|& - \hex{FD}~~3{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{16x4\_s}~m \\ &&|& - \hex{FD}~~4{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{16x4\_u}~m \\ &&|& - \hex{FD}~~5{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{32x2\_s}~m \\ &&|& - \hex{FD}~~6{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{32x2\_u}~m \\ &&|& - \hex{FD}~~7{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I8X16.\LOAD\K{\_splat}~m \\ &&|& - \hex{FD}~~8{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I16X8.\LOAD\K{\_splat}~m \\ &&|& - \hex{FD}~~9{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I32X4.\LOAD\K{\_splat}~m \\ &&|& - \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \I64X2.\LOAD\K{\_splat}~m \\ &&|& + \hex{FD}~~1{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{8x8\_s}~m \\ &&|& + \hex{FD}~~2{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{8x8\_u}~m \\ &&|& + \hex{FD}~~3{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{16x4\_s}~m \\ &&|& + \hex{FD}~~4{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{16x4\_u}~m \\ &&|& + \hex{FD}~~5{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32x2\_s}~m \\ &&|& + \hex{FD}~~6{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32x2\_u}~m \\ &&|& + \hex{FD}~~7{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{8\_splat}~m \\ &&|& + \hex{FD}~~8{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{16\_splat}~m \\ &&|& + \hex{FD}~~9{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32\_splat}~m \\ &&|& + \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ \end{array} diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index a6b2338c3a..2c1623fd05 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -460,16 +460,16 @@ SIMD memory instructions have optional offset and alignment immediates, like the \begin{array}{llclll} \production{instruction} & \Tplaininstr_I &::=& \dots \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\ &&|& \text{v128.load}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\LOAD~m \\ &&|& - \text{i16x8.load8x8\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I16X8.\LOAD\K{8x8\_s}~m \\ &&|& - \text{i16x8.load8x8\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I16X8.\LOAD\K{8x8\_u}~m \\ &&|& - \text{i32x4.load16x4\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I32X4.\LOAD\K{16x4\_s}~m \\ &&|& - \text{i32x4.load16x4\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I32X4.\LOAD\K{16x4\_u}~m \\ &&|& - \text{i64x2.load32x2\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{32x2\_s}~m \\ &&|& - \text{i64x2.load32x2\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{32x2\_u}~m \\ &&|& - \text{i8x16.load\_splat}~~m{:}\Tmemarg_1 &\Rightarrow& \I8X16.\LOAD\K{\_splat}~m \\ &&|& - \text{i16x8.load\_splat}~~m{:}\Tmemarg_2 &\Rightarrow& \I16X8.\LOAD\K{\_splat}~m \\ &&|& - \text{i32x4.load\_splat}~~m{:}\Tmemarg_4 &\Rightarrow& \I32X4.\LOAD\K{\_splat}~m \\ &&|& - \text{i64x2.load\_splat}~~m{:}\Tmemarg_8 &\Rightarrow& \I64X2.\LOAD\K{\_splat}~m \\ &&|& + \text{v128.load8x8\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{8x8\_s}~m \\ &&|& + \text{v128.load8x8\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{8x8\_u}~m \\ &&|& + \text{v128.load16x4\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{16x4\_s}~m \\ &&|& + \text{v128.load16x4\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{16x4\_u}~m \\ &&|& + \text{v128.load32x2\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{32x2\_s}~m \\ &&|& + \text{v128.load32x2\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{32x2\_u}~m \\ &&|& + \text{v128.load8\_splat}~~m{:}\Tmemarg_1 &\Rightarrow& \V128.\LOAD\K{8\_splat}~m \\ &&|& + \text{v128.load16\_splat}~~m{:}\Tmemarg_2 &\Rightarrow& \V128.\LOAD\K{16\_splat}~m \\ &&|& + \text{v128.load32\_splat}~~m{:}\Tmemarg_4 &\Rightarrow& \V128.\LOAD\K{32\_splat}~m \\ &&|& + \text{v128.load64\_splat}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& \text{v128.store}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\STORE~m \\ \end{array} From 0813f8586ea3945adb45ba3c7bba2469201b9073 Mon Sep 17 00:00:00 2001 From: Deepti Gandluri Date: Thu, 14 Jan 2021 10:16:37 -0800 Subject: [PATCH 274/378] Fix error in Q-format rounding multiplication (#424) --- proposals/simd/SIMD.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 6062a80bf3..24db53eb12 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -519,7 +519,7 @@ Lane-wise saturating rounding multiplication in Q15 format: def S.q15mulr_sat_s(a, b): def subq15mulr(x, y): return S.SignedSaturate((x * y + 0x4000) >> 15) - return S.lanewise_binary(subsat, S.AsSigned(a), S.AsSigned(b)) + return S.lanewise_binary(subq15mulr, S.AsSigned(a), S.AsSigned(b)) ``` ### Lane-wise integer minimum From 723c967ae77ad38aa8d600d3dd4cc54e3da28c26 Mon Sep 17 00:00:00 2001 From: Zhi An Ng Date: Wed, 13 Jan 2021 05:46:22 +0000 Subject: [PATCH 275/378] Update v8 implementation status For i64x2.bitmask and ext_mul instructions. --- proposals/simd/ImplementationStatus.md | 28 +++++++++++++------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 2379601345..a2b18c992f 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,7 +149,7 @@ | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.bitmask` | | | | | | +| `i64x2.bitmask` | | :heavy_check_mark: | | | | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -196,18 +196,18 @@ | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extmul_low_i8x16_s` | | | | | | -| `i16x8.extmul_high_i8x16_s` | | | | | | -| `i16x8.extmul_low_i8x16_u` | | | | | | -| `i16x8.extmul_high_i8x16_u` | | | | | | -| `i32x4.extmul_low_i16x8_s` | | | | | | -| `i32x4.extmul_high_i16x8_s` | | | | | | -| `i32x4.extmul_low_i16x8_u` | | | | | | -| `i32x4.extmul_high_i16x8_u` | | | | | | -| `i64x2.extmul_low_i32x4_s` | | | | | | -| `i64x2.extmul_high_i32x4_s` | | | | | | -| `i64x2.extmul_low_i32x4_u` | | | | | | -| `i64x2.extmul_high_i32x4_u` | | | | | | +| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | | `v128.any_true` | | | | | | | `v128.load8_lane` | | | | | | | `v128.load16_lane` | | | | | | @@ -220,7 +220,7 @@ [1] Tip of tree LLVM as of May 20, 2020 -[2] V8 8.8.218. Requires flag `--experimental-wasm-simd` +[2] V8 8.9.238. Requires flag `--experimental-wasm-simd` [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` From 194b9933e4a159b3c92eb5fb3c670c570347b2a5 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 11:05:54 -0800 Subject: [PATCH 276/378] Rename i8x16.any_true to v128.any_true and remove other variants This was accepted in #416. The test code is manually modified (this is not generated code), to always call v128.any_true. The exported function names are unchanged, and no tests are removed, since it is useful to test v128 of different constants. --- interpreter/binary/decode.ml | 4 +- interpreter/binary/encode.ml | 4 +- interpreter/exec/eval_simd.ml | 4 +- interpreter/syntax/operators.ml | 4 +- interpreter/text/arrange.ml | 4 +- interpreter/text/lexer.mll | 4 +- test/core/simd/simd_boolean.wast | 90 ++++++++++++++++---------------- test/core/simd/simd_lane.wast | 10 ++-- 8 files changed, 56 insertions(+), 68 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 9fd176392e..ec5accad65 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -306,7 +306,7 @@ let simd_prefix s = | 0x52l -> v128_bitselect | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg - | 0x62l -> i8x16_any_true + | 0x62l -> v128_any_true | 0x63l -> i8x16_all_true | 0x64l -> i8x16_bitmask | 0x6bl -> i8x16_shl @@ -327,7 +327,6 @@ let simd_prefix s = | 0x7bl -> i8x16_avgr_u | 0x80l -> i16x8_abs | 0x81l -> i16x8_neg - | 0x82l -> i16x8_any_true | 0x83l -> i16x8_all_true | 0x84l -> i16x8_bitmask | 0x85l -> i16x8_narrow_i32x4_s @@ -353,7 +352,6 @@ let simd_prefix s = | 0x9bl -> i16x8_avgr_u | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg - | 0xa2l -> i32x4_any_true | 0xa3l -> i32x4_all_true | 0xa4l -> i32x4_bitmask | 0xa7l -> i32x4_widen_low_i16x8_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 164863fa6a..c69f2fa328 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -252,11 +252,9 @@ let encode m = | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false - | Test (V128 V128Op.(I8x16 AnyTrue)) -> simd_op 0x62l + | Test (V128 V128Op.(V128 AnyTrue)) -> simd_op 0x62l | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l - | Test (V128 V128Op.(I16x8 AnyTrue)) -> simd_op 0x82l | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l - | Test (V128 V128Op.(I32x4 AnyTrue)) -> simd_op 0xa2l | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l | Test (V128 _) -> assert false diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 9c34718af7..28b0585b11 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -159,11 +159,9 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct let testop (op : testop) = let f = match op with - | I8x16 AnyTrue -> SXX.I8x16.any_true + | V128 AnyTrue -> SXX.I8x16.any_true | I8x16 AllTrue -> SXX.I8x16.all_true - | I16x8 AnyTrue -> SXX.I16x8.any_true | I16x8 AllTrue -> SXX.I16x8.all_true - | I32x4 AnyTrue -> SXX.I32x4.any_true | I32x4 AllTrue -> SXX.I32x4.all_true | _ -> assert false in fun v -> f (of_value 1 v) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index fc1bd258d2..d775b0d68d 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -252,6 +252,7 @@ let v128_andnot = Binary (V128 V128Op.(V128 AndNot)) let v128_or = Binary (V128 V128Op.(V128 Or)) let v128_xor = Binary (V128 V128Op.(V128 Xor)) let v128_bitselect = SimdTernary (V128Op.Bitselect) +let v128_any_true = Test (V128 V128Op.(V128 AnyTrue)) let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) @@ -271,7 +272,6 @@ let i8x16_gt_u = Binary (V128 V128Op.(I8x16 GtU)) let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) let i8x16_neg = Unary (V128 V128Op.(I8x16 Neg)) -let i8x16_any_true = Test (V128 V128Op.(I8x16 AnyTrue)) let i8x16_bitmask = SimdBitmask Simd.I8x16 let i8x16_all_true = Test (V128 V128Op.(I8x16 AllTrue)) let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) @@ -311,7 +311,6 @@ let i16x8_gt_u = Binary (V128 V128Op.(I16x8 GtU)) let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) let i16x8_neg = Unary (V128 V128Op.(I16x8 Neg)) -let i16x8_any_true = Test (V128 V128Op.(I16x8 AnyTrue)) let i16x8_bitmask = SimdBitmask Simd.I16x8 let i16x8_all_true = Test (V128 V128Op.(I16x8 AllTrue)) let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) @@ -348,7 +347,6 @@ let i32x4_ge_s = Binary (V128 V128Op.(I32x4 GeS)) let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) let i32x4_abs = Unary (V128 V128Op.(I32x4 Abs)) let i32x4_neg = Unary (V128 V128Op.(I32x4 Neg)) -let i32x4_any_true = Test (V128 V128Op.(I32x4 AnyTrue)) let i32x4_bitmask = SimdBitmask Simd.I32x4 let i32x4_all_true = Test (V128 V128Op.(I32x4 AllTrue)) let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 9e88f21753..1e97a1dcdd 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -191,12 +191,10 @@ struct open Ast.SimdOp let testop xx = function - | I8x16 AnyTrue -> "i8x16.any_true" | I8x16 AllTrue -> "i8x16.all_true" - | I16x8 AnyTrue -> "i16x8.any_true" | I16x8 AllTrue -> "i16x8.all_true" - | I32x4 AnyTrue -> "i32x4.any_true" | I32x4 AllTrue -> "i32x4.all_true" + | V128 AnyTrue -> "v128.any_true" | _ -> assert false let relop xx = assert false diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 85d1351247..880b3390f3 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -491,6 +491,7 @@ rule token = parse | vxxx".or" { UNARY v128_or } | vxxx".xor" { UNARY v128_xor } | vxxx".bitselect" { TERNARY v128_bitselect } + | vxxx".any_true" { UNARY (v128_any_true) } | (simd_shape as s)".neg" { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } @@ -525,9 +526,6 @@ rule token = parse | (simd_shape as s)".abs" { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } - | (simd_int_shape as s)".any_true" - { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - UNARY (simd_int_op s i8x16_any_true i16x8_any_true i32x4_any_true unreachable) } | (simd_int_shape as s)".all_true" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 2828f604c9..3fee25207c 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -1,15 +1,15 @@ ;; Test all the boolean operators on major boundary values and all special values. (module - (func (export "i8x16.any_true") (param $0 v128) (result i32) (i8x16.any_true (local.get $0))) + (func (export "i8x16.any_true") (param $0 v128) (result i32) (v128.any_true (local.get $0))) (func (export "i8x16.all_true") (param $0 v128) (result i32) (i8x16.all_true (local.get $0))) (func (export "i8x16.bitmask") (param $0 v128) (result i32) (i8x16.bitmask (local.get $0))) - (func (export "i16x8.any_true") (param $0 v128) (result i32) (i16x8.any_true (local.get $0))) + (func (export "i16x8.any_true") (param $0 v128) (result i32) (v128.any_true (local.get $0))) (func (export "i16x8.all_true") (param $0 v128) (result i32) (i16x8.all_true (local.get $0))) (func (export "i16x8.bitmask") (param $0 v128) (result i32) (i16x8.bitmask (local.get $0))) - (func (export "i32x4.any_true") (param $0 v128) (result i32) (i32x4.any_true (local.get $0))) + (func (export "i32x4.any_true") (param $0 v128) (result i32) (v128.any_true (local.get $0))) (func (export "i32x4.all_true") (param $0 v128) (result i32) (i32x4.all_true (local.get $0))) (func (export "i32x4.bitmask") (param $0 v128) (result i32) (i32x4.bitmask (local.get $0))) ) @@ -161,19 +161,19 @@ (module (memory 1) ;; as if condition (func (export "i8x16_any_true_as_if_cond") (param v128) (result i32) - (if (result i32) (i8x16.any_true (local.get 0)) + (if (result i32) (v128.any_true (local.get 0)) (then (i32.const 1)) (else (i32.const 0)) ) ) (func (export "i16x8_any_true_as_if_cond") (param v128) (result i32) - (if (result i32) (i16x8.any_true (local.get 0)) + (if (result i32) (v128.any_true (local.get 0)) (then (i32.const 1)) (else (i32.const 0)) ) ) (func (export "i32x4_any_true_as_if_cond") (param v128) (result i32) - (if (result i32) (i32x4.any_true (local.get 0)) + (if (result i32) (v128.any_true (local.get 0)) (then (i32.const 1)) (else (i32.const 0)) ) @@ -198,13 +198,13 @@ ) ;; any_true as select condition (func (export "i8x16_any_true_as_select_cond") (param v128) (result i32) - (select (i32.const 1) (i32.const 0) (i8x16.any_true (local.get 0))) + (select (i32.const 1) (i32.const 0) (v128.any_true (local.get 0))) ) (func (export "i16x8_any_true_as_select_cond") (param v128) (result i32) - (select (i32.const 1) (i32.const 0) (i16x8.any_true (local.get 0))) + (select (i32.const 1) (i32.const 0) (v128.any_true (local.get 0))) ) (func (export "i32x4_any_true_as_select_cond") (param v128) (result i32) - (select (i32.const 1) (i32.const 0) (i32x4.any_true (local.get 0))) + (select (i32.const 1) (i32.const 0) (v128.any_true (local.get 0))) ) ;; all_true as select condition (func (export "i8x16_all_true_as_select_cond") (param v128) (result i32) @@ -222,7 +222,7 @@ (local.set $1 (i32.const 2)) (block (local.set $1 (i32.const 1)) - (br_if 0 (i8x16.any_true (local.get $0))) + (br_if 0 (v128.any_true (local.get $0))) (local.set $1 (i32.const 0)) ) (local.get $1) @@ -232,7 +232,7 @@ (local.set $1 (i32.const 2)) (block (local.set $1 (i32.const 1)) - (br_if 0 (i16x8.any_true (local.get $0))) + (br_if 0 (v128.any_true (local.get $0))) (local.set $1 (i32.const 0)) ) (local.get $1) @@ -242,7 +242,7 @@ (local.set $1 (i32.const 2)) (block (local.set $1 (i32.const 1)) - (br_if 0 (i32x4.any_true (local.get $0))) + (br_if 0 (v128.any_true (local.get $0))) (local.set $1 (i32.const 0)) ) (local.get $1) @@ -280,33 +280,33 @@ ) ;; any_true as i32.and operand (func (export "i8x16_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.and (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + (i32.and (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i16x8_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.and (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + (i32.and (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i32x4_any_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.and (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + (i32.and (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) ;; any_true as i32.or operand (func (export "i8x16_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.or (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + (i32.or (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i16x8_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.or (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + (i32.or (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i32x4_any_true_as_i32.or_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.or (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + (i32.or (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) ;; any_true as i32.xor operand (func (export "i8x16_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.xor (i8x16.any_true (local.get $0)) (i8x16.any_true (local.get $1))) + (i32.xor (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i16x8_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.xor (i16x8.any_true (local.get $0)) (i16x8.any_true (local.get $1))) + (i32.xor (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) (func (export "i32x4_any_true_as_i32.xor_operand") (param $0 v128) (param $1 v128) (result i32) - (i32.xor (i32x4.any_true (local.get $0)) (i32x4.any_true (local.get $1))) + (i32.xor (v128.any_true (local.get $0)) (v128.any_true (local.get $1))) ) ;; all_true as i32.and operand (func (export "i8x16_all_true_as_i32.and_operand") (param $0 v128) (param $1 v128) (result i32) @@ -340,53 +340,53 @@ ) ;; any_true with v128.not (func (export "i8x16_any_true_with_v128.not") (param $0 v128) (result i32) - (i8x16.any_true (v128.not (local.get $0))) + (v128.any_true (v128.not (local.get $0))) ) (func (export "i16x8_any_true_with_v128.not") (param $0 v128) (result i32) - (i16x8.any_true (v128.not (local.get $0))) + (v128.any_true (v128.not (local.get $0))) ) (func (export "i32x4_any_true_with_v128.not") (param $0 v128) (result i32) - (i32x4.any_true (v128.not (local.get $0))) + (v128.any_true (v128.not (local.get $0))) ) ;; any_true with v128.and (func (export "i8x16_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) - (i8x16.any_true (v128.and (local.get $0) (local.get $1))) + (v128.any_true (v128.and (local.get $0) (local.get $1))) ) (func (export "i16x8_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) - (i16x8.any_true (v128.and (local.get $0) (local.get $1))) + (v128.any_true (v128.and (local.get $0) (local.get $1))) ) (func (export "i32x4_any_true_with_v128.and") (param $0 v128) (param $1 v128) (result i32) - (i32x4.any_true (v128.and (local.get $0) (local.get $1))) + (v128.any_true (v128.and (local.get $0) (local.get $1))) ) ;; any_true with v128.or (func (export "i8x16_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) - (i8x16.any_true (v128.or (local.get $0) (local.get $1))) + (v128.any_true (v128.or (local.get $0) (local.get $1))) ) (func (export "i16x8_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) - (i16x8.any_true (v128.or (local.get $0) (local.get $1))) + (v128.any_true (v128.or (local.get $0) (local.get $1))) ) (func (export "i32x4_any_true_with_v128.or") (param $0 v128) (param $1 v128) (result i32) - (i32x4.any_true (v128.or (local.get $0) (local.get $1))) + (v128.any_true (v128.or (local.get $0) (local.get $1))) ) ;; any_true with v128.xor (func (export "i8x16_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) - (i8x16.any_true (v128.xor (local.get $0) (local.get $1))) + (v128.any_true (v128.xor (local.get $0) (local.get $1))) ) (func (export "i16x8_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) - (i16x8.any_true (v128.xor (local.get $0) (local.get $1))) + (v128.any_true (v128.xor (local.get $0) (local.get $1))) ) (func (export "i32x4_any_true_with_v128.xor") (param $0 v128) (param $1 v128) (result i32) - (i32x4.any_true (v128.xor (local.get $0) (local.get $1))) + (v128.any_true (v128.xor (local.get $0) (local.get $1))) ) ;; any_true with v128.bitselect (func (export "i8x16_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) - (i8x16.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + (v128.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) ) (func (export "i16x8_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) - (i16x8.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + (v128.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) ) (func (export "i32x4_any_true_with_v128.bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result i32) - (i32x4.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) + (v128.any_true (v128.bitselect (local.get $0) (local.get $1) (local.get $2))) ) ;; all_true with v128.not (func (export "i8x16_all_true_with_v128.not") (param $0 v128) (result i32) @@ -965,11 +965,11 @@ ;; Type check -(assert_invalid (module (func (result i32) (i8x16.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (v128.any_true (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result i32) (i8x16.all_true (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result i32) (i16x8.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (v128.any_true (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result i32) (i16x8.all_true (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result i32) (i32x4.any_true (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result i32) (v128.any_true (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result i32) (i32x4.all_true (i32.const 0)))) "type mismatch") ;; Unknown operators @@ -983,8 +983,8 @@ (assert_invalid (module - (func $i8x16.any_true-arg-empty (result v128) - (i8x16.any_true) + (func $v128.any_true-arg-empty (result v128) + (v128.any_true) ) ) "type mismatch" @@ -999,8 +999,8 @@ ) (assert_invalid (module - (func $i16x8.any_true-arg-empty (result v128) - (i16x8.any_true) + (func $v128.any_true-arg-empty (result v128) + (v128.any_true) ) ) "type mismatch" @@ -1015,8 +1015,8 @@ ) (assert_invalid (module - (func $i32x4.any_true-arg-empty (result v128) - (i32x4.any_true) + (func $v128.any_true-arg-empty (result v128) + (v128.any_true) ) ) "type mismatch" diff --git a/test/core/simd/simd_lane.wast b/test/core/simd/simd_lane.wast index 55cbfd2ce0..9d4b5fd729 100644 --- a/test/core/simd/simd_lane.wast +++ b/test/core/simd/simd_lane.wast @@ -733,18 +733,18 @@ ;; Boolean horizontal reductions (func (export "as-i8x16_any_true-operand") (param v128 i32) (result i32) - (i8x16.any_true (i8x16.replace_lane 0 (local.get 0) (local.get 1)))) + (v128.any_true (i8x16.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "as-i16x8_any_true-operand") (param v128 i32) (result i32) - (i16x8.any_true (i16x8.replace_lane 0 (local.get 0) (local.get 1)))) + (v128.any_true (i16x8.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "as-i32x4_any_true-operand1") (param v128 i32) (result i32) - (i32x4.any_true (i32x4.replace_lane 0 (local.get 0) (local.get 1)))) + (v128.any_true (i32x4.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "as-i32x4_any_true-operand2") (param v128 i64) (result i32) - (i32x4.any_true (i64x2.replace_lane 0 (local.get 0) (local.get 1)))) + (v128.any_true (i64x2.replace_lane 0 (local.get 0) (local.get 1)))) (func (export "swizzle-as-i8x16_all_true-operands") (param v128 v128) (result i32) (i8x16.all_true (i8x16.swizzle (local.get 0) (local.get 1)))) (func (export "shuffle-as-i8x16_any_true-operands") (param v128 v128) (result i32) - (i8x16.any_true (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)))) + (v128.any_true (i8x16.shuffle 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (local.get 0) (local.get 1)))) ) (assert_return (invoke "as-i8x16_splat-operand" (v128.const i8x16 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) From 6ff10c87d01121892faf83ab0e7ab904fa429cd2 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 11:22:32 -0800 Subject: [PATCH 277/378] Add i64x2.bitmask to text This was accepted into this proposal in #410. --- document/core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 1 + document/core/binary/instructions.rst | 1 + document/core/syntax/instructions.rst | 3 ++- document/core/text/instructions.rst | 1 + 5 files changed, 6 insertions(+), 1 deletion(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 4660361de3..cfda1d989b 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -471,6 +471,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\I64x2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index bd95266a6a..6f4294c78c 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -419,6 +419,7 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\I64x2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 224e5a46a0..47fa4435c7 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -667,6 +667,7 @@ All other SIMD instructions are plain opcodes without any immediates. \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& + \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64x2.\BITMASK \\ &&|& \hex{FD}~~203{:}\Bu32 &\Rightarrow& \I64X2.\VSHL \\ &&|& \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index ce1d8518b0..8f250d0fba 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -232,7 +232,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i32x4.}\vitestop \\&&|& \K{i8x16.}\BITMASK ~|~ \K{i16x8.}\BITMASK ~|~ - \K{i32x4.}\BITMASK \\&&|& + \K{i32x4.}\BITMASK ~|~ + \K{i64x2.}\BITMASK \\&&|& \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& \K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 2c1623fd05..cedb1b8f49 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -701,6 +701,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& + \text{i64x2.bitmask} &\Rightarrow& \I64x2.\BITMASK\\ &&|& \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& From 73c7608c409b937b4eaa33b31a0a528ec321a9a8 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 11:24:13 -0800 Subject: [PATCH 278/378] Fix some typos --- document/core/binary/instructions.rst | 2 +- document/core/text/instructions.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 47fa4435c7..445abc87f3 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -667,7 +667,7 @@ All other SIMD instructions are plain opcodes without any immediates. \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& - \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64x2.\BITMASK \\ &&|& + \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64X2.\BITMASK \\ &&|& \hex{FD}~~203{:}\Bu32 &\Rightarrow& \I64X2.\VSHL \\ &&|& \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index cedb1b8f49..c346d8a453 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -701,7 +701,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& - \text{i64x2.bitmask} &\Rightarrow& \I64x2.\BITMASK\\ &&|& + \text{i64x2.bitmask} &\Rightarrow& \I64X2.\BITMASK\\ &&|& \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& From dfffd0d9a12d10bbdfc312fbc231ea6696abe8ca Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 11:25:21 -0800 Subject: [PATCH 279/378] One more typo --- document/core/appendix/gen-index-instructions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index cfda1d989b..bac27259b5 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -471,7 +471,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64x2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'validation ', r'execution '), + Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), From e6673a77c5f99f1412e3231014369f3b0a4ee787 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 14:04:47 -0800 Subject: [PATCH 280/378] Check in generated instructions --- document/core/appendix/index-instructions.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 6f4294c78c..1574a7c11d 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -419,7 +419,7 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I64x2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` From 89f115da3046a5b68f9ae5405abfb3af76f27d4e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 22 Jan 2021 11:14:42 -0800 Subject: [PATCH 281/378] [spectext] Rename i8x16.any_true to v128.any_true The renaming was accepted in #416. Interpreter was changed in #426. This makes similar changes to the formal text. --- .../core/appendix/gen-index-instructions.py | 4 +- document/core/appendix/index-instructions.rst | 4 +- document/core/binary/instructions.rst | 6 +-- document/core/exec/instructions.rst | 40 +++++++++---------- document/core/syntax/instructions.rst | 2 +- document/core/text/instructions.rst | 6 +-- document/core/valid/instructions.rst | 14 +++++++ 7 files changed, 41 insertions(+), 35 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index bac27259b5..f3d38771e9 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -404,9 +404,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), @@ -427,7 +427,6 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\ANYTRUE', r'\hex{FD}~~130', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), @@ -453,7 +452,6 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\ANYTRUE', r'\hex{FD}~~162', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'validation ', r'execution '), Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'validation ', r'execution '), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 1574a7c11d..640a72d4bc 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -352,9 +352,9 @@ Instruction Binary Opcode Type :math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >` @@ -375,7 +375,6 @@ Instruction Binary Opcode Type :math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\ANYTRUE` :math:`\hex{FD}~~130` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >` @@ -401,7 +400,6 @@ Instruction Binary Opcode Type :math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` :math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I32X4.\ANYTRUE` :math:`\hex{FD}~~162` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` :math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 445abc87f3..a0f5fc4d2c 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -572,7 +572,8 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~79{:}\Bu32 &\Rightarrow& \V128.\VANDNOT \\ &&|& \hex{FD}~~80{:}\Bu32 &\Rightarrow& \V128.\VOR \\ &&|& \hex{FD}~~81{:}\Bu32 &\Rightarrow& \V128.\VXOR \\ &&|& - \hex{FD}~~82{:}\Bu32 &\Rightarrow& \V128.\BITSELECT + \hex{FD}~~82{:}\Bu32 &\Rightarrow& \V128.\BITSELECT \\ &&|& + \hex{FD}~~98{:}\Bu32 &\Rightarrow& \V128.\ANYTRUE \\ &&|& \end{array} .. _binary-vitestop: @@ -587,7 +588,6 @@ All other SIMD instructions are plain opcodes without any immediates. \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~96{:}\Bu32 &\Rightarrow& \I8X16.\VABS \\ &&|& \hex{FD}~~97{:}\Bu32 &\Rightarrow& \I8X16.\VNEG \\ &&|& - \hex{FD}~~98{:}\Bu32 &\Rightarrow& \I8X16.\ANYTRUE \\ &&|& \hex{FD}~~99{:}\Bu32 &\Rightarrow& \I8X16.\ALLTRUE \\ &&|& \hex{FD}~~100{:}\Bu32 &\Rightarrow& \I8X16.\BITMASK \\ &&|& \hex{FD}~~101{:}\Bu32 &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_s} \\ &&|& @@ -613,7 +613,6 @@ All other SIMD instructions are plain opcodes without any immediates. \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~128{:}\Bu32 &\Rightarrow& \I16X8.\VABS \\ &&|& \hex{FD}~~129{:}\Bu32 &\Rightarrow& \I16X8.\VNEG \\ &&|& - \hex{FD}~~130{:}\Bu32 &\Rightarrow& \I16X8.\ANYTRUE \\ &&|& \hex{FD}~~131{:}\Bu32 &\Rightarrow& \I16X8.\ALLTRUE \\ &&|& \hex{FD}~~132{:}\Bu32 &\Rightarrow& \I16X8.\BITMASK \\ &&|& \hex{FD}~~133{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s} \\ &&|& @@ -644,7 +643,6 @@ All other SIMD instructions are plain opcodes without any immediates. \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~160{:}\Bu32 &\Rightarrow& \I32X4.\VABS \\ &&|& \hex{FD}~~161{:}\Bu32 &\Rightarrow& \I32X4.\VNEG \\ &&|& - \hex{FD}~~162{:}\Bu32 &\Rightarrow& \I32X4.\ANYTRUE \\ &&|& \hex{FD}~~163{:}\Bu32 &\Rightarrow& \I32X4.\ALLTRUE \\ &&|& \hex{FD}~~164{:}\Bu32 &\Rightarrow& \I32X4.\BITMASK \\ &&|& \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s} \\ &&|& diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 2059785dd5..82d78f5cc0 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -284,6 +284,26 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} +.. _exec-simd-any_true: + +:math:`\V128\K{.}\ANYTRUE` +........................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i` be the result of computing :math:`\ine_{128}(c_1, 0)`. + +4. Push the value :math:`\I32.\CONST~i` onto the stack. + +.. math:: + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~\V128\K{.}\ANYTRUE &\stepto& (\I32\K{.}\CONST~i) + & (\iff i = \ine_{128}(c_1, 0)) \\ + \end{array} + + .. _exec-simd-swizzle: :math:`\K{i8x16.}\SWIZZLE` @@ -561,26 +581,6 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-simd-any_true: - -:math:`\shape\K{.}\ANYTRUE` -........................... - -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. - -2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. - -3. Let :math:`i` be the result of computing :math:`\ine_{128}(c_1, 0)`. - -4. Push the value :math:`\I32.\CONST~i` onto the stack. - -.. math:: - \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~\shape\K{.}\ANYTRUE &\stepto& (\I32\K{.}\CONST~i) - & (\iff i = \ine_{128}(c_1, 0)) \\ - \end{array} - - .. _exec-simd-bitmask: :math:`t\K{x}N\K{.}\BITMASK` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 8f250d0fba..c24b1e997d 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -211,6 +211,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{v128.}\vsunop \\&&|& \K{v128.}\vsbinop \\&&|& \K{v128.}\vsternop \\&&|& + \K{v128.}\ANYTRUE \\&&|& \K{i8x16.}\SHUFFLE~\laneidx^{16} \\&&|& \K{i8x16.}\SWIZZLE \\&&|& \shape\K{.}\SPLAT \\&&|& @@ -266,7 +267,6 @@ SIMD instructions provide basic operations over :ref:`values ` of \production{SIMD ternary operator} & \vsternop &::=& \K{bitselect} \\ \production{SIMD test operator} & \vitestop &::=& - \K{any\_true} ~|~ \K{all\_true} \\ \production{SIMD integer relational operator} & \virelop &::=& \K{eq} ~|~ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index c346d8a453..6084291e50 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -606,7 +606,8 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{v128.andnot} &\Rightarrow& \V128.\VANDNOT\\ &&|& \text{v128.or} &\Rightarrow& \V128.\VOR\\ &&|& \text{v128.xor} &\Rightarrow& \V128.\VXOR\\ &&|& - \text{v128.bitselect} &\Rightarrow& \V128.\BITSELECT + \text{v128.bitselect} &\Rightarrow& \V128.\BITSELECT\\ &&|& + \text{v128.any\_true} &\Rightarrow& \V128.\ANYTRUE \end{array} .. _text-vitestop: @@ -621,7 +622,6 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.abs} &\Rightarrow& \I8X16.\VABS\\ &&|& \text{i8x16.neg} &\Rightarrow& \I8X16.\VNEG\\ &&|& - \text{i8x16.any\_true} &\Rightarrow& \I8X16.\ANYTRUE\\ &&|& \text{i8x16.all\_true} &\Rightarrow& \I8X16.\ALLTRUE\\ &&|& \text{i8x16.bitmask} &\Rightarrow& \I8X16.\BITMASK\\ &&|& \text{i8x16.narrow\_i16x8\_s} &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_s}\\ &&|& @@ -647,7 +647,6 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i16x8.abs} &\Rightarrow& \I16X8.\VABS\\ &&|& \text{i16x8.neg} &\Rightarrow& \I16X8.\VNEG\\ &&|& - \text{i16x8.any\_true} &\Rightarrow& \I16X8.\ANYTRUE\\ &&|& \text{i16x8.all\_true} &\Rightarrow& \I16X8.\ALLTRUE\\ &&|& \text{i16x8.bitmask} &\Rightarrow& \I16X8.\BITMASK\\ &&|& \text{i16x8.narrow\_i32x4\_s} &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s}\\ &&|& @@ -678,7 +677,6 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i32x4.abs} &\Rightarrow& \I32X4.\VABS\\ &&|& \text{i32x4.neg} &\Rightarrow& \I32X4.\VNEG\\ &&|& - \text{i32x4.any\_true} &\Rightarrow& \I32X4.\ANYTRUE\\ &&|& \text{i32x4.all\_true} &\Rightarrow& \I32X4.\ALLTRUE\\ &&|& \text{i32x4.bitmask} &\Rightarrow& \I32X4.\BITMASK\\ &&|& \text{i32x4.widen\_low\_i16x8\_s} &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s}\\ &&|& diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index a4afaf0e6f..eea07ee2a8 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -240,6 +240,20 @@ We also define an auxiliary function to get number of packed numeric types in a } +.. _valid-any-true: + +:math:`\V128\K{.}\ANYTRUE` +............................ + +* The instruction is valid with type :math:`[\V128] \to [\I32]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \V128\K{.}\ANYTRUE : [\V128] \to [\I32] + } + + .. _valid-simd-shuffle: :math:`\K{i8x16.}\SHUFFLE~\laneidx^{16}` From ffe1db3e167967a5c7acdbfe830db77299ee7220 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 26 Jan 2021 14:09:56 -0800 Subject: [PATCH 282/378] Fix labels for SIMD instructions in gen-index-instructions.py Drive-by fix a wrong label in exec/instructions.rst. --- .../core/appendix/gen-index-instructions.py | 354 +++---- document/core/appendix/index-instructions.rst | 882 +++++++++--------- document/core/exec/instructions.rst | 2 +- 3 files changed, 619 insertions(+), 619 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index f3d38771e9..ebab2f730a 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -321,183 +321,183 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~5', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), Instruction(r'\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}', r'\hex{FC}~~6', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'), Instruction(r'\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~7', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), - Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~0', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~1', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~2', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~3', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~4', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~5', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~6', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~7', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~8', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~15', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~16', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~17', r'[\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~18', r'[\I64] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~19', r'[\F32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~20', r'[\F64] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~21', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~22', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~23', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~24', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~25', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128 \I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~27', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~28', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~29', r'[\V128] \to [\I64]', r'validation ', r'execution '), - Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~30', r'[\V128~\I64] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~31', r'[\V128] \to [\F32]', r'validation ', r'execution '), - Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~32', r'[\V128~\F32] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~33', r'[\V128] \to [\F64]', r'validation ', r'execution '), - Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~34', r'[\V128~\F64] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~35', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VNE', r'\hex{FD}~~36', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~37', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~38', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~39', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~40', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~41', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~42', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~43', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~44', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~45', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VNE', r'\hex{FD}~~46', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~47', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~48', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~49', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~50', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~51', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~52', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~53', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~54', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~55', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VNE', r'\hex{FD}~~56', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~57', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~58', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~59', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~60', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~61', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VGT', r'\hex{FD}~~68', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VLE', r'\hex{FD}~~69', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VGE', r'\hex{FD}~~70', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~71', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VNE', r'\hex{FD}~~72', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VLT', r'\hex{FD}~~73', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VGT', r'\hex{FD}~~74', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VLE', r'\hex{FD}~~75', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VGE', r'\hex{FD}~~76', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\VNOT', r'\hex{FD}~~77', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\VAND', r'\hex{FD}~~78', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~79', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~102', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~107', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~108', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~109', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VADD', r'\hex{FD}~~110', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~111', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~112', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~113', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~114', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~115', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~118', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~119', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VADD', r'\hex{FD}~~142', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~143', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~144', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~145', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~146', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~147', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~149', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~150', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~151', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'validation ', r'execution '), - Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VADD', r'\hex{FD}~~174', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~177', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~181', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VMIN\K{\_s}', r'\hex{FD}~~182', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'validation ', r'execution '), - Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VADD', r'\hex{FD}~~228', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~229', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~230', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~231', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~232', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~233', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\I32]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VADD', r'\hex{FD}~~240', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~241', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'validation ', r'execution ', r'operator '), + Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~0', r'[\I32] \to [\V128]', r'valid-load', r'exec-load'), + Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~1', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~2', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~3', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~4', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~5', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~6', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~7', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~8', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32] \to [\V128]', r'valid-store', r'exec-store'), + Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), + Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), + Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), + Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~15', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~16', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~17', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~18', r'[\I64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~19', r'[\F32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~20', r'[\F64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~21', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~22', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~23', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~24', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~25', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128 \I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~27', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~28', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~29', r'[\V128] \to [\I64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~30', r'[\V128~\I64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~31', r'[\V128] \to [\F32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~32', r'[\V128~\F32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~33', r'[\V128] \to [\F64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~34', r'[\V128~\F64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~35', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I8X16.\VNE', r'\hex{FD}~~36', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~37', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~38', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~39', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~40', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~41', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~42', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~43', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~44', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~45', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I16X8.\VNE', r'\hex{FD}~~46', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~47', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~48', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~49', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~50', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~51', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~52', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~53', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~54', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~55', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I32X4.\VNE', r'\hex{FD}~~56', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~57', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~58', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~59', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~60', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~61', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), + Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), + Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), + Instruction(r'\F32X4.\VGT', r'\hex{FD}~~68', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), + Instruction(r'\F32X4.\VLE', r'\hex{FD}~~69', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), + Instruction(r'\F32X4.\VGE', r'\hex{FD}~~70', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~71', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), + Instruction(r'\F64X2.\VNE', r'\hex{FD}~~72', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), + Instruction(r'\F64X2.\VLT', r'\hex{FD}~~73', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), + Instruction(r'\F64X2.\VGT', r'\hex{FD}~~74', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), + Instruction(r'\F64X2.\VLE', r'\hex{FD}~~75', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), + Instruction(r'\F64X2.\VGE', r'\hex{FD}~~76', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\V128.\VNOT', r'\hex{FD}~~77', r'[\V128] \to [\V128]', r'valid-vsunop', r'exec-vsunop', r'op-inot'), + Instruction(r'\V128.\VAND', r'\hex{FD}~~78', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iand'), + Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~79', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iandnot'), + Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), + Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), + Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~102', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~107', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~108', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~109', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I8X16.\VADD', r'\hex{FD}~~110', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~111', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), + Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~112', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), + Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~113', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~114', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), + Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~115', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~118', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~119', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I16X8.\VADD', r'\hex{FD}~~142', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~143', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), + Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~144', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), + Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~145', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~146', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), + Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~147', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~149', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~150', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~151', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I32X4.\VADD', r'\hex{FD}~~174', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~177', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~181', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I32X4.\VMIN\K{\_s}', r'\hex{FD}~~182', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), + Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), + Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F32X4.\VADD', r'\hex{FD}~~228', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), + Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~229', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), + Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~230', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), + Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~231', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), + Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~232', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), + Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~233', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), + Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), + Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F64X2.\VADD', r'\hex{FD}~~240', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), + Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~241', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), + Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), + Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), + Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), + Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_u'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-convert_s'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-convert_u'), ] def ColumnWidth(n): diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 640a72d4bc..790cbe8230 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,444 +6,444 @@ Index of Instructions --------------------- -=========================================== ===================== ============================================= =========================================================== ======================================================================================== -Instruction Binary Opcode Type Validation Execution -=========================================== ===================== ============================================= =========================================================== ======================================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1C}` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{25}` -(reserved) :math:`\hex{26}` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -(reserved) :math:`\hex{D0}` -(reserved) :math:`\hex{D1}` -(reserved) :math:`\hex{D2}` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation >` :ref:`execution >` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation >` :ref:`execution >` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation >` :ref:`execution >` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation >` :ref:`execution >` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation >` :ref:`execution >` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` 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-:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation >` :ref:`execution >`, :ref:`operator >` -=========================================== ===================== ============================================= =========================================================== ======================================================================================== +=========================================== ===================== ============================================= =========================================== ================================================================= +Instruction Binary Opcode Type Validation Execution +=========================================== ===================== ============================================= =========================================== ================================================================= +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` +:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{1C}` +(reserved) :math:`\hex{1D}` +(reserved) :math:`\hex{1E}` +(reserved) :math:`\hex{1F}` +:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{25}` +(reserved) :math:`\hex{26}` +(reserved) :math:`\hex{27}` +:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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+:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +(reserved) :math:`\hex{D0}` +(reserved) :math:`\hex{D1}` +(reserved) :math:`\hex{D2}` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +=========================================== ===================== ============================================= =========================================== ================================================================= diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 82d78f5cc0..5ce9d1c918 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -207,7 +207,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane respectively. -.. _exec-simd-const: +.. _exec-vconst: :math:`\V128\K{.}\VCONST~c` ........................... From 0cd0a20274f3bb3a41f6b0500644ee6b6d6d9152 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 29 Jan 2021 12:11:52 -0800 Subject: [PATCH 283/378] [interpreter] Implement load lane instructions (#428) v128.load8_lane v128.load16_lane v128.load32_lane v128.load64_lane Introduce a new ast type, SimdLoadLane, since it takes a lane index immediate, on top of the usual memarg, and also pops a v128 off, in addition to the index. The exact binary opcodes for these instructions are not yet fixed, I've used the ones currently implement in V8 and LLVM/Binaryen, we can change those later. Also added a new test generation script, and the generated test files. --- interpreter/binary/decode.ml | 16 ++ interpreter/binary/encode.ml | 9 + interpreter/exec/eval.ml | 15 +- interpreter/runtime/memory.ml | 34 +-- interpreter/runtime/memory.mli | 4 +- interpreter/syntax/ast.ml | 2 + interpreter/syntax/operators.ml | 9 + interpreter/text/arrange.ml | 13 ++ interpreter/text/lexer.mll | 8 + interpreter/text/parser.mly | 4 +- interpreter/valid/valid.ml | 8 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd.py | 4 +- test/core/simd/meta/simd_load_lane.py | 227 +++++++++++++++++++ test/core/simd/simd_load16_lane.wast | 211 ++++++++++++++++++ test/core/simd/simd_load32_lane.wast | 143 ++++++++++++ test/core/simd/simd_load64_lane.wast | 97 +++++++++ test/core/simd/simd_load8_lane.wast | 299 ++++++++++++++++++++++++++ 18 files changed, 1087 insertions(+), 17 deletions(-) create mode 100644 test/core/simd/meta/simd_load_lane.py create mode 100644 test/core/simd/simd_load16_lane.wast create mode 100644 test/core/simd/simd_load32_lane.wast create mode 100644 test/core/simd/simd_load64_lane.wast create mode 100644 test/core/simd/simd_load8_lane.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index ec5accad65..aad4348089 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -304,6 +304,22 @@ let simd_prefix s = | 0x50l -> v128_or | 0x51l -> v128_xor | 0x52l -> v128_bitselect + | 0x58l -> + let a, o = memop s in + let lane = u8 s in + v128_load8_lane a o lane + | 0x59l -> + let a, o = memop s in + let lane = u8 s in + v128_load16_lane a o lane + | 0x5al -> + let a, o = memop s in + let lane = u8 s in + v128_load32_lane a o lane + | 0x5bl -> + let a, o = memop s in + let lane = u8 s in + v128_load64_lane a o lane | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg | 0x62l -> v128_any_true diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index c69f2fa328..4e76e91e26 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -225,6 +225,15 @@ let encode m = | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackZero); _} as mo) -> simd_op 0xfdl; memop mo + | SimdLoadLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> + simd_op 0x58l; memop mo; u8 i; + | SimdLoadLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> + simd_op 0x59l; memop mo; u8 i; + | SimdLoadLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> + simd_op 0x5al; memop mo; u8 i; + | SimdLoadLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> + simd_op 0x5bl; memop mo; u8 i; + | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo | Store ({ty = F32Type; sz = None; _} as mo) -> op 0x38; memop mo diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 3fdc0b5a86..ff86dbc1a4 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -227,7 +227,20 @@ let rec step (c : config) : config = let v = match sz with | None -> Memory.load_value mem addr offset ty - | Some (pack_size, simd_load) -> Memory.load_simd_packed pack_size simd_load mem addr offset ty + | Some (pack_size, simd_load) -> + V128 (Memory.load_simd_packed pack_size simd_load mem addr offset ty) + in v :: vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) + + | SimdLoadLane ({offset; ty; sz; _}, j), V128 v128 :: I32 i :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let addr = I64_convert.extend_i32_u i in + (try + let v = + match sz with + | None -> assert false + | Some pack_size -> + V128 (Memory.load_simd_lane v128 pack_size mem addr offset ty j) in v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 5d4ccfb493..4a20c5a8b8 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -139,20 +139,30 @@ let load_simd_packed pack_size simd_load mem a o t = Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in match pack_size, simd_load with - | Pack64, Pack8x8 SX -> V128 (V128.I16x8_convert.widen_low_s v) - | Pack64, Pack8x8 ZX -> V128 (V128.I16x8_convert.widen_low_u v) - | Pack64, Pack16x4 SX -> V128 (V128.I32x4_convert.widen_low_s v) - | Pack64, Pack16x4 ZX -> V128 (V128.I32x4_convert.widen_low_u v) - | Pack64, Pack32x2 SX -> V128 (V128.I64x2_convert.widen_low_s v) - | Pack64, Pack32x2 ZX -> V128 (V128.I64x2_convert.widen_low_u v) - | Pack8, PackSplat -> V128 (V128.I8x16.splat (I8.of_int_s (Int64.to_int x))) - | Pack16, PackSplat -> V128 (V128.I16x8.splat (I16.of_int_s (Int64.to_int x))) - | Pack32, PackSplat -> V128 (V128.I32x4.splat (I32.of_int_s (Int64.to_int x))) - | Pack64, PackSplat -> V128 (V128.I64x2.splat x) - | Pack32, PackZero -> V128 v - | Pack64, PackZero -> V128 v + | Pack64, Pack8x8 SX -> V128.I16x8_convert.widen_low_s v + | Pack64, Pack8x8 ZX -> V128.I16x8_convert.widen_low_u v + | Pack64, Pack16x4 SX -> V128.I32x4_convert.widen_low_s v + | Pack64, Pack16x4 ZX -> V128.I32x4_convert.widen_low_u v + | Pack64, Pack32x2 SX -> V128.I64x2_convert.widen_low_s v + | Pack64, Pack32x2 ZX -> V128.I64x2_convert.widen_low_u v + | Pack8, PackSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) + | Pack16, PackSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) + | Pack32, PackSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) + | Pack64, PackSplat -> V128.I64x2.splat x + | Pack32, PackZero -> v + | Pack64, PackZero -> v | _ -> assert false +let load_simd_lane v pack_size mem a o t laneidx = + let n = packed_size pack_size in + assert (n < Types.size t); + let x = loadn mem a o n in + match pack_size with + | Pack8 -> V128.I8x16.replace_lane laneidx v (Int64.to_int32 x) + | Pack16 -> V128.I16x8.replace_lane laneidx v (Int64.to_int32 x) + | Pack32 -> V128.I32x4.replace_lane laneidx v (Int64.to_int32 x) + | Pack64 -> V128.I64x2.replace_lane laneidx v x + let store_packed sz mem a o v = assert (packed_size sz <= Types.size (Values.type_of v)); let n = packed_size sz in diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index 7936d02418..efef5df64d 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -36,8 +36,10 @@ val load_packed : pack_size -> extension -> memory -> address -> offset -> value_type -> value (* raises Type, Bounds *) val load_simd_packed : - pack_size -> pack_simd -> memory -> address -> offset -> value_type -> value + pack_size -> pack_simd -> memory -> address -> offset -> value_type -> V128.t (* raises Type, Bounds *) +val load_simd_lane : + V128.t -> pack_size -> memory -> address -> offset -> value_type -> int (* lane index *) -> V128.t val store_packed : pack_size -> memory -> address -> offset -> value -> unit (* raises Type, Bounds *) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 5943ede40c..fcd9c22a65 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -114,6 +114,7 @@ type storeop = pack_size memop type simd_loadop = (pack_size * pack_simd) memop type empty type simd_storeop = empty memop +type simd_laneop = pack_size memop * int (* Expressions *) @@ -146,6 +147,7 @@ and instr' = | Load of loadop (* read memory at address *) | Store of storeop (* write memory at address *) | SimdLoad of simd_loadop (* read memory at address *) + | SimdLoadLane of simd_laneop (* read single lane at address *) | SimdStore of simd_storeop (* write memory at address *) | MemorySize (* size of linear memory *) | MemoryGrow (* grow linear memory *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index d775b0d68d..44f7b9fd69 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -239,6 +239,15 @@ let v128_load32_splat align offset = let v128_load64_splat align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} +let v128_load8_lane align offset imm = + SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack8}, imm) +let v128_load16_lane align offset imm = + SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack16}, imm) +let v128_load32_lane align offset imm = + SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack32}, imm) +let v128_load64_lane align offset imm = + SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack64}, imm) + let v128_load32_zero align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackZero)} let v128_load64_zero align offset = diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 1e97a1dcdd..8302bcd933 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -450,6 +450,18 @@ let simd_loadop (op : simd_loadop) = ) in memop ("load" ^ suffix) op (packed_size sz) +let simd_laneop (op, i) = + match op.sz with + | None -> assert false + | Some sz -> + let suffix = + match sz with + | Pack8 -> "8_lane" + | Pack16 -> "16_lane" + | Pack32 -> "32_lane" + | Pack64 -> "64_lane" + in memop ("load" ^ suffix) op (packed_size sz) ^ " " ^ (nat i) + let storeop op = match op.sz with | None -> memop "store" op (size op.ty) @@ -501,6 +513,7 @@ let rec instr e = | GlobalSet x -> "global.set " ^ var x, [] | Load op -> loadop op, [] | SimdLoad op -> simd_loadop op, [] + | SimdLoadLane op -> simd_laneop op, [] | SimdStore op -> simd_storeop op, [] | Store op -> storeop op, [] | MemorySize -> "memory.size", [] diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 880b3390f3..2bf89c9bfb 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -306,6 +306,14 @@ rule token = parse { LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } | "v128.load64_zero" { LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } + | "v128.load8_lane" + { SIMD_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } + | "v128.load16_lane" + { SIMD_LOAD_LANE (fun a o i -> (v128_load16_lane (opt a 1)) o i) } + | "v128.load32_lane" + { SIMD_LOAD_LANE (fun a o i -> (v128_load32_lane (opt a 2)) o i) } + | "v128.load64_lane" + { SIMD_LOAD_LANE (fun a o i -> (v128_load64_lane (opt a 3)) o i) } | (ixx as t)".store"(mem_size as sz) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; STORE (fun a o -> diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 7685ef08df..d69ac52f79 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -204,7 +204,7 @@ let inline_type_explicit (c : context) x ft at = %token NOP DROP BLOCK END IF THEN ELSE SELECT LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET -%token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT +%token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT SIMD_LOAD_LANE %token SPLAT EXTRACT_LANE REPLACE_LANE SHIFT SHUFFLE %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW @@ -232,6 +232,7 @@ let inline_type_explicit (c : context) x ft at = %token COMPARE %token CONVERT %token Memory.offset -> Ast.instr'> LOAD +%token Memory.offset -> int -> Ast.instr'> SIMD_LOAD_LANE %token SPLAT %token Ast.instr'> EXTRACT_LANE %token Ast.instr'> REPLACE_LANE @@ -385,6 +386,7 @@ plain_instr : | GLOBAL_GET var { fun c -> global_get ($2 c global) } | GLOBAL_SET var { fun c -> global_set ($2 c global) } | LOAD offset_opt align_opt { fun c -> $1 $3 $2 } + | SIMD_LOAD_LANE offset_opt align_opt NAT { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } | STORE offset_opt align_opt { fun c -> $1 $3 $2 } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index f919674382..7f195aa57d 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -307,6 +307,14 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = check_memop c memop (Lib.Option.map fst) e.at; [I32Type] --> [memop.ty] + | SimdLoadLane (memop, i) -> + check_memop c memop (fun o -> o) e.at; + (match memop.sz with + | Some pack_size -> + require (i < 16 / packed_size pack_size) e.at "invalid lane index"; + [I32Type; V128Type] --> [memop.ty] + | _ -> assert false) + | Store memop -> check_memop c memop (fun sz -> sz) e.at; [I32Type; memop.ty] --> [] diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 7ea8436b31..e1c03ecd24 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -31,6 +31,7 @@ 'simd_f32x4_pmin_pmax', 'simd_f64x2_pmin_pmax', 'simd_i32x4_dot_i16x8', + 'simd_load_lane', ) diff --git a/test/core/simd/meta/simd.py b/test/core/simd/meta/simd.py index 99ba46d572..5ff38bbe80 100644 --- a/test/core/simd/meta/simd.py +++ b/test/core/simd/meta/simd.py @@ -22,7 +22,7 @@ def const(value, value_type): value: constant data, string or list, lane_type: lane type, [i32, i64, f32, f64] """ - return SIMD.CONST.format(value_type=value_type, value=''.join(value)) + return SIMD.CONST.format(value_type=value_type, value=''.join(str(value))) @staticmethod def v128_const(value, lane_type): @@ -81,4 +81,4 @@ def v128_const(value, lane_type): data_elem = ' '.join(data_elem) # Returns v128 constant text - return SIMD.V128_CONST.format(lane_type=lane_type, value=data_elem) \ No newline at end of file + return SIMD.V128_CONST.format(lane_type=lane_type, value=data_elem) diff --git a/test/core/simd/meta/simd_load_lane.py b/test/core/simd/meta/simd_load_lane.py new file mode 100644 index 0000000000..2900e98502 --- /dev/null +++ b/test/core/simd/meta/simd_load_lane.py @@ -0,0 +1,227 @@ +#!/usr/bin/env python3 + +from simd import SIMD +from test_assert import AssertReturn, AssertInvalid + +def list_stringify(l): + return list(map(lambda x: str(x), l)) + +"""Base class for generating SIMD load lane tests. Subclasses only to: + - define self.LANE_LEN, self.LANE_TYPE, self.NUM_LANES, self.MAX_ALIGN + - override get_normal_case to provide test data (consult comments for details) + +It generates test cases that: + - load to all valid lane indices + - load using memarg offset + - load with memarg alignment + - load with invalid lane index + - load with invalid memarg alignment + - fails typecheck +""" +class SimdLoadLane: + def valid_alignments(self): + return [a for a in range(1, self.MAX_ALIGN+1) if a & (a-1) == 0] + + def get_case_data(self): + # return value should be a list of tuples: + # (address to load from : i32, initial value : v128, return value : v128) + # e.g. [(0, [0], [0x0100, 0, 0, 0, 0, 0, 0, 0]), ... ] + raise Exception("Subclasses should override this to provide test data") + + def get_normal_case(self): + s = SIMD() + cases = [] + + # load using arg + for (addr, val, ret) in self.get_case_data(): + i32_addr = s.const(addr, "i32") + v128_val = s.v128_const(list_stringify(val), self.LANE_TYPE) + v128_result = s.v128_const(list_stringify(ret), self.LANE_TYPE) + instr = "v128.load{lane_len}_lane_{idx}".format(lane_len=self.LANE_LEN, idx=addr) + cases.append(str(AssertReturn(instr, [i32_addr, v128_val], v128_result))) + + # load using offset + for (addr, val, ret) in self.get_case_data(): + v128_val = s.v128_const(list_stringify(val), self.LANE_TYPE) + v128_result = s.v128_const(list_stringify(ret), self.LANE_TYPE) + instr = "v128.load{lane_len}_lane_{idx}_offset_{idx}".format(lane_len=self.LANE_LEN, idx=addr) + cases.append(str(AssertReturn(instr, [v128_val], v128_result))) + + # load using offset with alignment + for (addr, val, ret) in self.get_case_data(): + for align in self.valid_alignments(): + i32_addr = s.const(addr, "i32") + v128_val = s.v128_const(list_stringify(val), self.LANE_TYPE) + v128_result = s.v128_const(list_stringify(ret), self.LANE_TYPE) + instr = "v128.load{lane_len}_lane_{idx}_align_{align}".format(lane_len=self.LANE_LEN, idx=addr, align=align) + cases.append(str(AssertReturn(instr, [i32_addr, v128_val], v128_result))) + + return '\n'.join(cases) + + def gen_test_func_template(self): + template = [ + ';; Tests for load lane operations.\n\n', + '(module', + ' (memory 1)', + ' (data (i32.const 0) "\\00\\01\\02\\03\\04\\05\\06\\07\\08\\09\\0A\\0B\\0C\\0D\\0E\\0F")', + ] + + lane_indices = list(range(self.NUM_LANES)) + + # load using i32.const arg + for idx in lane_indices: + template.append( + ' (func (export "v128.load{lane_len}_lane_{idx}")\n' + ' (param $address i32) (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane {idx} (local.get $address) (local.get $x)))' + .format(idx=idx, lane_len=self.LANE_LEN)) + + # load using memarg offset + for idx in lane_indices: + template.append( + ' (func (export "v128.load{lane_len}_lane_{idx}_offset_{idx}")\n' + ' (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane offset={idx} {idx} (i32.const 0) (local.get $x)))' + .format(idx=idx, lane_len=self.LANE_LEN)) + + # with memarg aligment + for idx in lane_indices: + for align in self.valid_alignments(): + template.append( + ' (func (export "v128.load{lane_len}_lane_{idx}_align_{align}")\n' + ' (param $address i32) (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane align={align} {idx} (local.get $address) (local.get $x)))' + .format(idx=idx, lane_len=self.LANE_LEN, align=align)) + + template.append(')\n') + return template + + def gen_test_template(self): + template = self.gen_test_func_template() + + template.append('{normal_cases}') + template.append('\n{invalid_cases}') + + return '\n'.join(template) + + def get_invalid_cases(self): + invalid_cases = [';; type check'] + invalid_cases.append( + '(assert_invalid' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane 0 (local.get $x) (i32.const 0))))\n' + ' "type mismatch")'.format(lane_len=self.LANE_LEN)) + invalid_cases.append('') + + invalid_cases.append(';; invalid lane index') + invalid_cases.append( + '(assert_invalid' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane {idx} (i32.const 0) (local.get $x))))\n' + ' "invalid lane index")'.format(idx=self.NUM_LANES, lane_len=self.LANE_LEN)) + + invalid_cases.append('') + + invalid_cases.append(';; invalid memarg alignment') + invalid_cases.append( + '(assert_invalid\n' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.load{lane_len}_lane align={align} 0 (i32.const 0) (local.get $x))))\n' + ' "alignment must not be larger than natural")' + .format(lane_len=self.LANE_LEN, align=self.MAX_ALIGN*2)) + return '\n'.join(invalid_cases) + + def get_all_cases(self): + case_data = {'lane_len': self.LANE_LEN, + 'normal_cases': self.get_normal_case(), + 'invalid_cases': self.get_invalid_cases(), + } + return self.gen_test_template().format(**case_data) + + def gen_test_cases(self): + wast_filename = '../simd_load{lane_type}_lane.wast'.format(lane_type=self.LANE_LEN) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + +class SimdLoad8Lane(SimdLoadLane): + LANE_LEN = '8' + LANE_TYPE = 'i8x16' + NUM_LANES = 16 + MAX_ALIGN = 1 + + def get_case_data(self): + return [ + (0, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (1, [0], [0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (2, [0], [0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (3, [0], [0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (4, [0], [0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (5, [0], [0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (6, [0], [0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (7, [0], [0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0]), + (8, [0], [0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0]), + (9, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0]), + (10, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0]), + (11, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0]), + (12, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0]), + (13, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13, 0, 0]), + (14, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 0]), + (15, [0], [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15])] + +class SimdLoad16Lane(SimdLoadLane): + LANE_LEN = '16' + LANE_TYPE = 'i16x8' + NUM_LANES = 8 + MAX_ALIGN = 2 + + def get_case_data(self): + return [ + (0, [0], [0x0100, 0, 0, 0, 0, 0, 0, 0]), + (1, [0], [0, 0x0201, 0, 0, 0, 0, 0, 0]), + (2, [0], [0, 0, 0x0302, 0, 0, 0, 0, 0]), + (3, [0], [0, 0, 0, 0x0403, 0, 0, 0, 0]), + (4, [0], [0, 0, 0, 0, 0x0504, 0, 0, 0]), + (5, [0], [0, 0, 0, 0, 0, 0x0605, 0, 0]), + (6, [0], [0, 0, 0, 0, 0, 0, 0x0706, 0]), + (7, [0], [0, 0, 0, 0, 0, 0, 0, 0x0807])] + +class SimdLoad32Lane(SimdLoadLane): + LANE_LEN = '32' + LANE_TYPE = 'i32x4' + NUM_LANES = 4 + MAX_ALIGN = 4 + + def get_case_data(self): + return [ + (0, [0], [0x03020100, 0, 0, 0,]), + (1, [0], [0, 0x04030201, 0, 0,]), + (2, [0], [0, 0, 0x05040302, 0,]), + (3, [0], [0, 0, 0, 0x06050403,])] + +class SimdLoad64Lane(SimdLoadLane): + LANE_LEN = '64' + LANE_TYPE = 'i64x2' + NUM_LANES = 2 + MAX_ALIGN = 8 + + def get_case_data(self): + return [ + (0, [0], [0x0706050403020100, 0]), + (1, [0], [0, 0x0807060504030201])] + +def gen_test_cases(): + simd_load8_lane = SimdLoad8Lane() + simd_load8_lane.gen_test_cases() + simd_load16_lane = SimdLoad16Lane() + simd_load16_lane.gen_test_cases() + simd_load32_lane = SimdLoad32Lane() + simd_load32_lane.gen_test_cases() + simd_load64_lane = SimdLoad64Lane() + simd_load64_lane.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/simd_load16_lane.wast b/test/core/simd/simd_load16_lane.wast new file mode 100644 index 0000000000..8c72a57335 --- /dev/null +++ b/test/core/simd/simd_load16_lane.wast @@ -0,0 +1,211 @@ +;; Tests for load lane operations. + + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") + (func (export "v128.load16_lane_0") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 0 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 1 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 2 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_3") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 3 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_4") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 4 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_5") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 5 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_6") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 6 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_7") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane 7 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_0_offset_0") + (param $x v128) (result v128) + (v128.load16_lane offset=0 0 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_1_offset_1") + (param $x v128) (result v128) + (v128.load16_lane offset=1 1 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_2_offset_2") + (param $x v128) (result v128) + (v128.load16_lane offset=2 2 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_3_offset_3") + (param $x v128) (result v128) + (v128.load16_lane offset=3 3 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_4_offset_4") + (param $x v128) (result v128) + (v128.load16_lane offset=4 4 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_5_offset_5") + (param $x v128) (result v128) + (v128.load16_lane offset=5 5 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_6_offset_6") + (param $x v128) (result v128) + (v128.load16_lane offset=6 6 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_7_offset_7") + (param $x v128) (result v128) + (v128.load16_lane offset=7 7 (i32.const 0) (local.get $x))) + (func (export "v128.load16_lane_0_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 0 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_0_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 0 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_1_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 1 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_1_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 1 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_2_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 2 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_2_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 2 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_3_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 3 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_3_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 3 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_4_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 4 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_4_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 4 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_5_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 5 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_5_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 5 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_6_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 6 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_6_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 6 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_7_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=1 7 (local.get $address) (local.get $x))) + (func (export "v128.load16_lane_7_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load16_lane align=2 7 (local.get $address) (local.get $x))) +) + +(assert_return (invoke "v128.load16_lane_0" (i32.const 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 256 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_1" (i32.const 1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 513 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_2" (i32.const 2) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 770 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_3" (i32.const 3) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_4" (i32.const 4) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) +(assert_return (invoke "v128.load16_lane_5" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) +(assert_return (invoke "v128.load16_lane_6" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) +(assert_return (invoke "v128.load16_lane_7" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) +(assert_return (invoke "v128.load16_lane_0_offset_0" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 256 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_1_offset_1" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 513 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_2_offset_2" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 770 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_3_offset_3" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_4_offset_4" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) +(assert_return (invoke "v128.load16_lane_5_offset_5" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) +(assert_return (invoke "v128.load16_lane_6_offset_6" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) +(assert_return (invoke "v128.load16_lane_7_offset_7" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) +(assert_return (invoke "v128.load16_lane_0_align_1" (i32.const 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 256 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_0_align_2" (i32.const 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 256 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_1_align_1" (i32.const 1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 513 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_1_align_2" (i32.const 1) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 513 0 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_2_align_1" (i32.const 2) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 770 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_2_align_2" (i32.const 2) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 770 0 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_3_align_1" (i32.const 3) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_3_align_2" (i32.const 3) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) +(assert_return (invoke "v128.load16_lane_4_align_1" (i32.const 4) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) +(assert_return (invoke "v128.load16_lane_4_align_2" (i32.const 4) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) +(assert_return (invoke "v128.load16_lane_5_align_1" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) +(assert_return (invoke "v128.load16_lane_5_align_2" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) +(assert_return (invoke "v128.load16_lane_6_align_1" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) +(assert_return (invoke "v128.load16_lane_6_align_2" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) +(assert_return (invoke "v128.load16_lane_7_align_1" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) +(assert_return (invoke "v128.load16_lane_7_align_2" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load16_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load16_lane 8 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.load16_lane align=4 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_load32_lane.wast b/test/core/simd/simd_load32_lane.wast new file mode 100644 index 0000000000..e67690ff98 --- /dev/null +++ b/test/core/simd/simd_load32_lane.wast @@ -0,0 +1,143 @@ +;; Tests for load lane operations. + + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") + (func (export "v128.load32_lane_0") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane 0 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_1") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane 1 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_2") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane 2 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_3") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane 3 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_0_offset_0") + (param $x v128) (result v128) + (v128.load32_lane offset=0 0 (i32.const 0) (local.get $x))) + (func (export "v128.load32_lane_1_offset_1") + (param $x v128) (result v128) + (v128.load32_lane offset=1 1 (i32.const 0) (local.get $x))) + (func (export "v128.load32_lane_2_offset_2") + (param $x v128) (result v128) + (v128.load32_lane offset=2 2 (i32.const 0) (local.get $x))) + (func (export "v128.load32_lane_3_offset_3") + (param $x v128) (result v128) + (v128.load32_lane offset=3 3 (i32.const 0) (local.get $x))) + (func (export "v128.load32_lane_0_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=1 0 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_0_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=2 0 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_0_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=4 0 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_1_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=1 1 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_1_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=2 1 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_1_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=4 1 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_2_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=1 2 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_2_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=2 2 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_2_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=4 2 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_3_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=1 3 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_3_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=2 3 (local.get $address) (local.get $x))) + (func (export "v128.load32_lane_3_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load32_lane align=4 3 (local.get $address) (local.get $x))) +) + +(assert_return (invoke "v128.load32_lane_0" (i32.const 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 50462976 0 0 0)) +(assert_return (invoke "v128.load32_lane_1" (i32.const 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 67305985 0 0)) +(assert_return (invoke "v128.load32_lane_2" (i32.const 2) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 84148994 0)) +(assert_return (invoke "v128.load32_lane_3" (i32.const 3) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 100992003)) +(assert_return (invoke "v128.load32_lane_0_offset_0" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 50462976 0 0 0)) +(assert_return (invoke "v128.load32_lane_1_offset_1" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 67305985 0 0)) +(assert_return (invoke "v128.load32_lane_2_offset_2" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 84148994 0)) +(assert_return (invoke "v128.load32_lane_3_offset_3" (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 100992003)) +(assert_return (invoke "v128.load32_lane_0_align_1" (i32.const 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 50462976 0 0 0)) +(assert_return (invoke "v128.load32_lane_0_align_2" (i32.const 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 50462976 0 0 0)) +(assert_return (invoke "v128.load32_lane_0_align_4" (i32.const 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 50462976 0 0 0)) +(assert_return (invoke "v128.load32_lane_1_align_1" (i32.const 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 67305985 0 0)) +(assert_return (invoke "v128.load32_lane_1_align_2" (i32.const 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 67305985 0 0)) +(assert_return (invoke "v128.load32_lane_1_align_4" (i32.const 1) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 67305985 0 0)) +(assert_return (invoke "v128.load32_lane_2_align_1" (i32.const 2) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 84148994 0)) +(assert_return (invoke "v128.load32_lane_2_align_2" (i32.const 2) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 84148994 0)) +(assert_return (invoke "v128.load32_lane_2_align_4" (i32.const 2) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 84148994 0)) +(assert_return (invoke "v128.load32_lane_3_align_1" (i32.const 3) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 100992003)) +(assert_return (invoke "v128.load32_lane_3_align_2" (i32.const 3) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 100992003)) +(assert_return (invoke "v128.load32_lane_3_align_4" (i32.const 3) + (v128.const i32x4 0 0 0 0)) + (v128.const i32x4 0 0 0 100992003)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load32_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load32_lane 4 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.load32_lane align=8 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_load64_lane.wast b/test/core/simd/simd_load64_lane.wast new file mode 100644 index 0000000000..5883a6eaeb --- /dev/null +++ b/test/core/simd/simd_load64_lane.wast @@ -0,0 +1,97 @@ +;; Tests for load lane operations. + + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") + (func (export "v128.load64_lane_0") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane 0 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_1") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane 1 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_0_offset_0") + (param $x v128) (result v128) + (v128.load64_lane offset=0 0 (i32.const 0) (local.get $x))) + (func (export "v128.load64_lane_1_offset_1") + (param $x v128) (result v128) + (v128.load64_lane offset=1 1 (i32.const 0) (local.get $x))) + (func (export "v128.load64_lane_0_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=1 0 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_0_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=2 0 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_0_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=4 0 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_0_align_8") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=8 0 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_1_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=1 1 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_1_align_2") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=2 1 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_1_align_4") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=4 1 (local.get $address) (local.get $x))) + (func (export "v128.load64_lane_1_align_8") + (param $address i32) (param $x v128) (result v128) + (v128.load64_lane align=8 1 (local.get $address) (local.get $x))) +) + +(assert_return (invoke "v128.load64_lane_0" (i32.const 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_1" (i32.const 1) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) +(assert_return (invoke "v128.load64_lane_0_offset_0" (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_1_offset_1" (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) +(assert_return (invoke "v128.load64_lane_0_align_1" (i32.const 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_0_align_2" (i32.const 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_0_align_4" (i32.const 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_0_align_8" (i32.const 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 506097522914230528 0)) +(assert_return (invoke "v128.load64_lane_1_align_1" (i32.const 1) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) +(assert_return (invoke "v128.load64_lane_1_align_2" (i32.const 1) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) +(assert_return (invoke "v128.load64_lane_1_align_4" (i32.const 1) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) +(assert_return (invoke "v128.load64_lane_1_align_8" (i32.const 1) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 578437695752307201)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load64_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load64_lane 2 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.load64_lane align=16 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_load8_lane.wast b/test/core/simd/simd_load8_lane.wast new file mode 100644 index 0000000000..d0706f5351 --- /dev/null +++ b/test/core/simd/simd_load8_lane.wast @@ -0,0 +1,299 @@ +;; Tests for load lane operations. + + +(module + (memory 1) + (data (i32.const 0) "\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F") + (func (export "v128.load8_lane_0") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 0 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 1 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_2") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 2 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_3") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 3 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_4") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 4 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_5") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 5 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_6") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 6 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_7") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 7 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_8") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 8 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_9") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 9 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_10") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 10 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_11") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 11 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_12") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 12 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_13") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 13 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_14") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 14 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_15") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane 15 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_0_offset_0") + (param $x v128) (result v128) + (v128.load8_lane offset=0 0 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_1_offset_1") + (param $x v128) (result v128) + (v128.load8_lane offset=1 1 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_2_offset_2") + (param $x v128) (result v128) + (v128.load8_lane offset=2 2 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_3_offset_3") + (param $x v128) (result v128) + (v128.load8_lane offset=3 3 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_4_offset_4") + (param $x v128) (result v128) + (v128.load8_lane offset=4 4 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_5_offset_5") + (param $x v128) (result v128) + (v128.load8_lane offset=5 5 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_6_offset_6") + (param $x v128) (result v128) + (v128.load8_lane offset=6 6 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_7_offset_7") + (param $x v128) (result v128) + (v128.load8_lane offset=7 7 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_8_offset_8") + (param $x v128) (result v128) + (v128.load8_lane offset=8 8 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_9_offset_9") + (param $x v128) (result v128) + (v128.load8_lane offset=9 9 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_10_offset_10") + (param $x v128) (result v128) + (v128.load8_lane offset=10 10 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_11_offset_11") + (param $x v128) (result v128) + (v128.load8_lane offset=11 11 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_12_offset_12") + (param $x v128) (result v128) + (v128.load8_lane offset=12 12 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_13_offset_13") + (param $x v128) (result v128) + (v128.load8_lane offset=13 13 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_14_offset_14") + (param $x v128) (result v128) + (v128.load8_lane offset=14 14 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_15_offset_15") + (param $x v128) (result v128) + (v128.load8_lane offset=15 15 (i32.const 0) (local.get $x))) + (func (export "v128.load8_lane_0_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 0 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_1_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 1 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_2_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 2 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_3_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 3 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_4_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 4 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_5_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 5 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_6_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 6 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_7_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 7 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_8_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 8 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_9_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 9 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_10_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 10 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_11_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 11 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_12_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 12 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_13_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 13 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_14_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 14 (local.get $address) (local.get $x))) + (func (export "v128.load8_lane_15_align_1") + (param $address i32) (param $x v128) (result v128) + (v128.load8_lane align=1 15 (local.get $address) (local.get $x))) +) + +(assert_return (invoke "v128.load8_lane_0" (i32.const 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_1" (i32.const 1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_2" (i32.const 2) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_3" (i32.const 3) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_4" (i32.const 4) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_5" (i32.const 5) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_6" (i32.const 6) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_7" (i32.const 7) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_8" (i32.const 8) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_9" (i32.const 9) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_10" (i32.const 10) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_11" (i32.const 11) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_12" (i32.const 12) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) +(assert_return (invoke "v128.load8_lane_13" (i32.const 13) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) +(assert_return (invoke "v128.load8_lane_14" (i32.const 14) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) +(assert_return (invoke "v128.load8_lane_15" (i32.const 15) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) +(assert_return (invoke "v128.load8_lane_0_offset_0" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_1_offset_1" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_2_offset_2" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_3_offset_3" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_4_offset_4" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_5_offset_5" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_6_offset_6" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_7_offset_7" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_8_offset_8" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_9_offset_9" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_10_offset_10" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_11_offset_11" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_12_offset_12" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) +(assert_return (invoke "v128.load8_lane_13_offset_13" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) +(assert_return (invoke "v128.load8_lane_14_offset_14" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) +(assert_return (invoke "v128.load8_lane_15_offset_15" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) +(assert_return (invoke "v128.load8_lane_0_align_1" (i32.const 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_1_align_1" (i32.const 1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_2_align_1" (i32.const 2) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_3_align_1" (i32.const 3) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_4_align_1" (i32.const 4) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_5_align_1" (i32.const 5) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_6_align_1" (i32.const 6) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_7_align_1" (i32.const 7) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_8_align_1" (i32.const 8) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_9_align_1" (i32.const 9) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_10_align_1" (i32.const 10) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_11_align_1" (i32.const 11) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) +(assert_return (invoke "v128.load8_lane_12_align_1" (i32.const 12) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) +(assert_return (invoke "v128.load8_lane_13_align_1" (i32.const 13) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) +(assert_return (invoke "v128.load8_lane_14_align_1" (i32.const 14) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) +(assert_return (invoke "v128.load8_lane_15_align_1" (i32.const 15) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load8_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.load8_lane 16 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.load8_lane align=2 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file From c8c0de27b264aa00ccac716c166bba77901f16b7 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 29 Jan 2021 19:00:18 -0800 Subject: [PATCH 284/378] i64x2.eq instruction (#381) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/SIMD.md | 1 + 3 files changed, 3 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 57971f1657..689f870f98 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -249,3 +249,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | | `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | | `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `i64x2.eq` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index a2b18c992f..c8a6a1f384 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -148,6 +148,7 @@ | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.eq` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.bitmask` | | :heavy_check_mark: | | | | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 24db53eb12..a8e67edd27 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -717,6 +717,7 @@ in each lane are `0` for `false` and all ones for `true`. * `i8x16.eq(a: v128, b: v128) -> v128` * `i16x8.eq(a: v128, b: v128) -> v128` * `i32x4.eq(a: v128, b: v128) -> v128` +* `i64x2.eq(a: v128, b: v128) -> v128` * `f32x4.eq(a: v128, b: v128) -> v128` * `f64x2.eq(a: v128, b: v128) -> v128` From 394330d859598552fca2df1ddd58a32456b970d7 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 29 Jan 2021 19:09:03 -0800 Subject: [PATCH 285/378] i64x2.ne instruction (#411) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/SIMD.md | 1 + 3 files changed, 3 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 689f870f98..7158284762 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -250,3 +250,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | | `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | | `i64x2.eq` | `TBD`| - | +| `i64x2.ne` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index c8a6a1f384..270cf3cd9f 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -218,6 +218,7 @@ | `v128.store16_lane` | | | | | | | `v128.store32_lane` | | | | | | | `v128.store64_lane` | | | | | | +| `i64x2.ne` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index a8e67edd27..742e8fa4a9 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -736,6 +736,7 @@ def S.eq(a, b): * `i8x16.ne(a: v128, b: v128) -> v128` * `i16x8.ne(a: v128, b: v128) -> v128` * `i32x4.ne(a: v128, b: v128) -> v128` +* `i64x2.ne(a: v128, b: v128) -> v128` * `f32x4.ne(a: v128, b: v128) -> v128` * `f64x2.ne(a: v128, b: v128) -> v128` From 3d8c87029a1a6e00aac85452e81a6281707ed4c7 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 29 Jan 2021 19:10:07 -0800 Subject: [PATCH 286/378] i64x2.all_true instructions (#415) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/NewOpcodes.md | 2 +- proposals/simd/SIMD.md | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 7158284762..871063b305 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -251,3 +251,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | | `i64x2.eq` | `TBD`| - | | `i64x2.ne` | `TBD`| - | +| `i64x2.all_true` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 270cf3cd9f..37a68e6908 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -150,6 +150,7 @@ | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.eq` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.all_true` | | | | | | | `i64x2.bitmask` | | :heavy_check_mark: | | | | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 8241be0f89..81f21e69ff 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -83,7 +83,7 @@ | i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ------------- | 0xc0 | | i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | | ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 | -| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | ------------- | 0xc3 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | (i64x2.all_true) [TBD] | 0xc3 | | i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | | i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 | | i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 742e8fa4a9..ed43dadd00 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -677,6 +677,7 @@ These functions return 1 if any bit in `a` is non-zero, 0 otherwise. * `i8x16.all_true(a: v128) -> i32` * `i16x8.all_true(a: v128) -> i32` * `i32x4.all_true(a: v128) -> i32` +* `i64x2.all_true(a: v128) -> i32` These functions return 1 if all lanes in `a` are non-zero, 0 otherwise. From dae9f6c2e0986a188dbdbd8142dfe99a6e29e8b4 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Mon, 1 Feb 2021 12:28:52 -0800 Subject: [PATCH 287/378] Double-precision conversion instructions (#383) --- proposals/simd/BinarySIMD.md | 450 +++++++++++++------------ proposals/simd/ImplementationStatus.md | 450 +++++++++++++------------ proposals/simd/SIMD.md | 49 ++- 3 files changed, 497 insertions(+), 452 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 871063b305..afc842eeae 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -30,225 +30,231 @@ In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byt For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). -| Instruction | `simdop` | Immediate operands | -| ----------------------------|---------:|--------------------------| -| `v128.load` | `0x00`| m:memarg | -| `v128.load8x8_s` | `0x01`| m:memarg | -| `v128.load8x8_u` | `0x02`| m:memarg | -| `v128.load16x4_s` | `0x03`| m:memarg | -| `v128.load16x4_u` | `0x04`| m:memarg | -| `v128.load32x2_s` | `0x05`| m:memarg | -| `v128.load32x2_u` | `0x06`| m:memarg | -| `v128.load8_splat` | `0x07`| m:memarg | -| `v128.load16_splat` | `0x08`| m:memarg | -| `v128.load32_splat` | `0x09`| m:memarg | -| `v128.load64_splat` | `0x0a`| m:memarg | -| `v128.store` | `0x0b`| m:memarg | -| `v128.const` | `0x0c`| i:ImmByte[16] | -| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | -| `i8x16.swizzle` | `0x0e`| - | -| `i8x16.splat` | `0x0f`| - | -| `i16x8.splat` | `0x10`| - | -| `i32x4.splat` | `0x11`| - | -| `i64x2.splat` | `0x12`| - | -| `f32x4.splat` | `0x13`| - | -| `f64x2.splat` | `0x14`| - | -| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | -| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | -| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | -| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | -| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | -| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | -| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | -| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | -| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | -| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | -| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | -| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | -| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | -| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | -| `i8x16.eq` | `0x23`| - | -| `i8x16.ne` | `0x24`| - | -| `i8x16.lt_s` | `0x25`| - | -| `i8x16.lt_u` | `0x26`| - | -| `i8x16.gt_s` | `0x27`| - | -| `i8x16.gt_u` | `0x28`| - | -| `i8x16.le_s` | `0x29`| - | -| `i8x16.le_u` | `0x2a`| - | -| `i8x16.ge_s` | `0x2b`| - | -| `i8x16.ge_u` | `0x2c`| - | -| `i16x8.eq` | `0x2d`| - | -| `i16x8.ne` | `0x2e`| - | -| `i16x8.lt_s` | `0x2f`| - | -| `i16x8.lt_u` | `0x30`| - | -| `i16x8.gt_s` | `0x31`| - | -| `i16x8.gt_u` | `0x32`| - | -| `i16x8.le_s` | `0x33`| - | -| `i16x8.le_u` | `0x34`| - | -| `i16x8.ge_s` | `0x35`| - | -| `i16x8.ge_u` | `0x36`| - | -| `i32x4.eq` | `0x37`| - | -| `i32x4.ne` | `0x38`| - | -| `i32x4.lt_s` | `0x39`| - | -| `i32x4.lt_u` | `0x3a`| - | -| `i32x4.gt_s` | `0x3b`| - | -| `i32x4.gt_u` | `0x3c`| - | -| `i32x4.le_s` | `0x3d`| - | -| `i32x4.le_u` | `0x3e`| - | -| `i32x4.ge_s` | `0x3f`| - | -| `i32x4.ge_u` | `0x40`| - | -| `f32x4.eq` | `0x41`| - | -| `f32x4.ne` | `0x42`| - | -| `f32x4.lt` | `0x43`| - | -| `f32x4.gt` | `0x44`| - | -| `f32x4.le` | `0x45`| - | -| `f32x4.ge` | `0x46`| - | -| `f64x2.eq` | `0x47`| - | -| `f64x2.ne` | `0x48`| - | -| `f64x2.lt` | `0x49`| - | -| `f64x2.gt` | `0x4a`| - | -| `f64x2.le` | `0x4b`| - | -| `f64x2.ge` | `0x4c`| - | -| `v128.not` | `0x4d`| - | -| `v128.and` | `0x4e`| - | -| `v128.andnot` | `0x4f`| - | -| `v128.or` | `0x50`| - | -| `v128.xor` | `0x51`| - | -| `v128.bitselect` | `0x52`| - | -| `i8x16.abs` | `0x60`| - | -| `i8x16.neg` | `0x61`| - | -| `i8x16.all_true` | `0x63`| - | -| `i8x16.bitmask` | `0x64`| - | -| `i8x16.narrow_i16x8_s` | `0x65`| - | -| `i8x16.narrow_i16x8_u` | `0x66`| - | -| `i8x16.shl` | `0x6b`| - | -| `i8x16.shr_s` | `0x6c`| - | -| `i8x16.shr_u` | `0x6d`| - | -| `i8x16.add` | `0x6e`| - | -| `i8x16.add_sat_s` | `0x6f`| - | -| `i8x16.add_sat_u` | `0x70`| - | -| `i8x16.sub` | `0x71`| - | -| `i8x16.sub_sat_s` | `0x72`| - | -| `i8x16.sub_sat_u` | `0x73`| - | -| `i8x16.min_s` | `0x76`| - | -| `i8x16.min_u` | `0x77`| - | -| `i8x16.max_s` | `0x78`| - | -| `i8x16.max_u` | `0x79`| - | -| `i8x16.avgr_u` | `0x7b`| - | -| `i16x8.abs` | `0x80`| - | -| `i16x8.neg` | `0x81`| - | -| `i16x8.all_true` | `0x83`| - | -| `i16x8.bitmask` | `0x84`| - | -| `i16x8.narrow_i32x4_s` | `0x85`| - | -| `i16x8.narrow_i32x4_u` | `0x86`| - | -| `i16x8.widen_low_i8x16_s` | `0x87`| - | -| `i16x8.widen_high_i8x16_s` | `0x88`| - | -| `i16x8.widen_low_i8x16_u` | `0x89`| - | -| `i16x8.widen_high_i8x16_u` | `0x8a`| - | -| `i16x8.shl` | `0x8b`| - | -| `i16x8.shr_s` | `0x8c`| - | -| `i16x8.shr_u` | `0x8d`| - | -| `i16x8.add` | `0x8e`| - | -| `i16x8.add_sat_s` | `0x8f`| - | -| `i16x8.add_sat_u` | `0x90`| - | -| `i16x8.sub` | `0x91`| - | -| `i16x8.sub_sat_s` | `0x92`| - | -| `i16x8.sub_sat_u` | `0x93`| - | -| `i16x8.mul` | `0x95`| - | -| `i16x8.min_s` | `0x96`| - | -| `i16x8.min_u` | `0x97`| - | -| `i16x8.max_s` | `0x98`| - | -| `i16x8.max_u` | `0x99`| - | -| `i16x8.avgr_u` | `0x9b`| - | -| `i32x4.abs` | `0xa0`| - | -| `i32x4.neg` | `0xa1`| - | -| `i32x4.all_true` | `0xa3`| - | -| `i32x4.bitmask` | `0xa4`| - | -| `i32x4.widen_low_i16x8_s` | `0xa7`| - | -| `i32x4.widen_high_i16x8_s` | `0xa8`| - | -| `i32x4.widen_low_i16x8_u` | `0xa9`| - | -| `i32x4.widen_high_i16x8_u` | `0xaa`| - | -| `i32x4.shl` | `0xab`| - | -| `i32x4.shr_s` | `0xac`| - | -| `i32x4.shr_u` | `0xad`| - | -| `i32x4.add` | `0xae`| - | -| `i32x4.sub` | `0xb1`| - | -| `i32x4.mul` | `0xb5`| - | -| `i32x4.min_s` | `0xb6`| - | -| `i32x4.min_u` | `0xb7`| - | -| `i32x4.max_s` | `0xb8`| - | -| `i32x4.max_u` | `0xb9`| - | -| `i32x4.dot_i16x8_s` | `0xba`| - | -| `i64x2.neg` | `0xc1`| - | -| `i64x2.bitmask` | `0xc4`| - | -| `i64x2.widen_low_i32x4_s` | `0xc7`| - | -| `i64x2.widen_high_i32x4_s` | `0xc8`| - | -| `i64x2.widen_low_i32x4_u` | `0xc9`| - | -| `i64x2.widen_high_i32x4_u` | `0xca`| - | -| `i64x2.shl` | `0xcb`| - | -| `i64x2.shr_s` | `0xcc`| - | -| `i64x2.shr_u` | `0xcd`| - | -| `i64x2.add` | `0xce`| - | -| `i64x2.sub` | `0xd1`| - | -| `i64x2.mul` | `0xd5`| - | -| `f32x4.ceil` | `0xd8`| - | -| `f32x4.floor` | `0xd9`| - | -| `f32x4.trunc` | `0xda`| - | -| `f32x4.nearest` | `0xdb`| - | -| `f64x2.ceil` | `0xdc`| - | -| `f64x2.floor` | `0xdd`| - | -| `f64x2.trunc` | `0xde`| - | -| `f64x2.nearest` | `0xdf`| - | -| `f32x4.abs` | `0xe0`| - | -| `f32x4.neg` | `0xe1`| - | -| `f32x4.sqrt` | `0xe3`| - | -| `f32x4.add` | `0xe4`| - | -| `f32x4.sub` | `0xe5`| - | -| `f32x4.mul` | `0xe6`| - | -| `f32x4.div` | `0xe7`| - | -| `f32x4.min` | `0xe8`| - | -| `f32x4.max` | `0xe9`| - | -| `f32x4.pmin` | `0xea`| - | -| `f32x4.pmax` | `0xeb`| - | -| `f64x2.abs` | `0xec`| - | -| `f64x2.neg` | `0xed`| - | -| `f64x2.sqrt` | `0xef`| - | -| `f64x2.add` | `0xf0`| - | -| `f64x2.sub` | `0xf1`| - | -| `f64x2.mul` | `0xf2`| - | -| `f64x2.div` | `0xf3`| - | -| `f64x2.min` | `0xf4`| - | -| `f64x2.max` | `0xf5`| - | -| `f64x2.pmin` | `0xf6`| - | -| `f64x2.pmax` | `0xf7`| - | -| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | -| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | -| `f32x4.convert_i32x4_s` | `0xfa`| - | -| `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0xfc`| - | -| `v128.load64_zero` | `0xfd`| - | -| `i16x8.extmul_low_i8x16_s` | `0x110`| - | -| `i16x8.extmul_high_i8x16_s` | `0x111`| - | -| `i16x8.extmul_low_i8x16_u` | `0x112`| - | -| `i16x8.extmul_high_i8x16_u` | `0x113`| - | -| `i32x4.extmul_low_i16x8_s` | `0x114`| - | -| `i32x4.extmul_high_i16x8_s` | `0x115`| - | -| `i32x4.extmul_low_i16x8_u` | `0x116`| - | -| `i32x4.extmul_high_i16x8_u` | `0x117`| - | -| `i64x2.extmul_low_i32x4_s` | `0x118`| - | -| `i64x2.extmul_high_i32x4_s` | `0x119`| - | -| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | -| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | -| `i16x8.q15mulr_sat_s` | `TBD`| - | -| `v128.any_true` | `TBD`| - | -| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `i64x2.eq` | `TBD`| - | -| `i64x2.ne` | `TBD`| - | -| `i64x2.all_true` | `TBD`| - | +| Instruction | `simdop` | Immediate operands | +| -------------------------------|---------:|--------------------------| +| `v128.load` | `0x00`| m:memarg | +| `v128.load8x8_s` | `0x01`| m:memarg | +| `v128.load8x8_u` | `0x02`| m:memarg | +| `v128.load16x4_s` | `0x03`| m:memarg | +| `v128.load16x4_u` | `0x04`| m:memarg | +| `v128.load32x2_s` | `0x05`| m:memarg | +| `v128.load32x2_u` | `0x06`| m:memarg | +| `v128.load8_splat` | `0x07`| m:memarg | +| `v128.load16_splat` | `0x08`| m:memarg | +| `v128.load32_splat` | `0x09`| m:memarg | +| `v128.load64_splat` | `0x0a`| m:memarg | +| `v128.store` | `0x0b`| m:memarg | +| `v128.const` | `0x0c`| i:ImmByte[16] | +| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | +| `i8x16.swizzle` | `0x0e`| - | +| `i8x16.splat` | `0x0f`| - | +| `i16x8.splat` | `0x10`| - | +| `i32x4.splat` | `0x11`| - | +| `i64x2.splat` | `0x12`| - | +| `f32x4.splat` | `0x13`| - | +| `f64x2.splat` | `0x14`| - | +| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | +| `i8x16.eq` | `0x23`| - | +| `i8x16.ne` | `0x24`| - | +| `i8x16.lt_s` | `0x25`| - | +| `i8x16.lt_u` | `0x26`| - | +| `i8x16.gt_s` | `0x27`| - | +| `i8x16.gt_u` | `0x28`| - | +| `i8x16.le_s` | `0x29`| - | +| `i8x16.le_u` | `0x2a`| - | +| `i8x16.ge_s` | `0x2b`| - | +| `i8x16.ge_u` | `0x2c`| - | +| `i16x8.eq` | `0x2d`| - | +| `i16x8.ne` | `0x2e`| - | +| `i16x8.lt_s` | `0x2f`| - | +| `i16x8.lt_u` | `0x30`| - | +| `i16x8.gt_s` | `0x31`| - | +| `i16x8.gt_u` | `0x32`| - | +| `i16x8.le_s` | `0x33`| - | +| `i16x8.le_u` | `0x34`| - | +| `i16x8.ge_s` | `0x35`| - | +| `i16x8.ge_u` | `0x36`| - | +| `i32x4.eq` | `0x37`| - | +| `i32x4.ne` | `0x38`| - | +| `i32x4.lt_s` | `0x39`| - | +| `i32x4.lt_u` | `0x3a`| - | +| `i32x4.gt_s` | `0x3b`| - | +| `i32x4.gt_u` | `0x3c`| - | +| `i32x4.le_s` | `0x3d`| - | +| `i32x4.le_u` | `0x3e`| - | +| `i32x4.ge_s` | `0x3f`| - | +| `i32x4.ge_u` | `0x40`| - | +| `f32x4.eq` | `0x41`| - | +| `f32x4.ne` | `0x42`| - | +| `f32x4.lt` | `0x43`| - | +| `f32x4.gt` | `0x44`| - | +| `f32x4.le` | `0x45`| - | +| `f32x4.ge` | `0x46`| - | +| `f64x2.eq` | `0x47`| - | +| `f64x2.ne` | `0x48`| - | +| `f64x2.lt` | `0x49`| - | +| `f64x2.gt` | `0x4a`| - | +| `f64x2.le` | `0x4b`| - | +| `f64x2.ge` | `0x4c`| - | +| `v128.not` | `0x4d`| - | +| `v128.and` | `0x4e`| - | +| `v128.andnot` | `0x4f`| - | +| `v128.or` | `0x50`| - | +| `v128.xor` | `0x51`| - | +| `v128.bitselect` | `0x52`| - | +| `i8x16.abs` | `0x60`| - | +| `i8x16.neg` | `0x61`| - | +| `i8x16.all_true` | `0x63`| - | +| `i8x16.bitmask` | `0x64`| - | +| `i8x16.narrow_i16x8_s` | `0x65`| - | +| `i8x16.narrow_i16x8_u` | `0x66`| - | +| `i8x16.shl` | `0x6b`| - | +| `i8x16.shr_s` | `0x6c`| - | +| `i8x16.shr_u` | `0x6d`| - | +| `i8x16.add` | `0x6e`| - | +| `i8x16.add_sat_s` | `0x6f`| - | +| `i8x16.add_sat_u` | `0x70`| - | +| `i8x16.sub` | `0x71`| - | +| `i8x16.sub_sat_s` | `0x72`| - | +| `i8x16.sub_sat_u` | `0x73`| - | +| `i8x16.min_s` | `0x76`| - | +| `i8x16.min_u` | `0x77`| - | +| `i8x16.max_s` | `0x78`| - | +| `i8x16.max_u` | `0x79`| - | +| `i8x16.avgr_u` | `0x7b`| - | +| `i16x8.abs` | `0x80`| - | +| `i16x8.neg` | `0x81`| - | +| `i16x8.all_true` | `0x83`| - | +| `i16x8.bitmask` | `0x84`| - | +| `i16x8.narrow_i32x4_s` | `0x85`| - | +| `i16x8.narrow_i32x4_u` | `0x86`| - | +| `i16x8.widen_low_i8x16_s` | `0x87`| - | +| `i16x8.widen_high_i8x16_s` | `0x88`| - | +| `i16x8.widen_low_i8x16_u` | `0x89`| - | +| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.shl` | `0x8b`| - | +| `i16x8.shr_s` | `0x8c`| - | +| `i16x8.shr_u` | `0x8d`| - | +| `i16x8.add` | `0x8e`| - | +| `i16x8.add_sat_s` | `0x8f`| - | +| `i16x8.add_sat_u` | `0x90`| - | +| `i16x8.sub` | `0x91`| - | +| `i16x8.sub_sat_s` | `0x92`| - | +| `i16x8.sub_sat_u` | `0x93`| - | +| `i16x8.mul` | `0x95`| - | +| `i16x8.min_s` | `0x96`| - | +| `i16x8.min_u` | `0x97`| - | +| `i16x8.max_s` | `0x98`| - | +| `i16x8.max_u` | `0x99`| - | +| `i16x8.avgr_u` | `0x9b`| - | +| `i32x4.abs` | `0xa0`| - | +| `i32x4.neg` | `0xa1`| - | +| `i32x4.all_true` | `0xa3`| - | +| `i32x4.bitmask` | `0xa4`| - | +| `i32x4.widen_low_i16x8_s` | `0xa7`| - | +| `i32x4.widen_high_i16x8_s` | `0xa8`| - | +| `i32x4.widen_low_i16x8_u` | `0xa9`| - | +| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.shl` | `0xab`| - | +| `i32x4.shr_s` | `0xac`| - | +| `i32x4.shr_u` | `0xad`| - | +| `i32x4.add` | `0xae`| - | +| `i32x4.sub` | `0xb1`| - | +| `i32x4.mul` | `0xb5`| - | +| `i32x4.min_s` | `0xb6`| - | +| `i32x4.min_u` | `0xb7`| - | +| `i32x4.max_s` | `0xb8`| - | +| `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | +| `i64x2.neg` | `0xc1`| - | +| `i64x2.bitmask` | `0xc4`| - | +| `i64x2.widen_low_i32x4_s` | `0xc7`| - | +| `i64x2.widen_high_i32x4_s` | `0xc8`| - | +| `i64x2.widen_low_i32x4_u` | `0xc9`| - | +| `i64x2.widen_high_i32x4_u` | `0xca`| - | +| `i64x2.shl` | `0xcb`| - | +| `i64x2.shr_s` | `0xcc`| - | +| `i64x2.shr_u` | `0xcd`| - | +| `i64x2.add` | `0xce`| - | +| `i64x2.sub` | `0xd1`| - | +| `i64x2.mul` | `0xd5`| - | +| `f32x4.ceil` | `0xd8`| - | +| `f32x4.floor` | `0xd9`| - | +| `f32x4.trunc` | `0xda`| - | +| `f32x4.nearest` | `0xdb`| - | +| `f64x2.ceil` | `0xdc`| - | +| `f64x2.floor` | `0xdd`| - | +| `f64x2.trunc` | `0xde`| - | +| `f64x2.nearest` | `0xdf`| - | +| `f32x4.abs` | `0xe0`| - | +| `f32x4.neg` | `0xe1`| - | +| `f32x4.sqrt` | `0xe3`| - | +| `f32x4.add` | `0xe4`| - | +| `f32x4.sub` | `0xe5`| - | +| `f32x4.mul` | `0xe6`| - | +| `f32x4.div` | `0xe7`| - | +| `f32x4.min` | `0xe8`| - | +| `f32x4.max` | `0xe9`| - | +| `f32x4.pmin` | `0xea`| - | +| `f32x4.pmax` | `0xeb`| - | +| `f64x2.abs` | `0xec`| - | +| `f64x2.neg` | `0xed`| - | +| `f64x2.sqrt` | `0xef`| - | +| `f64x2.add` | `0xf0`| - | +| `f64x2.sub` | `0xf1`| - | +| `f64x2.mul` | `0xf2`| - | +| `f64x2.div` | `0xf3`| - | +| `f64x2.min` | `0xf4`| - | +| `f64x2.max` | `0xf5`| - | +| `f64x2.pmin` | `0xf6`| - | +| `f64x2.pmax` | `0xf7`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | +| `f32x4.convert_i32x4_s` | `0xfa`| - | +| `f32x4.convert_i32x4_u` | `0xfb`| - | +| `v128.load32_zero` | `0xfc`| - | +| `v128.load64_zero` | `0xfd`| - | +| `i16x8.extmul_low_i8x16_s` | `0x110`| - | +| `i16x8.extmul_high_i8x16_s` | `0x111`| - | +| `i16x8.extmul_low_i8x16_u` | `0x112`| - | +| `i16x8.extmul_high_i8x16_u` | `0x113`| - | +| `i32x4.extmul_low_i16x8_s` | `0x114`| - | +| `i32x4.extmul_high_i16x8_s` | `0x115`| - | +| `i32x4.extmul_low_i16x8_u` | `0x116`| - | +| `i32x4.extmul_high_i16x8_u` | `0x117`| - | +| `i64x2.extmul_low_i32x4_s` | `0x118`| - | +| `i64x2.extmul_high_i32x4_s` | `0x119`| - | +| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | +| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | +| `i16x8.q15mulr_sat_s` | `TBD`| - | +| `v128.any_true` | `TBD`| - | +| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `i64x2.eq` | `TBD`| - | +| `i64x2.ne` | `TBD`| - | +| `i64x2.all_true` | `TBD`| - | +| `f64x2.convert_low_i32x4_s` | `TBD`| - | +| `f64x2.convert_low_i32x4_u` | `TBD`| - | +| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - | +| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - | +| `f32x4.demote_f64x2_zero` | `TBD`| - | +| `f64x2.promote_low_f32x4` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 37a68e6908..12edefe67d 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,225 +1,231 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | -| ----------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.q15mulr_sat_s` | | | | | | -| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.eq` | | | | | | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | | | | | | -| `i64x2.bitmask` | | :heavy_check_mark: | | | | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.widen_low_i32x4_s` | | | | | | -| `i64x2.widen_high_i32x4_s` | | | | | | -| `i64x2.widen_low_i32x4_u` | | | | | | -| `i64x2.widen_high_i32x4_u` | | | | | | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | -| `v128.any_true` | | | | | | -| `v128.load8_lane` | | | | | | -| `v128.load16_lane` | | | | | | -| `v128.load32_lane` | | | | | | -| `v128.load64_lane` | | | | | | -| `v128.store8_lane` | | | | | | -| `v128.store16_lane` | | | | | | -| `v128.store32_lane` | | | | | | -| `v128.store64_lane` | | | | | | -| `i64x2.ne` | | | | | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | +| -------------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.not` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.and` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.or` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.xor` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.q15mulr_sat_s` | | | | | | +| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.eq` | | | | | | +| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.all_true` | | | | | | +| `i64x2.bitmask` | | :heavy_check_mark: | | | | +| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.widen_low_i32x4_s` | | | | | | +| `i64x2.widen_high_i32x4_s` | | | | | | +| `i64x2.widen_low_i32x4_u` | | | | | | +| `i64x2.widen_high_i32x4_u` | | | | | | +| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | +| `v128.any_true` | | | | | | +| `v128.load8_lane` | | | | | | +| `v128.load16_lane` | | | | | | +| `v128.load32_lane` | | | | | | +| `v128.load64_lane` | | | | | | +| `v128.store8_lane` | | | | | | +| `v128.store16_lane` | | | | | | +| `v128.store32_lane` | | | | | | +| `v128.store64_lane` | | | | | | +| `i64x2.ne` | | | | | | +| `f64x2.convert_low_i32x4_s` | | | | | | +| `f64x2.convert_low_i32x4_u` | | | | | | +| `i32x4.trunc_sat_f64x2_s_zero` | | | | | | +| `i32x4.trunc_sat_f64x2_u_zero` | | | | | | +| `f32x4.demote_f64x2_zero` | | | | | | +| `f64x2.promote_low_f32x4` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index ed43dadd00..907b1795be 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -1020,23 +1020,56 @@ Lane-wise rounding to the nearest integral value with the magnitude not larger t Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one. ## Conversions -### Integer to floating point +### Integer to single-precision floating point * `f32x4.convert_i32x4_s(a: v128) -> v128` * `f32x4.convert_i32x4_u(a: v128) -> v128` -Lane-wise conversion from integer to floating point. Some integer values will be -rounded. +Lane-wise conversion from integer to floating point. Integer values not +representable as single-precision floating-point numbers will be rounded to the +nearest-even representable number. -### Floating point to integer with saturation +### Integer to double-precision floating point +* `f64x2.convert_low_i32x4_s(a: v128) -> v128` +* `f64x2.convert_low_i32x4_u(a: v128) -> v128` + +Lane-wise conversion from integer to floating point. + +### Single-precision floating point to integer with saturation * `i32x4.trunc_sat_f32x4_s(a: v128) -> v128` * `i32x4.trunc_sat_f32x4_u(a: v128) -> v128` -Lane-wise saturating conversion from floating point to integer using the IEEE -`convertToIntegerTowardZero` function. If any input lane is a NaN, the -resulting lane is 0. If the rounded integer value of a lane is outside the -range of the destination type, the result is saturated to the nearest +Lane-wise saturating conversion from single-precision floating point to integer +using the IEEE `convertToIntegerTowardZero` function. If any input lane is a +NaN, the resulting lane is 0. If the rounded integer value of a lane is outside +the range of the destination type, the result is saturated to the nearest +representable integer value. + +### Double-precision floating point to integer with saturation +* `i32x4.trunc_sat_f64x2_s_zero(a: v128) -> v128` +* `i32x4.trunc_sat_f64x2_u_zero(a: v128) -> v128` + +Saturating conversion of the two double-precision floating point lanes to two +lower integer lanes using the IEEE `convertToIntegerTowardZero` function. The +two higher lanes of the result are initialized to zero. If any input lane is a +NaN, the resulting lane is 0. If the rounded integer value of a lane is outside +the range of the destination type, the result is saturated to the nearest representable integer value. +### Double-precision floating point to single-precision +* `f32x4.demote_f64x2_zero(a: v128) -> v128` + +Conversion of the two double-precision floating point lanes to two lower +single-precision lanes of the result. The two higher lanes of the result are +initialized to zero. If the conversion result is not representable as a +single-precision floating point number, it is rounded to the nearest-even +representable number. + +### Single-precision floating point to double-precision +* `f64x2.promote_low_f32x4(a: v128) -> v128` + +Conversion of the two lower single-precision floating point lanes to the two +double-precision lanes of the result. + ### Integer to integer narrowing * `i8x16.narrow_i16x8_s(a: v128, b: v128) -> v128` * `i8x16.narrow_i16x8_u(a: v128, b: v128) -> v128` From f5c5dcc0318e94f79ed574adca01a98f5a5d7832 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 1 Feb 2021 19:25:12 -0800 Subject: [PATCH 288/378] Add v128 to JS API (#360) Following the description given in https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#javascript-api-and-simd-values and also what I64 did before bigint integration. --- document/js-api/index.bs | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/document/js-api/index.bs b/document/js-api/index.bs index 9af7e69620..0fcade6ccd 100644 --- a/document/js-api/index.bs +++ b/document/js-api/index.bs @@ -110,6 +110,7 @@ urlPrefix: https://webassembly.github.io/spec/core/; spec: WebAssembly; type: df text: i32.const text: f32.const text: f64.const + text: v128.const text: function index; url: syntax/modules.html#syntax-funcidx text: function instance; url: exec/runtime.html#function-instances text: store_init; url: appendix/embedding.html#embed-store-init @@ -150,6 +151,7 @@ urlPrefix: https://webassembly.github.io/spec/core/; spec: WebAssembly; type: df text: i64 text: f32 text: f64 + text: v128 text: function element; url: exec/runtime.html#syntax-funcelem text: import component; url: syntax/modules.html#imports text: external value; url: exec/runtime.html#syntax-externval @@ -363,6 +365,8 @@ A {{Module}} object represents a single WebAssembly module. Each {{Module}} obje 1. Throw a {{LinkError}} exception. 1. If |valtype| is not [=i64=] and [=Type=](|v|) is BigInt, 1. Throw a {{LinkError}} exception. + 1. If |valtype| is [=v128=], + 1. Throw a {{LinkError}} exception. 1. Let |value| be [=ToWebAssemblyValue=](|v|, |valtype|). 1. Let |store| be the [=surrounding agent=]'s [=associated store=]. 1. Let (|store|, |globaladdr|) be [=global_alloc=](|store|, [=const=] |valtype|, |value|). @@ -816,7 +820,8 @@ enum ValueType { "i32", "i64", "f32", - "f64" + "f64", + "v128" }; @@ -866,6 +871,7 @@ which can be simultaneously referenced by multiple {{Instance}} objects. Each 1. If |s| equals "i64", return [=i64=]. 1. If |s| equals "f32", return [=f32=]. 1. If |s| equals "f64", return [=f64=]. + 1. If |s| equals "v128", return [=v128=].
@@ -881,6 +887,8 @@ which can be simultaneously referenced by multiple {{Instance}} objects. Each The Global(|descriptor|, |v|) constructor, when invoked, performs the following steps: 1. Let |mutable| be |descriptor|["mutable"]. 1. Let |valuetype| be [=ToValueType=](|descriptor|["value"]). + 1. If |valuetype| is [=v128=], + 1. Throw a {{LinkError}} exception. 1. If |v| is undefined, 1. Let |value| be [=DefaultValue=](|valuetype|). 1. Otherwise, @@ -896,6 +904,8 @@ which can be simultaneously referenced by multiple {{Instance}} objects. Each The algorithm GetGlobalValue({{Global}} |global|) performs the following steps: 1. Let |store| be the current agent's [=associated store=]. 1. Let |globaladdr| be |global|.\[[Global]]. + 1. Let |globaltype| be [=global_type=](|store|, |globaladdr|). + 1. If |globaltype| is of the form mut [=v128=], throw a {{TypeError}}. 1. Let |value| be [=global_read=](|store|, |globaladdr|). 1. Return [=ToJSValue=](|value|).
@@ -908,6 +918,7 @@ which can be simultaneously referenced by multiple {{Instance}} objects. Each 1. Let |store| be the current agent's [=associated store=]. 1. Let |globaladdr| be **this**.\[[Global]]. 1. Let |mut| |valuetype| be [=global_type=](|store|, |globaladdr|). + 1. If |valuetype| is [=v128=], throw a {{TypeError}}. 1. If |mut| is [=const=], throw a {{TypeError}}. 1. Let |value| be [=ToWebAssemblyValue=](**the given value**, |valuetype|). 1. Let |store| be [=global_write=](|store|, |globaladdr|, |value|). @@ -968,6 +979,9 @@ This slot holds a [=function address=] relative to the [=surrounding agent=]'s [ 1. Let |store| be the [=surrounding agent=]'s [=associated store=]. 1. Let |functype| be [=func_type=](|store|, |funcaddr|). 1. Let [|parameters|] → [results] be |functype|. + 1. If |parameters| or |results| contain [=v128=], throw a {{TypeError}}. + + Note: the above error is thrown each time the \[[Call]] method is invoked. 1. Let |args| be « ». 1. Let |i| be 0. 1. [=list/iterate|For each=] |t| of |parameters|, @@ -996,6 +1010,7 @@ Note: Exported Functions do not have a \[[Construct]] method and thus it is not To run a host function from the JavaScript object |func|, type |functype|, and [=list=] of [=WebAssembly values=] |arguments|, perform the following steps: 1. Let [parameters] → [|results|] be |functype|. + 1. If |parameters| or |results| contain [=v128=], throw a {{TypeError}}. 1. Let |jsArguments| be « ». 1. [=list/iterate|For each=] |arg| of |arguments|, 1. [=list/Append=] ! [=ToJSValue=](|arg|) to |jsArguments|. @@ -1039,6 +1054,7 @@ Note: Exported Functions do not have a \[[Construct]] method and thus it is not
The algorithm ToJSValue(|w|) coerces a [=WebAssembly value=] to a JavaScript value by performing the following steps: +1. Assert: |w| is not of the form [=v128.const=] v128. 1. If |w| is of the form [=i64.const=] |i64|, 1. Let |v| be [=signed_64=](|i64|). 1. Return a [=BigInt=] representing the mathematical value |v|. @@ -1053,6 +1069,7 @@ Note: Number values which are equal to NaN may have various observable NaN paylo The algorithm ToWebAssemblyValue(|v|, |type|) coerces a JavaScript value to a [=WebAssembly value=] by performing the following steps: +1. Assert: |type| is not [=v128=]. 1. If |type| is [=i64=], 1. Let |i64| be ? [=ToBigInt64=](|v|). 1. Return [=i64.const=] |i64|. From 40b255f06b6e8942b03ea2cf0252bf6823fd8e16 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 3 Feb 2021 09:14:51 -0800 Subject: [PATCH 289/378] Run simd test cases with make partest (#434) * Run simd test cases with make partest We list all simd test cases in simd/* in TESTFILES, then tweak the substitution in quiettest to strip quiettest/ from the front of the target, rather than match on just the file name (which loses the simd/) prefix. The temp output file name is unchanged, it uses the base file name (no simd/ prefix). * List all subdirs not just simd/ Co-authored-by: Andreas Rossberg --- interpreter/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/interpreter/Makefile b/interpreter/Makefile index c745311b9d..34d4dea15f 100644 --- a/interpreter/Makefile +++ b/interpreter/Makefile @@ -113,7 +113,7 @@ $(WINMAKE): clean # Executing test suite TESTDIR = ../test/core -TESTFILES = $(shell cd $(TESTDIR); ls *.wast) +TESTFILES = $(shell cd $(TESTDIR); ls *.wast; ls */*.wast) TESTS = $(TESTFILES:%.wast=%) .PHONY: test debugtest partest @@ -138,7 +138,7 @@ partest: $(TESTS:%=quiettest/%) quiettest/%: $(OPT) @ ( \ - $(TESTDIR)/run.py 2>$(@F).out --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(@F:%=$(TESTDIR)/%.wast) && \ + $(TESTDIR)/run.py 2>$(@F).out --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(@:quiettest/%=$(TESTDIR)/%.wast) && \ rm $(@F).out \ ) || \ cat $(@F).out || rm $(@F).out || exit 1 From b638fe3254f06ecab3c62a03e5a25837817eeed6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 1 Feb 2021 18:01:25 -0800 Subject: [PATCH 290/378] [interpreter] Add i64x2.eq and i64x2.ne These instructions were added in #381 and #411 respectively. The binary opcodes for these are still not finalized, I'm using what V8 is using for now. --- interpreter/binary/decode.ml | 2 + interpreter/binary/encode.ml | 2 + interpreter/exec/eval_simd.ml | 2 + interpreter/syntax/operators.ml | 2 + interpreter/text/arrange.ml | 2 + interpreter/text/lexer.mll | 6 +- test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_i64x2_cmp.py | 70 +++++++++++++++++ test/core/simd/simd_i64x2_cmp.wast | 106 ++++++++++++++++++++++++++ 9 files changed, 189 insertions(+), 4 deletions(-) create mode 100644 test/core/simd/meta/simd_i64x2_cmp.py create mode 100644 test/core/simd/simd_i64x2_cmp.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index aad4348089..3e76724e0c 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -385,11 +385,13 @@ let simd_prefix s = | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u | 0xbal -> i32x4_dot_i16x8_s + | 0xc0l -> i64x2_eq | 0xc1l -> i64x2_neg | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u | 0xcel -> i64x2_add + | 0xd0l -> i64x2_ne | 0xd1l -> i64x2_sub | 0xd5l -> i64x2_mul | 0xd8l -> f32x4_ceil diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 4e76e91e26..8d2a207f37 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -488,6 +488,8 @@ let encode m = | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l + | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xc0l + | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd0l | Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l | Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l | Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 28b0585b11..ac3539207f 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -119,6 +119,8 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 GeS -> SXX.I32x4.ge_s | I32x4 GeU -> SXX.I32x4.ge_u | I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s + | I64x2 Eq -> SXX.I64x2.eq + | I64x2 Ne -> SXX.I64x2.ne | I64x2 Add -> SXX.I64x2.add | I64x2 Sub -> SXX.I64x2.sub | I64x2 Mul -> SXX.I64x2.mul diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 44f7b9fd69..09d2ef2a72 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -379,6 +379,8 @@ let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) +let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) +let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 8302bcd933..74ed20cbc7 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -269,6 +269,8 @@ struct | I32x4 LeU -> "i32x4.le_u" | I32x4 GeS -> "i32x4.ge_s" | I32x4 GeU -> "i32x4.ge_u" + | I64x2 Eq -> "i64x2.eq" + | I64x2 Ne -> "i64x2.ne" | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" | I8x16 Add -> "i8x16.add" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 2bf89c9bfb..0c59eba51d 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -458,11 +458,9 @@ rule token = parse | "output" { OUTPUT } | (simd_shape as s)".eq" - { except ["i64x2"] s lexbuf; - BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq unreachable f32x4_eq f64x2_eq) } + { BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } | (simd_shape as s)".ne" - { except ["i64x2"] s lexbuf; - BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne unreachable f32x4_ne f64x2_ne) } + { BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } | (simd_int_shape as s)".lt_s" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s unreachable) } diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index e1c03ecd24..3508df1131 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -13,6 +13,7 @@ 'simd_i8x16_cmp', 'simd_i16x8_cmp', 'simd_i32x4_cmp', + 'simd_i64x2_cmp', 'simd_f32x4_cmp', 'simd_f64x2_cmp', 'simd_i8x16_arith', diff --git a/test/core/simd/meta/simd_i64x2_cmp.py b/test/core/simd/meta/simd_i64x2_cmp.py new file mode 100644 index 0000000000..d22f51baf8 --- /dev/null +++ b/test/core/simd/meta/simd_i64x2_cmp.py @@ -0,0 +1,70 @@ +#!/usr/bin/env python3 + +from simd_compare import SimdCmpCase + + +# Generate i64x2 test case +class Simdi64x2CmpCase(SimdCmpCase): + LANE_TYPE = 'i64x2' + + BINARY_OPS = ['eq', 'ne'] + + # Override this since i64x2 does not support as many comparison instructions. + CASE_TXT = """ +;; Test all the {lane_type} comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) ({lane_type}.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) ({lane_type}.ne (local.get $x) (local.get $y))) +) + +{normal_case} + +;; Type check + +(assert_invalid (module (func (result v128) ({lane_type}.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.ne (i32.const 0) (f32.const 0)))) "type mismatch") +""" + + def get_case_data(self): + forms = ['i64x2'] * 3 + case_data = [] + + case_data.append(['#', 'eq']) + case_data.append(['#', 'i64x2.eq (i64x2) (i64x2)']) + case_data.append(['eq', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '-1', forms]) + case_data.append(['eq', ['0x0000000000000000', '0x0000000000000000'], '-1', forms]) + case_data.append(['eq', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '-1', forms]) + case_data.append(['eq', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '-1', forms]) + case_data.append(['eq', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '-1', forms]) + case_data.append(['eq', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '-1', forms]) + case_data.append(['eq', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', forms]) + case_data.append(['eq', ['0xFFFFFFFFFFFFFFFF', '0x0FFFFFFFFFFFFFFF'], '0', forms]) + case_data.append(['eq', ['0x1', '0x2'], '0', forms]) + + case_data.append(['#', 'ne']) + case_data.append(['#', 'i64x2.ne (i64x2) (i64x2)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ne', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '0', forms]) + case_data.append(['ne', ['0x0000000000000000', '0x0000000000000000'], '0', forms]) + case_data.append(['ne', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '0', forms]) + case_data.append(['ne', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '0', forms]) + case_data.append(['ne', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '0', forms]) + case_data.append(['ne', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '0', forms]) + case_data.append(['ne', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], + ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', forms]) + + return case_data + + +def gen_test_cases(): + i64x2 = Simdi64x2CmpCase() + i64x2.gen_test_cases() + + +if __name__ == '__main__': + i64x2 = Simdi64x2CmpCase() + i64x2.gen_test_cases() diff --git a/test/core/simd/simd_i64x2_cmp.wast b/test/core/simd/simd_i64x2_cmp.wast new file mode 100644 index 0000000000..9f4cc0edf5 --- /dev/null +++ b/test/core/simd/simd_i64x2_cmp.wast @@ -0,0 +1,106 @@ + +;; Test all the i64x2 comparison operators on major boundary values and all special values. + +(module + (func (export "eq") (param $x v128) (param $y v128) (result v128) (i64x2.eq (local.get $x) (local.get $y))) + (func (export "ne") (param $x v128) (param $y v128) (result v128) (i64x2.ne (local.get $x) (local.get $y))) +) + + +;; eq + +;; i64x2.eq (i64x2) (i64x2) +(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0x03020100 0x11100904) + (v128.const i64x2 0x03020100 0x11100904)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0FFFFFFFFFFFFFFF 0x0FFFFFFFFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "eq" (v128.const i64x2 0x1 0x1) + (v128.const i64x2 0x2 0x2)) + (v128.const i64x2 0 0)) + +;; ne + +;; i64x2.ne (i64x2) (i64x2) + +;; hex vs hex +(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF) + (v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0x00000000) + (v128.const i64x2 0x00000000 0x00000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0) + (v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0x00000000) + (v128.const i64x2 0xFFFFFFFF 0x00000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0xFFFFFFFF) + (v128.const i64x2 0x00000000 0xFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "ne" (v128.const i64x2 0x03020100 0x11100904) + (v128.const i64x2 0x03020100 0x11100904)) + (v128.const i64x2 0 0)) + +;; Type check + +(assert_invalid (module (func (result v128) (i64x2.eq (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.ne (i32.const 0) (f32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i64x2.eq-1st-arg-empty (result v128) + (i64x2.eq (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.eq-arg-empty (result v128) + (i64x2.eq) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.ne-1st-arg-empty (result v128) + (i64x2.ne (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.ne-arg-empty (result v128) + (i64x2.ne) + ) + ) + "type mismatch" +) \ No newline at end of file From 98915d5f8e653ef737d4c5d0f1408ebadb3b8ac7 Mon Sep 17 00:00:00 2001 From: Zhi An Ng Date: Thu, 17 Dec 2020 06:23:02 +0000 Subject: [PATCH 291/378] Add semantics for v128.load32_zero v128.load64_zero --- document/core/binary/instructions.rst | 2 + document/core/exec/instructions.rst | 55 +++++++++++++++++++++++++++ document/core/syntax/instructions.rst | 2 + document/core/text/instructions.rst | 2 + document/core/valid/instructions.rst | 21 ++++++++++ 5 files changed, 82 insertions(+) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index a0f5fc4d2c..19f75bac65 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -429,6 +429,8 @@ SIMD loads and stores are followed by the encoding of their |memarg| immediate. \hex{FD}~~8{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{16\_splat}~m \\ &&|& \hex{FD}~~9{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32\_splat}~m \\ &&|& \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& + \hex{FD}~~252{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& + \hex{FD}~~253{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ \end{array} diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index d478ddb337..a595656bad 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -1125,6 +1125,61 @@ Memory Instructions \end{array} +.. _exec-load-zero: + +:math:`\V128\K{.}\LOAD{N}\K{\_zero}~\memarg` +............................................. + +1. Let :math:`F` be the :ref:`current ` :ref:`frame `. + +2. Assert: due to :ref:`validation `, :math:`F.\AMODULE.\MIMEMS[0]` exists. + +3. Let :math:`a` be the :ref:`memory address ` :math:`F.\AMODULE.\MIMEMS[0]`. + +4. Assert: due to :ref:`validation `, :math:`S.\SMEMS[a]` exists. + +5. Let :math:`\X{mem}` be the :ref:`memory instance ` :math:`S.\SMEMS[a]`. + +6. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +7. Pop the value :math:`\I32.\CONST~i` from the stack. + +8. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`. + +9. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then: + + a. Trap. + +10. Let :math:`b^\ast` be the byte sequence :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]`. + +11. Let :math:`n` be the integer for which :math:`\bytes_{\iN}(n) = b^\ast`. + +12. Let :math:`c` be the result of :math:`\extendu_{N,128}(n)`. + +13. Push the value :math:`\V128.\CONST~c` to the stack. + +.. math:: + ~\\[-1ex] + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~i)~(\V128\K{.}\LOAD{N}\K{\_zero}~\memarg) &\stepto& S; F; (\V128.\CONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & \X{ea} = i + \memarg.\OFFSET \\ + \wedge & \X{ea} + N/8 \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\ + \wedge & \bytes_{\iN}(n) = S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8]) \\ + \wedge & c = \extendu_{N,128}(n) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~k)~(\V128.\LOAD{N}\K{\_zero}~\memarg) &\stepto& S; F; \TRAP + \end{array} + \\ \qquad + (\otherwise) \\ + \end{array} + + .. _exec-store: .. _exec-storen: diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index c24b1e997d..535d4058c6 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -470,6 +470,8 @@ Instructions in this group are concerned with linear :ref:`memory `. \K{v128.}\LOAD\K{16\_splat}~\memarg \\&&|& \K{v128.}\LOAD\K{32\_splat}~\memarg ~|~ \K{v128.}\LOAD\K{64\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\K{32\_zero}~\memarg ~|~ + \K{v128.}\LOAD\K{64\_zero}~\memarg \\&&|& \MEMORYSIZE \\&&|& \MEMORYGROW \\ \end{array} diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 6084291e50..1d88cf77be 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -470,6 +470,8 @@ SIMD memory instructions have optional offset and alignment immediates, like the \text{v128.load16\_splat}~~m{:}\Tmemarg_2 &\Rightarrow& \V128.\LOAD\K{16\_splat}~m \\ &&|& \text{v128.load32\_splat}~~m{:}\Tmemarg_4 &\Rightarrow& \V128.\LOAD\K{32\_splat}~m \\ &&|& \text{v128.load64\_splat}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& + \text{v128.load32\_zero}~~m{:}\Tmemarg_4 &\Rightarrow& \V128.\LOAD\K{32\_zero}~m \\ &&|& + \text{v128.load64\_zero}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{64\_zero}~m \\ &&|& \text{v128.store}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\STORE~m \\ \end{array} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index eea07ee2a8..145ef42b51 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -727,6 +727,27 @@ Memory Instructions } +.. _valid-load-zero: + +:math:`\K{v128.}\LOAD{N}\K{\_zero}~\memarg` +............................................... + +* The memory :math:`C.\CMEMS[0]` must be defined in the context. + +* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`. + +* Then the instruction is valid with type :math:`[\I32] \to [\V128]`. + +.. math:: + \frac{ + C.\CMEMS[0] = \memtype + \qquad + 2^{\memarg.\ALIGN} \leq N/8 + }{ + C \vdashinstr \K{v128.}\LOAD{N}\K{\_zero}~\memarg : [\I32] \to [\V128] + } + + .. _valid-memory.size: :math:`\MEMORYSIZE` From 7c37165c7b3087dd240be89c4cbbf19463ea6e99 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 3 Feb 2021 10:49:30 -0800 Subject: [PATCH 292/378] [interpreter] Implement SIMD extended multiply instructions (#438) These were accepted into the proposal in #376. There are 12 instructions in total: - i16x8.extmul_{low,high}_i8x16_{s,u} - i32x4.extmul_{low,high}_i16x8_{s,u} - i64x2.extmul_{low,high}_i32x4_{s,u} The implementation is straightforward, widen (using existing operations), then a multiply with the wider shape. The binary opcodes are not decided yet, they currently follow the ones used in V8, when those are finalized, we can change it to match. Added a test generation script that reuses some logic in the generator for arithmetic instructions. Since these instructions have different src and dst shapes, I tweaked the base class to allow for having different shapes. --- interpreter/binary/decode.ml | 12 + interpreter/binary/encode.ml | 12 + interpreter/exec/eval_simd.ml | 12 + interpreter/exec/simd.ml | 38 +- interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 12 + interpreter/text/arrange.ml | 12 + interpreter/text/lexer.mll | 13 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_arithmetic.py | 21 +- test/core/simd/meta/simd_ext_mul.py | 75 ++++ test/core/simd/meta/simd_integer_op.py | 32 +- test/core/simd/simd_i16x8_extmul_i8x16.wast | 404 ++++++++++++++++++++ test/core/simd/simd_i32x4_extmul_i16x8.wast | 404 ++++++++++++++++++++ test/core/simd/simd_i64x2_extmul_i32x4.wast | 404 ++++++++++++++++++++ 15 files changed, 1435 insertions(+), 18 deletions(-) create mode 100644 test/core/simd/meta/simd_ext_mul.py create mode 100644 test/core/simd/simd_i16x8_extmul_i8x16.wast create mode 100644 test/core/simd/simd_i32x4_extmul_i16x8.wast create mode 100644 test/core/simd/simd_i64x2_extmul_i32x4.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 3e76724e0c..e1764be68a 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -365,7 +365,11 @@ let simd_prefix s = | 0x97l -> i16x8_min_u | 0x98l -> i16x8_max_s | 0x99l -> i16x8_max_u + | 0x9al -> i16x8_extmul_low_i8x16_s | 0x9bl -> i16x8_avgr_u + | 0x9dl -> i16x8_extmul_high_i8x16_s + | 0x9el -> i16x8_extmul_low_i8x16_u + | 0x9fl -> i16x8_extmul_high_i8x16_u | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg | 0xa3l -> i32x4_all_true @@ -385,6 +389,10 @@ let simd_prefix s = | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u | 0xbal -> i32x4_dot_i16x8_s + | 0xbbl -> i32x4_extmul_low_i16x8_s + | 0xbdl -> i32x4_extmul_high_i16x8_s + | 0xbel -> i32x4_extmul_low_i16x8_u + | 0xbfl -> i32x4_extmul_high_i16x8_u | 0xc0l -> i64x2_eq | 0xc1l -> i64x2_neg | 0xcbl -> i64x2_shl @@ -393,6 +401,10 @@ let simd_prefix s = | 0xcel -> i64x2_add | 0xd0l -> i64x2_ne | 0xd1l -> i64x2_sub + | 0xd2l -> i64x2_extmul_low_i32x4_s + | 0xd3l -> i64x2_extmul_high_i32x4_s + | 0xd6l -> i64x2_extmul_low_i32x4_u + | 0xd7l -> i64x2_extmul_high_i32x4_u | 0xd5l -> i64x2_mul | 0xd8l -> f32x4_ceil | 0xd9l -> f32x4_floor diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 8d2a207f37..662b0bd5ad 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -467,6 +467,10 @@ let encode m = | Binary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l | Binary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l | Binary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl + | Binary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9al + | Binary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl + | Binary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el + | Binary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l | Binary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l @@ -485,11 +489,19 @@ let encode m = | Binary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el | Binary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl | Binary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l + | Binary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbbl + | Binary (V128 V128Op.(I32x4 ExtMulHighS)) -> simd_op 0xbdl + | Binary (V128 V128Op.(I32x4 ExtMulLowU)) -> simd_op 0xbel + | Binary (V128 V128Op.(I32x4 ExtMulHighU)) -> simd_op 0xbfl | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xc0l | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd0l + | Binary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xd2l + | Binary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xd3l + | Binary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xd6l + | Binary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xd7l | Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l | Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l | Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index ac3539207f..6ab68766f3 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -101,6 +101,10 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I16x8 MaxS -> SXX.I16x8.max_s | I16x8 MaxU -> SXX.I16x8.max_u | I16x8 AvgrU -> SXX.I16x8.avgr_u + | I16x8 ExtMulLowS -> SXX.I16x8_convert.extmul_low_s + | I16x8 ExtMulHighS -> SXX.I16x8_convert.extmul_high_s + | I16x8 ExtMulLowU -> SXX.I16x8_convert.extmul_low_u + | I16x8 ExtMulHighU -> SXX.I16x8_convert.extmul_high_u | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub | I32x4 MinS -> SXX.I32x4.min_s @@ -121,9 +125,17 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s | I64x2 Eq -> SXX.I64x2.eq | I64x2 Ne -> SXX.I64x2.ne + | I32x4 ExtMulLowS -> SXX.I32x4_convert.extmul_low_s + | I32x4 ExtMulHighS -> SXX.I32x4_convert.extmul_high_s + | I32x4 ExtMulLowU -> SXX.I32x4_convert.extmul_low_u + | I32x4 ExtMulHighU -> SXX.I32x4_convert.extmul_high_u | I64x2 Add -> SXX.I64x2.add | I64x2 Sub -> SXX.I64x2.sub | I64x2 Mul -> SXX.I64x2.mul + | I64x2 ExtMulLowS -> SXX.I64x2_convert.extmul_low_s + | I64x2 ExtMulHighS -> SXX.I64x2_convert.extmul_high_s + | I64x2 ExtMulLowU -> SXX.I64x2_convert.extmul_low_u + | I64x2 ExtMulHighU -> SXX.I64x2_convert.extmul_high_u | F32x4 Eq -> SXX.F32x4.eq | F32x4 Ne -> SXX.F32x4.ne | F32x4 Lt -> SXX.F32x4.lt diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index dfbbdbd407..ab46cda8cf 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -177,6 +177,10 @@ sig val widen_high_s : t -> t val widen_low_u : t -> t val widen_high_u : t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t end module I32x4_convert : sig val trunc_sat_f32x4_s : t -> t @@ -186,10 +190,20 @@ sig val widen_low_u : t -> t val widen_high_u : t -> t val dot_i16x8_s : t -> t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t end module I64x2_convert : sig val widen_low_s : t -> t + val widen_high_s : t -> t val widen_low_u : t -> t + val widen_high_u : t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t end module F32x4_convert : sig val convert_i32x4_s : t -> t @@ -417,6 +431,10 @@ struct let widen_low_u = widen Lib.List.take 0xffl let widen_high_u = widen Lib.List.drop 0xffl + let extmul_low_s x y = I16x8.mul (widen_low_s x) (widen_low_s y) + let extmul_high_s x y = I16x8.mul (widen_high_s x) (widen_high_s y) + let extmul_low_u x y = I16x8.mul (widen_low_u x) (widen_low_u y) + let extmul_high_u x y = I16x8.mul (widen_high_u x) (widen_high_u y) end module I32x4_convert = struct @@ -441,16 +459,28 @@ struct | [], [] -> [] | _, _ -> assert false in Rep.of_i32x4 (dot xs ys) + + let extmul_low_s x y = I32x4.mul (widen_low_s x) (widen_low_s y) + let extmul_high_s x y = I32x4.mul (widen_high_s x) (widen_high_s y) + let extmul_low_u x y = I32x4.mul (widen_low_u x) (widen_low_u y) + let extmul_high_u x y = I32x4.mul (widen_high_u x) (widen_high_u y) end module I64x2_convert = struct - let widen mask x = + let widen take_or_drop mask x = Rep.of_i64x2 (List.map (fun i32 -> Int64.(logand mask (of_int32 i32))) - (Lib.List.take 2 (Rep.to_i32x4 x))) - let widen_low_s = widen 0xffffffffffffffffL - let widen_low_u = widen 0xffffffffL + (take_or_drop 2 (Rep.to_i32x4 x))) + let widen_low_s = widen Lib.List.take 0xffffffffffffffffL + let widen_high_s = widen Lib.List.drop 0xffffffffffffffffL + let widen_low_u = widen Lib.List.take 0xffffffffL + let widen_high_u = widen Lib.List.drop 0xffffffffL + + let extmul_low_s x y = I64x2.mul (widen_low_s x) (widen_low_s y) + let extmul_high_s x y = I64x2.mul (widen_high_s x) (widen_high_s y) + let extmul_low_u x y = I64x2.mul (widen_low_u x) (widen_low_u y) + let extmul_high_u x y = I64x2.mul (widen_high_u x) (widen_high_u y) end module F32x4_convert = struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index fcd9c22a65..5e2e59b445 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -55,6 +55,7 @@ struct | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU | DotI16x8S + | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest | ConvertI32x4S | ConvertI32x4U diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 09d2ef2a72..936c0f791b 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -340,6 +340,10 @@ let i16x8_min_u = Binary (V128 V128Op.(I16x8 MinU)) let i16x8_max_s = Binary (V128 V128Op.(I16x8 MaxS)) let i16x8_max_u = Binary (V128 V128Op.(I16x8 MaxU)) let i16x8_avgr_u = Binary (V128 V128Op.(I16x8 AvgrU)) +let i16x8_extmul_low_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulLowS)) +let i16x8_extmul_high_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulHighS)) +let i16x8_extmul_low_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulLowU)) +let i16x8_extmul_high_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulHighU)) let i32x4_splat = Convert (V128 V128Op.(I32x4 Splat)) let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) @@ -375,6 +379,10 @@ let i32x4_mul = Binary (V128 V128Op.(I32x4 Mul)) let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S)) +let i32x4_extmul_low_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulLowS)) +let i32x4_extmul_high_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulHighS)) +let i32x4_extmul_low_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulLowU)) +let i32x4_extmul_high_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulHighU)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) @@ -388,6 +396,10 @@ let i64x2_mul = Binary (V128 V128Op.(I64x2 Mul)) let i64x2_shl = SimdShift V128Op.(I64x2 Shl) let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) let i64x2_shr_u = SimdShift V128Op.(I64x2 ShrU) +let i64x2_extmul_low_i32x4_s = Binary (V128 V128Op.(I64x2 ExtMulLowS)) +let i64x2_extmul_high_i32x4_s = Binary (V128 V128Op.(I64x2 ExtMulHighS)) +let i64x2_extmul_low_i32x4_u = Binary (V128 V128Op.(I64x2 ExtMulLowU)) +let i64x2_extmul_high_i32x4_u = Binary (V128 V128Op.(I64x2 ExtMulHighU)) let f32x4_splat = Convert (V128 V128Op.(F32x4 Splat)) let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 74ed20cbc7..cb53033c7f 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -298,6 +298,10 @@ struct | I16x8 MaxS -> "i16x8.max_s" | I16x8 MaxU -> "i16x8.max_u" | I16x8 AvgrU -> "i16x8.avgr_u" + | I16x8 ExtMulLowS -> "i16x8.extmul_low_i8x16_s" + | I16x8 ExtMulHighS -> "i16x8.extmul_high_i8x16_s" + | I16x8 ExtMulLowU -> "i16x8.extmul_low_i8x16_u" + | I16x8 ExtMulHighU -> "i16x8.extmul_high_i8x16_u" | I32x4 Add -> "i32x4.add" | I32x4 Sub -> "i32x4.sub" | I32x4 Mul -> "i32x4.mul" @@ -306,9 +310,17 @@ struct | I32x4 MaxS -> "i32x4.max_s" | I32x4 MaxU -> "i32x4.max_u" | I32x4 DotI16x8S -> "i32x4.dot_i16x8_s" + | I32x4 ExtMulLowS -> "i32x4.extmul_low_i16x8_s" + | I32x4 ExtMulHighS -> "i32x4.extmul_high_i16x8_s" + | I32x4 ExtMulLowU -> "i32x4.extmul_low_i16x8_u" + | I32x4 ExtMulHighU -> "i32x4.extmul_high_i16x8_u" | I64x2 Add -> "i64x2.add" | I64x2 Sub -> "i64x2.sub" | I64x2 Mul -> "i64x2.mul" + | I64x2 ExtMulLowS -> "i64x2.extmul_low_i32x4_s" + | I64x2 ExtMulHighS -> "i64x2.extmul_high_i32x4_s" + | I64x2 ExtMulLowU -> "i64x2.extmul_low_i32x4_u" + | I64x2 ExtMulHighU -> "i64x2.extmul_high_i32x4_u" | F32x4 Eq -> "f32x4.eq" | F32x4 Ne -> "f32x4.ne" | F32x4 Lt -> "f32x4.lt" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 0c59eba51d..9058de5038 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -576,6 +576,19 @@ rule token = parse | "i32x4.dot_i16x8_s" { BINARY i32x4_dot_i16x8_s } + | "i16x8.extmul_low_i8x16_"(sign as s) + { BINARY (ext s i16x8_extmul_low_i8x16_s i16x8_extmul_low_i8x16_u) } + | "i16x8.extmul_high_i8x16_"(sign as s) + { BINARY (ext s i16x8_extmul_high_i8x16_s i16x8_extmul_high_i8x16_u) } + | "i32x4.extmul_low_i16x8_"(sign as s) + { BINARY (ext s i32x4_extmul_low_i16x8_s i32x4_extmul_low_i16x8_u) } + | "i32x4.extmul_high_i16x8_"(sign as s) + { BINARY (ext s i32x4_extmul_high_i16x8_s i32x4_extmul_high_i16x8_u) } + | "i64x2.extmul_low_i32x4_"(sign as s) + { BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } + | "i64x2.extmul_high_i32x4_"(sign as s) + { BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 3508df1131..f9a167feae 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -33,6 +33,7 @@ 'simd_f64x2_pmin_pmax', 'simd_i32x4_dot_i16x8', 'simd_load_lane', + 'simd_ext_mul', ) diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index d4214c10ea..53d92d2901 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -35,14 +35,27 @@ def __str__(self): def lane(self): return self.LANE_VALUE.get(self.LANE_TYPE) + @property + def dst_lane(self): + return self.lane + + @property + def src_lane(self): + # Used for arithmetic that extends the lane, e.g. i16x8 lanes, which + # are extended multiply to i32x4. + if hasattr(self, 'SRC_LANE_TYPE'): + return self.LANE_VALUE.get(self.SRC_LANE_TYPE) + else: + return self.lane + @property def normal_unary_op_test_data(self): - lane = self.lane + lane = self.src_lane return [0, 1, -1, lane.max - 1, lane.min + 1, lane.min, lane.max, lane.mask] @property def normal_binary_op_test_data(self): - lane = self.lane + lane = self.src_lane return [ (0, 0), (0, 1), @@ -170,7 +183,7 @@ def get_case_data(self): for data_group, v128_forms in self.bin_test_data: for data in data_group: case_data.append([op_name, [str(data[0]), str(data[1])], - str(o.binary_op(data[0], data[1], self.lane)), + str(o.binary_op(data[0], data[1], self.src_lane, self.dst_lane)), v128_forms]) for data_group in self.full_bin_test_data: for data in data_group.get(op_name): @@ -183,7 +196,7 @@ def get_case_data(self): for data_group, v128_forms in self.unary_test_data: for data in data_group: case_data.append([op_name, [str(data)], - str(o.unary_op(data, self.lane)), + str(o.unary_op(data, self.dst_lane)), v128_forms]) return case_data diff --git a/test/core/simd/meta/simd_ext_mul.py b/test/core/simd/meta/simd_ext_mul.py new file mode 100644 index 0000000000..30a4082f24 --- /dev/null +++ b/test/core/simd/meta/simd_ext_mul.py @@ -0,0 +1,75 @@ +#!/usr/bin/env python3 + +""" Base class for generating extended multiply instructions. These +instructions 2 inputs of the same (narrower) lane shape, multiplies +corresponding lanes with extension (no overflow/wraparound), producing 1 output +of a (wider) shape. These instructions can choose to work on the low or high +halves of the inputs, and perform signed or unsigned multiply. + +Subclasses need to define 3 attributes: + - LANE_TYPE (this is the output shape) + - SRC_LANE_TYPE (this is the input (narrower) shape) + - BINARY_OPS (list of operations) +""" + +from simd_arithmetic import SimdArithmeticCase + + +class SimdExtMulCase(SimdArithmeticCase): + UNARY_OPS = () + + @property + def full_bin_test_data(self): + return [] + + def get_combine_cases(self): + return '' + + @property + def bin_test_data(self): + lane_forms = [self.SRC_LANE_TYPE, self.SRC_LANE_TYPE, self.LANE_TYPE] + return [(self.normal_binary_op_test_data, lane_forms)] + + @property + def hex_binary_op_test_data(self): + return [] + + def gen_test_cases(self): + wast_filename = '../simd_{wide}_extmul_{narrow}.wast'.format( + wide=self.LANE_TYPE, narrow=self.SRC_LANE_TYPE) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + + +class SimdI16x8ExtMulCase(SimdExtMulCase): + LANE_TYPE = 'i16x8' + SRC_LANE_TYPE = 'i8x16' + BINARY_OPS = ('extmul_low_i8x16_s', 'extmul_high_i8x16_s', + 'extmul_low_i8x16_u', 'extmul_high_i8x16_u') + + +class SimdI32x4ExtMulCase(SimdExtMulCase): + LANE_TYPE = 'i32x4' + SRC_LANE_TYPE = 'i16x8' + BINARY_OPS = ('extmul_low_i16x8_s', 'extmul_high_i16x8_s', + 'extmul_low_i16x8_u', 'extmul_high_i16x8_u') + + +class SimdI64x2ExtMulCase(SimdExtMulCase): + LANE_TYPE = 'i64x2' + SRC_LANE_TYPE = 'i32x4' + BINARY_OPS = ('extmul_low_i32x4_s', 'extmul_high_i32x4_s', + 'extmul_low_i32x4_u', 'extmul_high_i32x4_u') + + +def gen_test_cases(): + simd_i16x8_ext_mul_case = SimdI16x8ExtMulCase() + simd_i16x8_ext_mul_case.gen_test_cases() + simd_i32x4_ext_mul_case = SimdI32x4ExtMulCase() + simd_i32x4_ext_mul_case.gen_test_cases() + simd_i64x2_ext_mul_case = SimdI64x2ExtMulCase() + simd_i64x2_ext_mul_case.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index ec7fede839..67bf207eb3 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -15,6 +15,7 @@ class ArithmeticOp: add_sat_s, add_sat_u, sub_sat_s, sub_sat_u, min_s, min_u, max_s, max_u, avgr_u, abs + ext_mul_s, ext_mul_u """ def __init__(self, op: str): self.op = op @@ -121,7 +122,7 @@ def unary_op(self, operand, lane): return str(result) - def binary_op(self, operand1, operand2, lane): + def binary_op(self, operand1, operand2, src_lane, dst_lane=None): """General integer arithmetic and saturating arithmetic operations with 2 operands. @@ -130,12 +131,15 @@ def binary_op(self, operand1, operand2, lane): add_sat_s, add_sat_u, sub_sat_s, sub_sat_u, min_s, min_u, max_s, max_u, avgr_u + ext_mul_s, ext_mul_u (same as mul) :param operand1: the operand 1, integer or literal string in hex or decimal format :param operand2: the operand 2, integer or literal string in hex or decimal format - :param lane: the LaneValue instance of a lane in v128 + :param src_lane: the LaneValue instance of a lane in v128 :return: the string of the result of in hex or decimal format """ + if not dst_lane: + dst_lane = src_lane v1 = operand1 v2 = operand2 base1 = base2 = 10 @@ -155,27 +159,35 @@ def binary_op(self, operand1, operand2, lane): value = v1 - v2 elif self.op == 'mul': value = v1 * v2 + elif self.op.startswith('extmul_'): + if self.op.endswith('s'): + i1 = self.get_valid_value(v1, src_lane) + i2 = self.get_valid_value(v2, src_lane) + else: + i1 = self.get_valid_value(v1, src_lane, signed=False) + i2 = self.get_valid_value(v2, src_lane, signed=False) + value = i1 * i2 elif 'sat' in self.op: - value = self._saturate(v1, v2, lane) + value = self._saturate(v1, v2, src_lane) if self.op.endswith('_u'): result_signed = False elif self.op in ['min_s', 'max_s']: - i1 = self.get_valid_value(v1, lane) - i2 = self.get_valid_value(v2, lane) + i1 = self.get_valid_value(v1, src_lane) + i2 = self.get_valid_value(v2, src_lane) if self.op == 'min_s': return operand1 if i1 <= i2 else operand2 else: return operand1 if i1 >= i2 else operand2 elif self.op in ['min_u', 'max_u']: - i1 = self.get_valid_value(v1, lane, signed=False) - i2 = self.get_valid_value(v2, lane, signed=False) + i1 = self.get_valid_value(v1, src_lane, signed=False) + i2 = self.get_valid_value(v2, src_lane, signed=False) if self.op == 'min_u': return operand1 if i1 <= i2 else operand2 else: return operand1 if i1 >= i2 else operand2 elif self.op == 'avgr_u': - i1 = self.get_valid_value(v1, lane, signed=False) - i2 = self.get_valid_value(v2, lane, signed=False) + i1 = self.get_valid_value(v1, src_lane, signed=False) + i2 = self.get_valid_value(v2, src_lane, signed=False) result = (i1 + i2 + 1) // 2 if base1 == 16 or base2 == 16: return hex(result) @@ -184,5 +196,5 @@ def binary_op(self, operand1, operand2, lane): else: raise Exception('Unknown binary operation') - result = self.get_valid_value(value, lane, signed=result_signed) + result = self.get_valid_value(value, dst_lane, signed=result_signed) return str(result) diff --git a/test/core/simd/simd_i16x8_extmul_i8x16.wast b/test/core/simd/simd_i16x8_extmul_i8x16.wast new file mode 100644 index 0000000000..cc8cf8f402 --- /dev/null +++ b/test/core/simd/simd_i16x8_extmul_i8x16.wast @@ -0,0 +1,404 @@ +;; Tests for i16x8 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i16x8.extmul_low_i8x16_s") (param v128 v128) (result v128) (i16x8.extmul_low_i8x16_s (local.get 0) (local.get 1))) + (func (export "i16x8.extmul_high_i8x16_s") (param v128 v128) (result v128) (i16x8.extmul_high_i8x16_s (local.get 0) (local.get 1))) + (func (export "i16x8.extmul_low_i8x16_u") (param v128 v128) (result v128) (i16x8.extmul_low_i8x16_u (local.get 0) (local.get 1))) + (func (export "i16x8.extmul_high_i8x16_u") (param v128 v128) (result v128) (i16x8.extmul_high_i8x16_u (local.get 0) (local.get 1))) +) + + +;; i16x8.extmul_low_i8x16_s +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4160 4160 4160 4160 4160 4160 4160 4160)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 16129 16129 16129 16129 16129 16129 16129 16129)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 16256 16256 16256 16256 16256 16256 16256 16256)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_low_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + +;; i16x8.extmul_high_i8x16_s +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 4160 4160 4160 4160 4160 4160 4160 4160)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 16129 16129 16129 16129 16129 16129 16129 16129)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 16256 16256 16256 16256 16256 16256 16256 16256)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_high_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + +;; i16x8.extmul_low_i8x16_u +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28480 -28480 -28480 -28480 -28480 -28480 -28480 -28480)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28672 -28672 -28672 -28672 -28672 -28672 -28672 -28672)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28864 -28864 -28864 -28864 -28864 -28864 -28864 -28864)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32386 -32386 -32386 -32386 -32386 -32386 -32386 -32386)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32641 -32641 -32641 -32641 -32641 -32641 -32641 -32641)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32640 32640 32640 32640 32640 32640 32640 32640)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 16129 16129 16129 16129 16129 16129 16129 16129)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 16512 16512 16512 16512 16512 16512 16512 16512)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 32385 32385 32385 32385 32385 32385 32385 32385)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 32640 32640 32640 32640 32640 32640 32640 32640)) +(assert_return (invoke "i16x8.extmul_low_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) + +;; i16x8.extmul_high_i8x16_u +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63 63) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4032 4032 4032 4032 4032 4032 4032 4032)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64) + (v128.const i8x16 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64)) + (v128.const i16x8 4096 4096 4096 4096 4096 4096 4096 4096)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28480 -28480 -28480 -28480 -28480 -28480 -28480 -28480)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28672 -28672 -28672 -28672 -28672 -28672 -28672 -28672)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65 -65) + (v128.const i8x16 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64 -64)) + (v128.const i16x8 -28864 -28864 -28864 -28864 -28864 -28864 -28864 -28864)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125 125) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 125 125 125 125 125 125 125 125)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126 -126) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32386 -32386 -32386 -32386 -32386 -32386 -32386 -32386)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -32641 -32641 -32641 -32641 -32641 -32641 -32641 -32641)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 32640 32640 32640 32640 32640 32640 32640 32640)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 16129 16129 16129 16129 16129 16129 16129 16129)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128) + (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 16512 16512 16512 16512 16512 16512 16512 16512)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 32385 32385 32385 32385 32385 32385 32385 32385)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 32640 32640 32640 32640 32640 32640 32640 32640)) +(assert_return (invoke "i16x8.extmul_high_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255) + (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -511 -511 -511 -511 -511 -511 -511 -511)) + +;; type check +(assert_invalid (module (func (result v128) (i16x8.extmul_low_i8x16_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extmul_high_i8x16_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extmul_low_i8x16_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extmul_high_i8x16_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.extmul_low_i8x16_s-1st-arg-empty (result v128) + (i16x8.extmul_low_i8x16_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_low_i8x16_s-arg-empty (result v128) + (i16x8.extmul_low_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_high_i8x16_s-1st-arg-empty (result v128) + (i16x8.extmul_high_i8x16_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_high_i8x16_s-arg-empty (result v128) + (i16x8.extmul_high_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_low_i8x16_u-1st-arg-empty (result v128) + (i16x8.extmul_low_i8x16_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_low_i8x16_u-arg-empty (result v128) + (i16x8.extmul_low_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_high_i8x16_u-1st-arg-empty (result v128) + (i16x8.extmul_high_i8x16_u (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extmul_high_i8x16_u-arg-empty (result v128) + (i16x8.extmul_high_i8x16_u) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_i32x4_extmul_i16x8.wast b/test/core/simd/simd_i32x4_extmul_i16x8.wast new file mode 100644 index 0000000000..f04db6770f --- /dev/null +++ b/test/core/simd/simd_i32x4_extmul_i16x8.wast @@ -0,0 +1,404 @@ +;; Tests for i32x4 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i32x4.extmul_low_i16x8_s") (param v128 v128) (result v128) (i32x4.extmul_low_i16x8_s (local.get 0) (local.get 1))) + (func (export "i32x4.extmul_high_i16x8_s") (param v128 v128) (result v128) (i32x4.extmul_high_i16x8_s (local.get 0) (local.get 1))) + (func (export "i32x4.extmul_low_i16x8_u") (param v128 v128) (result v128) (i32x4.extmul_low_i16x8_u (local.get 0) (local.get 1))) + (func (export "i32x4.extmul_high_i16x8_u") (param v128 v128) (result v128) (i32x4.extmul_high_i16x8_u (local.get 0) (local.get 1))) +) + + +;; i32x4.extmul_low_i16x8_s +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268451840 268451840 268451840 268451840)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32765 32765 32765 32765)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 1073676289 1073676289 1073676289 1073676289)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 1073709056 1073709056 1073709056 1073709056)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_low_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 1 1 1 1)) + +;; i32x4.extmul_high_i16x8_s +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 268451840 268451840 268451840 268451840)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32765 32765 32765 32765)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 1073676289 1073676289 1073676289 1073676289)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 1073709056 1073709056 1073709056 1073709056)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_high_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 1 1 1 1)) + +;; i32x4.extmul_low_i16x8_u +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1878999040 -1878999040 -1878999040 -1878999040)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1879048192 -1879048192 -1879048192 -1879048192)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1879097344 -1879097344 -1879097344 -1879097344)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32765 32765 32765 32765)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2147385346 -2147385346 -2147385346 -2147385346)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2147450881 -2147450881 -2147450881 -2147450881)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 2147450880 2147450880 2147450880 2147450880)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 1073676289 1073676289 1073676289 1073676289)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 1073774592 1073774592 1073774592 1073774592)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 2147385345 2147385345 2147385345 2147385345)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 2147450880 2147450880 2147450880 2147450880)) +(assert_return (invoke "i32x4.extmul_low_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) + +;; i32x4.extmul_high_i16x8_u +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268419072 268419072 268419072 268419072)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i32x4 268435456 268435456 268435456 268435456)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1878999040 -1878999040 -1878999040 -1878999040)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1879048192 -1879048192 -1879048192 -1879048192)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i32x4 -1879097344 -1879097344 -1879097344 -1879097344)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32765 32765 32765 32765)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2147385346 -2147385346 -2147385346 -2147385346)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2147450881 -2147450881 -2147450881 -2147450881)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 2147450880 2147450880 2147450880 2147450880)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 1073676289 1073676289 1073676289 1073676289)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 1073774592 1073774592 1073774592 1073774592)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 2147385345 2147385345 2147385345 2147385345)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 2147450880 2147450880 2147450880 2147450880)) +(assert_return (invoke "i32x4.extmul_high_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -131071 -131071 -131071 -131071)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.extmul_low_i16x8_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extmul_high_i16x8_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extmul_low_i16x8_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extmul_high_i16x8_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.extmul_low_i16x8_s-1st-arg-empty (result v128) + (i32x4.extmul_low_i16x8_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_low_i16x8_s-arg-empty (result v128) + (i32x4.extmul_low_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_high_i16x8_s-1st-arg-empty (result v128) + (i32x4.extmul_high_i16x8_s (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_high_i16x8_s-arg-empty (result v128) + (i32x4.extmul_high_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_low_i16x8_u-1st-arg-empty (result v128) + (i32x4.extmul_low_i16x8_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_low_i16x8_u-arg-empty (result v128) + (i32x4.extmul_low_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_high_i16x8_u-1st-arg-empty (result v128) + (i32x4.extmul_high_i16x8_u (v128.const i32x4 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extmul_high_i16x8_u-arg-empty (result v128) + (i32x4.extmul_high_i16x8_u) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_i64x2_extmul_i32x4.wast b/test/core/simd/simd_i64x2_extmul_i32x4.wast new file mode 100644 index 0000000000..9259279c92 --- /dev/null +++ b/test/core/simd/simd_i64x2_extmul_i32x4.wast @@ -0,0 +1,404 @@ +;; Tests for i64x2 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i64x2.extmul_low_i32x4_s") (param v128 v128) (result v128) (i64x2.extmul_low_i32x4_s (local.get 0) (local.get 1))) + (func (export "i64x2.extmul_high_i32x4_s") (param v128 v128) (result v128) (i64x2.extmul_high_i32x4_s (local.get 0) (local.get 1))) + (func (export "i64x2.extmul_low_i32x4_u") (param v128 v128) (result v128) (i64x2.extmul_low_i32x4_u (local.get 0) (local.get 1))) + (func (export "i64x2.extmul_high_i32x4_u") (param v128 v128) (result v128) (i64x2.extmul_high_i32x4_u (local.get 0) (local.get 1))) +) + + +;; i64x2.extmul_low_i32x4_s +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921505680588800 1152921505680588800)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483645 2147483645)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 4611686014132420609 4611686014132420609)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i64x2 4611686016279904256 4611686016279904256)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_low_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i64x2 1 1)) + +;; i64x2.extmul_high_i32x4_s +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 1152921505680588800 1152921505680588800)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483645 2147483645)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 4611686014132420609 4611686014132420609)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i64x2 4611686016279904256 4611686016279904256)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_high_i32x4_s" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i64x2 1 1)) + +;; i64x2.extmul_low_i32x4_u +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -8589934591 -8589934591)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450529026703360 -8070450529026703360)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450532247928832 -8070450532247928832)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450535469154304 -8070450535469154304)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483645 2147483645)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -9223372030412324866 -9223372030412324866)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -9223372034707292161 -9223372034707292161)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 9223372034707292160 9223372034707292160)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 4611686014132420609 4611686014132420609)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i64x2 4611686020574871552 4611686020574871552)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -8589934591 -8589934591)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 9223372030412324865 9223372030412324865)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 9223372034707292160 9223372034707292160)) +(assert_return (invoke "i64x2.extmul_low_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i64x2 -8589934591 -8589934591)) + +;; i64x2.extmul_high_i32x4_u +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 0 0 0 0) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 1 1 1 1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -1 -1 -1 -1) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -8589934591 -8589934591)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 1073741823 1073741823 1073741823 1073741823) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921503533105152 1152921503533105152)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 1073741824 1073741824 1073741824 1073741824) + (v128.const i32x4 1073741824 1073741824 1073741824 1073741824)) + (v128.const i64x2 1152921504606846976 1152921504606846976)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -1073741823 -1073741823 -1073741823 -1073741823) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450529026703360 -8070450529026703360)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450532247928832 -8070450532247928832)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -1073741825 -1073741825 -1073741825 -1073741825) + (v128.const i32x4 -1073741824 -1073741824 -1073741824 -1073741824)) + (v128.const i64x2 -8070450535469154304 -8070450535469154304)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 2147483645 2147483645 2147483645 2147483645) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483645 2147483645)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483646 2147483646) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 2147483648 2147483648 2147483648 2147483648) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -2147483646 -2147483646 -2147483646 -2147483646) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -9223372030412324866 -9223372030412324866)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -9223372034707292161 -9223372034707292161)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 9223372034707292160 9223372034707292160)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 4611686014132420609 4611686014132420609)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 4611686018427387904 4611686018427387904)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648) + (v128.const i32x4 -2147483647 -2147483647 -2147483647 -2147483647)) + (v128.const i64x2 4611686020574871552 4611686020574871552)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 1 1 1 1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -1 -1 -1 -1)) + (v128.const i64x2 -8589934591 -8589934591)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 9223372030412324865 9223372030412324865)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 9223372034707292160 9223372034707292160)) +(assert_return (invoke "i64x2.extmul_high_i32x4_u" (v128.const i32x4 4294967295 4294967295 4294967295 4294967295) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) + (v128.const i64x2 -8589934591 -8589934591)) + +;; type check +(assert_invalid (module (func (result v128) (i64x2.extmul_low_i32x4_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extmul_high_i32x4_s (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extmul_low_i32x4_u (i32.const 0) (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extmul_high_i32x4_u (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i64x2.extmul_low_i32x4_s-1st-arg-empty (result v128) + (i64x2.extmul_low_i32x4_s (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_low_i32x4_s-arg-empty (result v128) + (i64x2.extmul_low_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_high_i32x4_s-1st-arg-empty (result v128) + (i64x2.extmul_high_i32x4_s (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_high_i32x4_s-arg-empty (result v128) + (i64x2.extmul_high_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_low_i32x4_u-1st-arg-empty (result v128) + (i64x2.extmul_low_i32x4_u (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_low_i32x4_u-arg-empty (result v128) + (i64x2.extmul_low_i32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_high_i32x4_u-1st-arg-empty (result v128) + (i64x2.extmul_high_i32x4_u (v128.const i64x2 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extmul_high_i32x4_u-arg-empty (result v128) + (i64x2.extmul_high_i32x4_u) + ) + ) + "type mismatch" +) + From b300c7ad34df940fa9df4e6796aa2aeb709692e9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 3 Feb 2021 12:51:12 -0800 Subject: [PATCH 293/378] [spectext] Add i64x2.all_true (#444) * [spectext] Add i64x2.all_true This instruction was accepted into the proposal in #415. * Simplify syntax/instruction bitmask --- document/core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 1 + document/core/binary/instructions.rst | 1 + document/core/syntax/instructions.rst | 9 ++------- document/core/text/instructions.rst | 1 + 5 files changed, 6 insertions(+), 7 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index ebab2f730a..5daed12112 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -474,6 +474,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~207', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 790cbe8230..46055cda99 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -422,6 +422,7 @@ Instruction Binary Opcode Type :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 19f75bac65..291cb5c889 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -672,6 +672,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& \hex{FD}~~206{:}\Bu32 &\Rightarrow& \I64X2.\VADD \\ &&|& + \hex{FD}~~207{:}\Bu32 &\Rightarrow& \I64X2.\ALLTRUE \\ &&|& \hex{FD}~~209{:}\Bu32 &\Rightarrow& \I64X2.\VSUB \\ &&|& \hex{FD}~~213{:}\Bu32 &\Rightarrow& \I64X2.\VMUL \\ \end{array} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 535d4058c6..fd0da62757 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -228,13 +228,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i32x4.}\viunop \\&&|& \K{i64x2.}\NEG \\&&|& \fshape\K{.}\vfunop \\&&|& - \K{i8x16.}\vitestop ~|~ - \K{i16x8.}\vitestop ~|~ - \K{i32x4.}\vitestop \\&&|& - \K{i8x16.}\BITMASK ~|~ - \K{i16x8.}\BITMASK ~|~ - \K{i32x4.}\BITMASK ~|~ - \K{i64x2.}\BITMASK \\&&|& + \ishape\K{.}\vitestop \\ &&|& + \ishape\K{.}\BITMASK \\ &&|& \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& \K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 1d88cf77be..0419a30752 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -701,6 +701,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& + \text{i64x2.all\_true} &\Rightarrow& \I64X2.\ALLTRUE\\ &&|& \text{i64x2.bitmask} &\Rightarrow& \I64X2.\BITMASK\\ &&|& \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& From ef06db052c2bf99b8812f169e13621eab477fa5e Mon Sep 17 00:00:00 2001 From: Zhi An Ng Date: Mon, 11 Jan 2021 07:11:13 +0000 Subject: [PATCH 294/378] Implement i64x2.bitmask (#368) This was accepted into this proposal in #410. --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 +-- test/core/simd/simd_boolean.wast | 7 +++++++ 7 files changed, 13 insertions(+), 2 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index e1764be68a..8238a93c30 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -395,6 +395,7 @@ let simd_prefix s = | 0xbfl -> i32x4_extmul_high_i16x8_u | 0xc0l -> i64x2_eq | 0xc1l -> i64x2_neg + | 0xc4l -> i64x2_bitmask | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 662b0bd5ad..3fee6eaaeb 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -622,6 +622,7 @@ let encode m = | SimdBitmask Simd.I8x16 -> simd_op 0x64l | SimdBitmask Simd.I16x8 -> simd_op 0x84l | SimdBitmask Simd.I32x4 -> simd_op 0xa4l + | SimdBitmask Simd.I64x2 -> simd_op 0xc4l | SimdBitmask (_) -> assert false | _ -> assert false diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 6ab68766f3..a5745af752 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -233,6 +233,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | Simd.I8x16 -> SXX.I8x16.bitmask | Simd.I16x8 -> SXX.I16x8.bitmask | Simd.I32x4 -> SXX.I32x4.bitmask + | Simd.I64x2 -> SXX.I64x2.bitmask | _ -> assert false in I32 (f (of_value 1 v)) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 936c0f791b..7ad59a8d34 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -390,6 +390,7 @@ let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) +let i64x2_bitmask = SimdBitmask Simd.I64x2 let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub)) let i64x2_mul = Binary (V128 V128Op.(I64x2 Mul)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index cb53033c7f..c20515a1e6 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -406,6 +406,7 @@ struct | Simd.I8x16 -> "i8x16.bitmask" | Simd.I16x8 -> "i16x8.bitmask" | Simd.I32x4 -> "i32x4.bitmask" + | Simd.I64x2 -> "i64x2.bitmask" | _ -> assert false end diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 9058de5038..04707f059b 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -536,8 +536,7 @@ rule token = parse { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } | (simd_int_shape as s)".bitmask" - { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - UNARY (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask unreachable) } + { UNARY (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } | (simd_int_shape as s)".shl" { SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } | (simd_int_shape as s)".shr_s" diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 3fee25207c..8eb0c87194 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -12,6 +12,8 @@ (func (export "i32x4.any_true") (param $0 v128) (result i32) (v128.any_true (local.get $0))) (func (export "i32x4.all_true") (param $0 v128) (result i32) (i32x4.all_true (local.get $0))) (func (export "i32x4.bitmask") (param $0 v128) (result i32) (i32x4.bitmask (local.get $0))) + + (func (export "i64x2.bitmask") (param $0 v128) (result i32) (i64x2.bitmask (local.get $0))) ) ;; i8x16 @@ -156,6 +158,11 @@ (assert_return (invoke "i32x4.bitmask" (v128.const i32x4 -1 0 1 0xF)) (i32.const 0x00000001)) +(assert_return (invoke "i64x2.bitmask" (v128.const i64x2 0xFFFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF)) + (i32.const 0x00000003)) +(assert_return (invoke "i64x2.bitmask" (v128.const i64x2 -1 0xF)) + (i32.const 0x00000001)) + ;; Combination (module (memory 1) From 25f9d41609b657699e485074e2ea123babe77130 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Thu, 4 Feb 2021 12:02:01 -0800 Subject: [PATCH 295/378] i8x16.popcnt instruction (#379) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/SIMD.md | 9 +++++++++ 3 files changed, 11 insertions(+) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index afc842eeae..d78f5a56b6 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -258,3 +258,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - | | `f32x4.demote_f64x2_zero` | `TBD`| - | | `f64x2.promote_low_f32x4` | `TBD`| - | +| `i8x16.popcnt` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 12edefe67d..443fee80cb 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -226,6 +226,7 @@ | `i32x4.trunc_sat_f64x2_u_zero` | | | | | | | `f32x4.demote_f64x2_zero` | | | | | | | `f64x2.promote_low_f32x4` | | | | | | +| `i8x16.popcnt` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 907b1795be..b8451a9b36 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -662,6 +662,15 @@ Note that the normal WebAssembly `select` instruction also works with vector types. It selects between two whole vectors controlled by a single scalar value, rather than selecting bits controlled by a control mask vector. +### Lane-wise Population Count +* `i8x16.popcnt(v: v128) -> v128` + +Count the number of bits set to one within each lane. + +```python +def S.popcnt(v): + return S.lanewise_unary(popcnt, v) +``` ## Boolean horizontal reductions From b6ca6b2d1dca751d55868144da28d24d6af29891 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Thu, 4 Feb 2021 12:11:18 -0800 Subject: [PATCH 296/378] Extended pairwise addition instructions (#380) --- proposals/simd/BinarySIMD.md | 462 +++++++++++++------------ proposals/simd/ImplementationStatus.md | 462 +++++++++++++------------ proposals/simd/SIMD.md | 21 ++ 3 files changed, 487 insertions(+), 458 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index d78f5a56b6..4bf69d7eae 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -30,232 +30,236 @@ In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byt For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). -| Instruction | `simdop` | Immediate operands | -| -------------------------------|---------:|--------------------------| -| `v128.load` | `0x00`| m:memarg | -| `v128.load8x8_s` | `0x01`| m:memarg | -| `v128.load8x8_u` | `0x02`| m:memarg | -| `v128.load16x4_s` | `0x03`| m:memarg | -| `v128.load16x4_u` | `0x04`| m:memarg | -| `v128.load32x2_s` | `0x05`| m:memarg | -| `v128.load32x2_u` | `0x06`| m:memarg | -| `v128.load8_splat` | `0x07`| m:memarg | -| `v128.load16_splat` | `0x08`| m:memarg | -| `v128.load32_splat` | `0x09`| m:memarg | -| `v128.load64_splat` | `0x0a`| m:memarg | -| `v128.store` | `0x0b`| m:memarg | -| `v128.const` | `0x0c`| i:ImmByte[16] | -| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | -| `i8x16.swizzle` | `0x0e`| - | -| `i8x16.splat` | `0x0f`| - | -| `i16x8.splat` | `0x10`| - | -| `i32x4.splat` | `0x11`| - | -| `i64x2.splat` | `0x12`| - | -| `f32x4.splat` | `0x13`| - | -| `f64x2.splat` | `0x14`| - | -| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | -| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | -| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | -| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | -| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | -| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | -| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | -| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | -| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | -| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | -| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | -| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | -| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | -| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | -| `i8x16.eq` | `0x23`| - | -| `i8x16.ne` | `0x24`| - | -| `i8x16.lt_s` | `0x25`| - | -| `i8x16.lt_u` | `0x26`| - | -| `i8x16.gt_s` | `0x27`| - | -| `i8x16.gt_u` | `0x28`| - | -| `i8x16.le_s` | `0x29`| - | -| `i8x16.le_u` | `0x2a`| - | -| `i8x16.ge_s` | `0x2b`| - | -| `i8x16.ge_u` | `0x2c`| - | -| `i16x8.eq` | `0x2d`| - | -| `i16x8.ne` | `0x2e`| - | -| `i16x8.lt_s` | `0x2f`| - | -| `i16x8.lt_u` | `0x30`| - | -| `i16x8.gt_s` | `0x31`| - | -| `i16x8.gt_u` | `0x32`| - | -| `i16x8.le_s` | `0x33`| - | -| `i16x8.le_u` | `0x34`| - | -| `i16x8.ge_s` | `0x35`| - | -| `i16x8.ge_u` | `0x36`| - | -| `i32x4.eq` | `0x37`| - | -| `i32x4.ne` | `0x38`| - | -| `i32x4.lt_s` | `0x39`| - | -| `i32x4.lt_u` | `0x3a`| - | -| `i32x4.gt_s` | `0x3b`| - | -| `i32x4.gt_u` | `0x3c`| - | -| `i32x4.le_s` | `0x3d`| - | -| `i32x4.le_u` | `0x3e`| - | -| `i32x4.ge_s` | `0x3f`| - | -| `i32x4.ge_u` | `0x40`| - | -| `f32x4.eq` | `0x41`| - | -| `f32x4.ne` | `0x42`| - | -| `f32x4.lt` | `0x43`| - | -| `f32x4.gt` | `0x44`| - | -| `f32x4.le` | `0x45`| - | -| `f32x4.ge` | `0x46`| - | -| `f64x2.eq` | `0x47`| - | -| `f64x2.ne` | `0x48`| - | -| `f64x2.lt` | `0x49`| - | -| `f64x2.gt` | `0x4a`| - | -| `f64x2.le` | `0x4b`| - | -| `f64x2.ge` | `0x4c`| - | -| `v128.not` | `0x4d`| - | -| `v128.and` | `0x4e`| - | -| `v128.andnot` | `0x4f`| - | -| `v128.or` | `0x50`| - | -| `v128.xor` | `0x51`| - | -| `v128.bitselect` | `0x52`| - | -| `i8x16.abs` | `0x60`| - | -| `i8x16.neg` | `0x61`| - | -| `i8x16.all_true` | `0x63`| - | -| `i8x16.bitmask` | `0x64`| - | -| `i8x16.narrow_i16x8_s` | `0x65`| - | -| `i8x16.narrow_i16x8_u` | `0x66`| - | -| `i8x16.shl` | `0x6b`| - | -| `i8x16.shr_s` | `0x6c`| - | -| `i8x16.shr_u` | `0x6d`| - | -| `i8x16.add` | `0x6e`| - | -| `i8x16.add_sat_s` | `0x6f`| - | -| `i8x16.add_sat_u` | `0x70`| - | -| `i8x16.sub` | `0x71`| - | -| `i8x16.sub_sat_s` | `0x72`| - | -| `i8x16.sub_sat_u` | `0x73`| - | -| `i8x16.min_s` | `0x76`| - | -| `i8x16.min_u` | `0x77`| - | -| `i8x16.max_s` | `0x78`| - | -| `i8x16.max_u` | `0x79`| - | -| `i8x16.avgr_u` | `0x7b`| - | -| `i16x8.abs` | `0x80`| - | -| `i16x8.neg` | `0x81`| - | -| `i16x8.all_true` | `0x83`| - | -| `i16x8.bitmask` | `0x84`| - | -| `i16x8.narrow_i32x4_s` | `0x85`| - | -| `i16x8.narrow_i32x4_u` | `0x86`| - | -| `i16x8.widen_low_i8x16_s` | `0x87`| - | -| `i16x8.widen_high_i8x16_s` | `0x88`| - | -| `i16x8.widen_low_i8x16_u` | `0x89`| - | -| `i16x8.widen_high_i8x16_u` | `0x8a`| - | -| `i16x8.shl` | `0x8b`| - | -| `i16x8.shr_s` | `0x8c`| - | -| `i16x8.shr_u` | `0x8d`| - | -| `i16x8.add` | `0x8e`| - | -| `i16x8.add_sat_s` | `0x8f`| - | -| `i16x8.add_sat_u` | `0x90`| - | -| `i16x8.sub` | `0x91`| - | -| `i16x8.sub_sat_s` | `0x92`| - | -| `i16x8.sub_sat_u` | `0x93`| - | -| `i16x8.mul` | `0x95`| - | -| `i16x8.min_s` | `0x96`| - | -| `i16x8.min_u` | `0x97`| - | -| `i16x8.max_s` | `0x98`| - | -| `i16x8.max_u` | `0x99`| - | -| `i16x8.avgr_u` | `0x9b`| - | -| `i32x4.abs` | `0xa0`| - | -| `i32x4.neg` | `0xa1`| - | -| `i32x4.all_true` | `0xa3`| - | -| `i32x4.bitmask` | `0xa4`| - | -| `i32x4.widen_low_i16x8_s` | `0xa7`| - | -| `i32x4.widen_high_i16x8_s` | `0xa8`| - | -| `i32x4.widen_low_i16x8_u` | `0xa9`| - | -| `i32x4.widen_high_i16x8_u` | `0xaa`| - | -| `i32x4.shl` | `0xab`| - | -| `i32x4.shr_s` | `0xac`| - | -| `i32x4.shr_u` | `0xad`| - | -| `i32x4.add` | `0xae`| - | -| `i32x4.sub` | `0xb1`| - | -| `i32x4.mul` | `0xb5`| - | -| `i32x4.min_s` | `0xb6`| - | -| `i32x4.min_u` | `0xb7`| - | -| `i32x4.max_s` | `0xb8`| - | -| `i32x4.max_u` | `0xb9`| - | -| `i32x4.dot_i16x8_s` | `0xba`| - | -| `i64x2.neg` | `0xc1`| - | -| `i64x2.bitmask` | `0xc4`| - | -| `i64x2.widen_low_i32x4_s` | `0xc7`| - | -| `i64x2.widen_high_i32x4_s` | `0xc8`| - | -| `i64x2.widen_low_i32x4_u` | `0xc9`| - | -| `i64x2.widen_high_i32x4_u` | `0xca`| - | -| `i64x2.shl` | `0xcb`| - | -| `i64x2.shr_s` | `0xcc`| - | -| `i64x2.shr_u` | `0xcd`| - | -| `i64x2.add` | `0xce`| - | -| `i64x2.sub` | `0xd1`| - | -| `i64x2.mul` | `0xd5`| - | -| `f32x4.ceil` | `0xd8`| - | -| `f32x4.floor` | `0xd9`| - | -| `f32x4.trunc` | `0xda`| - | -| `f32x4.nearest` | `0xdb`| - | -| `f64x2.ceil` | `0xdc`| - | -| `f64x2.floor` | `0xdd`| - | -| `f64x2.trunc` | `0xde`| - | -| `f64x2.nearest` | `0xdf`| - | -| `f32x4.abs` | `0xe0`| - | -| `f32x4.neg` | `0xe1`| - | -| `f32x4.sqrt` | `0xe3`| - | -| `f32x4.add` | `0xe4`| - | -| `f32x4.sub` | `0xe5`| - | -| `f32x4.mul` | `0xe6`| - | -| `f32x4.div` | `0xe7`| - | -| `f32x4.min` | `0xe8`| - | -| `f32x4.max` | `0xe9`| - | -| `f32x4.pmin` | `0xea`| - | -| `f32x4.pmax` | `0xeb`| - | -| `f64x2.abs` | `0xec`| - | -| `f64x2.neg` | `0xed`| - | -| `f64x2.sqrt` | `0xef`| - | -| `f64x2.add` | `0xf0`| - | -| `f64x2.sub` | `0xf1`| - | -| `f64x2.mul` | `0xf2`| - | -| `f64x2.div` | `0xf3`| - | -| `f64x2.min` | `0xf4`| - | -| `f64x2.max` | `0xf5`| - | -| `f64x2.pmin` | `0xf6`| - | -| `f64x2.pmax` | `0xf7`| - | -| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | -| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | -| `f32x4.convert_i32x4_s` | `0xfa`| - | -| `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0xfc`| - | -| `v128.load64_zero` | `0xfd`| - | -| `i16x8.extmul_low_i8x16_s` | `0x110`| - | -| `i16x8.extmul_high_i8x16_s` | `0x111`| - | -| `i16x8.extmul_low_i8x16_u` | `0x112`| - | -| `i16x8.extmul_high_i8x16_u` | `0x113`| - | -| `i32x4.extmul_low_i16x8_s` | `0x114`| - | -| `i32x4.extmul_high_i16x8_s` | `0x115`| - | -| `i32x4.extmul_low_i16x8_u` | `0x116`| - | -| `i32x4.extmul_high_i16x8_u` | `0x117`| - | -| `i64x2.extmul_low_i32x4_s` | `0x118`| - | -| `i64x2.extmul_high_i32x4_s` | `0x119`| - | -| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | -| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | -| `i16x8.q15mulr_sat_s` | `TBD`| - | -| `v128.any_true` | `TBD`| - | -| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `i64x2.eq` | `TBD`| - | -| `i64x2.ne` | `TBD`| - | -| `i64x2.all_true` | `TBD`| - | -| `f64x2.convert_low_i32x4_s` | `TBD`| - | -| `f64x2.convert_low_i32x4_u` | `TBD`| - | -| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - | -| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - | -| `f32x4.demote_f64x2_zero` | `TBD`| - | -| `f64x2.promote_low_f32x4` | `TBD`| - | -| `i8x16.popcnt` | `TBD`| - | +| Instruction | `simdop` | Immediate operands | +| --------------------------------|---------:|--------------------------| +| `v128.load` | `0x00`| m:memarg | +| `v128.load8x8_s` | `0x01`| m:memarg | +| `v128.load8x8_u` | `0x02`| m:memarg | +| `v128.load16x4_s` | `0x03`| m:memarg | +| `v128.load16x4_u` | `0x04`| m:memarg | +| `v128.load32x2_s` | `0x05`| m:memarg | +| `v128.load32x2_u` | `0x06`| m:memarg | +| `v128.load8_splat` | `0x07`| m:memarg | +| `v128.load16_splat` | `0x08`| m:memarg | +| `v128.load32_splat` | `0x09`| m:memarg | +| `v128.load64_splat` | `0x0a`| m:memarg | +| `v128.store` | `0x0b`| m:memarg | +| `v128.const` | `0x0c`| i:ImmByte[16] | +| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] | +| `i8x16.swizzle` | `0x0e`| - | +| `i8x16.splat` | `0x0f`| - | +| `i16x8.splat` | `0x10`| - | +| `i32x4.splat` | `0x11`| - | +| `i64x2.splat` | `0x12`| - | +| `f32x4.splat` | `0x13`| - | +| `f64x2.splat` | `0x14`| - | +| `i8x16.extract_lane_s` | `0x15`| i:ImmLaneIdx16 | +| `i8x16.extract_lane_u` | `0x16`| i:ImmLaneIdx16 | +| `i8x16.replace_lane` | `0x17`| i:ImmLaneIdx16 | +| `i16x8.extract_lane_s` | `0x18`| i:ImmLaneIdx8 | +| `i16x8.extract_lane_u` | `0x19`| i:ImmLaneIdx8 | +| `i16x8.replace_lane` | `0x1a`| i:ImmLaneIdx8 | +| `i32x4.extract_lane` | `0x1b`| i:ImmLaneIdx4 | +| `i32x4.replace_lane` | `0x1c`| i:ImmLaneIdx4 | +| `i64x2.extract_lane` | `0x1d`| i:ImmLaneIdx2 | +| `i64x2.replace_lane` | `0x1e`| i:ImmLaneIdx2 | +| `f32x4.extract_lane` | `0x1f`| i:ImmLaneIdx4 | +| `f32x4.replace_lane` | `0x20`| i:ImmLaneIdx4 | +| `f64x2.extract_lane` | `0x21`| i:ImmLaneIdx2 | +| `f64x2.replace_lane` | `0x22`| i:ImmLaneIdx2 | +| `i8x16.eq` | `0x23`| - | +| `i8x16.ne` | `0x24`| - | +| `i8x16.lt_s` | `0x25`| - | +| `i8x16.lt_u` | `0x26`| - | +| `i8x16.gt_s` | `0x27`| - | +| `i8x16.gt_u` | `0x28`| - | +| `i8x16.le_s` | `0x29`| - | +| `i8x16.le_u` | `0x2a`| - | +| `i8x16.ge_s` | `0x2b`| - | +| `i8x16.ge_u` | `0x2c`| - | +| `i16x8.eq` | `0x2d`| - | +| `i16x8.ne` | `0x2e`| - | +| `i16x8.lt_s` | `0x2f`| - | +| `i16x8.lt_u` | `0x30`| - | +| `i16x8.gt_s` | `0x31`| - | +| `i16x8.gt_u` | `0x32`| - | +| `i16x8.le_s` | `0x33`| - | +| `i16x8.le_u` | `0x34`| - | +| `i16x8.ge_s` | `0x35`| - | +| `i16x8.ge_u` | `0x36`| - | +| `i32x4.eq` | `0x37`| - | +| `i32x4.ne` | `0x38`| - | +| `i32x4.lt_s` | `0x39`| - | +| `i32x4.lt_u` | `0x3a`| - | +| `i32x4.gt_s` | `0x3b`| - | +| `i32x4.gt_u` | `0x3c`| - | +| `i32x4.le_s` | `0x3d`| - | +| `i32x4.le_u` | `0x3e`| - | +| `i32x4.ge_s` | `0x3f`| - | +| `i32x4.ge_u` | `0x40`| - | +| `f32x4.eq` | `0x41`| - | +| `f32x4.ne` | `0x42`| - | +| `f32x4.lt` | `0x43`| - | +| `f32x4.gt` | `0x44`| - | +| `f32x4.le` | `0x45`| - | +| `f32x4.ge` | `0x46`| - | +| `f64x2.eq` | `0x47`| - | +| `f64x2.ne` | `0x48`| - | +| `f64x2.lt` | `0x49`| - | +| `f64x2.gt` | `0x4a`| - | +| `f64x2.le` | `0x4b`| - | +| `f64x2.ge` | `0x4c`| - | +| `v128.not` | `0x4d`| - | +| `v128.and` | `0x4e`| - | +| `v128.andnot` | `0x4f`| - | +| `v128.or` | `0x50`| - | +| `v128.xor` | `0x51`| - | +| `v128.bitselect` | `0x52`| - | +| `i8x16.abs` | `0x60`| - | +| `i8x16.neg` | `0x61`| - | +| `i8x16.all_true` | `0x63`| - | +| `i8x16.bitmask` | `0x64`| - | +| `i8x16.narrow_i16x8_s` | `0x65`| - | +| `i8x16.narrow_i16x8_u` | `0x66`| - | +| `i8x16.shl` | `0x6b`| - | +| `i8x16.shr_s` | `0x6c`| - | +| `i8x16.shr_u` | `0x6d`| - | +| `i8x16.add` | `0x6e`| - | +| `i8x16.add_sat_s` | `0x6f`| - | +| `i8x16.add_sat_u` | `0x70`| - | +| `i8x16.sub` | `0x71`| - | +| `i8x16.sub_sat_s` | `0x72`| - | +| `i8x16.sub_sat_u` | `0x73`| - | +| `i8x16.min_s` | `0x76`| - | +| `i8x16.min_u` | `0x77`| - | +| `i8x16.max_s` | `0x78`| - | +| `i8x16.max_u` | `0x79`| - | +| `i8x16.avgr_u` | `0x7b`| - | +| `i16x8.abs` | `0x80`| - | +| `i16x8.neg` | `0x81`| - | +| `i16x8.all_true` | `0x83`| - | +| `i16x8.bitmask` | `0x84`| - | +| `i16x8.narrow_i32x4_s` | `0x85`| - | +| `i16x8.narrow_i32x4_u` | `0x86`| - | +| `i16x8.widen_low_i8x16_s` | `0x87`| - | +| `i16x8.widen_high_i8x16_s` | `0x88`| - | +| `i16x8.widen_low_i8x16_u` | `0x89`| - | +| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.shl` | `0x8b`| - | +| `i16x8.shr_s` | `0x8c`| - | +| `i16x8.shr_u` | `0x8d`| - | +| `i16x8.add` | `0x8e`| - | +| `i16x8.add_sat_s` | `0x8f`| - | +| `i16x8.add_sat_u` | `0x90`| - | +| `i16x8.sub` | `0x91`| - | +| `i16x8.sub_sat_s` | `0x92`| - | +| `i16x8.sub_sat_u` | `0x93`| - | +| `i16x8.mul` | `0x95`| - | +| `i16x8.min_s` | `0x96`| - | +| `i16x8.min_u` | `0x97`| - | +| `i16x8.max_s` | `0x98`| - | +| `i16x8.max_u` | `0x99`| - | +| `i16x8.avgr_u` | `0x9b`| - | +| `i32x4.abs` | `0xa0`| - | +| `i32x4.neg` | `0xa1`| - | +| `i32x4.all_true` | `0xa3`| - | +| `i32x4.bitmask` | `0xa4`| - | +| `i32x4.widen_low_i16x8_s` | `0xa7`| - | +| `i32x4.widen_high_i16x8_s` | `0xa8`| - | +| `i32x4.widen_low_i16x8_u` | `0xa9`| - | +| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.shl` | `0xab`| - | +| `i32x4.shr_s` | `0xac`| - | +| `i32x4.shr_u` | `0xad`| - | +| `i32x4.add` | `0xae`| - | +| `i32x4.sub` | `0xb1`| - | +| `i32x4.mul` | `0xb5`| - | +| `i32x4.min_s` | `0xb6`| - | +| `i32x4.min_u` | `0xb7`| - | +| `i32x4.max_s` | `0xb8`| - | +| `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | +| `i64x2.neg` | `0xc1`| - | +| `i64x2.bitmask` | `0xc4`| - | +| `i64x2.widen_low_i32x4_s` | `0xc7`| - | +| `i64x2.widen_high_i32x4_s` | `0xc8`| - | +| `i64x2.widen_low_i32x4_u` | `0xc9`| - | +| `i64x2.widen_high_i32x4_u` | `0xca`| - | +| `i64x2.shl` | `0xcb`| - | +| `i64x2.shr_s` | `0xcc`| - | +| `i64x2.shr_u` | `0xcd`| - | +| `i64x2.add` | `0xce`| - | +| `i64x2.sub` | `0xd1`| - | +| `i64x2.mul` | `0xd5`| - | +| `f32x4.ceil` | `0xd8`| - | +| `f32x4.floor` | `0xd9`| - | +| `f32x4.trunc` | `0xda`| - | +| `f32x4.nearest` | `0xdb`| - | +| `f64x2.ceil` | `0xdc`| - | +| `f64x2.floor` | `0xdd`| - | +| `f64x2.trunc` | `0xde`| - | +| `f64x2.nearest` | `0xdf`| - | +| `f32x4.abs` | `0xe0`| - | +| `f32x4.neg` | `0xe1`| - | +| `f32x4.sqrt` | `0xe3`| - | +| `f32x4.add` | `0xe4`| - | +| `f32x4.sub` | `0xe5`| - | +| `f32x4.mul` | `0xe6`| - | +| `f32x4.div` | `0xe7`| - | +| `f32x4.min` | `0xe8`| - | +| `f32x4.max` | `0xe9`| - | +| `f32x4.pmin` | `0xea`| - | +| `f32x4.pmax` | `0xeb`| - | +| `f64x2.abs` | `0xec`| - | +| `f64x2.neg` | `0xed`| - | +| `f64x2.sqrt` | `0xef`| - | +| `f64x2.add` | `0xf0`| - | +| `f64x2.sub` | `0xf1`| - | +| `f64x2.mul` | `0xf2`| - | +| `f64x2.div` | `0xf3`| - | +| `f64x2.min` | `0xf4`| - | +| `f64x2.max` | `0xf5`| - | +| `f64x2.pmin` | `0xf6`| - | +| `f64x2.pmax` | `0xf7`| - | +| `i32x4.trunc_sat_f32x4_s` | `0xf8`| - | +| `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | +| `f32x4.convert_i32x4_s` | `0xfa`| - | +| `f32x4.convert_i32x4_u` | `0xfb`| - | +| `v128.load32_zero` | `0xfc`| - | +| `v128.load64_zero` | `0xfd`| - | +| `i16x8.extmul_low_i8x16_s` | `0x110`| - | +| `i16x8.extmul_high_i8x16_s` | `0x111`| - | +| `i16x8.extmul_low_i8x16_u` | `0x112`| - | +| `i16x8.extmul_high_i8x16_u` | `0x113`| - | +| `i32x4.extmul_low_i16x8_s` | `0x114`| - | +| `i32x4.extmul_high_i16x8_s` | `0x115`| - | +| `i32x4.extmul_low_i16x8_u` | `0x116`| - | +| `i32x4.extmul_high_i16x8_u` | `0x117`| - | +| `i64x2.extmul_low_i32x4_s` | `0x118`| - | +| `i64x2.extmul_high_i32x4_s` | `0x119`| - | +| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | +| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | +| `i16x8.q15mulr_sat_s` | `TBD`| - | +| `v128.any_true` | `TBD`| - | +| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | +| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | +| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | +| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | +| `i64x2.eq` | `TBD`| - | +| `i64x2.ne` | `TBD`| - | +| `i64x2.all_true` | `TBD`| - | +| `f64x2.convert_low_i32x4_s` | `TBD`| - | +| `f64x2.convert_low_i32x4_u` | `TBD`| - | +| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - | +| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - | +| `f32x4.demote_f64x2_zero` | `TBD`| - | +| `f64x2.promote_low_f32x4` | `TBD`| - | +| `i8x16.popcnt` | `TBD`| - | +| `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - | +| `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - | +| `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - | +| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - | \ No newline at end of file diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 443fee80cb..69451b3135 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -1,232 +1,236 @@ -| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | -| -------------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| -| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.lt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.gt_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.le_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.ge_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.eq` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ne` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.lt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.gt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.le` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.ge` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.not` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.and` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.andnot` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.or` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.xor` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.bitselect` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i8x16.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.add_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.sub_sat_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.q15mulr_sat_s` | | | | | | -| `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.min_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.eq` | | | | | | -| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | | | | | | -| `i64x2.bitmask` | | :heavy_check_mark: | | | | -| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.widen_low_i32x4_s` | | | | | | -| `i64x2.widen_high_i32x4_s` | | | | | | -| `i64x2.widen_low_i32x4_u` | | | | | | -| `i64x2.widen_high_i32x4_u` | | | | | | -| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | -| `v128.any_true` | | | | | | -| `v128.load8_lane` | | | | | | -| `v128.load16_lane` | | | | | | -| `v128.load32_lane` | | | | | | -| `v128.load64_lane` | | | | | | -| `v128.store8_lane` | | | | | | -| `v128.store16_lane` | | | | | | -| `v128.store32_lane` | | | | | | -| `v128.store64_lane` | | | | | | -| `i64x2.ne` | | | | | | -| `f64x2.convert_low_i32x4_s` | | | | | | -| `f64x2.convert_low_i32x4_u` | | | | | | -| `i32x4.trunc_sat_f64x2_s_zero` | | | | | | -| `i32x4.trunc_sat_f64x2_u_zero` | | | | | | -| `f32x4.demote_f64x2_zero` | | | | | | -| `f64x2.promote_low_f32x4` | | | | | | -| `i8x16.popcnt` | | | | | | +| Instruction | LLVM[1] | V8[2] | WAVM[3] | ChakraCore[4] | SpiderMonkey[5] | +| --------------------------------|---------------------------|--------------------|--------------------|--------------------|--------------------| +| `v128.load` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.load8x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32x2_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i8x16.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.extract_lane_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.extract_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i64x2.replace_lane` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.extract_lane` | `-msimd128` | :heavy_check_mark: | | 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| +| `f32x4.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.mul` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.div` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.min` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.max` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f64x2.pmin` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.pmax` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.ceil` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.floor` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.trunc` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.nearest` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `i32x4.trunc_sat_f32x4_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | +| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | +| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | +| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | +| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | +| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | +| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | +| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | +| `v128.any_true` | | | | | | +| `v128.load8_lane` | | | | | | +| `v128.load16_lane` | | | | | | +| `v128.load32_lane` | | | | | | +| `v128.load64_lane` | | | | | | +| `v128.store8_lane` | | | | | | +| `v128.store16_lane` | | | | | | +| `v128.store32_lane` | | | | | | +| `v128.store64_lane` | | | | | | +| `i64x2.ne` | | | | | | +| `f64x2.convert_low_i32x4_s` | | | | | | +| `f64x2.convert_low_i32x4_u` | | | | | | +| `i32x4.trunc_sat_f64x2_s_zero` | | | | | | +| `i32x4.trunc_sat_f64x2_u_zero` | | | | | | +| `f32x4.demote_f64x2_zero` | | | | | | +| `f64x2.promote_low_f32x4` | | | | | | +| `i8x16.popcnt` | | | | | | +| `i16x8.extadd_pairwise_i8x16_s` | | | | | | +| `i16x8.extadd_pairwise_i8x16_u` | | | | | | +| `i32x4.extadd_pairwise_i16x8_s` | | | | | | +| `i32x4.extadd_pairwise_i16x8_u` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index b8451a9b36..c189f3c62a 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -448,6 +448,27 @@ These instructions provide a more performant equivalent to the following composi - `i64x2.extmul_low_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_low_i32x4_u(a), i64x2.widen_low_i32x4_u(b))`. - `i64x2.extmul_high_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_high_i32x4_u(a), i64x2.widen_high_i32x4_u(b))`. +### Extended pairwise integer addition +* `i16x8.extadd_pairwise_i8x16_s(a: v128) -> v128` +* `i16x8.extadd_pairwise_i8x16_u(a: v128) -> v128` +* `i32x4.extadd_pairwise_i16x8_s(a: v128) -> v128` +* `i32x4.extadd_pairwise_i16x8_u(a: v128) -> v128` + +Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs). + +```python +def S.extadd_pairwise_T(ext, a): + result = S.New() + for i in range(S.Lanes): + result[i] = ext(a[i*2]) + ext(a[i*2+1]) + +def S.extadd_pairwise_T_s(a): + return S.extadd_pairwise_T(Sext, a) + +def S.extadd_pairwise_T_u(a): + return S.extadd_pairwise_T(Zext, a) +``` + ## Saturating integer arithmetic Saturating integer arithmetic behaves differently on signed and unsigned lanes. From c69b8ef390da0a974fafafd6665afdaeae7d7cbc Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 5 Feb 2021 12:09:18 -0800 Subject: [PATCH 297/378] i64x2.gt_s, i64x2.lt_s, i64x2.ge_s, and i64x2.le_s instructions (#412) --- proposals/simd/BinarySIMD.md | 6 +++++- proposals/simd/ImplementationStatus.md | 4 ++++ proposals/simd/SIMD.md | 4 ++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 4bf69d7eae..5363ef5c85 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -251,6 +251,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | | `i64x2.eq` | `TBD`| - | | `i64x2.ne` | `TBD`| - | +| `i64x2.lt_s` | `TBD`| - | +| `i64x2.gt_s` | `TBD`| - | +| `i64x2.le_s` | `TBD`| - | +| `i64x2.ge_s` | `TBD`| - | | `i64x2.all_true` | `TBD`| - | | `f64x2.convert_low_i32x4_s` | `TBD`| - | | `f64x2.convert_low_i32x4_u` | `TBD`| - | @@ -262,4 +266,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - | | `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - | | `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - | -| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - | \ No newline at end of file +| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 69451b3135..b03ae4f8a5 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -231,6 +231,10 @@ | `i16x8.extadd_pairwise_i8x16_u` | | | | | | | `i32x4.extadd_pairwise_i16x8_s` | | | | | | | `i32x4.extadd_pairwise_i16x8_u` | | | | | | +| `i64x2.lt_s` | | | | | | +| `i64x2.gt_s` | | | | | | +| `i64x2.le_s` | | | | | | +| `i64x2.ge_s` | | | | | | [1] Tip of tree LLVM as of May 20, 2020 diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index c189f3c62a..e7634f835d 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -787,6 +787,7 @@ def S.ne(a, b): * `i16x8.lt_u(a: v128, b: v128) -> v128` * `i32x4.lt_s(a: v128, b: v128) -> v128` * `i32x4.lt_u(a: v128, b: v128) -> v128` +* `i64x2.lt_s(a: v128, b: v128) -> v128` * `f32x4.lt(a: v128, b: v128) -> v128` * `f64x2.lt(a: v128, b: v128) -> v128` @@ -797,6 +798,7 @@ def S.ne(a, b): * `i16x8.le_u(a: v128, b: v128) -> v128` * `i32x4.le_s(a: v128, b: v128) -> v128` * `i32x4.le_u(a: v128, b: v128) -> v128` +* `i64x2.le_s(a: v128, b: v128) -> v128` * `f32x4.le(a: v128, b: v128) -> v128` * `f64x2.le(a: v128, b: v128) -> v128` @@ -807,6 +809,7 @@ def S.ne(a, b): * `i16x8.gt_u(a: v128, b: v128) -> v128` * `i32x4.gt_s(a: v128, b: v128) -> v128` * `i32x4.gt_u(a: v128, b: v128) -> v128` +* `i64x2.gt_s(a: v128, b: v128) -> v128` * `f32x4.gt(a: v128, b: v128) -> v128` * `f64x2.gt(a: v128, b: v128) -> v128` @@ -817,6 +820,7 @@ def S.ne(a, b): * `i16x8.ge_u(a: v128, b: v128) -> v128` * `i32x4.ge_s(a: v128, b: v128) -> v128` * `i32x4.ge_u(a: v128, b: v128) -> v128` +* `i64x2.ge_s(a: v128, b: v128) -> v128` * `f32x4.ge(a: v128, b: v128) -> v128` * `f64x2.ge(a: v128, b: v128) -> v128` From 961edc461e182ba709fd6ca5637fc788da84b7e2 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Fri, 5 Feb 2021 12:17:50 -0800 Subject: [PATCH 298/378] i64x2.abs instruction (#413) --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 1 + proposals/simd/NewOpcodes.md | 2 +- proposals/simd/SIMD.md | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 5363ef5c85..c1cc39cdf9 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -179,6 +179,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.max_s` | `0xb8`| - | | `i32x4.max_u` | `0xb9`| - | | `i32x4.dot_i16x8_s` | `0xba`| - | +| `i64x2.abs` | `0xc0`| - | | `i64x2.neg` | `0xc1`| - | | `i64x2.bitmask` | `0xc4`| - | | `i64x2.widen_low_i32x4_s` | `0xc7`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index b03ae4f8a5..32513d1e1c 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,6 +149,7 @@ | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.eq` | | | | | | +| `i64x2.abs` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.all_true` | | | | | | | `i64x2.bitmask` | | :heavy_check_mark: | | | | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index 81f21e69ff..fd3646e3f2 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -80,7 +80,7 @@ | i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | | -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ | -| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | ------------- | 0xc0 | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 | | i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | | ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 | | i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | (i64x2.all_true) [TBD] | 0xc3 | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index e7634f835d..f27ac5309a 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -593,6 +593,7 @@ def S.avgr_u(a, b): * `i8x16.abs(a: v128) -> v128` * `i16x8.abs(a: v128) -> v128` * `i32x4.abs(a: v128) -> v128` +* `i64x2.abs(a: v128) -> v128` Lane-wise wrapping absolute value. From 7a8190fbad462a353c552ef58d5e1ee0130c6cb1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 8 Feb 2021 17:53:54 -0800 Subject: [PATCH 299/378] [spectext] Add i64x2 signed comparisons Previously it was included \ishape.\virelop, but it is incorrect, as we don't have i64x2 unsigned comparisons. i64x2 signed comparisons were added in #412. --- document/core/syntax/instructions.rst | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index fd0da62757..362c979945 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -221,7 +221,15 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i64x2.}\EXTRACTLANE~\laneidx \\&&|& \fshape\K{.}\EXTRACTLANE~\laneidx \\&&|& \shape\K{.}\REPLACELANE~\laneidx \\&&|& - \ishape\K{.}\virelop \\&&|& + \K{i8x16}\K{.}\virelop ~|~ + \K{i16x8}\K{.}\virelop ~|~ + \K{i32x4}\K{.}\virelop \\&&|& + \K{i64x2.}\K{eq} ~|~ + \K{i64x2.}\K{ne} \\&&|& + \K{i64x2.}\K{lt\_s} ~|~ + \K{i64x2.}\K{gt\_s} ~|~ + \K{i64x2.}\K{le\_s} ~|~ + \K{i64x2.}\K{ge\_s} \\&&|& \fshape\K{.}\vfrelop \\&&|& \K{i8x16.}\viunop ~|~ \K{i16x8.}\viunop ~|~ From a2091ba37c2b55c830558021af35719a48cf209e Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 8 Feb 2021 14:06:34 -0800 Subject: [PATCH 300/378] [spectext] Add ext mul instructions --- document/core/exec/instructions.rst | 51 +++++++++++++++++++++++++++ document/core/syntax/instructions.rst | 10 ++++++ document/core/util/macros.def | 2 ++ document/core/valid/instructions.rst | 14 ++++++++ 4 files changed, 77 insertions(+) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index a595656bad..ad1c490bf8 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -725,6 +725,57 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} +.. _exec-simd-extmul: + +:math:`t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx` and :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx` +.................................................................................................................. + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. If :math:`\K{low}` is part of the instruction, then: + + a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. + + b. Let :math:`j^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_2)[0 \slice N]`. + +5. Else: + + a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. + + b. Let :math:`j^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_2)[N \slice N]`. + +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast)))` + +8. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ + \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[0 \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast))) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ + \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[N \slice N] \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast))) + \end{array} + \end{array} + + .. index:: parametric instructions, value pair: execution; instruction single: abstract syntax; instruction diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 362c979945..01b9882697 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -256,6 +256,12 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i64x2.}\K{mul} \\&&|& \K{i8x16.}\AVGR\K{\_u} ~|~ \K{i16x8.}\AVGR\K{\_u} \\&&|& + \K{i16x8.}\EXTMUL\K{\_low}\K{\_i8x16\_}\sx ~|~ + \K{i16x8.}\EXTMUL\K{\_high}\K{\_i8x16\_}\sx \\&&|& + \K{i32x4.}\EXTMUL\K{\_low}\K{\_i16x8\_}\sx ~|~ + \K{i32x4.}\EXTMUL\K{\_high}\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\EXTMUL\K{\_low}\K{\_i32x4\_}\sx ~|~ + \K{i64x2.}\EXTMUL\K{\_high}\K{\_i32x4\_}\sx \\&&|& \fshape\K{.}\vfbinop \\&&|& \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx \\ &&|& \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx \\&&|& @@ -362,6 +368,7 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vunop: .. _syntax-vbinop: .. _syntax-vwiden: +.. _syntax-vextmul: Conventions ........... @@ -387,6 +394,9 @@ Occasionally, it is convenient to group operators together according to the foll \production{widen operator} & \vwiden &::=& \WIDEN\K{\_low\_}\shape\K{\_}\sx ~|~ \WIDEN\K{\_high\_}\shape\K{\_}\sx \\ + \production{extmul operator} & \vextmul &::=& + \EXTMUL\K{\_low\_}\ishape\K{\_}\sx ~|~ + \EXTMUL\K{\_high\_}\ishape\K{\_}\sx \\ \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 094dc40ef4..d9d1d73855 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -422,6 +422,7 @@ .. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} .. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{widen}} .. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} +.. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} @@ -453,6 +454,7 @@ .. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} .. |vwiden| mathdef:: \xref{syntax/instructions}{syntax-vwiden}{\X{vwiden}} .. |vcvtop| mathdef:: \xref{syntax/instructions}{syntax-vcvtop}{\X{vcvtop}} +.. |vextmul| mathdef:: \xref{syntax/instructions}{syntax-vextmul}{\X{vextmul}} .. |laneidx| mathdef:: \xref{syntax/instructions}{syntax-laneidx}{\X{laneidx}} .. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 145ef42b51..02a056620b 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -450,6 +450,20 @@ We also define an auxiliary function to get number of packed numeric types in a } +.. _valid-simd-vextmul: + +:math:`\ishape\K{.}\vextmul\K{\_}\ishape\K{\_}\sx` +.................................................. + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \ishape\K{.}\EXTMUL\K{\_}\ishape\K{\_}\sx : [\V128~\V128] \to [\V128] + } + + .. index:: parametric instructions, value type, polymorphism pair: validation; instruction single: abstract syntax; instruction From dd1642739fe51ea914711671cc598819888d5a5c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Feb 2021 18:04:51 -0800 Subject: [PATCH 301/378] [spectext] Add i8x16.popcnt to syntax It maps nicely to the existing vunop group, so the validation and execution semantics are taken care of. Drive-by fixes: - was using NEG instead of VNEG for SIMD negation instruction - vunop includes neg twice, since viunop already includes neg. --- document/core/syntax/instructions.rst | 5 +++-- document/core/util/macros.def | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 01b9882697..d9df66fcb9 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -234,7 +234,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i8x16.}\viunop ~|~ \K{i16x8.}\viunop ~|~ \K{i32x4.}\viunop \\&&|& - \K{i64x2.}\NEG \\&&|& + \K{i8x16.}\VPOPCNT \\&&|& + \K{i64x2.}\VNEG \\&&|& \fshape\K{.}\vfunop \\&&|& \ishape\K{.}\vitestop \\ &&|& \ishape\K{.}\BITMASK \\ &&|& @@ -380,7 +381,7 @@ Occasionally, it is convenient to group operators together according to the foll \production{unary operator} & \vunop &::=& \viunop ~|~ \vfunop ~|~ - \VNEG \\ + \VPOPCNT \\ \production{binary operator} & \vbinop &::=& \vibinop ~|~ \vfbinop \\&&|& \virelop ~|~ \vfrelop \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index d9d1d73855..4d311d2b32 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -407,6 +407,7 @@ .. |VGE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ge}} .. |VABS| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{abs}} .. |VNEG| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{neg}} +.. |VPOPCNT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{popcnt}} .. |ANYTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{any\_true}} .. |ALLTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{all\_true}} .. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{bitmask}} From 0fe0ade5f986d1d30a84c1e133cc51276a9bb98b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 10:37:27 -0800 Subject: [PATCH 302/378] Skip _output directory when listing wast files for test. (#449) * Skip _output directory when listing wast files for test. Follow-up to #434. Now `make partest && make partest` shouldn't fail. * Use a simpler glob Co-authored-by: Andreas Rossberg --- interpreter/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/interpreter/Makefile b/interpreter/Makefile index 34d4dea15f..63be817144 100644 --- a/interpreter/Makefile +++ b/interpreter/Makefile @@ -113,7 +113,8 @@ $(WINMAKE): clean # Executing test suite TESTDIR = ../test/core -TESTFILES = $(shell cd $(TESTDIR); ls *.wast; ls */*.wast) +# Skip _output directory, since that's a tmp directory, and list all other wast files. +TESTFILES = $(shell cd $(TESTDIR); ls *.wast; ls [a-z]*/*.wast) TESTS = $(TESTFILES:%.wast=%) .PHONY: test debugtest partest From 01fdbd3d3491996213f382e2702aac5c56464b89 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Feb 2021 17:51:59 -0800 Subject: [PATCH 303/378] Update simd_i64x2_cmp test output I think I missed generating these tests in #440. --- test/core/simd/simd_i64x2_cmp.wast | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/test/core/simd/simd_i64x2_cmp.wast b/test/core/simd/simd_i64x2_cmp.wast index 9f4cc0edf5..f59ff281ad 100644 --- a/test/core/simd/simd_i64x2_cmp.wast +++ b/test/core/simd/simd_i64x2_cmp.wast @@ -43,23 +43,23 @@ ;; i64x2.ne (i64x2) (i64x2) ;; hex vs hex -(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF) - (v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF)) +(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) (v128.const i64x2 0 0)) -(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0x00000000) - (v128.const i64x2 0x00000000 0x00000000)) +(assert_return (invoke "ne" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) (v128.const i64x2 0 0)) -(assert_return (invoke "ne" (v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0) - (v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0)) +(assert_return (invoke "ne" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) (v128.const i64x2 0 0)) -(assert_return (invoke "ne" (v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F) - (v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F)) +(assert_return (invoke "ne" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) (v128.const i64x2 0 0)) -(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0x00000000) - (v128.const i64x2 0xFFFFFFFF 0x00000000)) +(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) (v128.const i64x2 0 0)) -(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0xFFFFFFFF) - (v128.const i64x2 0x00000000 0xFFFFFFFF)) +(assert_return (invoke "ne" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) (v128.const i64x2 0 0)) (assert_return (invoke "ne" (v128.const i64x2 0x03020100 0x11100904) (v128.const i64x2 0x03020100 0x11100904)) From 52fac1b3dd829ee99b1a38bc8d34d23a6da41197 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Feb 2021 11:55:24 -0800 Subject: [PATCH 304/378] [spectext] Add i64x2.widen_{low,high}_i32x4_{s,u} to syntax This is a simple change, validation and execution is already shape-agnostic, so we only need to add it to the syntax. Instructions were merged in #290. --- document/core/syntax/instructions.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index d9df66fcb9..e17874eb09 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -243,8 +243,10 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& \K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\WIDEN\K{\_low}\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\WIDEN\K{\_low}\K{\_i32x4\_}\sx \\&&|& \K{i16x8.}\WIDEN\K{\_high}\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\WIDEN\K{\_high}\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\WIDEN\K{\_high}\K{\_i32x4\_}\sx \\&&|& \ishape\K{.}\vshiftop \\&&|& \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ From 34e195cfd721829ff2a387ff44db4c49f28a56a5 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 10:39:35 -0800 Subject: [PATCH 305/378] [spectext] Load lane and store lane validation and semantics (#445) Load lane and store lane instructions added in #350. --- document/core/exec/instructions.rst | 119 ++++++++++++++++++++++++++ document/core/syntax/instructions.rst | 10 ++- document/core/util/macros.def | 1 + document/core/valid/instructions.rst | 51 ++++++++++- 4 files changed, 176 insertions(+), 5 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index ad1c490bf8..2029341702 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -1231,6 +1231,68 @@ Memory Instructions \end{array} +.. _exec-load-lane: + +:math:`\V128\K{.}\LOAD{N}\K{\_lane}~\memarg~x` +..................................................... + +1. Let :math:`F` be the :ref:`current ` :ref:`frame `. + +2. Assert: due to :ref:`validation `, :math:`F.\AMODULE.\MIMEMS[0]` exists. + +3. Let :math:`a` be the :ref:`memory address ` :math:`F.\AMODULE.\MIMEMS[0]`. + +4. Assert: due to :ref:`validation `, :math:`S.\SMEMS[a]` exists. + +5. Let :math:`\X{mem}` be the :ref:`memory instance ` :math:`S.\SMEMS[a]`. + +6. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +7. Pop the value :math:`\V128.\CONST~v` from the stack. + +8. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +9. Pop the value :math:`\I32.\CONST~i` from the stack. + +10. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`. + +11. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then: + + a. Trap. + +12. Let :math:`b^\ast` be the byte sequence :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]`. + +13. Let :math:`r` be the constant for which :math:`\bytes_{\iN}(r) = b^\ast`. + +14. Let :math:`L` be :math:`128 / N`. + +15. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\K{i}N\K{x}L}(\lanes_{\K{i}N\K{x}L}(v) \with [x] = r)`. + +16. Push the value :math:`\V128.\CONST~c` to the stack. + +.. math:: + ~\\[-1ex] + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~i)~(\V128.\CONST~v)~(\V128\K{.}\LOAD{N}\K{\_lane}~\memarg~x) &\stepto& S; F; (\V128.\CONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & \X{ea} = i + \memarg.\OFFSET \\ + \wedge & \X{ea} + N/8 \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\ + \wedge & \bytes_{\iN}(r) = S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8]) \\ + \wedge & L = 128/N \\ + \wedge & c = \lanes^{-1}_{\K{i}N\K{x}L}(\lanes_{\K{i}N\K{x}L}(v) \with [x] = r) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~k)~(\V128.\CONST~v)~(\V128.\LOAD{N}\K{\_lane}~\memarg~x) &\stepto& S; F; \TRAP + \end{array} + \\ \qquad + (\otherwise) \\ + \end{array} + + .. _exec-store: .. _exec-storen: @@ -1308,6 +1370,63 @@ Memory Instructions \end{array} +.. _exec-store-lane: + +:math:`\V128\K{.}\STORE{N}\K{\_lane}~\memarg~x` +...................................................... + +1. Let :math:`F` be the :ref:`current ` :ref:`frame `. + +2. Assert: due to :ref:`validation `, :math:`F.\AMODULE.\MIMEMS[0]` exists. + +3. Let :math:`a` be the :ref:`memory address ` :math:`F.\AMODULE.\MIMEMS[0]`. + +4. Assert: due to :ref:`validation `, :math:`S.\SMEMS[a]` exists. + +5. Let :math:`\X{mem}` be the :ref:`memory instance ` :math:`S.\SMEMS[a]`. + +6. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`\V128` is on the top of the stack. + +7. Pop the value :math:`\V128.\CONST~c` from the stack. + +8. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. + +9. Pop the value :math:`\I32.\CONST~i` from the stack. + +10. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`. + +11. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then: + + a. Trap. + +12. Let :math:`L` be :math:`128/N`. + +13. Let :math:`b^\ast` be the byte sequence :math:`\bytes_{\iN}(\lanes_{\K{i}N\K{x}L}(c)[x])`. + +14. Replace the bytes :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]` with :math:`b^\ast`. + +.. math:: + ~\\[-1ex] + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~i)~(\V128.\CONST~c)~(\V128.\STORE{N}\K{\_lane}~\memarg~x) &\stepto& S'; F; \epsilon + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & \X{ea} = i + \memarg.\OFFSET \\ + \wedge & \X{ea} + N \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\ + \wedge & L = 128/N \\ + \wedge & S' = S \with \SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8] = \bytes_{\iN}(\lanes_{\K{i}N\K{x}L}(c)[x]) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + S; F; (\I32.\CONST~k)~(\V128.\CONST~c)~(\V128.\STORE{N}\K{\_lane}~\memarg~x) &\stepto& S; F; \TRAP + \end{array} + \\ \qquad + (\otherwise) \\ + \end{array} + + .. _exec-memory.size: :math:`\MEMORYSIZE` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index e17874eb09..293d54e266 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -454,6 +454,7 @@ The |LOCALTEE| instruction is like |LOCALSET| but also returns its argument. .. _syntax-loadn: .. _syntax-storen: .. _syntax-memarg: +.. _syntax-lanewidth: .. _syntax-instr-memory: Memory Instructions @@ -465,6 +466,8 @@ Instructions in this group are concerned with linear :ref:`memory `. \begin{array}{llcl} \production{memory immediate} & \memarg &::=& \{ \OFFSET~\u32, \ALIGN~\u32 \} \\ + \production{lane width} & \lanewidth &::=& + 8 ~|~ 16 ~|~ 32 ~|~ 64 \\ \production{instruction} & \instr &::=& \dots \\&&|& \K{i}\X{nn}\K{.}\LOAD~\memarg ~|~ @@ -482,12 +485,11 @@ Instructions in this group are concerned with linear :ref:`memory `. \K{v128.}\LOAD\K{8x8}\_\sx~\memarg ~|~ \K{v128.}\LOAD\K{16x4}\_\sx~\memarg ~|~ \K{v128.}\LOAD\K{32x2}\_\sx~\memarg \\&&|& - \K{v128.}\LOAD\K{8\_splat}~\memarg ~|~ - \K{v128.}\LOAD\K{16\_splat}~\memarg \\&&|& - \K{v128.}\LOAD\K{32\_splat}~\memarg ~|~ - \K{v128.}\LOAD\K{64\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\lanewidth\K{\_splat}~\memarg \\&&|& \K{v128.}\LOAD\K{32\_zero}~\memarg ~|~ \K{v128.}\LOAD\K{64\_zero}~\memarg \\&&|& + \K{v128.}\LOAD\lanewidth\K{\_lane}~\memarg~\laneidx ~|~ + \K{v128.}\STORE\lanewidth\K{\_lane}~\memarg~\laneidx \\&&|& \MEMORYSIZE \\&&|& \MEMORYGROW \\ \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 4d311d2b32..52e0e59916 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -474,6 +474,7 @@ .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} +.. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}} .. |blocktype| mathdef:: \xref{syntax/instructions}{syntax-blocktype}{\X{blocktype}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 02a056620b..5dd0a652e3 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -744,7 +744,7 @@ Memory Instructions .. _valid-load-zero: :math:`\K{v128.}\LOAD{N}\K{\_zero}~\memarg` -............................................... +........................................... * The memory :math:`C.\CMEMS[0]` must be defined in the context. @@ -762,6 +762,55 @@ Memory Instructions } +.. _valid-load-lane: + +:math:`\K{v128.}\LOAD{N}\K{\_lane}~\memarg~\laneidx` +.................................................... + +* The lane index :math:`\laneidx` must be smaller than :math:`128/N`. + +* The memory :math:`C.\CMEMS[0]` must be defined in the context. + +* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`. + +* Then the instruction is valid with type :math:`[\I32~\V128] \to [\V128]`. + +.. math:: + \frac{ + \laneidx < 128/N + \qquad + C.\CMEMS[0] = \memtype + \qquad + 2^{\memarg.\ALIGN} < N/8 + }{ + C \vdashinstr \K{v128.}\LOAD{N}\K{\_lane}~\memarg~\laneidx : [\I32~\V128] \to [\V128] + } + +.. _valid-store-lane: + +:math:`\K{v128.}\STORE{N}\K{\_lane}~\memarg~\laneidx` +..................................................... + +* The lane index :math:`\laneidx` must be smaller than :math:`128/N`. + +* The memory :math:`C.\CMEMS[0]` must be defined in the context. + +* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`. + +* Then the instruction is valid with type :math:`[\I32~\V128] \to [\V128]`. + +.. math:: + \frac{ + \laneidx < 128/N + \qquad + C.\CMEMS[0] = \memtype + \qquad + 2^{\memarg.\ALIGN} < N/8 + }{ + C \vdashinstr \K{v128.}\STORE{N}\K{\_lane}~\memarg~\laneidx : [\I32~\V128] \to [] + } + + .. _valid-memory.size: :math:`\MEMORYSIZE` From 634be58ab953e0f6bcbb2c918c9da31a5ba8edb9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Feb 2021 09:15:38 -0800 Subject: [PATCH 306/378] [interpreter] Implement i64x2.widen_{low,high}_i32x4_{s,u} This was merged in #290. Also tweaked the file generation scripts: - Make simd_arithmetic more generic (allow different instruction name patterns) - create a new file simd_int_to_int_widen to generate all integer widening operations (including the ones implemented in this PR) - remove widening tests from simd_conversions.wast --- interpreter/binary/decode.ml | 4 + interpreter/binary/encode.ml | 4 + interpreter/exec/eval_simd.ml | 4 + interpreter/syntax/operators.ml | 4 + interpreter/text/arrange.ml | 4 + interpreter/text/lexer.mll | 4 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_arithmetic.py | 35 +- test/core/simd/meta/simd_int_to_int_widen.py | 113 ++++ test/core/simd/simd_conversions.wast | 464 -------------- test/core/simd/simd_int_to_int_widen.wast | 599 +++++++++++++++++++ 11 files changed, 760 insertions(+), 476 deletions(-) create mode 100644 test/core/simd/meta/simd_int_to_int_widen.py create mode 100644 test/core/simd/simd_int_to_int_widen.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 8238a93c30..26c4b705c9 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -396,6 +396,10 @@ let simd_prefix s = | 0xc0l -> i64x2_eq | 0xc1l -> i64x2_neg | 0xc4l -> i64x2_bitmask + | 0xc7l -> i64x2_widen_low_i32x4_s + | 0xc8l -> i64x2_widen_high_i32x4_s + | 0xc9l -> i64x2_widen_low_i32x4_u + | 0xcal -> i64x2_widen_high_i32x4_u | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 3fee6eaaeb..cee66905f5 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -350,6 +350,10 @@ let encode m = | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l + | Unary (V128 V128Op.(I64x2 WidenLowS)) -> simd_op 0xc7l + | Unary (V128 V128Op.(I64x2 WidenHighS)) -> simd_op 0xc8l + | Unary (V128 V128Op.(I64x2 WidenLowU)) -> simd_op 0xc9l + | Unary (V128 V128Op.(I64x2 WidenHighU)) -> simd_op 0xcal | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0xd8l | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0xd9l | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0xdal diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index a5745af752..b729976e8a 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -31,6 +31,10 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) + | I64x2 WidenLowS -> to_value (SXX.I64x2_convert.widen_low_s (of_value 1 v)) + | I64x2 WidenHighS -> to_value (SXX.I64x2_convert.widen_high_s (of_value 1 v)) + | I64x2 WidenLowU -> to_value (SXX.I64x2_convert.widen_low_u (of_value 1 v)) + | I64x2 WidenHighU -> to_value (SXX.I64x2_convert.widen_high_u (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 7ad59a8d34..03a5b88a1f 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -387,6 +387,10 @@ let i32x4_extmul_high_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulHighU)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) +let i64x2_widen_low_i32x4_s = Unary (V128 V128Op.(I64x2 WidenLowS)) +let i64x2_widen_high_i32x4_s = Unary (V128 V128Op.(I64x2 WidenHighS)) +let i64x2_widen_low_i32x4_u = Unary (V128 V128Op.(I64x2 WidenLowU)) +let i64x2_widen_high_i32x4_u = Unary (V128 V128Op.(I64x2 WidenHighU)) let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index c20515a1e6..633ebe3a42 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -217,6 +217,10 @@ struct | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I64x2 Neg -> "i64x2.neg" + | I64x2 WidenLowS -> "i64x2.widen_low_i32x4_s" + | I64x2 WidenHighS -> "i64x2.widen_high_i32x4_s" + | I64x2 WidenLowU -> "i64x2.widen_low_i32x4_u" + | I64x2 WidenHighU -> "i64x2.widen_high_i32x4_u" | F32x4 Ceil -> "f32x4.ceil" | F32x4 Floor -> "f32x4.floor" | F32x4 Trunc -> "f32x4.trunc" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 04707f059b..01c4c934b6 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -562,6 +562,10 @@ rule token = parse { UNARY (ext s i32x4_widen_low_i16x8_s i32x4_widen_low_i16x8_u) } | "i32x4.widen_high_i16x8_"(sign as s) { UNARY (ext s i32x4_widen_high_i16x8_s i32x4_widen_high_i16x8_u) } + | "i64x2.widen_low_i32x4_"(sign as s) + { UNARY (ext s i64x2_widen_low_i32x4_s i64x2_widen_low_i32x4_u) } + | "i64x2.widen_high_i32x4_"(sign as s) + { UNARY (ext s i64x2_widen_high_i32x4_s i64x2_widen_high_i32x4_u) } | "i8x16.add_sat_"(sign as s) { BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index f9a167feae..d3a1768f70 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -34,6 +34,7 @@ 'simd_i32x4_dot_i16x8', 'simd_load_lane', 'simd_ext_mul', + 'simd_int_to_int_widen', ) diff --git a/test/core/simd/meta/simd_arithmetic.py b/test/core/simd/meta/simd_arithmetic.py index 53d92d2901..dcdc8f973f 100644 --- a/test/core/simd/meta/simd_arithmetic.py +++ b/test/core/simd/meta/simd_arithmetic.py @@ -28,6 +28,16 @@ class SimdArithmeticCase: BINARY_OPS = ('add', 'sub', 'mul') LANE_VALUE = {'i8x16': i8, 'i16x8': i16, 'i32x4': i32, 'i64x2': i64} + TEST_FUNC_TEMPLATE_HEADER = ( + ';; Tests for {} arithmetic operations on major boundary values and all special values.\n\n') + + def op_name(self, op): + """ Full instruction name. + Subclasses can overwrite to provide custom instruction names that don't + fit the default of {shape}.{op}. + """ + return '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + def __str__(self): return self.get_all_cases() @@ -150,15 +160,14 @@ def combine_binary_arith_test_data(self): def gen_test_func_template(self): template = [ - ';; Tests for {} arithmetic operations on major boundary values and all special values.\n\n'.format( - self.LANE_TYPE), '(module'] + self.TEST_FUNC_TEMPLATE_HEADER.format(self.LANE_TYPE), '(module'] for op in self.BINARY_OPS: - template.append(' (func (export "{lane_type}.%s") (param v128 v128) (result v128) ' - '({lane_type}.%s (local.get 0) (local.get 1)))' % (op, op)) + template.append(' (func (export "{op}") (param v128 v128) (result v128) ' + '({op} (local.get 0) (local.get 1)))'.format(op=self.op_name(op))) for op in self.UNARY_OPS: - template.append(' (func (export "{lane_type}.%s") (param v128) (result v128) ' - '({lane_type}.%s (local.get 0)))' % (op, op)) + template.append(' (func (export "{op}") (param v128) (result v128) ' + '({op} (local.get 0)))'.format(op=self.op_name(op))) template.append(')\n') return template @@ -203,16 +212,18 @@ def get_case_data(self): def get_invalid_cases(self): invalid_cases = [';; type check'] + unary_template = '(assert_invalid (module (func (result v128) '\ - '({lane_type}.{op} ({operand})))) "type mismatch")' + '({name} ({operand})))) "type mismatch")' binary_template = '(assert_invalid (module (func (result v128) '\ - '({lane_type}.{op} ({operand_1}) ({operand_2})))) "type mismatch")' + '({name} ({operand_1}) ({operand_2})))) "type mismatch")' + for op in self.UNARY_OPS: - invalid_cases.append(unary_template.format(lane_type=self.LANE_TYPE, op=op, + invalid_cases.append(unary_template.format(name=self.op_name(op), operand='i32.const 0')) for op in self.BINARY_OPS: - invalid_cases.append(binary_template.format(lane_type=self.LANE_TYPE, op=op, + invalid_cases.append(binary_template.format(name=self.op_name(op), operand_1='i32.const 0', operand_2='f32.const 0.0')) @@ -234,13 +245,13 @@ def argument_empty_test(self): } for op in self.UNARY_OPS: - case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['op'] = self.op_name(op) case_data['extended_name'] = 'arg-empty' case_data['params'] = '' cases.append(AssertInvalid.get_arg_empty_test(**case_data)) for op in self.BINARY_OPS: - case_data['op'] = '{lane_type}.{op}'.format(lane_type=self.LANE_TYPE, op=op) + case_data['op'] = self.op_name(op) case_data['extended_name'] = '1st-arg-empty' case_data['params'] = SIMD.v128_const('0', self.LANE_TYPE) cases.append(AssertInvalid.get_arg_empty_test(**case_data)) diff --git a/test/core/simd/meta/simd_int_to_int_widen.py b/test/core/simd/meta/simd_int_to_int_widen.py new file mode 100644 index 0000000000..457121c874 --- /dev/null +++ b/test/core/simd/meta/simd_int_to_int_widen.py @@ -0,0 +1,113 @@ +#!/usr/bin/env python3 + +""" +Generates all integer-to-integer widening test cases. +""" + +from simd import SIMD +from simd_arithmetic import SimdArithmeticCase +from test_assert import AssertReturn, AssertInvalid + + +class SimdIntToIntWiden(SimdArithmeticCase): + LANE_TYPE = "" # unused, can be anything + BINARY_OPS = () + UNARY_OPS = ( + "i16x8.widen_high_i8x16_s", + "i16x8.widen_high_i8x16_u", + "i16x8.widen_low_i8x16_s", + "i16x8.widen_low_i8x16_u", + "i32x4.widen_high_i16x8_s", + "i32x4.widen_high_i16x8_u", + "i32x4.widen_low_i16x8_s", + "i32x4.widen_low_i16x8_u", + "i64x2.widen_high_i32x4_s", + "i64x2.widen_high_i32x4_u", + "i64x2.widen_low_i32x4_s", + "i64x2.widen_low_i32x4_u", + ) + + TEST_FUNC_TEMPLATE_HEADER = ";; Tests for int-to-int widening operations.\n" + + def op_name(self, op): + # Override base class implementation, since the lane type is already + # part of the op name. + return "{op}".format(lane_type=self.LANE_TYPE, op=op) + + def is_unsigned(self, op): + return op.endswith("_u") + + def src_lane_type(self, op): + return op[-7:-2] + + def dst_lane_type(self, op): + return op[0:5] + + def get_test_cases(self, src_value): + return [ + (0, 0), + (0, 1), + (0, -1), + (1, 0), + (-1, 0), + (1, -1), + ((-1, 1)), + ((src_value.max - 1), (src_value.max)), + ((src_value.max), (src_value.max - 1)), + ((src_value.max), (src_value.max)), + ((src_value.min), (src_value.min)), + ((src_value.max), (src_value.min)), + ((src_value.min), (src_value.max)), + ((src_value.max), -1), + (-1, (src_value.max)), + (((src_value.min + 1), (src_value.min))), + ((src_value.min), (src_value.min + 1)), + ((src_value.min), (-1)), + ((-1), (src_value.min)), + ] + + def get_normal_case(self): + cases = [] + + for op in self.UNARY_OPS: + src_lane_type = self.src_lane_type(op) + src_value = self.LANE_VALUE[src_lane_type] + operands = self.get_test_cases(src_value) + + for (low, high) in operands: + result = low if "low" in op else high + + if self.is_unsigned(op): + # Unsign-extend, mask top bits. + result = result & src_value.mask + + cases.append( + str( + AssertReturn( + op, + [SIMD.v128_const([str(low), str(high)], src_lane_type)], + SIMD.v128_const(str(result), self.dst_lane_type(op)), + ) + ) + ) + + cases.append("") + + return "\n".join(cases) + + def gen_test_cases(self): + wast_filename = "../simd_int_to_int_widen.wast" + with open(wast_filename, "w") as fp: + fp.write(self.get_all_cases()) + + def get_combine_cases(self): + return "" + + +def gen_test_cases(): + simd_int_to_int_widen = SimdIntToIntWiden() + simd_int_to_int_widen.gen_test_cases() + + +if __name__ == "__main__": + gen_test_cases() diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index e1c2ff245b..b24a6643e9 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -22,24 +22,6 @@ (i16x8.narrow_i32x4_s (local.get 0) (local.get 1))) (func (export "i16x8.narrow_i32x4_u") (param v128 v128) (result v128) (i16x8.narrow_i32x4_u (local.get 0)(local.get 1))) - - ;; Integer to integer widening - (func (export "i16x8.widen_high_i8x16_s") (param v128) (result v128) - (i16x8.widen_high_i8x16_s (local.get 0))) - (func (export "i16x8.widen_high_i8x16_u") (param v128) (result v128) - (i16x8.widen_high_i8x16_u (local.get 0))) - (func (export "i16x8.widen_low_i8x16_s") (param v128) (result v128) - (i16x8.widen_low_i8x16_s (local.get 0))) - (func (export "i16x8.widen_low_i8x16_u") (param v128) (result v128) - (i16x8.widen_low_i8x16_u (local.get 0))) - (func (export "i32x4.widen_high_i16x8_s") (param v128) (result v128) - (i32x4.widen_high_i16x8_s (local.get 0))) - (func (export "i32x4.widen_high_i16x8_u") (param v128) (result v128) - (i32x4.widen_high_i16x8_u (local.get 0))) - (func (export "i32x4.widen_low_i16x8_s") (param v128) (result v128) - (i32x4.widen_low_i16x8_s (local.get 0))) - (func (export "i32x4.widen_low_i16x8_u") (param v128) (result v128) - (i32x4.widen_low_i16x8_u (local.get 0))) ) @@ -609,379 +591,6 @@ (v128.const i32x4 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678 0x0_1234_5678)) (v128.const i16x8 0 0 0 0 0xffff 0xffff 0xffff 0xffff)) -;; Integer to integer widening -;; i16x8.widen_low_i8x16_s - -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) - -;; i16x8.widen_high_i8x16_s - -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) - (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) - (v128.const i16x8 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81 0xff81)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80 0xff80)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff 0xffff)) - -;; i16x8.widen_low_i8x16_u - -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - -;; i16x8.widen_high_i8x16_u - -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) - (v128.const i16x8 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e 0x7e)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f -0x7f)) - (v128.const i16x8 0x81 0x81 0x81 0x81 0x81 0x81 0x81 0x81)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) - (v128.const i16x8 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f 0x7f)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) - (v128.const i16x8 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - (v128.const i16x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) - -;; i32x4.widen_low_i16x8_s - -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0xffff8001 0xffff8001 0xffff8001 0xffff8001)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i32x4 0xffffddd5 0xffffddd5 0xffffddd5 0xffffddd5)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) - (v128.const i32x4 0xffff90ab 0xffff90ab 0xffff90ab 0xffff90ab)) -;; i32x4.widen_high_i16x8_s - -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) - (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) - (v128.const i32x4 0xffff8001 0xffff8001 0xffff8001 0xffff8001)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0xffff8000 0xffff8000 0xffff8000 0xffff8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i32x4 0xffffddd5 0xffffddd5 0xffffddd5 0xffffddd5)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) - (v128.const i32x4 0xffff90ab 0xffff90ab 0xffff90ab 0xffff90ab)) -;; i32x4.widen_low_i16x8_u - -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0x8001 0x8001 0x8001 0x8001)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i32x4 0x0000ddd5 0x0000ddd5 0x0000ddd5 0x0000ddd5)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) - (v128.const i32x4 0x000090ab 0x000090ab 0x000090ab 0x000090ab)) -;; i32x4.widen_high_i16x8_u - -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7ffe 0x7ffe 0x7ffe 0x7ffe 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) - (v128.const i32x4 0x7ffe 0x7ffe 0x7ffe 0x7ffe)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x8000 0x8000 0x8000 0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x7fff 0x7fff 0x7fff 0x7fff 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0xffff 0xffff 0xffff 0xffff 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x7fff -0x7fff -0x7fff -0x7fff -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x7fff -0x7fff -0x7fff -0x7fff)) - (v128.const i32x4 0x8001 0x8001 0x8001 0x8001)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000 -0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x7fff 0x7fff 0x7fff 0x7fff)) - (v128.const i32x4 0x7fff 0x7fff 0x7fff 0x7fff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0x8000 0x8000 0x8000 0x8000)) - (v128.const i32x4 0x8000 0x8000 0x8000 0x8000)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -0x8000 -0x8000 -0x8000 -0x8000 0xffff 0xffff 0xffff 0xffff)) - (v128.const i32x4 0xffff 0xffff 0xffff 0xffff)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 056_789 056_789 056_789 056_789 056_789 056_789 056_789 056_789)) - (v128.const i32x4 0x0000ddd5 0x0000ddd5 0x0000ddd5 0x0000ddd5)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB 0x0_90AB)) - (v128.const i32x4 0x000090ab 0x000090ab 0x000090ab 0x000090ab)) ;; Unknown operator @@ -1096,15 +705,6 @@ (assert_invalid (module (func (result v128) (i16x8.narrow_i32x4_s (f32.const 0.0) (f64.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i16x8.narrow_i32x4_s (f32.const 0.0) (f64.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_s (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_s (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_u (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_u (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_s (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_s (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_u (f32.const 0.0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_u (f32.const 0.0)))) "type mismatch") - ;; Combinations @@ -1309,67 +909,3 @@ ) "type mismatch" ) -(assert_invalid - (module - (func $i16x8.widen_high_i8x16_s-arg-empty (result v128) - (i16x8.widen_high_i8x16_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_high_i8x16_u-arg-empty (result v128) - (i16x8.widen_high_i8x16_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_low_i8x16_s-arg-empty (result v128) - (i16x8.widen_low_i8x16_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_low_i8x16_u-arg-empty (result v128) - (i16x8.widen_low_i8x16_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_high_i16x8_s-arg-empty (result v128) - (i32x4.widen_high_i16x8_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_high_i16x8_u-arg-empty (result v128) - (i32x4.widen_high_i16x8_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_low_i16x8_s-arg-empty (result v128) - (i32x4.widen_low_i16x8_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_low_i16x8_u-arg-empty (result v128) - (i32x4.widen_low_i16x8_u) - ) - ) - "type mismatch" -) diff --git a/test/core/simd/simd_int_to_int_widen.wast b/test/core/simd/simd_int_to_int_widen.wast new file mode 100644 index 0000000000..1744770ad9 --- /dev/null +++ b/test/core/simd/simd_int_to_int_widen.wast @@ -0,0 +1,599 @@ +;; Tests for int-to-int widening operations. + +(module + (func (export "i16x8.widen_high_i8x16_s") (param v128) (result v128) (i16x8.widen_high_i8x16_s (local.get 0))) + (func (export "i16x8.widen_high_i8x16_u") (param v128) (result v128) (i16x8.widen_high_i8x16_u (local.get 0))) + (func (export "i16x8.widen_low_i8x16_s") (param v128) (result v128) (i16x8.widen_low_i8x16_s (local.get 0))) + (func (export "i16x8.widen_low_i8x16_u") (param v128) (result v128) (i16x8.widen_low_i8x16_u (local.get 0))) + (func (export "i32x4.widen_high_i16x8_s") (param v128) (result v128) (i32x4.widen_high_i16x8_s (local.get 0))) + (func (export "i32x4.widen_high_i16x8_u") (param v128) (result v128) (i32x4.widen_high_i16x8_u (local.get 0))) + (func (export "i32x4.widen_low_i16x8_s") (param v128) (result v128) (i32x4.widen_low_i16x8_s (local.get 0))) + (func (export "i32x4.widen_low_i16x8_u") (param v128) (result v128) (i32x4.widen_low_i16x8_u (local.get 0))) + (func (export "i64x2.widen_high_i32x4_s") (param v128) (result v128) (i64x2.widen_high_i32x4_s (local.get 0))) + (func (export "i64x2.widen_high_i32x4_u") (param v128) (result v128) (i64x2.widen_high_i32x4_u (local.get 0))) + (func (export "i64x2.widen_low_i32x4_s") (param v128) (result v128) (i64x2.widen_low_i32x4_s (local.get 0))) + (func (export "i64x2.widen_low_i32x4_u") (param v128) (result v128) (i64x2.widen_low_i32x4_u (local.get 0))) +) + +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) + +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) + +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) + +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 32769 32769 32769 32769)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) + +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -1 -1 -1 -1)) + +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32769 32769 32769 32769)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 65535 65535 65535 65535)) + +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) + +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 2147483649 2147483649)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) + +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 -1 -1)) + +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483649 2147483649)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 4294967295 4294967295)) + + +;; type check +(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.widen_high_i32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.widen_high_i32x4_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.widen_low_i32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.widen_low_i32x4_u (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.widen_high_i8x16_s-arg-empty (result v128) + (i16x8.widen_high_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_high_i8x16_u-arg-empty (result v128) + (i16x8.widen_high_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_low_i8x16_s-arg-empty (result v128) + (i16x8.widen_low_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.widen_low_i8x16_u-arg-empty (result v128) + (i16x8.widen_low_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_high_i16x8_s-arg-empty (result v128) + (i32x4.widen_high_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_high_i16x8_u-arg-empty (result v128) + (i32x4.widen_high_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_low_i16x8_s-arg-empty (result v128) + (i32x4.widen_low_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.widen_low_i16x8_u-arg-empty (result v128) + (i32x4.widen_low_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.widen_high_i32x4_s-arg-empty (result v128) + (i64x2.widen_high_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.widen_high_i32x4_u-arg-empty (result v128) + (i64x2.widen_high_i32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.widen_low_i32x4_s-arg-empty (result v128) + (i64x2.widen_low_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.widen_low_i32x4_u-arg-empty (result v128) + (i64x2.widen_low_i32x4_u) + ) + ) + "type mismatch" +) + From ef343cba31093e0e4c095b323a036a69878bcac4 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 12:08:59 -0800 Subject: [PATCH 307/378] [interpreter] Implement i8x16.popcnt (#451) Small fix to the test generation script, the order of applying operators was incorrect. Includes a fix to popcnt implementation that is upstream (https://github.com/WebAssembly/spec/pull/1286). --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/exec/int.ml | 2 +- interpreter/exec/simd.ml | 2 + interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 2 + test/core/simd/meta/simd_int_arith2.py | 5 +- test/core/simd/meta/simd_integer_op.py | 3 + test/core/simd/simd_i8x16_arith2.wast | 139 +++++++++++++++++++++---- 12 files changed, 136 insertions(+), 23 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 26c4b705c9..97087307f8 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -341,6 +341,7 @@ let simd_prefix s = | 0x78l -> i8x16_max_s | 0x79l -> i8x16_max_u | 0x7bl -> i8x16_avgr_u + | 0x7cl -> i8x16_popcnt | 0x80l -> i16x8_abs | 0x81l -> i16x8_neg | 0x83l -> i16x8_all_true diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index cee66905f5..634b1d9aae 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -337,6 +337,7 @@ let encode m = | Unary (V128 V128Op.(V128 Not)) -> simd_op 0x4dl | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l + | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x7cl | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l | Unary (V128 V128Op.(I16x8 WidenLowS)) -> simd_op 0x87l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index b729976e8a..5125a0f1bf 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -16,6 +16,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct fun v -> match op with | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) + | I8x16 Popcnt -> to_value (SXX.I8x16.popcnt (of_value 1 v)) | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v)) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 01c84e4c58..1a8c252ed3 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -240,7 +240,7 @@ struct let popcnt x = let rec loop acc i n = - if n = Rep.zero then + if i = 0 then acc else let acc' = if and_ n Rep.one = Rep.one then acc + 1 else acc in diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index ab46cda8cf..d15a53931b 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -71,6 +71,7 @@ sig val ge_u : t -> t -> t val abs : t -> t val neg : t -> t + val popcnt : t -> t val add : t -> t -> t val sub : t -> t -> t val min_s : t -> t -> t @@ -319,6 +320,7 @@ struct let ge_u = binop (cmp Int.ge_u) let abs = unop Int.abs let neg = unop Int.neg + let popcnt = unop Int.popcnt let add = binop Int.add let sub = binop Int.sub let mul = binop Int.mul diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 5e2e59b445..c9486da34f 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -50,6 +50,7 @@ module SimdOp = struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U | WidenLowS | WidenLowU | WidenHighS | WidenHighU + | Popcnt type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 03a5b88a1f..26de2da928 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -299,6 +299,7 @@ let i8x16_sub = Binary (V128 V128Op.(I8x16 Sub)) let i8x16_sub_sat_s = Binary (V128 V128Op.(I8x16 SubSatS)) let i8x16_sub_sat_u = Binary (V128 V128Op.(I8x16 SubSatU)) let i8x16_abs = Unary (V128 V128Op.(I8x16 Abs)) +let i8x16_popcnt = Unary (V128 V128Op.(I8x16 Popcnt)) let i8x16_min_s = Binary (V128 V128Op.(I8x16 MinS)) let i8x16_min_u = Binary (V128 V128Op.(I8x16 MinU)) let i8x16_max_s = Binary (V128 V128Op.(I8x16 MaxS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 633ebe3a42..b40d4f6717 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -202,6 +202,7 @@ struct let unop xx (op : unop) = match op with | I8x16 Neg -> "i8x16.neg" | I8x16 Abs -> "i8x16.abs" + | I8x16 Popcnt -> "i8x16.popcnt" | I16x8 Abs -> "i16x8.abs" | I16x8 Neg -> "i16x8.neg" | I16x8 WidenLowS -> "i16x8.widen_low_i8x16_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 01c4c934b6..31483afe98 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -532,6 +532,8 @@ rule token = parse | (simd_shape as s)".abs" { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } + | "i8x16.popcnt" + { UNARY i8x16_popcnt } | (simd_int_shape as s)".all_true" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index a682a4e3dc..9bb0ae0a7c 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -450,8 +450,8 @@ def gen_test_case_combination(self): for op2 in unary_ops: o2 = ArithmeticOp(op2) result3 = [] - ret3 = o1.unary_op('-1', self.LANE_VALUE) - ret3 = o2.unary_op(ret3, self.LANE_VALUE) + ret3 = o2.unary_op('-1', self.LANE_VALUE) + ret3 = o1.unary_op(ret3, self.LANE_VALUE) result3.append(ret3) cases += '\n' + str(AssertReturn('{lane_type}.{op1}-{lane_type}.{op2}'.format(lane_type=self.LANE_TYPE, op1=op1, op2=op2), [SIMD.v128_const('-1', self.LANE_TYPE)], @@ -543,6 +543,7 @@ class Simdi16x8Case(SimdLaneWiseInteger): class Simdi8x16Case(SimdLaneWiseInteger): LANE_TYPE = 'i8x16' + UNARY_OPS = ('abs','popcnt') BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') UNKNOWN_BINARY_OPS = ('i32x4.avgr_u', 'f32x4.avgr_u', 'i64x2.avgr_u', 'f64x2.avgr_u', diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 67bf207eb3..8f1d4d2f9a 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -117,6 +117,9 @@ def unary_op(self, operand, lane): result = -result if base == 16: return hex(result) + elif self.op == 'popcnt': + result = self.get_valid_value(v, lane) + return str(bin(result % lane.mod).count('1')) else: raise Exception('Unknown unary operation') diff --git a/test/core/simd/simd_i8x16_arith2.wast b/test/core/simd/simd_i8x16_arith2.wast index 02c97a838c..991ec14bb8 100644 --- a/test/core/simd/simd_i8x16_arith2.wast +++ b/test/core/simd/simd_i8x16_arith2.wast @@ -7,6 +7,7 @@ (func (export "i8x16.max_u") (param v128 v128) (result v128) (i8x16.max_u (local.get 0) (local.get 1))) (func (export "i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.avgr_u (local.get 0) (local.get 1))) (func (export "i8x16.abs") (param v128) (result v128) (i8x16.abs (local.get 0))) + (func (export "i8x16.popcnt") (param v128) (result v128) (i8x16.popcnt (local.get 0))) (func (export "i8x16.min_s_with_const_0") (result v128) (i8x16.min_s (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.min_s_with_const_1") (result v128) (i8x16.min_s (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.min_u_with_const_2") (result v128) (i8x16.min_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) @@ -18,16 +19,17 @@ (func (export "i8x16.avgr_u_with_const_8") (result v128) (i8x16.avgr_u (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255) (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128))) (func (export "i8x16.avgr_u_with_const_9") (result v128) (i8x16.avgr_u (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3) (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0))) (func (export "i8x16.abs_with_const_10") (result v128) (i8x16.abs (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_s_with_const_11") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_s_with_const_12") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.min_u_with_const_13") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.min_u_with_const_14") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_s_with_const_15") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_s_with_const_16") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.max_u_with_const_17") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.max_u_with_const_18") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) - (func (export "i8x16.avgr_u_with_const_19") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) - (func (export "i8x16.avgr_u_with_const_20") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.popcnt_with_const_11") (result v128) (i8x16.popcnt (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_12") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_s_with_const_13") (param v128) (result v128) (i8x16.min_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.min_u_with_const_14") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.min_u_with_const_15") (param v128) (result v128) (i8x16.min_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_s_with_const_16") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_s_with_const_17") (param v128) (result v128) (i8x16.max_s (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.max_u_with_const_18") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.max_u_with_const_19") (param v128) (result v128) (i8x16.max_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) + (func (export "i8x16.avgr_u_with_const_20") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255))) + (func (export "i8x16.avgr_u_with_const_21") (param v128) (result v128) (i8x16.avgr_u (local.get 0) (v128.const i8x16 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3))) ) (assert_return (invoke "i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) @@ -223,6 +225,34 @@ (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) (assert_return (invoke "i8x16.abs" (v128.const i8x16 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0)) (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3 01_2_3)) + (v128.const i8x16 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3 -01_2_3)) + (v128.const i8x16 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80 -0x80)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0 0x0_8_0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0 -0x0_8_0)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) ;; Const vs const (assert_return (invoke "i8x16.min_s_with_const_0") (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) @@ -236,27 +266,28 @@ (assert_return (invoke "i8x16.avgr_u_with_const_8") (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) (assert_return (invoke "i8x16.avgr_u_with_const_9") (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) (assert_return (invoke "i8x16.abs_with_const_10") (v128.const i8x16 128 128 128 128 127 127 127 127 64 64 64 64 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt_with_const_11") (v128.const i8x16 1 1 1 1 7 7 7 7 1 1 1 1 8 8 8 8)) ;; Param vs const -(assert_return (invoke "i8x16.min_s_with_const_11" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_s_with_const_12" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_s_with_const_12" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_s_with_const_13" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.min_u_with_const_13" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.min_u_with_const_14" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 -128 -128 -128 -128 64 64 64 64 64 64 64 64 -128 -128 -128 -128)) -(assert_return (invoke "i8x16.min_u_with_const_14" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.min_u_with_const_15" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0)) -(assert_return (invoke "i8x16.max_s_with_const_15" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.max_s_with_const_16" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_s_with_const_16" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_s_with_const_17" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) -(assert_return (invoke "i8x16.max_u_with_const_17" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.max_u_with_const_18" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 255 255 255 255 127 127 127 127 127 127 127 127 255 255 255 255)) -(assert_return (invoke "i8x16.max_u_with_const_18" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.max_u_with_const_19" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 3 3 3 3 2 2 2 2 2 2 2 2 3 3 3 3)) -(assert_return (invoke "i8x16.avgr_u_with_const_19" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) +(assert_return (invoke "i8x16.avgr_u_with_const_20" (v128.const i8x16 255 255 255 255 64 64 64 64 127 127 127 127 -128 -128 -128 -128)) (v128.const i8x16 192 192 192 192 96 96 96 96 96 96 96 96 192 192 192 192)) -(assert_return (invoke "i8x16.avgr_u_with_const_20" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) +(assert_return (invoke "i8x16.avgr_u_with_const_21" (v128.const i8x16 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0)) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) ;; Test different lanes go through different if-then clauses @@ -292,6 +323,8 @@ (v128.const i8x16 0 0 0 0 2 2 2 2 2 2 2 2 128 128 128 128)) (assert_return (invoke "i8x16.abs" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255)) (v128.const i8x16 128 128 128 128 127 127 127 127 64 64 64 64 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 64 64 64 64 255 255 255 255)) + (v128.const i8x16 1 1 1 1 7 7 7 7 1 1 1 1 8 8 8 8)) ;; Test opposite signs of zero (assert_return (invoke "i8x16.min_s" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0) @@ -332,6 +365,14 @@ (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) (assert_return (invoke "i8x16.abs" (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 +0 +0 +0 +0 0 0 0 0 -0 -0 -0 -0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.popcnt" (v128.const i8x16 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0 +0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (result v128) (i32x4.avgr_u (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)))") "unknown operator") @@ -348,6 +389,7 @@ (assert_invalid (module (func (result v128) (i8x16.max_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.avgr_u (i32.const 0) (f32.const 0.0)))) "type mismatch") (assert_invalid (module (func (result v128) (i8x16.abs (f32.const 0.0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i8x16.popcnt (f32.const 0.0)))) "type mismatch") ;; Test operation with empty argument @@ -439,6 +481,14 @@ ) "type mismatch" ) +(assert_invalid + (module + (func $i8x16.popcnt-arg-empty (result v128) + (i8x16.popcnt) + ) + ) + "type mismatch" +) ;; Combination (module @@ -449,6 +499,8 @@ (func (export "i8x16.min_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_s-i8x16.abs") (param v128 v128) (result v128) (i8x16.min_s (i8x16.abs (local.get 0))(local.get 1))) (func (export "i8x16.abs-i8x16.min_s") (param v128 v128) (result v128) (i8x16.abs (i8x16.min_s (local.get 0) (local.get 1)))) + (func (export "i8x16.min_s-i8x16.popcnt") (param v128 v128) (result v128) (i8x16.min_s (i8x16.popcnt (local.get 0))(local.get 1))) + (func (export "i8x16.popcnt-i8x16.min_s") (param v128 v128) (result v128) (i8x16.popcnt (i8x16.min_s (local.get 0) (local.get 1)))) (func (export "i8x16.min_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) @@ -456,6 +508,8 @@ (func (export "i8x16.min_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.min_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.min_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.min_u (i8x16.abs (local.get 0))(local.get 1))) (func (export "i8x16.abs-i8x16.min_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.min_u (local.get 0) (local.get 1)))) + (func (export "i8x16.min_u-i8x16.popcnt") (param v128 v128) (result v128) (i8x16.min_u (i8x16.popcnt (local.get 0))(local.get 1))) + (func (export "i8x16.popcnt-i8x16.min_u") (param v128 v128) (result v128) (i8x16.popcnt (i8x16.min_u (local.get 0) (local.get 1)))) (func (export "i8x16.max_s-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) @@ -463,6 +517,8 @@ (func (export "i8x16.max_s-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_s (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_s-i8x16.abs") (param v128 v128) (result v128) (i8x16.max_s (i8x16.abs (local.get 0))(local.get 1))) (func (export "i8x16.abs-i8x16.max_s") (param v128 v128) (result v128) (i8x16.abs (i8x16.max_s (local.get 0) (local.get 1)))) + (func (export "i8x16.max_s-i8x16.popcnt") (param v128 v128) (result v128) (i8x16.max_s (i8x16.popcnt (local.get 0))(local.get 1))) + (func (export "i8x16.popcnt-i8x16.max_s") (param v128 v128) (result v128) (i8x16.popcnt (i8x16.max_s (local.get 0) (local.get 1)))) (func (export "i8x16.max_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) @@ -470,6 +526,8 @@ (func (export "i8x16.max_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.max_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.max_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.max_u (i8x16.abs (local.get 0))(local.get 1))) (func (export "i8x16.abs-i8x16.max_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.max_u (local.get 0) (local.get 1)))) + (func (export "i8x16.max_u-i8x16.popcnt") (param v128 v128) (result v128) (i8x16.max_u (i8x16.popcnt (local.get 0))(local.get 1))) + (func (export "i8x16.popcnt-i8x16.max_u") (param v128 v128) (result v128) (i8x16.popcnt (i8x16.max_u (local.get 0) (local.get 1)))) (func (export "i8x16.avgr_u-i8x16.avgr_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.avgr_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.max_u") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_u (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.max_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.max_s (local.get 0) (local.get 1))(local.get 2))) @@ -477,7 +535,12 @@ (func (export "i8x16.avgr_u-i8x16.min_s") (param v128 v128 v128) (result v128) (i8x16.avgr_u (i8x16.min_s (local.get 0) (local.get 1))(local.get 2))) (func (export "i8x16.avgr_u-i8x16.abs") (param v128 v128) (result v128) (i8x16.avgr_u (i8x16.abs (local.get 0))(local.get 1))) (func (export "i8x16.abs-i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.abs (i8x16.avgr_u (local.get 0) (local.get 1)))) + (func (export "i8x16.avgr_u-i8x16.popcnt") (param v128 v128) (result v128) (i8x16.avgr_u (i8x16.popcnt (local.get 0))(local.get 1))) + (func (export "i8x16.popcnt-i8x16.avgr_u") (param v128 v128) (result v128) (i8x16.popcnt (i8x16.avgr_u (local.get 0) (local.get 1)))) + (func (export "i8x16.abs-i8x16.popcnt") (param v128) (result v128) (i8x16.abs (i8x16.popcnt (local.get 0)))) (func (export "i8x16.abs-i8x16.abs") (param v128) (result v128) (i8x16.abs (i8x16.abs (local.get 0)))) + (func (export "i8x16.popcnt-i8x16.popcnt") (param v128) (result v128) (i8x16.popcnt (i8x16.popcnt (local.get 0)))) + (func (export "i8x16.popcnt-i8x16.abs") (param v128) (result v128) (i8x16.popcnt (i8x16.abs (local.get 0)))) ) (assert_return (invoke "i8x16.min_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) @@ -506,6 +569,12 @@ (assert_return (invoke "i8x16.abs-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.min_s-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.popcnt-i8x16.min_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) (assert_return (invoke "i8x16.min_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -532,6 +601,12 @@ (assert_return (invoke "i8x16.abs-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.min_u-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.popcnt-i8x16.min_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16.max_s-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -558,6 +633,12 @@ (assert_return (invoke "i8x16.abs-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i8x16.max_s-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) +(assert_return (invoke "i8x16.popcnt-i8x16.max_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (assert_return (invoke "i8x16.max_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -584,6 +665,12 @@ (assert_return (invoke "i8x16.abs-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.max_u-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) +(assert_return (invoke "i8x16.popcnt-i8x16.max_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) (assert_return (invoke "i8x16.avgr_u-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1) (v128.const i8x16 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2)) @@ -610,5 +697,17 @@ (assert_return (invoke "i8x16.abs-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i8x16.avgr_u-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i8x16 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4)) +(assert_return (invoke "i8x16.popcnt-i8x16.avgr_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0) + (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.abs-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8)) (assert_return (invoke "i8x16.abs-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt-i8x16.popcnt" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i8x16.popcnt-i8x16.abs" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) From 17f55c38be8c5c5e30355c4b677d2d632bde015b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 12:21:06 -0800 Subject: [PATCH 308/378] [interpreter] Add i64x2 signed comparisons (#454) These instructions were merged in #412. The binary opcodes are temporary, they will be fixed up when we finalize the opcodes. --- interpreter/binary/decode.ml | 4 + interpreter/binary/encode.ml | 4 + interpreter/exec/eval_simd.ml | 4 + interpreter/syntax/operators.ml | 4 + interpreter/text/arrange.ml | 4 + interpreter/text/lexer.mll | 12 +- test/core/simd/meta/simd_i64x2_cmp.py | 180 +++++++++++++++ test/core/simd/simd_i64x2_cmp.wast | 308 ++++++++++++++++++++++++++ 8 files changed, 512 insertions(+), 8 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 97087307f8..51be0c0aca 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -336,10 +336,12 @@ let simd_prefix s = | 0x71l -> i8x16_sub | 0x72l -> i8x16_sub_sat_s | 0x73l -> i8x16_sub_sat_u + | 0x74l -> i64x2_lt_s | 0x76l -> i8x16_min_s | 0x77l -> i8x16_min_u | 0x78l -> i8x16_max_s | 0x79l -> i8x16_max_u + | 0x7al -> i64x2_gt_s | 0x7bl -> i8x16_avgr_u | 0x7cl -> i8x16_popcnt | 0x80l -> i16x8_abs @@ -422,6 +424,7 @@ let simd_prefix s = | 0xdfl -> f64x2_nearest | 0xe0l -> f32x4_abs | 0xe1l -> f32x4_neg + | 0xe2l -> i64x2_ge_s | 0xe3l -> f32x4_sqrt | 0xe4l -> f32x4_add | 0xe5l -> f32x4_sub @@ -433,6 +436,7 @@ let simd_prefix s = | 0xebl -> f32x4_pmax | 0xecl -> f64x2_abs | 0xedl -> f64x2_neg + | 0xeel -> i64x2_le_s | 0xefl -> f64x2_sqrt | 0xf0l -> f64x2_add | 0xf1l -> f64x2_sub diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 634b1d9aae..4eb2545964 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -503,6 +503,10 @@ let encode m = | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xc0l | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd0l + | Binary (V128 V128Op.(I64x2 LtS)) -> simd_op 0x74l + | Binary (V128 V128Op.(I64x2 GtS)) -> simd_op 0x7al + | Binary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xeel + | Binary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xe2l | Binary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xd2l | Binary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xd3l | Binary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xd6l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 5125a0f1bf..6741a0985f 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -130,6 +130,10 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s | I64x2 Eq -> SXX.I64x2.eq | I64x2 Ne -> SXX.I64x2.ne + | I64x2 LtS -> SXX.I64x2.lt_s + | I64x2 LeS -> SXX.I64x2.le_s + | I64x2 GtS -> SXX.I64x2.gt_s + | I64x2 GeS -> SXX.I64x2.ge_s | I32x4 ExtMulLowS -> SXX.I32x4_convert.extmul_low_s | I32x4 ExtMulHighS -> SXX.I32x4_convert.extmul_high_s | I32x4 ExtMulLowU -> SXX.I32x4_convert.extmul_low_u diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 26de2da928..300aaf58a9 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -394,6 +394,10 @@ let i64x2_widen_low_i32x4_u = Unary (V128 V128Op.(I64x2 WidenLowU)) let i64x2_widen_high_i32x4_u = Unary (V128 V128Op.(I64x2 WidenHighU)) let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) +let i64x2_lt_s = Binary (V128 V128Op.(I64x2 LtS)) +let i64x2_le_s = Binary (V128 V128Op.(I64x2 LeS)) +let i64x2_gt_s = Binary (V128 V128Op.(I64x2 GtS)) +let i64x2_ge_s = Binary (V128 V128Op.(I64x2 GeS)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) let i64x2_bitmask = SimdBitmask Simd.I64x2 let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index b40d4f6717..48c2b2c2c3 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -276,6 +276,10 @@ struct | I32x4 GeU -> "i32x4.ge_u" | I64x2 Eq -> "i64x2.eq" | I64x2 Ne -> "i64x2.ne" + | I64x2 LtS -> "i64x2.lt_s" + | I64x2 GtS -> "i64x2.gt_s" + | I64x2 LeS -> "i64x2.le_s" + | I64x2 GeS -> "i64x2.ge_s" | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" | I8x16 Add -> "i8x16.add" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 31483afe98..1636cd242b 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -462,26 +462,22 @@ rule token = parse | (simd_shape as s)".ne" { BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } | (simd_int_shape as s)".lt_s" - { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s unreachable) } + { BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } | (simd_int_shape as s)".lt_u" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } | (simd_int_shape as s)".le_s" - { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s unreachable) } + { BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } | (simd_int_shape as s)".le_u" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } | (simd_int_shape as s)".gt_s" - { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s unreachable) } + { BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } | (simd_int_shape as s)".gt_u" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } | (simd_int_shape as s)".ge_s" - { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s unreachable) } + { BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } | (simd_int_shape as s)".ge_u" { except ["i64x2"] s lexbuf; BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } diff --git a/test/core/simd/meta/simd_i64x2_cmp.py b/test/core/simd/meta/simd_i64x2_cmp.py index d22f51baf8..7eca6e27a7 100644 --- a/test/core/simd/meta/simd_i64x2_cmp.py +++ b/test/core/simd/meta/simd_i64x2_cmp.py @@ -16,6 +16,10 @@ class Simdi64x2CmpCase(SimdCmpCase): (module (func (export "eq") (param $x v128) (param $y v128) (result v128) ({lane_type}.eq (local.get $x) (local.get $y))) (func (export "ne") (param $x v128) (param $y v128) (result v128) ({lane_type}.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.lt_s (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.le_s (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.gt_s (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) ({lane_type}.ge_s (local.get $x) (local.get $y))) ) {normal_case} @@ -24,6 +28,10 @@ class Simdi64x2CmpCase(SimdCmpCase): (assert_invalid (module (func (result v128) ({lane_type}.eq (i32.const 0) (f32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) ({lane_type}.ne (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) ({lane_type}.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") """ def get_case_data(self): @@ -57,6 +65,178 @@ def get_case_data(self): case_data.append(['ne', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'], ['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', forms]) + # lt_s + # i64x2.lt_s (i64x2) (i64x2) + case_data.append(['#', 'lt_s']) + case_data.append(['#', 'i64x2.lt_s (i64x2) (i64x2)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['lt_s', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0x0000000000000000', '0x0000000000000000'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['0x0302010011100904', '0x1A0B0A12FFABAA1B'], + ['0x0302010011100904', '0x1A0B0A12FFABAA1B']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['lt_s', ['0xFFFFFFFFFFFFFFFF', '18446744073709551615'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0xFFFFFFFFFFFFFFFF', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0x8080808080808080', '9259542123273814144'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0x8080808080808080', '-9187201950435737472'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['0x8382818000FFFEFD', '0x7F020100FFFEFD80'], + ['-8970465120996032771', '9151878496576798080']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['lt_s', ['-1', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['0', '0'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['18446744073709551615', '18446744073709551615'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', ['18446744073709551615', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['18446744073709551615', '0'], ['18446744073709551615', '0']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['0', '18446744073709551615'], ['0', '18446744073709551615']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['lt_s', [['-9223372036854775807', '18446744073709551615'], + ['9223372036854775809', '-1']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['lt_s', [['0xc060000000000000', '0xc05fc00000000000'], + ['-128.0', '-127.0']], '0', ['i64x2', 'f64x2', 'i64x2']]) + case_data.append(['lt_s', [['0x3ff0000000000000', '0x405fc00000000000'], + ['1.0', '127.0']], '0', ['i64x2', 'f64x2', 'i64x2']]) + + # le_s + # i64x2.le_s (i64x2) (i64x2) + case_data.append(['#', 'le_s']) + case_data.append(['#', 'i64x2.le_s (i64x2) (i64x2)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['le_s', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0x0000000000000000', '0x0000000000000000'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0x0302010011100904', '0x1A0B0A12FFABAA1B'], + ['0x0302010011100904', '0x1A0B0A12FFABAA1B']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['le_s', ['0xFFFFFFFFFFFFFFFF', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0xFFFFFFFFFFFFFFFF', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0x8080808080808080', '9259542123273814144'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0x8080808080808080', '-9187201950435737472'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0x8382818000FFFEFD', '0x7F020100FFFEFD80'], + ['-8970465120996032771', '9151878496576798080']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['le_s', ['-1', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['0', '0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['18446744073709551615', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', ['18446744073709551615', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['18446744073709551615', '0'], ['18446744073709551615', '0']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0', '18446744073709551615'], ['0', '18446744073709551615']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['-9223372036854775807', '18446744073709551615'], + ['9223372036854775809', '-1']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['le_s', [['0xc060000000000000', '0xc05fc00000000000'], + ['-128.0', '-127.0']], '-1', ['i64x2', 'f64x2', 'i64x2']]) + case_data.append(['le_s', [['0x3ff0000000000000', '0x405fc00000000000'], + ['1.0', '127.0']], '-1', ['i64x2', 'f64x2', 'i64x2']]) + + # gt_s + # i64x2.gt_s (i64x2) (i64x2) + case_data.append(['#', 'gt_s']) + case_data.append(['#', 'i64x2.gt_s (i64x2) (i64x2)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['gt_s', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0x0000000000000000', '0x0000000000000000'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['0x0302010011100904', '0x1A0B0A12FFABAA1B'], + ['0x0302010011100904', '0x1A0B0A12FFABAA1B']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['gt_s', ['0xFFFFFFFFFFFFFFFF', '18446744073709551615'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0xFFFFFFFFFFFFFFFF', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0x8080808080808080', '9259542123273814144'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0x8080808080808080', '-9187201950435737472'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['0x8382818000FFFEFD', '0x7F020100FFFEFD80'], + ['-8970465120996032771', '9151878496576798080']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['gt_s', ['-1', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['0', '0'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['18446744073709551615', '18446744073709551615'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', ['18446744073709551615', '-1'], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['18446744073709551615', '0'], ['18446744073709551615', '0']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['0', '18446744073709551615'], ['0', '18446744073709551615']], '0', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['gt_s', [['-9223372036854775807', '18446744073709551615'], + ['9223372036854775809', '-1']], '0', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['gt_s', [['0xc060000000000000', '0xc05fc00000000000'], + ['-128.0', '-127.0']], '0', ['i64x2', 'f64x2', 'i64x2']]) + case_data.append(['gt_s', [['0x3ff0000000000000', '0x405fc00000000000'], + ['1.0', '127.0']], '0', ['i64x2', 'f64x2', 'i64x2']]) + + # ge_s + # i64x2.ge_s (i64x2) (i64x2) + case_data.append(['#', 'ge_s']) + case_data.append(['#', 'i64x2.ge_s (i64x2) (i64x2)']) + + # hex vs hex + case_data.append(['#', 'hex vs hex']) + case_data.append(['ge_s', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0x0000000000000000', '0x0000000000000000'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['0x0302010011100904', '0x1A0B0A12FFABAA1B'], + ['0x0302010011100904', '0x1A0B0A12FFABAA1B']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs dec + case_data.append(['#', 'hex vs dec']) + case_data.append(['ge_s', ['0xFFFFFFFFFFFFFFFF', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0xFFFFFFFFFFFFFFFF', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0x8080808080808080', '9259542123273814144'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0x8080808080808080', '-9187201950435737472'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['0x8382818000FFFEFD', '0x7F020100FFFEFD80'], + ['-8970465120996032771', '9151878496576798080']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # dec vs dec + case_data.append(['#', 'dec vs dec']) + case_data.append(['ge_s', ['-1', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['0', '0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['18446744073709551615', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', ['18446744073709551615', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['18446744073709551615', '0'], ['18446744073709551615', '0']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['0', '18446744073709551615'], ['0', '18446744073709551615']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['-9223372036854775807', '18446744073709551615'], + ['9223372036854775809', '-1']], '-1', ['i64x2', 'i64x2', 'i64x2']]) + + # hex vs float + case_data.append(['#', 'hex vs float']) + case_data.append(['ge_s', [['0xc060000000000000', '0xc05fc00000000000'], + ['-128.0', '-127.0']], '-1', ['i64x2', 'f64x2', 'i64x2']]) + case_data.append(['ge_s', [['0x3ff0000000000000', '0x405fc00000000000'], + ['1.0', '127.0']], '-1', ['i64x2', 'f64x2', 'i64x2']]) + return case_data diff --git a/test/core/simd/simd_i64x2_cmp.wast b/test/core/simd/simd_i64x2_cmp.wast index f59ff281ad..4dd4282206 100644 --- a/test/core/simd/simd_i64x2_cmp.wast +++ b/test/core/simd/simd_i64x2_cmp.wast @@ -4,6 +4,10 @@ (module (func (export "eq") (param $x v128) (param $y v128) (result v128) (i64x2.eq (local.get $x) (local.get $y))) (func (export "ne") (param $x v128) (param $y v128) (result v128) (i64x2.ne (local.get $x) (local.get $y))) + (func (export "lt_s") (param $x v128) (param $y v128) (result v128) (i64x2.lt_s (local.get $x) (local.get $y))) + (func (export "le_s") (param $x v128) (param $y v128) (result v128) (i64x2.le_s (local.get $x) (local.get $y))) + (func (export "gt_s") (param $x v128) (param $y v128) (result v128) (i64x2.gt_s (local.get $x) (local.get $y))) + (func (export "ge_s") (param $x v128) (param $y v128) (result v128) (i64x2.ge_s (local.get $x) (local.get $y))) ) @@ -65,10 +69,314 @@ (v128.const i64x2 0x03020100 0x11100904)) (v128.const i64x2 0 0)) +;; lt_s + +;; i64x2.lt_s (i64x2) (i64x2) + +;; hex vs hex +(assert_return (invoke "lt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B) + (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B)) + (v128.const i64x2 0 0)) + +;; hex vs dec +(assert_return (invoke "lt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 9259542123273814144 9259542123273814144)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 -9187201950435737472 -9187201950435737472)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x8382818000FFFEFD 0x7F020100FFFEFD80) + (v128.const i64x2 -8970465120996032771 9151878496576798080)) + (v128.const i64x2 0 0)) + +;; dec vs dec +(assert_return (invoke "lt_s" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 18446744073709551615 0) + (v128.const i64x2 18446744073709551615 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0 18446744073709551615) + (v128.const i64x2 0 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 -9223372036854775807 18446744073709551615) + (v128.const i64x2 9223372036854775809 -1)) + (v128.const i64x2 0 0)) + +;; hex vs float +(assert_return (invoke "lt_s" (v128.const i64x2 0xc060000000000000 0xc05fc00000000000) + (v128.const f64x2 -128.0 -127.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "lt_s" (v128.const i64x2 0x3ff0000000000000 0x405fc00000000000) + (v128.const f64x2 1.0 127.0)) + (v128.const i64x2 0 0)) + +;; le_s + +;; i64x2.le_s (i64x2) (i64x2) + +;; hex vs hex +(assert_return (invoke "le_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B) + (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B)) + (v128.const i64x2 -1 -1)) + +;; hex vs dec +(assert_return (invoke "le_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 9259542123273814144 9259542123273814144)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 -9187201950435737472 -9187201950435737472)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x8382818000FFFEFD 0x7F020100FFFEFD80) + (v128.const i64x2 -8970465120996032771 9151878496576798080)) + (v128.const i64x2 -1 -1)) + +;; dec vs dec +(assert_return (invoke "le_s" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 18446744073709551615 0) + (v128.const i64x2 18446744073709551615 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0 18446744073709551615) + (v128.const i64x2 0 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 -9223372036854775807 18446744073709551615) + (v128.const i64x2 9223372036854775809 -1)) + (v128.const i64x2 -1 -1)) + +;; hex vs float +(assert_return (invoke "le_s" (v128.const i64x2 0xc060000000000000 0xc05fc00000000000) + (v128.const f64x2 -128.0 -127.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0x3ff0000000000000 0x405fc00000000000) + (v128.const f64x2 1.0 127.0)) + (v128.const i64x2 -1 -1)) + +;; gt_s + +;; i64x2.gt_s (i64x2) (i64x2) + +;; hex vs hex +(assert_return (invoke "gt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B) + (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B)) + (v128.const i64x2 0 0)) + +;; hex vs dec +(assert_return (invoke "gt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 9259542123273814144 9259542123273814144)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 -9187201950435737472 -9187201950435737472)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x8382818000FFFEFD 0x7F020100FFFEFD80) + (v128.const i64x2 -8970465120996032771 9151878496576798080)) + (v128.const i64x2 0 0)) + +;; dec vs dec +(assert_return (invoke "gt_s" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 18446744073709551615 0) + (v128.const i64x2 18446744073709551615 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0 18446744073709551615) + (v128.const i64x2 0 18446744073709551615)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 -9223372036854775807 18446744073709551615) + (v128.const i64x2 9223372036854775809 -1)) + (v128.const i64x2 0 0)) + +;; hex vs float +(assert_return (invoke "gt_s" (v128.const i64x2 0xc060000000000000 0xc05fc00000000000) + (v128.const f64x2 -128.0 -127.0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "gt_s" (v128.const i64x2 0x3ff0000000000000 0x405fc00000000000) + (v128.const f64x2 1.0 127.0)) + (v128.const i64x2 0 0)) + +;; ge_s + +;; i64x2.ge_s (i64x2) (i64x2) + +;; hex vs hex +(assert_return (invoke "ge_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x0000000000000000 0x0000000000000000) + (v128.const i64x2 0x0000000000000000 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0) + (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F) + (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000) + (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B) + (v128.const i64x2 0x0302010011100904 0x1A0B0A12FFABAA1B)) + (v128.const i64x2 -1 -1)) + +;; hex vs dec +(assert_return (invoke "ge_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 9259542123273814144 9259542123273814144)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x8080808080808080 0x8080808080808080) + (v128.const i64x2 -9187201950435737472 -9187201950435737472)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x8382818000FFFEFD 0x7F020100FFFEFD80) + (v128.const i64x2 -8970465120996032771 9151878496576798080)) + (v128.const i64x2 -1 -1)) + +;; dec vs dec +(assert_return (invoke "ge_s" (v128.const i64x2 -1 -1) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0 0) + (v128.const i64x2 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 18446744073709551615 18446744073709551615) + (v128.const i64x2 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 18446744073709551615 0) + (v128.const i64x2 18446744073709551615 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0 18446744073709551615) + (v128.const i64x2 0 18446744073709551615)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 -9223372036854775807 18446744073709551615) + (v128.const i64x2 9223372036854775809 -1)) + (v128.const i64x2 -1 -1)) + +;; hex vs float +(assert_return (invoke "ge_s" (v128.const i64x2 0xc060000000000000 0xc05fc00000000000) + (v128.const f64x2 -128.0 -127.0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 0x3ff0000000000000 0x405fc00000000000) + (v128.const f64x2 1.0 127.0)) + (v128.const i64x2 -1 -1)) + ;; Type check (assert_invalid (module (func (result v128) (i64x2.eq (i32.const 0) (f32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (i64x2.ne (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.ge_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.gt_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.le_s (i32.const 0) (f32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.lt_s (i32.const 0) (f32.const 0)))) "type mismatch") ;; Test operation with empty argument From fe63095fd710a1ceb33ecc3e7dc200d7a1ba76bf Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 17:33:32 -0800 Subject: [PATCH 309/378] [interpreter] Implement i64x2.abs This was merged in #413. --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 +-- test/core/simd/meta/simd_int_arith2.py | 12 +++++++++++- test/core/simd/simd_i16x8_arith2.wast | 1 - 8 files changed, 17 insertions(+), 4 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 51be0c0aca..51adc91a31 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -375,6 +375,7 @@ let simd_prefix s = | 0x9fl -> i16x8_extmul_high_i8x16_u | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg + | 0xa2l -> i64x2_abs | 0xa3l -> i32x4_all_true | 0xa4l -> i32x4_bitmask | 0xa7l -> i32x4_widen_low_i16x8_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 4eb2545964..1722c37f37 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -350,6 +350,7 @@ let encode m = | Unary (V128 V128Op.(I32x4 WidenHighS)) -> simd_op 0xa8l | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal + | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xa2l | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l | Unary (V128 V128Op.(I64x2 WidenLowS)) -> simd_op 0xc7l | Unary (V128 V128Op.(I64x2 WidenHighS)) -> simd_op 0xc8l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 6741a0985f..2445f682a2 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -31,6 +31,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) + | I64x2 Abs -> to_value (SXX.I64x2.abs (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | I64x2 WidenLowS -> to_value (SXX.I64x2_convert.widen_low_s (of_value 1 v)) | I64x2 WidenHighS -> to_value (SXX.I64x2_convert.widen_high_s (of_value 1 v)) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 300aaf58a9..1c35568d83 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -398,6 +398,7 @@ let i64x2_lt_s = Binary (V128 V128Op.(I64x2 LtS)) let i64x2_le_s = Binary (V128 V128Op.(I64x2 LeS)) let i64x2_gt_s = Binary (V128 V128Op.(I64x2 GtS)) let i64x2_ge_s = Binary (V128 V128Op.(I64x2 GeS)) +let i64x2_abs = Unary (V128 V128Op.(I64x2 Abs)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) let i64x2_bitmask = SimdBitmask Simd.I64x2 let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 48c2b2c2c3..694c417c94 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -217,6 +217,7 @@ struct | I32x4 WidenHighU -> "i32x4.widen_high_i16x8_u" | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" + | I64x2 Abs -> "i64x2.abs" | I64x2 Neg -> "i64x2.neg" | I64x2 WidenLowS -> "i64x2.widen_low_i32x4_s" | I64x2 WidenHighS -> "i64x2.widen_high_i32x4_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 1636cd242b..f22fb35626 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -526,8 +526,7 @@ rule token = parse | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } | (simd_shape as s)".abs" - { only ["i8x16"; "i16x8"; "i32x4"; "f32x4"; "f64x2"] s lexbuf; - UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs unreachable f32x4_abs f64x2_abs) } + { UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } | "i8x16.popcnt" { UNARY i8x16_popcnt } | (simd_int_shape as s)".all_true" diff --git a/test/core/simd/meta/simd_int_arith2.py b/test/core/simd/meta/simd_int_arith2.py index 9bb0ae0a7c..342aea8541 100644 --- a/test/core/simd/meta/simd_int_arith2.py +++ b/test/core/simd/meta/simd_int_arith2.py @@ -523,6 +523,14 @@ def gen_test_cases(self): fp.write(self.get_all_cases()) +class Simdi64x2Case(SimdLaneWiseInteger): + LANE_TYPE = 'i64x2' + class_summary = """;; Tests for {lane_type} [abs] operations.""" + BINARY_OPS = () + + UNKNOWN_BINARY_OPS = () + + class Simdi32x4Case(SimdLaneWiseInteger): LANE_TYPE = 'i32x4' class_summary = """;; Tests for {lane_type} [min_s, min_u, max_s, max_u, abs] operations.""" @@ -537,7 +545,6 @@ class Simdi16x8Case(SimdLaneWiseInteger): BINARY_OPS = ('min_s', 'min_u', 'max_s', 'max_u', 'avgr_u') UNKNOWN_BINARY_OPS = ('i16x8.avgr', 'i16x8.avgr_s') - UNKNOWN_UNARY_OPS = ('i64x2.abs',) class Simdi8x16Case(SimdLaneWiseInteger): @@ -551,6 +558,9 @@ class Simdi8x16Case(SimdLaneWiseInteger): def gen_test_cases(): + simd_i64x2_case = Simdi64x2Case() + simd_i64x2_case.gen_test_cases() + simd_i32x4_case = Simdi32x4Case() simd_i32x4_case.gen_test_cases() diff --git a/test/core/simd/simd_i16x8_arith2.wast b/test/core/simd/simd_i16x8_arith2.wast index 1522e650c2..454f598df4 100644 --- a/test/core/simd/simd_i16x8_arith2.wast +++ b/test/core/simd/simd_i16x8_arith2.wast @@ -336,7 +336,6 @@ ;; Unknown operators (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") (assert_malformed (module quote "(memory 1) (func (result v128) (i16x8.avgr_s (v128.const i16x8 0 0 0 0 0 0 0 0) (v128.const i16x8 1 1 1 1 1 1 1 1)))") "unknown operator") -(assert_malformed (module quote "(memory 1) (func (result v128) (i64x2.abs (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)))") "unknown operator") ;; Type check (assert_invalid (module (func (result v128) (i16x8.min_s (i32.const 0) (f32.const 0.0)))) "type mismatch") From c300b8a9fc24eef3210de2df522bf8e330d442cf Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 16:42:41 -0800 Subject: [PATCH 310/378] [spec-text] Add i64x2 widen instructions to text and binary --- document/core/appendix/gen-index-instructions.py | 4 ++++ document/core/appendix/index-instructions.rst | 4 ++++ document/core/binary/instructions.rst | 4 ++++ document/core/text/instructions.rst | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 5daed12112..7b280f0888 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -470,6 +470,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I64X2.\WIDEN\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I64X2.\WIDEN\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I64X2.\WIDEN\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I64X2.\WIDEN\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 46055cda99..f79b7ba7ff 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -418,6 +418,10 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 291cb5c889..3b2a692976 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -668,6 +668,10 @@ All other SIMD instructions are plain opcodes without any immediates. \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64X2.\BITMASK \\ &&|& + \hex{FD}~~199{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_s} \\ &&|& + \hex{FD}~~200{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_s} \\ &&|& + \hex{FD}~~201{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_u} \\ &&|& + \hex{FD}~~202{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_u} \\ &&|& \hex{FD}~~203{:}\Bu32 &\Rightarrow& \I64X2.\VSHL \\ &&|& \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 0419a30752..38aa064d66 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -703,6 +703,10 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& \text{i64x2.all\_true} &\Rightarrow& \I64X2.\ALLTRUE\\ &&|& \text{i64x2.bitmask} &\Rightarrow& \I64X2.\BITMASK\\ &&|& + \text{i64x2.widen\_low\_i32x4\_s} &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_s} \\ &&|& + \text{i64x2.widen\_high\_i32x4\_s} &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_s} \\ &&|& + \text{i64x2.widen\_low\_i32x4\_u} &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_u} \\ &&|& + \text{i64x2.widen\_high\_i32x4\_u} &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_u} \\ &&|& \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& From 14436c031fcb7d62d297e14fd1df45b8b6d37fb6 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 16:50:20 -0800 Subject: [PATCH 311/378] [spectext] Add i8x16.popcnt to text and binary format --- document/core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 1 + document/core/binary/instructions.rst | 3 ++- document/core/text/instructions.rst | 3 ++- 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 7b280f0888..e7adc80424 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -425,6 +425,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~124', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index f79b7ba7ff..66143ba1a9 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -373,6 +373,7 @@ Instruction Binary Opcode Type :math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 3b2a692976..b5485dc676 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -607,7 +607,8 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~119{:}\Bu32 &\Rightarrow& \I8X16.\VMIN\K{\_u} \\ &&|& \hex{FD}~~120{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_s} \\ &&|& \hex{FD}~~121{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_u} \\ &&|& - \hex{FD}~~123{:}\Bu32 &\Rightarrow& \I8X16.\AVGR\K{\_u} \\ + \hex{FD}~~123{:}\Bu32 &\Rightarrow& \I8X16.\AVGR\K{\_u} \\ &&|& + \hex{FD}~~124{:}\Bu32 &\Rightarrow& \I8X16.\VPOPCNT \\ \end{array} .. math:: diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 38aa064d66..ce70c592a1 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -641,7 +641,8 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i8x16.min\_u} &\Rightarrow& \I8X16.\VMIN\K{\_u}\\ &&|& \text{i8x16.max\_s} &\Rightarrow& \I8X16.\VMAX\K{\_s}\\ &&|& \text{i8x16.max\_u} &\Rightarrow& \I8X16.\VMAX\K{\_u}\\ &&|& - \text{i8x16.avgr\_u} &\Rightarrow& \I8X16.\AVGR\K{\_u}\\ + \text{i8x16.avgr\_u} &\Rightarrow& \I8X16.\AVGR\K{\_u}\\ &&|& + \text{i8x16.popcnt} &\Rightarrow& \I8X16.\VPOPCNT\\ \end{array} .. math:: From ab6a3618e377a294eef44f8adcfbd7a9b995ce65 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 14:49:53 -0800 Subject: [PATCH 312/378] [spec-text] Add i64x2.abs This was merged in #413. --- document/core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 1 + document/core/binary/instructions.rst | 1 + document/core/syntax/instructions.rst | 4 ++-- document/core/text/instructions.rst | 1 + 5 files changed, 6 insertions(+), 2 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index e7adc80424..ae15d5c75e 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -469,6 +469,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I64X2.\VABS', r'\hex{FD}~~162', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I64X2.\WIDEN\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 66143ba1a9..87bd415b70 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -417,6 +417,7 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index b5485dc676..c1d4ccd82d 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -667,6 +667,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~162{:}\Bu32 &\Rightarrow& \I64X2.\VABS \\ &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64X2.\BITMASK \\ &&|& \hex{FD}~~199{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_s} \\ &&|& diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 293d54e266..cf10a67bcc 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -233,9 +233,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \fshape\K{.}\vfrelop \\&&|& \K{i8x16.}\viunop ~|~ \K{i16x8.}\viunop ~|~ - \K{i32x4.}\viunop \\&&|& + \K{i32x4.}\viunop ~|~ + \K{i64x2.}\viunop \\&&|& \K{i8x16.}\VPOPCNT \\&&|& - \K{i64x2.}\VNEG \\&&|& \fshape\K{.}\vfunop \\&&|& \ishape\K{.}\vitestop \\ &&|& \ishape\K{.}\BITMASK \\ &&|& diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index ce70c592a1..d7bbe9e185 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -701,6 +701,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i64x2.abs} &\Rightarrow& \I64X2.\VABS\\ &&|& \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& \text{i64x2.all\_true} &\Rightarrow& \I64X2.\ALLTRUE\\ &&|& \text{i64x2.bitmask} &\Rightarrow& \I64X2.\BITMASK\\ &&|& From 6dcabf6bdcdddf29a368a0caa9145987cdc1ae34 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 14:57:34 -0800 Subject: [PATCH 313/378] [spectext] Add i64x2 comparisons to text and binary format Missed adding these instructions in previous PRs. --- document/core/appendix/gen-index-instructions.py | 6 ++++++ document/core/appendix/index-instructions.rst | 6 ++++++ document/core/binary/instructions.rst | 11 +++++++++++ document/core/text/instructions.rst | 11 +++++++++++ 4 files changed, 34 insertions(+) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index ae15d5c75e..ad5607e1d4 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -386,6 +386,12 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\I64X2.\VEQ', r'\hex{FD}~~192', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I64X2.\VNE', r'\hex{FD}~~208', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I64X2.\VLT\K{\_s}', r'\hex{FD}~~116', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~122', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~238', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~226', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 87bd415b70..47ee2ba54c 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -334,6 +334,12 @@ Instruction Binary Opcode Type :math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index c1d4ccd82d..6c07445374 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -538,6 +538,17 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~64{:}\Bu32 &\Rightarrow& \I32X4.\VGE\K{\_u} \\ \end{array} +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~192{:}\Bu32 &\Rightarrow& \I64X2.\VEQ \\ &&|& + \hex{FD}~~208{:}\Bu32 &\Rightarrow& \I64X2.\VNE \\ &&|& + \hex{FD}~~116{:}\Bu32 &\Rightarrow& \I64X2.\VLT\K{\_s} \\ &&|& + \hex{FD}~~122{:}\Bu32 &\Rightarrow& \I64X2.\VGT\K{\_s} \\ &&|& + \hex{FD}~~238{:}\Bu32 &\Rightarrow& \I64X2.\VLE\K{\_s} \\ &&|& + \hex{FD}~~226{:}\Bu32 &\Rightarrow& \I64X2.\VGE\K{\_s} \\ &&|& + \end{array} + .. _binary-vfrelop: .. math:: diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index d7bbe9e185..b1fb6827fd 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -572,6 +572,17 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i32x4.ge\_u} &\Rightarrow& \I32X4.\VGE\K{\_u}\\ \end{array} +.. math:: + \begin{array}{llclll} + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \text{i64x2.eq} &\Rightarrow& \I64X2.\VEQ\\ &&|& + \text{i64x2.ne} &\Rightarrow& \I64X2.\VNE\\ &&|& + \text{i64x2.lt\_s} &\Rightarrow& \I64X2.\VLT\K{\_s}\\ &&|& + \text{i64x2.gt\_s} &\Rightarrow& \I64X2.\VGT\K{\_s}\\ &&|& + \text{i64x2.le\_s} &\Rightarrow& \I64X2.\VLE\K{\_s}\\ &&|& + \text{i64x2.ge\_s} &\Rightarrow& \I64X2.\VGE\K{\_s}\\ &&|& + \end{array} + .. _text-vfrelop: .. math:: From ebe26feaac7e63c3fb215d1ee243aa2544e15490 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 16:18:15 -0800 Subject: [PATCH 314/378] [spectext] Add extmul instructions to text/binary formats Missed them when adding the syntax and semantics previously. --- .../core/appendix/gen-index-instructions.py | 12 ++++++++++++ document/core/appendix/index-instructions.rst | 12 ++++++++++++ document/core/binary/instructions.rst | 18 +++++++++++++++--- document/core/exec/instructions.rst | 2 +- document/core/text/instructions.rst | 18 +++++++++++++++--- 5 files changed, 55 insertions(+), 7 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index ad5607e1d4..051f48ed49 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -457,6 +457,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~154', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~159', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), @@ -475,6 +479,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~187', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~189', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~190', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~191', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I64X2.\VABS', r'\hex{FD}~~162', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), @@ -489,6 +497,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~207', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~210', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~211', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~214', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~215', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 47ee2ba54c..4380ab2113 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -405,6 +405,10 @@ Instruction Binary Opcode Type :math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` @@ -423,6 +427,10 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` @@ -437,6 +445,10 @@ Instruction Binary Opcode Type :math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 6c07445374..6702e84292 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -649,7 +649,11 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~151{:}\Bu32 &\Rightarrow& \I16X8.\VMIN\K{\_u} \\ &&|& \hex{FD}~~152{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_s} \\ &&|& \hex{FD}~~153{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_u} \\ &&|& - \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ + \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ &&|& + \hex{FD}~~154{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& + \hex{FD}~~157{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& + \hex{FD}~~158{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& + \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ \end{array} .. math:: @@ -672,7 +676,11 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~182{:}\Bu32 &\Rightarrow& \I32X4.\VMIN\K{\_s} \\ &&|& \hex{FD}~~183{:}\Bu32 &\Rightarrow& \I32X4.\VMIN\K{\_u} \\ &&|& \hex{FD}~~184{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_s} \\ &&|& - \hex{FD}~~185{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_u} \\ + \hex{FD}~~185{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_u} \\ &&|& + \hex{FD}~~187{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& + \hex{FD}~~189{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_s}\\ &&|& + \hex{FD}~~190{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_u}\\ &&|& + \hex{FD}~~191{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_u}\\ \end{array} .. math:: @@ -691,7 +699,11 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~206{:}\Bu32 &\Rightarrow& \I64X2.\VADD \\ &&|& \hex{FD}~~207{:}\Bu32 &\Rightarrow& \I64X2.\ALLTRUE \\ &&|& \hex{FD}~~209{:}\Bu32 &\Rightarrow& \I64X2.\VSUB \\ &&|& - \hex{FD}~~213{:}\Bu32 &\Rightarrow& \I64X2.\VMUL \\ + \hex{FD}~~213{:}\Bu32 &\Rightarrow& \I64X2.\VMUL \\ &&|& + \hex{FD}~~210{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_s}\\ &&|& + \hex{FD}~~211{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_s}\\ &&|& + \hex{FD}~~214{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_u}\\ &&|& + \hex{FD}~~215{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_u}\\ \end{array} .. _binary-vfunop: diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 2029341702..a0d7b0d716 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -725,7 +725,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-simd-extmul: +.. _exec-simd-vextmul: :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx` and :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx` .................................................................................................................. diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index b1fb6827fd..717899099d 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -683,7 +683,11 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i16x8.min\_u} &\Rightarrow& \I16X8.\VMIN\K{\_u}\\ &&|& \text{i16x8.max\_s} &\Rightarrow& \I16X8.\VMAX\K{\_s}\\ &&|& \text{i16x8.max\_u} &\Rightarrow& \I16X8.\VMAX\K{\_u}\\ &&|& - \text{i16x8.avgr\_u} &\Rightarrow& \I16X8.\AVGR\K{\_u}\\ + \text{i16x8.avgr\_u} &\Rightarrow& \I16X8.\AVGR\K{\_u}\\ &&|& + \text{i16x8.extmul\_low\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& + \text{i16x8.extmul\_high\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& + \text{i16x8.extmul\_low\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& + \text{i16x8.extmul\_high\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ \end{array} .. math:: @@ -706,7 +710,11 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i32x4.min\_s} &\Rightarrow& \I32X4.\VMIN\K{\_s}\\ &&|& \text{i32x4.min\_u} &\Rightarrow& \I32X4.\VMIN\K{\_u}\\ &&|& \text{i32x4.max\_s} &\Rightarrow& \I32X4.\VMAX\K{\_s}\\ &&|& - \text{i32x4.max\_u} &\Rightarrow& \I32X4.\VMAX\K{\_u}\\ + \text{i32x4.max\_u} &\Rightarrow& \I32X4.\VMAX\K{\_u}\\ &&|& + \text{i32x4.extmul\_low\_i16x8\_s} &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& + \text{i32x4.extmul\_high\_i16x8\_s} &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_s}\\ &&|& + \text{i32x4.extmul\_low\_i16x8\_u} &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_u}\\ &&|& + \text{i32x4.extmul\_high\_i16x8\_u} &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_u}\\ \end{array} .. math:: @@ -725,7 +733,11 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& \text{i64x2.add} &\Rightarrow& \I64X2.\VADD\\ &&|& \text{i64x2.sub} &\Rightarrow& \I64X2.\VSUB\\ &&|& - \text{i64x2.mul} &\Rightarrow& \I64X2.\VMUL\\ + \text{i64x2.mul} &\Rightarrow& \I64X2.\VMUL\\ &&|& + \text{i64x2.extmul\_low\_i32x4\_s} &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_s}\\ &&|& + \text{i64x2.extmul\_high\_i32x4\_s} &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_s}\\ &&|& + \text{i64x2.extmul\_low\_i32x4\_u} &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_u}\\ &&|& + \text{i64x2.extmul\_high\_i32x4\_u} &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_u}\\ \end{array} .. _text-vfunop: From 7c43e093a2d24759f0c56600b9130096ab28d672 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Feb 2021 09:36:59 -0800 Subject: [PATCH 315/378] [interpreter] Implement store lane instructions (#435) v128.store8_lane v128.store16_lane v128.store32_lane v128.store64_lane Introduce a new ast type, SimdStoreLane. The exact binary opcodes for these instructions are not yet fixed, I've used the ones currently implement in V8 and LLVM/Binaryen, we can change those later. Also added a new test generation script, and the generated test files. * Fix indent in lexer * Simplify simd load/store lane validation * Inline store_simd_lane into eval.ml * Inline load_simd_lane into eval.ml --- interpreter/binary/decode.ml | 16 + interpreter/binary/encode.ml | 9 + interpreter/exec/eval.ml | 32 +- interpreter/runtime/memory.ml | 10 - interpreter/runtime/memory.mli | 2 - interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 9 + interpreter/text/arrange.ml | 7 +- interpreter/text/lexer.mll | 34 +- interpreter/text/parser.mly | 4 +- interpreter/valid/valid.ml | 14 +- test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_store_lane.py | 237 ++++++++++++++ test/core/simd/simd_store16_lane.wast | 299 +++++++++++++++++ test/core/simd/simd_store32_lane.wast | 199 ++++++++++++ test/core/simd/simd_store64_lane.wast | 131 ++++++++ test/core/simd/simd_store8_lane.wast | 427 +++++++++++++++++++++++++ 17 files changed, 1394 insertions(+), 38 deletions(-) create mode 100644 test/core/simd/meta/simd_store_lane.py create mode 100644 test/core/simd/simd_store16_lane.wast create mode 100644 test/core/simd/simd_store32_lane.wast create mode 100644 test/core/simd/simd_store64_lane.wast create mode 100644 test/core/simd/simd_store8_lane.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 51adc91a31..0ff11197eb 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -320,6 +320,22 @@ let simd_prefix s = let a, o = memop s in let lane = u8 s in v128_load64_lane a o lane + | 0x5cl -> + let a, o = memop s in + let lane = u8 s in + v128_store8_lane a o lane + | 0x5dl -> + let a, o = memop s in + let lane = u8 s in + v128_store16_lane a o lane + | 0x5el -> + let a, o = memop s in + let lane = u8 s in + v128_store32_lane a o lane + | 0x5fl -> + let a, o = memop s in + let lane = u8 s in + v128_store64_lane a o lane | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg | 0x62l -> v128_any_true diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 1722c37f37..56e3d93700 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -248,6 +248,15 @@ let encode m = | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo + | SimdStoreLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> + simd_op 0x5cl; memop mo; u8 i; + | SimdStoreLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> + simd_op 0x5dl; memop mo; u8 i; + | SimdStoreLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> + simd_op 0x5el; memop mo; u8 i; + | SimdStoreLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> + simd_op 0x5fl; memop mo; u8 i; + | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index ff86dbc1a4..4ee9bfc183 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -232,16 +232,26 @@ let rec step (c : config) : config = in v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdLoadLane ({offset; ty; sz; _}, j), V128 v128 :: I32 i :: vs' -> + | SimdLoadLane ({offset; ty; sz; _}, j), V128 v :: I32 i :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = match sz with | None -> assert false - | Some pack_size -> - V128 (Memory.load_simd_lane v128 pack_size mem addr offset ty j) - in v :: vs', [] + | Some Pack8 -> + V128.I8x16.replace_lane j v + (I32Value.of_value (Memory.load_packed Pack8 SX mem addr offset I32Type)) + | Some Pack16 -> + V128.I16x8.replace_lane j v + (I32Value.of_value (Memory.load_packed Pack16 SX mem addr offset I32Type)) + | Some Pack32 -> + V128.I32x4.replace_lane j v + (I32Value.of_value (Memory.load_value mem addr offset I32Type)) + | Some Pack64 -> + V128.I64x2.replace_lane j v + (I64Value.of_value (Memory.load_value mem addr offset I64Type)) + in V128 v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) | Store {offset; sz; _}, v :: I32 i :: vs' -> @@ -263,6 +273,20 @@ let rec step (c : config) : config = vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); + | SimdStoreLane ({offset; ty; sz; _}, j), V128 v :: I32 i :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let addr = I64_convert.extend_i32_u i in + (try + (match sz with + | None -> assert false + | Some Pack8 -> Memory.store_packed Pack8 mem addr offset (I32 (V128.I8x16.extract_lane_s j v)) + | Some Pack16 -> Memory.store_packed Pack16 mem addr offset (I32 (V128.I16x8.extract_lane_s j v)) + | Some Pack32 -> Memory.store_value mem addr offset (I32 (V128.I32x4.extract_lane_s j v)) + | Some Pack64 -> Memory.store_value mem addr offset (I64 (V128.I64x2.extract_lane_s j v)) + ); + vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) + | MemorySize, vs -> let mem = memory frame.inst (0l @@ e.at) in I32 (Memory.size mem) :: vs, [] diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 4a20c5a8b8..72ea1d5d0b 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -153,16 +153,6 @@ let load_simd_packed pack_size simd_load mem a o t = | Pack64, PackZero -> v | _ -> assert false -let load_simd_lane v pack_size mem a o t laneidx = - let n = packed_size pack_size in - assert (n < Types.size t); - let x = loadn mem a o n in - match pack_size with - | Pack8 -> V128.I8x16.replace_lane laneidx v (Int64.to_int32 x) - | Pack16 -> V128.I16x8.replace_lane laneidx v (Int64.to_int32 x) - | Pack32 -> V128.I32x4.replace_lane laneidx v (Int64.to_int32 x) - | Pack64 -> V128.I64x2.replace_lane laneidx v x - let store_packed sz mem a o v = assert (packed_size sz <= Types.size (Values.type_of v)); let n = packed_size sz in diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index efef5df64d..9505282374 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -38,8 +38,6 @@ val load_packed : val load_simd_packed : pack_size -> pack_simd -> memory -> address -> offset -> value_type -> V128.t (* raises Type, Bounds *) -val load_simd_lane : - V128.t -> pack_size -> memory -> address -> offset -> value_type -> int (* lane index *) -> V128.t val store_packed : pack_size -> memory -> address -> offset -> value -> unit (* raises Type, Bounds *) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index c9486da34f..077c08a2cf 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -151,6 +151,7 @@ and instr' = | SimdLoad of simd_loadop (* read memory at address *) | SimdLoadLane of simd_laneop (* read single lane at address *) | SimdStore of simd_storeop (* write memory at address *) + | SimdStoreLane of simd_laneop (* write single lane to address *) | MemorySize (* size of linear memory *) | MemoryGrow (* grow linear memory *) | Const of literal (* constant *) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 1c35568d83..e3351f844f 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -248,6 +248,15 @@ let v128_load32_lane align offset imm = let v128_load64_lane align offset imm = SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack64}, imm) +let v128_store8_lane align offset imm = + SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack8}, imm) +let v128_store16_lane align offset imm = + SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack16}, imm) +let v128_store32_lane align offset imm = + SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack32}, imm) +let v128_store64_lane align offset imm = + SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack64}, imm) + let v128_load32_zero align offset = SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackZero)} let v128_load64_zero align offset = diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 694c417c94..73422b6b0d 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -475,7 +475,7 @@ let simd_loadop (op : simd_loadop) = ) in memop ("load" ^ suffix) op (packed_size sz) -let simd_laneop (op, i) = +let simd_laneop instr (op, i) = match op.sz with | None -> assert false | Some sz -> @@ -485,7 +485,7 @@ let simd_laneop (op, i) = | Pack16 -> "16_lane" | Pack32 -> "32_lane" | Pack64 -> "64_lane" - in memop ("load" ^ suffix) op (packed_size sz) ^ " " ^ (nat i) + in memop (instr ^ suffix) op (packed_size sz) ^ " " ^ (nat i) let storeop op = match op.sz with @@ -538,7 +538,8 @@ let rec instr e = | GlobalSet x -> "global.set " ^ var x, [] | Load op -> loadop op, [] | SimdLoad op -> simd_loadop op, [] - | SimdLoadLane op -> simd_laneop op, [] + | SimdLoadLane op -> simd_laneop "load" op, [] + | SimdStoreLane op -> simd_laneop "store" op, [] | SimdStore op -> simd_storeop op, [] | Store op -> storeop op, [] | MemorySize -> "memory.size", [] diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index f22fb35626..d5f5ed121f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -289,31 +289,39 @@ rule token = parse (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } | "v128.load8x8_"(sign as s) - { LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } + { LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } | "v128.load16x4_"(sign as s) - { LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } + { LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } | "v128.load32x2_"(sign as s) - { LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } + { LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } | "v128.load8_splat" - { LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } + { LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } | "v128.load16_splat" - { LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } + { LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } | "v128.load32_splat" - { LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } + { LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } | "v128.load64_splat" - { LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } + { LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } | "v128.load32_zero" - { LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } + { LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } | "v128.load64_zero" - { LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } + { LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } | "v128.load8_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } + { SIMD_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } | "v128.load16_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load16_lane (opt a 1)) o i) } + { SIMD_LOAD_LANE (fun a o i -> (v128_load16_lane (opt a 1)) o i) } | "v128.load32_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load32_lane (opt a 2)) o i) } + { SIMD_LOAD_LANE (fun a o i -> (v128_load32_lane (opt a 2)) o i) } | "v128.load64_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load64_lane (opt a 3)) o i) } + { SIMD_LOAD_LANE (fun a o i -> (v128_load64_lane (opt a 3)) o i) } + | "v128.store8_lane" + { SIMD_STORE_LANE (fun a o i -> (v128_store8_lane (opt a 0)) o i) } + | "v128.store16_lane" + { SIMD_STORE_LANE (fun a o i -> (v128_store16_lane (opt a 1)) o i) } + | "v128.store32_lane" + { SIMD_STORE_LANE (fun a o i -> (v128_store32_lane (opt a 2)) o i) } + | "v128.store64_lane" + { SIMD_STORE_LANE (fun a o i -> (v128_store64_lane (opt a 3)) o i) } | (ixx as t)".store"(mem_size as sz) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; STORE (fun a o -> diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index d69ac52f79..185adc05a7 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -204,7 +204,7 @@ let inline_type_explicit (c : context) x ft at = %token NOP DROP BLOCK END IF THEN ELSE SELECT LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN %token LOCAL_GET LOCAL_SET LOCAL_TEE GLOBAL_GET GLOBAL_SET -%token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT SIMD_LOAD_LANE +%token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT SIMD_LOAD_LANE SIMD_STORE_LANE %token SPLAT EXTRACT_LANE REPLACE_LANE SHIFT SHUFFLE %token CONST V128_CONST UNARY BINARY TERNARY TEST COMPARE CONVERT %token UNREACHABLE MEMORY_SIZE MEMORY_GROW @@ -233,6 +233,7 @@ let inline_type_explicit (c : context) x ft at = %token CONVERT %token Memory.offset -> Ast.instr'> LOAD %token Memory.offset -> int -> Ast.instr'> SIMD_LOAD_LANE +%token Memory.offset -> int -> Ast.instr'> SIMD_STORE_LANE %token SPLAT %token Ast.instr'> EXTRACT_LANE %token Ast.instr'> REPLACE_LANE @@ -387,6 +388,7 @@ plain_instr : | GLOBAL_SET var { fun c -> global_set ($2 c global) } | LOAD offset_opt align_opt { fun c -> $1 $3 $2 } | SIMD_LOAD_LANE offset_opt align_opt NAT { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } + | SIMD_STORE_LANE offset_opt align_opt NAT { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } | STORE offset_opt align_opt { fun c -> $1 $3 $2 } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 7f195aa57d..524887b593 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -309,11 +309,9 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = | SimdLoadLane (memop, i) -> check_memop c memop (fun o -> o) e.at; - (match memop.sz with - | Some pack_size -> - require (i < 16 / packed_size pack_size) e.at "invalid lane index"; - [I32Type; V128Type] --> [memop.ty] - | _ -> assert false) + let sz = Lib.Option.get memop.sz Pack8 in + require (i < 16 / packed_size sz) e.at "invalid lane index"; + [I32Type; V128Type] --> [memop.ty] | Store memop -> check_memop c memop (fun sz -> sz) e.at; @@ -323,6 +321,12 @@ let rec check_instr (c : context) (e : instr) (s : infer_stack_type) : op_type = check_memop c memop (fun _ -> None) e.at; [I32Type; memop.ty] --> [] + | SimdStoreLane (memop, i) -> + check_memop c memop (fun o -> o) e.at; + let sz = Lib.Option.get memop.sz Pack8 in + require (i < 16 / packed_size sz) e.at "invalid lane index"; + [I32Type; V128Type] --> [] + | MemorySize -> ignore (memory c (0l @@ e.at)); [] --> [I32Type] diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index d3a1768f70..fdee79f10e 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -33,6 +33,7 @@ 'simd_f64x2_pmin_pmax', 'simd_i32x4_dot_i16x8', 'simd_load_lane', + 'simd_store_lane', 'simd_ext_mul', 'simd_int_to_int_widen', ) diff --git a/test/core/simd/meta/simd_store_lane.py b/test/core/simd/meta/simd_store_lane.py new file mode 100644 index 0000000000..f0a8e284fe --- /dev/null +++ b/test/core/simd/meta/simd_store_lane.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python3 + +from simd import SIMD +from test_assert import AssertReturn, AssertInvalid + +def list_stringify(l): + return list(map(lambda x: str(x), l)) + +"""Base class for generating SIMD store lane tests. Subclasses only to: + - define self.LANE_LEN, self.LANE_TYPE, self.NUM_LANES, self.MAX_ALIGN + - override get_normal_case to provide test data (consult comments for details) + +It generates test cases that: + - store to all valid lane indices + - store using memarg offset + - store with memarg alignment + - store with invalid lane index + - store with invalid memarg alignment + - fails typecheck +""" +class SimdStoreLane: + def valid_alignments(self): + return [a for a in range(1, self.MAX_ALIGN+1) if a & (a-1) == 0] + + def get_case_data(self): + # return value should be a list of tuples: + # (address to store to : i32, v128, return value : v128) + # e.g. [(0, [0x0100, 0, 0, 0, 0, 0, 0, 0]), ... ] + # the expected result is return_value[address]. + raise Exception("Subclasses should override this to provide test data") + + def get_normal_case(self): + s = SIMD() + cases = [] + + # store using arg + for (addr, ret) in self.get_case_data(): + i32_addr = s.const(addr, "i32") + v128_val = s.v128_const(list_stringify(ret), self.LANE_TYPE) + result = s.const(ret[addr], "i64") + instr = "v128.store{lane_len}_lane_{idx}".format(lane_len=self.LANE_LEN, idx=addr) + cases.append(str(AssertReturn(instr, [i32_addr, v128_val], result))) + + # store using offset + for (addr, ret) in self.get_case_data(): + v128_val = s.v128_const(list_stringify(ret), self.LANE_TYPE) + result = s.const(ret[addr], "i64") + instr = "v128.store{lane_len}_lane_{idx}_offset_{idx}".format(lane_len=self.LANE_LEN, idx=addr) + cases.append(str(AssertReturn(instr, [v128_val], result))) + + # store using offset with alignment + for (addr, ret) in self.get_case_data(): + for align in self.valid_alignments(): + i32_addr = s.const(addr, "i32") + v128_val = s.v128_const(list_stringify(ret), self.LANE_TYPE) + result = s.const(ret[addr], "i64") + instr = "v128.store{lane_len}_lane_{idx}_align_{align}".format(lane_len=self.LANE_LEN, idx=addr, align=align) + cases.append(str(AssertReturn(instr, [i32_addr, v128_val], result))) + + return '\n'.join(cases) + + def gen_test_func_template(self): + template = [ + ';; Tests for store lane operations.\n\n', + '(module', + ' (memory 1)', + ' (global $zero (mut v128) (v128.const i32x4 0 0 0 0))', + ] + + lane_indices = list(range(self.NUM_LANES)) + + # store using i32.const arg + for idx in lane_indices: + template.append( + ' (func (export "v128.store{lane_len}_lane_{idx}")\n' + ' (param $address i32) (param $x v128) (result i64) (local $ret i64)\n' + ' (v128.store{lane_len}_lane {idx} (local.get $address) (local.get $x))\n' + ' (local.set $ret (i64.load (local.get $address)))\n' + ' (v128.store (local.get $address) (global.get $zero))' + ' (local.get $ret))' + .format(idx=idx, lane_len=self.LANE_LEN)) + + # store using memarg offset + for idx in lane_indices: + template.append( + ' (func (export "v128.store{lane_len}_lane_{idx}_offset_{idx}")\n' + ' (param $x v128) (result i64) (local $ret i64)\n' + ' (v128.store{lane_len}_lane offset={idx} {idx} (i32.const 0) (local.get $x))\n' + ' (local.set $ret (i64.load offset={idx} (i32.const 0)))\n' + ' (v128.store offset={idx} (i32.const 0) (global.get $zero))\n' + ' (local.get $ret))' + .format(idx=idx, lane_len=self.LANE_LEN)) + + # with memarg aligment + for idx in lane_indices: + for align in self.valid_alignments(): + template.append( + ' (func (export "v128.store{lane_len}_lane_{idx}_align_{align}")\n' + ' (param $address i32) (param $x v128) (result i64) (local $ret i64)\n' + ' (v128.store{lane_len}_lane align={align} {idx} (local.get $address) (local.get $x))\n' + ' (local.set $ret (i64.load (local.get $address)))\n' + ' (v128.store offset={idx} (i32.const 0) (global.get $zero))\n' + ' (local.get $ret))' + .format(idx=idx, lane_len=self.LANE_LEN, align=align)) + + template.append(')\n') + return template + + def gen_test_template(self): + template = self.gen_test_func_template() + + template.append('{normal_cases}') + template.append('\n{invalid_cases}') + + return '\n'.join(template) + + def get_invalid_cases(self): + invalid_cases = [';; type check'] + invalid_cases.append( + '(assert_invalid' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.store{lane_len}_lane 0 (local.get $x) (i32.const 0))))\n' + ' "type mismatch")'.format(lane_len=self.LANE_LEN)) + invalid_cases.append('') + + invalid_cases.append(';; invalid lane index') + invalid_cases.append( + '(assert_invalid' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.store{lane_len}_lane {idx} (i32.const 0) (local.get $x))))\n' + ' "invalid lane index")'.format(idx=self.NUM_LANES, lane_len=self.LANE_LEN)) + + invalid_cases.append('') + + invalid_cases.append(';; invalid memarg alignment') + invalid_cases.append( + '(assert_invalid\n' + ' (module (memory 1)\n' + ' (func (param $x v128) (result v128)\n' + ' (v128.store{lane_len}_lane align={align} 0 (i32.const 0) (local.get $x))))\n' + ' "alignment must not be larger than natural")' + .format(lane_len=self.LANE_LEN, align=self.MAX_ALIGN*2)) + return '\n'.join(invalid_cases) + + def get_all_cases(self): + case_data = {'lane_len': self.LANE_LEN, + 'normal_cases': self.get_normal_case(), + 'invalid_cases': self.get_invalid_cases(), + } + return self.gen_test_template().format(**case_data) + + def gen_test_cases(self): + wast_filename = '../simd_store{lane_type}_lane.wast'.format(lane_type=self.LANE_LEN) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + +class SimdStore8Lane(SimdStoreLane): + LANE_LEN = '8' + LANE_TYPE = 'i8x16' + NUM_LANES = 16 + MAX_ALIGN = 1 + + def get_case_data(self): + return [ + (0, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (1, [0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (2, [0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (3, [0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (4, [0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (5, [0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (6, [0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0]), + (7, [0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0]), + (8, [0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0]), + (9, [0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0]), + (10, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0]), + (11, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0]), + (12, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0]), + (13, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13, 0, 0]), + (14, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 0]), + (15, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15])] + +class SimdStore16Lane(SimdStoreLane): + LANE_LEN = '16' + LANE_TYPE = 'i16x8' + NUM_LANES = 8 + MAX_ALIGN = 2 + + def get_case_data(self): + return [ + (0, [0x0100, 0, 0, 0, 0, 0, 0, 0]), + (1, [0, 0x0201, 0, 0, 0, 0, 0, 0]), + (2, [0, 0, 0x0302, 0, 0, 0, 0, 0]), + (3, [0, 0, 0, 0x0403, 0, 0, 0, 0]), + (4, [0, 0, 0, 0, 0x0504, 0, 0, 0]), + (5, [0, 0, 0, 0, 0, 0x0605, 0, 0]), + (6, [0, 0, 0, 0, 0, 0, 0x0706, 0]), + (7, [0, 0, 0, 0, 0, 0, 0, 0x0807])] + +class SimdStore32Lane(SimdStoreLane): + LANE_LEN = '32' + LANE_TYPE = 'i32x4' + NUM_LANES = 4 + MAX_ALIGN = 4 + + def get_case_data(self): + return [ + (0, [0x03020100, 0, 0, 0,]), + (1, [0, 0x04030201, 0, 0,]), + (2, [0, 0, 0x05040302, 0,]), + (3, [0, 0, 0, 0x06050403,])] + +class SimdStore64Lane(SimdStoreLane): + LANE_LEN = '64' + LANE_TYPE = 'i64x2' + NUM_LANES = 2 + MAX_ALIGN = 8 + + def get_case_data(self): + return [ + (0, [0x0706050403020100, 0]), + (1, [0, 0x0807060504030201])] + +def gen_test_cases(): + simd_store8_lane = SimdStore8Lane() + simd_store8_lane.gen_test_cases() + simd_store16_lane = SimdStore16Lane() + simd_store16_lane.gen_test_cases() + simd_store32_lane = SimdStore32Lane() + simd_store32_lane.gen_test_cases() + simd_store64_lane = SimdStore64Lane() + simd_store64_lane.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/simd_store16_lane.wast b/test/core/simd/simd_store16_lane.wast new file mode 100644 index 0000000000..d8ea35c3fa --- /dev/null +++ b/test/core/simd/simd_store16_lane.wast @@ -0,0 +1,299 @@ +;; Tests for store lane operations. + + +(module + (memory 1) + (global $zero (mut v128) (v128.const i32x4 0 0 0 0)) + (func (export "v128.store16_lane_0") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_3") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 4 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_5") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 5 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_6") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 6 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_7") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane 7 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store16_lane_0_offset_0") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=0 0 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=0 (i32.const 0))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_1_offset_1") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=1 1 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=1 (i32.const 0))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_2_offset_2") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=2 2 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=2 (i32.const 0))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_3_offset_3") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=3 3 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=3 (i32.const 0))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_4_offset_4") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=4 4 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=4 (i32.const 0))) + (v128.store offset=4 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_5_offset_5") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=5 5 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=5 (i32.const 0))) + (v128.store offset=5 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_6_offset_6") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=6 6 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=6 (i32.const 0))) + (v128.store offset=6 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_7_offset_7") + (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane offset=7 7 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=7 (i32.const 0))) + (v128.store offset=7 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_0_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_0_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_1_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_1_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_2_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_2_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_3_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_3_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_4_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 4 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=4 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_4_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 4 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=4 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_5_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 5 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=5 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_5_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 5 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=5 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_6_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 6 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=6 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_6_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 6 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=6 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_7_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=1 7 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=7 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store16_lane_7_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store16_lane align=2 7 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=7 (i32.const 0) (global.get $zero)) + (local.get $ret)) +) + +(assert_return (invoke "v128.store16_lane_0" (i32.const 0) + (v128.const i16x8 256 0 0 0 0 0 0 0)) + (i64.const 256)) +(assert_return (invoke "v128.store16_lane_1" (i32.const 1) + (v128.const i16x8 0 513 0 0 0 0 0 0)) + (i64.const 513)) +(assert_return (invoke "v128.store16_lane_2" (i32.const 2) + (v128.const i16x8 0 0 770 0 0 0 0 0)) + (i64.const 770)) +(assert_return (invoke "v128.store16_lane_3" (i32.const 3) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) + (i64.const 1027)) +(assert_return (invoke "v128.store16_lane_4" (i32.const 4) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) + (i64.const 1284)) +(assert_return (invoke "v128.store16_lane_5" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) + (i64.const 1541)) +(assert_return (invoke "v128.store16_lane_6" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) + (i64.const 1798)) +(assert_return (invoke "v128.store16_lane_7" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) + (i64.const 2055)) +(assert_return (invoke "v128.store16_lane_0_offset_0" (v128.const i16x8 256 0 0 0 0 0 0 0)) + (i64.const 256)) +(assert_return (invoke "v128.store16_lane_1_offset_1" (v128.const i16x8 0 513 0 0 0 0 0 0)) + (i64.const 513)) +(assert_return (invoke "v128.store16_lane_2_offset_2" (v128.const i16x8 0 0 770 0 0 0 0 0)) + (i64.const 770)) +(assert_return (invoke "v128.store16_lane_3_offset_3" (v128.const i16x8 0 0 0 1027 0 0 0 0)) + (i64.const 1027)) +(assert_return (invoke "v128.store16_lane_4_offset_4" (v128.const i16x8 0 0 0 0 1284 0 0 0)) + (i64.const 1284)) +(assert_return (invoke "v128.store16_lane_5_offset_5" (v128.const i16x8 0 0 0 0 0 1541 0 0)) + (i64.const 1541)) +(assert_return (invoke "v128.store16_lane_6_offset_6" (v128.const i16x8 0 0 0 0 0 0 1798 0)) + (i64.const 1798)) +(assert_return (invoke "v128.store16_lane_7_offset_7" (v128.const i16x8 0 0 0 0 0 0 0 2055)) + (i64.const 2055)) +(assert_return (invoke "v128.store16_lane_0_align_1" (i32.const 0) + (v128.const i16x8 256 0 0 0 0 0 0 0)) + (i64.const 256)) +(assert_return (invoke "v128.store16_lane_0_align_2" (i32.const 0) + (v128.const i16x8 256 0 0 0 0 0 0 0)) + (i64.const 256)) +(assert_return (invoke "v128.store16_lane_1_align_1" (i32.const 1) + (v128.const i16x8 0 513 0 0 0 0 0 0)) + (i64.const 513)) +(assert_return (invoke "v128.store16_lane_1_align_2" (i32.const 1) + (v128.const i16x8 0 513 0 0 0 0 0 0)) + (i64.const 513)) +(assert_return (invoke "v128.store16_lane_2_align_1" (i32.const 2) + (v128.const i16x8 0 0 770 0 0 0 0 0)) + (i64.const 770)) +(assert_return (invoke "v128.store16_lane_2_align_2" (i32.const 2) + (v128.const i16x8 0 0 770 0 0 0 0 0)) + (i64.const 770)) +(assert_return (invoke "v128.store16_lane_3_align_1" (i32.const 3) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) + (i64.const 1027)) +(assert_return (invoke "v128.store16_lane_3_align_2" (i32.const 3) + (v128.const i16x8 0 0 0 1027 0 0 0 0)) + (i64.const 1027)) +(assert_return (invoke "v128.store16_lane_4_align_1" (i32.const 4) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) + (i64.const 1284)) +(assert_return (invoke "v128.store16_lane_4_align_2" (i32.const 4) + (v128.const i16x8 0 0 0 0 1284 0 0 0)) + (i64.const 1284)) +(assert_return (invoke "v128.store16_lane_5_align_1" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) + (i64.const 1541)) +(assert_return (invoke "v128.store16_lane_5_align_2" (i32.const 5) + (v128.const i16x8 0 0 0 0 0 1541 0 0)) + (i64.const 1541)) +(assert_return (invoke "v128.store16_lane_6_align_1" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) + (i64.const 1798)) +(assert_return (invoke "v128.store16_lane_6_align_2" (i32.const 6) + (v128.const i16x8 0 0 0 0 0 0 1798 0)) + (i64.const 1798)) +(assert_return (invoke "v128.store16_lane_7_align_1" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) + (i64.const 2055)) +(assert_return (invoke "v128.store16_lane_7_align_2" (i32.const 7) + (v128.const i16x8 0 0 0 0 0 0 0 2055)) + (i64.const 2055)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store16_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store16_lane 8 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.store16_lane align=4 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_store32_lane.wast b/test/core/simd/simd_store32_lane.wast new file mode 100644 index 0000000000..847bab9e6f --- /dev/null +++ b/test/core/simd/simd_store32_lane.wast @@ -0,0 +1,199 @@ +;; Tests for store lane operations. + + +(module + (memory 1) + (global $zero (mut v128) (v128.const i32x4 0 0 0 0)) + (func (export "v128.store32_lane_0") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store32_lane_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store32_lane_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store32_lane_3") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store32_lane_0_offset_0") + (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane offset=0 0 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=0 (i32.const 0))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_1_offset_1") + (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane offset=1 1 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=1 (i32.const 0))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_2_offset_2") + (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane offset=2 2 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=2 (i32.const 0))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_3_offset_3") + (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane offset=3 3 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=3 (i32.const 0))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_0_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=1 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_0_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=2 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_0_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=4 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_1_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=1 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_1_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=2 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_1_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=4 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_2_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=1 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_2_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=2 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_2_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=4 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_3_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=1 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_3_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=2 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store32_lane_3_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store32_lane align=4 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) +) + +(assert_return (invoke "v128.store32_lane_0" (i32.const 0) + (v128.const i32x4 50462976 0 0 0)) + (i64.const 50462976)) +(assert_return (invoke "v128.store32_lane_1" (i32.const 1) + (v128.const i32x4 0 67305985 0 0)) + (i64.const 67305985)) +(assert_return (invoke "v128.store32_lane_2" (i32.const 2) + (v128.const i32x4 0 0 84148994 0)) + (i64.const 84148994)) +(assert_return (invoke "v128.store32_lane_3" (i32.const 3) + (v128.const i32x4 0 0 0 100992003)) + (i64.const 100992003)) +(assert_return (invoke "v128.store32_lane_0_offset_0" (v128.const i32x4 50462976 0 0 0)) + (i64.const 50462976)) +(assert_return (invoke "v128.store32_lane_1_offset_1" (v128.const i32x4 0 67305985 0 0)) + (i64.const 67305985)) +(assert_return (invoke "v128.store32_lane_2_offset_2" (v128.const i32x4 0 0 84148994 0)) + (i64.const 84148994)) +(assert_return (invoke "v128.store32_lane_3_offset_3" (v128.const i32x4 0 0 0 100992003)) + (i64.const 100992003)) +(assert_return (invoke "v128.store32_lane_0_align_1" (i32.const 0) + (v128.const i32x4 50462976 0 0 0)) + (i64.const 50462976)) +(assert_return (invoke "v128.store32_lane_0_align_2" (i32.const 0) + (v128.const i32x4 50462976 0 0 0)) + (i64.const 50462976)) +(assert_return (invoke "v128.store32_lane_0_align_4" (i32.const 0) + (v128.const i32x4 50462976 0 0 0)) + (i64.const 50462976)) +(assert_return (invoke "v128.store32_lane_1_align_1" (i32.const 1) + (v128.const i32x4 0 67305985 0 0)) + (i64.const 67305985)) +(assert_return (invoke "v128.store32_lane_1_align_2" (i32.const 1) + (v128.const i32x4 0 67305985 0 0)) + (i64.const 67305985)) +(assert_return (invoke "v128.store32_lane_1_align_4" (i32.const 1) + (v128.const i32x4 0 67305985 0 0)) + (i64.const 67305985)) +(assert_return (invoke "v128.store32_lane_2_align_1" (i32.const 2) + (v128.const i32x4 0 0 84148994 0)) + (i64.const 84148994)) +(assert_return (invoke "v128.store32_lane_2_align_2" (i32.const 2) + (v128.const i32x4 0 0 84148994 0)) + (i64.const 84148994)) +(assert_return (invoke "v128.store32_lane_2_align_4" (i32.const 2) + (v128.const i32x4 0 0 84148994 0)) + (i64.const 84148994)) +(assert_return (invoke "v128.store32_lane_3_align_1" (i32.const 3) + (v128.const i32x4 0 0 0 100992003)) + (i64.const 100992003)) +(assert_return (invoke "v128.store32_lane_3_align_2" (i32.const 3) + (v128.const i32x4 0 0 0 100992003)) + (i64.const 100992003)) +(assert_return (invoke "v128.store32_lane_3_align_4" (i32.const 3) + (v128.const i32x4 0 0 0 100992003)) + (i64.const 100992003)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store32_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store32_lane 4 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.store32_lane align=8 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_store64_lane.wast b/test/core/simd/simd_store64_lane.wast new file mode 100644 index 0000000000..2ed1dcd689 --- /dev/null +++ b/test/core/simd/simd_store64_lane.wast @@ -0,0 +1,131 @@ +;; Tests for store lane operations. + + +(module + (memory 1) + (global $zero (mut v128) (v128.const i32x4 0 0 0 0)) + (func (export "v128.store64_lane_0") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store64_lane_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store64_lane_0_offset_0") + (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane offset=0 0 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=0 (i32.const 0))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_1_offset_1") + (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane offset=1 1 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=1 (i32.const 0))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_0_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=1 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_0_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=2 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_0_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=4 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_0_align_8") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=8 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_1_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=1 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_1_align_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=2 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_1_align_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=4 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store64_lane_1_align_8") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store64_lane align=8 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) +) + +(assert_return (invoke "v128.store64_lane_0" (i32.const 0) + (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_1" (i32.const 1) + (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) +(assert_return (invoke "v128.store64_lane_0_offset_0" (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_1_offset_1" (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) +(assert_return (invoke "v128.store64_lane_0_align_1" (i32.const 0) + (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_0_align_2" (i32.const 0) + (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_0_align_4" (i32.const 0) + (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_0_align_8" (i32.const 0) + (v128.const i64x2 506097522914230528 0)) + (i64.const 506097522914230528)) +(assert_return (invoke "v128.store64_lane_1_align_1" (i32.const 1) + (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) +(assert_return (invoke "v128.store64_lane_1_align_2" (i32.const 1) + (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) +(assert_return (invoke "v128.store64_lane_1_align_4" (i32.const 1) + (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) +(assert_return (invoke "v128.store64_lane_1_align_8" (i32.const 1) + (v128.const i64x2 0 578437695752307201)) + (i64.const 578437695752307201)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store64_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store64_lane 2 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.store64_lane align=16 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file diff --git a/test/core/simd/simd_store8_lane.wast b/test/core/simd/simd_store8_lane.wast new file mode 100644 index 0000000000..7258a40dd2 --- /dev/null +++ b/test/core/simd/simd_store8_lane.wast @@ -0,0 +1,427 @@ +;; Tests for store lane operations. + + +(module + (memory 1) + (global $zero (mut v128) (v128.const i32x4 0 0 0 0)) + (func (export "v128.store8_lane_0") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_2") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_3") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_4") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 4 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_5") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 5 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_6") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 6 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_7") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 7 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_8") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 8 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_9") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 9 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_10") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 10 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_11") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 11 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_12") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 12 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_13") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 13 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_14") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 14 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_15") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane 15 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store (local.get $address) (global.get $zero)) (local.get $ret)) + (func (export "v128.store8_lane_0_offset_0") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=0 0 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=0 (i32.const 0))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_1_offset_1") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=1 1 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=1 (i32.const 0))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_2_offset_2") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=2 2 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=2 (i32.const 0))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_3_offset_3") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=3 3 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=3 (i32.const 0))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_4_offset_4") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=4 4 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=4 (i32.const 0))) + (v128.store offset=4 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_5_offset_5") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=5 5 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=5 (i32.const 0))) + (v128.store offset=5 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_6_offset_6") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=6 6 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=6 (i32.const 0))) + (v128.store offset=6 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_7_offset_7") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=7 7 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=7 (i32.const 0))) + (v128.store offset=7 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_8_offset_8") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=8 8 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=8 (i32.const 0))) + (v128.store offset=8 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_9_offset_9") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=9 9 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=9 (i32.const 0))) + (v128.store offset=9 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_10_offset_10") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=10 10 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=10 (i32.const 0))) + (v128.store offset=10 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_11_offset_11") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=11 11 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=11 (i32.const 0))) + (v128.store offset=11 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_12_offset_12") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=12 12 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=12 (i32.const 0))) + (v128.store offset=12 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_13_offset_13") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=13 13 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=13 (i32.const 0))) + (v128.store offset=13 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_14_offset_14") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=14 14 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=14 (i32.const 0))) + (v128.store offset=14 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_15_offset_15") + (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane offset=15 15 (i32.const 0) (local.get $x)) + (local.set $ret (i64.load offset=15 (i32.const 0))) + (v128.store offset=15 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_0_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 0 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=0 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_1_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 1 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=1 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_2_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 2 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=2 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_3_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 3 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=3 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_4_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 4 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=4 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_5_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 5 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=5 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_6_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 6 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=6 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_7_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 7 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=7 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_8_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 8 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=8 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_9_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 9 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=9 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_10_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 10 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=10 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_11_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 11 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=11 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_12_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 12 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=12 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_13_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 13 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=13 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_14_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 14 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=14 (i32.const 0) (global.get $zero)) + (local.get $ret)) + (func (export "v128.store8_lane_15_align_1") + (param $address i32) (param $x v128) (result i64) (local $ret i64) + (v128.store8_lane align=1 15 (local.get $address) (local.get $x)) + (local.set $ret (i64.load (local.get $address))) + (v128.store offset=15 (i32.const 0) (global.get $zero)) + (local.get $ret)) +) + +(assert_return (invoke "v128.store8_lane_0" (i32.const 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 0)) +(assert_return (invoke "v128.store8_lane_1" (i32.const 1) + (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 1)) +(assert_return (invoke "v128.store8_lane_2" (i32.const 2) + (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 2)) +(assert_return (invoke "v128.store8_lane_3" (i32.const 3) + (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 3)) +(assert_return (invoke "v128.store8_lane_4" (i32.const 4) + (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 4)) +(assert_return (invoke "v128.store8_lane_5" (i32.const 5) + (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) + (i64.const 5)) +(assert_return (invoke "v128.store8_lane_6" (i32.const 6) + (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) + (i64.const 6)) +(assert_return (invoke "v128.store8_lane_7" (i32.const 7) + (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) + (i64.const 7)) +(assert_return (invoke "v128.store8_lane_8" (i32.const 8) + (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) + (i64.const 8)) +(assert_return (invoke "v128.store8_lane_9" (i32.const 9) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) + (i64.const 9)) +(assert_return (invoke "v128.store8_lane_10" (i32.const 10) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) + (i64.const 10)) +(assert_return (invoke "v128.store8_lane_11" (i32.const 11) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) + (i64.const 11)) +(assert_return (invoke "v128.store8_lane_12" (i32.const 12) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) + (i64.const 12)) +(assert_return (invoke "v128.store8_lane_13" (i32.const 13) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) + (i64.const 13)) +(assert_return (invoke "v128.store8_lane_14" (i32.const 14) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) + (i64.const 14)) +(assert_return (invoke "v128.store8_lane_15" (i32.const 15) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) + (i64.const 15)) +(assert_return (invoke "v128.store8_lane_0_offset_0" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 0)) +(assert_return (invoke "v128.store8_lane_1_offset_1" (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 1)) +(assert_return (invoke "v128.store8_lane_2_offset_2" (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 2)) +(assert_return (invoke "v128.store8_lane_3_offset_3" (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 3)) +(assert_return (invoke "v128.store8_lane_4_offset_4" (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 4)) +(assert_return (invoke "v128.store8_lane_5_offset_5" (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) + (i64.const 5)) +(assert_return (invoke "v128.store8_lane_6_offset_6" (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) + (i64.const 6)) +(assert_return (invoke "v128.store8_lane_7_offset_7" (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) + (i64.const 7)) +(assert_return (invoke "v128.store8_lane_8_offset_8" (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) + (i64.const 8)) +(assert_return (invoke "v128.store8_lane_9_offset_9" (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) + (i64.const 9)) +(assert_return (invoke "v128.store8_lane_10_offset_10" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) + (i64.const 10)) +(assert_return (invoke "v128.store8_lane_11_offset_11" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) + (i64.const 11)) +(assert_return (invoke "v128.store8_lane_12_offset_12" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) + (i64.const 12)) +(assert_return (invoke "v128.store8_lane_13_offset_13" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) + (i64.const 13)) +(assert_return (invoke "v128.store8_lane_14_offset_14" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) + (i64.const 14)) +(assert_return (invoke "v128.store8_lane_15_offset_15" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) + (i64.const 15)) +(assert_return (invoke "v128.store8_lane_0_align_1" (i32.const 0) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 0)) +(assert_return (invoke "v128.store8_lane_1_align_1" (i32.const 1) + (v128.const i8x16 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 1)) +(assert_return (invoke "v128.store8_lane_2_align_1" (i32.const 2) + (v128.const i8x16 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 2)) +(assert_return (invoke "v128.store8_lane_3_align_1" (i32.const 3) + (v128.const i8x16 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 3)) +(assert_return (invoke "v128.store8_lane_4_align_1" (i32.const 4) + (v128.const i8x16 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0)) + (i64.const 4)) +(assert_return (invoke "v128.store8_lane_5_align_1" (i32.const 5) + (v128.const i8x16 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0)) + (i64.const 5)) +(assert_return (invoke "v128.store8_lane_6_align_1" (i32.const 6) + (v128.const i8x16 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0)) + (i64.const 6)) +(assert_return (invoke "v128.store8_lane_7_align_1" (i32.const 7) + (v128.const i8x16 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0)) + (i64.const 7)) +(assert_return (invoke "v128.store8_lane_8_align_1" (i32.const 8) + (v128.const i8x16 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0)) + (i64.const 8)) +(assert_return (invoke "v128.store8_lane_9_align_1" (i32.const 9) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0)) + (i64.const 9)) +(assert_return (invoke "v128.store8_lane_10_align_1" (i32.const 10) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 0)) + (i64.const 10)) +(assert_return (invoke "v128.store8_lane_11_align_1" (i32.const 11) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0)) + (i64.const 11)) +(assert_return (invoke "v128.store8_lane_12_align_1" (i32.const 12) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0)) + (i64.const 12)) +(assert_return (invoke "v128.store8_lane_13_align_1" (i32.const 13) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 13 0 0)) + (i64.const 13)) +(assert_return (invoke "v128.store8_lane_14_align_1" (i32.const 14) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 0)) + (i64.const 14)) +(assert_return (invoke "v128.store8_lane_15_align_1" (i32.const 15) + (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15)) + (i64.const 15)) + +;; type check +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store8_lane 0 (local.get $x) (i32.const 0)))) + "type mismatch") + +;; invalid lane index +(assert_invalid (module (memory 1) + (func (param $x v128) (result v128) + (v128.store8_lane 16 (i32.const 0) (local.get $x)))) + "invalid lane index") + +;; invalid memarg alignment +(assert_invalid + (module (memory 1) + (func (param $x v128) (result v128) + (v128.store8_lane align=2 0 (i32.const 0) (local.get $x)))) + "alignment must not be larger than natural") \ No newline at end of file From 2d191fe66326c5d8facbe47c8fa70094beab3fb9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Feb 2021 08:12:53 -0800 Subject: [PATCH 316/378] [spectext] Add i16x8.qmulr_sat_s This was merged in #365. --- .../core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 933 +++++++++--------- document/core/binary/instructions.rst | 1 + document/core/exec/numerics.rst | 13 +- document/core/syntax/instructions.rst | 4 +- document/core/text/instructions.rst | 1 + document/core/util/macros.def | 2 + 7 files changed, 487 insertions(+), 468 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 051f48ed49..896a7e03fd 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -457,6 +457,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~156', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~154', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 4380ab2113..c2b408b0db 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,469 +6,470 @@ Index of Instructions --------------------- -=========================================== ===================== ============================================= =========================================== ================================================================= -Instruction Binary Opcode Type Validation Execution -=========================================== ===================== ============================================= =========================================== ================================================================= -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1C}` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{25}` -(reserved) :math:`\hex{26}` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -(reserved) :math:`\hex{D0}` -(reserved) :math:`\hex{D1}` -(reserved) :math:`\hex{D2}` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -=========================================== ===================== ============================================= =========================================== ================================================================= +=========================================== ===================== ============================================= =========================================== ================================================================== +Instruction Binary Opcode Type Validation Execution +=========================================== ===================== ============================================= =========================================== ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` +:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{1C}` +(reserved) :math:`\hex{1D}` +(reserved) :math:`\hex{1E}` +(reserved) :math:`\hex{1F}` +:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{25}` +(reserved) :math:`\hex{26}` +(reserved) :math:`\hex{27}` +:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +(reserved) :math:`\hex{D0}` +(reserved) :math:`\hex{D1}` +(reserved) :math:`\hex{D2}` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) 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:ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` 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:ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +=========================================== ===================== ============================================= =========================================== ================================================================== diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 6702e84292..b421f1ef59 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -651,6 +651,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~153{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_u} \\ &&|& \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ &&|& \hex{FD}~~154{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& + \hex{FD}~~156{:}\Bu32 &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s} \\ &&|& \hex{FD}~~157{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& \hex{FD}~~158{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index a8641b67c3..12d9465097 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -897,7 +897,7 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: .. _op-iavgr_u: :math:`\iavgru_N(i_1, i_2)` -............................. +........................... * Let :math:`j` be the result of adding :math:`i_1`, :math:`i_2`, and :math:`1`. @@ -909,6 +909,17 @@ The integer result of predicates -- i.e., :ref:`tests ` and :ref: \end{array} +.. _op-iq15mulrsat_s: + +:math:`\iq15mulrsats_N(i_1, i_2)` +................................. + +* Return the result of :math:`\sats_N(\ishrs_N(i_1 \cdot i_2 + 2^{14}, 15))`. + +.. math:: + \begin{array}{lll@{\qquad}l} + \iq15mulrsats_N(i_1, i_2) &=& \sats_N(\ishrs_N(i_1 \cdot i_2 + 2^{14}, 15)) + \end{array} .. index:: floating-point, IEEE 754 diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index cf10a67bcc..ba2376214c 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -236,6 +236,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i32x4.}\viunop ~|~ \K{i64x2.}\viunop \\&&|& \K{i8x16.}\VPOPCNT \\&&|& + \K{i16x8.}\Q15MULRSAT\K{\_s} \\ &&|& \fshape\K{.}\vfunop \\&&|& \ishape\K{.}\vitestop \\ &&|& \ishape\K{.}\BITMASK \\ &&|& @@ -390,7 +391,8 @@ Occasionally, it is convenient to group operators together according to the foll \viminmaxop ~|~ \visatbinop \\&&|& \SWIZZLE ~|~ \VMUL ~|~ - \AVGR\K{\_u} \\ + \AVGR\K{\_u} ~|~ + \Q15MULRSAT\K{\_s} \\ \production{conversion operator} & \vcvtop &::=& \VTRUNC\K{\_sat} ~|~ \VCONVERT \\ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 717899099d..ccce2514cd 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -684,6 +684,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i16x8.max\_s} &\Rightarrow& \I16X8.\VMAX\K{\_s}\\ &&|& \text{i16x8.max\_u} &\Rightarrow& \I16X8.\VMAX\K{\_u}\\ &&|& \text{i16x8.avgr\_u} &\Rightarrow& \I16X8.\AVGR\K{\_u}\\ &&|& + \text{i16x8.q15mulr\_sat\_s} &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s}\\ &&|& \text{i16x8.extmul\_low\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& \text{i16x8.extmul\_high\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& \text{i16x8.extmul\_low\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 52e0e59916..f728452755 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -426,6 +426,7 @@ .. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} +.. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}} .. Instructions, non-terminals @@ -1033,6 +1034,7 @@ .. |isubsatu| mathdef:: \xref{exec/numerics}{op-isubsat_u}{\F{isubsat\_u}} .. |isubsats| mathdef:: \xref{exec/numerics}{op-isubsat_s}{\F{isubsat\_s}} .. |iavgru| mathdef:: \xref{exec/numerics}{op-iavgr_u}{\F{iavgr\_u}} +.. |iq15mulrsats| mathdef:: \xref{exec/numerics}{op-iq15mulrsat_s}{\F{iq15mulrsat\_s}} .. |fadd| mathdef:: \xref{exec/numerics}{op-fadd}{\F{fadd}} .. |fsub| mathdef:: \xref{exec/numerics}{op-fsub}{\F{fsub}} From 2eb77e2e46da8e877fbd96203a492bb4f3b1c4b1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Feb 2021 10:02:34 -0800 Subject: [PATCH 317/378] [interpreter] Implement i16x8.qmulr_sat_s (#463) * [interpreter] Implement i16x8.qmulr_sat_s This was merged in #365. * Update interpreter/exec/int.ml Co-authored-by: Andreas Rossberg Co-authored-by: Andreas Rossberg --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/exec/int.ml | 9 ++ interpreter/exec/simd.ml | 3 + interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 2 + test/core/simd/meta/gen_tests.py | 1 + .../simd/meta/simd_i16x8_q15mulr_sat_s.py | 36 ++++++ test/core/simd/meta/simd_integer_op.py | 11 +- test/core/simd/simd_i16x8_q15mulr_sat_s.wast | 110 ++++++++++++++++++ 13 files changed, 176 insertions(+), 3 deletions(-) create mode 100644 test/core/simd/meta/simd_i16x8_q15mulr_sat_s.py create mode 100644 test/core/simd/simd_i16x8_q15mulr_sat_s.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 0ff11197eb..f0cabad32b 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -386,6 +386,7 @@ let simd_prefix s = | 0x99l -> i16x8_max_u | 0x9al -> i16x8_extmul_low_i8x16_s | 0x9bl -> i16x8_avgr_u + | 0x9cl -> i16x8_q15mulr_sat_s | 0x9dl -> i16x8_extmul_high_i8x16_s | 0x9el -> i16x8_extmul_low_i8x16_u | 0x9fl -> i16x8_extmul_high_i8x16_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 56e3d93700..798e1fcaab 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -486,6 +486,7 @@ let encode m = | Binary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl | Binary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el | Binary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl + | Binary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x9cl | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l | Binary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 2445f682a2..f6803fb27c 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -111,6 +111,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I16x8 ExtMulHighS -> SXX.I16x8_convert.extmul_high_s | I16x8 ExtMulLowU -> SXX.I16x8_convert.extmul_low_u | I16x8 ExtMulHighU -> SXX.I16x8_convert.extmul_high_u + | I16x8 Q15MulRSatS -> SXX.I16x8.q15mulr_sat_s | I32x4 Add -> SXX.I32x4.add | I32x4 Sub -> SXX.I32x4.sub | I32x4 MinS -> SXX.I32x4.min_s diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 1a8c252ed3..990f410d78 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -93,6 +93,7 @@ sig val add_sat_u : t -> t -> t val sub_sat_s : t -> t -> t val sub_sat_u : t -> t -> t + val q15mulr_sat_s : t -> t -> t val of_int_s : int -> t val of_int_u : int -> t @@ -289,6 +290,14 @@ struct let sub_sat_s x y = saturate_s (sub x y) let sub_sat_u x y = saturate_u (sub (as_unsigned x) (as_unsigned y)) + let q15mulr_sat_s x y = + (* mul x64 y64 can overflow int64 when both are int32 min, but this is only + * used by i16x8, so we are fine for now. *) + assert (Rep.bitwidth < 32); + let x64 = Rep.to_int64 x in + let y64 = Rep.to_int64 y in + Rep.of_int64 Int64.((shift_right (add (mul x64 y64) 0x4000L) 15)) + let to_int_s = Rep.to_int let to_int_u i = Rep.to_int i land (Rep.to_int Rep.max_int lsl 1) lor 1 diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index d15a53931b..022ec15cfd 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -90,6 +90,7 @@ sig val add_sat_u : t -> t -> t val sub_sat_s : t -> t -> t val sub_sat_u : t -> t -> t + val q15mulr_sat_s : t -> t -> t end (* This signature defines the types and operations SIMD floats can expose. *) @@ -353,6 +354,8 @@ struct let add_sat_u = binop Int.add_sat_u let sub_sat_s = binop Int.sub_sat_s let sub_sat_u = binop Int.sub_sat_u + (* The intermediate will overflow lane.t, so have Int implement this. *) + let q15mulr_sat_s = binop Int.q15mulr_sat_s end module V8x16 = struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 077c08a2cf..54d155bdf6 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -55,7 +55,7 @@ struct | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU - | DotI16x8S + | DotI16x8S | Q15MulRSatS | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index e3351f844f..a93d424806 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -354,6 +354,7 @@ let i16x8_extmul_low_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulLowS)) let i16x8_extmul_high_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulHighS)) let i16x8_extmul_low_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulLowU)) let i16x8_extmul_high_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulHighU)) +let i16x8_q15mulr_sat_s = Binary (V128 V128Op.(I16x8 Q15MulRSatS)) let i32x4_splat = Convert (V128 V128Op.(I32x4 Splat)) let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 73422b6b0d..e475e85a6d 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -312,6 +312,7 @@ struct | I16x8 ExtMulHighS -> "i16x8.extmul_high_i8x16_s" | I16x8 ExtMulLowU -> "i16x8.extmul_low_i8x16_u" | I16x8 ExtMulHighU -> "i16x8.extmul_high_i8x16_u" + | I16x8 Q15MulRSatS -> "i16x8.q15mulr_sat_s" | I32x4 Add -> "i32x4.add" | I32x4 Sub -> "i32x4.sub" | I32x4 Mul -> "i32x4.mul" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index d5f5ed121f..03f832c4ec 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -596,6 +596,8 @@ rule token = parse { BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } | "i64x2.extmul_high_i32x4_"(sign as s) { BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } + | "i16x8.q15mulr_sat_s" + { BINARY i16x8_q15mulr_sat_s } | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index fdee79f10e..3fef5a0f66 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -36,6 +36,7 @@ 'simd_store_lane', 'simd_ext_mul', 'simd_int_to_int_widen', + 'simd_i16x8_q15mulr_sat_s', ) diff --git a/test/core/simd/meta/simd_i16x8_q15mulr_sat_s.py b/test/core/simd/meta/simd_i16x8_q15mulr_sat_s.py new file mode 100644 index 0000000000..bf59331f29 --- /dev/null +++ b/test/core/simd/meta/simd_i16x8_q15mulr_sat_s.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python3 + +from simd_arithmetic import SimdArithmeticCase + + +"""Generate test cases for i16x8.mulr_sat_s +""" +class SimdI16x8Q15MulRSatS(SimdArithmeticCase): + LANE_TYPE = 'i16x8' + UNARY_OPS = () + BINARY_OPS = ('q15mulr_sat_s',) + + @property + def full_bin_test_data(self): + return [] + + @property + def hex_binary_op_test_data(self): + return [] + + def get_combine_cases(self): + return '' + + def gen_test_cases(self): + wast_filename = '../simd_i16x8_q15mulr_sat_s.wast' + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + + +def gen_test_cases(): + simd_i16x8_q16mulr_sat_s = SimdI16x8Q15MulRSatS() + simd_i16x8_q16mulr_sat_s.gen_test_cases() + + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 8f1d4d2f9a..1ae924d846 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -133,8 +133,9 @@ def binary_op(self, operand1, operand2, src_lane, dst_lane=None): add, sub, mul, add_sat_s, add_sat_u, sub_sat_s, sub_sat_u, - min_s, min_u, max_s, max_u, avgr_u - ext_mul_s, ext_mul_u (same as mul) + min_s, min_u, max_s, max_u, avgr_u, + ext_mul_s, ext_mul_u (same as mul), + q15mulr_sat_s :param operand1: the operand 1, integer or literal string in hex or decimal format :param operand2: the operand 2, integer or literal string in hex or decimal format @@ -170,6 +171,12 @@ def binary_op(self, operand1, operand2, src_lane, dst_lane=None): i1 = self.get_valid_value(v1, src_lane, signed=False) i2 = self.get_valid_value(v2, src_lane, signed=False) value = i1 * i2 + elif self.op == 'q15mulr_sat_s': + # This should be before 'sat' case. + i1 = ArithmeticOp.get_valid_value(v1, src_lane) + i2 = ArithmeticOp.get_valid_value(v2, src_lane) + result = (i1 * i2 + 0x4000) >> 15 + return ArithmeticOp.get_valid_value(result, src_lane) elif 'sat' in self.op: value = self._saturate(v1, v2, src_lane) if self.op.endswith('_u'): diff --git a/test/core/simd/simd_i16x8_q15mulr_sat_s.wast b/test/core/simd/simd_i16x8_q15mulr_sat_s.wast new file mode 100644 index 0000000000..1432defa3e --- /dev/null +++ b/test/core/simd/simd_i16x8_q15mulr_sat_s.wast @@ -0,0 +1,110 @@ +;; Tests for i16x8 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i16x8.q15mulr_sat_s") (param v128 v128) (result v128) (i16x8.q15mulr_sat_s (local.get 0) (local.get 1))) +) + + +;; i16x8.q15mulr_sat_s +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 0 0 0 0 0 0 0 0) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 1 1 1 1 1 1 1 1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 16383 16383 16383 16383 16383 16383 16383 16383) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 8192 8192 8192 8192 8192 8192 8192 8192)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384) + (v128.const i16x8 16384 16384 16384 16384 16384 16384 16384 16384)) + (v128.const i16x8 8192 8192 8192 8192 8192 8192 8192 8192)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -16383 -16383 -16383 -16383 -16383 -16383 -16383 -16383) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 8192 8192 8192 8192 8192 8192 8192 8192)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 8192 8192 8192 8192 8192 8192 8192 8192)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -16385 -16385 -16385 -16385 -16385 -16385 -16385 -16385) + (v128.const i16x8 -16384 -16384 -16384 -16384 -16384 -16384 -16384 -16384)) + (v128.const i16x8 8193 8193 8193 8193 8193 8193 8193 8193)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 32765 32765 32765 32765 32765 32765 32765 32765) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 32768 32768 32768 32768 32768 32768 32768 32768) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32766 -32766 -32766 -32766 -32766 -32766 -32766 -32766) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) + (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535) + (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) + +;; type check +(assert_invalid (module (func (result v128) (i16x8.q15mulr_sat_s (i32.const 0) (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.q15mulr_sat_s-1st-arg-empty (result v128) + (i16x8.q15mulr_sat_s (v128.const i16x8 0 0 0 0 0 0 0 0)) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.q15mulr_sat_s-arg-empty (result v128) + (i16x8.q15mulr_sat_s) + ) + ) + "type mismatch" +) + From bf505da960ef71e9b0bf32a52bac7e9956df9819 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Feb 2021 10:04:24 -0800 Subject: [PATCH 318/378] [interpreter] Implement i32x4.trunc_sat_f64x2_{s,u}_zero (#466) * [interpreter] Implement i32x4.trunc_sat_f64x2_{s,u}_zero This converts 2 f64 to 2 i32, then zeroes the top 2 lanes. These 2 instructions were merged as part of #383. This change also refactors some test cases from simd_conversions out into a script that generates both i32x4.trunc_sat_i32x4_{s,u} and i32x4.trunc_sat_f64x2_{s,u}_zero. * Add encode/decode * Update interpreter/exec/simd.ml Co-authored-by: Andreas Rossberg Co-authored-by: Andreas Rossberg --- interpreter/binary/decode.ml | 2 + interpreter/binary/encode.ml | 2 + interpreter/exec/eval_simd.ml | 4 + interpreter/exec/simd.ml | 7 + interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 2 + interpreter/text/arrange.ml | 2 + interpreter/text/lexer.mll | 2 + test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_float_op.py | 62 ++--- .../simd/meta/simd_int_trunc_sat_float.py | 178 +++++++++++++ test/core/simd/meta/simd_integer_op.py | 6 + test/core/simd/simd_conversions.wast | 199 --------------- .../core/simd/simd_i32x4_trunc_sat_f32x4.wast | 239 ++++++++++++++++++ .../core/simd/simd_i32x4_trunc_sat_f64x2.wast | 239 ++++++++++++++++++ 15 files changed, 708 insertions(+), 239 deletions(-) create mode 100644 test/core/simd/meta/simd_int_trunc_sat_float.py create mode 100644 test/core/simd/simd_i32x4_trunc_sat_f32x4.wast create mode 100644 test/core/simd/simd_i32x4_trunc_sat_f64x2.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index f0cabad32b..f5a48bded8 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -304,6 +304,8 @@ let simd_prefix s = | 0x50l -> v128_or | 0x51l -> v128_xor | 0x52l -> v128_bitselect + | 0x55l -> i32x4_trunc_sat_f64x2_s_zero + | 0x56l -> i32x4_trunc_sat_f64x2_u_zero | 0x58l -> let a, o = memop s in let lane = u8 s in diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 798e1fcaab..844c042c4c 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -381,6 +381,8 @@ let encode m = | Unary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl | Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l | Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l + | Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0x55l + | Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0x56l | Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl | Unary (V128 _) -> failwith "unimplemented V128 Unary op" diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index f6803fb27c..3373a5b01d 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -31,6 +31,10 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) + | I32x4 TruncSatF64x2SZero -> + to_value (SXX.I32x4_convert.trunc_sat_f64x2_s_zero (of_value 1 v)) + | I32x4 TruncSatF64x2UZero -> + to_value (SXX.I32x4_convert.trunc_sat_f64x2_u_zero (of_value 1 v)) | I64x2 Abs -> to_value (SXX.I64x2.abs (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | I64x2 WidenLowS -> to_value (SXX.I64x2_convert.widen_low_s (of_value 1 v)) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 022ec15cfd..831762a460 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -187,6 +187,8 @@ sig module I32x4_convert : sig val trunc_sat_f32x4_s : t -> t val trunc_sat_f32x4_u : t -> t + val trunc_sat_f64x2_s_zero : t -> t + val trunc_sat_f64x2_u_zero : t -> t val widen_low_s : t -> t val widen_high_s : t -> t val widen_low_u : t -> t @@ -447,6 +449,11 @@ struct let trunc_sat_f32x4_s = convert I32_convert.trunc_sat_f32_s let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u + let convert_zero f v = + Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v))) + let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s + let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u + let widen take_or_drop mask x = Rep.of_i32x4 (List.map (Int32.logand mask) (take_or_drop 4 (Rep.to_i16x8 x))) let widen_low_s = widen Lib.List.take 0xffffffffl diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 54d155bdf6..92fe56ebef 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -50,7 +50,7 @@ module SimdOp = struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U | WidenLowS | WidenLowU | WidenHighS | WidenHighU - | Popcnt + | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index a93d424806..89518baa18 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -389,6 +389,8 @@ let i32x4_max_u = Binary (V128 V128Op.(I32x4 MaxU)) let i32x4_mul = Binary (V128 V128Op.(I32x4 Mul)) let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) +let i32x4_trunc_sat_f64x2_s_zero = Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) +let i32x4_trunc_sat_f64x2_u_zero = Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S)) let i32x4_extmul_low_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulLowS)) let i32x4_extmul_high_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulHighS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index e475e85a6d..c45db97b65 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -217,6 +217,8 @@ struct | I32x4 WidenHighU -> "i32x4.widen_high_i16x8_u" | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" + | I32x4 TruncSatF64x2SZero -> "i32x4.trunc_sat_f64x2_s_zero" + | I32x4 TruncSatF64x2UZero -> "i32x4.trunc_sat_f64x2_u_zero" | I64x2 Abs -> "i64x2.abs" | I64x2 Neg -> "i64x2.neg" | I64x2 WidenLowS -> "i64x2.widen_low_i32x4_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 03f832c4ec..0f0bcd5ecc 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -553,6 +553,8 @@ rule token = parse UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } | "i32x4.trunc_sat_f32x4_"(sign as s) { UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } + | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" + { UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } | "f32x4.convert_i32x4_"(sign as s) { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } | "i8x16.narrow_i16x8_"(sign as s) diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 3fef5a0f66..453404550a 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -36,6 +36,7 @@ 'simd_store_lane', 'simd_ext_mul', 'simd_int_to_int_widen', + 'simd_int_trunc_sat_float', 'simd_i16x8_q15mulr_sat_s', ) diff --git a/test/core/simd/meta/simd_float_op.py b/test/core/simd/meta/simd_float_op.py index 8d9bb1fa33..4e65443a68 100644 --- a/test/core/simd/meta/simd_float_op.py +++ b/test/core/simd/meta/simd_float_op.py @@ -15,6 +15,20 @@ class FloatingPointOp: def binary_op(self, op: str, p1: str, p2: str) -> str: pass + def of_string(self, value: str) -> float: + if '0x' in value: + return float.fromhex(value) + else: + return float(value) + + def is_hex(self, value:str) -> bool: + return '0x' in value + + def to_single_precision(self, value: float) -> str: + # Python only has doubles, when reading in float, we need to convert to + # single-precision first. + return struct.unpack('f', struct.pack('f', value))[0] + class FloatingPointArithOp(FloatingPointOp): """Common arithmetic ops for both f32x4 and f64x2: @@ -29,19 +43,9 @@ def binary_op(self, op: str, p1: str, p2: str, single_prec=False) -> str: :param p2: float number in hex :return: """ - if '0x' in p1 or '0x' in p2: - hex_form = True - else: - hex_form = False - - if '0x' in p1: - f1 = float.fromhex(p1) - else: - f1 = float(p1) - if '0x' in p2: - f2 = float.fromhex(p2) - else: - f2 = float(p2) + hex_form = self.is_hex(p1) or self.is_hex(p2) + f1 = self.of_string(p1) + f2 = self.of_string(p2) if op == 'add': if 'inf' in p1 and 'inf' in p2 and p1 != p2: @@ -145,15 +149,8 @@ def binary_op(self, op: str, p1: str, p2: str, hex_form=True) -> str: :param p2: float number in hex :return: """ - if '0x' in p1: - f1 = float.fromhex(p1) - else: - f1 = float(p1) - - if '0x' in p2: - f2 = float.fromhex(p2) - else: - f2 = float(p2) + f1 = self.of_string(p1) + f2 = self.of_string(p2) if '-nan' in [p1, p2] and 'nan' in [p1, p2]: return p1 @@ -205,10 +202,7 @@ def unary_op(self, op: str, p1: str, hex_form=True) -> str: :param p1: float number in hex :return: """ - if '0x' in p1: - f1 = float.fromhex(p1) - else: - f1 = float(p1) + f1 = self.of_string(p1) if op == 'abs': if hex_form: return abs(f1).hex() @@ -239,15 +233,8 @@ def binary_op(self, op: str, p1: str, p2: str) -> str: if 'nan' in p1.lower() or 'nan' in p2.lower(): return '0' - if '0x' in p1: - f1 = float.fromhex(p1) - else: - f1 = float(p1) - - if '0x' in p2: - f2 = float.fromhex(p2) - else: - f2 = float(p2) + f1 = self.of_string(p1) + f2 = self.of_string(p2) if op == 'eq': return '-1' if f1 == f2 else '0' @@ -278,10 +265,7 @@ def unary_op(self, op: str, p1: str, hex_form=True) -> str: :param p1: float number in hex :return: """ - if '0x' in p1: - f1 = float.fromhex(p1) - else: - f1 = float(p1) + f1 = self.of_string(p1) if 'nan' in p1: return 'nan' diff --git a/test/core/simd/meta/simd_int_trunc_sat_float.py b/test/core/simd/meta/simd_int_trunc_sat_float.py new file mode 100644 index 0000000000..eee912d7a0 --- /dev/null +++ b/test/core/simd/meta/simd_int_trunc_sat_float.py @@ -0,0 +1,178 @@ +#!/usr/bin/env python3 + +"""Base class for generating SIMD .trun_sat_ test cases. +Subclasses should set: + - LANE_TYPE + - SRC_LANE_TYPE + - UNARY_OPS +""" + +from abc import abstractmethod +import struct +from math import trunc +from simd import SIMD +from simd_arithmetic import SimdArithmeticCase +from test_assert import AssertReturn +from simd_float_op import FloatingPointOp, FloatingPointRoundingOp +from simd_integer_op import ArithmeticOp + + +class SimdConversionCase(SimdArithmeticCase): + BINARY_OPS = () + TEST_FUNC_TEMPLATE_HEADER = ";; Tests for {} trunc sat conversions from float.\n" + + def is_signed(self, op): + return op.endswith("_s") or op.endswith("_s_zero") + + def get_test_data(self, lane): + return [ + "0.0", + "-0.0", + "1.5", + "-1.5", + "1.9", + "2.0", + "-1.9", + "-2.0", + str(float(lane.max - 127)), + str(float(-(lane.max - 127))), + str(float(lane.max + 1)), + str(float(-(lane.max + 1))), + str(float(lane.max * 2)), + str(float(-(lane.max * 2))), + str(float(lane.max)), + str(float(-lane.max)), + str(float(lane.mask - 1)), + str(float(lane.mask)), + str(float(lane.mask + 1)), + "0x1p-149", + "-0x1p-149", + "0x1p-126", + "-0x1p-126", + "0x1p-1", + "-0x1p-1", + "0x1p+0", + "-0x1p+0", + "0x1.19999ap+0", + "-0x1.19999ap+0", + "0x1.921fb6p+2", + "-0x1.921fb6p+2", + "0x1.fffffep+127", + "-0x1.fffffep+127", + "0x1.ccccccp-1", + "-0x1.ccccccp-1", + "0x1.fffffep-1", + "-0x1.fffffep-1", + "0x1.921fb6p+2", + "-0x1.921fb6p+2", + "0x1.fffffep+127", + "-0x1.fffffep+127", + "+inf", + "-inf", + "+nan", + "-nan", + "nan:0x444444", + "-nan:0x444444", + "42", + "-42", + "0123456792.0", + "01234567890.0", + ] + + def to_float_precision(self, value): + # Python supports double precision, so given an an input that cannot be + # precisely represented in f32, we need to round it. + return value + + @abstractmethod + def to_results(self, result: str): + # Subclasses can override this to set the shape of the results. This is + # useful if instructions zero top lanes. + pass + + def conversion_op(self, op, operand): + fop = FloatingPointRoundingOp() + signed = self.is_signed(op) + sat_op = ArithmeticOp("sat_s") if signed else ArithmeticOp("sat_u") + result = fop.unary_op("trunc", operand, hex_form=False) + if result == "nan": + return "0" + elif result == "+inf": + return str(str(self.lane.max) if signed else str(self.lane.mask)) + elif result == "-inf": + return str(self.lane.min if signed else 0) + else: + float_result = self.to_float_precision(float(result)) + trunced = int(trunc(float_result)) + saturated = sat_op.unary_op(trunced, self.lane) + return str(saturated) + + def get_case_data(self): + test_data = [] + for op in self.UNARY_OPS: + op_name = "{}.{}".format(self.LANE_TYPE, op) + test_data.append(["#", op_name]) + + for operand in self.get_test_data(self.lane): + operand = str(operand) + if "nan" in operand: + test_data.append( + [op_name, [operand], "0", [self.SRC_LANE_TYPE, self.LANE_TYPE]] + ) + else: + result = self.conversion_op(op_name, operand) + results = self.to_results(result) + assert "nan" not in result + test_data.append( + [ + op_name, + [operand], + results, + [self.SRC_LANE_TYPE, self.LANE_TYPE], + ] + ) + + return test_data + + def gen_test_cases(self): + wast_filename = "../simd_{}_trunc_sat_{}.wast".format( + self.LANE_TYPE, self.SRC_LANE_TYPE + ) + with open(wast_filename, "w") as fp: + fp.write(self.get_all_cases()) + + def get_combine_cases(self): + return "" + + +class SimdI32x4TruncSatF32x4Case(SimdConversionCase): + LANE_TYPE = "i32x4" + SRC_LANE_TYPE = "f32x4" + UNARY_OPS = ("trunc_sat_f32x4_s", "trunc_sat_f32x4_u") + + def to_float_precision(self, value): + fop = FloatingPointOp() + return fop.to_single_precision(value) + + def to_results(self, value: str): + return [value] + + +class SimdI32x4TruncSatF64x2Case(SimdConversionCase): + LANE_TYPE = "i32x4" + SRC_LANE_TYPE = "f64x2" + UNARY_OPS = ("trunc_sat_f64x2_s_zero", "trunc_sat_f64x2_u_zero") + + def to_results(self, value: str): + return ["0", value] + + +def gen_test_cases(): + i32x4_trunc_sat = SimdI32x4TruncSatF32x4Case() + i32x4_trunc_sat.gen_test_cases() + i32x4_trunc_sat = SimdI32x4TruncSatF64x2Case() + i32x4_trunc_sat.gen_test_cases() + + +if __name__ == "__main__": + gen_test_cases() diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 1ae924d846..70d152e986 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -120,6 +120,12 @@ def unary_op(self, operand, lane): elif self.op == 'popcnt': result = self.get_valid_value(v, lane) return str(bin(result % lane.mod).count('1')) + elif self.op == 'sat_s': + # Don't call get_valid_value, it will truncate results. + return max(lane.min, min(v, lane.max)) + elif self.op == 'sat_u': + # Don't call get_valid_value, it will truncate results. + return max(0, min(v, lane.mask)) else: raise Exception('Unknown unary operation') diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index b24a6643e9..404bfa01ec 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -1,12 +1,6 @@ ;; Web Assembly SIMD-related type conversion tests (module - ;; Floating point to integer with saturation - (func (export "i32x4.trunc_sat_f32x4_s") (param v128) (result v128) - (i32x4.trunc_sat_f32x4_s (local.get 0))) - (func (export "i32x4.trunc_sat_f32x4_u") (param v128) (result v128) - (i32x4.trunc_sat_f32x4_u (local.get 0))) - ;; Integer to floating point (func (export "f32x4.convert_i32x4_s") (param v128) (result v128) (f32x4.convert_i32x4_s (local.get 0))) @@ -25,179 +19,6 @@ ) -;; Floating point to integer with saturation -;; i32x4.trunc_sat_f32x4_s - -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0.0 0.0 0.0 0.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.5 1.5 1.5 1.5)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.9 1.9 1.9 1.9)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2.0 2.0 2.0 2.0)) - (v128.const i32x4 2 2 2 2)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) - (v128.const i32x4 -2 -2 -2 -2)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483520.0 2147483520.0 2147483520.0 2147483520.0)) - (v128.const i32x4 2147483520 2147483520 2147483520 2147483520)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483520.0 -2147483520.0 -2147483520.0 -2147483520.0)) - (v128.const i32x4 -2147483520 -2147483520 -2147483520 -2147483520)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) - (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) - (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 3000000000.0 3000000000.0 3000000000.0 3000000000.0)) - (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -3000000000.0 -3000000000.0 -3000000000.0 -3000000000.0)) - (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) - (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483647.0 -2147483647.0 -2147483647.0 -2147483647.0)) - (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 6 6 6 6)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) - (v128.const i32x4 -6 -6 -6 -6)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) - (v128.const i32x4 0x80000000 0x80000000 0x80000000 0x80000000)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +nan +nan +nan +nan)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 42 nan inf -inf)) - (v128.const i32x4 42 0 2147483647 -2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -42 3.14 nan inf)) - (v128.const i32x4 -42 3 0 2147483647)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) - (v128.const i32x4 123456792 123456792 123456792 123456792)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 01234567890.0 01234567890.0 01234567890.0 01234567890.0)) - (v128.const i32x4 0x49960300 0x49960300 0x49960300 0x49960300)) -;; i32x4.trunc_sat_f32x4_u - -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0.0 0.0 0.0 0.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.5 1.5 1.5 1.5)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.9 1.9 1.9 1.9)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2.0 2.0 2.0 2.0)) - (v128.const i32x4 2 2 2 2)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) - (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 3000000000.0 3000000000.0 3000000000.0 3000000000.0)) - (v128.const i32x4 3000000000 3000000000 3000000000 3000000000)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -3000000000.0 -3000000000.0 -3000000000.0 -3000000000.0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) - (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967295.0 4294967295.0 4294967295.0 4294967295.0)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967296.0 4294967296.0 4294967296.0 4294967296.0)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967040.0 4294967040.0 4294967040.0 4294967040.0)) - (v128.const i32x4 -256 -256 -256 -256)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 6 6 6 6)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +nan +nan +nan +nan)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan -nan -nan -nan)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +inf +inf +inf +inf)) - (v128.const i32x4 0xffffffff 0xffffffff 0xffffffff 0xffffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -inf -inf -inf -inf)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 42 nan inf -inf)) - (v128.const i32x4 42 0 0xffffffff 0)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -42 3.14 nan inf)) - (v128.const i32x4 0 3 0 0xffffffff)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) - (v128.const i32x4 123456792 123456792 123456792 123456792)) -(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0123456789.0 -0123456789.0 -0123456789.0 -0123456789.0)) - (v128.const i32x4 0 0 0 0)) ;; Integer to floating point ;; f32x4.convert_i32x4_s @@ -691,10 +512,6 @@ ;; Type mismatch -(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_s (i64.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_u (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i32.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_s (i64.const 0)))) "type mismatch") (assert_invalid (module (func (result v128) (f32x4.convert_i32x4_u (i32.const 0)))) "type mismatch") @@ -813,22 +630,6 @@ ;; Test operation with empty argument -(assert_invalid - (module - (func $i32x4.trunc_sat_f32x4_s-arg-empty (result v128) - (i32x4.trunc_sat_f32x4_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.trunc_sat_f32x4_u-arg-empty (result v128) - (i32x4.trunc_sat_f32x4_u) - ) - ) - "type mismatch" -) (assert_invalid (module (func $f32x4.convert_i32x4_s-arg-empty (result v128) diff --git a/test/core/simd/simd_i32x4_trunc_sat_f32x4.wast b/test/core/simd/simd_i32x4_trunc_sat_f32x4.wast new file mode 100644 index 0000000000..40af590f52 --- /dev/null +++ b/test/core/simd/simd_i32x4_trunc_sat_f32x4.wast @@ -0,0 +1,239 @@ +;; Tests for i32x4 trunc sat conversions from float. + +(module + (func (export "i32x4.trunc_sat_f32x4_s") (param v128) (result v128) (i32x4.trunc_sat_f32x4_s (local.get 0))) + (func (export "i32x4.trunc_sat_f32x4_u") (param v128) (result v128) (i32x4.trunc_sat_f32x4_u (local.get 0))) +) + + +;; i32x4.trunc_sat_f32x4_s +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0.0 0.0 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.5 1.5 1.5 1.5)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 1.9 1.9 1.9 1.9)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2.0 2.0 2.0 2.0)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483520.0 2147483520.0 2147483520.0 2147483520.0)) + (v128.const i32x4 2147483520 2147483520 2147483520 2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483520.0 -2147483520.0 -2147483520.0 -2147483520.0)) + (v128.const i32x4 -2147483520 -2147483520 -2147483520 -2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 4294967294.0 4294967294.0 4294967294.0 4294967294.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -4294967294.0 -4294967294.0 -4294967294.0 -4294967294.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -2147483647.0 -2147483647.0 -2147483647.0 -2147483647.0)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 4294967294.0 4294967294.0 4294967294.0 4294967294.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 4294967295.0 4294967295.0 4294967295.0 4294967295.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 4294967296.0 4294967296.0 4294967296.0 4294967296.0)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -6 -6 -6 -6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 -6 -6 -6 -6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 +nan +nan +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 42 42 42 42)) + (v128.const i32x4 42 42 42 42)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 -42 -42 -42 -42)) + (v128.const i32x4 -42 -42 -42 -42)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) + (v128.const i32x4 123456792 123456792 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_s" (v128.const f32x4 01234567890.0 01234567890.0 01234567890.0 01234567890.0)) + (v128.const i32x4 1234567936 1234567936 1234567936 1234567936)) + +;; i32x4.trunc_sat_f32x4_u +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0.0 0.0 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.5 1.5 1.5 1.5)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.5 -1.5 -1.5 -1.5)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 1.9 1.9 1.9 1.9)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2.0 2.0 2.0 2.0)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -1.9 -1.9 -1.9 -1.9)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2.0 -2.0 -2.0 -2.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483520.0 2147483520.0 2147483520.0 2147483520.0)) + (v128.const i32x4 2147483520 2147483520 2147483520 2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2147483520.0 -2147483520.0 -2147483520.0 -2147483520.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483648.0 2147483648.0 2147483648.0 2147483648.0)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2147483648.0 -2147483648.0 -2147483648.0 -2147483648.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967294.0 4294967294.0 4294967294.0 4294967294.0)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -4294967294.0 -4294967294.0 -4294967294.0 -4294967294.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 2147483647.0 2147483647.0 2147483647.0 2147483647.0)) + (v128.const i32x4 2147483648 2147483648 2147483648 2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -2147483647.0 -2147483647.0 -2147483647.0 -2147483647.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967294.0 4294967294.0 4294967294.0 4294967294.0)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967295.0 4294967295.0 4294967295.0 4294967295.0)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 4294967296.0 4294967296.0 4294967296.0 4294967296.0)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-126 0x1p-126 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-126 -0x1p-126 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p-1 0x1p-1 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p-1 -0x1p-1 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1p+0 0x1p+0 0x1p+0 0x1p+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1p+0 -0x1p+0 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1 0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1 -0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1 0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1 -0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 6 6 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +inf +inf +inf +inf)) + (v128.const i32x4 4294967295 4294967295 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 +nan +nan +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 nan:0x444444 nan:0x444444 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -nan:0x444444 -nan:0x444444 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 42 42 42 42)) + (v128.const i32x4 42 42 42 42)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 -42 -42 -42 -42)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 0123456792.0 0123456792.0 0123456792.0 0123456792.0)) + (v128.const i32x4 123456792 123456792 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f32x4_u" (v128.const f32x4 01234567890.0 01234567890.0 01234567890.0 01234567890.0)) + (v128.const i32x4 1234567936 1234567936 1234567936 1234567936)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f32x4_u (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.trunc_sat_f32x4_s-arg-empty (result v128) + (i32x4.trunc_sat_f32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.trunc_sat_f32x4_u-arg-empty (result v128) + (i32x4.trunc_sat_f32x4_u) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast b/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast new file mode 100644 index 0000000000..d232bb0755 --- /dev/null +++ b/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast @@ -0,0 +1,239 @@ +;; Tests for i32x4 trunc sat conversions from float. + +(module + (func (export "i32x4.trunc_sat_f64x2_s_zero") (param v128) (result v128) (i32x4.trunc_sat_f64x2_s_zero (local.get 0))) + (func (export "i32x4.trunc_sat_f64x2_u_zero") (param v128) (result v128) (i32x4.trunc_sat_f64x2_u_zero (local.get 0))) +) + + +;; i32x4.trunc_sat_f64x2_s_zero +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 1.5 1.5)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -1.5 -1.5)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 1.9 1.9)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2.0 2.0)) + (v128.const i32x4 0 0 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -1.9 -1.9)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2.0 -2.0)) + (v128.const i32x4 0 0 -2 -2)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483520.0 2147483520.0)) + (v128.const i32x4 0 0 2147483520 2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483520.0 -2147483520.0)) + (v128.const i32x4 0 0 -2147483520 -2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483648.0 2147483648.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483648.0 -2147483648.0)) + (v128.const i32x4 0 0 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967294.0 4294967294.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -4294967294.0 -4294967294.0)) + (v128.const i32x4 0 0 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483647.0 2147483647.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483647.0 -2147483647.0)) + (v128.const i32x4 0 0 -2147483647 -2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967294.0 4294967294.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967295.0 4294967295.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967296.0 4294967296.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 0 0 -1 -1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 -6 -6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.ccccccp-1 0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.ccccccp-1 -0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.fffffep-1 0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep-1 -0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 -6 -6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 +inf +inf)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -inf -inf)) + (v128.const i32x4 0 0 -2147483648 -2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 42 42)) + (v128.const i32x4 0 0 42 42)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -42 -42)) + (v128.const i32x4 0 0 -42 -42)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0123456792.0 0123456792.0)) + (v128.const i32x4 0 0 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 01234567890.0 01234567890.0)) + (v128.const i32x4 0 0 1234567890 1234567890)) + +;; i32x4.trunc_sat_f64x2_u_zero +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0.0 0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0.0 -0.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 1.5 1.5)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -1.5 -1.5)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 1.9 1.9)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2.0 2.0)) + (v128.const i32x4 0 0 2 2)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -1.9 -1.9)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2.0 -2.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483520.0 2147483520.0)) + (v128.const i32x4 0 0 2147483520 2147483520)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483520.0 -2147483520.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483648.0 2147483648.0)) + (v128.const i32x4 0 0 2147483648 2147483648)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483648.0 -2147483648.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967294.0 4294967294.0)) + (v128.const i32x4 0 0 4294967294 4294967294)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -4294967294.0 -4294967294.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483647.0 2147483647.0)) + (v128.const i32x4 0 0 2147483647 2147483647)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483647.0 -2147483647.0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967294.0 4294967294.0)) + (v128.const i32x4 0 0 4294967294 4294967294)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967295.0 4294967295.0)) + (v128.const i32x4 0 0 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967296.0 4294967296.0)) + (v128.const i32x4 0 0 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p-149 0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p-149 -0x1p-149)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p-126 0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p-126 -0x1p-126)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p-1 0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p-1 -0x1p-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p+0 0x1p+0)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p+0 -0x1p+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.19999ap+0 0x1.19999ap+0)) + (v128.const i32x4 0 0 1 1)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.19999ap+0 -0x1.19999ap+0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.ccccccp-1 0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.ccccccp-1 -0x1.ccccccp-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.fffffep-1 0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep-1 -0x1.fffffep-1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) + (v128.const i32x4 0 0 6 6)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const i32x4 0 0 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 +inf +inf)) + (v128.const i32x4 0 0 4294967295 4294967295)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -inf -inf)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 +nan +nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -nan -nan)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 nan:0x444444 nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -nan:0x444444 -nan:0x444444)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 42 42)) + (v128.const i32x4 0 0 42 42)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -42 -42)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0123456792.0 0123456792.0)) + (v128.const i32x4 0 0 123456792 123456792)) +(assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 01234567890.0 01234567890.0)) + (v128.const i32x4 0 0 1234567890 1234567890)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f64x2_s_zero (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.trunc_sat_f64x2_u_zero (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.trunc_sat_f64x2_s_zero-arg-empty (result v128) + (i32x4.trunc_sat_f64x2_s_zero) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.trunc_sat_f64x2_u_zero-arg-empty (result v128) + (i32x4.trunc_sat_f64x2_u_zero) + ) + ) + "type mismatch" +) + From 4c8378fc490720a8dce76745a2afa83eeac0a8b7 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 9 Feb 2021 17:05:20 -0800 Subject: [PATCH 319/378] [spectext] Add load/store lane text and binary format Drive-by fix for v128.store definition in gen-index-instructions.py. --- .../core/appendix/gen-index-instructions.py | 10 +- document/core/appendix/index-instructions.rst | 942 +++++++++--------- document/core/binary/instructions.rst | 17 +- document/core/text/instructions.rst | 10 +- 4 files changed, 506 insertions(+), 473 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 896a7e03fd..03f65126a2 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -332,7 +332,15 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~8', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), - Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32] \to [\V128]', r'valid-store', r'exec-store'), + Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), + Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~88', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~89', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~90', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~91', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\STORE\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~92', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~93', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~94', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~95', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index c2b408b0db..a6c5e3b031 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,470 +6,478 @@ Index of Instructions --------------------- -=========================================== ===================== ============================================= =========================================== ================================================================== -Instruction Binary Opcode Type Validation Execution -=========================================== ===================== ============================================= =========================================== ================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1C}` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{25}` -(reserved) :math:`\hex{26}` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -(reserved) :math:`\hex{D0}` -(reserved) :math:`\hex{D1}` -(reserved) :math:`\hex{D2}` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -=========================================== ===================== ============================================= =========================================== ================================================================== +================================================= ===================== ============================================= =========================================== ================================================================== +Instruction Binary Opcode Type Validation Execution +================================================= ===================== ============================================= =========================================== ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` +:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{1C}` +(reserved) :math:`\hex{1D}` +(reserved) :math:`\hex{1E}` +(reserved) :math:`\hex{1F}` +:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{25}` +(reserved) :math:`\hex{26}` +(reserved) :math:`\hex{27}` +:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` 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` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +(reserved) :math:`\hex{D0}` +(reserved) :math:`\hex{D1}` +(reserved) :math:`\hex{D2}` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~94` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~95` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` 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:math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +================================================= ===================== ============================================= =========================================== ================================================================== diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index b421f1ef59..5370f1584b 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -415,8 +415,12 @@ They all have a one byte prefix, whereas the actual opcode is encoded by a varia SIMD loads and stores are followed by the encoding of their |memarg| immediate. +.. _binary-laneidx: + .. math:: \begin{array}{llclll} + \production{lane index} & \Blaneidx &::=& + l{:}\Bbyte &\Rightarrow& l \\ \production{instruction} & \Binstr &::=& \dots \\&&|& \hex{FD}~~0{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD~m \\ &&|& \hex{FD}~~1{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{8x8\_s}~m \\ &&|& @@ -431,7 +435,15 @@ SIMD loads and stores are followed by the encoding of their |memarg| immediate. \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& \hex{FD}~~252{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& \hex{FD}~~253{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& - \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ + \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ &&|& + \hex{FD}~~88{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{8\_lane}~m~l \\ &&|& + \hex{FD}~~89{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{16\_lane}~m~l \\ &&|& + \hex{FD}~~90{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{32\_lane}~m~l \\ &&|& + \hex{FD}~~91{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{64\_lane}~m~l \\ &&|& + \hex{FD}~~92{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{8\_lane}~m~l \\ &&|& + \hex{FD}~~93{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{16\_lane}~m~l \\ &&|& + \hex{FD}~~94{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{32\_lane}~m~l \\ &&|& + \hex{FD}~~95{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{64\_lane}~m~l \\ \end{array} The |VCONST| instruction is followed by 16 immediate bytes, which are converted into a |i128| in |littleendian| byte order: @@ -444,14 +456,11 @@ The |VCONST| instruction is followed by 16 immediate bytes, which are converted \end{array} .. _binary-vternop: -.. _binary-laneidx: The |SHUFFLE| instruction is also followed by the encoding of 16 |laneidx| immediates. .. math:: \begin{array}{llclll} - \production{lane index} & \Blaneidx &::=& - l{:}\Bbyte &\Rightarrow& l \\ \production{instruction} & \Binstr &::=& \dots \\&&|& \hex{FD}~~13{:}\Bu32~~(l{:}\Blaneidx)^{16} &\Rightarrow& \I8X16.\SHUFFLE~l^{16} \\ \end{array} diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index ccce2514cd..27098757d9 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -472,7 +472,15 @@ SIMD memory instructions have optional offset and alignment immediates, like the \text{v128.load64\_splat}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& \text{v128.load32\_zero}~~m{:}\Tmemarg_4 &\Rightarrow& \V128.\LOAD\K{32\_zero}~m \\ &&|& \text{v128.load64\_zero}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{64\_zero}~m \\ &&|& - \text{v128.store}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\STORE~m \\ + \text{v128.store}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\STORE~m \\ &&|& + \text{v128.load8\_lane}~~m{:}\Tmemarg_1~~laneidx{:}\Tu8 &\Rightarrow& \V128.\LOAD\K{8\_lane}~m~laneidx \\ &&|& + \text{v128.load16\_lane}~~m{:}\Tmemarg_2~~laneidx{:}\Tu8 &\Rightarrow& \V128.\LOAD\K{16\_lane}~m~laneidx \\ &&|& + \text{v128.load32\_lane}~~m{:}\Tmemarg_4~~laneidx{:}\Tu8 &\Rightarrow& \V128.\LOAD\K{32\_lane}~m~laneidx \\ &&|& + \text{v128.load64\_lane}~~m{:}\Tmemarg_8~~laneidx{:}\Tu8 &\Rightarrow& \V128.\LOAD\K{64\_lane}~m~laneidx \\ &&|& + \text{v128.store8\_lane}~~m{:}\Tmemarg_1~~laneidx{:}\Tu8 &\Rightarrow& \V128.\STORE\K{8\_lane}~m~laneidx \\ &&|& + \text{v128.store16\_lane}~~m{:}\Tmemarg_2~~laneidx{:}\Tu8 &\Rightarrow& \V128.\STORE\K{16\_lane}~m~laneidx \\ &&|& + \text{v128.store32\_lane}~~m{:}\Tmemarg_4~~laneidx{:}\Tu8 &\Rightarrow& \V128.\STORE\K{32\_lane}~m~laneidx \\ &&|& + \text{v128.store64\_lane}~~m{:}\Tmemarg_8~~laneidx{:}\Tu8 &\Rightarrow& \V128.\STORE\K{64\_lane}~m~laneidx \\ \end{array} SIMD const instructions have a mandatory :ref:`shape ` descriptor, which determines how the following values are parsed. From 77b3177b82512183cb61422844880235a3a8ea2d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 22 Sep 2020 16:23:56 -0700 Subject: [PATCH 320/378] [spectext] Add {f32x4,f64x2}.{pmin,pmax} We added these instructions to the syntax in #353, this adds them to the other sections, numerics, text, binary. --- .../core/appendix/gen-index-instructions.py | 4 +++ document/core/appendix/index-instructions.rst | 4 +++ document/core/binary/instructions.rst | 8 +++-- document/core/exec/numerics.rst | 32 +++++++++++++++++++ document/core/text/instructions.rst | 8 +++-- document/core/util/macros.def | 4 +++ 6 files changed, 56 insertions(+), 4 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 03f65126a2..5fcefc9432 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -519,6 +519,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~231', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~232', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~233', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\F32X4.\VPMIN', r'\hex{FD}~~234', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), + Instruction(r'\F32X4.\VPMAX', r'\hex{FD}~~235', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), @@ -527,6 +529,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), + Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), + Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~246', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_u'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index a6c5e3b031..949bec12eb 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -467,6 +467,8 @@ Instruction Binary Opcode Type :math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~234` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~235` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -475,6 +477,8 @@ Instruction Binary Opcode Type :math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 5370f1584b..742434e5e9 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -730,7 +730,9 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~230{:}\Bu32 &\Rightarrow& \F32X4.\VMUL \\ &&|& \hex{FD}~~231{:}\Bu32 &\Rightarrow& \F32X4.\VDIV \\ &&|& \hex{FD}~~232{:}\Bu32 &\Rightarrow& \F32X4.\VMIN \\ &&|& - \hex{FD}~~233{:}\Bu32 &\Rightarrow& \F32X4.\VMAX \\ + \hex{FD}~~233{:}\Bu32 &\Rightarrow& \F32X4.\VMAX \\ &&|& + \hex{FD}~~234{:}\Bu32 &\Rightarrow& \F32X4.\VPMIN \\ &&|& + \hex{FD}~~235{:}\Bu32 &\Rightarrow& \F32X4.\VPMAX \\ \end{array} .. math:: @@ -744,7 +746,9 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~242{:}\Bu32 &\Rightarrow& \F64X2.\VMUL \\ &&|& \hex{FD}~~243{:}\Bu32 &\Rightarrow& \F64X2.\VDIV \\ &&|& \hex{FD}~~244{:}\Bu32 &\Rightarrow& \F64X2.\VMIN \\ &&|& - \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VMAX \\ + \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VMAX \\ &&|& + \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VPMIN \\ &&|& + \hex{FD}~~246{:}\Bu32 &\Rightarrow& \F64X2.\VPMAX \\ \end{array} .. math:: diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index 12d9465097..b9c121b994 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -1675,6 +1675,38 @@ This non-deterministic result is expressed by the following auxiliary function p \end{array} +.. _op-fpmin: + +:math:`\fpmin_N(z_1, z_2)` +.......................... + +* If :math:`z_2` is less than :math:`z_1` then return :math:`z_2`. + +* Else return :math:`z_1`. + +.. math:: + \begin{array}{@{}lcll} + \fpmin_N(z_1, z_2) &=& z_2 & (\iff \flt_N(z_2, z_1) = 1) \\ + \fpmin_N(z_1, z_2) &=& z_1 & (\otherwise) + \end{array} + + +.. _op-fpmax: + +:math:`\fpmax_N(z_1, z_2)` +.......................... + +* If :math:`z_1` is less than :math:`z_2` then return :math:`z_2`. + +* Else return :math:`z_1`. + +.. math:: + \begin{array}{@{}lcll} + \fpmax_N(z_1, z_2) &=& z_2 & (\iff \flt_N(z_1, z_2) = 1) \\ + \fpmax_N(z_1, z_2) &=& z_1 & (\otherwise) + \end{array} + + .. _convert-ops: Conversions diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 27098757d9..2df52d3f87 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -763,7 +763,9 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{f32x4.mul} &\Rightarrow& \F32X4.\VMUL\\ &&|& \text{f32x4.div} &\Rightarrow& \F32X4.\VDIV\\ &&|& \text{f32x4.min} &\Rightarrow& \F32X4.\VMIN\\ &&|& - \text{f32x4.max} &\Rightarrow& \F32X4.\VMAX\\ + \text{f32x4.max} &\Rightarrow& \F32X4.\VMAX\\ &&|& + \text{f32x4.pmin} &\Rightarrow& \F32X4.\VPMIN\\ &&|& + \text{f32x4.pmax} &\Rightarrow& \F32X4.\VPMAX\\ \end{array} .. math:: @@ -777,7 +779,9 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{f64x2.mul} &\Rightarrow& \F64X2.\VMUL\\ &&|& \text{f64x2.div} &\Rightarrow& \F64X2.\VDIV\\ &&|& \text{f64x2.min} &\Rightarrow& \F64X2.\VMIN\\ &&|& - \text{f64x2.max} &\Rightarrow& \F64X2.\VMAX\\ + \text{f64x2.max} &\Rightarrow& \F64X2.\VMAX\\ &&|& + \text{f64x2.pmin} &\Rightarrow& \F64X2.\VPMIN\\ &&|& + \text{f64x2.pmax} &\Rightarrow& \F64X2.\VPMAX\\ \end{array} .. math:: diff --git a/document/core/util/macros.def b/document/core/util/macros.def index f728452755..2822712b64 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -420,6 +420,8 @@ .. |VDIV| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{div}} .. |VMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{min}} .. |VMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{max}} +.. |VPMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmin}} +.. |VPMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmax}} .. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} .. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{widen}} .. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} @@ -1056,6 +1058,8 @@ .. |fgt| mathdef:: \xref{exec/numerics}{op-fgt}{\F{fgt}} .. |fle| mathdef:: \xref{exec/numerics}{op-fle}{\F{fle}} .. |fge| mathdef:: \xref{exec/numerics}{op-fge}{\F{fge}} +.. |fpmin| mathdef:: \xref{exec/numerics}{op-fpmin}{\F{fpmin}} +.. |fpmax| mathdef:: \xref{exec/numerics}{op-fpmax}{\F{fpmax}} .. |extend| mathdef:: \xref{exec/numerics}{op-extend_u}{\F{extend}} .. |extendu| mathdef:: \xref{exec/numerics}{op-extend_u}{\F{extend}^{\K{u}}} From 4c442cec36b9029deeeddfd72ed728b19fa763ed Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 12 Feb 2021 14:44:19 -0800 Subject: [PATCH 321/378] [interpreter] Add i64x2.all_true This was merged in #415. --- interpreter/binary/decode.ml | 1 + interpreter/binary/encode.ml | 1 + interpreter/exec/eval_simd.ml | 1 + interpreter/syntax/operators.ml | 1 + interpreter/text/arrange.ml | 1 + interpreter/text/lexer.mll | 3 +-- test/core/simd/simd_boolean.wast | 20 ++++++++++++++++++++ 7 files changed, 26 insertions(+), 2 deletions(-) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index f5a48bded8..49673db25a 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -427,6 +427,7 @@ let simd_prefix s = | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u | 0xcel -> i64x2_add + | 0xcfl -> i64x2_all_true | 0xd0l -> i64x2_ne | 0xd1l -> i64x2_sub | 0xd2l -> i64x2_extmul_low_i32x4_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 844c042c4c..a8e1cbae41 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -274,6 +274,7 @@ let encode m = | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l + | Test (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xcfl | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 3373a5b01d..a7a3be2dcd 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -192,6 +192,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I8x16 AllTrue -> SXX.I8x16.all_true | I16x8 AllTrue -> SXX.I16x8.all_true | I32x4 AllTrue -> SXX.I32x4.all_true + | I64x2 AllTrue -> SXX.I64x2.all_true | _ -> assert false in fun v -> f (of_value 1 v) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 89518baa18..ea13952681 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -413,6 +413,7 @@ let i64x2_ge_s = Binary (V128 V128Op.(I64x2 GeS)) let i64x2_abs = Unary (V128 V128Op.(I64x2 Abs)) let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) let i64x2_bitmask = SimdBitmask Simd.I64x2 +let i64x2_all_true = Test (V128 V128Op.(I64x2 AllTrue)) let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub)) let i64x2_mul = Binary (V128 V128Op.(I64x2 Mul)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index c45db97b65..4e9dd9e1d8 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -194,6 +194,7 @@ struct | I8x16 AllTrue -> "i8x16.all_true" | I16x8 AllTrue -> "i16x8.all_true" | I32x4 AllTrue -> "i32x4.all_true" + | I64x2 AllTrue -> "i64x2.all_true" | V128 AnyTrue -> "v128.any_true" | _ -> assert false diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 0f0bcd5ecc..2632ff6867 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -538,8 +538,7 @@ rule token = parse | "i8x16.popcnt" { UNARY i8x16_popcnt } | (simd_int_shape as s)".all_true" - { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true unreachable) } + { UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } | (simd_int_shape as s)".bitmask" { UNARY (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } | (simd_int_shape as s)".shl" diff --git a/test/core/simd/simd_boolean.wast b/test/core/simd/simd_boolean.wast index 8eb0c87194..6ab330fe50 100644 --- a/test/core/simd/simd_boolean.wast +++ b/test/core/simd/simd_boolean.wast @@ -13,6 +13,7 @@ (func (export "i32x4.all_true") (param $0 v128) (result i32) (i32x4.all_true (local.get $0))) (func (export "i32x4.bitmask") (param $0 v128) (result i32) (i32x4.bitmask (local.get $0))) + (func (export "i64x2.all_true") (param $0 v128) (result i32) (i64x2.all_true (local.get $0))) (func (export "i64x2.bitmask") (param $0 v128) (result i32) (i64x2.bitmask (local.get $0))) ) @@ -158,6 +159,25 @@ (assert_return (invoke "i32x4.bitmask" (v128.const i32x4 -1 0 1 0xF)) (i32.const 0x00000001)) +;; i64x2 +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0 0)) + (i32.const 0)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0 1)) + (i32.const 0)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 1 0)) + (i32.const 0)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 1 1)) + (i32.const 1)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 -1 0)) + (i32.const 0)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0x00 0x00)) + (i32.const 0)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0xFF 0xFF)) + (i32.const 1)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0xAB 0xAB)) + (i32.const 1)) +(assert_return (invoke "i64x2.all_true" (v128.const i64x2 0x55 0x55)) + (i32.const 1)) (assert_return (invoke "i64x2.bitmask" (v128.const i64x2 0xFFFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF)) (i32.const 0x00000003)) (assert_return (invoke "i64x2.bitmask" (v128.const i64x2 -1 0xF)) From 31efb158481144847ea325ee858cb36f28de8e66 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Feb 2021 10:15:53 -0800 Subject: [PATCH 322/378] [interpreter] Add a missing closing parens Missed it in #466. --- interpreter/exec/simd.ml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 831762a460..36299e13d3 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -450,7 +450,7 @@ struct let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u let convert_zero f v = - Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v))) + Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v)))) let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u From b2e0c765aaad4a2bc29d6f8dd1b8a1233b40e5f9 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Feb 2021 16:04:53 -0800 Subject: [PATCH 323/378] [interpreter] f64x2.promote_low_f32x4 and f32x4.demote_f64x2_zero These 2 instructions were merged as part of #383. The test cases are add manually to simd_conversions.wast, using constants from test/core/conversions.wast. --- interpreter/binary/decode.ml | 2 + interpreter/binary/encode.ml | 2 + interpreter/exec/eval_simd.ml | 2 + interpreter/exec/simd.ml | 12 +++ interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 2 + interpreter/text/arrange.ml | 2 + interpreter/text/lexer.mll | 4 + test/core/simd/simd_conversions.wast | 152 +++++++++++++++++++++++++++ 9 files changed, 179 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 49673db25a..8839c1d062 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -306,6 +306,7 @@ let simd_prefix s = | 0x52l -> v128_bitselect | 0x55l -> i32x4_trunc_sat_f64x2_s_zero | 0x56l -> i32x4_trunc_sat_f64x2_u_zero + | 0x57l -> f32x4_demote_f64x2_zero | 0x58l -> let a, o = memop s in let lane = u8 s in @@ -348,6 +349,7 @@ let simd_prefix s = | 0x6dl -> i8x16_shr_u | 0x65l -> i8x16_narrow_i16x8_s | 0x66l -> i8x16_narrow_i16x8_u + | 0x69l -> f64x2_promote_low_f32x4 | 0x6el -> i8x16_add | 0x6fl -> i8x16_add_sat_s | 0x70l -> i8x16_add_sat_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index a8e1cbae41..f84c78af9b 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -386,6 +386,8 @@ let encode m = | Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0x56l | Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl + | Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x57l + | Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x69l | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index a7a3be2dcd..4b1a555a65 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -50,6 +50,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | F32x4 Nearest -> to_value (SXX.F32x4.nearest (of_value 1 v)) | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) + | F32x4 DemoteF64x2Zero -> to_value (SXX.F32x4_convert.demote_f64x2_zero (of_value 1 v)) | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) @@ -57,6 +58,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | F64x2 Floor -> to_value (SXX.F64x2.floor (of_value 1 v)) | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) + | F64x2 PromoteLowF32x4 -> to_value (SXX.F64x2_convert.promote_low_f32x4 (of_value 1 v)) | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) | _ -> assert false diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 36299e13d3..3fec3045dd 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -212,6 +212,11 @@ sig module F32x4_convert : sig val convert_i32x4_s : t -> t val convert_i32x4_u : t -> t + val demote_f64x2_zero : t -> t + end + + module F64x2_convert : sig + val promote_low_f32x4 : t -> t end end @@ -499,5 +504,12 @@ struct let convert f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) let convert_i32x4_s = convert F32_convert.convert_i32_s let convert_i32x4_u = convert F32_convert.convert_i32_u + let demote_f64x2_zero v = + Rep.(of_f32x4 F32.(List.map F32_convert.demote_f64 (to_f64x2 v) @ [zero; zero])) + end + + module F64x2_convert = struct + let promote_low_f32x4 v = + Rep.(of_f64x2 (List.map F64_convert.promote_f32 (Lib.List.take 2 (to_f32x4 v)))) end end diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 92fe56ebef..934fca8258 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -60,6 +60,7 @@ struct type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest | ConvertI32x4S | ConvertI32x4U + | DemoteF64x2Zero | PromoteLowF32x4 type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index ea13952681..828186a58b 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -451,6 +451,7 @@ let f32x4_convert_i32x4_s = Unary (V128 V128Op.(F32x4 ConvertI32x4S)) let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) let f32x4_pmin = Binary (V128 V128Op.(F32x4 Pmin)) let f32x4_pmax = Binary (V128 V128Op.(F32x4 Pmax)) +let f32x4_demote_f64x2_zero = Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) let f64x2_splat = Convert (V128 V128Op.(F64x2 Splat)) let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) @@ -476,3 +477,4 @@ let f64x2_max = Binary (V128 V128Op.(F64x2 Max)) let f64x2_abs = Unary (V128 V128Op.(F64x2 Abs)) let f64x2_pmin = Binary (V128 V128Op.(F64x2 Pmin)) let f64x2_pmax = Binary (V128 V128Op.(F64x2 Pmax)) +let f64x2_promote_low_f32x4 = Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 4e9dd9e1d8..8e39925b95 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -230,6 +230,7 @@ struct | F32x4 Floor -> "f32x4.floor" | F32x4 Trunc -> "f32x4.trunc" | F32x4 Nearest -> "f32x4.nearest" + | F32x4 DemoteF64x2Zero -> "f32x4.demote_f64x2_zero" | F64x2 Ceil -> "f64x2.ceil" | F64x2 Floor -> "f64x2.floor" | F64x2 Trunc -> "f64x2.trunc" @@ -242,6 +243,7 @@ struct | F64x2 Abs -> "f64x2.abs" | F64x2 Neg -> "f64x2.neg" | F64x2 Sqrt -> "f64x2.sqrt" + | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" | V128 Not -> "v128.not" | _ -> failwith "Unimplemented v128 unop" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 2632ff6867..52670cdcde 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -554,6 +554,10 @@ rule token = parse { UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" { UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } + | "f64x2.promote_low_f32x4" + { UNARY f64x2_promote_low_f32x4 } + | "f32x4.demote_f64x2_zero" + { UNARY f32x4_demote_f64x2_zero } | "f32x4.convert_i32x4_"(sign as s) { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } | "i8x16.narrow_i16x8_"(sign as s) diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 404bfa01ec..436a16d416 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -16,8 +16,160 @@ (i16x8.narrow_i32x4_s (local.get 0) (local.get 1))) (func (export "i16x8.narrow_i32x4_u") (param v128 v128) (result v128) (i16x8.narrow_i32x4_u (local.get 0)(local.get 1))) + + ;; Float to float promote/demote + (func (export "f64x2.promote_low_f32x4") (param v128) (result v128) + (f64x2.promote_low_f32x4 (local.get 0))) + (func (export "f32x4.demote_f64x2_zero") (param v128) (result v128) + (f32x4.demote_f64x2_zero (local.get 0))) ) +;; f64x2.promote_low_f32x4 +;; Float constants copied from test/core/conversions.wast. + +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 0.0 0.0 0.0 0.0)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -0.0 -0.0 -0.0 -0.0)) + (v128.const f64x2 -0.0 -0.0)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 0x1p-149 0x1p-149 0x1p-149 0x1p-149)) + (v128.const f64x2 0x1p-149 0x1p-149)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -0x1p-149 -0x1p-149 -0x1p-149 -0x1p-149)) + (v128.const f64x2 -0x1p-149 -0x1p-149)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 1.0 1.0 1.0 1.0)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -1.0 -1.0 -1.0 -1.0)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) +;; Generated randomly by picking a random int and reinterpret it to float. +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 0x1p-119 0x1p-119 0x1p-119 0x1p-119)) + (v128.const f64x2 0x1p-119 0x1p-119)) +;; Generated randomly by picking a random float. +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 0x1.8f867ep+125 0x1.8f867ep+125 0x1.8f867ep+125 0x1.8f867ep+125)) + (v128.const f64x2 6.6382536710104395e+37 6.6382536710104395e+37)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 inf inf inf inf)) + (v128.const f64x2 inf inf)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -inf -inf -inf -inf)) + (v128.const f64x2 -inf -inf)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 nan nan nan nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 nan:0x200000 nan:0x200000 nan:0x200000 nan:0x200000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -nan -nan -nan -nan)) + (v128.const f64x2 nan:canonical nan:canonical)) +(assert_return (invoke "f64x2.promote_low_f32x4" (v128.const f32x4 -nan:0x200000 -nan:0x200000 -nan:0x200000 -nan:0x200000)) + (v128.const f64x2 nan:arithmetic nan:arithmetic)) + +;; f32x4.demote_f64x2_zero +;; Float constants copied from test/core/conversions.wast. + +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0.0 0.0)) + (v128.const f32x4 0.0 0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0.0 -0.0)) + (v128.const f32x4 -0.0 -0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x0.0000000000001p-1022 0x0.0000000000001p-1022)) + (v128.const f32x4 0.0 0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x0.0000000000001p-1022 -0x0.0000000000001p-1022)) + (v128.const f32x4 -0.0 -0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 1.0 1.0)) + (v128.const f32x4 1.0 1.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -1.0 -1.0)) + (v128.const f32x4 -1.0 -1.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffe0000000p-127 0x1.fffffe0000000p-127)) + (v128.const f32x4 0x1p-126 0x1p-126 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffe0000000p-127 -0x1.fffffe0000000p-127)) + (v128.const f32x4 -0x1p-126 -0x1p-126 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffdfffffffp-127 0x1.fffffdfffffffp-127)) + (v128.const f32x4 0x1.fffffcp-127 0x1.fffffcp-127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffdfffffffp-127 -0x1.fffffdfffffffp-127)) + (v128.const f32x4 -0x1.fffffcp-127 -0x1.fffffcp-127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1p-149 0x1p-149)) + (v128.const f32x4 0x1p-149 0x1p-149 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1p-149 -0x1p-149)) + (v128.const f32x4 -0x1p-149 -0x1p-149 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffd0000000p+127 0x1.fffffd0000000p+127)) + (v128.const f32x4 0x1.fffffcp+127 0x1.fffffcp+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffd0000000p+127 -0x1.fffffd0000000p+127)) + (v128.const f32x4 -0x1.fffffcp+127 -0x1.fffffcp+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffd0000001p+127 0x1.fffffd0000001p+127)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffd0000001p+127 -0x1.fffffd0000001p+127)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffefffffffp+127 0x1.fffffefffffffp+127)) + (v128.const f32x4 0x1.fffffep+127 0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.fffffefffffffp+127 -0x1.fffffefffffffp+127)) + (v128.const f32x4 -0x1.fffffep+127 -0x1.fffffep+127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.ffffffp+127 0x1.ffffffp+127)) + (v128.const f32x4 inf inf 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.ffffffp+127 -0x1.ffffffp+127)) + (v128.const f32x4 -inf -inf 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1p-119 0x1p-119)) + (v128.const f32x4 0x1p-119 0x1p-119 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.8f867ep+125 0x1.8f867ep+125)) + (v128.const f32x4 0x1.8f867ep+125 0x1.8f867ep+125 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 inf inf)) + (v128.const f32x4 inf inf 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -inf -inf)) + (v128.const f32x4 -inf -inf 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000000000001p+0 0x1.0000000000001p+0)) + (v128.const f32x4 1.0 1.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.fffffffffffffp-1 0x1.fffffffffffffp-1)) + (v128.const f32x4 1.0 1.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000010000000p+0 0x1.0000010000000p+0)) + (v128.const f32x4 0x1.000000p+0 0x1.000000p+0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000010000001p+0 0x1.0000010000001p+0)) + (v128.const f32x4 0x1.000002p+0 0x1.000002p+0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.000002fffffffp+0 0x1.000002fffffffp+0)) + (v128.const f32x4 0x1.000002p+0 0x1.000002p+0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000030000000p+0 0x1.0000030000000p+0)) + (v128.const f32x4 0x1.000004p+0 0x1.000004p+0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000050000000p+0 0x1.0000050000000p+0)) + (v128.const f32x4 0x1.000004p+0 0x1.000004p+0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000010000000p+24 0x1.0000010000000p+24)) + (v128.const f32x4 0x1.0p+24 0x1.0p+24 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000010000001p+24 0x1.0000010000001p+24)) + (v128.const f32x4 0x1.000002p+24 0x1.000002p+24 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.000002fffffffp+24 0x1.000002fffffffp+24)) + (v128.const f32x4 0x1.000002p+24 0x1.000002p+24 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000030000000p+24 0x1.0000030000000p+24)) + (v128.const f32x4 0x1.000004p+24 0x1.000004p+24 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.4eae4f7024c7p+108 0x1.4eae4f7024c7p+108)) + (v128.const f32x4 0x1.4eae5p+108 0x1.4eae5p+108 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.a12e71e358685p-113 0x1.a12e71e358685p-113)) + (v128.const f32x4 0x1.a12e72p-113 0x1.a12e72p-113 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.cb98354d521ffp-127 0x1.cb98354d521ffp-127)) + (v128.const f32x4 0x1.cb9834p-127 0x1.cb9834p-127 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.6972b30cfb562p+1 -0x1.6972b30cfb562p+1)) + (v128.const f32x4 -0x1.6972b4p+1 -0x1.6972b4p+1 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.bedbe4819d4c4p+112 -0x1.bedbe4819d4c4p+112)) + (v128.const f32x4 -0x1.bedbe4p+112 -0x1.bedbe4p+112 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 nan nan)) + (v128.const f32x4 nan:canonical nan:canonical 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 nan:0x4000000000000 nan:0x4000000000000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -nan -nan)) + (v128.const f32x4 nan:canonical nan:canonical 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -nan:0x4000000000000 -nan:0x4000000000000)) + (v128.const f32x4 nan:arithmetic nan:arithmetic 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1p-1022 0x1p-1022)) + (v128.const f32x4 0.0 0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1p-1022 -0x1p-1022)) + (v128.const f32x4 -0.0 -0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0p-150 0x1.0p-150)) + (v128.const f32x4 0.0 0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.0p-150 -0x1.0p-150)) + (v128.const f32x4 -0.0 -0.0 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 0x1.0000000000001p-150 0x1.0000000000001p-150)) + (v128.const f32x4 0x1p-149 0x1p-149 0 0)) +(assert_return (invoke "f32x4.demote_f64x2_zero" (v128.const f64x2 -0x1.0000000000001p-150 -0x1.0000000000001p-150)) + (v128.const f32x4 -0x1p-149 -0x1p-149 0 0)) + ;; Integer to floating point ;; f32x4.convert_i32x4_s From 2c28fa8cf6c077f0a559c7240081288a90b9f77b Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Fri, 19 Feb 2021 10:14:27 -0800 Subject: [PATCH 324/378] Final opcodes (#452) --- proposals/simd/BinarySIMD.md | 100 +++++++++++++++++----------------- proposals/simd/NewOpcodes.md | 101 ++++++++++++++++++++++------------- 2 files changed, 113 insertions(+), 88 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index c1cc39cdf9..196f462f37 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -192,14 +192,14 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.add` | `0xce`| - | | `i64x2.sub` | `0xd1`| - | | `i64x2.mul` | `0xd5`| - | -| `f32x4.ceil` | `0xd8`| - | -| `f32x4.floor` | `0xd9`| - | -| `f32x4.trunc` | `0xda`| - | -| `f32x4.nearest` | `0xdb`| - | -| `f64x2.ceil` | `0xdc`| - | -| `f64x2.floor` | `0xdd`| - | -| `f64x2.trunc` | `0xde`| - | -| `f64x2.nearest` | `0xdf`| - | +| `f32x4.ceil` | `0x67`| - | +| `f32x4.floor` | `0x68`| - | +| `f32x4.trunc` | `0x69`| - | +| `f32x4.nearest` | `0x6a`| - | +| `f64x2.ceil` | `0x74`| - | +| `f64x2.floor` | `0x75`| - | +| `f64x2.trunc` | `0x7a`| - | +| `f64x2.nearest` | `0x94`| - | | `f32x4.abs` | `0xe0`| - | | `f32x4.neg` | `0xe1`| - | | `f32x4.sqrt` | `0xe3`| - | @@ -226,45 +226,45 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | | `f32x4.convert_i32x4_s` | `0xfa`| - | | `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0xfc`| - | -| `v128.load64_zero` | `0xfd`| - | -| `i16x8.extmul_low_i8x16_s` | `0x110`| - | -| `i16x8.extmul_high_i8x16_s` | `0x111`| - | -| `i16x8.extmul_low_i8x16_u` | `0x112`| - | -| `i16x8.extmul_high_i8x16_u` | `0x113`| - | -| `i32x4.extmul_low_i16x8_s` | `0x114`| - | -| `i32x4.extmul_high_i16x8_s` | `0x115`| - | -| `i32x4.extmul_low_i16x8_u` | `0x116`| - | -| `i32x4.extmul_high_i16x8_u` | `0x117`| - | -| `i64x2.extmul_low_i32x4_s` | `0x118`| - | -| `i64x2.extmul_high_i32x4_s` | `0x119`| - | -| `i64x2.extmul_low_i32x4_u` | `0x11a`| - | -| `i64x2.extmul_high_i32x4_u` | `0x11b`| - | -| `i16x8.q15mulr_sat_s` | `TBD`| - | -| `v128.any_true` | `TBD`| - | -| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 | -| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 | -| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 | -| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 | -| `i64x2.eq` | `TBD`| - | -| `i64x2.ne` | `TBD`| - | -| `i64x2.lt_s` | `TBD`| - | -| `i64x2.gt_s` | `TBD`| - | -| `i64x2.le_s` | `TBD`| - | -| `i64x2.ge_s` | `TBD`| - | -| `i64x2.all_true` | `TBD`| - | -| `f64x2.convert_low_i32x4_s` | `TBD`| - | -| `f64x2.convert_low_i32x4_u` | `TBD`| - | -| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - | -| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - | -| `f32x4.demote_f64x2_zero` | `TBD`| - | -| `f64x2.promote_low_f32x4` | `TBD`| - | -| `i8x16.popcnt` | `TBD`| - | -| `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - | -| `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - | -| `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - | -| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - | +| `v128.load32_zero` | `0x5c`| - | +| `v128.load64_zero` | `0x5d`| - | +| `i16x8.extmul_low_i8x16_s` | `0x9c`| - | +| `i16x8.extmul_high_i8x16_s` | `0x9d`| - | +| `i16x8.extmul_low_i8x16_u` | `0x9e`| - | +| `i16x8.extmul_high_i8x16_u` | `0x9f`| - | +| `i32x4.extmul_low_i16x8_s` | `0xbc`| - | +| `i32x4.extmul_high_i16x8_s` | `0xbd`| - | +| `i32x4.extmul_low_i16x8_u` | `0xbe`| - | +| `i32x4.extmul_high_i16x8_u` | `0xbf`| - | +| `i64x2.extmul_low_i32x4_s` | `0xdc`| - | +| `i64x2.extmul_high_i32x4_s` | `0xdd`| - | +| `i64x2.extmul_low_i32x4_u` | `0xde`| - | +| `i64x2.extmul_high_i32x4_u` | `0xdf`| - | +| `i16x8.q15mulr_sat_s` | `0x82`| - | +| `v128.any_true` | `0x53`| - | +| `v128.load8_lane` | `0x54`| m:memarg, i:ImmLaneIdx16 | +| `v128.load16_lane` | `0x55`| m:memarg, i:ImmLaneIdx8 | +| `v128.load32_lane` | `0x56`| m:memarg, i:ImmLaneIdx4 | +| `v128.load64_lane` | `0x57`| m:memarg, i:ImmLaneIdx2 | +| `v128.store8_lane` | `0x58`| m:memarg, i:ImmLaneIdx16 | +| `v128.store16_lane` | `0x59`| m:memarg, i:ImmLaneIdx8 | +| `v128.store32_lane` | `0x5a`| m:memarg, i:ImmLaneIdx4 | +| `v128.store64_lane` | `0x5b`| m:memarg, i:ImmLaneIdx2 | +| `i64x2.eq` | `0xd6`| - | +| `i64x2.ne` | `0xd7`| - | +| `i64x2.lt_s` | `0xd8`| - | +| `i64x2.gt_s` | `0xd9`| - | +| `i64x2.le_s` | `0xda`| - | +| `i64x2.ge_s` | `0xdb`| - | +| `i64x2.all_true` | `0xc3`| - | +| `f64x2.convert_low_i32x4_s` | `0xfe`| - | +| `f64x2.convert_low_i32x4_u` | `0xff`| - | +| `i32x4.trunc_sat_f64x2_s_zero` | `0xfc`| - | +| `i32x4.trunc_sat_f64x2_u_zero` | `0xfd`| - | +| `f32x4.demote_f64x2_zero` | `0x5e`| - | +| `f64x2.promote_low_f32x4` | `0x5f`| - | +| `i8x16.popcnt` | `0x62`| - | +| `i16x8.extadd_pairwise_i8x16_s` | `0x7c`| - | +| `i16x8.extadd_pairwise_i8x16_u` | `0x7d`| - | +| `i32x4.extadd_pairwise_i16x8_s` | `0x7e`| - | +| `i32x4.extadd_pairwise_i16x8_u` | `0x7f`| - | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index fd3646e3f2..a423374e93 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -12,8 +12,6 @@ | v128.load32_splat | 0x09 | | v128.load64_splat | 0x0a | | v128.store | 0x0b | -| v128.load32_zero | 0xfc | -| v128.load64_zero | 0xfd | | Basic operation | opcode | | ----------------| ------ | @@ -77,37 +75,60 @@ | v128.or | 0x50 | | v128.xor | 0x51 | | v128.bitselect | 0x52 | +| v128.any_true | 0x53 | -| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | -| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ | -| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 | -| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | -| ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 | -| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | (i64x2.all_true) [TBD] | 0xc3 | -| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | -| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 | -| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 | -| ---- widen ---- | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 | -| ---- widen ---- | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 | -| ---- widen ---- | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 | -| ---- widen ---- | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca | -| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | -| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | -| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | -| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | -| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ------------- | 0xcf | -| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ------------- | 0xd0 | -| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | -| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 | -| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 | -| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 | -| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | -| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ------------- | 0xd6 | -| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ------------- | 0xd7 | -| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ------------- | 0xd8 | -| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ------------- | 0xd9 | -| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ------------- | 0xda | -| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ------------- | 0xdb | +| Load Lane Op | opcode | +| ----------------- | ------ | +| v128.load8_lane | 0x54 | +| v128.load16_lane | 0x55 | +| v128.load32_lane | 0x56 | +| v128.load64_lane | 0x57 | +| v128.store8_lane | 0x58 | +| v128.store16_lane | 0x59 | +| v128.store32_lane | 0x5a | +| v128.store64_lane | 0x5b | +| v128.load32_zero | 0x5c | +| v128.load64_zero | 0x5d | + +| Float conversion | opcode | +| ----------------------- | ------ | +| f32x4.demote_f64x2_zero | 0x5e | +| f64x2.promote_low_f32x4 | 0x5f | + +| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode | +| ----------------------------- | ------ | ------------------------- | ------ | ------------------------- | ------ | ------------------------- | ------ | +| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 | +| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 | +| i8x16.popcnt | 0x62 | i16x8.q15mulr_sat_s | 0x82 | | 0xa2 | ------------- | 0xc2 | +| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | i64x2.all_true | 0xc3 | +| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | +| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 | +| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 | +| f32x4.ceil | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 | +| f32x4.floor | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 | +| f32x4.trunc | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 | +| f32x4.nearest | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca | +| i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | +| i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | +| i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | +| i8x16.add | 0x6e | i16x8.add | 0x8e | i32x4.add | 0xae | i64x2.add | 0xce | +| i8x16.add_sat_s | 0x6f | i16x8.add_sat_s | 0x8f | ---- add_sat ---- | 0xaf | ------------- | 0xcf | +| i8x16.add_sat_u | 0x70 | i16x8.add_sat_u | 0x90 | ---- add_sat ---- | 0xb0 | ------------- | 0xd0 | +| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | +| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 | +| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 | +| f64x2.ceil | 0x74 | f64x2.nearest | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 | +| f64x2.floor | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | +| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | i64x2.eq | 0xd6 | +| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | i64x2.ne | 0xd7 | +| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | i64x2.lt_s | 0xd8 | +| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | i64x2.gt_s | 0xd9 | +| f64x2.trunc | 0x7a | | 0x9a | i32x4.dot_i16x8_s | 0xba | i64x2.le_s | 0xda | +| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | i64x2.ge_s | 0xdb | +| i16x8.extadd_pairwise_i8x16_s | 0x7c | i16x8.extmul_low_i8x16_s | 0x9c | i32x4.extmul_low_i16x8_s | 0xbc | i64x2.extmul_low_i32x4_s | 0xdc | +| i16x8.extadd_pairwise_i8x16_u | 0x7d | i16x8.extmul_high_i8x16_s | 0x9d | i32x4.extmul_high_i16x8_s | 0xbd | i64x2.extmul_high_i32x4_s | 0xdd | +| i32x4.extadd_pairwise_i16x8_s | 0x7e | i16x8.extmul_low_i8x16_u | 0x9e | i32x4.extmul_low_i16x8_u | 0xbe | i64x2.extmul_low_i32x4_u | 0xde | +| i32x4.extadd_pairwise_i16x8_u | 0x7f | i16x8.extmul_high_i8x16_u | 0x9f | i32x4.extmul_high_i16x8_u | 0xbf | i64x2.extmul_high_i32x4_u | 0xdf | | f32x4 Op | opcode | f64x2 Op | opcode | | --------------- | ------ | --------------- | ------ | @@ -124,9 +145,13 @@ | f32x4.pmin | 0xea | f64x2.pmin | 0xf6 | | f32x4.pmax | 0xeb | f64x2.pmax | 0xf7 | -| Conversion Op | opcode | -| ----------------------- | ------ | -| i32x4.trunc_sat_f32x4_s | 0xf8 | -| i32x4.trunc_sat_f32x4_u | 0xf9 | -| f32x4.convert_i32x4_s | 0xfa | -| f32x4.convert_i32x4_u | 0xfb | +| Conversion Op | opcode | +| ---------------------------- | ------ | +| i32x4.trunc_sat_f32x4_s | 0xf8 | +| i32x4.trunc_sat_f32x4_u | 0xf9 | +| f32x4.convert_i32x4_s | 0xfa | +| f32x4.convert_i32x4_u | 0xfb | +| i32x4.trunc_sat_f64x2_s_zero | 0xfc | +| i32x4.trunc_sat_f64x2_u_zero | 0xfd | +| f64x2.convert_low_i32x4_s | 0xfe | +| f64x2.convert_low_i32x4_u | 0xff | From 958c09bfb1c89bd01bc9a2200d7c79421c8417f0 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Fri, 19 Feb 2021 11:33:22 -0800 Subject: [PATCH 325/378] Add links to Emscripten docs to README (#479) --- README.md | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 0172782a2d..a6b63138e0 100644 --- a/README.md +++ b/README.md @@ -12,7 +12,9 @@ resulted. The [proposed semantics](proposals/simd/SIMD.md) has the details. -Note: this proposal is still being worked out, and rate of changes is high, please consult the [implementation status document](proposals/simd/ImplementationStatus.md) to get an idea of the state of implementation across toolchains and embedders. +Note: Consult the [implementation status document](proposals/simd/ImplementationStatus.md) to get an idea of the state of implementation across toolchains and embedders. + +Usage documentation is being collected at https://emscripten.org/docs/porting/simd.html (make PRs [here](https://github.com/emscripten-core/emscripten/blob/master/site/source/docs/porting/simd.rst)) and may be moved to a more vendor-neutral location in the future. [Design issue](https://github.com/WebAssembly/proposals/issues/1) From 64b8775696d8286c246e3f4a8381112db6f34475 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 19 Feb 2021 10:34:03 -0800 Subject: [PATCH 326/378] [spectext] Rename integer widen instructions to integer extend Changes to interpreter will come in a follow-up patch. Fixed #467. --- .../core/appendix/gen-index-instructions.py | 24 +++---- document/core/appendix/index-instructions.rst | 24 +++---- document/core/binary/instructions.rst | 24 +++---- document/core/exec/instructions.rst | 10 +-- document/core/syntax/instructions.rst | 20 +++--- document/core/text/instructions.rst | 24 +++---- document/core/util/macros.def | 4 +- document/core/valid/instructions.rst | 8 +-- proposals/simd/BinarySIMD.md | 24 +++---- proposals/simd/ImplementationStatus.md | 24 +++---- proposals/simd/NewOpcodes.md | 8 +-- proposals/simd/SIMD.md | 70 +++++++++---------- 12 files changed, 132 insertions(+), 132 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 5fcefc9432..3ed07b7477 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -446,10 +446,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I16X8.\WIDEN\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I16X8.\WIDEN\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -474,10 +474,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I32X4.\WIDEN\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I32X4.\WIDEN\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -495,10 +495,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VABS', r'\hex{FD}~~162', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I64X2.\WIDEN\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I64X2.\WIDEN\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I64X2.\WIDEN\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), - Instruction(r'\I64X2.\WIDEN\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-widen'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 949bec12eb..e9d3f15697 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -394,10 +394,10 @@ Instruction Binary Opcode Type :math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\WIDEN\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -422,10 +422,10 @@ Instruction Binary Opcode Type :math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\WIDEN\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -443,10 +443,10 @@ Instruction Binary Opcode Type :math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\WIDEN\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 742434e5e9..7a411158c4 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -640,10 +640,10 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~132{:}\Bu32 &\Rightarrow& \I16X8.\BITMASK \\ &&|& \hex{FD}~~133{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s} \\ &&|& \hex{FD}~~134{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_u} \\ &&|& - \hex{FD}~~135{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_s} \\ &&|& - \hex{FD}~~136{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_s} \\ &&|& - \hex{FD}~~137{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_u} \\ &&|& - \hex{FD}~~138{:}\Bu32 &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_u} \\ &&|& + \hex{FD}~~135{:}\Bu32 &\Rightarrow& \I16X8.\VEXTEND\K{\_low\_i8x16\_s} \\ &&|& + \hex{FD}~~136{:}\Bu32 &\Rightarrow& \I16X8.\VEXTEND\K{\_high\_i8x16\_s} \\ &&|& + \hex{FD}~~137{:}\Bu32 &\Rightarrow& \I16X8.\VEXTEND\K{\_low\_i8x16\_u} \\ &&|& + \hex{FD}~~138{:}\Bu32 &\Rightarrow& \I16X8.\VEXTEND\K{\_high\_i8x16\_u} \\ &&|& \hex{FD}~~139{:}\Bu32 &\Rightarrow& \I16X8.\VSHL \\ &&|& \hex{FD}~~140{:}\Bu32 &\Rightarrow& \I16X8.\VSHR\K{\_s} \\ &&|& \hex{FD}~~141{:}\Bu32 &\Rightarrow& \I16X8.\VSHR\K{\_u} \\ &&|& @@ -673,10 +673,10 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~161{:}\Bu32 &\Rightarrow& \I32X4.\VNEG \\ &&|& \hex{FD}~~163{:}\Bu32 &\Rightarrow& \I32X4.\ALLTRUE \\ &&|& \hex{FD}~~164{:}\Bu32 &\Rightarrow& \I32X4.\BITMASK \\ &&|& - \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s} \\ &&|& - \hex{FD}~~168{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_s} \\ &&|& - \hex{FD}~~169{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_u} \\ &&|& - \hex{FD}~~170{:}\Bu32 &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_u} \\ &&|& + \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_s} \\ &&|& + \hex{FD}~~168{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_s} \\ &&|& + \hex{FD}~~169{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_u} \\ &&|& + \hex{FD}~~170{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_u} \\ &&|& \hex{FD}~~171{:}\Bu32 &\Rightarrow& \I32X4.\VSHL \\ &&|& \hex{FD}~~172{:}\Bu32 &\Rightarrow& \I32X4.\VSHR\K{\_s} \\ &&|& \hex{FD}~~173{:}\Bu32 &\Rightarrow& \I32X4.\VSHR\K{\_u} \\ &&|& @@ -699,10 +699,10 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~162{:}\Bu32 &\Rightarrow& \I64X2.\VABS \\ &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64X2.\BITMASK \\ &&|& - \hex{FD}~~199{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_s} \\ &&|& - \hex{FD}~~200{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_s} \\ &&|& - \hex{FD}~~201{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_u} \\ &&|& - \hex{FD}~~202{:}\Bu32 &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_u} \\ &&|& + \hex{FD}~~199{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_low\_i32x4\_s} \\ &&|& + \hex{FD}~~200{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_high\_i32x4\_s} \\ &&|& + \hex{FD}~~201{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_low\_i32x4\_u} \\ &&|& + \hex{FD}~~202{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_high\_i32x4\_u} \\ &&|& \hex{FD}~~203{:}\Bu32 &\Rightarrow& \I64X2.\VSHL \\ &&|& \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index a0d7b0d716..9a900de96a 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -671,9 +671,9 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-simd-widen: +.. _exec-simd-extend: -:math:`t_2\K{x}N\K{.}\WIDEN\_\K{low}\_t_1\K{x}M\_\sx` +:math:`t_2\K{x}N\K{.}\VEXTEND\_\K{low}\_t_1\K{x}M\_\sx` ..................................................... 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. @@ -689,7 +689,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\WIDEN\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\VEXTEND\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} @@ -699,7 +699,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -:math:`t_2\K{x}N\K{.}\WIDEN\_\K{high}\_t_1\K{x}M\_\sx` +:math:`t_2\K{x}N\K{.}\VEXTEND\_\K{high}\_t_1\K{x}M\_\sx` ...................................................... 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. @@ -715,7 +715,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\WIDEN\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\VEXTEND\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index ba2376214c..4dbd2b5463 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -242,12 +242,12 @@ SIMD instructions provide basic operations over :ref:`values ` of \ishape\K{.}\BITMASK \\ &&|& \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& - \K{i16x8.}\WIDEN\K{\_low}\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\WIDEN\K{\_low}\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\WIDEN\K{\_low}\K{\_i32x4\_}\sx \\&&|& - \K{i16x8.}\WIDEN\K{\_high}\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\WIDEN\K{\_high}\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\WIDEN\K{\_high}\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\VEXTEND\K{\_low}\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\VEXTEND\K{\_low}\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\VEXTEND\K{\_low}\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\VEXTEND\K{\_high}\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\VEXTEND\K{\_high}\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\VEXTEND\K{\_high}\K{\_i32x4\_}\sx \\&&|& \ishape\K{.}\vshiftop \\&&|& \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ @@ -371,7 +371,7 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vunop: .. _syntax-vbinop: -.. _syntax-vwiden: +.. _syntax-vextend: .. _syntax-vextmul: Conventions @@ -396,9 +396,9 @@ Occasionally, it is convenient to group operators together according to the foll \production{conversion operator} & \vcvtop &::=& \VTRUNC\K{\_sat} ~|~ \VCONVERT \\ - \production{widen operator} & \vwiden &::=& - \WIDEN\K{\_low\_}\shape\K{\_}\sx ~|~ - \WIDEN\K{\_high\_}\shape\K{\_}\sx \\ + \production{extend operator} & \vextend &::=& + \VEXTEND\K{\_low\_}\shape\K{\_}\sx ~|~ + \VEXTEND\K{\_high\_}\shape\K{\_}\sx \\ \production{extmul operator} & \vextmul &::=& \EXTMUL\K{\_low\_}\ishape\K{\_}\sx ~|~ \EXTMUL\K{\_high\_}\ishape\K{\_}\sx \\ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 2df52d3f87..5158d4970a 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -673,10 +673,10 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i16x8.bitmask} &\Rightarrow& \I16X8.\BITMASK\\ &&|& \text{i16x8.narrow\_i32x4\_s} &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s}\\ &&|& \text{i16x8.narrow\_i32x4\_u} &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_u}\\ &&|& - \text{i16x8.widen\_low\_i8x16\_s} &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_s}\\ &&|& - \text{i16x8.widen\_high\_i8x16\_s} &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_s}\\ &&|& - \text{i16x8.widen\_low\_i8x16\_u} &\Rightarrow& \I16X8.\WIDEN\K{\_low\_i8x16\_u}\\ &&|& - \text{i16x8.widen\_high\_i8x16\_u} &\Rightarrow& \I16X8.\WIDEN\K{\_high\_i8x16\_u}\\ &&|& + \text{i16x8.extend\_low\_i8x16\_s} &\Rightarrow& \I16X8.\VEXTEND\K{\_low\_i8x16\_s}\\ &&|& + \text{i16x8.extend\_high\_i8x16\_s} &\Rightarrow& \I16X8.\VEXTEND\K{\_high\_i8x16\_s}\\ &&|& + \text{i16x8.extend\_low\_i8x16\_u} &\Rightarrow& \I16X8.\VEXTEND\K{\_low\_i8x16\_u}\\ &&|& + \text{i16x8.extend\_high\_i8x16\_u} &\Rightarrow& \I16X8.\VEXTEND\K{\_high\_i8x16\_u}\\ &&|& \text{i16x8.shl} &\Rightarrow& \I16X8.\VSHL\\ &&|& \text{i16x8.shr\_s} &\Rightarrow& \I16X8.\VSHR\K{\_s}\\ &&|& \text{i16x8.shr\_u} &\Rightarrow& \I16X8.\VSHR\K{\_u}\\ &&|& @@ -706,10 +706,10 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i32x4.neg} &\Rightarrow& \I32X4.\VNEG\\ &&|& \text{i32x4.all\_true} &\Rightarrow& \I32X4.\ALLTRUE\\ &&|& \text{i32x4.bitmask} &\Rightarrow& \I32X4.\BITMASK\\ &&|& - \text{i32x4.widen\_low\_i16x8\_s} &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_s}\\ &&|& - \text{i32x4.widen\_high\_i16x8\_s} &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_s}\\ &&|& - \text{i32x4.widen\_low\_i16x8\_u} &\Rightarrow& \I32X4.\WIDEN\K{\_low\_i16x8\_u}\\ &&|& - \text{i32x4.widen\_high\_i16x8\_u} &\Rightarrow& \I32X4.\WIDEN\K{\_high\_i16x8\_u}\\ &&|& + \text{i32x4.extend\_low\_i16x8\_s} &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_s}\\ &&|& + \text{i32x4.extend\_high\_i16x8\_s} &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_s}\\ &&|& + \text{i32x4.extend\_low\_i16x8\_u} &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_u}\\ &&|& + \text{i32x4.extend\_high\_i16x8\_u} &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_u}\\ &&|& \text{i32x4.shl} &\Rightarrow& \I32X4.\VSHL\\ &&|& \text{i32x4.shr\_s} &\Rightarrow& \I32X4.\VSHR\K{\_s}\\ &&|& \text{i32x4.shr\_u} &\Rightarrow& \I32X4.\VSHR\K{\_u}\\ &&|& @@ -733,10 +733,10 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& \text{i64x2.all\_true} &\Rightarrow& \I64X2.\ALLTRUE\\ &&|& \text{i64x2.bitmask} &\Rightarrow& \I64X2.\BITMASK\\ &&|& - \text{i64x2.widen\_low\_i32x4\_s} &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_s} \\ &&|& - \text{i64x2.widen\_high\_i32x4\_s} &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_s} \\ &&|& - \text{i64x2.widen\_low\_i32x4\_u} &\Rightarrow& \I64X2.\WIDEN\K{\_low\_i32x4\_u} \\ &&|& - \text{i64x2.widen\_high\_i32x4\_u} &\Rightarrow& \I64X2.\WIDEN\K{\_high\_i32x4\_u} \\ &&|& + \text{i64x2.extend\_low\_i32x4\_s} &\Rightarrow& \I64X2.\VEXTEND\K{\_low\_i32x4\_s} \\ &&|& + \text{i64x2.extend\_high\_i32x4\_s} &\Rightarrow& \I64X2.\VEXTEND\K{\_high\_i32x4\_s} \\ &&|& + \text{i64x2.extend\_low\_i32x4\_u} &\Rightarrow& \I64X2.\VEXTEND\K{\_low\_i32x4\_u} \\ &&|& + \text{i64x2.extend\_high\_i32x4\_u} &\Rightarrow& \I64X2.\VEXTEND\K{\_high\_i32x4\_u} \\ &&|& \text{i64x2.shl} &\Rightarrow& \I64X2.\VSHL\\ &&|& \text{i64x2.shr\_s} &\Rightarrow& \I64X2.\VSHR\K{\_s}\\ &&|& \text{i64x2.shr\_u} &\Rightarrow& \I64X2.\VSHR\K{\_u}\\ &&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 2822712b64..6f61458f8e 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -423,7 +423,7 @@ .. |VPMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmin}} .. |VPMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmax}} .. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} -.. |WIDEN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{widen}} +.. |VEXTEND| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extend}} .. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} .. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} @@ -456,7 +456,7 @@ .. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}} .. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}} .. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} -.. |vwiden| mathdef:: \xref{syntax/instructions}{syntax-vwiden}{\X{vwiden}} +.. |vextend| mathdef:: \xref{syntax/instructions}{syntax-vextend}{\X{vextend}} .. |vcvtop| mathdef:: \xref{syntax/instructions}{syntax-vcvtop}{\X{vcvtop}} .. |vextmul| mathdef:: \xref{syntax/instructions}{syntax-vextmul}{\X{vextmul}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 5dd0a652e3..5a8602d648 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -407,17 +407,17 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vwiden: +.. _valid-vextend: -:math:`\shape\K{.}\vwiden\K{\_}\shape\K{\_}\sx` -............................................... +:math:`\shape\K{.}\vextend\K{\_}\shape\K{\_}\sx` +................................................ * The instruction is valid with type :math:`[\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\vwiden\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] + C \vdashinstr \shape\K{.}\vextend\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] } diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 196f462f37..ae63b844fa 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -141,10 +141,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i16x8.bitmask` | `0x84`| - | | `i16x8.narrow_i32x4_s` | `0x85`| - | | `i16x8.narrow_i32x4_u` | `0x86`| - | -| `i16x8.widen_low_i8x16_s` | `0x87`| - | -| `i16x8.widen_high_i8x16_s` | `0x88`| - | -| `i16x8.widen_low_i8x16_u` | `0x89`| - | -| `i16x8.widen_high_i8x16_u` | `0x8a`| - | +| `i16x8.extend_low_i8x16_s` | `0x87`| - | +| `i16x8.extend_high_i8x16_s` | `0x88`| - | +| `i16x8.extend_low_i8x16_u` | `0x89`| - | +| `i16x8.extend_high_i8x16_u` | `0x8a`| - | | `i16x8.shl` | `0x8b`| - | | `i16x8.shr_s` | `0x8c`| - | | `i16x8.shr_u` | `0x8d`| - | @@ -164,10 +164,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.neg` | `0xa1`| - | | `i32x4.all_true` | `0xa3`| - | | `i32x4.bitmask` | `0xa4`| - | -| `i32x4.widen_low_i16x8_s` | `0xa7`| - | -| `i32x4.widen_high_i16x8_s` | `0xa8`| - | -| `i32x4.widen_low_i16x8_u` | `0xa9`| - | -| `i32x4.widen_high_i16x8_u` | `0xaa`| - | +| `i32x4.extend_low_i16x8_s` | `0xa7`| - | +| `i32x4.extend_high_i16x8_s` | `0xa8`| - | +| `i32x4.extend_low_i16x8_u` | `0xa9`| - | +| `i32x4.extend_high_i16x8_u` | `0xaa`| - | | `i32x4.shl` | `0xab`| - | | `i32x4.shr_s` | `0xac`| - | | `i32x4.shr_u` | `0xad`| - | @@ -182,10 +182,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i64x2.abs` | `0xc0`| - | | `i64x2.neg` | `0xc1`| - | | `i64x2.bitmask` | `0xc4`| - | -| `i64x2.widen_low_i32x4_s` | `0xc7`| - | -| `i64x2.widen_high_i32x4_s` | `0xc8`| - | -| `i64x2.widen_low_i32x4_u` | `0xc9`| - | -| `i64x2.widen_high_i32x4_u` | `0xca`| - | +| `i64x2.extend_low_i32x4_s` | `0xc7`| - | +| `i64x2.extend_high_i32x4_s` | `0xc8`| - | +| `i64x2.extend_low_i32x4_u` | `0xc9`| - | +| `i64x2.extend_high_i32x4_u` | `0xca`| - | | `i64x2.shl` | `0xcb`| - | | `i64x2.shr_s` | `0xcc`| - | | `i64x2.shr_u` | `0xcd`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 32513d1e1c..2f24cf6281 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -109,10 +109,10 @@ | `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.widen_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extend_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extend_high_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extend_low_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extend_high_i8x16_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -133,10 +133,10 @@ | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i32x4.widen_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extend_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extend_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extend_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extend_high_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -159,10 +159,10 @@ | `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.widen_low_i32x4_s` | | | | | | -| `i64x2.widen_high_i32x4_s` | | | | | | -| `i64x2.widen_low_i32x4_u` | | | | | | -| `i64x2.widen_high_i32x4_u` | | | | | | +| `i64x2.extend_low_i32x4_s` | | | | | | +| `i64x2.extend_high_i32x4_s` | | | | | | +| `i64x2.extend_low_i32x4_u` | | | | | | +| `i64x2.extend_high_i32x4_u` | | | | | | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index a423374e93..49b1232a49 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -104,10 +104,10 @@ | i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 | | i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 | | i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 | -| f32x4.ceil | 0x67 | i16x8.widen_low_i8x16_s | 0x87 | i32x4.widen_low_i16x8_s | 0xa7 | i64x2.widen_low_i32x4_s | 0xc7 | -| f32x4.floor | 0x68 | i16x8.widen_high_i8x16_s | 0x88 | i32x4.widen_high_i16x8_s | 0xa8 | i64x2.widen_high_i32x4_s | 0xc8 | -| f32x4.trunc | 0x69 | i16x8.widen_low_i8x16_u | 0x89 | i32x4.widen_low_i16x8_u | 0xa9 | i64x2.widen_low_i32x4_u | 0xc9 | -| f32x4.nearest | 0x6a | i16x8.widen_high_i8x16_u | 0x8a | i32x4.widen_high_i16x8_u | 0xaa | i64x2.widen_high_i32x4_u | 0xca | +| f32x4.ceil | 0x67 | i16x8.extend_low_i8x16_s | 0x87 | i32x4.extend_low_i16x8_s | 0xa7 | i64x2.extend_low_i32x4_s | 0xc7 | +| f32x4.floor | 0x68 | i16x8.extend_high_i8x16_s | 0x88 | i32x4.extend_high_i16x8_s | 0xa8 | i64x2.extend_high_i32x4_s | 0xc8 | +| f32x4.trunc | 0x69 | i16x8.extend_low_i8x16_u | 0x89 | i32x4.extend_low_i16x8_u | 0xa9 | i64x2.extend_low_i32x4_u | 0xc9 | +| f32x4.nearest | 0x6a | i16x8.extend_high_i8x16_u | 0x8a | i32x4.extend_high_i16x8_u | 0xaa | i64x2.extend_high_i32x4_u | 0xca | | i8x16.shl | 0x6b | i16x8.shl | 0x8b | i32x4.shl | 0xab | i64x2.shl | 0xcb | | i8x16.shr_s | 0x6c | i16x8.shr_s | 0x8c | i32x4.shr_s | 0xac | i64x2.shr_s | 0xcc | | i8x16.shr_u | 0x6d | i16x8.shr_u | 0x8d | i32x4.shr_u | 0xad | i64x2.shr_u | 0xcd | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index f27ac5309a..a463d101f1 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -435,18 +435,18 @@ def S.neg(a): Lane-wise integer extended multiplication producing twice wider result than the inputs. These instructions provide a more performant equivalent to the following composite operations: -- `i16x8.extmul_low_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.widen_low_i8x16_s(a), i16x8.widen_low_i8x16_s(b))`. -- `i16x8.extmul_high_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.widen_high_i8x16_s(a), i16x8.widen_high_i8x16_s(b))`. -- `i16x8.extmul_low_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.widen_low_i8x16_u(a), i16x8.widen_low_i8x16_u(b))`. -- `i16x8.extmul_high_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.widen_high_i8x16_u(a), i16x8.widen_high_i8x16_u(b))`. -- `i32x4.extmul_low_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.widen_low_i16x8_s(a), i32x4.widen_low_i16x8_s(b))`. -- `i32x4.extmul_high_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.widen_high_i16x8_s(a), i32x4.widen_high_i16x8_s(b))`. -- `i32x4.extmul_low_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.widen_low_i16x8_u(a), i32x4.widen_low_i16x8_u(b))`. -- `i32x4.extmul_high_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.widen_high_i16x8_u(a), i32x4.widen_high_i16x8_u(b))`. -- `i64x2.extmul_low_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.widen_low_i32x4_s(a), i64x2.widen_low_i32x4_s(b))`. -- `i64x2.extmul_high_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.widen_high_i32x4_s(a), i64x2.widen_high_i32x4_s(b))`. -- `i64x2.extmul_low_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_low_i32x4_u(a), i64x2.widen_low_i32x4_u(b))`. -- `i64x2.extmul_high_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.widen_high_i32x4_u(a), i64x2.widen_high_i32x4_u(b))`. +- `i16x8.extmul_low_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.extend_low_i8x16_s(a), i16x8.extend_low_i8x16_s(b))`. +- `i16x8.extmul_high_i8x16_s(a, b)` is equivalent to `i16x8.mul(i16x8.extend_high_i8x16_s(a), i16x8.extend_high_i8x16_s(b))`. +- `i16x8.extmul_low_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.extend_low_i8x16_u(a), i16x8.extend_low_i8x16_u(b))`. +- `i16x8.extmul_high_i8x16_u(a, b)` is equivalent to `i16x8.mul(i16x8.extend_high_i8x16_u(a), i16x8.extend_high_i8x16_u(b))`. +- `i32x4.extmul_low_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.extend_low_i16x8_s(a), i32x4.extend_low_i16x8_s(b))`. +- `i32x4.extmul_high_i16x8_s(a, b)` is equivalent to `i32x4.mul(i32x4.extend_high_i16x8_s(a), i32x4.extend_high_i16x8_s(b))`. +- `i32x4.extmul_low_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.extend_low_i16x8_u(a), i32x4.extend_low_i16x8_u(b))`. +- `i32x4.extmul_high_i16x8_u(a, b)` is equivalent to `i32x4.mul(i32x4.extend_high_i16x8_u(a), i32x4.extend_high_i16x8_u(b))`. +- `i64x2.extmul_low_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.extend_low_i32x4_s(a), i64x2.extend_low_i32x4_s(b))`. +- `i64x2.extmul_high_i32x4_s(a, b)` is equivalent to `i64x2.mul(i64x2.extend_high_i32x4_s(a), i64x2.extend_high_i32x4_s(b))`. +- `i64x2.extmul_low_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.extend_low_i32x4_u(a), i64x2.extend_low_i32x4_u(b))`. +- `i64x2.extmul_high_i32x4_u(a, b)` is equivalent to `i64x2.mul(i64x2.extend_high_i32x4_u(a), i64x2.extend_high_i32x4_u(b))`. ### Extended pairwise integer addition * `i16x8.extadd_pairwise_i8x16_s(a: v128) -> v128` @@ -1136,43 +1136,43 @@ def S.narrow_T_u(a, b): return result ``` -### Integer to integer widening -* `i16x8.widen_low_i8x16_s(a: v128) -> v128` -* `i16x8.widen_high_i8x16_s(a: v128) -> v128` -* `i16x8.widen_low_i8x16_u(a: v128) -> v128` -* `i16x8.widen_high_i8x16_u(a: v128) -> v128` -* `i32x4.widen_low_i16x8_s(a: v128) -> v128` -* `i32x4.widen_high_i16x8_s(a: v128) -> v128` -* `i32x4.widen_low_i16x8_u(a: v128) -> v128` -* `i32x4.widen_high_i16x8_u(a: v128) -> v128` -* `i64x2.widen_low_i32x4_s(a: v128) -> v128` -* `i64x2.widen_high_i32x4_s(a: v128) -> v128` -* `i64x2.widen_low_i32x4_u(a: v128) -> v128` -* `i64x2.widen_high_i32x4_u(a: v128) -> v128` +### Integer to integer extension +* `i16x8.extend_low_i8x16_s(a: v128) -> v128` +* `i16x8.extend_high_i8x16_s(a: v128) -> v128` +* `i16x8.extend_low_i8x16_u(a: v128) -> v128` +* `i16x8.extend_high_i8x16_u(a: v128) -> v128` +* `i32x4.extend_low_i16x8_s(a: v128) -> v128` +* `i32x4.extend_high_i16x8_s(a: v128) -> v128` +* `i32x4.extend_low_i16x8_u(a: v128) -> v128` +* `i32x4.extend_high_i16x8_u(a: v128) -> v128` +* `i64x2.extend_low_i32x4_s(a: v128) -> v128` +* `i64x2.extend_high_i32x4_s(a: v128) -> v128` +* `i64x2.extend_low_i32x4_u(a: v128) -> v128` +* `i64x2.extend_high_i32x4_u(a: v128) -> v128` Converts low or high half of the smaller lane vector to a larger lane vector, sign extended or zero (unsigned) extended. ```python -def S.widen_low_T(ext, a): +def S.extend_low_T(ext, a): result = S.New() for i in range(S.Lanes): result[i] = ext(a[i]) -def S.widen_high_T(ext, a): +def S.extend_high_T(ext, a): result = S.New() for i in range(S.Lanes): result[i] = ext(a[S.Lanes + i]) -def S.widen_low_T_s(a): - return S.widen_low_T(Sext, a) +def S.extend_low_T_s(a): + return S.extend_low_T(Sext, a) -def S.widen_high_T_s(a): - return S.widen_high_T(Sext, a) +def S.extend_high_T_s(a): + return S.extend_high_T(Sext, a) -def S.widen_low_T_u(a): - return S.widen_low_T(Zext, a) +def S.extend_low_T_u(a): + return S.extend_low_T(Zext, a) -def S.widen_high_T_u(a): - return S.widen_high_T(Zext, a) +def S.extend_high_T_u(a): + return S.extend_high_T(Zext, a) ``` From a64adb98d5d9ca8ab3934e1b018c733a4742d976 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Feb 2021 13:19:42 -0800 Subject: [PATCH 327/378] [interpreter] Implement f64x2.convert_low_i32x4_{s,u} These 2 instructions were merged as part of #383. --- interpreter/binary/decode.ml | 2 ++ interpreter/binary/encode.ml | 2 ++ interpreter/exec/eval_simd.ml | 2 ++ interpreter/exec/simd.ml | 5 ++++ interpreter/syntax/operators.ml | 2 ++ interpreter/text/arrange.ml | 2 ++ interpreter/text/lexer.mll | 2 ++ test/core/simd/simd_conversions.wast | 35 ++++++++++++++++++++++++++++ 8 files changed, 52 insertions(+) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 8839c1d062..bc9f4c842c 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -304,6 +304,8 @@ let simd_prefix s = | 0x50l -> v128_or | 0x51l -> v128_xor | 0x52l -> v128_bitselect + | 0x53l -> f64x2_convert_low_i32x4_s + | 0x54l -> f64x2_convert_low_i32x4_u | 0x55l -> i32x4_trunc_sat_f64x2_s_zero | 0x56l -> i32x4_trunc_sat_f64x2_u_zero | 0x57l -> f32x4_demote_f64x2_zero diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index f84c78af9b..1d87160afe 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -388,6 +388,8 @@ let encode m = | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl | Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x57l | Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x69l + | Unary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0x53l + | Unary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0x54l | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 4b1a555a65..e9f939de65 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -59,6 +59,8 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) | F64x2 PromoteLowF32x4 -> to_value (SXX.F64x2_convert.promote_low_f32x4 (of_value 1 v)) + | F64x2 ConvertI32x4S -> to_value (SXX.F64x2_convert.convert_i32x4_s (of_value 1 v)) + | F64x2 ConvertI32x4U -> to_value (SXX.F64x2_convert.convert_i32x4_u (of_value 1 v)) | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) | _ -> assert false diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 3fec3045dd..e7f7c68a2c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -217,6 +217,8 @@ sig module F64x2_convert : sig val promote_low_f32x4 : t -> t + val convert_i32x4_s : t -> t + val convert_i32x4_u : t -> t end end @@ -509,6 +511,9 @@ struct end module F64x2_convert = struct + let convert f v = Rep.of_f64x2 (List.map f (Lib.List.take 2 (Rep.to_i32x4 v))) + let convert_i32x4_s = convert F64_convert.convert_i32_s + let convert_i32x4_u = convert F64_convert.convert_i32_u let promote_low_f32x4 v = Rep.(of_f64x2 (List.map F64_convert.promote_f32 (Lib.List.take 2 (to_f32x4 v)))) end diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 828186a58b..eedfd57051 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -478,3 +478,5 @@ let f64x2_abs = Unary (V128 V128Op.(F64x2 Abs)) let f64x2_pmin = Binary (V128 V128Op.(F64x2 Pmin)) let f64x2_pmax = Binary (V128 V128Op.(F64x2 Pmax)) let f64x2_promote_low_f32x4 = Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) +let f64x2_convert_low_i32x4_s = Unary (V128 V128Op.(F64x2 ConvertI32x4S)) +let f64x2_convert_low_i32x4_u = Unary (V128 V128Op.(F64x2 ConvertI32x4U)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 8e39925b95..542d869313 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -244,6 +244,8 @@ struct | F64x2 Neg -> "f64x2.neg" | F64x2 Sqrt -> "f64x2.sqrt" | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" + | F64x2 ConvertI32x4S -> "f64x2.convert_low_i32x4_s" + | F64x2 ConvertI32x4U -> "f64x2.convert_low_i32x4_u" | V128 Not -> "v128.not" | _ -> failwith "Unimplemented v128 unop" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 52670cdcde..1d98125f22 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -560,6 +560,8 @@ rule token = parse { UNARY f32x4_demote_f64x2_zero } | "f32x4.convert_i32x4_"(sign as s) { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } + | "f64x2.convert_low_i32x4_"(sign as s) + { UNARY (ext s f64x2_convert_low_i32x4_s f64x2_convert_low_i32x4_u) } | "i8x16.narrow_i16x8_"(sign as s) { BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } | "i16x8.narrow_i32x4_"(sign as s) diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 436a16d416..27a98bed40 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -7,6 +7,11 @@ (func (export "f32x4.convert_i32x4_u") (param v128) (result v128) (f32x4.convert_i32x4_u (local.get 0))) + (func (export "f64x2.convert_low_i32x4_s") (param v128) (result v128) + (f64x2.convert_low_i32x4_s (local.get 0))) + (func (export "f64x2.convert_low_i32x4_u") (param v128) (result v128) + (f64x2.convert_low_i32x4_u (local.get 0))) + ;; Integer to integer narrowing (func (export "i8x16.narrow_i16x8_s") (param v128 v128) (result v128) (i8x16.narrow_i16x8_s (local.get 0) (local.get 1))) @@ -242,6 +247,36 @@ (assert_return (invoke "f32x4.convert_i32x4_u" (v128.const i32x4 0 -1 0x7fffffff 0x80000000)) (v128.const f32x4 0.0 4294967295.0 2147483647.0 2147483648.0)) +;; f64x2.convert_i32x4_s +;; constants copied from test/core/conversions.wast. + +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 1 1 0 0)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 -1 -1 0 0)) + (v128.const f64x2 -1.0 -1.0)) +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 0 0)) + (v128.const f64x2 2147483647 2147483647)) +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 0 0)) + (v128.const f64x2 -2147483648 -2147483648)) +(assert_return (invoke "f64x2.convert_low_i32x4_s" (v128.const i32x4 987654321 987654321 0 0)) + (v128.const f64x2 987654321 987654321)) + +;; f64x2.convert_i32x4_u +;; constants copied from test/core/conversions.wast. + +(assert_return (invoke "f64x2.convert_low_i32x4_u" (v128.const i32x4 1 1 0 0)) + (v128.const f64x2 1.0 1.0)) +(assert_return (invoke "f64x2.convert_low_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const f64x2 0.0 0.0)) +(assert_return (invoke "f64x2.convert_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 0 0)) + (v128.const f64x2 2147483647 2147483647)) +(assert_return (invoke "f64x2.convert_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 0 0)) + (v128.const f64x2 2147483648 2147483648)) +(assert_return (invoke "f64x2.convert_low_i32x4_u" (v128.const i32x4 0xffffffff 0xffffffff 0 0)) + (v128.const f64x2 4294967295.0 4294967295.0)) + ;; Integer to integer narrowing ;; i8x16.narrow_i16x8_s From a04147053ff4efeef75135a925b4a87315ddeba1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 18 Feb 2021 13:38:09 -0800 Subject: [PATCH 328/378] [interpreter] Implement extadd pairwise instructions These 4 instructions: - i32x4.extadd_pairwise_i16x8_s - i32x4.extadd_pairwise_i16x8_u - i16x8.extadd_pairwise_i8x16_s - i16x8.extadd_pairwise_i8x16_u were merged in #380. Drive-by cleanup to meta/README.md to list all generated files. --- interpreter/binary/decode.ml | 4 ++ interpreter/binary/encode.ml | 4 ++ interpreter/exec/eval_simd.ml | 4 ++ interpreter/exec/simd.ml | 41 +++++++---- interpreter/syntax/ast.ml | 1 + interpreter/syntax/operators.ml | 4 ++ interpreter/text/arrange.ml | 4 ++ interpreter/text/lexer.mll | 5 ++ interpreter/util/lib.ml | 5 ++ interpreter/util/lib.mli | 1 + test/core/simd/meta/README.md | 27 ++++++-- test/core/simd/meta/gen_tests.py | 1 + test/core/simd/meta/simd_extadd_pairwise.py | 62 +++++++++++++++++ .../simd_i16x8_extadd_pairwise_i8x16.wast | 68 +++++++++++++++++++ .../simd_i32x4_extadd_pairwise_i16x8.wast | 68 +++++++++++++++++++ 15 files changed, 282 insertions(+), 17 deletions(-) create mode 100644 test/core/simd/meta/simd_extadd_pairwise.py create mode 100644 test/core/simd/simd_i16x8_extadd_pairwise_i8x16.wast create mode 100644 test/core/simd/simd_i32x4_extadd_pairwise_i16x8.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index bc9f4c842c..7f2a0381e3 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -401,6 +401,8 @@ let simd_prefix s = | 0xa2l -> i64x2_abs | 0xa3l -> i32x4_all_true | 0xa4l -> i32x4_bitmask + | 0xa5l -> i32x4_extadd_pairwise_i16x8_s + | 0xa6l -> i32x4_extadd_pairwise_i16x8_u | 0xa7l -> i32x4_widen_low_i16x8_s | 0xa8l -> i32x4_widen_high_i16x8_s | 0xa9l -> i32x4_widen_low_i16x8_u @@ -422,6 +424,8 @@ let simd_prefix s = | 0xbfl -> i32x4_extmul_high_i16x8_u | 0xc0l -> i64x2_eq | 0xc1l -> i64x2_neg + | 0xc2l -> i16x8_extadd_pairwise_i8x16_s + | 0xc3l -> i16x8_extadd_pairwise_i8x16_u | 0xc4l -> i64x2_bitmask | 0xc7l -> i64x2_widen_low_i32x4_s | 0xc8l -> i64x2_widen_high_i32x4_s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 1d87160afe..60e2957cac 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -354,12 +354,16 @@ let encode m = | Unary (V128 V128Op.(I16x8 WidenHighS)) -> simd_op 0x88l | Unary (V128 V128Op.(I16x8 WidenLowU)) -> simd_op 0x89l | Unary (V128 V128Op.(I16x8 WidenHighU)) -> simd_op 0x8al + | Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0xc2l + | Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0xc3l | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l | Unary (V128 V128Op.(I32x4 WidenLowS)) -> simd_op 0xa7l | Unary (V128 V128Op.(I32x4 WidenHighS)) -> simd_op 0xa8l | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal + | Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0xa5l + | Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0xa6l | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xa2l | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l | Unary (V128 V128Op.(I64x2 WidenLowS)) -> simd_op 0xc7l diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index e9f939de65..7aa8534931 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -23,6 +23,8 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I16x8 WidenHighS -> to_value (SXX.I16x8_convert.widen_high_s (of_value 1 v)) | I16x8 WidenLowU -> to_value (SXX.I16x8_convert.widen_low_u (of_value 1 v)) | I16x8 WidenHighU -> to_value (SXX.I16x8_convert.widen_high_u (of_value 1 v)) + | I16x8 ExtAddPairwiseS -> to_value (SXX.I16x8_convert.extadd_pairwise_s (of_value 1 v)) + | I16x8 ExtAddPairwiseU -> to_value (SXX.I16x8_convert.extadd_pairwise_u (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) | I32x4 WidenLowS -> to_value (SXX.I32x4_convert.widen_low_s (of_value 1 v)) @@ -35,6 +37,8 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct to_value (SXX.I32x4_convert.trunc_sat_f64x2_s_zero (of_value 1 v)) | I32x4 TruncSatF64x2UZero -> to_value (SXX.I32x4_convert.trunc_sat_f64x2_u_zero (of_value 1 v)) + | I32x4 ExtAddPairwiseS -> to_value (SXX.I32x4_convert.extadd_pairwise_s (of_value 1 v)) + | I32x4 ExtAddPairwiseU -> to_value (SXX.I32x4_convert.extadd_pairwise_u (of_value 1 v)) | I64x2 Abs -> to_value (SXX.I64x2.abs (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) | I64x2 WidenLowS -> to_value (SXX.I64x2_convert.widen_low_s (of_value 1 v)) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index e7f7c68a2c..28d4308d3c 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -183,6 +183,8 @@ sig val extmul_high_s : t -> t -> t val extmul_low_u : t -> t -> t val extmul_high_u : t -> t -> t + val extadd_pairwise_s : t -> t + val extadd_pairwise_u : t -> t end module I32x4_convert : sig val trunc_sat_f32x4_s : t -> t @@ -198,6 +200,8 @@ sig val extmul_high_s : t -> t -> t val extmul_low_u : t -> t -> t val extmul_high_u : t -> t -> t + val extadd_pairwise_s : t -> t + val extadd_pairwise_u : t -> t end module I64x2_convert : sig val widen_low_s : t -> t @@ -438,17 +442,23 @@ struct let narrow_s = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_s let narrow_u = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_u - let widen take_or_drop mask x = - Rep.of_i16x8 (List.map (Int32.logand mask) (take_or_drop 8 (Rep.to_i8x16 x))) - let widen_low_s = widen Lib.List.take 0xffffffffl - let widen_high_s = widen Lib.List.drop 0xffffffffl - let widen_low_u = widen Lib.List.take 0xffl - let widen_high_u = widen Lib.List.drop 0xffl + let ext_s = Int32.logand 0xffffffffl + let ext_u = Int32.logand 0xffl + + let widen take_or_drop ext x = Rep.of_i16x8 (List.map ext (take_or_drop 8 (Rep.to_i8x16 x))) + let widen_low_s = widen Lib.List.take ext_s + let widen_high_s = widen Lib.List.drop ext_s + let widen_low_u = widen Lib.List.take ext_u + let widen_high_u = widen Lib.List.drop ext_u let extmul_low_s x y = I16x8.mul (widen_low_s x) (widen_low_s y) let extmul_high_s x y = I16x8.mul (widen_high_s x) (widen_high_s y) let extmul_low_u x y = I16x8.mul (widen_low_u x) (widen_low_u y) let extmul_high_u x y = I16x8.mul (widen_high_u x) (widen_high_u y) + + let extadd ext x y = Int32.add (ext x) (ext y) + let extadd_pairwise_s x = Rep.of_i16x8 (Lib.List.pairwise (extadd ext_s) (Rep.to_i8x16 x)) + let extadd_pairwise_u x = Rep.of_i16x8 (Lib.List.pairwise (extadd ext_u) (Rep.to_i8x16 x)) end module I32x4_convert = struct @@ -461,12 +471,15 @@ struct let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u - let widen take_or_drop mask x = - Rep.of_i32x4 (List.map (Int32.logand mask) (take_or_drop 4 (Rep.to_i16x8 x))) - let widen_low_s = widen Lib.List.take 0xffffffffl - let widen_high_s = widen Lib.List.drop 0xffffffffl - let widen_low_u = widen Lib.List.take 0xffffl - let widen_high_u = widen Lib.List.drop 0xffffl + let ext_s = Int32.logand 0xffffffffl + let ext_u = Int32.logand 0xffffl + + let widen take_or_drop ext x = + Rep.of_i32x4 (List.map ext (take_or_drop 4 (Rep.to_i16x8 x))) + let widen_low_s = widen Lib.List.take ext_s + let widen_high_s = widen Lib.List.drop ext_s + let widen_low_u = widen Lib.List.take ext_u + let widen_high_u = widen Lib.List.drop ext_u let dot_i16x8_s x y = let xs = Rep.to_i16x8 x in @@ -483,6 +496,10 @@ struct let extmul_high_s x y = I32x4.mul (widen_high_s x) (widen_high_s y) let extmul_low_u x y = I32x4.mul (widen_low_u x) (widen_low_u y) let extmul_high_u x y = I32x4.mul (widen_high_u x) (widen_high_u y) + + let extadd ext x y = Int32.add (ext x) (ext y) + let extadd_pairwise_s x = Rep.of_i32x4 (Lib.List.pairwise (extadd ext_s) (Rep.to_i16x8 x)) + let extadd_pairwise_u x = Rep.of_i32x4 (Lib.List.pairwise (extadd ext_u) (Rep.to_i16x8 x)) end module I64x2_convert = struct diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 934fca8258..23f83bb9bb 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -51,6 +51,7 @@ struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U | WidenLowS | WidenLowU | WidenHighS | WidenHighU | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero + | ExtAddPairwiseS | ExtAddPairwiseU type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index eedfd57051..82c0b04a26 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -355,6 +355,8 @@ let i16x8_extmul_high_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulHighS)) let i16x8_extmul_low_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulLowU)) let i16x8_extmul_high_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulHighU)) let i16x8_q15mulr_sat_s = Binary (V128 V128Op.(I16x8 Q15MulRSatS)) +let i16x8_extadd_pairwise_i8x16_s = Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) +let i16x8_extadd_pairwise_i8x16_u = Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) let i32x4_splat = Convert (V128 V128Op.(I32x4 Splat)) let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) @@ -396,6 +398,8 @@ let i32x4_extmul_low_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulLowS)) let i32x4_extmul_high_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulHighS)) let i32x4_extmul_low_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulLowU)) let i32x4_extmul_high_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulHighU)) +let i32x4_extadd_pairwise_i16x8_s = Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) +let i32x4_extadd_pairwise_i16x8_u = Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 542d869313..fee3c31db2 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -210,6 +210,8 @@ struct | I16x8 WidenHighS -> "i16x8.widen_high_i8x16_s" | I16x8 WidenLowU -> "i16x8.widen_low_i8x16_u" | I16x8 WidenHighU -> "i16x8.widen_high_i8x16_u" + | I16x8 ExtAddPairwiseS -> "i16x8.extadd_pairwise_i8x16_s" + | I16x8 ExtAddPairwiseU -> "i16x8.extadd_pairwise_i8x16_u" | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" | I32x4 WidenLowS -> "i32x4.widen_low_i16x8_s" @@ -220,6 +222,8 @@ struct | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I32x4 TruncSatF64x2SZero -> "i32x4.trunc_sat_f64x2_s_zero" | I32x4 TruncSatF64x2UZero -> "i32x4.trunc_sat_f64x2_u_zero" + | I32x4 ExtAddPairwiseS -> "i32x4.extadd_pairwise_i16x8_s" + | I32x4 ExtAddPairwiseU -> "i32x4.extadd_pairwise_i16x8_u" | I64x2 Abs -> "i64x2.abs" | I64x2 Neg -> "i64x2.neg" | I64x2 WidenLowS -> "i64x2.widen_low_i32x4_s" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 1d98125f22..e3d8f9d8cc 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -606,6 +606,11 @@ rule token = parse | "i16x8.q15mulr_sat_s" { BINARY i16x8_q15mulr_sat_s } + | "i16x8.extadd_pairwise_i8x16_"(sign as s) + { UNARY (ext s i16x8_extadd_pairwise_i8x16_s i16x8_extadd_pairwise_i8x16_u) } + | "i32x4.extadd_pairwise_i16x8_"(sign as s) + { UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } + | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } | name as s { VAR s } diff --git a/interpreter/util/lib.ml b/interpreter/util/lib.ml index eb6eff259d..24cc5ff9af 100644 --- a/interpreter/util/lib.ml +++ b/interpreter/util/lib.ml @@ -105,6 +105,11 @@ struct let rec concat_map f = function | [] -> [] | x::xs -> f x @ concat_map f xs + + let rec pairwise f = function + | [] -> [] + | x1::x2::xs -> f x1 x2 :: pairwise f xs + | _ -> failwith "pairwise" end module List32 = diff --git a/interpreter/util/lib.mli b/interpreter/util/lib.mli index f9c9182653..496955d589 100644 --- a/interpreter/util/lib.mli +++ b/interpreter/util/lib.mli @@ -22,6 +22,7 @@ sig val index_where : ('a -> bool) -> 'a list -> int option val map_filter : ('a -> 'b option) -> 'a list -> 'b list val concat_map : ('a -> 'b list) -> 'a list -> 'b list + val pairwise : ('a -> 'a -> 'b) -> 'a list -> 'b list end module List32 : diff --git a/test/core/simd/meta/README.md b/test/core/simd/meta/README.md index 6ae6747b52..835e1bba94 100644 --- a/test/core/simd/meta/README.md +++ b/test/core/simd/meta/README.md @@ -22,11 +22,28 @@ Currently it only support following simd test files generation. - 'simd_i16x8_sat_arith.wast' - 'simd_f32x4.wast' - 'simd_f64x2.wast' -- 'simd_f32x4_rounding' -- 'simd_f64x2_rounding' -- 'simd_f32x4_pmin_pmax' -- 'simd_f64x2_pmin_pmax' -- 'simd_i32x4_dot_i16x8' +- 'simd_f32x4_rounding.wast' +- 'simd_f64x2_rounding.wast' +- 'simd_f32x4_pmin_pmax.wast' +- 'simd_f64x2_pmin_pmax.wast' +- 'simd_i32x4_dot_i16x8.wast' +- 'simd_load8_lane.wast' +- 'simd_load16_lane.wast' +- 'simd_load32_lane.wast' +- 'simd_load64_lane.wast, +- 'simd_store8_lane.wast' +- 'simd_store16_lane.wast' +- 'simd_store32_lane.wast' +- 'simd_store64_lane.wast, +- 'simd_i16x8_extmul_i8x16.wast' +- 'simd_i32x4_extmul_i16x8.wast' +- 'simd_i64x2_extmul_i32x4.wast' +- 'simd_int_to_int_widen.wast' +- 'simd_i32x4_trunc_sat_f32x4.wast' +- 'simd_i32x4_trunc_sat_f64x2.wast' +- 'simd_i16x8_q15mulr_sat_s.wast', +- 'simd_i16x8_extadd_pairwise_i8x16.wast', +- 'simd_i32x4_extadd_pairwise_i16x8.wast', Usage: diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 453404550a..9e8dc95b10 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -38,6 +38,7 @@ 'simd_int_to_int_widen', 'simd_int_trunc_sat_float', 'simd_i16x8_q15mulr_sat_s', + 'simd_extadd_pairwise', ) diff --git a/test/core/simd/meta/simd_extadd_pairwise.py b/test/core/simd/meta/simd_extadd_pairwise.py new file mode 100644 index 0000000000..8a398414de --- /dev/null +++ b/test/core/simd/meta/simd_extadd_pairwise.py @@ -0,0 +1,62 @@ +#!/usr/bin/env python3 + +from simd_arithmetic import SimdArithmeticCase, i16 +from simd_integer_op import ArithmeticOp + + +class SimdExtAddPairwise(SimdArithmeticCase): + BINARY_OPS = () + + def unary_op(self, x, signed): + # For test data we always splat a single value to the + # entire v128, so doubling the input works. + return ArithmeticOp.get_valid_value(x, self.src_lane, signed=signed) * 2 + + @property + def hex_unary_op_test_data(self): + return [] + + @property + def unary_test_data(self): + return [ + (self.normal_unary_op_test_data, [self.SRC_LANE_TYPE,self.LANE_TYPE]), + ] + + def get_case_data(self): + case_data = [] + for op in self.UNARY_OPS: + op_name = self.op_name(op) + case_data.append(['#', op_name]) + for data_group, v128_forms in self.unary_test_data: + for data in data_group: + case_data.append([op_name, [str(data)], + str(self.unary_op(data, op.endswith('s'))), + v128_forms]) + return case_data + + def get_combine_cases(self): + return '' + + def gen_test_cases(self): + wast_filename = '../simd_{}_extadd_pairwise_{}.wast'.format(self.LANE_TYPE, self.SRC_LANE_TYPE) + with open(wast_filename, 'w') as fp: + fp.write(self.get_all_cases()) + +class SimdI16x8ExtAddPairwise(SimdExtAddPairwise): + UNARY_OPS = ('extadd_pairwise_i8x16_s','extadd_pairwise_i8x16_u') + LANE_TYPE = 'i16x8' + SRC_LANE_TYPE = 'i8x16' + +class SimdI32x4ExtAddPairwise(SimdExtAddPairwise): + UNARY_OPS = ('extadd_pairwise_i16x8_s','extadd_pairwise_i16x8_u') + LANE_TYPE = 'i32x4' + SRC_LANE_TYPE = 'i16x8' + +def gen_test_cases(): + simd_i16x8_arith = SimdI16x8ExtAddPairwise() + simd_i32x4_arith = SimdI32x4ExtAddPairwise() + simd_i16x8_arith.gen_test_cases() + simd_i32x4_arith.gen_test_cases() + +if __name__ == '__main__': + gen_test_cases() diff --git a/test/core/simd/simd_i16x8_extadd_pairwise_i8x16.wast b/test/core/simd/simd_i16x8_extadd_pairwise_i8x16.wast new file mode 100644 index 0000000000..c2267de9c3 --- /dev/null +++ b/test/core/simd/simd_i16x8_extadd_pairwise_i8x16.wast @@ -0,0 +1,68 @@ +;; Tests for i16x8 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i16x8.extadd_pairwise_i8x16_s") (param v128) (result v128) (i16x8.extadd_pairwise_i8x16_s (local.get 0))) + (func (export "i16x8.extadd_pairwise_i8x16_u") (param v128) (result v128) (i16x8.extadd_pairwise_i8x16_u (local.get 0))) +) + + +;; i16x8.extadd_pairwise_i8x16_s +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) + (v128.const i16x8 252 252 252 252 252 252 252 252)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 -254 -254 -254 -254 -254 -254 -254 -254)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -256 -256 -256 -256 -256 -256 -256 -256)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_s" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 -2 -2 -2 -2 -2 -2 -2 -2)) + +;; i16x8.extadd_pairwise_i8x16_u +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 2 2 2 2 2 2 2 2)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 510 510 510 510 510 510 510 510)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126 126)) + (v128.const i16x8 252 252 252 252 252 252 252 252)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 258 258 258 258 258 258 258 258)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 256 256 256 256 256 256 256 256)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 254 254 254 254 254 254 254 254)) +(assert_return (invoke "i16x8.extadd_pairwise_i8x16_u" (v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255)) + (v128.const i16x8 510 510 510 510 510 510 510 510)) + +;; type check +(assert_invalid (module (func (result v128) (i16x8.extadd_pairwise_i8x16_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extadd_pairwise_i8x16_u (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.extadd_pairwise_i8x16_s-arg-empty (result v128) + (i16x8.extadd_pairwise_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extadd_pairwise_i8x16_u-arg-empty (result v128) + (i16x8.extadd_pairwise_i8x16_u) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_i32x4_extadd_pairwise_i16x8.wast b/test/core/simd/simd_i32x4_extadd_pairwise_i16x8.wast new file mode 100644 index 0000000000..2d1682d40e --- /dev/null +++ b/test/core/simd/simd_i32x4_extadd_pairwise_i16x8.wast @@ -0,0 +1,68 @@ +;; Tests for i32x4 arithmetic operations on major boundary values and all special values. + + +(module + (func (export "i32x4.extadd_pairwise_i16x8_s") (param v128) (result v128) (i32x4.extadd_pairwise_i16x8_s (local.get 0))) + (func (export "i32x4.extadd_pairwise_i16x8_u") (param v128) (result v128) (i32x4.extadd_pairwise_i16x8_u (local.get 0))) +) + + +;; i32x4.extadd_pairwise_i16x8_s +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 -2 -2 -2 -2)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) + (v128.const i32x4 65532 65532 65532 65532)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 -65534 -65534 -65534 -65534)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -65536 -65536 -65536 -65536)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 65534 65534 65534 65534)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_s" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 -2 -2 -2 -2)) + +;; i32x4.extadd_pairwise_i16x8_u +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 1 1 1 1 1 1 1 1)) + (v128.const i32x4 2 2 2 2)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i32x4 131070 131070 131070 131070)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) + (v128.const i32x4 65532 65532 65532 65532)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) + (v128.const i32x4 65538 65538 65538 65538)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 65536 65536 65536 65536)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 65534 65534 65534 65534)) +(assert_return (invoke "i32x4.extadd_pairwise_i16x8_u" (v128.const i16x8 65535 65535 65535 65535 65535 65535 65535 65535)) + (v128.const i32x4 131070 131070 131070 131070)) + +;; type check +(assert_invalid (module (func (result v128) (i32x4.extadd_pairwise_i16x8_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extadd_pairwise_i16x8_u (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i32x4.extadd_pairwise_i16x8_s-arg-empty (result v128) + (i32x4.extadd_pairwise_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extadd_pairwise_i16x8_u-arg-empty (result v128) + (i32x4.extadd_pairwise_i16x8_u) + ) + ) + "type mismatch" +) + From 7c0ca01e62a43efc94d85f432d60adb020c57cfa Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Feb 2021 10:15:06 -0800 Subject: [PATCH 329/378] [spectext] Add i32x4.dot_i16x8_s (#475) This instruction was added in #127. Co-authored-by: Andreas Rossberg --- .../core/appendix/gen-index-instructions.py | 1 + document/core/appendix/index-instructions.rst | 1 + document/core/binary/instructions.rst | 1 + document/core/exec/instructions.rst | 33 +++++++++++++++++++ document/core/syntax/instructions.rst | 1 + document/core/text/instructions.rst | 1 + document/core/util/macros.def | 1 + document/core/valid/instructions.rst | 14 ++++++++ 8 files changed, 53 insertions(+) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 3ed07b7477..75e25e8041 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -488,6 +488,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~186', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~187', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~189', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~190', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index e9d3f15697..bd37fb5a26 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -436,6 +436,7 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~186` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 7a411158c4..0ed683e3fe 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -687,6 +687,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~183{:}\Bu32 &\Rightarrow& \I32X4.\VMIN\K{\_u} \\ &&|& \hex{FD}~~184{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_s} \\ &&|& \hex{FD}~~185{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_u} \\ &&|& + \hex{FD}~~186{:}\Bu32 &\Rightarrow& \I32X4.\DOT\K{\_i16x8\_s}\\ &&|& \hex{FD}~~187{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& \hex{FD}~~189{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_s}\\ &&|& \hex{FD}~~190{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_u}\\ &&|& diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 9a900de96a..c542c6c87b 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -725,6 +725,39 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} +.. _exec-simd-dot: + +:math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` +.................................... + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. Let :math:`(i_1~i_2)^\ast` be the result of computing :math:`\imul_{32}(\extend^s_{16,32}(\lanes_{\I16X8}(c_1)), \extend^s_{16,32}(\lanes_{\I16X8}(c_2)))` + +5. Let :math:`j^\ast` be the result of computing :math:`\iadd_{32}(i_1, i_2)^\ast`. + +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\I32X4}(j^\ast)`. + +8. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\K{i32x4.}\DOT\K{\_i16x8\_s} &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & (i_1~i_2)^\ast = \imul_{32}(\extend^s_{16,32}(\lanes_{\I16X8}(c_1)), \extend^s_{16,32}(\lanes_{\I16X8}(c_2))) \\ + \wedge & j^\ast = \iadd_{32}(i_1, i_2)^\ast \\ + \wedge & c = \lanes^{-1}_{\I32X4}(j^\ast) + \end{array} + \end{array} + + .. _exec-simd-vextmul: :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx` and :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 4dbd2b5463..0d97c76e2d 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -237,6 +237,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i64x2.}\viunop \\&&|& \K{i8x16.}\VPOPCNT \\&&|& \K{i16x8.}\Q15MULRSAT\K{\_s} \\ &&|& + \K{i32x4.}\DOT\K{\_i16x8\_s} \\ &&|& \fshape\K{.}\vfunop \\&&|& \ishape\K{.}\vitestop \\ &&|& \ishape\K{.}\BITMASK \\ &&|& diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 5158d4970a..36c2763601 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -720,6 +720,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i32x4.min\_u} &\Rightarrow& \I32X4.\VMIN\K{\_u}\\ &&|& \text{i32x4.max\_s} &\Rightarrow& \I32X4.\VMAX\K{\_s}\\ &&|& \text{i32x4.max\_u} &\Rightarrow& \I32X4.\VMAX\K{\_u}\\ &&|& + \text{i32x4.dot\_i16x8\_s} &\Rightarrow& \I32X4.\DOT\K{\_i16x8\_s}\\ &&|& \text{i32x4.extmul\_low\_i16x8\_s} &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& \text{i32x4.extmul\_high\_i16x8\_s} &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_s}\\ &&|& \text{i32x4.extmul\_low\_i16x8\_u} &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_u}\\ &&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 6f61458f8e..1007fd508f 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -425,6 +425,7 @@ .. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} .. |VEXTEND| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extend}} .. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} +.. |DOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{dot}} .. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 5a8602d648..ccdb506fee 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -450,6 +450,20 @@ We also define an auxiliary function to get number of packed numeric types in a } +.. _valid-simd-dot: + +:math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` +.................................... + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \K{i32x4.}\DOT\K{\_i16x8\_s} : [\V128~\V128] \to [\V128] + } + + .. _valid-simd-vextmul: :math:`\ishape\K{.}\vextmul\K{\_}\ishape\K{\_}\sx` From 33ba45fef475dd10dbfe6aaed9a15e50712853cd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Feb 2021 10:17:43 -0800 Subject: [PATCH 330/378] [spectext] Add extended pairwise add instructions (#476) This was merged in #380. --- .../core/appendix/gen-index-instructions.py | 4 +++ document/core/binary/instructions.rst | 6 +++- document/core/exec/instructions.rst | 35 +++++++++++++++++-- document/core/syntax/instructions.rst | 3 ++ document/core/text/instructions.rst | 5 ++- document/core/util/macros.def | 1 + document/core/valid/instructions.rst | 14 ++++++++ 7 files changed, 64 insertions(+), 4 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 75e25e8041..835ef2a3cd 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -470,10 +470,14 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~159', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~194', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~195', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~165', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~166', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 0ed683e3fe..456d29b987 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -663,7 +663,9 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~156{:}\Bu32 &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s} \\ &&|& \hex{FD}~~157{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& \hex{FD}~~158{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& - \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ + \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ &&|& + \hex{FD}~~194{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}\\ &&|& + \hex{FD}~~195{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}\\ \end{array} .. math:: @@ -673,6 +675,8 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~161{:}\Bu32 &\Rightarrow& \I32X4.\VNEG \\ &&|& \hex{FD}~~163{:}\Bu32 &\Rightarrow& \I32X4.\ALLTRUE \\ &&|& \hex{FD}~~164{:}\Bu32 &\Rightarrow& \I32X4.\BITMASK \\ &&|& + \hex{FD}~~165{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}\\ &&|& + \hex{FD}~~166{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}\\ &&|& \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_s} \\ &&|& \hex{FD}~~168{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_s} \\ &&|& \hex{FD}~~169{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_u} \\ &&|& diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index c542c6c87b..5a0ecbad02 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -674,7 +674,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane .. _exec-simd-extend: :math:`t_2\K{x}N\K{.}\VEXTEND\_\K{low}\_t_1\K{x}M\_\sx` -..................................................... +....................................................... 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. @@ -700,7 +700,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane :math:`t_2\K{x}N\K{.}\VEXTEND\_\K{high}\_t_1\K{x}M\_\sx` -...................................................... +........................................................ 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. @@ -809,6 +809,37 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} +.. _exec-simd-extaddpairwise: + +:math:`t_2\K{x}N\K{.}\EXTADDPAIRWISE\_t_1\K{x}M\_\sx` +..................................................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`(i_1~i_2)^\ast` be the sequence :math:`\extend^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))`. + +4. Let :math:`j^\ast` be the result of computing :math:`\iadd_{N}(i_1, i_2)^\ast`. + +5. Let `c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(j^\ast)`. + +6. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\EXTADDPAIRWISE\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & (i_1~i_2)^\ast = \extend^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1)) \\ + \wedge & j^\ast = \iadd_{N}(i_1, i_2)^\ast \\ + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(j^\ast) + \end{array} + \end{array} + + .. index:: parametric instructions, value pair: execution; instruction single: abstract syntax; instruction diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 0d97c76e2d..48b27b93a1 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -267,6 +267,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i32x4.}\EXTMUL\K{\_high}\K{\_i16x8\_}\sx \\&&|& \K{i64x2.}\EXTMUL\K{\_low}\K{\_i32x4\_}\sx ~|~ \K{i64x2.}\EXTMUL\K{\_high}\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\EXTADDPAIRWISE\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\EXTADDPAIRWISE\K{\_i16x8\_}\sx \\ &&|& \fshape\K{.}\vfbinop \\&&|& \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx \\ &&|& \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx \\&&|& @@ -374,6 +376,7 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vbinop: .. _syntax-vextend: .. _syntax-vextmul: +.. _syntax-vcvtop: Conventions ........... diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 36c2763601..5bae20ba93 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -696,7 +696,9 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i16x8.extmul\_low\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& \text{i16x8.extmul\_high\_i8x16\_s} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& \text{i16x8.extmul\_low\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& - \text{i16x8.extmul\_high\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ + \text{i16x8.extmul\_high\_i8x16\_u} &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ &&|& + \text{i16x8.extadd\_pairwise\_i8x16\_s} &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}\\ &&|& + \text{i16x8.extadd\_pairwise\_i8x16\_u} &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}\\ \end{array} .. math:: @@ -706,6 +708,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{i32x4.neg} &\Rightarrow& \I32X4.\VNEG\\ &&|& \text{i32x4.all\_true} &\Rightarrow& \I32X4.\ALLTRUE\\ &&|& \text{i32x4.bitmask} &\Rightarrow& \I32X4.\BITMASK\\ &&|& + \text{i32x4.extadd\_pairwise\_i16x8\_s} &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}\\ &&|& \text{i32x4.extend\_low\_i16x8\_s} &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_s}\\ &&|& \text{i32x4.extend\_high\_i16x8\_s} &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_s}\\ &&|& \text{i32x4.extend\_low\_i16x8\_u} &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_u}\\ &&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 1007fd508f..a2521edce1 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -430,6 +430,7 @@ .. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} .. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}} +.. |EXTADDPAIRWISE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extadd\_pairwise}} .. Instructions, non-terminals diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index ccdb506fee..a6b4347fb9 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -478,6 +478,20 @@ We also define an auxiliary function to get number of packed numeric types in a } +.. _valid-simd-extaddpairwise: + +:math:`\ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx` +......................................................... + +* The instruction is valid with type :math:`[\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx : [\V128] \to [\V128] + } + + .. index:: parametric instructions, value type, polymorphism pair: validation; instruction single: abstract syntax; instruction From bc618a3baff5c6b81d461e4ccb63dae78b186010 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 19 Feb 2021 10:34:03 -0800 Subject: [PATCH 331/378] [interpreter] Rename integer widen instructions to integer extend Fixed #467. --- interpreter/binary/decode.ml | 24 +- interpreter/binary/encode.ml | 24 +- interpreter/exec/eval_simd.ml | 24 +- interpreter/exec/simd.ml | 85 +-- interpreter/runtime/memory.ml | 12 +- interpreter/syntax/ast.ml | 2 +- interpreter/syntax/operators.ml | 24 +- interpreter/text/arrange.ml | 24 +- interpreter/text/lexer.mll | 24 +- test/core/simd/meta/gen_tests.py | 2 +- ...int_widen.py => simd_int_to_int_extend.py} | 36 +- test/core/simd/simd_conversions.wast | 160 ++--- test/core/simd/simd_int_to_int_extend.wast | 599 ++++++++++++++++++ test/core/simd/simd_int_to_int_widen.wast | 599 ------------------ 14 files changed, 821 insertions(+), 818 deletions(-) rename test/core/simd/meta/{simd_int_to_int_widen.py => simd_int_to_int_extend.py} (76%) create mode 100644 test/core/simd/simd_int_to_int_extend.wast delete mode 100644 test/core/simd/simd_int_to_int_widen.wast diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 7f2a0381e3..9a7d2f5e61 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -372,10 +372,10 @@ let simd_prefix s = | 0x84l -> i16x8_bitmask | 0x85l -> i16x8_narrow_i32x4_s | 0x86l -> i16x8_narrow_i32x4_u - | 0x87l -> i16x8_widen_low_i8x16_s - | 0x88l -> i16x8_widen_high_i8x16_s - | 0x89l -> i16x8_widen_low_i8x16_u - | 0x8al -> i16x8_widen_high_i8x16_u + | 0x87l -> i16x8_extend_low_i8x16_s + | 0x88l -> i16x8_extend_high_i8x16_s + | 0x89l -> i16x8_extend_low_i8x16_u + | 0x8al -> i16x8_extend_high_i8x16_u | 0x8bl -> i16x8_shl | 0x8cl -> i16x8_shr_s | 0x8dl -> i16x8_shr_u @@ -403,10 +403,10 @@ let simd_prefix s = | 0xa4l -> i32x4_bitmask | 0xa5l -> i32x4_extadd_pairwise_i16x8_s | 0xa6l -> i32x4_extadd_pairwise_i16x8_u - | 0xa7l -> i32x4_widen_low_i16x8_s - | 0xa8l -> i32x4_widen_high_i16x8_s - | 0xa9l -> i32x4_widen_low_i16x8_u - | 0xaal -> i32x4_widen_high_i16x8_u + | 0xa7l -> i32x4_extend_low_i16x8_s + | 0xa8l -> i32x4_extend_high_i16x8_s + | 0xa9l -> i32x4_extend_low_i16x8_u + | 0xaal -> i32x4_extend_high_i16x8_u | 0xabl -> i32x4_shl | 0xacl -> i32x4_shr_s | 0xadl -> i32x4_shr_u @@ -427,10 +427,10 @@ let simd_prefix s = | 0xc2l -> i16x8_extadd_pairwise_i8x16_s | 0xc3l -> i16x8_extadd_pairwise_i8x16_u | 0xc4l -> i64x2_bitmask - | 0xc7l -> i64x2_widen_low_i32x4_s - | 0xc8l -> i64x2_widen_high_i32x4_s - | 0xc9l -> i64x2_widen_low_i32x4_u - | 0xcal -> i64x2_widen_high_i32x4_u + | 0xc7l -> i64x2_extend_low_i32x4_s + | 0xc8l -> i64x2_extend_high_i32x4_s + | 0xc9l -> i64x2_extend_low_i32x4_u + | 0xcal -> i64x2_extend_high_i32x4_u | 0xcbl -> i64x2_shl | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 60e2957cac..926ccc0c19 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -350,26 +350,26 @@ let encode m = | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x7cl | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l - | Unary (V128 V128Op.(I16x8 WidenLowS)) -> simd_op 0x87l - | Unary (V128 V128Op.(I16x8 WidenHighS)) -> simd_op 0x88l - | Unary (V128 V128Op.(I16x8 WidenLowU)) -> simd_op 0x89l - | Unary (V128 V128Op.(I16x8 WidenHighU)) -> simd_op 0x8al + | Unary (V128 V128Op.(I16x8 ExtendLowS)) -> simd_op 0x87l + | Unary (V128 V128Op.(I16x8 ExtendHighS)) -> simd_op 0x88l + | Unary (V128 V128Op.(I16x8 ExtendLowU)) -> simd_op 0x89l + | Unary (V128 V128Op.(I16x8 ExtendHighU)) -> simd_op 0x8al | Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0xc2l | Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0xc3l | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l - | Unary (V128 V128Op.(I32x4 WidenLowS)) -> simd_op 0xa7l - | Unary (V128 V128Op.(I32x4 WidenHighS)) -> simd_op 0xa8l - | Unary (V128 V128Op.(I32x4 WidenLowU)) -> simd_op 0xa9l - | Unary (V128 V128Op.(I32x4 WidenHighU)) -> simd_op 0xaal + | Unary (V128 V128Op.(I32x4 ExtendLowS)) -> simd_op 0xa7l + | Unary (V128 V128Op.(I32x4 ExtendHighS)) -> simd_op 0xa8l + | Unary (V128 V128Op.(I32x4 ExtendLowU)) -> simd_op 0xa9l + | Unary (V128 V128Op.(I32x4 ExtendHighU)) -> simd_op 0xaal | Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0xa5l | Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0xa6l | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xa2l | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l - | Unary (V128 V128Op.(I64x2 WidenLowS)) -> simd_op 0xc7l - | Unary (V128 V128Op.(I64x2 WidenHighS)) -> simd_op 0xc8l - | Unary (V128 V128Op.(I64x2 WidenLowU)) -> simd_op 0xc9l - | Unary (V128 V128Op.(I64x2 WidenHighU)) -> simd_op 0xcal + | Unary (V128 V128Op.(I64x2 ExtendLowS)) -> simd_op 0xc7l + | Unary (V128 V128Op.(I64x2 ExtendHighS)) -> simd_op 0xc8l + | Unary (V128 V128Op.(I64x2 ExtendLowU)) -> simd_op 0xc9l + | Unary (V128 V128Op.(I64x2 ExtendHighU)) -> simd_op 0xcal | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0xd8l | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0xd9l | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0xdal diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 7aa8534931..cf1d8ad1c7 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -19,18 +19,18 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I8x16 Popcnt -> to_value (SXX.I8x16.popcnt (of_value 1 v)) | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) - | I16x8 WidenLowS -> to_value (SXX.I16x8_convert.widen_low_s (of_value 1 v)) - | I16x8 WidenHighS -> to_value (SXX.I16x8_convert.widen_high_s (of_value 1 v)) - | I16x8 WidenLowU -> to_value (SXX.I16x8_convert.widen_low_u (of_value 1 v)) - | I16x8 WidenHighU -> to_value (SXX.I16x8_convert.widen_high_u (of_value 1 v)) + | I16x8 ExtendLowS -> to_value (SXX.I16x8_convert.extend_low_s (of_value 1 v)) + | I16x8 ExtendHighS -> to_value (SXX.I16x8_convert.extend_high_s (of_value 1 v)) + | I16x8 ExtendLowU -> to_value (SXX.I16x8_convert.extend_low_u (of_value 1 v)) + | I16x8 ExtendHighU -> to_value (SXX.I16x8_convert.extend_high_u (of_value 1 v)) | I16x8 ExtAddPairwiseS -> to_value (SXX.I16x8_convert.extadd_pairwise_s (of_value 1 v)) | I16x8 ExtAddPairwiseU -> to_value (SXX.I16x8_convert.extadd_pairwise_u (of_value 1 v)) | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) - | I32x4 WidenLowS -> to_value (SXX.I32x4_convert.widen_low_s (of_value 1 v)) - | I32x4 WidenHighS -> to_value (SXX.I32x4_convert.widen_high_s (of_value 1 v)) - | I32x4 WidenLowU -> to_value (SXX.I32x4_convert.widen_low_u (of_value 1 v)) - | I32x4 WidenHighU -> to_value (SXX.I32x4_convert.widen_high_u (of_value 1 v)) + | I32x4 ExtendLowS -> to_value (SXX.I32x4_convert.extend_low_s (of_value 1 v)) + | I32x4 ExtendHighS -> to_value (SXX.I32x4_convert.extend_high_s (of_value 1 v)) + | I32x4 ExtendLowU -> to_value (SXX.I32x4_convert.extend_low_u (of_value 1 v)) + | I32x4 ExtendHighU -> to_value (SXX.I32x4_convert.extend_high_u (of_value 1 v)) | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) | I32x4 TruncSatF64x2SZero -> @@ -41,10 +41,10 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 ExtAddPairwiseU -> to_value (SXX.I32x4_convert.extadd_pairwise_u (of_value 1 v)) | I64x2 Abs -> to_value (SXX.I64x2.abs (of_value 1 v)) | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) - | I64x2 WidenLowS -> to_value (SXX.I64x2_convert.widen_low_s (of_value 1 v)) - | I64x2 WidenHighS -> to_value (SXX.I64x2_convert.widen_high_s (of_value 1 v)) - | I64x2 WidenLowU -> to_value (SXX.I64x2_convert.widen_low_u (of_value 1 v)) - | I64x2 WidenHighU -> to_value (SXX.I64x2_convert.widen_high_u (of_value 1 v)) + | I64x2 ExtendLowS -> to_value (SXX.I64x2_convert.extend_low_s (of_value 1 v)) + | I64x2 ExtendHighS -> to_value (SXX.I64x2_convert.extend_high_s (of_value 1 v)) + | I64x2 ExtendLowU -> to_value (SXX.I64x2_convert.extend_low_u (of_value 1 v)) + | I64x2 ExtendHighU -> to_value (SXX.I64x2_convert.extend_high_u (of_value 1 v)) | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 28d4308d3c..679048eec3 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -175,10 +175,10 @@ sig module I16x8_convert : sig val narrow_s : t -> t -> t val narrow_u : t -> t -> t - val widen_low_s : t -> t - val widen_high_s : t -> t - val widen_low_u : t -> t - val widen_high_u : t -> t + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t val extmul_low_s : t -> t -> t val extmul_high_s : t -> t -> t val extmul_low_u : t -> t -> t @@ -191,10 +191,10 @@ sig val trunc_sat_f32x4_u : t -> t val trunc_sat_f64x2_s_zero : t -> t val trunc_sat_f64x2_u_zero : t -> t - val widen_low_s : t -> t - val widen_high_s : t -> t - val widen_low_u : t -> t - val widen_high_u : t -> t + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t val dot_i16x8_s : t -> t -> t val extmul_low_s : t -> t -> t val extmul_high_s : t -> t -> t @@ -204,10 +204,10 @@ sig val extadd_pairwise_u : t -> t end module I64x2_convert : sig - val widen_low_s : t -> t - val widen_high_s : t -> t - val widen_low_u : t -> t - val widen_high_u : t -> t + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t val extmul_low_s : t -> t -> t val extmul_high_s : t -> t -> t val extmul_low_u : t -> t -> t @@ -445,16 +445,16 @@ struct let ext_s = Int32.logand 0xffffffffl let ext_u = Int32.logand 0xffl - let widen take_or_drop ext x = Rep.of_i16x8 (List.map ext (take_or_drop 8 (Rep.to_i8x16 x))) - let widen_low_s = widen Lib.List.take ext_s - let widen_high_s = widen Lib.List.drop ext_s - let widen_low_u = widen Lib.List.take ext_u - let widen_high_u = widen Lib.List.drop ext_u + let extend take_or_drop ext x = Rep.of_i16x8 (List.map ext (take_or_drop 8 (Rep.to_i8x16 x))) + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u - let extmul_low_s x y = I16x8.mul (widen_low_s x) (widen_low_s y) - let extmul_high_s x y = I16x8.mul (widen_high_s x) (widen_high_s y) - let extmul_low_u x y = I16x8.mul (widen_low_u x) (widen_low_u y) - let extmul_high_u x y = I16x8.mul (widen_high_u x) (widen_high_u y) + let extmul_low_s x y = I16x8.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I16x8.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I16x8.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I16x8.mul (extend_high_u x) (extend_high_u y) let extadd ext x y = Int32.add (ext x) (ext y) let extadd_pairwise_s x = Rep.of_i16x8 (Lib.List.pairwise (extadd ext_s) (Rep.to_i8x16 x)) @@ -474,12 +474,12 @@ struct let ext_s = Int32.logand 0xffffffffl let ext_u = Int32.logand 0xffffl - let widen take_or_drop ext x = + let extend take_or_drop ext x = Rep.of_i32x4 (List.map ext (take_or_drop 4 (Rep.to_i16x8 x))) - let widen_low_s = widen Lib.List.take ext_s - let widen_high_s = widen Lib.List.drop ext_s - let widen_low_u = widen Lib.List.take ext_u - let widen_high_u = widen Lib.List.drop ext_u + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u let dot_i16x8_s x y = let xs = Rep.to_i16x8 x in @@ -492,10 +492,10 @@ struct | _, _ -> assert false in Rep.of_i32x4 (dot xs ys) - let extmul_low_s x y = I32x4.mul (widen_low_s x) (widen_low_s y) - let extmul_high_s x y = I32x4.mul (widen_high_s x) (widen_high_s y) - let extmul_low_u x y = I32x4.mul (widen_low_u x) (widen_low_u y) - let extmul_high_u x y = I32x4.mul (widen_high_u x) (widen_high_u y) + let extmul_low_s x y = I32x4.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I32x4.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I32x4.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I32x4.mul (extend_high_u x) (extend_high_u y) let extadd ext x y = Int32.add (ext x) (ext y) let extadd_pairwise_s x = Rep.of_i32x4 (Lib.List.pairwise (extadd ext_s) (Rep.to_i16x8 x)) @@ -503,20 +503,23 @@ struct end module I64x2_convert = struct - let widen take_or_drop mask x = + let ext_s = Int64.logand 0xffffffffffffffffL + let ext_u = Int64.logand 0xffffffffL + + let extend take_or_drop ext x = Rep.of_i64x2 (List.map - (fun i32 -> Int64.(logand mask (of_int32 i32))) + (fun i32 -> ext (Int64.of_int32 i32)) (take_or_drop 2 (Rep.to_i32x4 x))) - let widen_low_s = widen Lib.List.take 0xffffffffffffffffL - let widen_high_s = widen Lib.List.drop 0xffffffffffffffffL - let widen_low_u = widen Lib.List.take 0xffffffffL - let widen_high_u = widen Lib.List.drop 0xffffffffL - - let extmul_low_s x y = I64x2.mul (widen_low_s x) (widen_low_s y) - let extmul_high_s x y = I64x2.mul (widen_high_s x) (widen_high_s y) - let extmul_low_u x y = I64x2.mul (widen_low_u x) (widen_low_u y) - let extmul_high_u x y = I64x2.mul (widen_high_u x) (widen_high_u y) + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u + + let extmul_low_s x y = I64x2.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I64x2.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I64x2.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I64x2.mul (extend_high_u x) (extend_high_u y) end module F32x4_convert = struct diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 72ea1d5d0b..dc32580ef7 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -139,12 +139,12 @@ let load_simd_packed pack_size simd_load mem a o t = Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in match pack_size, simd_load with - | Pack64, Pack8x8 SX -> V128.I16x8_convert.widen_low_s v - | Pack64, Pack8x8 ZX -> V128.I16x8_convert.widen_low_u v - | Pack64, Pack16x4 SX -> V128.I32x4_convert.widen_low_s v - | Pack64, Pack16x4 ZX -> V128.I32x4_convert.widen_low_u v - | Pack64, Pack32x2 SX -> V128.I64x2_convert.widen_low_s v - | Pack64, Pack32x2 ZX -> V128.I64x2_convert.widen_low_u v + | Pack64, Pack8x8 SX -> V128.I16x8_convert.extend_low_s v + | Pack64, Pack8x8 ZX -> V128.I16x8_convert.extend_low_u v + | Pack64, Pack16x4 SX -> V128.I32x4_convert.extend_low_s v + | Pack64, Pack16x4 ZX -> V128.I32x4_convert.extend_low_u v + | Pack64, Pack32x2 SX -> V128.I64x2_convert.extend_low_s v + | Pack64, Pack32x2 ZX -> V128.I64x2_convert.extend_low_u v | Pack8, PackSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) | Pack16, PackSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) | Pack32, PackSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 23f83bb9bb..6a0c63547d 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -49,7 +49,7 @@ end module SimdOp = struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U - | WidenLowS | WidenLowU | WidenHighS | WidenHighU + | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero | ExtAddPairwiseS | ExtAddPairwiseU type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 82c0b04a26..f046e5d012 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -294,10 +294,10 @@ let i8x16_bitmask = SimdBitmask Simd.I8x16 let i8x16_all_true = Test (V128 V128Op.(I8x16 AllTrue)) let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) -let i16x8_widen_low_i8x16_s = Unary (V128 V128Op.(I16x8 WidenLowS)) -let i16x8_widen_high_i8x16_s = Unary (V128 V128Op.(I16x8 WidenHighS)) -let i16x8_widen_low_i8x16_u = Unary (V128 V128Op.(I16x8 WidenLowU)) -let i16x8_widen_high_i8x16_u = Unary (V128 V128Op.(I16x8 WidenHighU)) +let i16x8_extend_low_i8x16_s = Unary (V128 V128Op.(I16x8 ExtendLowS)) +let i16x8_extend_high_i8x16_s = Unary (V128 V128Op.(I16x8 ExtendHighS)) +let i16x8_extend_low_i8x16_u = Unary (V128 V128Op.(I16x8 ExtendLowU)) +let i16x8_extend_high_i8x16_u = Unary (V128 V128Op.(I16x8 ExtendHighU)) let i8x16_shl = SimdShift V128Op.(I8x16 Shl) let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) let i8x16_shr_u = SimdShift V128Op.(I8x16 ShrU) @@ -375,10 +375,10 @@ let i32x4_abs = Unary (V128 V128Op.(I32x4 Abs)) let i32x4_neg = Unary (V128 V128Op.(I32x4 Neg)) let i32x4_bitmask = SimdBitmask Simd.I32x4 let i32x4_all_true = Test (V128 V128Op.(I32x4 AllTrue)) -let i32x4_widen_low_i16x8_s = Unary (V128 V128Op.(I32x4 WidenLowS)) -let i32x4_widen_high_i16x8_s = Unary (V128 V128Op.(I32x4 WidenHighS)) -let i32x4_widen_low_i16x8_u = Unary (V128 V128Op.(I32x4 WidenLowU)) -let i32x4_widen_high_i16x8_u = Unary (V128 V128Op.(I32x4 WidenHighU)) +let i32x4_extend_low_i16x8_s = Unary (V128 V128Op.(I32x4 ExtendLowS)) +let i32x4_extend_high_i16x8_s = Unary (V128 V128Op.(I32x4 ExtendHighS)) +let i32x4_extend_low_i16x8_u = Unary (V128 V128Op.(I32x4 ExtendLowU)) +let i32x4_extend_high_i16x8_u = Unary (V128 V128Op.(I32x4 ExtendHighU)) let i32x4_shl = SimdShift V128Op.(I32x4 Shl) let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) let i32x4_shr_u = SimdShift V128Op.(I32x4 ShrU) @@ -404,10 +404,10 @@ let i32x4_extadd_pairwise_i16x8_u = Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) -let i64x2_widen_low_i32x4_s = Unary (V128 V128Op.(I64x2 WidenLowS)) -let i64x2_widen_high_i32x4_s = Unary (V128 V128Op.(I64x2 WidenHighS)) -let i64x2_widen_low_i32x4_u = Unary (V128 V128Op.(I64x2 WidenLowU)) -let i64x2_widen_high_i32x4_u = Unary (V128 V128Op.(I64x2 WidenHighU)) +let i64x2_extend_low_i32x4_s = Unary (V128 V128Op.(I64x2 ExtendLowS)) +let i64x2_extend_high_i32x4_s = Unary (V128 V128Op.(I64x2 ExtendHighS)) +let i64x2_extend_low_i32x4_u = Unary (V128 V128Op.(I64x2 ExtendLowU)) +let i64x2_extend_high_i32x4_u = Unary (V128 V128Op.(I64x2 ExtendHighU)) let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) let i64x2_lt_s = Binary (V128 V128Op.(I64x2 LtS)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index fee3c31db2..71c9b8e4dd 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -206,18 +206,18 @@ struct | I8x16 Popcnt -> "i8x16.popcnt" | I16x8 Abs -> "i16x8.abs" | I16x8 Neg -> "i16x8.neg" - | I16x8 WidenLowS -> "i16x8.widen_low_i8x16_s" - | I16x8 WidenHighS -> "i16x8.widen_high_i8x16_s" - | I16x8 WidenLowU -> "i16x8.widen_low_i8x16_u" - | I16x8 WidenHighU -> "i16x8.widen_high_i8x16_u" + | I16x8 ExtendLowS -> "i16x8.extend_low_i8x16_s" + | I16x8 ExtendHighS -> "i16x8.extend_high_i8x16_s" + | I16x8 ExtendLowU -> "i16x8.extend_low_i8x16_u" + | I16x8 ExtendHighU -> "i16x8.extend_high_i8x16_u" | I16x8 ExtAddPairwiseS -> "i16x8.extadd_pairwise_i8x16_s" | I16x8 ExtAddPairwiseU -> "i16x8.extadd_pairwise_i8x16_u" | I32x4 Abs -> "i32x4.abs" | I32x4 Neg -> "i32x4.neg" - | I32x4 WidenLowS -> "i32x4.widen_low_i16x8_s" - | I32x4 WidenHighS -> "i32x4.widen_high_i16x8_s" - | I32x4 WidenLowU -> "i32x4.widen_low_i16x8_u" - | I32x4 WidenHighU -> "i32x4.widen_high_i16x8_u" + | I32x4 ExtendLowS -> "i32x4.extend_low_i16x8_s" + | I32x4 ExtendHighS -> "i32x4.extend_high_i16x8_s" + | I32x4 ExtendLowU -> "i32x4.extend_low_i16x8_u" + | I32x4 ExtendHighU -> "i32x4.extend_high_i16x8_u" | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" | I32x4 TruncSatF64x2SZero -> "i32x4.trunc_sat_f64x2_s_zero" @@ -226,10 +226,10 @@ struct | I32x4 ExtAddPairwiseU -> "i32x4.extadd_pairwise_i16x8_u" | I64x2 Abs -> "i64x2.abs" | I64x2 Neg -> "i64x2.neg" - | I64x2 WidenLowS -> "i64x2.widen_low_i32x4_s" - | I64x2 WidenHighS -> "i64x2.widen_high_i32x4_s" - | I64x2 WidenLowU -> "i64x2.widen_low_i32x4_u" - | I64x2 WidenHighU -> "i64x2.widen_high_i32x4_u" + | I64x2 ExtendLowS -> "i64x2.extend_low_i32x4_s" + | I64x2 ExtendHighS -> "i64x2.extend_high_i32x4_s" + | I64x2 ExtendLowU -> "i64x2.extend_low_i32x4_u" + | I64x2 ExtendHighU -> "i64x2.extend_high_i32x4_u" | F32x4 Ceil -> "f32x4.ceil" | F32x4 Floor -> "f32x4.floor" | F32x4 Trunc -> "f32x4.trunc" diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index e3d8f9d8cc..9e04082848 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -566,18 +566,18 @@ rule token = parse { BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } | "i16x8.narrow_i32x4_"(sign as s) { BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } - | "i16x8.widen_low_i8x16_"(sign as s) - { UNARY (ext s i16x8_widen_low_i8x16_s i16x8_widen_low_i8x16_u) } - | "i16x8.widen_high_i8x16_"(sign as s) - { UNARY (ext s i16x8_widen_high_i8x16_s i16x8_widen_high_i8x16_u) } - | "i32x4.widen_low_i16x8_"(sign as s) - { UNARY (ext s i32x4_widen_low_i16x8_s i32x4_widen_low_i16x8_u) } - | "i32x4.widen_high_i16x8_"(sign as s) - { UNARY (ext s i32x4_widen_high_i16x8_s i32x4_widen_high_i16x8_u) } - | "i64x2.widen_low_i32x4_"(sign as s) - { UNARY (ext s i64x2_widen_low_i32x4_s i64x2_widen_low_i32x4_u) } - | "i64x2.widen_high_i32x4_"(sign as s) - { UNARY (ext s i64x2_widen_high_i32x4_s i64x2_widen_high_i32x4_u) } + | "i16x8.extend_low_i8x16_"(sign as s) + { UNARY (ext s i16x8_extend_low_i8x16_s i16x8_extend_low_i8x16_u) } + | "i16x8.extend_high_i8x16_"(sign as s) + { UNARY (ext s i16x8_extend_high_i8x16_s i16x8_extend_high_i8x16_u) } + | "i32x4.extend_low_i16x8_"(sign as s) + { UNARY (ext s i32x4_extend_low_i16x8_s i32x4_extend_low_i16x8_u) } + | "i32x4.extend_high_i16x8_"(sign as s) + { UNARY (ext s i32x4_extend_high_i16x8_s i32x4_extend_high_i16x8_u) } + | "i64x2.extend_low_i32x4_"(sign as s) + { UNARY (ext s i64x2_extend_low_i32x4_s i64x2_extend_low_i32x4_u) } + | "i64x2.extend_high_i32x4_"(sign as s) + { UNARY (ext s i64x2_extend_high_i32x4_s i64x2_extend_high_i32x4_u) } | "i8x16.add_sat_"(sign as s) { BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } diff --git a/test/core/simd/meta/gen_tests.py b/test/core/simd/meta/gen_tests.py index 9e8dc95b10..5be84835ca 100644 --- a/test/core/simd/meta/gen_tests.py +++ b/test/core/simd/meta/gen_tests.py @@ -35,7 +35,7 @@ 'simd_load_lane', 'simd_store_lane', 'simd_ext_mul', - 'simd_int_to_int_widen', + 'simd_int_to_int_extend', 'simd_int_trunc_sat_float', 'simd_i16x8_q15mulr_sat_s', 'simd_extadd_pairwise', diff --git a/test/core/simd/meta/simd_int_to_int_widen.py b/test/core/simd/meta/simd_int_to_int_extend.py similarity index 76% rename from test/core/simd/meta/simd_int_to_int_widen.py rename to test/core/simd/meta/simd_int_to_int_extend.py index 457121c874..b92b0d8e48 100644 --- a/test/core/simd/meta/simd_int_to_int_widen.py +++ b/test/core/simd/meta/simd_int_to_int_extend.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 """ -Generates all integer-to-integer widening test cases. +Generates all integer-to-integer extension test cases. """ from simd import SIMD @@ -9,25 +9,25 @@ from test_assert import AssertReturn, AssertInvalid -class SimdIntToIntWiden(SimdArithmeticCase): +class SimdIntToIntExtend(SimdArithmeticCase): LANE_TYPE = "" # unused, can be anything BINARY_OPS = () UNARY_OPS = ( - "i16x8.widen_high_i8x16_s", - "i16x8.widen_high_i8x16_u", - "i16x8.widen_low_i8x16_s", - "i16x8.widen_low_i8x16_u", - "i32x4.widen_high_i16x8_s", - "i32x4.widen_high_i16x8_u", - "i32x4.widen_low_i16x8_s", - "i32x4.widen_low_i16x8_u", - "i64x2.widen_high_i32x4_s", - "i64x2.widen_high_i32x4_u", - "i64x2.widen_low_i32x4_s", - "i64x2.widen_low_i32x4_u", + "i16x8.extend_high_i8x16_s", + "i16x8.extend_high_i8x16_u", + "i16x8.extend_low_i8x16_s", + "i16x8.extend_low_i8x16_u", + "i32x4.extend_high_i16x8_s", + "i32x4.extend_high_i16x8_u", + "i32x4.extend_low_i16x8_s", + "i32x4.extend_low_i16x8_u", + "i64x2.extend_high_i32x4_s", + "i64x2.extend_high_i32x4_u", + "i64x2.extend_low_i32x4_s", + "i64x2.extend_low_i32x4_u", ) - TEST_FUNC_TEMPLATE_HEADER = ";; Tests for int-to-int widening operations.\n" + TEST_FUNC_TEMPLATE_HEADER = ";; Tests for int-to-int extension operations.\n" def op_name(self, op): # Override base class implementation, since the lane type is already @@ -96,7 +96,7 @@ def get_normal_case(self): return "\n".join(cases) def gen_test_cases(self): - wast_filename = "../simd_int_to_int_widen.wast" + wast_filename = "../simd_int_to_int_extend.wast" with open(wast_filename, "w") as fp: fp.write(self.get_all_cases()) @@ -105,8 +105,8 @@ def get_combine_cases(self): def gen_test_cases(): - simd_int_to_int_widen = SimdIntToIntWiden() - simd_int_to_int_widen.gen_test_cases() + simd_int_to_int_extend = SimdIntToIntExtend() + simd_int_to_int_extend.gen_test_cases() if __name__ == "__main__": diff --git a/test/core/simd/simd_conversions.wast b/test/core/simd/simd_conversions.wast index 27a98bed40..552e943612 100644 --- a/test/core/simd/simd_conversions.wast +++ b/test/core/simd/simd_conversions.wast @@ -660,40 +660,40 @@ "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_low_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i16x8.extend_low_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.widen_low_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i8x16.extend_low_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.widen_low_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i8x16.extend_low_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_high_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i16x8.extend_high_i8x16 (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.widen_high_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i8x16.extend_high_i16x8_s (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i8x16.widen_high_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i8x16.extend_high_i16x8_u (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.widen_low_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i32x4.extend_low_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_low_i32x4_s (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i16x8.extend_low_i32x4_s (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_low_i32x4_u (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i16x8.extend_low_i32x4_u (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i32x4.widen_high_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") + "(func (result v128) (i32x4.extend_high_i16x8 (v128.const i16x8 0 0 0 0 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_high_i32x4_s (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i16x8.extend_high_i32x4_s (v128.const i32x4 0 0 0 0)))") "unknown operator") (assert_malformed (module quote - "(func (result v128) (i16x8.widen_high_i32x4_u (v128.const i32x4 0 0 0 0)))") + "(func (result v128) (i16x8.extend_high_i32x4_u (v128.const i32x4 0 0 0 0)))") "unknown operator") @@ -720,39 +720,39 @@ (func (export "f32x4_convert_i32x4_u_mul") (param v128 v128) (result v128) (f32x4.convert_i32x4_u (i32x4.mul (local.get 0) (local.get 1)))) - (func (export "i16x8_low_widen_narrow_ss") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) - (func (export "i16x8_low_widen_narrow_su") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) - (func (export "i16x8_high_widen_narrow_ss") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) - (func (export "i16x8_high_widen_narrow_su") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) - (func (export "i16x8_low_widen_narrow_uu") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) - (func (export "i16x8_low_widen_narrow_us") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) - (func (export "i16x8_high_widen_narrow_uu") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) - (func (export "i16x8_high_widen_narrow_us") (param v128 v128) (result v128) - (i16x8.widen_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) - - (func (export "i32x4_low_widen_narrow_ss") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) - (func (export "i32x4_low_widen_narrow_su") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) - (func (export "i32x4_high_widen_narrow_ss") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) - (func (export "i32x4_high_widen_narrow_su") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) - (func (export "i32x4_low_widen_narrow_uu") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) - (func (export "i32x4_low_widen_narrow_us") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) - (func (export "i32x4_high_widen_narrow_uu") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) - (func (export "i32x4_high_widen_narrow_us") (param v128 v128) (result v128) - (i32x4.widen_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i16x8_low_extend_narrow_ss") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_low_extend_narrow_su") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_high_extend_narrow_ss") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_s (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_high_extend_narrow_su") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_s (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_low_extend_narrow_uu") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_low_extend_narrow_us") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + (func (export "i16x8_high_extend_narrow_uu") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_u (i8x16.narrow_i16x8_u (local.get 0) (local.get 1)))) + (func (export "i16x8_high_extend_narrow_us") (param v128 v128) (result v128) + (i16x8.extend_low_i8x16_u (i8x16.narrow_i16x8_s (local.get 0) (local.get 1)))) + + (func (export "i32x4_low_extend_narrow_ss") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_low_extend_narrow_su") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_high_extend_narrow_ss") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_s (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_high_extend_narrow_su") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_s (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_low_extend_narrow_uu") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_low_extend_narrow_us") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) + (func (export "i32x4_high_extend_narrow_uu") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_u (i16x8.narrow_i32x4_u (local.get 0) (local.get 1)))) + (func (export "i32x4_high_extend_narrow_us") (param v128 v128) (result v128) + (i32x4.extend_low_i16x8_u (i16x8.narrow_i32x4_s (local.get 0) (local.get 1)))) ) (assert_return (invoke "f32x4_convert_i32x4_s_add" (v128.const i32x4 1 2 3 4) @@ -765,55 +765,55 @@ (v128.const i32x4 1 2 3 4)) (v128.const f32x4 1.0 4.0 9.0 16.0)) -(assert_return (invoke "i16x8_low_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) - (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) - (v128.const i16x8 0xff80 0xff80 0x7f 0xff80 0xff80 0xff80 0x7f 0xff80)) -(assert_return (invoke "i16x8_low_widen_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) - (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) - (v128.const i16x8 0 0 0xffff 0 0 0 0xffff 0)) -(assert_return (invoke "i16x8_high_widen_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) +(assert_return (invoke "i16x8_low_extend_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) (v128.const i16x8 0xff80 0xff80 0x7f 0xff80 0xff80 0xff80 0x7f 0xff80)) -(assert_return (invoke "i16x8_high_widen_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) +(assert_return (invoke "i16x8_low_extend_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) (v128.const i16x8 0 0 0xffff 0 0 0 0xffff 0)) -(assert_return (invoke "i16x8_low_widen_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff) - (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8_low_widen_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) - (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) - (v128.const i16x8 0x80 0x80 0x7f 0x80 0x80 0x80 0x7f 0x80)) -(assert_return (invoke "i16x8_high_widen_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) - (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) - (v128.const i16x8 0 0 0xff 0 0 0 0xff 0)) -(assert_return (invoke "i16x8_high_widen_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) +(assert_return (invoke "i16x8_high_extend_narrow_ss" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0xff80 0xff80 0x7f 0xff80 0xff80 0xff80 0x7f 0xff80)) +(assert_return (invoke "i16x8_high_extend_narrow_su" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) + (v128.const i16x8 0 0 0xffff 0 0 0 0xffff 0)) +(assert_return (invoke "i16x8_low_extend_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x8000 0xffff -0x8000 -0x7fff 0x8000 0xffff)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8_low_extend_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) (v128.const i16x8 0x80 0x80 0x7f 0x80 0x80 0x80 0x7f 0x80)) - -(assert_return (invoke "i32x4_low_widen_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) - (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) - (v128.const i32x4 0xffff8000 0xffff8000 0x7fff 0x7fff)) -(assert_return (invoke "i32x4_low_widen_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) - (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) - (v128.const i32x4 0 0 0xffffffff 0)) -(assert_return (invoke "i32x4_high_widen_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) +(assert_return (invoke "i16x8_high_extend_narrow_uu" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0xffff -0x8000 -0x7fff 0x7fff 0xffff)) + (v128.const i16x8 0 0 0xff 0 0 0 0xff 0)) +(assert_return (invoke "i16x8_high_extend_narrow_us" (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000) + (v128.const i16x8 -0x8000 -0x7fff 0x7fff 0x8000 -0x8000 -0x7fff 0x7fff 0x8000)) + (v128.const i16x8 0x80 0x80 0x7f 0x80 0x80 0x80 0x7f 0x80)) + +(assert_return (invoke "i32x4_low_extend_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) (v128.const i32x4 0xffff8000 0xffff8000 0x7fff 0x7fff)) -(assert_return (invoke "i32x4_high_widen_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) +(assert_return (invoke "i32x4_low_extend_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) (v128.const i32x4 0 0 0xffffffff 0)) -(assert_return (invoke "i32x4_low_widen_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) - (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) - (v128.const i32x4 0 0 0xffff 0)) -(assert_return (invoke "i32x4_low_widen_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) - (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) - (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) -(assert_return (invoke "i32x4_high_widen_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) +(assert_return (invoke "i32x4_high_extend_narrow_ss" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0xffff8000 0xffff8000 0x7fff 0x7fff)) +(assert_return (invoke "i32x4_high_extend_narrow_su" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffffffff 0)) +(assert_return (invoke "i32x4_low_extend_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) (v128.const i32x4 0 0 0xffff 0)) -(assert_return (invoke "i32x4_high_widen_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) +(assert_return (invoke "i32x4_low_extend_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) +(assert_return (invoke "i32x4_high_extend_narrow_uu" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0xffffffff)) + (v128.const i32x4 0 0 0xffff 0)) +(assert_return (invoke "i32x4_high_extend_narrow_us" (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000) + (v128.const i32x4 -0x80000000 -0x7fffffff 0x7fffffff 0x8000000)) + (v128.const i32x4 0x8000 0x8000 0x7fff 0x7fff)) ;; Test operation with empty argument diff --git a/test/core/simd/simd_int_to_int_extend.wast b/test/core/simd/simd_int_to_int_extend.wast new file mode 100644 index 0000000000..be8d554ca5 --- /dev/null +++ b/test/core/simd/simd_int_to_int_extend.wast @@ -0,0 +1,599 @@ +;; Tests for int-to-int extension operations. + +(module + (func (export "i16x8.extend_high_i8x16_s") (param v128) (result v128) (i16x8.extend_high_i8x16_s (local.get 0))) + (func (export "i16x8.extend_high_i8x16_u") (param v128) (result v128) (i16x8.extend_high_i8x16_u (local.get 0))) + (func (export "i16x8.extend_low_i8x16_s") (param v128) (result v128) (i16x8.extend_low_i8x16_s (local.get 0))) + (func (export "i16x8.extend_low_i8x16_u") (param v128) (result v128) (i16x8.extend_low_i8x16_u (local.get 0))) + (func (export "i32x4.extend_high_i16x8_s") (param v128) (result v128) (i32x4.extend_high_i16x8_s (local.get 0))) + (func (export "i32x4.extend_high_i16x8_u") (param v128) (result v128) (i32x4.extend_high_i16x8_u (local.get 0))) + (func (export "i32x4.extend_low_i16x8_s") (param v128) (result v128) (i32x4.extend_low_i16x8_s (local.get 0))) + (func (export "i32x4.extend_low_i16x8_u") (param v128) (result v128) (i32x4.extend_low_i16x8_u (local.get 0))) + (func (export "i64x2.extend_high_i32x4_s") (param v128) (result v128) (i64x2.extend_high_i32x4_s (local.get 0))) + (func (export "i64x2.extend_high_i32x4_u") (param v128) (result v128) (i64x2.extend_high_i32x4_u (local.get 0))) + (func (export "i64x2.extend_low_i32x4_s") (param v128) (result v128) (i64x2.extend_low_i32x4_s (local.get 0))) + (func (export "i64x2.extend_low_i32x4_u") (param v128) (result v128) (i64x2.extend_low_i32x4_u (local.get 0))) +) + +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) + +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) + +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) +(assert_return (invoke "i16x8.extend_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) + +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 0 0 0 0 0 0 0 0)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 1 1 1 1 1 1 1 1)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) + (v128.const i16x8 126 126 126 126 126 126 126 126)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 127 127 127 127 127 127 127 127)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 129 129 129 129 129 129 129 129)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) + (v128.const i16x8 128 128 128 128 128 128 128 128)) +(assert_return (invoke "i16x8.extend_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) + (v128.const i16x8 255 255 255 255 255 255 255 255)) + +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) + +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 32769 32769 32769 32769)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) + +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 -1 -1 -1 -1)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -32767 -32767 -32767 -32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 -32768 -32768 -32768 -32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 -1 -1 -1 -1)) + +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) + (v128.const i32x4 0 0 0 0)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) + (v128.const i32x4 1 1 1 1)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) + (v128.const i32x4 32766 32766 32766 32766)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) + (v128.const i32x4 32767 32767 32767 32767)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) + (v128.const i32x4 65535 65535 65535 65535)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) + (v128.const i32x4 32769 32769 32769 32769)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) + (v128.const i32x4 32768 32768 32768 32768)) +(assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) + (v128.const i32x4 65535 65535 65535 65535)) + +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) + +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 2147483649 2147483649)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) + +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 -1 -1)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 -2147483647 -2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 -2147483648 -2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 -1 -1)) + +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 0 0 0 0)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 0 0 1 1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 0 0 -1 -1)) + (v128.const i64x2 0 0)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 1 1 0 0)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -1 -1 0 0)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 1 1 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -1 -1 1 1)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) + (v128.const i64x2 2147483646 2147483646)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) + (v128.const i64x2 2147483647 2147483647)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) + (v128.const i64x2 4294967295 4294967295)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) + (v128.const i64x2 2147483649 2147483649)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) + (v128.const i64x2 2147483648 2147483648)) +(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) + (v128.const i64x2 4294967295 4294967295)) + + +;; type check +(assert_invalid (module (func (result v128) (i16x8.extend_high_i8x16_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extend_high_i8x16_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extend_low_i8x16_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i16x8.extend_low_i8x16_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extend_high_i16x8_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extend_high_i16x8_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extend_low_i16x8_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i32x4.extend_low_i16x8_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extend_high_i32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extend_high_i32x4_u (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extend_low_i32x4_s (i32.const 0)))) "type mismatch") +(assert_invalid (module (func (result v128) (i64x2.extend_low_i32x4_u (i32.const 0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i16x8.extend_high_i8x16_s-arg-empty (result v128) + (i16x8.extend_high_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extend_high_i8x16_u-arg-empty (result v128) + (i16x8.extend_high_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extend_low_i8x16_s-arg-empty (result v128) + (i16x8.extend_low_i8x16_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i16x8.extend_low_i8x16_u-arg-empty (result v128) + (i16x8.extend_low_i8x16_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extend_high_i16x8_s-arg-empty (result v128) + (i32x4.extend_high_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extend_high_i16x8_u-arg-empty (result v128) + (i32x4.extend_high_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extend_low_i16x8_s-arg-empty (result v128) + (i32x4.extend_low_i16x8_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i32x4.extend_low_i16x8_u-arg-empty (result v128) + (i32x4.extend_low_i16x8_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extend_high_i32x4_s-arg-empty (result v128) + (i64x2.extend_high_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extend_high_i32x4_u-arg-empty (result v128) + (i64x2.extend_high_i32x4_u) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extend_low_i32x4_s-arg-empty (result v128) + (i64x2.extend_low_i32x4_s) + ) + ) + "type mismatch" +) +(assert_invalid + (module + (func $i64x2.extend_low_i32x4_u-arg-empty (result v128) + (i64x2.extend_low_i32x4_u) + ) + ) + "type mismatch" +) + diff --git a/test/core/simd/simd_int_to_int_widen.wast b/test/core/simd/simd_int_to_int_widen.wast deleted file mode 100644 index 1744770ad9..0000000000 --- a/test/core/simd/simd_int_to_int_widen.wast +++ /dev/null @@ -1,599 +0,0 @@ -;; Tests for int-to-int widening operations. - -(module - (func (export "i16x8.widen_high_i8x16_s") (param v128) (result v128) (i16x8.widen_high_i8x16_s (local.get 0))) - (func (export "i16x8.widen_high_i8x16_u") (param v128) (result v128) (i16x8.widen_high_i8x16_u (local.get 0))) - (func (export "i16x8.widen_low_i8x16_s") (param v128) (result v128) (i16x8.widen_low_i8x16_s (local.get 0))) - (func (export "i16x8.widen_low_i8x16_u") (param v128) (result v128) (i16x8.widen_low_i8x16_u (local.get 0))) - (func (export "i32x4.widen_high_i16x8_s") (param v128) (result v128) (i32x4.widen_high_i16x8_s (local.get 0))) - (func (export "i32x4.widen_high_i16x8_u") (param v128) (result v128) (i32x4.widen_high_i16x8_u (local.get 0))) - (func (export "i32x4.widen_low_i16x8_s") (param v128) (result v128) (i32x4.widen_low_i16x8_s (local.get 0))) - (func (export "i32x4.widen_low_i16x8_u") (param v128) (result v128) (i32x4.widen_low_i16x8_u (local.get 0))) - (func (export "i64x2.widen_high_i32x4_s") (param v128) (result v128) (i64x2.widen_high_i32x4_s (local.get 0))) - (func (export "i64x2.widen_high_i32x4_u") (param v128) (result v128) (i64x2.widen_high_i32x4_u (local.get 0))) - (func (export "i64x2.widen_low_i32x4_s") (param v128) (result v128) (i64x2.widen_low_i32x4_s (local.get 0))) - (func (export "i64x2.widen_low_i32x4_u") (param v128) (result v128) (i64x2.widen_low_i32x4_u (local.get 0))) -) - -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) - (v128.const i16x8 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_high_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) - -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) - (v128.const i16x8 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i16x8 129 129 129 129 129 129 129 129)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_high_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) - -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) - (v128.const i16x8 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -127 -127 -127 -127 -127 -127 -127 -127)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 -128 -128 -128 -128 -128 -128 -128 -128)) -(assert_return (invoke "i16x8.widen_low_i8x16_s" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) - -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 0 0 0 0 0 0 0 0 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 0 0 0 0 0 0 0 0)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 0 0 0 0 0 0 0 0)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 1 1 1 1 1 1 1 1 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 1 1 1 1 1 1 1 1)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 1 1 1 1 1 1 1 1)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 126 126 126 126 126 126 126 126 127 127 127 127 127 127 127 127)) - (v128.const i16x8 126 126 126 126 126 126 126 126)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 126 126 126 126 126 126 126 126)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 127 127 127 127 127 127 127 127)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 127 127 127 127 127 127 127 127 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 127 127 127 127 127 127 127 127)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 127 127 127 127 127 127 127 127)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -127 -127 -127 -127 -127 -127 -127 -127 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 129 129 129 129 129 129 129 129)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -127 -127 -127 -127 -127 -127 -127 -127)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -128 -128 -128 -128 -128 -128 -128 -128 -1 -1 -1 -1 -1 -1 -1 -1)) - (v128.const i16x8 128 128 128 128 128 128 128 128)) -(assert_return (invoke "i16x8.widen_low_i8x16_u" (v128.const i8x16 -1 -1 -1 -1 -1 -1 -1 -1 -128 -128 -128 -128 -128 -128 -128 -128)) - (v128.const i16x8 255 255 255 255 255 255 255 255)) - -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) - (v128.const i32x4 32766 32766 32766 32766)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) - (v128.const i32x4 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_high_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) - -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) - (v128.const i32x4 32766 32766 32766 32766)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) - (v128.const i32x4 32769 32769 32769 32769)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_high_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32768 32768 32768 32768)) - -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) - (v128.const i32x4 32766 32766 32766 32766)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) - (v128.const i32x4 -1 -1 -1 -1)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -32767 -32767 -32767 -32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) - (v128.const i32x4 -32768 -32768 -32768 -32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_s" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) - (v128.const i32x4 -1 -1 -1 -1)) - -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 0 0 0 0)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 1 1 1 1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 0 0 0 0 -1 -1 -1 -1)) - (v128.const i32x4 0 0 0 0)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 0 0 0 0)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 0 0 0 0)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 1 1 1 1 -1 -1 -1 -1)) - (v128.const i32x4 1 1 1 1)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 1 1 1 1)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32766 32766 32766 32766 32767 32767 32767 32767)) - (v128.const i32x4 32766 32766 32766 32766)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32766 32766 32766 32766)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 32767 32767 32767 32767)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 32767 32767 32767 32767 -1 -1 -1 -1)) - (v128.const i32x4 32767 32767 32767 32767)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 32767 32767 32767 32767)) - (v128.const i32x4 65535 65535 65535 65535)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32767 -32767 -32767 -32767 -32768 -32768 -32768 -32768)) - (v128.const i32x4 32769 32769 32769 32769)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -32767 -32767 -32767 -32767)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -32768 -32768 -32768 -32768 -1 -1 -1 -1)) - (v128.const i32x4 32768 32768 32768 32768)) -(assert_return (invoke "i32x4.widen_low_i16x8_u" (v128.const i16x8 -1 -1 -1 -1 -32768 -32768 -32768 -32768)) - (v128.const i32x4 65535 65535 65535 65535)) - -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 1 1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 0 0 -1 -1)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 1 1 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 1 1 -1 -1)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 1 1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) - (v128.const i64x2 2147483646 2147483646)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) - (v128.const i64x2 -2147483647 -2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_high_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) - (v128.const i64x2 -2147483648 -2147483648)) - -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 1 1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 0 0 -1 -1)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 1 1 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 1 1 -1 -1)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 1 1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) - (v128.const i64x2 2147483646 2147483646)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) - (v128.const i64x2 2147483649 2147483649)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_high_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) - (v128.const i64x2 2147483648 2147483648)) - -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 1 1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 0 0 -1 -1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 1 1 0 0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 0 0)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 1 1 -1 -1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 1 1)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) - (v128.const i64x2 2147483646 2147483646)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 2147483647 2147483647)) - (v128.const i64x2 -1 -1)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) - (v128.const i64x2 -2147483647 -2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) - (v128.const i64x2 -2147483648 -2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) - (v128.const i64x2 -1 -1)) - -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 0 0)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 1 1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 0 0 -1 -1)) - (v128.const i64x2 0 0)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 1 1 0 0)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 0 0)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 1 1 -1 -1)) - (v128.const i64x2 1 1)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 1 1)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483646 2147483646 2147483647 2147483647)) - (v128.const i64x2 2147483646 2147483646)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483646 2147483646)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 2147483647 2147483647)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483648 -2147483648)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -2147483648 -2147483648)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 2147483647 2147483647)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 2147483647 2147483647 -1 -1)) - (v128.const i64x2 2147483647 2147483647)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 2147483647 2147483647)) - (v128.const i64x2 4294967295 4294967295)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483647 -2147483647 -2147483648 -2147483648)) - (v128.const i64x2 2147483649 2147483649)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -2147483647 -2147483647)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -2147483648 -2147483648 -1 -1)) - (v128.const i64x2 2147483648 2147483648)) -(assert_return (invoke "i64x2.widen_low_i32x4_u" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) - (v128.const i64x2 4294967295 4294967295)) - - -;; type check -(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_high_i8x16_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i16x8.widen_low_i8x16_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_high_i16x8_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i32x4.widen_low_i16x8_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.widen_high_i32x4_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.widen_high_i32x4_u (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.widen_low_i32x4_s (i32.const 0)))) "type mismatch") -(assert_invalid (module (func (result v128) (i64x2.widen_low_i32x4_u (i32.const 0)))) "type mismatch") - -;; Test operation with empty argument - -(assert_invalid - (module - (func $i16x8.widen_high_i8x16_s-arg-empty (result v128) - (i16x8.widen_high_i8x16_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_high_i8x16_u-arg-empty (result v128) - (i16x8.widen_high_i8x16_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_low_i8x16_s-arg-empty (result v128) - (i16x8.widen_low_i8x16_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i16x8.widen_low_i8x16_u-arg-empty (result v128) - (i16x8.widen_low_i8x16_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_high_i16x8_s-arg-empty (result v128) - (i32x4.widen_high_i16x8_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_high_i16x8_u-arg-empty (result v128) - (i32x4.widen_high_i16x8_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_low_i16x8_s-arg-empty (result v128) - (i32x4.widen_low_i16x8_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i32x4.widen_low_i16x8_u-arg-empty (result v128) - (i32x4.widen_low_i16x8_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i64x2.widen_high_i32x4_s-arg-empty (result v128) - (i64x2.widen_high_i32x4_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i64x2.widen_high_i32x4_u-arg-empty (result v128) - (i64x2.widen_high_i32x4_u) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i64x2.widen_low_i32x4_s-arg-empty (result v128) - (i64x2.widen_low_i32x4_s) - ) - ) - "type mismatch" -) -(assert_invalid - (module - (func $i64x2.widen_low_i32x4_u-arg-empty (result v128) - (i64x2.widen_low_i32x4_u) - ) - ) - "type mismatch" -) - From cd63ede2e064ed773697d1e12dbbe06d11a676db Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 12 Feb 2021 10:46:21 -0800 Subject: [PATCH 332/378] [spectext] Add double precision conversion Instructions were added in #383. Consolidate conversion operations (vcvtop) more, merging int-int widening operations. Drive-by fix extmul definition in syntax (shouldn't include the shape). --- .../core/appendix/gen-index-instructions.py | 38 +- document/core/appendix/index-instructions.rst | 970 +++++++++--------- document/core/binary/instructions.rst | 8 +- document/core/exec/instructions.rst | 99 +- document/core/syntax/instructions.rst | 19 +- document/core/text/instructions.rst | 12 +- document/core/util/macros.def | 3 +- document/core/valid/instructions.rst | 31 +- 8 files changed, 620 insertions(+), 560 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 835ef2a3cd..3094a30e2c 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -446,10 +446,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -478,10 +478,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~165', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~166', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -500,10 +500,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VABS', r'\hex{FD}~~162', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), - Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-simd-extend'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -537,10 +537,16 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~246', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_s'), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-trunc_sat_u'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-convert_s'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-convert_u'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~85', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~86', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~83', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_u}', r'\hex{FD}~~84', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}', r'\hex{FD}~~87', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-demote'), + Instruction(r'\F64X2.\VPROMOTE\K{\_low\_f32x4}', r'\hex{FD}~~105', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-promote'), ] def ColumnWidth(n): diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index bd37fb5a26..0dbff6236d 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,483 +6,493 @@ Index of Instructions --------------------- -================================================= ===================== ============================================= =========================================== ================================================================== -Instruction Binary Opcode Type Validation Execution -================================================= ===================== ============================================= =========================================== ================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1C}` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{25}` -(reserved) :math:`\hex{26}` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -(reserved) :math:`\hex{D0}` -(reserved) :math:`\hex{D1}` -(reserved) :math:`\hex{D2}` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~94` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~95` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~186` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -================================================= ===================== ============================================= =========================================== ================================================================== +================================================= ===================== ============================================= ============================================= ================================================================== +Instruction Binary Opcode Type Validation Execution +================================================= ===================== ============================================= ============================================= ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` 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:math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +(reserved) :math:`\hex{D0}` +(reserved) :math:`\hex{D1}` +(reserved) :math:`\hex{D2}` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~94` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~95` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~194` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~195` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~165` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~166` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~186` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~234` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~235` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~85` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~86` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~83` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~84` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~87` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~105` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +================================================= ===================== ============================================= ============================================= ================================================================== diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 456d29b987..14f1247fc2 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -762,7 +762,13 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~248{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_s} \\ &&|& \hex{FD}~~249{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u} \\ &&|& \hex{FD}~~250{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s} \\ &&|& - \hex{FD}~~251{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u} \\ + \hex{FD}~~251{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u} \\ &&|& + \hex{FD}~~85{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}\\ &&|& + \hex{FD}~~86{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}\\ &&|& + \hex{FD}~~83{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_s}\\ &&|& + \hex{FD}~~84{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_u}\\ &&|& + \hex{FD}~~87{:}\Bu32 &\Rightarrow& \F32X4.\VDEMOTE\K{\_f64x2\_zero}\\ &&|& + \hex{FD}~~105{:}\Bu32 &\Rightarrow& \F64X2.\VPROMOTE\K{\_low\_f32x4}\\ \end{array} diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 5a0ecbad02..f5b4dfaedc 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -608,34 +608,6 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-vcvtop: - -:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx` -..................................................... - -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. - -2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. - -3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. - -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast))` - -5. Push the value :math:`\V128.\VCONST~c` onto the stack. - -.. math:: - \begin{array}{l} - \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx &\stepto& (\V128\K{.}\VCONST~c) \\ - \end{array} - \\ \qquad - \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1) \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast)) - \end{array} - \end{array} - - .. _exec-simd-narrow: :math:`t_2\K{x}N\K{.}\NARROW\K{\_}t_1\K{x}M\K{\_}\sx` @@ -671,56 +643,93 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-simd-extend: +.. _exec-vcvtop: -:math:`t_2\K{x}N\K{.}\VEXTEND\_\K{low}\_t_1\K{x}M\_\sx` -....................................................... +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx` +..................................................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{t_1,t_2}(i^\ast))` +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast))` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\VEXTEND\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast)) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))) \end{array} \end{array} -:math:`t_2\K{x}N\K{.}\VEXTEND\_\K{high}\_t_1\K{x}M\_\sx` -........................................................ +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_low\_}t_1\K{x}M\K{\_}\sx^?` and :math:`t_2\K{x}N\K{.}\vcvtop\K{\_high\_}t_1\K{x}M\K{\_}\sx^?` +.............................................................................................................................. -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. +3. If :math:`\K{low}` is part of the instruction, then: + + a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. + +4. Else: + + a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. + +5. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(i^\ast))` -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{t_1,t_2}(i^\ast))` +6. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_low\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(\lanes_{t_1\K{x}M}(c_1)[0 \slice N])) + \end{array} + \\[1ex] + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_high\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(\lanes_{t_1\K{x}M}(c_1)[N \slice N])) + \end{array} + \end{array} + + +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero}` +................................................................. + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. + +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(i^\ast)~0^M)` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\VEXTEND\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero} &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast)) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))~0^N) \end{array} \end{array} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 48b27b93a1..67391aacc4 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -270,8 +270,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8.}\EXTADDPAIRWISE\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\EXTADDPAIRWISE\K{\_i16x8\_}\sx \\ &&|& \fshape\K{.}\vfbinop \\&&|& - \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx \\ &&|& - \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx \\&&|& + \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx ~|~ \K{i32x4.}\VTRUNC\K{\_sat\_f64x2\_}\sx\K{\_zero} \\&&|& + \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx ~|~ \K{f32x4.}\VDEMOTE\K{\_f64x2\_zero} \\&&|& + \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ \production{SIMD unary operator} & \vsunop &::=& \K{not} \\ @@ -374,7 +375,7 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vunop: .. _syntax-vbinop: -.. _syntax-vextend: +.. _syntax-vcvtop: .. _syntax-vextmul: .. _syntax-vcvtop: @@ -399,13 +400,13 @@ Occasionally, it is convenient to group operators together according to the foll \Q15MULRSAT\K{\_s} \\ \production{conversion operator} & \vcvtop &::=& \VTRUNC\K{\_sat} ~|~ - \VCONVERT \\ - \production{extend operator} & \vextend &::=& - \VEXTEND\K{\_low\_}\shape\K{\_}\sx ~|~ - \VEXTEND\K{\_high\_}\shape\K{\_}\sx \\ + \VEXTEND ~|~ + \VCONVERT ~|~ + \VDEMOTE ~|~ + \VPROMOTE \\ \production{extmul operator} & \vextmul &::=& - \EXTMUL\K{\_low\_}\ishape\K{\_}\sx ~|~ - \EXTMUL\K{\_high\_}\ishape\K{\_}\sx \\ + \EXTMUL\K{\_low} ~|~ + \EXTMUL\K{\_high} \\ \end{array} diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 5bae20ba93..edfbcd9073 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -791,10 +791,16 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& - \text{i32x4.trunc\_sat\_f32x4\_s} &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_s}\\ &&|& - \text{i32x4.trunc\_sat\_f32x4\_u} &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u}\\ &&|& + \text{i32x4.trunc\_sat\_f32x4\_s} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f32x4\_s}\\ &&|& + \text{i32x4.trunc\_sat\_f32x4\_u} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f32x4\_u}\\ &&|& + \text{i32x4.trunc\_sat\_f64x2\_s\_zero} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}\\ &&|& + \text{i32x4.trunc\_sat\_f64x2\_u\_zero} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}\\ &&|& \text{f32x4.convert\_i32x4\_s} &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s}\\ &&|& - \text{f32x4.convert\_i32x4\_u} &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u}\\ + \text{f32x4.convert\_i32x4\_u} &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u}\\ &&|& + \text{f64x2.convert\_low\_i32x4\_s} &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_s}\\ &&|& + \text{f64x2.convert\_low\_i32x4\_u} &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_u}\\ &&|& + \text{f32x4.demote\_f64x2\_zero} &\Rightarrow& \F32X4.\VDEMOTE\K{\_f64x2\_zero}\\ &&|& + \text{f64x2.promote\_low\_f32x4} &\Rightarrow& \F64X2.\VPROMOTE\K{\_low\_f32x4}\\ &&|& \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index a2521edce1..2c056bf1ec 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -431,6 +431,8 @@ .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} .. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}} .. |EXTADDPAIRWISE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extadd\_pairwise}} +.. |VDEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{demote}} +.. |VPROMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{promote}} .. Instructions, non-terminals @@ -458,7 +460,6 @@ .. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}} .. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}} .. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} -.. |vextend| mathdef:: \xref{syntax/instructions}{syntax-vextend}{\X{vextend}} .. |vcvtop| mathdef:: \xref{syntax/instructions}{syntax-vcvtop}{\X{vcvtop}} .. |vextmul| mathdef:: \xref{syntax/instructions}{syntax-vextmul}{\X{vextmul}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index a6b4347fb9..69dd9f7bee 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -396,7 +396,7 @@ We also define an auxiliary function to get number of packed numeric types in a .. _valid-vcvtop: :math:`\shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx` -..................................................... +............................................... * The instruction is valid with type :math:`[\V128] \to [\V128]`. @@ -407,20 +407,41 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vextend: +:math:`\shape\K{.}\vcvtop\K{\_low\_}\shape\K{\_}\sx^?` +...................................................... + +* The instruction is valid with type :math:`[\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vcvtop\K{\_low\_}\shape\K{\_}\sx : [\V128] \to [\V128] + } + -:math:`\shape\K{.}\vextend\K{\_}\shape\K{\_}\sx` -................................................ +:math:`\shape\K{.}\vcvtop\K{\_high\_}\shape\K{\_}\sx^?` +....................................................... * The instruction is valid with type :math:`[\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\vextend\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] + C \vdashinstr \shape\K{.}\vcvtop\K{\_high\_}\shape\K{\_}\sx : [\V128] \to [\V128] } +:math:`\shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx^?\K{\_zero}` +............................................................... + +* The instruction is valid with type :math:`[\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] + } + .. _valid-narrow: From f6671c1e19134adf5005e2c7370f803d1c674cee Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Feb 2021 13:42:43 -0800 Subject: [PATCH 333/378] Check in simd_i64x2_arith2.wast test file Missed adding this when implementing i64x2.abs. --- test/core/simd/simd_i64x2_arith2.wast | 78 +++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 test/core/simd/simd_i64x2_arith2.wast diff --git a/test/core/simd/simd_i64x2_arith2.wast b/test/core/simd/simd_i64x2_arith2.wast new file mode 100644 index 0000000000..14398d8a46 --- /dev/null +++ b/test/core/simd/simd_i64x2_arith2.wast @@ -0,0 +1,78 @@ +;; Tests for i64x2 [abs] operations. + +(module + (func (export "i64x2.abs") (param v128) (result v128) (i64x2.abs (local.get 0))) + (func (export "i64x2.abs_with_const_0") (result v128) (i64x2.abs (v128.const i64x2 -9223372036854775808 9223372036854775807))) +) + +(assert_return (invoke "i64x2.abs" (v128.const i64x2 1 1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 18446744073709551615 18446744073709551615)) + (v128.const i64x2 1 1)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 0xffffffffffffffff 0xffffffffffffffff)) + (v128.const i64x2 0x1 0x1)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 9223372036854775808 9223372036854775808)) + (v128.const i64x2 9223372036854775808 9223372036854775808)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -9223372036854775808 -9223372036854775808)) + (v128.const i64x2 9223372036854775808 9223372036854775808)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -0x8000000000000000 -0x8000000000000000)) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 0x8000000000000000 0x8000000000000000)) + (v128.const i64x2 0x8000000000000000 0x8000000000000000)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 01_2_3 01_2_3)) + (v128.const i64x2 01_2_3 01_2_3)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -01_2_3 -01_2_3)) + (v128.const i64x2 123 123)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 0x80 0x80)) + (v128.const i64x2 0x80 0x80)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -0x80 -0x80)) + (v128.const i64x2 0x80 0x80)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 0x0_8_0 0x0_8_0)) + (v128.const i64x2 0x0_8_0 0x0_8_0)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -0x0_8_0 -0x0_8_0)) + (v128.const i64x2 0x80 0x80)) + +;; Const vs const +(assert_return (invoke "i64x2.abs_with_const_0") (v128.const i64x2 9223372036854775808 9223372036854775807)) + +;; Param vs const + +;; Test different lanes go through different if-then clauses +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -9223372036854775808 9223372036854775807)) + (v128.const i64x2 9223372036854775808 9223372036854775807)) + +;; Test opposite signs of zero +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -0 -0)) + (v128.const i64x2 -0 -0)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 +0 0)) + (v128.const i64x2 +0 0)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 -0 -0)) + (v128.const i64x2 -0 -0)) +(assert_return (invoke "i64x2.abs" (v128.const i64x2 +0 +0)) + (v128.const i64x2 +0 +0)) + +;; Unknown operators + +;; Type check +(assert_invalid (module (func (result v128) (i64x2.abs (f32.const 0.0)))) "type mismatch") + +;; Test operation with empty argument + +(assert_invalid + (module + (func $i64x2.abs-arg-empty (result v128) + (i64x2.abs) + ) + ) + "type mismatch" +) + +;; Combination +(module + (func (export "i64x2.abs-i64x2.abs") (param v128) (result v128) (i64x2.abs (i64x2.abs (local.get 0)))) +) + +(assert_return (invoke "i64x2.abs-i64x2.abs" (v128.const i64x2 -1 -1)) + (v128.const i64x2 1 1)) From b4fde0370c725e29ef818f716d45f4964f968fa3 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Feb 2021 11:58:30 -0800 Subject: [PATCH 334/378] Fix i32x4.trunc_sat_f64x2_zero The zeroed lanes should be the upper 2 lanes. Fix test generation script and interpreter. --- interpreter/exec/simd.ml | 2 +- .../simd/meta/simd_int_trunc_sat_float.py | 2 +- .../core/simd/simd_i32x4_trunc_sat_f64x2.wast | 110 +++++++++--------- 3 files changed, 57 insertions(+), 57 deletions(-) diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 679048eec3..2695597aee 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -467,7 +467,7 @@ struct let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u let convert_zero f v = - Rep.(of_i32x4 I32.(zero :: zero :: (List.map f (to_f64x2 v)))) + Rep.(of_i32x4 I32.(List.map f (to_f64x2 v) @ [zero; zero])) let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u diff --git a/test/core/simd/meta/simd_int_trunc_sat_float.py b/test/core/simd/meta/simd_int_trunc_sat_float.py index eee912d7a0..88048b6c96 100644 --- a/test/core/simd/meta/simd_int_trunc_sat_float.py +++ b/test/core/simd/meta/simd_int_trunc_sat_float.py @@ -164,7 +164,7 @@ class SimdI32x4TruncSatF64x2Case(SimdConversionCase): UNARY_OPS = ("trunc_sat_f64x2_s_zero", "trunc_sat_f64x2_u_zero") def to_results(self, value: str): - return ["0", value] + return [value, "0"] def gen_test_cases(): diff --git a/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast b/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast index d232bb0755..9bf507d77f 100644 --- a/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast +++ b/test/core/simd/simd_i32x4_trunc_sat_f64x2.wast @@ -12,39 +12,39 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0.0 -0.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 1.5 1.5)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -1.5 -1.5)) - (v128.const i32x4 0 0 -1 -1)) + (v128.const i32x4 -1 -1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 1.9 1.9)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2.0 2.0)) - (v128.const i32x4 0 0 2 2)) + (v128.const i32x4 2 2 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -1.9 -1.9)) - (v128.const i32x4 0 0 -1 -1)) + (v128.const i32x4 -1 -1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2.0 -2.0)) - (v128.const i32x4 0 0 -2 -2)) + (v128.const i32x4 -2 -2 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483520.0 2147483520.0)) - (v128.const i32x4 0 0 2147483520 2147483520)) + (v128.const i32x4 2147483520 2147483520 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483520.0 -2147483520.0)) - (v128.const i32x4 0 0 -2147483520 -2147483520)) + (v128.const i32x4 -2147483520 -2147483520 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483648.0 2147483648.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483648.0 -2147483648.0)) - (v128.const i32x4 0 0 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967294.0 4294967294.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -4294967294.0 -4294967294.0)) - (v128.const i32x4 0 0 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 2147483647.0 2147483647.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -2147483647.0 -2147483647.0)) - (v128.const i32x4 0 0 -2147483647 -2147483647)) + (v128.const i32x4 -2147483647 -2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967294.0 4294967294.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967295.0 4294967295.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 4294967296.0 4294967296.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p-149 0x1p-149)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p-149 -0x1p-149)) @@ -58,21 +58,21 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p-1 -0x1p-1)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1p+0 0x1p+0)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1p+0 -0x1p+0)) - (v128.const i32x4 0 0 -1 -1)) + (v128.const i32x4 -1 -1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.19999ap+0 0x1.19999ap+0)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.19999ap+0 -0x1.19999ap+0)) - (v128.const i32x4 0 0 -1 -1)) + (v128.const i32x4 -1 -1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 0 0 6 6)) + (v128.const i32x4 6 6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) - (v128.const i32x4 0 0 -6 -6)) + (v128.const i32x4 -6 -6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) - (v128.const i32x4 0 0 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.ccccccp-1 0x1.ccccccp-1)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.ccccccp-1 -0x1.ccccccp-1)) @@ -82,17 +82,17 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep-1 -0x1.fffffep-1)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 0 0 6 6)) + (v128.const i32x4 6 6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) - (v128.const i32x4 0 0 -6 -6)) + (v128.const i32x4 -6 -6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) - (v128.const i32x4 0 0 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 +inf +inf)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -inf -inf)) - (v128.const i32x4 0 0 -2147483648 -2147483648)) + (v128.const i32x4 -2147483648 -2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 +nan +nan)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -nan -nan)) @@ -102,13 +102,13 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -nan:0x444444 -nan:0x444444)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 42 42)) - (v128.const i32x4 0 0 42 42)) + (v128.const i32x4 42 42 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 -42 -42)) - (v128.const i32x4 0 0 -42 -42)) + (v128.const i32x4 -42 -42 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 0123456792.0 0123456792.0)) - (v128.const i32x4 0 0 123456792 123456792)) + (v128.const i32x4 123456792 123456792 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_s_zero" (v128.const f64x2 01234567890.0 01234567890.0)) - (v128.const i32x4 0 0 1234567890 1234567890)) + (v128.const i32x4 1234567890 1234567890 0 0)) ;; i32x4.trunc_sat_f64x2_u_zero (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0.0 0.0)) @@ -116,39 +116,39 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0.0 -0.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 1.5 1.5)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -1.5 -1.5)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 1.9 1.9)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2.0 2.0)) - (v128.const i32x4 0 0 2 2)) + (v128.const i32x4 2 2 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -1.9 -1.9)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2.0 -2.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483520.0 2147483520.0)) - (v128.const i32x4 0 0 2147483520 2147483520)) + (v128.const i32x4 2147483520 2147483520 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483520.0 -2147483520.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483648.0 2147483648.0)) - (v128.const i32x4 0 0 2147483648 2147483648)) + (v128.const i32x4 2147483648 2147483648 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483648.0 -2147483648.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967294.0 4294967294.0)) - (v128.const i32x4 0 0 4294967294 4294967294)) + (v128.const i32x4 4294967294 4294967294 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -4294967294.0 -4294967294.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 2147483647.0 2147483647.0)) - (v128.const i32x4 0 0 2147483647 2147483647)) + (v128.const i32x4 2147483647 2147483647 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -2147483647.0 -2147483647.0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967294.0 4294967294.0)) - (v128.const i32x4 0 0 4294967294 4294967294)) + (v128.const i32x4 4294967294 4294967294 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967295.0 4294967295.0)) - (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 4294967295 4294967295 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 4294967296.0 4294967296.0)) - (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 4294967295 4294967295 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p-149 0x1p-149)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p-149 -0x1p-149)) @@ -162,19 +162,19 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p-1 -0x1p-1)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1p+0 0x1p+0)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1p+0 -0x1p+0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.19999ap+0 0x1.19999ap+0)) - (v128.const i32x4 0 0 1 1)) + (v128.const i32x4 1 1 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.19999ap+0 -0x1.19999ap+0)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 0 0 6 6)) + (v128.const i32x4 6 6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 4294967295 4294967295 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.ccccccp-1 0x1.ccccccp-1)) @@ -186,15 +186,15 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep-1 -0x1.fffffep-1)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.921fb6p+2 0x1.921fb6p+2)) - (v128.const i32x4 0 0 6 6)) + (v128.const i32x4 6 6 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.921fb6p+2 -0x1.921fb6p+2)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0x1.fffffep+127 0x1.fffffep+127)) - (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 4294967295 4294967295 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -0x1.fffffep+127 -0x1.fffffep+127)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 +inf +inf)) - (v128.const i32x4 0 0 4294967295 4294967295)) + (v128.const i32x4 4294967295 4294967295 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -inf -inf)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 +nan +nan)) @@ -206,13 +206,13 @@ (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -nan:0x444444 -nan:0x444444)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 42 42)) - (v128.const i32x4 0 0 42 42)) + (v128.const i32x4 42 42 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 -42 -42)) (v128.const i32x4 0 0 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 0123456792.0 0123456792.0)) - (v128.const i32x4 0 0 123456792 123456792)) + (v128.const i32x4 123456792 123456792 0 0)) (assert_return (invoke "i32x4.trunc_sat_f64x2_u_zero" (v128.const f64x2 01234567890.0 01234567890.0)) - (v128.const i32x4 0 0 1234567890 1234567890)) + (v128.const i32x4 1234567890 1234567890 0 0)) ;; type check (assert_invalid (module (func (result v128) (i32x4.trunc_sat_f64x2_s_zero (i32.const 0)))) "type mismatch") From 770ce643d221667692c08b019657c6f5652d08e3 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Feb 2021 11:47:55 -0800 Subject: [PATCH 335/378] Fix q15 saturating mul Forgot to saturate the result in both test generation code and interpreter. This fixes both cases. --- interpreter/exec/int.ml | 2 +- test/core/simd/meta/simd_integer_op.py | 17 +++++------------ test/core/simd/meta/simd_lane_value.py | 8 +++++++- test/core/simd/simd_i16x8_q15mulr_sat_s.wast | 2 +- 4 files changed, 14 insertions(+), 15 deletions(-) diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 990f410d78..433093132b 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -296,7 +296,7 @@ struct assert (Rep.bitwidth < 32); let x64 = Rep.to_int64 x in let y64 = Rep.to_int64 y in - Rep.of_int64 Int64.((shift_right (add (mul x64 y64) 0x4000L) 15)) + saturate_s (Rep.of_int64 Int64.((shift_right (add (mul x64 y64) 0x4000L) 15))) let to_int_s = Rep.to_int let to_int_u i = Rep.to_int i land (Rep.to_int Rep.max_int lsl 1) lor 1 diff --git a/test/core/simd/meta/simd_integer_op.py b/test/core/simd/meta/simd_integer_op.py index 70d152e986..69ed7235e7 100644 --- a/test/core/simd/meta/simd_integer_op.py +++ b/test/core/simd/meta/simd_integer_op.py @@ -68,10 +68,7 @@ def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: if self.op.startswith('sub'): value = operand1 - operand2 - if value > lane.max: - return lane.max - if value < lane.min: - return lane.min + return lane.sat_s(value) if self.op.endswith('sat_u'): if operand1 < 0: @@ -83,10 +80,7 @@ def _saturate(self, operand1: int, operand2: int, lane: LaneValue) -> int: if self.op.startswith('sub'): value = operand1 - operand2 - if value > lane.mask: - return lane.mask - if value < 0: - return 0 + return lane.sat_u(value) return value @@ -122,10 +116,10 @@ def unary_op(self, operand, lane): return str(bin(result % lane.mod).count('1')) elif self.op == 'sat_s': # Don't call get_valid_value, it will truncate results. - return max(lane.min, min(v, lane.max)) + return lane.sat_s(v) elif self.op == 'sat_u': # Don't call get_valid_value, it will truncate results. - return max(0, min(v, lane.mask)) + return lane.sat_u(v) else: raise Exception('Unknown unary operation') @@ -181,8 +175,7 @@ def binary_op(self, operand1, operand2, src_lane, dst_lane=None): # This should be before 'sat' case. i1 = ArithmeticOp.get_valid_value(v1, src_lane) i2 = ArithmeticOp.get_valid_value(v2, src_lane) - result = (i1 * i2 + 0x4000) >> 15 - return ArithmeticOp.get_valid_value(result, src_lane) + return src_lane.sat_s((i1 * i2 + 0x4000) >> 15) elif 'sat' in self.op: value = self._saturate(v1, v2, src_lane) if self.op.endswith('_u'): diff --git a/test/core/simd/meta/simd_lane_value.py b/test/core/simd/meta/simd_lane_value.py index fad246e044..a280b06616 100644 --- a/test/core/simd/meta/simd_lane_value.py +++ b/test/core/simd/meta/simd_lane_value.py @@ -29,4 +29,10 @@ def mod(self): @property def quarter(self): - return pow(2, self.lane_width - 2) \ No newline at end of file + return pow(2, self.lane_width - 2) + + def sat_s(self, v): + return max(self.min, min(v, self.max)) + + def sat_u(self, v): + return max(0, min(v, self.mask)) diff --git a/test/core/simd/simd_i16x8_q15mulr_sat_s.wast b/test/core/simd/simd_i16x8_q15mulr_sat_s.wast index 1432defa3e..2cea8cc748 100644 --- a/test/core/simd/simd_i16x8_q15mulr_sat_s.wast +++ b/test/core/simd/simd_i16x8_q15mulr_sat_s.wast @@ -63,7 +63,7 @@ (v128.const i16x8 32766 32766 32766 32766 32766 32766 32766 32766)) (assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) - (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768)) + (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) (assert_return (invoke "i16x8.q15mulr_sat_s" (v128.const i16x8 -32768 -32768 -32768 -32768 -32768 -32768 -32768 -32768) (v128.const i16x8 -32767 -32767 -32767 -32767 -32767 -32767 -32767 -32767)) (v128.const i16x8 32767 32767 32767 32767 32767 32767 32767 32767)) From e5ce801279fb143c6fc38ee1c1c130e24b6ba0cd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 26 Feb 2021 10:49:18 -0800 Subject: [PATCH 336/378] Update interpreter and text with finalized opcodes Opcodes were finalized in #452, this updates the interpreter and spec text to use these final opcodes. --- .../core/appendix/gen-index-instructions.py | 84 +++++++++-------- document/core/appendix/index-instructions.rst | 84 +++++++++-------- document/core/binary/instructions.rst | 86 +++++++++-------- document/core/syntax/instructions.rst | 1 - document/core/util/macros.def | 5 +- interpreter/binary/decode.ml | 94 +++++++++---------- interpreter/binary/encode.ml | 90 +++++++++--------- 7 files changed, 237 insertions(+), 207 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 3094a30e2c..82ae723c4d 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -333,14 +333,6 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), - Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~88', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~89', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~90', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~91', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\STORE\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~92', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~93', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~94', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~95', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), @@ -394,12 +386,6 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I64X2.\VEQ', r'\hex{FD}~~192', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I64X2.\VNE', r'\hex{FD}~~208', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I64X2.\VLT\K{\_s}', r'\hex{FD}~~116', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~122', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~238', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~226', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), @@ -418,13 +404,30 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), - Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~98', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~83', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~84', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~85', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~86', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~87', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\STORE\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~88', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~89', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~90', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~91', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\LOAD\K{32\_zero}~\memarg~\laneidx', r'\hex{FD}~~92', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), + Instruction(r'\V128.\LOAD\K{64\_zero}~\memarg~\laneidx', r'\hex{FD}~~93', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), + Instruction(r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}', r'\hex{FD}~~94', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-demote'), + Instruction(r'\F64X2.\VPROMOTE\K{\_low\_f32x4}', r'\hex{FD}~~95', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-promote'), Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~98', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~102', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\F32X4.\VCEIL', r'\hex{FD}~~103', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), + Instruction(r'\F32X4.\VFLOOR', r'\hex{FD}~~104', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), + Instruction(r'\F32X4.\VTRUNC', r'\hex{FD}~~105', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), + Instruction(r'\F32X4.\VNEAREST', r'\hex{FD}~~106', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~107', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~108', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~109', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), @@ -434,14 +437,21 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~113', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~114', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~115', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\F64X2.\VCEIL', r'\hex{FD}~~116', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), + Instruction(r'\F64X2.\VFLOOR', r'\hex{FD}~~117', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~118', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~119', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\F64X2.\VTRUNC', r'\hex{FD}~~122', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~124', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~124', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~125', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~126', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~127', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~130', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), @@ -459,25 +469,21 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~145', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~146', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~147', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\F64X2.\VNEAREST', r'\hex{FD}~~148', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~149', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~150', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~151', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~156', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~154', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~156', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~159', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~194', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~195', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~165', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~166', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -493,12 +499,13 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~186', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~187', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~188', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~189', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~190', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~191', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\VABS', r'\hex{FD}~~162', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I64X2.\VABS', r'\hex{FD}~~192', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~195', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -508,13 +515,18 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), - Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~207', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~210', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~211', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~214', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~215', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\VEQ', r'\hex{FD}~~214', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I64X2.\VNE', r'\hex{FD}~~215', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I64X2.\VLT\K{\_s}', r'\hex{FD}~~216', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~217', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~218', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~219', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~220', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~221', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~222', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~223', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), @@ -534,19 +546,17 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), - Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), - Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~246', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~246', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), + Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~247', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), - Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~85', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), - Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~86', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), - Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~83', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), - Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_u}', r'\hex{FD}~~84', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), - Instruction(r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}', r'\hex{FD}~~87', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-demote'), - Instruction(r'\F64X2.\VPROMOTE\K{\_low\_f32x4}', r'\hex{FD}~~105', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-promote'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~252', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~253', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~254', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_u}', r'\hex{FD}~~255', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), ] def ColumnWidth(n): diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 0dbff6236d..d4944436f1 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -281,14 +281,6 @@ Instruction Binary Opcode Type :math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~94` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~95` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -342,12 +334,6 @@ Instruction Binary Opcode Type :math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~192` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~208` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~116` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~122` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~238` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~226` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -366,13 +352,30 @@ Instruction Binary Opcode Type :math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~98` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~83` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~84` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~85` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~86` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~87` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~94` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~95` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~98` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~103` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~104` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~105` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~106` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -382,14 +385,21 @@ Instruction Binary Opcode Type :math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~116` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~117` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~122` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~125` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~126` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~127` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~130` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -407,25 +417,21 @@ Instruction Binary Opcode Type :math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~148` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~154` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~194` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~195` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~165` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~166` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -441,12 +447,13 @@ Instruction Binary Opcode Type :math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~186` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~187` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~188` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~162` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~192` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~195` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -456,13 +463,18 @@ Instruction Binary Opcode Type :math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~207` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~210` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~211` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~216` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~217` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~218` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~219` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~220` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~221` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~222` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~223` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -482,17 +494,15 @@ Instruction Binary Opcode Type :math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~247` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~85` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~86` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~83` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~84` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~87` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~105` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~252` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~253` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~254` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~255` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` ================================================= ===================== ============================================= ============================================= ================================================================== diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index 14f1247fc2..dd3429e19f 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -433,17 +433,17 @@ SIMD loads and stores are followed by the encoding of their |memarg| immediate. \hex{FD}~~8{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{16\_splat}~m \\ &&|& \hex{FD}~~9{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32\_splat}~m \\ &&|& \hex{FD}~~10{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{64\_splat}~m \\ &&|& - \hex{FD}~~252{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& - \hex{FD}~~253{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{\_zero}~m \\ &&|& + \hex{FD}~~92{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{32\_zero}~m \\ &&|& + \hex{FD}~~93{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\LOAD\K{64\_zero}~m \\ &&|& \hex{FD}~~11{:}\Bu32~~m{:}\Bmemarg &\Rightarrow& \V128.\STORE~m \\ &&|& - \hex{FD}~~88{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{8\_lane}~m~l \\ &&|& - \hex{FD}~~89{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{16\_lane}~m~l \\ &&|& - \hex{FD}~~90{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{32\_lane}~m~l \\ &&|& - \hex{FD}~~91{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{64\_lane}~m~l \\ &&|& - \hex{FD}~~92{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{8\_lane}~m~l \\ &&|& - \hex{FD}~~93{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{16\_lane}~m~l \\ &&|& - \hex{FD}~~94{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{32\_lane}~m~l \\ &&|& - \hex{FD}~~95{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{64\_lane}~m~l \\ + \hex{FD}~~84{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{8\_lane}~m~l \\ &&|& + \hex{FD}~~85{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{16\_lane}~m~l \\ &&|& + \hex{FD}~~86{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{32\_lane}~m~l \\ &&|& + \hex{FD}~~87{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\LOAD\K{64\_lane}~m~l \\ &&|& + \hex{FD}~~88{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{8\_lane}~m~l \\ &&|& + \hex{FD}~~89{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{16\_lane}~m~l \\ &&|& + \hex{FD}~~90{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{32\_lane}~m~l \\ &&|& + \hex{FD}~~91{:}\Bu32~~m{:}\Bmemarg~l{:}\Blaneidx &\Rightarrow& \V128.\STORE\K{64\_lane}~m~l \\ \end{array} The |VCONST| instruction is followed by 16 immediate bytes, which are converted into a |i128| in |littleendian| byte order: @@ -550,12 +550,12 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& - \hex{FD}~~192{:}\Bu32 &\Rightarrow& \I64X2.\VEQ \\ &&|& - \hex{FD}~~208{:}\Bu32 &\Rightarrow& \I64X2.\VNE \\ &&|& - \hex{FD}~~116{:}\Bu32 &\Rightarrow& \I64X2.\VLT\K{\_s} \\ &&|& - \hex{FD}~~122{:}\Bu32 &\Rightarrow& \I64X2.\VGT\K{\_s} \\ &&|& - \hex{FD}~~238{:}\Bu32 &\Rightarrow& \I64X2.\VLE\K{\_s} \\ &&|& - \hex{FD}~~226{:}\Bu32 &\Rightarrow& \I64X2.\VGE\K{\_s} \\ &&|& + \hex{FD}~~214{:}\Bu32 &\Rightarrow& \I64X2.\VEQ \\ &&|& + \hex{FD}~~215{:}\Bu32 &\Rightarrow& \I64X2.\VNE \\ &&|& + \hex{FD}~~216{:}\Bu32 &\Rightarrow& \I64X2.\VLT\K{\_s} \\ &&|& + \hex{FD}~~217{:}\Bu32 &\Rightarrow& \I64X2.\VGT\K{\_s} \\ &&|& + \hex{FD}~~218{:}\Bu32 &\Rightarrow& \I64X2.\VLE\K{\_s} \\ &&|& + \hex{FD}~~219{:}\Bu32 &\Rightarrow& \I64X2.\VGE\K{\_s} \\ &&|& \end{array} .. _binary-vfrelop: @@ -595,7 +595,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~80{:}\Bu32 &\Rightarrow& \V128.\VOR \\ &&|& \hex{FD}~~81{:}\Bu32 &\Rightarrow& \V128.\VXOR \\ &&|& \hex{FD}~~82{:}\Bu32 &\Rightarrow& \V128.\BITSELECT \\ &&|& - \hex{FD}~~98{:}\Bu32 &\Rightarrow& \V128.\ANYTRUE \\ &&|& + \hex{FD}~~83{:}\Bu32 &\Rightarrow& \V128.\ANYTRUE \\ \end{array} .. _binary-vitestop: @@ -610,6 +610,7 @@ All other SIMD instructions are plain opcodes without any immediates. \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~96{:}\Bu32 &\Rightarrow& \I8X16.\VABS \\ &&|& \hex{FD}~~97{:}\Bu32 &\Rightarrow& \I8X16.\VNEG \\ &&|& + \hex{FD}~~98{:}\Bu32 &\Rightarrow& \I8X16.\VPOPCNT \\ &&|& \hex{FD}~~99{:}\Bu32 &\Rightarrow& \I8X16.\ALLTRUE \\ &&|& \hex{FD}~~100{:}\Bu32 &\Rightarrow& \I8X16.\BITMASK \\ &&|& \hex{FD}~~101{:}\Bu32 &\Rightarrow& \I8X16.\NARROW\K{\_i16x8\_s} \\ &&|& @@ -627,15 +628,17 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~119{:}\Bu32 &\Rightarrow& \I8X16.\VMIN\K{\_u} \\ &&|& \hex{FD}~~120{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_s} \\ &&|& \hex{FD}~~121{:}\Bu32 &\Rightarrow& \I8X16.\VMAX\K{\_u} \\ &&|& - \hex{FD}~~123{:}\Bu32 &\Rightarrow& \I8X16.\AVGR\K{\_u} \\ &&|& - \hex{FD}~~124{:}\Bu32 &\Rightarrow& \I8X16.\VPOPCNT \\ + \hex{FD}~~123{:}\Bu32 &\Rightarrow& \I8X16.\AVGR\K{\_u} \\ \end{array} .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~124{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}\\ &&|& + \hex{FD}~~125{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}\\ &&|& \hex{FD}~~128{:}\Bu32 &\Rightarrow& \I16X8.\VABS \\ &&|& \hex{FD}~~129{:}\Bu32 &\Rightarrow& \I16X8.\VNEG \\ &&|& + \hex{FD}~~130{:}\Bu32 &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s} \\ &&|& \hex{FD}~~131{:}\Bu32 &\Rightarrow& \I16X8.\ALLTRUE \\ &&|& \hex{FD}~~132{:}\Bu32 &\Rightarrow& \I16X8.\BITMASK \\ &&|& \hex{FD}~~133{:}\Bu32 &\Rightarrow& \I16X8.\NARROW\K{\_i32x4\_s} \\ &&|& @@ -659,24 +662,21 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~152{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_s} \\ &&|& \hex{FD}~~153{:}\Bu32 &\Rightarrow& \I16X8.\VMAX\K{\_u} \\ &&|& \hex{FD}~~155{:}\Bu32 &\Rightarrow& \I16X8.\AVGR\K{\_u} \\ &&|& - \hex{FD}~~154{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& - \hex{FD}~~156{:}\Bu32 &\Rightarrow& \I16X8.\Q15MULRSAT\K{\_s} \\ &&|& + \hex{FD}~~156{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_s}\\ &&|& \hex{FD}~~157{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_s}\\ &&|& \hex{FD}~~158{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_low\_i8x16\_u}\\ &&|& - \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ &&|& - \hex{FD}~~194{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}\\ &&|& - \hex{FD}~~195{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}\\ + \hex{FD}~~159{:}\Bu32 &\Rightarrow& \I16X8.\EXTMUL\K{\_high\_i8x16\_u}\\ \end{array} .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~126{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}\\ &&|& + \hex{FD}~~127{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}\\ &&|& \hex{FD}~~160{:}\Bu32 &\Rightarrow& \I32X4.\VABS \\ &&|& \hex{FD}~~161{:}\Bu32 &\Rightarrow& \I32X4.\VNEG \\ &&|& \hex{FD}~~163{:}\Bu32 &\Rightarrow& \I32X4.\ALLTRUE \\ &&|& \hex{FD}~~164{:}\Bu32 &\Rightarrow& \I32X4.\BITMASK \\ &&|& - \hex{FD}~~165{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}\\ &&|& - \hex{FD}~~166{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}\\ &&|& \hex{FD}~~167{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_s} \\ &&|& \hex{FD}~~168{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_high\_i16x8\_s} \\ &&|& \hex{FD}~~169{:}\Bu32 &\Rightarrow& \I32X4.\VEXTEND\K{\_low\_i16x8\_u} \\ &&|& @@ -692,7 +692,7 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~184{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_s} \\ &&|& \hex{FD}~~185{:}\Bu32 &\Rightarrow& \I32X4.\VMAX\K{\_u} \\ &&|& \hex{FD}~~186{:}\Bu32 &\Rightarrow& \I32X4.\DOT\K{\_i16x8\_s}\\ &&|& - \hex{FD}~~187{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& + \hex{FD}~~188{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_s}\\ &&|& \hex{FD}~~189{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_s}\\ &&|& \hex{FD}~~190{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_low\_i16x8\_u}\\ &&|& \hex{FD}~~191{:}\Bu32 &\Rightarrow& \I32X4.\EXTMUL\K{\_high\_i16x8\_u}\\ @@ -701,8 +701,9 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& - \hex{FD}~~162{:}\Bu32 &\Rightarrow& \I64X2.\VABS \\ &&|& + \hex{FD}~~192{:}\Bu32 &\Rightarrow& \I64X2.\VABS \\ &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& + \hex{FD}~~195{:}\Bu32 &\Rightarrow& \I64X2.\ALLTRUE \\ &&|& \hex{FD}~~196{:}\Bu32 &\Rightarrow& \I64X2.\BITMASK \\ &&|& \hex{FD}~~199{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_low\_i32x4\_s} \\ &&|& \hex{FD}~~200{:}\Bu32 &\Rightarrow& \I64X2.\VEXTEND\K{\_high\_i32x4\_s} \\ &&|& @@ -712,13 +713,12 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~204{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_s} \\ &&|& \hex{FD}~~205{:}\Bu32 &\Rightarrow& \I64X2.\VSHR\K{\_u} \\ &&|& \hex{FD}~~206{:}\Bu32 &\Rightarrow& \I64X2.\VADD \\ &&|& - \hex{FD}~~207{:}\Bu32 &\Rightarrow& \I64X2.\ALLTRUE \\ &&|& \hex{FD}~~209{:}\Bu32 &\Rightarrow& \I64X2.\VSUB \\ &&|& \hex{FD}~~213{:}\Bu32 &\Rightarrow& \I64X2.\VMUL \\ &&|& - \hex{FD}~~210{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_s}\\ &&|& - \hex{FD}~~211{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_s}\\ &&|& - \hex{FD}~~214{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_u}\\ &&|& - \hex{FD}~~215{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_u}\\ + \hex{FD}~~220{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_s}\\ &&|& + \hex{FD}~~221{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_s}\\ &&|& + \hex{FD}~~222{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_low\_i32x4\_u}\\ &&|& + \hex{FD}~~223{:}\Bu32 &\Rightarrow& \I64X2.\EXTMUL\K{\_high\_i32x4\_u}\\ \end{array} .. _binary-vfunop: @@ -727,6 +727,10 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~103{:}\Bu32 &\Rightarrow& \F32X4.\VCEIL \\ &&|& + \hex{FD}~~104{:}\Bu32 &\Rightarrow& \F32X4.\VFLOOR \\ &&|& + \hex{FD}~~105{:}\Bu32 &\Rightarrow& \F32X4.\VTRUNC \\ &&|& + \hex{FD}~~106{:}\Bu32 &\Rightarrow& \F32X4.\VNEAREST \\ &&|& \hex{FD}~~224{:}\Bu32 &\Rightarrow& \F32X4.\VABS \\ &&|& \hex{FD}~~225{:}\Bu32 &\Rightarrow& \F32X4.\VNEG \\ &&|& \hex{FD}~~227{:}\Bu32 &\Rightarrow& \F32X4.\VSQRT \\ &&|& @@ -743,6 +747,10 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \hex{FD}~~116{:}\Bu32 &\Rightarrow& \F64X2.\VCEIL \\ &&|& + \hex{FD}~~117{:}\Bu32 &\Rightarrow& \F64X2.\VFLOOR \\ &&|& + \hex{FD}~~122{:}\Bu32 &\Rightarrow& \F64X2.\VTRUNC \\ &&|& + \hex{FD}~~148{:}\Bu32 &\Rightarrow& \F64X2.\VNEAREST \\ &&|& \hex{FD}~~236{:}\Bu32 &\Rightarrow& \F64X2.\VABS \\ &&|& \hex{FD}~~237{:}\Bu32 &\Rightarrow& \F64X2.\VNEG \\ &&|& \hex{FD}~~239{:}\Bu32 &\Rightarrow& \F64X2.\VSQRT \\ &&|& @@ -763,12 +771,12 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~249{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u} \\ &&|& \hex{FD}~~250{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s} \\ &&|& \hex{FD}~~251{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_u} \\ &&|& - \hex{FD}~~85{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}\\ &&|& - \hex{FD}~~86{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}\\ &&|& - \hex{FD}~~83{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_s}\\ &&|& - \hex{FD}~~84{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_u}\\ &&|& - \hex{FD}~~87{:}\Bu32 &\Rightarrow& \F32X4.\VDEMOTE\K{\_f64x2\_zero}\\ &&|& - \hex{FD}~~105{:}\Bu32 &\Rightarrow& \F64X2.\VPROMOTE\K{\_low\_f32x4}\\ + \hex{FD}~~252{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}\\ &&|& + \hex{FD}~~253{:}\Bu32 &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}\\ &&|& + \hex{FD}~~254{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_s}\\ &&|& + \hex{FD}~~255{:}\Bu32 &\Rightarrow& \F64X2.\VCONVERT\K{\_low\_i32x4\_u}\\ &&|& + \hex{FD}~~94{:}\Bu32 &\Rightarrow& \F32X4.\VDEMOTE\K{\_f64x2\_zero}\\ &&|& + \hex{FD}~~95{:}\Bu32 &\Rightarrow& \F64X2.\VPROMOTE\K{\_low\_f32x4}\\ \end{array} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 67391aacc4..3c10a990fb 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -377,7 +377,6 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vbinop: .. _syntax-vcvtop: .. _syntax-vextmul: -.. _syntax-vcvtop: Conventions ........... diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 2c056bf1ec..a5add33728 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -407,6 +407,10 @@ .. |VGE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ge}} .. |VABS| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{abs}} .. |VNEG| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{neg}} +.. |VCEIL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ceil}} +.. |VFLOOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{floor}} +.. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} +.. |VNEAREST| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{nearest}} .. |VPOPCNT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{popcnt}} .. |ANYTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{any\_true}} .. |ALLTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{all\_true}} @@ -427,7 +431,6 @@ .. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} .. |DOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{dot}} .. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} -.. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} .. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} .. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}} .. |EXTADDPAIRWISE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extadd\_pairwise}} diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 9a7d2f5e61..4678ff4b71 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -304,70 +304,78 @@ let simd_prefix s = | 0x50l -> v128_or | 0x51l -> v128_xor | 0x52l -> v128_bitselect - | 0x53l -> f64x2_convert_low_i32x4_s - | 0x54l -> f64x2_convert_low_i32x4_u - | 0x55l -> i32x4_trunc_sat_f64x2_s_zero - | 0x56l -> i32x4_trunc_sat_f64x2_u_zero - | 0x57l -> f32x4_demote_f64x2_zero - | 0x58l -> + | 0x53l -> v128_any_true + | 0x54l -> let a, o = memop s in let lane = u8 s in v128_load8_lane a o lane - | 0x59l -> + | 0x55l -> let a, o = memop s in let lane = u8 s in v128_load16_lane a o lane - | 0x5al -> + | 0x56l -> let a, o = memop s in let lane = u8 s in v128_load32_lane a o lane - | 0x5bl -> + | 0x57l -> let a, o = memop s in let lane = u8 s in v128_load64_lane a o lane - | 0x5cl -> + | 0x58l -> let a, o = memop s in let lane = u8 s in v128_store8_lane a o lane - | 0x5dl -> + | 0x59l -> let a, o = memop s in let lane = u8 s in v128_store16_lane a o lane - | 0x5el -> + | 0x5al -> let a, o = memop s in let lane = u8 s in v128_store32_lane a o lane - | 0x5fl -> + | 0x5bl -> let a, o = memop s in let lane = u8 s in v128_store64_lane a o lane + | 0x5cl -> let a, o = memop s in v128_load32_zero a o + | 0x5dl -> let a, o = memop s in v128_load64_zero a o + | 0x5el -> f32x4_demote_f64x2_zero + | 0x5fl -> f64x2_promote_low_f32x4 | 0x60l -> i8x16_abs | 0x61l -> i8x16_neg - | 0x62l -> v128_any_true + | 0x62l -> i8x16_popcnt | 0x63l -> i8x16_all_true | 0x64l -> i8x16_bitmask + | 0x65l -> i8x16_narrow_i16x8_s + | 0x66l -> i8x16_narrow_i16x8_u + | 0x67l -> f32x4_ceil + | 0x68l -> f32x4_floor + | 0x69l -> f32x4_trunc + | 0x6al -> f32x4_nearest | 0x6bl -> i8x16_shl | 0x6cl -> i8x16_shr_s | 0x6dl -> i8x16_shr_u - | 0x65l -> i8x16_narrow_i16x8_s - | 0x66l -> i8x16_narrow_i16x8_u - | 0x69l -> f64x2_promote_low_f32x4 | 0x6el -> i8x16_add | 0x6fl -> i8x16_add_sat_s | 0x70l -> i8x16_add_sat_u | 0x71l -> i8x16_sub | 0x72l -> i8x16_sub_sat_s | 0x73l -> i8x16_sub_sat_u - | 0x74l -> i64x2_lt_s + | 0x74l -> f64x2_ceil + | 0x75l -> f64x2_floor | 0x76l -> i8x16_min_s | 0x77l -> i8x16_min_u | 0x78l -> i8x16_max_s | 0x79l -> i8x16_max_u - | 0x7al -> i64x2_gt_s + | 0x7al -> f64x2_trunc | 0x7bl -> i8x16_avgr_u - | 0x7cl -> i8x16_popcnt + | 0x7cl -> i16x8_extadd_pairwise_i8x16_s + | 0x7dl -> i16x8_extadd_pairwise_i8x16_u + | 0x7el -> i32x4_extadd_pairwise_i16x8_s + | 0x7fl -> i32x4_extadd_pairwise_i16x8_u | 0x80l -> i16x8_abs | 0x81l -> i16x8_neg + | 0x82l -> i16x8_q15mulr_sat_s | 0x83l -> i16x8_all_true | 0x84l -> i16x8_bitmask | 0x85l -> i16x8_narrow_i32x4_s @@ -385,24 +393,21 @@ let simd_prefix s = | 0x91l -> i16x8_sub | 0x92l -> i16x8_sub_sat_s | 0x93l -> i16x8_sub_sat_u + | 0x94l -> f64x2_nearest | 0x95l -> i16x8_mul | 0x96l -> i16x8_min_s | 0x97l -> i16x8_min_u | 0x98l -> i16x8_max_s | 0x99l -> i16x8_max_u - | 0x9al -> i16x8_extmul_low_i8x16_s | 0x9bl -> i16x8_avgr_u - | 0x9cl -> i16x8_q15mulr_sat_s + | 0x9cl -> i16x8_extmul_low_i8x16_s | 0x9dl -> i16x8_extmul_high_i8x16_s | 0x9el -> i16x8_extmul_low_i8x16_u | 0x9fl -> i16x8_extmul_high_i8x16_u | 0xa0l -> i32x4_abs | 0xa1l -> i32x4_neg - | 0xa2l -> i64x2_abs | 0xa3l -> i32x4_all_true | 0xa4l -> i32x4_bitmask - | 0xa5l -> i32x4_extadd_pairwise_i16x8_s - | 0xa6l -> i32x4_extadd_pairwise_i16x8_u | 0xa7l -> i32x4_extend_low_i16x8_s | 0xa8l -> i32x4_extend_high_i16x8_s | 0xa9l -> i32x4_extend_low_i16x8_u @@ -418,14 +423,13 @@ let simd_prefix s = | 0xb8l -> i32x4_max_s | 0xb9l -> i32x4_max_u | 0xbal -> i32x4_dot_i16x8_s - | 0xbbl -> i32x4_extmul_low_i16x8_s + | 0xbcl -> i32x4_extmul_low_i16x8_s | 0xbdl -> i32x4_extmul_high_i16x8_s | 0xbel -> i32x4_extmul_low_i16x8_u | 0xbfl -> i32x4_extmul_high_i16x8_u - | 0xc0l -> i64x2_eq + | 0xc0l -> i64x2_abs | 0xc1l -> i64x2_neg - | 0xc2l -> i16x8_extadd_pairwise_i8x16_s - | 0xc3l -> i16x8_extadd_pairwise_i8x16_u + | 0xc3l -> i64x2_all_true | 0xc4l -> i64x2_bitmask | 0xc7l -> i64x2_extend_low_i32x4_s | 0xc8l -> i64x2_extend_high_i32x4_s @@ -435,25 +439,20 @@ let simd_prefix s = | 0xccl -> i64x2_shr_s | 0xcdl -> i64x2_shr_u | 0xcel -> i64x2_add - | 0xcfl -> i64x2_all_true - | 0xd0l -> i64x2_ne | 0xd1l -> i64x2_sub - | 0xd2l -> i64x2_extmul_low_i32x4_s - | 0xd3l -> i64x2_extmul_high_i32x4_s - | 0xd6l -> i64x2_extmul_low_i32x4_u - | 0xd7l -> i64x2_extmul_high_i32x4_u | 0xd5l -> i64x2_mul - | 0xd8l -> f32x4_ceil - | 0xd9l -> f32x4_floor - | 0xdal -> f32x4_trunc - | 0xdbl -> f32x4_nearest - | 0xdcl -> f64x2_ceil - | 0xddl -> f64x2_floor - | 0xdel -> f64x2_trunc - | 0xdfl -> f64x2_nearest + | 0xd6l -> i64x2_eq + | 0xd7l -> i64x2_ne + | 0xd8l -> i64x2_lt_s + | 0xd9l -> i64x2_gt_s + | 0xdal -> i64x2_le_s + | 0xdbl -> i64x2_ge_s + | 0xdcl -> i64x2_extmul_low_i32x4_s + | 0xddl -> i64x2_extmul_high_i32x4_s + | 0xdel -> i64x2_extmul_low_i32x4_u + | 0xdfl -> i64x2_extmul_high_i32x4_u | 0xe0l -> f32x4_abs | 0xe1l -> f32x4_neg - | 0xe2l -> i64x2_ge_s | 0xe3l -> f32x4_sqrt | 0xe4l -> f32x4_add | 0xe5l -> f32x4_sub @@ -465,7 +464,6 @@ let simd_prefix s = | 0xebl -> f32x4_pmax | 0xecl -> f64x2_abs | 0xedl -> f64x2_neg - | 0xeel -> i64x2_le_s | 0xefl -> f64x2_sqrt | 0xf0l -> f64x2_add | 0xf1l -> f64x2_sub @@ -479,8 +477,10 @@ let simd_prefix s = | 0xf9l -> i32x4_trunc_sat_f32x4_u | 0xfal -> f32x4_convert_i32x4_s | 0xfbl -> f32x4_convert_i32x4_u - | 0xfcl -> let a, o = memop s in v128_load32_zero a o - | 0xfdl -> let a, o = memop s in v128_load64_zero a o + | 0xfcl -> i32x4_trunc_sat_f64x2_s_zero + | 0xfdl -> i32x4_trunc_sat_f64x2_u_zero + | 0xfel -> f64x2_convert_low_i32x4_s + | 0xffl -> f64x2_convert_low_i32x4_u | n -> illegal s pos (I32.to_int_u n) let rec instr s = diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 926ccc0c19..cc0284e048 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -221,18 +221,18 @@ let encode m = | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> simd_op 0x0al; memop mo | SimdLoad ({ty= V128Type; sz = Some (Pack32, PackZero); _} as mo) -> - simd_op 0xfcl; memop mo + simd_op 0x5cl; memop mo | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackZero); _} as mo) -> - simd_op 0xfdl; memop mo + simd_op 0x5dl; memop mo | SimdLoadLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> - simd_op 0x58l; memop mo; u8 i; + simd_op 0x54l; memop mo; u8 i; | SimdLoadLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> - simd_op 0x59l; memop mo; u8 i; + simd_op 0x55l; memop mo; u8 i; | SimdLoadLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> - simd_op 0x5al; memop mo; u8 i; + simd_op 0x56l; memop mo; u8 i; | SimdLoadLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> - simd_op 0x5bl; memop mo; u8 i; + simd_op 0x57l; memop mo; u8 i; | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo @@ -249,13 +249,13 @@ let encode m = | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo | SimdStoreLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> - simd_op 0x5cl; memop mo; u8 i; + simd_op 0x58l; memop mo; u8 i; | SimdStoreLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> - simd_op 0x5dl; memop mo; u8 i; + simd_op 0x59l; memop mo; u8 i; | SimdStoreLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> - simd_op 0x5el; memop mo; u8 i; + simd_op 0x5al; memop mo; u8 i; | SimdStoreLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> - simd_op 0x5fl; memop mo; u8 i; + simd_op 0x5bl; memop mo; u8 i; | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -270,11 +270,11 @@ let encode m = | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false - | Test (V128 V128Op.(V128 AnyTrue)) -> simd_op 0x62l + | Test (V128 V128Op.(V128 AnyTrue)) -> simd_op 0x53l | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l - | Test (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xcfl + | Test (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 @@ -347,37 +347,37 @@ let encode m = | Unary (V128 V128Op.(V128 Not)) -> simd_op 0x4dl | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l - | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x7cl + | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l | Unary (V128 V128Op.(I16x8 ExtendLowS)) -> simd_op 0x87l | Unary (V128 V128Op.(I16x8 ExtendHighS)) -> simd_op 0x88l | Unary (V128 V128Op.(I16x8 ExtendLowU)) -> simd_op 0x89l | Unary (V128 V128Op.(I16x8 ExtendHighU)) -> simd_op 0x8al - | Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0xc2l - | Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0xc3l + | Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0x7cl + | Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0x7dl | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l | Unary (V128 V128Op.(I32x4 ExtendLowS)) -> simd_op 0xa7l | Unary (V128 V128Op.(I32x4 ExtendHighS)) -> simd_op 0xa8l | Unary (V128 V128Op.(I32x4 ExtendLowU)) -> simd_op 0xa9l | Unary (V128 V128Op.(I32x4 ExtendHighU)) -> simd_op 0xaal - | Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0xa5l - | Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0xa6l - | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xa2l + | Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0x7el + | Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0x7fl + | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xc0l | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l | Unary (V128 V128Op.(I64x2 ExtendLowS)) -> simd_op 0xc7l | Unary (V128 V128Op.(I64x2 ExtendHighS)) -> simd_op 0xc8l | Unary (V128 V128Op.(I64x2 ExtendLowU)) -> simd_op 0xc9l | Unary (V128 V128Op.(I64x2 ExtendHighU)) -> simd_op 0xcal - | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0xd8l - | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0xd9l - | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0xdal - | Unary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0xdbl - | Unary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0xdcl - | Unary (V128 V128Op.(F64x2 Floor)) -> simd_op 0xddl - | Unary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0xdel - | Unary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0xdfl + | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0x67l + | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0x68l + | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0x69l + | Unary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0x6al + | Unary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0x74l + | Unary (V128 V128Op.(F64x2 Floor)) -> simd_op 0x75l + | Unary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0x7al + | Unary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0x94l | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l | Unary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l @@ -386,14 +386,14 @@ let encode m = | Unary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl | Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l | Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l - | Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0x55l - | Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0x56l + | Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0xfcl + | Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0xfdl | Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl - | Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x57l - | Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x69l - | Unary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0x53l - | Unary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0x54l + | Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x5el + | Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x5fl + | Unary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0xfel + | Unary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0xffl | Unary (V128 _) -> failwith "unimplemented V128 Unary op" | Binary (I32 I32Op.Add) -> op 0x6a @@ -493,11 +493,11 @@ let encode m = | Binary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l | Binary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l | Binary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl - | Binary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9al + | Binary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9cl | Binary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl | Binary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el | Binary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl - | Binary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x9cl + | Binary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x82l | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l | Binary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l @@ -516,23 +516,23 @@ let encode m = | Binary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el | Binary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl | Binary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l - | Binary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbbl + | Binary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbcl | Binary (V128 V128Op.(I32x4 ExtMulHighS)) -> simd_op 0xbdl | Binary (V128 V128Op.(I32x4 ExtMulLowU)) -> simd_op 0xbel | Binary (V128 V128Op.(I32x4 ExtMulHighU)) -> simd_op 0xbfl | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l - | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xc0l - | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd0l - | Binary (V128 V128Op.(I64x2 LtS)) -> simd_op 0x74l - | Binary (V128 V128Op.(I64x2 GtS)) -> simd_op 0x7al - | Binary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xeel - | Binary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xe2l - | Binary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xd2l - | Binary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xd3l - | Binary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xd6l - | Binary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xd7l + | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xd6l + | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd7l + | Binary (V128 V128Op.(I64x2 LtS)) -> simd_op 0xd8l + | Binary (V128 V128Op.(I64x2 GtS)) -> simd_op 0xd9l + | Binary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xdal + | Binary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xdbl + | Binary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xdcl + | Binary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xddl + | Binary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xdel + | Binary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xdfl | Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l | Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l | Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l From 5c9aeed38b174b7b4872db2242934a45128247e2 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Thu, 4 Mar 2021 17:37:06 -0800 Subject: [PATCH 337/378] Fix a typo in the f64x2.{pmin,pmax} binary spec It looks like these have a typo in copying them over from `BinarySIMD.md` --- document/core/binary/instructions.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index dd3429e19f..036b0d985d 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -69,7 +69,7 @@ Control Instructions The |ELSE| opcode :math:`\hex{05}` in the encoding of an |IF| instruction can be omitted if the following instruction sequence is empty. Unlike any :ref:`other occurrence `, the :ref:`type index ` in a :ref:`block type ` is encoded as a positive :ref:`signed integer `, so that its |SignedLEB128| bit pattern cannot collide with the encoding of :ref:`value types ` or the special code :math:`\hex{40}`, which correspond to the LEB128 encoding of negative integers. - To avoid any loss in the range of allowed indices, it is treated as a 33 bit signed integer. + To avoid any loss in the range of allowed indices, it is treated as a 33 bit signed integer. In future versions of WebAssembly, the zero byte occurring in the encoding of the |CALLINDIRECT| instruction may be used to index additional tables. @@ -760,8 +760,8 @@ All other SIMD instructions are plain opcodes without any immediates. \hex{FD}~~243{:}\Bu32 &\Rightarrow& \F64X2.\VDIV \\ &&|& \hex{FD}~~244{:}\Bu32 &\Rightarrow& \F64X2.\VMIN \\ &&|& \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VMAX \\ &&|& - \hex{FD}~~245{:}\Bu32 &\Rightarrow& \F64X2.\VPMIN \\ &&|& - \hex{FD}~~246{:}\Bu32 &\Rightarrow& \F64X2.\VPMAX \\ + \hex{FD}~~246{:}\Bu32 &\Rightarrow& \F64X2.\VPMIN \\ &&|& + \hex{FD}~~247{:}\Bu32 &\Rightarrow& \F64X2.\VPMAX \\ \end{array} .. math:: From 466ca5a6bd62832fb469ac565c23038e6d062aec Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Mar 2021 17:43:48 -0800 Subject: [PATCH 338/378] Fix instructions in gen-index-instructions - i8x16.shuffle has wrong signature - i16x8.replace_lane has a typo in signature - i16x8.narrow has wrong instruction names - sqrt has wrong signature --- document/core/appendix/gen-index-instructions.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 82ae723c4d..b7417baf56 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -334,7 +334,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), - Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), + Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~15', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~16', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), @@ -347,7 +347,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~23', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~24', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~25', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128 \I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~27', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~28', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~29', r'[\V128] \to [\I64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), @@ -454,8 +454,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~130', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I16X8.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -529,7 +529,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~223', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), - Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), Instruction(r'\F32X4.\VADD', r'\hex{FD}~~228', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~229', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~230', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), @@ -540,7 +540,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F32X4.\VPMAX', r'\hex{FD}~~235', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), - Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\I32]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), Instruction(r'\F64X2.\VADD', r'\hex{FD}~~240', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~241', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), From 6b8204b6a1713b62455847b157b41997c264ce9c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 10 Mar 2021 10:00:06 -0800 Subject: [PATCH 339/378] Check in fixed generated index-instructions.rst Fixed the script in 466ca5a6bd62832fb469ac565c23038e6d062aec but forgot to check in the generated output. --- document/core/appendix/index-instructions.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index d4944436f1..c86d4f7f88 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -282,7 +282,7 @@ Instruction Binary Opcode Type :math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` :math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -295,7 +295,7 @@ Instruction Binary Opcode Type :math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128 \I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` @@ -402,8 +402,8 @@ Instruction Binary Opcode Type :math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~130` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -477,7 +477,7 @@ Instruction Binary Opcode Type :math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~223` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -488,7 +488,7 @@ Instruction Binary Opcode Type :math:`\F32X4.\VPMAX` :math:`\hex{FD}~~235` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` From 22bd78dd07bf8e97217f6bb9ef423d9e2956f11b Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Mar 2021 11:15:50 -0800 Subject: [PATCH 340/378] Comparison instructions should return -1 in lanes (#493) SIMD comparisons return -1 (all bits set) in the lanes. Currently as specified, they return 1 (since we use the numeric comparison). We fix this by extracting these instructions (virelop and vfrelop) into vrelop, and in the execution, sign extend them from i1 to iX (which treats the 1-bit integer "1" as -1). Drive-by fix for exec-vbinop, some typos in the execution semantics. Fixed #441. --- document/core/exec/instructions.rst | 37 ++++++++++++++++++++++++--- document/core/syntax/instructions.rst | 4 ++- document/core/util/macros.def | 1 + document/core/valid/instructions.rst | 14 ++++++++++ 4 files changed, 52 insertions(+), 4 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index f5b4dfaedc..d557e9f32b 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -494,7 +494,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane :math:`\shape\K{.}\vbinop` .......................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -512,13 +512,44 @@ SIMD instructions are defined in terms of generic numeric operators applied lane .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vbinop &\stepto& (\V128\K{.}\VCONST~c) + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\shape\K{.}\vbinop &\stepto& (\V128\K{.}\VCONST~c) & (\iff c \in \vbinop_{\shape}(c_1, c_2)) \\ - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vbinop &\stepto& \TRAP + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\shape\K{.}\vbinop &\stepto& \TRAP & (\iff \vbinop_{\shape}(c_1, c_2) = \{\}) \end{array} +.. _exec-vrelop: + +:math:`t\K{x}N\K{.}\vrelop` +........................... + +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. + +3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +4. Let :math:`i^\ast` be the sequence :math:`\lanes_{t\K{x}N}(c_1)`. + +5. Let :math:`j^\ast` be the sequence :math:`\lanes_{t\K{x}N}(c_2)`. + +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t\K{x}N}(\extends_{1,|t|}(\vrelop_t(i^\ast, j^\ast)))`. + +7. Push the value :math:`\V128.\VCONST~c` to the stack. + +.. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t\K{x}N\K{.}\vrelop &\stepto& (\V128\K{.}\VCONST~c) + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff c = \lanes^{-1}_{t\K{x}N}(\extends_{1,|t|}(\vrelop_t(\lanes_{t\K{x}N}(c_1), \lanes_{t\K{x}N}(c_2))))) + \end{array} + \end{array} + + .. _exec-vshiftop: :math:`t\K{x}N\K{.}\vshiftop` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 3c10a990fb..0502d5a76a 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -375,6 +375,7 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vunop: .. _syntax-vbinop: +.. _syntax-vrelop: .. _syntax-vcvtop: .. _syntax-vextmul: @@ -391,12 +392,13 @@ Occasionally, it is convenient to group operators together according to the foll \VPOPCNT \\ \production{binary operator} & \vbinop &::=& \vibinop ~|~ \vfbinop \\&&|& - \virelop ~|~ \vfrelop \\&&|& \viminmaxop ~|~ \visatbinop \\&&|& \SWIZZLE ~|~ \VMUL ~|~ \AVGR\K{\_u} ~|~ \Q15MULRSAT\K{\_s} \\ + \production{simd relational operator} & \vrelop &::=& + \virelop ~|~ \vfrelop \\ \production{conversion operator} & \vcvtop &::=& \VTRUNC\K{\_sat} ~|~ \VEXTEND ~|~ diff --git a/document/core/util/macros.def b/document/core/util/macros.def index a5add33728..c2790dddb0 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -462,6 +462,7 @@ .. |vunop| mathdef:: \xref{syntax/instructions}{syntax-vunop}{\X{vunop}} .. |vbinop| mathdef:: \xref{syntax/instructions}{syntax-vbinop}{\X{vbinop}} +.. |vrelop| mathdef:: \xref{syntax/instructions}{syntax-vrelop}{\X{vrelop}} .. |vternop| mathdef:: \xref{syntax/instructions}{syntax-vternop}{\X{vternop}} .. |vcvtop| mathdef:: \xref{syntax/instructions}{syntax-vcvtop}{\X{vcvtop}} .. |vextmul| mathdef:: \xref{syntax/instructions}{syntax-vextmul}{\X{vextmul}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 69dd9f7bee..84cfa228a6 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -351,6 +351,20 @@ We also define an auxiliary function to get number of packed numeric types in a } +.. _valid-vrelop: + +:math:`\shape\K{.}\vrelop` +.......................... + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \shape\K{.}\vrelop : [\V128~\V128] \to [\V128] + } + + .. _valid-vternop: :math:`\shape\K{.}\vternop` From 2c59b1d401197b3ba2ddfd35b0cd765d642989f5 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Mar 2021 12:53:48 -0800 Subject: [PATCH 341/378] Fix usages of \extend in SIMD instructions (#494) \extend takes the bitwidth of type, but we have been passing the number of lanes, i.e. for i64x2, we should be passing 64, not 2. --- document/core/exec/instructions.rst | 36 ++++++++++++++--------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index d557e9f32b..f59c029aa0 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -650,11 +650,11 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. -4. Let :math:`d_2^M` be the result of computing :math:`\narrow^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_2))`. +4. Let :math:`d_2^M` be the result of computing :math:`\narrow^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_2))`. 5. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -6. Let :math:`d_1^M` be the result of computing :math:`\narrow^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))`. +6. Let :math:`d_1^M` be the result of computing :math:`\narrow^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))`. 7. Let :math:`c` be the result of :math:`\lanes^{-1}_{t_2\K{x}N}(d_1^M~d_2^M)`. @@ -667,8 +667,8 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & d_1^M = \narrow^{\sx}_{M,N}( \lanes_{t_1\K{x}M}(c_1)) \\ - \wedge & d_2^M = \narrow^{\sx}_{M,N}( \lanes_{t_1\K{x}M}(c_2)) \\ + (\iff & d_1^M = \narrow^{\sx}_{|t_1|,|t_2|}( \lanes_{t_1\K{x}M}(c_1)) \\ + \wedge & d_2^M = \narrow^{\sx}_{|t_1|,|t_2|}( \lanes_{t_1\K{x}M}(c_2)) \\ \wedge & c = \lanes^{-1}_{t_2\K{x}N}(d_1^M~d_2^M) \end{array} \end{array} @@ -685,7 +685,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(i^\ast))` +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(i^\ast))` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -696,7 +696,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))) \end{array} \end{array} @@ -716,7 +716,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. -5. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(i^\ast))` +5. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast))` 6. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -727,7 +727,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(\lanes_{t_1\K{x}M}(c_1)[0 \slice N])) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[0 \slice N])) \end{array} \\[1ex] \begin{array}{lcl@{\qquad}l} @@ -735,7 +735,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(\lanes_{t_1\K{x}M}(c_1)[N \slice N])) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[N \slice N])) \end{array} \end{array} @@ -749,7 +749,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{M,N}(i^\ast)~0^M)` +4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast)~0^M)` 5. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -760,7 +760,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))~0^N) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))~0^N) \end{array} \end{array} @@ -776,7 +776,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -4. Let :math:`(i_1~i_2)^\ast` be the result of computing :math:`\imul_{32}(\extend^s_{16,32}(\lanes_{\I16X8}(c_1)), \extend^s_{16,32}(\lanes_{\I16X8}(c_2)))` +4. Let :math:`(i_1~i_2)^\ast` be the result of computing :math:`\imul_{32}(\extends_{16,32}(\lanes_{\I16X8}(c_1)), \extends_{16,32}(\lanes_{\I16X8}(c_2)))` 5. Let :math:`j^\ast` be the result of computing :math:`\iadd_{32}(i_1, i_2)^\ast`. @@ -791,7 +791,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & (i_1~i_2)^\ast = \imul_{32}(\extend^s_{16,32}(\lanes_{\I16X8}(c_1)), \extend^s_{16,32}(\lanes_{\I16X8}(c_2))) \\ + (\iff & (i_1~i_2)^\ast = \imul_{32}(\extends_{16,32}(\lanes_{\I16X8}(c_1)), \extends_{16,32}(\lanes_{\I16X8}(c_2))) \\ \wedge & j^\ast = \iadd_{32}(i_1, i_2)^\ast \\ \wedge & c = \lanes^{-1}_{\I32X4}(j^\ast) \end{array} @@ -821,7 +821,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane b. Let :math:`j^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_2)[N \slice N]`. -6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast)))` +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast)))` 8. Push the value :math:`\V128.\VCONST~c` onto the stack. @@ -834,7 +834,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \begin{array}[t]{@{}r@{~}l@{}} (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[0 \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast))) + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast))) \end{array} \\[1ex] \begin{array}{lcl@{\qquad}l} @@ -844,7 +844,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \begin{array}[t]{@{}r@{~}l@{}} (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[N \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{M,N}(i^\ast), \extend^{\sx}_{M,N}(j^\ast))) + \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast))) \end{array} \end{array} @@ -858,7 +858,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`(i_1~i_2)^\ast` be the sequence :math:`\extend^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1))`. +3. Let :math:`(i_1~i_2)^\ast` be the sequence :math:`\extend^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))`. 4. Let :math:`j^\ast` be the result of computing :math:`\iadd_{N}(i_1, i_2)^\ast`. @@ -873,7 +873,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & (i_1~i_2)^\ast = \extend^{\sx}_{M,N}(\lanes_{t_1\K{x}M}(c_1)) \\ + (\iff & (i_1~i_2)^\ast = \extend^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)) \\ \wedge & j^\ast = \iadd_{N}(i_1, i_2)^\ast \\ \wedge & c = \lanes^{-1}_{t_2\K{x}N}(j^\ast) \end{array} From 510b652f10074c14eb1a38a21fadc99aeea9abf8 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 12 Mar 2021 11:05:02 -0800 Subject: [PATCH 342/378] Fix SIMD implementation get tests passing Mostly fixes to add Num due to the num_type v.s. value_type change in ref types proposal. Moved some code from Eval_numeric into Values to avoid circular imports: - eval_numeric imports eval_simd - both needs the I32Num and TypeError --- interpreter/binary/encode.ml | 35 +++++-- interpreter/exec/eval.ml | 52 +++++----- interpreter/exec/eval_numeric.ml | 40 -------- interpreter/exec/eval_numeric.mli | 2 - interpreter/exec/eval_simd.ml | 155 ++++++++++++++---------------- interpreter/exec/eval_simd.mli | 22 ++--- interpreter/runtime/memory.ml | 33 ++++--- interpreter/runtime/memory.mli | 2 +- interpreter/script/js.ml | 56 ++++++----- interpreter/script/run.ml | 56 +++++------ interpreter/script/script.ml | 2 +- interpreter/syntax/free.ml | 3 + interpreter/syntax/values.ml | 47 +++++++++ interpreter/text/arrange.ml | 10 +- interpreter/text/parser.mly | 33 ++++--- interpreter/valid/valid.ml | 19 ++-- 16 files changed, 296 insertions(+), 271 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index bc26ca9376..d1501d96bc 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -134,6 +134,7 @@ struct open Values let op n = u8 n + let simd_op n = op 0xfd; vu32 n let end_ () = op 0x0b let memop {align; offset; _} = vu32 (Int32.of_int align); vu32 offset @@ -211,6 +212,10 @@ struct op 0x35; memop mo | Load {ty = F32Type | F64Type; sz = Some _; _} -> assert false + | Load {ty = I32Type | I64Type; sz = Some (Pack64, _); _} -> + assert false + | Load {ty = V128Type; _} -> + assert false | SimdLoad ({ty = V128Type; sz = None; _} as mo) -> simd_op 0x00l; memop mo @@ -226,18 +231,19 @@ struct simd_op 0x05l; memop mo | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack32x2 ZX); _} as mo) -> simd_op 0x06l; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack8, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack8, PackSplat); _} as mo) -> simd_op 0x07l; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack16, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack16, PackSplat); _} as mo) -> simd_op 0x08l; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack32, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack32, PackSplat); _} as mo) -> simd_op 0x09l; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> simd_op 0x0al; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack32, PackZero); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack32, PackZero); _} as mo) -> simd_op 0x5cl; memop mo - | SimdLoad ({ty= V128Type; sz = Some (Pack64, PackZero); _} as mo) -> + | SimdLoad ({ty = V128Type; sz = Some (Pack64, PackZero); _} as mo) -> simd_op 0x5dl; memop mo + | SimdLoad _ -> assert false | SimdLoadLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> simd_op 0x54l; memop mo; u8 i; @@ -247,6 +253,7 @@ struct simd_op 0x56l; memop mo; u8 i; | SimdLoadLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> simd_op 0x57l; memop mo; u8 i; + | SimdLoadLane _ -> assert false | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo @@ -259,8 +266,11 @@ struct | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false + | Store {ty = (I32Type | I64Type); sz = Some Pack64; _} -> assert false + | Store {ty = V128Type; _} -> assert false | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo + | SimdStore {ty = (I32Type | I64Type | F32Type | F64Type); _} -> assert false | SimdStoreLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> simd_op 0x58l; memop mo; u8 i; @@ -270,6 +280,7 @@ struct simd_op 0x5al; memop mo; u8 i; | SimdStoreLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> simd_op 0x5bl; memop mo; u8 i; + | SimdStoreLane _ -> assert false | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -292,6 +303,13 @@ struct | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false + | Test (V128 V128Op.(V128 AnyTrue)) -> simd_op 0x53l + | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l + | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l + | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l + | Test (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l + | Test (V128 V128Op.(V128 AllTrue)) -> assert false + | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 | Compare (I32 I32Op.Ne) -> op 0x47 @@ -329,12 +347,15 @@ struct | Compare (F64 F64Op.Le) -> op 0x65 | Compare (F64 F64Op.Ge) -> op 0x66 + | Compare (V128 _) -> assert false + | Unary (I32 I32Op.Clz) -> op 0x67 | Unary (I32 I32Op.Ctz) -> op 0x68 | Unary (I32 I32Op.Popcnt) -> op 0x69 | Unary (I32 (I32Op.ExtendS Pack8)) -> op 0xc0 | Unary (I32 (I32Op.ExtendS Pack16)) -> op 0xc1 | Unary (I32 (I32Op.ExtendS Pack32)) -> assert false + | Unary (I32 (I32Op.ExtendS Pack64)) -> assert false | Unary (I64 I64Op.Clz) -> op 0x79 | Unary (I64 I64Op.Ctz) -> op 0x7a @@ -342,6 +363,7 @@ struct | Unary (I64 (I64Op.ExtendS Pack8)) -> op 0xc2 | Unary (I64 (I64Op.ExtendS Pack16)) -> op 0xc3 | Unary (I64 (I64Op.ExtendS Pack32)) -> op 0xc4 + | Unary (I64 (I64Op.ExtendS Pack64)) -> assert false | Unary (F32 F32Op.Abs) -> op 0x8b | Unary (F32 F32Op.Neg) -> op 0x8c @@ -580,6 +602,7 @@ struct | Binary (V128 V128Op.(V128 AndNot)) -> simd_op 0x4fl | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l | Binary (V128 V128Op.(V128 Xor)) -> simd_op 0x51l + | Binary (V128 _) -> assert false | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 728a6e17a4..7d0445a42a 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -35,7 +35,7 @@ let numeric_error at = function | Numeric_error.IntegerOverflow -> "integer overflow" | Numeric_error.IntegerDivideByZero -> "integer divide by zero" | Numeric_error.InvalidConversionToInteger -> "invalid conversion to integer" - | Eval_numeric.TypeError (i, v, t) -> + | Values.TypeError (i, v, t) -> Crash.error at ("type error, expected " ^ Types.string_of_num_type t ^ " as operand " ^ string_of_int i ^ ", got " ^ Types.string_of_num_type (type_of_num v)) @@ -329,19 +329,19 @@ let rec step (c : config) : config = in Num n :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdLoad {offset; ty; sz; _}, I32 i :: vs' -> + | SimdLoad {offset; ty; sz; _}, Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = match sz with - | None -> Memory.load_value mem addr offset ty + | None -> Memory.load_num mem addr offset ty | Some (pack_size, simd_load) -> - V128 (Memory.load_simd_packed pack_size simd_load mem addr offset ty) - in v :: vs', [] + Memory.load_simd_packed pack_size simd_load mem addr offset ty + in Num v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdLoadLane ({offset; ty; sz; _}, j), V128 v :: I32 i :: vs' -> + | SimdLoadLane ({offset; ty; sz; _}, j), Num (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try @@ -350,17 +350,17 @@ let rec step (c : config) : config = | None -> assert false | Some Pack8 -> V128.I8x16.replace_lane j v - (I32Value.of_value (Memory.load_packed Pack8 SX mem addr offset I32Type)) + (I32Num.of_num 0 (Memory.load_packed Pack8 SX mem addr offset I32Type)) | Some Pack16 -> V128.I16x8.replace_lane j v - (I32Value.of_value (Memory.load_packed Pack16 SX mem addr offset I32Type)) + (I32Num.of_num 0 (Memory.load_packed Pack16 SX mem addr offset I32Type)) | Some Pack32 -> V128.I32x4.replace_lane j v - (I32Value.of_value (Memory.load_value mem addr offset I32Type)) + (I32Num.of_num 0 (Memory.load_num mem addr offset I32Type)) | Some Pack64 -> V128.I64x2.replace_lane j v - (I64Value.of_value (Memory.load_value mem addr offset I64Type)) - in V128 v :: vs', [] + (I64Num.of_num 0 (Memory.load_num mem addr offset I64Type)) + in Num (V128 v) :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) | Store {offset; sz; _}, Num n :: Num (I32 i) :: vs' -> @@ -374,15 +374,15 @@ let rec step (c : config) : config = vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdStore {offset; sz; _}, v :: I32 i :: vs' -> + | SimdStore {offset; sz; _}, Num v :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try - Memory.store_value mem addr offset v; + Memory.store_num mem addr offset v; vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdStoreLane ({offset; ty; sz; _}, j), V128 v :: I32 i :: vs' -> + | SimdStoreLane ({offset; ty; sz; _}, j), Num (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try @@ -390,8 +390,8 @@ let rec step (c : config) : config = | None -> assert false | Some Pack8 -> Memory.store_packed Pack8 mem addr offset (I32 (V128.I8x16.extract_lane_s j v)) | Some Pack16 -> Memory.store_packed Pack16 mem addr offset (I32 (V128.I16x8.extract_lane_s j v)) - | Some Pack32 -> Memory.store_value mem addr offset (I32 (V128.I32x4.extract_lane_s j v)) - | Some Pack64 -> Memory.store_value mem addr offset (I64 (V128.I64x2.extract_lane_s j v)) + | Some Pack32 -> Memory.store_num mem addr offset (I32 (V128.I32x4.extract_lane_s j v)) + | Some Pack64 -> Memory.store_num mem addr offset (I64 (V128.I64x2.extract_lane_s j v)) ); vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) @@ -519,24 +519,24 @@ let rec step (c : config) : config = (try Num (Eval_numeric.eval_cvtop cvtop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTernary ternop, v3 :: v2 :: v1 :: vs' -> - (try Eval_simd.eval_ternop ternop v1 v2 v3 :: vs', [] + | SimdTernary ternop, Num v3 :: Num v2 :: Num v1 :: vs' -> + (try Num (Eval_simd.eval_ternop ternop v1 v2 v3) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdExtract extractop, v :: vs' -> - (try Eval_simd.eval_extractop extractop v :: vs', [] + | SimdExtract extractop, Num v :: vs' -> + (try Num (Eval_simd.eval_extractop extractop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdReplace replaceop, r :: v :: vs' -> - (try Eval_simd.eval_replaceop replaceop v r :: vs', [] + | SimdReplace replaceop, Num r :: Num v :: vs' -> + (try Num (Eval_simd.eval_replaceop replaceop v r) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdShift shiftop, s :: v :: vs' -> - (try Eval_simd.eval_shiftop shiftop v s :: vs', [] + | SimdShift shiftop, Num s :: Num v :: vs' -> + (try Num (Eval_simd.eval_shiftop shiftop v s) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdBitmask bitmaskop, v :: vs' -> - (try Eval_simd.eval_bitmaskop bitmaskop v :: vs', [] + | SimdBitmask bitmaskop, Num v :: vs' -> + (try Num (Eval_simd.eval_bitmaskop bitmaskop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | _ -> diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 3c381ad536..5f80ab025c 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -2,46 +2,6 @@ open Types open Values -(* Injection & projection *) - -exception TypeError of int * num * num_type - -module type NumType = -sig - type t - val to_num : t -> num - val of_num : int -> num -> t -end - -module I32Num = -struct - type t = I32.t - let to_num i = I32 i - let of_num n = function I32 i -> i | v -> raise (TypeError (n, v, I32Type)) -end - -module I64Num = -struct - type t = I64.t - let to_num i = I64 i - let of_num n = function I64 i -> i | v -> raise (TypeError (n, v, I64Type)) -end - -module F32Num = -struct - type t = F32.t - let to_num i = F32 i - let of_num n = function F32 z -> z | v -> raise (TypeError (n, v, F32Type)) -end - -module F64Num = -struct - type t = F64.t - let to_num i = F64 i - let of_num n = function F64 z -> z | v -> raise (TypeError (n, v, F64Type)) -end - - (* Int operators *) module IntOp (IXX : Int.S) (Num : NumType with type t = IXX.t) = diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_numeric.mli index 969e447490..719c16f404 100644 --- a/interpreter/exec/eval_numeric.mli +++ b/interpreter/exec/eval_numeric.mli @@ -1,7 +1,5 @@ open Values -exception TypeError of int * num * Types.num_type - val eval_unop : Ast.unop -> num -> num val eval_binop : Ast.binop -> num -> num -> num val eval_testop : Ast.testop -> num -> bool diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index cf1d8ad1c7..91ac45a405 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -1,71 +1,64 @@ open Types open Values -exception TypeError of int * value * value_type - -let of_arg f n v = try f v with Value t -> raise (TypeError (n, v, t)) - -module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct +module SimdOp (SXX : Simd.S) (Num : NumType with type t = SXX.t) = struct open Ast.SimdOp - - let to_value = Value.to_value - - let of_value = of_arg Value.of_value + open Num let unop (op : unop) = fun v -> match op with - | I8x16 Neg -> to_value (SXX.I8x16.neg (of_value 1 v)) - | I8x16 Abs -> to_value (SXX.I8x16.abs (of_value 1 v)) - | I8x16 Popcnt -> to_value (SXX.I8x16.popcnt (of_value 1 v)) - | I16x8 Neg -> to_value (SXX.I16x8.neg (of_value 1 v)) - | I16x8 Abs -> to_value (SXX.I16x8.abs (of_value 1 v)) - | I16x8 ExtendLowS -> to_value (SXX.I16x8_convert.extend_low_s (of_value 1 v)) - | I16x8 ExtendHighS -> to_value (SXX.I16x8_convert.extend_high_s (of_value 1 v)) - | I16x8 ExtendLowU -> to_value (SXX.I16x8_convert.extend_low_u (of_value 1 v)) - | I16x8 ExtendHighU -> to_value (SXX.I16x8_convert.extend_high_u (of_value 1 v)) - | I16x8 ExtAddPairwiseS -> to_value (SXX.I16x8_convert.extadd_pairwise_s (of_value 1 v)) - | I16x8 ExtAddPairwiseU -> to_value (SXX.I16x8_convert.extadd_pairwise_u (of_value 1 v)) - | I32x4 Abs -> to_value (SXX.I32x4.abs (of_value 1 v)) - | I32x4 Neg -> to_value (SXX.I32x4.neg (of_value 1 v)) - | I32x4 ExtendLowS -> to_value (SXX.I32x4_convert.extend_low_s (of_value 1 v)) - | I32x4 ExtendHighS -> to_value (SXX.I32x4_convert.extend_high_s (of_value 1 v)) - | I32x4 ExtendLowU -> to_value (SXX.I32x4_convert.extend_low_u (of_value 1 v)) - | I32x4 ExtendHighU -> to_value (SXX.I32x4_convert.extend_high_u (of_value 1 v)) - | I32x4 TruncSatF32x4S -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_s (of_value 1 v)) - | I32x4 TruncSatF32x4U -> to_value (SXX.I32x4_convert.trunc_sat_f32x4_u (of_value 1 v)) + | I8x16 Neg -> to_num (SXX.I8x16.neg (of_num 1 v)) + | I8x16 Abs -> to_num (SXX.I8x16.abs (of_num 1 v)) + | I8x16 Popcnt -> to_num (SXX.I8x16.popcnt (of_num 1 v)) + | I16x8 Neg -> to_num (SXX.I16x8.neg (of_num 1 v)) + | I16x8 Abs -> to_num (SXX.I16x8.abs (of_num 1 v)) + | I16x8 ExtendLowS -> to_num (SXX.I16x8_convert.extend_low_s (of_num 1 v)) + | I16x8 ExtendHighS -> to_num (SXX.I16x8_convert.extend_high_s (of_num 1 v)) + | I16x8 ExtendLowU -> to_num (SXX.I16x8_convert.extend_low_u (of_num 1 v)) + | I16x8 ExtendHighU -> to_num (SXX.I16x8_convert.extend_high_u (of_num 1 v)) + | I16x8 ExtAddPairwiseS -> to_num (SXX.I16x8_convert.extadd_pairwise_s (of_num 1 v)) + | I16x8 ExtAddPairwiseU -> to_num (SXX.I16x8_convert.extadd_pairwise_u (of_num 1 v)) + | I32x4 Abs -> to_num (SXX.I32x4.abs (of_num 1 v)) + | I32x4 Neg -> to_num (SXX.I32x4.neg (of_num 1 v)) + | I32x4 ExtendLowS -> to_num (SXX.I32x4_convert.extend_low_s (of_num 1 v)) + | I32x4 ExtendHighS -> to_num (SXX.I32x4_convert.extend_high_s (of_num 1 v)) + | I32x4 ExtendLowU -> to_num (SXX.I32x4_convert.extend_low_u (of_num 1 v)) + | I32x4 ExtendHighU -> to_num (SXX.I32x4_convert.extend_high_u (of_num 1 v)) + | I32x4 TruncSatF32x4S -> to_num (SXX.I32x4_convert.trunc_sat_f32x4_s (of_num 1 v)) + | I32x4 TruncSatF32x4U -> to_num (SXX.I32x4_convert.trunc_sat_f32x4_u (of_num 1 v)) | I32x4 TruncSatF64x2SZero -> - to_value (SXX.I32x4_convert.trunc_sat_f64x2_s_zero (of_value 1 v)) + to_num (SXX.I32x4_convert.trunc_sat_f64x2_s_zero (of_num 1 v)) | I32x4 TruncSatF64x2UZero -> - to_value (SXX.I32x4_convert.trunc_sat_f64x2_u_zero (of_value 1 v)) - | I32x4 ExtAddPairwiseS -> to_value (SXX.I32x4_convert.extadd_pairwise_s (of_value 1 v)) - | I32x4 ExtAddPairwiseU -> to_value (SXX.I32x4_convert.extadd_pairwise_u (of_value 1 v)) - | I64x2 Abs -> to_value (SXX.I64x2.abs (of_value 1 v)) - | I64x2 Neg -> to_value (SXX.I64x2.neg (of_value 1 v)) - | I64x2 ExtendLowS -> to_value (SXX.I64x2_convert.extend_low_s (of_value 1 v)) - | I64x2 ExtendHighS -> to_value (SXX.I64x2_convert.extend_high_s (of_value 1 v)) - | I64x2 ExtendLowU -> to_value (SXX.I64x2_convert.extend_low_u (of_value 1 v)) - | I64x2 ExtendHighU -> to_value (SXX.I64x2_convert.extend_high_u (of_value 1 v)) - | F32x4 Abs -> to_value (SXX.F32x4.abs (of_value 1 v)) - | F32x4 Neg -> to_value (SXX.F32x4.neg (of_value 1 v)) - | F32x4 Sqrt -> to_value (SXX.F32x4.sqrt (of_value 1 v)) - | F32x4 Ceil -> to_value (SXX.F32x4.ceil (of_value 1 v)) - | F32x4 Floor -> to_value (SXX.F32x4.floor (of_value 1 v)) - | F32x4 Trunc -> to_value (SXX.F32x4.trunc (of_value 1 v)) - | F32x4 Nearest -> to_value (SXX.F32x4.nearest (of_value 1 v)) - | F32x4 ConvertI32x4S -> to_value (SXX.F32x4_convert.convert_i32x4_s (of_value 1 v)) - | F32x4 ConvertI32x4U -> to_value (SXX.F32x4_convert.convert_i32x4_u (of_value 1 v)) - | F32x4 DemoteF64x2Zero -> to_value (SXX.F32x4_convert.demote_f64x2_zero (of_value 1 v)) - | F64x2 Abs -> to_value (SXX.F64x2.abs (of_value 1 v)) - | F64x2 Neg -> to_value (SXX.F64x2.neg (of_value 1 v)) - | F64x2 Sqrt -> to_value (SXX.F64x2.sqrt (of_value 1 v)) - | F64x2 Ceil -> to_value (SXX.F64x2.ceil (of_value 1 v)) - | F64x2 Floor -> to_value (SXX.F64x2.floor (of_value 1 v)) - | F64x2 Trunc -> to_value (SXX.F64x2.trunc (of_value 1 v)) - | F64x2 Nearest -> to_value (SXX.F64x2.nearest (of_value 1 v)) - | F64x2 PromoteLowF32x4 -> to_value (SXX.F64x2_convert.promote_low_f32x4 (of_value 1 v)) - | F64x2 ConvertI32x4S -> to_value (SXX.F64x2_convert.convert_i32x4_s (of_value 1 v)) - | F64x2 ConvertI32x4U -> to_value (SXX.F64x2_convert.convert_i32x4_u (of_value 1 v)) - | V128 Not -> to_value (SXX.V128.lognot (of_value 1 v)) + to_num (SXX.I32x4_convert.trunc_sat_f64x2_u_zero (of_num 1 v)) + | I32x4 ExtAddPairwiseS -> to_num (SXX.I32x4_convert.extadd_pairwise_s (of_num 1 v)) + | I32x4 ExtAddPairwiseU -> to_num (SXX.I32x4_convert.extadd_pairwise_u (of_num 1 v)) + | I64x2 Abs -> to_num (SXX.I64x2.abs (of_num 1 v)) + | I64x2 Neg -> to_num (SXX.I64x2.neg (of_num 1 v)) + | I64x2 ExtendLowS -> to_num (SXX.I64x2_convert.extend_low_s (of_num 1 v)) + | I64x2 ExtendHighS -> to_num (SXX.I64x2_convert.extend_high_s (of_num 1 v)) + | I64x2 ExtendLowU -> to_num (SXX.I64x2_convert.extend_low_u (of_num 1 v)) + | I64x2 ExtendHighU -> to_num (SXX.I64x2_convert.extend_high_u (of_num 1 v)) + | F32x4 Abs -> to_num (SXX.F32x4.abs (of_num 1 v)) + | F32x4 Neg -> to_num (SXX.F32x4.neg (of_num 1 v)) + | F32x4 Sqrt -> to_num (SXX.F32x4.sqrt (of_num 1 v)) + | F32x4 Ceil -> to_num (SXX.F32x4.ceil (of_num 1 v)) + | F32x4 Floor -> to_num (SXX.F32x4.floor (of_num 1 v)) + | F32x4 Trunc -> to_num (SXX.F32x4.trunc (of_num 1 v)) + | F32x4 Nearest -> to_num (SXX.F32x4.nearest (of_num 1 v)) + | F32x4 ConvertI32x4S -> to_num (SXX.F32x4_convert.convert_i32x4_s (of_num 1 v)) + | F32x4 ConvertI32x4U -> to_num (SXX.F32x4_convert.convert_i32x4_u (of_num 1 v)) + | F32x4 DemoteF64x2Zero -> to_num (SXX.F32x4_convert.demote_f64x2_zero (of_num 1 v)) + | F64x2 Abs -> to_num (SXX.F64x2.abs (of_num 1 v)) + | F64x2 Neg -> to_num (SXX.F64x2.neg (of_num 1 v)) + | F64x2 Sqrt -> to_num (SXX.F64x2.sqrt (of_num 1 v)) + | F64x2 Ceil -> to_num (SXX.F64x2.ceil (of_num 1 v)) + | F64x2 Floor -> to_num (SXX.F64x2.floor (of_num 1 v)) + | F64x2 Trunc -> to_num (SXX.F64x2.trunc (of_num 1 v)) + | F64x2 Nearest -> to_num (SXX.F64x2.nearest (of_num 1 v)) + | F64x2 PromoteLowF32x4 -> to_num (SXX.F64x2_convert.promote_low_f32x4 (of_num 1 v)) + | F64x2 ConvertI32x4S -> to_num (SXX.F64x2_convert.convert_i32x4_s (of_num 1 v)) + | F64x2 ConvertI32x4U -> to_num (SXX.F64x2_convert.convert_i32x4_u (of_num 1 v)) + | V128 Not -> to_num (SXX.V128.lognot (of_num 1 v)) | _ -> assert false let binop (op : binop) = @@ -192,7 +185,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | V128 Xor -> SXX.V128.xor | V128 AndNot -> SXX.V128.andnot | _ -> assert false - in fun v1 v2 -> to_value (f (of_value 1 v1) (of_value 2 v2)) + in fun v1 v2 -> to_num (f (of_num 1 v1) (of_num 2 v2)) let testop (op : testop) = let f = match op with @@ -202,12 +195,12 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I32x4 AllTrue -> SXX.I32x4.all_true | I64x2 AllTrue -> SXX.I64x2.all_true | _ -> assert false - in fun v -> f (of_value 1 v) + in fun v -> f (of_num 1 v) let relop op = assert false let extractop op v = - let v128 = of_value 1 v in + let v128 = of_num 1 v in match op with | I8x16 (SX, imm) -> (I32 (SXX.I8x16.extract_lane_s imm v128)) | I8x16 (ZX, imm) -> (I32 (SXX.I8x16.extract_lane_u imm v128)) @@ -219,21 +212,21 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | F64x2 (_, imm) -> (F64 (SXX.F64x2.extract_lane imm v128)) | _ -> assert false - let replaceop op v (r : Values.value) = - let v128 = of_value 1 v in + let replaceop op v (r : Values.num) = + let v128 = of_num 1 v in match op, r with - | I8x16 imm, I32 r -> to_value (SXX.I8x16.replace_lane imm v128 r) - | I16x8 imm, I32 r -> to_value (SXX.I16x8.replace_lane imm v128 r) - | I32x4 imm, I32 r -> to_value (SXX.I32x4.replace_lane imm v128 r) - | I64x2 imm, I64 r -> to_value (SXX.I64x2.replace_lane imm v128 r) - | F32x4 imm, F32 r -> to_value (SXX.F32x4.replace_lane imm v128 r) - | F64x2 imm, F64 r -> to_value (SXX.F64x2.replace_lane imm v128 r) + | I8x16 imm, I32 r -> to_num (SXX.I8x16.replace_lane imm v128 r) + | I16x8 imm, I32 r -> to_num (SXX.I16x8.replace_lane imm v128 r) + | I32x4 imm, I32 r -> to_num (SXX.I32x4.replace_lane imm v128 r) + | I64x2 imm, I64 r -> to_num (SXX.I64x2.replace_lane imm v128 r) + | F32x4 imm, F32 r -> to_num (SXX.F32x4.replace_lane imm v128 r) + | F64x2 imm, F64 r -> to_num (SXX.F64x2.replace_lane imm v128 r) | _ -> assert false let ternop op = let f = match op with | Bitselect -> SXX.V128.bitselect - in fun v1 v2 v3 -> to_value (f (of_value 1 v1) (of_value 2 v2) (of_value 3 v3)) + in fun v1 v2 v3 -> to_num (f (of_num 1 v1) (of_num 2 v2) (of_num 3 v3)) let shiftop (op : shiftop) = let f = match op with @@ -250,7 +243,7 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | I64x2 ShrS -> SXX.I64x2.shr_s | I64x2 ShrU -> SXX.I64x2.shr_u | _ -> failwith "unimplemented shr_u" - in fun v s -> to_value (f (of_value 1 v) (of_arg I32Value.of_value 2 s)) + in fun v s -> to_num (f (of_num 1 v) (I32Num.of_num 2 s)) let bitmaskop (op : Simd.shape) v = let f = match op with @@ -259,24 +252,24 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct | Simd.I32x4 -> SXX.I32x4.bitmask | Simd.I64x2 -> SXX.I64x2.bitmask | _ -> assert false - in I32 (f (of_value 1 v)) + in I32 (f (of_num 1 v)) end -module V128Op = SimdOp (V128) (Values.V128Value) +module V128Op = SimdOp (V128) (Values.V128Num) module V128CvtOp = struct open Ast.SimdOp - let cvtop op v : value = + let cvtop op v : num = match op with - | I8x16 Splat -> V128 (V128.I8x16.splat (of_arg I32Value.of_value 1 v)) - | I16x8 Splat -> V128 (V128.I16x8.splat (of_arg I32Value.of_value 1 v)) - | I32x4 Splat -> V128 (V128.I32x4.splat (of_arg I32Value.of_value 1 v)) - | I64x2 Splat -> V128 (V128.I64x2.splat (of_arg I64Value.of_value 1 v)) - | F32x4 Splat -> V128 (V128.F32x4.splat (of_arg F32Value.of_value 1 v)) - | F64x2 Splat -> V128 (V128.F64x2.splat (of_arg F64Value.of_value 1 v)) + | I8x16 Splat -> V128Num.to_num (V128.I8x16.splat (I32Num.of_num 1 v)) + | I16x8 Splat -> V128 (V128.I16x8.splat (I32Num.of_num 1 v)) + | I32x4 Splat -> V128 (V128.I32x4.splat (I32Num.of_num 1 v)) + | I64x2 Splat -> V128 (V128.I64x2.splat (I64Num.of_num 1 v)) + | F32x4 Splat -> V128 (V128.F32x4.splat (F32Num.of_num 1 v)) + | F64x2 Splat -> V128 (V128.F64x2.splat (F64Num.of_num 1 v)) | _ -> assert false end diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli index 3e47f8bb27..937fb14364 100644 --- a/interpreter/exec/eval_simd.mli +++ b/interpreter/exec/eval_simd.mli @@ -1,15 +1,13 @@ open Values -exception TypeError of int * value * Types.value_type +val unop : Ast.V128Op.unop -> num -> num +val binop : Ast.V128Op.binop -> num -> num -> num +val testop : Ast.V128Op.testop -> num -> bool +val relop : Ast.V128Op.relop -> num -> num -> bool +val cvtop : Ast.V128Op.cvtop -> num -> num -val unop : Ast.V128Op.unop -> value -> value -val binop : Ast.V128Op.binop -> value -> value -> value -val testop : Ast.V128Op.testop -> value -> bool -val relop : Ast.V128Op.relop -> value -> value -> bool -val cvtop : Ast.V128Op.cvtop -> value -> value - -val eval_ternop : Ast.V128Op.ternop -> value -> value -> value -> value -val eval_shiftop : Ast.V128Op.shiftop -> value -> value -> value -val eval_bitmaskop : Simd.shape -> value -> value -val eval_extractop : Ast.V128Op.extractop -> value -> value -val eval_replaceop : Ast.V128Op.replaceop -> value -> value -> value +val eval_ternop : Ast.V128Op.ternop -> num -> num -> num -> num +val eval_shiftop : Ast.V128Op.shiftop -> num -> num -> num +val eval_bitmaskop : Simd.shape -> num -> num +val eval_extractop : Ast.V128Op.extractop -> num -> num +val eval_replaceop : Ast.V128Op.replaceop -> num -> num -> num diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index 4469fd7cda..d9369c27f3 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -103,7 +103,6 @@ let storen mem a o n x = in loop (effective_address a o) n x let load_num mem a o t = - let n = loadn mem a o (Types.size t) in match t with | V128Type -> V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.size t))) @@ -118,7 +117,7 @@ let load_num mem a o t = let store_num mem a o n = let store = storen mem a o (Types.size (Values.type_of_num n)) in - match v with + match n with | I32 x -> store (Int64.of_int32 x) | I64 x -> store x | F32 x -> store (Int64.of_int32 (F32.to_bits x)) @@ -145,20 +144,22 @@ let load_simd_packed pack_size simd_load mem a o t = let b = Bytes.make 16 '\x00' in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in - match pack_size, simd_load with - | Pack64, Pack8x8 SX -> V128.I16x8_convert.extend_low_s v - | Pack64, Pack8x8 ZX -> V128.I16x8_convert.extend_low_u v - | Pack64, Pack16x4 SX -> V128.I32x4_convert.extend_low_s v - | Pack64, Pack16x4 ZX -> V128.I32x4_convert.extend_low_u v - | Pack64, Pack32x2 SX -> V128.I64x2_convert.extend_low_s v - | Pack64, Pack32x2 ZX -> V128.I64x2_convert.extend_low_u v - | Pack8, PackSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) - | Pack16, PackSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) - | Pack32, PackSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) - | Pack64, PackSplat -> V128.I64x2.splat x - | Pack32, PackZero -> v - | Pack64, PackZero -> v - | _ -> assert false + let r = + match pack_size, simd_load with + | Pack64, Pack8x8 SX -> V128.I16x8_convert.extend_low_s v + | Pack64, Pack8x8 ZX -> V128.I16x8_convert.extend_low_u v + | Pack64, Pack16x4 SX -> V128.I32x4_convert.extend_low_s v + | Pack64, Pack16x4 ZX -> V128.I32x4_convert.extend_low_u v + | Pack64, Pack32x2 SX -> V128.I64x2_convert.extend_low_s v + | Pack64, Pack32x2 ZX -> V128.I64x2_convert.extend_low_u v + | Pack8, PackSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) + | Pack16, PackSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) + | Pack32, PackSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) + | Pack64, PackSplat -> V128.I64x2.splat x + | Pack32, PackZero -> v + | Pack64, PackZero -> v + | _ -> assert false + in V128 r let store_packed sz mem a o n = assert (packed_size sz <= Types.size (Values.type_of_num n)); diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index e60c2a8a56..be970ce8fe 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -37,7 +37,7 @@ val load_packed : pack_size -> extension -> memory -> address -> offset -> num_type -> num (* raises Type, Bounds *) val load_simd_packed : - pack_size -> pack_simd -> memory -> address -> offset -> value_type -> V128.t + pack_size -> pack_simd -> memory -> address -> offset -> num_type -> num (* raises Type, Bounds *) val store_packed : pack_size -> memory -> address -> offset -> num -> unit diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 17ccae15c4..cd536a3326 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -288,7 +288,7 @@ let assert_return ress ts at = | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) in match res.it with - | LitResult {it = Values.Num num; at = at'} -> + | NumResult {it = LitPat {it = Values.Num num; at = at'}; _} -> let t', reinterpret = reinterpret_of (Values.type_of_num num) in [ reinterpret @@ at; Const (num @@ at') @@ at; @@ -296,29 +296,24 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | LitResult {it = Values.Ref (Values.NullRef t); _} -> + | NumResult {it = LitPat {it = Values.Ref (Values.NullRef t); _}; _} -> [ RefIsNull @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | LitResult {it = Values.Ref (ExternRef n); _} -> + | NumResult {it = LitPat {it = Values.Ref (ExternRef n); _}; _} -> [ Const (Values.I32 n @@ at) @@ at; Call (externref_idx @@ at) @@ at; Call (eq_externref_idx @@ at) @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | LitResult {it = Values.Ref _; _} -> + | NumResult {it = LitPat {it = Values.Ref _; _}; _} -> assert false - | NanResult nanop -> + | NumResult {it = NanPat nanop; _ } -> let nan = match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false | Values.F32 n | Values.F64 n -> n in - let nan_bitmask_of = - match nan with - | CanonicalNan -> abs_mask_of (* must only differ from the canonical NaN in its sign bit *) - | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) - in let t = Values.type_of_num nanop.it in let t', reinterpret = reinterpret_of t in [ reinterpret @@ at; @@ -329,41 +324,44 @@ let assert_return ress ts at = Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] | SimdResult (shape, pats) -> + let open Values in (* SimdResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals * and NaNs. For NaNs, we need to mask it and compare with a canonical NaN. To simplify * comparison, we build masks even for literals (will just be all set), collect them into * a v128, then compare the entire 128 bits. *) let mask_and_canonical = function - | LitPat {it = Values.I32 _ as i; _} -> Values.I32 (Int32.minus_one), i - | LitPat {it = Values.I64 _ as i; _} -> Values.I64 (Int64.minus_one), i - | LitPat {it = Values.F32 f; _} -> Values.I32 (Int32.minus_one), Values.I32 (I32_convert.reinterpret_f32 f) - | LitPat {it = Values.F64 f; _} -> Values.I64 (Int64.minus_one), Values.I64 (I64_convert.reinterpret_f64 f) - | NanPat {it = Values.F32 nan; _} -> nan_bitmask_of nan I32Type, canonical_nan_of I32Type - | NanPat {it = Values.F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type + | LitPat {it = Num (I32 _ as i); _} -> I32 (Int32.minus_one), i + | LitPat {it = Num (I64 _ as i); _} -> I64 (Int64.minus_one), i + | LitPat {it = Num (F32 f); _} -> I32 (Int32.minus_one), I32 (I32_convert.reinterpret_f32 f) + | LitPat {it = Num (F64 f); _} -> I64 (Int64.minus_one), I64 (I64_convert.reinterpret_f64 f) + | NanPat {it = F32 nan; _} -> nan_bitmask_of nan I32Type, canonical_nan_of I32Type + | NanPat {it = F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type | _ -> assert false in let masks, canons = List.split (List.map (fun p -> mask_and_canonical p.it) pats) in let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in let mask, expected = match shape with - | Simd.I8x16 -> all_ones, V128.of_i8x16 (List.map Values.I32Value.of_value canons) - | Simd.I16x8 -> all_ones, V128.of_i16x8 (List.map Values.I32Value.of_value canons) - | Simd.I32x4 -> all_ones, V128.of_i32x4 (List.map Values.I32Value.of_value canons) - | Simd.I64x2 -> all_ones, V128.of_i64x2 (List.map Values.I64Value.of_value canons) + | Simd.I8x16 -> all_ones, V128.of_i8x16 (List.map (I32Num.of_num 0) canons) + | Simd.I16x8 -> all_ones, V128.of_i16x8 (List.map (I32Num.of_num 0) canons) + | Simd.I32x4 -> all_ones, V128.of_i32x4 (List.map (I32Num.of_num 0) canons) + | Simd.I64x2 -> all_ones, V128.of_i64x2 (List.map (I64Num.of_num 0) canons) | Simd.F32x4 -> - V128.of_i32x4 (List.map Values.I32Value.of_value masks), - V128.of_i32x4 (List.map Values.I32Value.of_value canons) + V128.of_i32x4 (List.map (I32Num.of_num 0) masks), + V128.of_i32x4 (List.map (I32Num.of_num 0) canons) | Simd.F64x2 -> - V128.of_i64x2 (List.map Values.I64Value.of_value masks), - V128.of_i64x2 (List.map Values.I64Value.of_value canons) + V128.of_i64x2 (List.map (I64Num.of_num 0) masks), + V128.of_i64x2 (List.map (I64Num.of_num 0) canons) in [ - Const (Values.V128 mask @@ at) @@ at; + Const (V128 mask @@ at) @@ at; Binary (and_of V128Type) @@ at; - Const (Values.V128 expected @@ at) @@ at; - Binary (Values.V128 V128Op.(I8x16 Eq)) @@ at; + Const (V128 expected @@ at) @@ at; + Binary (V128 V128Op.(I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) - Test (Values.V128 V128Op.(I8x16 AllTrue)) @@ at; + Test (V128 V128Op.(I8x16 AllTrue)) @@ at; + Test (I32 I32Op.Eqz) @@ at; + BrIf (0l @@ at) @@ at ] | RefResult t -> let is_ref_idx = match t with @@ -483,7 +481,7 @@ let of_nan = function | ArithmeticNan -> "\"nan:arithmetic\"" let of_numpat = function - | LitPat lit -> of_literal lit + | LitPat lit -> of_value lit | NanPat nanop -> match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 5b191b13b0..9e1765529b 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -252,9 +252,9 @@ let string_of_nan = function let type_of_result r = match r with - | NumResult { it = LitPat v ; _ } -> Values.type_of v.it - | NumResult { it = NanPat v ; _ } -> Values.type_of v.it - | SimdResult (_, _) -> let open Types in V128Type + | NumResult { it = LitPat v ; _ } -> Values.type_of_value v.it + | NumResult { it = NanPat v ; _ } -> Types.NumType (Values.type_of_num v.it) + | SimdResult (_, _) -> Types.NumType Types.V128Type | RefResult t -> Types.RefType t let string_of_num_pat (p : num_pat) = @@ -270,7 +270,7 @@ let string_of_result r = | NumResult v -> string_of_num_pat v | SimdResult (shape, vs) -> String.concat " " (List.map string_of_num_pat vs) - | RefResult t -> Types.RefType t + | RefResult t -> Types.string_of_refed_type t let string_of_results = function | [r] -> string_of_result r @@ -365,17 +365,18 @@ let assert_num_pat at v p = | (LitPat v') -> v <> v'.it | (NanPat nanop) -> match nanop.it, v with - | F32 CanonicalNan, F32 z -> z <> F32.pos_nan && z <> F32.neg_nan - | F64 CanonicalNan, F64 z -> z <> F64.pos_nan && z <> F64.neg_nan - | F32 ArithmeticNan, F32 z -> + | F32 CanonicalNan, Num (F32 z) -> z <> F32.pos_nan && z <> F32.neg_nan + | F64 CanonicalNan, Num (F64 z) -> z <> F64.pos_nan && z <> F64.neg_nan + | F32 ArithmeticNan, Num (F32 z) -> let pos_nan = F32.to_bits F32.pos_nan in Int32.logand (F32.to_bits z) pos_nan <> pos_nan - | F64 ArithmeticNan, F64 z -> + | F64 ArithmeticNan, Num (F64 z) -> let pos_nan = F64.to_bits F64.pos_nan in Int64.logand (F64.to_bits z) pos_nan <> pos_nan | _, _ -> false let assert_result at got expect = + let open Values in if List.length got <> List.length expect || List.exists2 (fun v r -> @@ -383,43 +384,42 @@ let assert_result at got expect = | NumResult v' -> assert_num_pat at v v' | SimdResult (shape, vs) -> begin - let open Values in let open Simd in match shape, v with - | I8x16, V128 v -> + | I8x16, Num (V128 v) -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 16 (fun i -> I32 (V128.I8x16.extract_lane_s i v))) + (List.init 16 (fun i -> Num (I32 (V128.I8x16.extract_lane_s i v)))) vs - | I16x8, V128 v -> + | I16x8, Num (V128 v) -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 8 (fun i -> I32 (V128.I16x8.extract_lane_s i v))) + (List.init 8 (fun i -> Num (I32 (V128.I16x8.extract_lane_s i v)))) vs - | I32x4, V128 v -> - let l0 = I32 (V128.I32x4.extract_lane_s 0 v) in - let l1 = I32 (V128.I32x4.extract_lane_s 1 v) in - let l2 = I32 (V128.I32x4.extract_lane_s 2 v) in - let l3 = I32 (V128.I32x4.extract_lane_s 3 v) in + | I32x4, Num (V128 v) -> + let l0 = Num (I32 (V128.I32x4.extract_lane_s 0 v)) in + let l1 = Num (I32 (V128.I32x4.extract_lane_s 1 v)) in + let l2 = Num (I32 (V128.I32x4.extract_lane_s 2 v)) in + let l3 = Num (I32 (V128.I32x4.extract_lane_s 3 v)) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs - | I64x2, V128 v -> + | I64x2, Num (V128 v) -> List.exists2 (fun v r -> assert_num_pat at v r) - (List.init 2 (fun i -> I64 (V128.I64x2.extract_lane_s i v))) + (List.init 2 (fun i -> Num (I64 (V128.I64x2.extract_lane_s i v)))) vs - | F32x4, V128 v -> - let l0 = F32 (V128.F32x4.extract_lane 0 v) in - let l1 = F32 (V128.F32x4.extract_lane 1 v) in - let l2 = F32 (V128.F32x4.extract_lane 2 v) in - let l3 = F32 (V128.F32x4.extract_lane 3 v) in + | F32x4, Num (V128 v) -> + let l0 = Num (F32 (V128.F32x4.extract_lane 0 v)) in + let l1 = Num (F32 (V128.F32x4.extract_lane 1 v)) in + let l2 = Num (F32 (V128.F32x4.extract_lane 2 v)) in + let l3 = Num (F32 (V128.F32x4.extract_lane 3 v)) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1; l2; l3] vs - | F64x2, V128 v -> - let l0 = F64 (V128.F64x2.extract_lane 0 v) in - let l1 = F64 (V128.F64x2.extract_lane 1 v) in + | F64x2, Num (V128 v) -> + let l0 = Num (F64 (V128.F64x2.extract_lane 0 v)) in + let l1 = Num (F64 (V128.F64x2.extract_lane 1 v)) in List.exists2 (fun v r -> assert_num_pat at v r ) [l0; l1] vs diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 3f355057de..0bc9ffd585 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -20,7 +20,7 @@ and nan = CanonicalNan | ArithmeticNan type num_pat = num_pat' Source.phrase and num_pat' = - | LitPat of Ast.literal + | LitPat of literal | NanPat of nanop type result = result' Source.phrase diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index 60d5803340..a58fb52bfc 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -85,6 +85,9 @@ let rec instr (e : instr) = | ElemDrop x -> elems (var x) | Load _ | Store _ | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> memories zero + | SimdLoad _ | SimdLoadLane _ | SimdStore _ | SimdStoreLane _ + | SimdTernary _ | SimdExtract _ | SimdReplace _ | SimdShift _ | SimdBitmask _ -> + memories zero | MemoryInit x -> memories zero ++ datas (var x) | DataDrop x -> datas (var x) diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index 897809ae9c..0f83059e44 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -14,6 +14,53 @@ type ref_ += NullRef of ref_type type value = Num of num | Ref of ref_ +(* Injection & projection *) + +exception TypeError of int * num * num_type + +module type NumType = +sig + type t + val to_num : t -> num + val of_num : int -> num -> t +end + +module I32Num = +struct + type t = I32.t + let to_num i = I32 i + let of_num n = function I32 i -> i | v -> raise (TypeError (n, v, I32Type)) +end + +module I64Num = +struct + type t = I64.t + let to_num i = I64 i + let of_num n = function I64 i -> i | v -> raise (TypeError (n, v, I64Type)) +end + +module F32Num = +struct + type t = F32.t + let to_num i = F32 i + let of_num n = function F32 z -> z | v -> raise (TypeError (n, v, F32Type)) +end + +module F64Num = +struct + type t = F64.t + let to_num i = F64 i + let of_num n = function F64 z -> z | v -> raise (TypeError (n, v, F64Type)) +end + +module V128Num = +struct + type t = V128.t + let to_num i = V128 i + let of_num n = function V128 z -> z | v -> raise (TypeError (n, v, V128Type)) +end + + (* Typing *) let type_of_num = function diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 92d627be56..2ffec7518f 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -750,14 +750,16 @@ let literal mode lit shape = | Num (Values.F32 z), _ -> choose_mode F32.to_hex_string F32.to_string z | Num (Values.F64 z), _ -> choose_mode F64.to_hex_string F64.to_string z | Num (Values.V128 v), _ -> choose_mode V128.to_hex_string V128.to_string v - | Ref (NullRef t) -> ("ref.null " ^ refed_type t) - | Ref (ExternRef n) -> ("ref.extern " ^ nat32 n) - | Ref _ -> assert false + | Ref (NullRef t), _ -> ("ref.null " ^ refed_type t) + | Ref (ExternRef n), _ -> ("ref.extern " ^ nat32 n) + | Ref _, _ -> assert false (* Converts a literal into a constant instruction. *) let constant mode lit = let lit_string = literal mode lit None in - Node (constop lit ^ lit_string, []) + match lit.it with + | Num n -> Node (constop (n @@ lit.at) ^ lit_string, []) + | Ref _ -> Node (lit_string, []) let definition mode x_opt def = try diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index f36180daa4..6c2f50806f 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -42,7 +42,7 @@ let num f s = let simd_literal shape ss at = try let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in - (v128_const (v @@ at), Values.V128 v) + (v128_const (v @@ at), Values.Num (Values.V128 v)) with (* TODO better location for error messages. *) | Failure _ -> error at "constant out of range" @@ -57,13 +57,14 @@ let simd_lane_nan shape l at = let simd_lane_lit shape l at = let open Simd in + let open Values in match shape with - | I8x16 -> LitPat (Values.I32 (I8.of_string l) @@ at) @@ at - | I16x8 -> LitPat (Values.I32 (I16.of_string l) @@ at) @@ at - | I32x4 -> LitPat (Values.I32 (I32.of_string l) @@ at) @@ at - | I64x2 -> LitPat (Values.I64 (I64.of_string l) @@ at) @@ at - | F32x4 -> LitPat (Values.F32 (F32.of_string l) @@ at) @@ at - | F64x2 -> LitPat (Values.F64 (F64.of_string l) @@ at) @@ at + | I8x16 -> LitPat (Num (I32 (I8.of_string l)) @@ at) @@ at + | I16x8 -> LitPat (Num (I32 (I16.of_string l)) @@ at) @@ at + | I32x4 -> LitPat (Num (I32 (I32.of_string l)) @@ at) @@ at + | I64x2 -> LitPat (Num (I64 (I64.of_string l)) @@ at) @@ at + | F32x4 -> LitPat (Num (F32 (F32.of_string l)) @@ at) @@ at + | F64x2 -> LitPat (Num (F64 (F64.of_string l)) @@ at) @@ at let simd_lane_index s at = match int_of_string s with @@ -221,7 +222,7 @@ let inline_type_explicit (c : context) x ft at = %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT %token CONST UNARY BINARY TEST COMPARE CONVERT %token REF_NULL REF_FUNC REF_EXTERN REF_IS_NULL -%token V128_CONST SIMD_SHAPE SIMD_LOAD_LANE SIMD_STORE_LANE +%token V128_CONST SIMD_SHAPE SIMD_LOAD_LANE SIMD_STORE_LANE SHUFFLE %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA DECLARE OFFSET ITEM IMPORT EXPORT %token MODULE BIN QUOTE @@ -337,9 +338,9 @@ num : | INT { $1 @@ at () } | FLOAT { $1 @@ at () } -literal_list: +num_list: | /* empty */ { [] } - | literal literal_list { $1 :: $2 } + | num num_list { $1 :: $2 } var : | NAT { let at = at () in fun c lookup -> nat32 $1 at @@ at } @@ -440,7 +441,7 @@ plain_instr : | REF_IS_NULL { fun c -> ref_is_null } | REF_FUNC var { fun c -> ref_func ($2 c func) } | CONST num { fun c -> fst (num $1 $2) } - | V128_CONST SIMD_SHAPE literal_list { let at = at () in fun c -> fst (simd_literal $2 $3 at) } + | V128_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd_literal $2 $3 at) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } @@ -451,7 +452,7 @@ plain_instr : | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | SHIFT { fun c -> $1 } - | SHUFFLE literal_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) } + | SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) } select_instr : @@ -1108,7 +1109,7 @@ const : | LPAR REF_EXTERN NAT RPAR { Values.Ref (ExternRef (nat32 $3 (ati 3))) @@ at () } v128const: - | LPAR V128_CONST SIMD_SHAPE literal_list RPAR { + | LPAR V128_CONST SIMD_SHAPE num_list RPAR { snd (simd_literal $3 $4 (at ())) @@ ati 4 } @@ -1118,7 +1119,7 @@ const_list : | v128const const_list { $1 :: $2 } numpat : - | literal { fun s -> simd_lane_lit s $1.it $1.at } + | num { fun s -> simd_lane_lit s $1.it $1.at } | NAN { fun s -> simd_lane_nan s $1 (ati 3) } numpat_list: @@ -1126,8 +1127,8 @@ numpat_list: | numpat numpat_list { $1 :: $2 } result : - | const { LitResult $1 @@ at () } - | LPAR CONST NAN RPAR { NanResult (nanop $2 ($3 @@ ati 3)) @@ at () } + | const { NumResult (LitPat $1 @@ at ()) @@ at () } + | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ at ()) @@ at () } | LPAR REF_FUNC RPAR { RefResult FuncRefType @@ at () } | LPAR REF_EXTERN RPAR { RefResult ExternRefType @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 8c9358fe79..43961f052c 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -373,13 +373,13 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | SimdLoad memop -> check_memop c memop (Lib.Option.map fst) e.at; - [I32Type] --> [memop.ty] + [NumType I32Type] --> [NumType memop.ty] | SimdLoadLane (memop, i) -> check_memop c memop (fun o -> o) e.at; let sz = Lib.Option.get memop.sz Pack8 in require (i < 16 / packed_size sz) e.at "invalid lane index"; - [I32Type; V128Type] --> [memop.ty] + [NumType I32Type; NumType V128Type] --> [NumType memop.ty] | Store memop -> check_memop c memop (fun sz -> sz) e.at; @@ -387,13 +387,13 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | SimdStore memop -> check_memop c memop (fun _ -> None) e.at; - [I32Type; memop.ty] --> [] + [NumType I32Type; NumType memop.ty] --> [] | SimdStoreLane (memop, i) -> check_memop c memop (fun o -> o) e.at; let sz = Lib.Option.get memop.sz Pack8 in require (i < 16 / packed_size sz) e.at "invalid lane index"; - [I32Type; V128Type] --> [] + [NumType I32Type; NumType V128Type] --> [] | MemorySize -> let _mt = memory c (0l @@ e.at) in @@ -453,6 +453,7 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type [t] --> [t] | Binary binop -> + check_binop binop e.at; let t = NumType (type_binop binop) in [t; t] --> [t] @@ -461,25 +462,25 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type [NumType t1] --> [NumType t2] | SimdTernary ternop -> - let t = V128Type in + let t = NumType V128Type in [t; t; t] --> [t] | SimdExtract (V128Op.V128 _) -> assert false | SimdExtract extractop -> check_simd_extract_lane_index extractop e.at; let t = type_simd_lane extractop in - [V128Type] --> [t] + [NumType V128Type] --> [NumType t] | SimdReplace replaceop -> check_simd_replace_lane_index replaceop e.at; let t = type_simd_lane replaceop in - [V128Type; t] --> [V128Type] + [NumType V128Type; NumType t] --> [NumType V128Type] | SimdShift _ -> - [V128Type; I32Type] --> [V128Type] + [NumType V128Type; NumType I32Type] --> [NumType V128Type] | SimdBitmask _ -> - [V128Type] --> [I32Type] + [NumType V128Type] --> [NumType I32Type] and check_seq (c : context) (s : infer_result_type) (es : instr list) : infer_result_type = From 9da8a6162dc800a0aafcacc6ebc2730d2814af15 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 12 Mar 2021 12:54:39 -0800 Subject: [PATCH 343/378] Fix typo in js-api/index.b --- document/js-api/index.bs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/js-api/index.bs b/document/js-api/index.bs index 416f46ac7c..a0a3e56d35 100644 --- a/document/js-api/index.bs +++ b/document/js-api/index.bs @@ -843,7 +843,7 @@ enum ValueType { "i64", "f32", "f64", - "v128" + "v128", "externref", "anyfunc", }; From 886123e01c5bd2f47452f71fd2fde3e94e5342ec Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 17 Mar 2021 17:27:14 -0700 Subject: [PATCH 344/378] Small cleanup to num_pat to remove redundant Source.phrase Took the chance to clean up the matching logic for SimdResult too. --- interpreter/script/js.ml | 16 ++++----- interpreter/script/run.ml | 67 +++++++++++++----------------------- interpreter/script/script.ml | 3 +- interpreter/text/arrange.ml | 4 +-- interpreter/text/parser.mly | 20 +++++------ 5 files changed, 44 insertions(+), 66 deletions(-) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index cd536a3326..42bebd683b 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -288,7 +288,7 @@ let assert_return ress ts at = | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) in match res.it with - | NumResult {it = LitPat {it = Values.Num num; at = at'}; _} -> + | NumResult (LitPat {it = Values.Num num; at = at'}) -> let t', reinterpret = reinterpret_of (Values.type_of_num num) in [ reinterpret @@ at; Const (num @@ at') @@ at; @@ -296,19 +296,19 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | NumResult {it = LitPat {it = Values.Ref (Values.NullRef t); _}; _} -> + | NumResult (LitPat {it = Values.Ref (Values.NullRef t); _}) -> [ RefIsNull @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | NumResult {it = LitPat {it = Values.Ref (ExternRef n); _}; _} -> + | NumResult (LitPat {it = Values.Ref (ExternRef n); _}) -> [ Const (Values.I32 n @@ at) @@ at; Call (externref_idx @@ at) @@ at; Call (eq_externref_idx @@ at) @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | NumResult {it = LitPat {it = Values.Ref _; _}; _} -> + | NumResult (LitPat {it = Values.Ref _; _}) -> assert false - | NumResult {it = NanPat nanop; _ } -> + | NumResult (NanPat nanop) -> let nan = match nanop.it with | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false @@ -339,7 +339,7 @@ let assert_return ress ts at = | NanPat {it = F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type | _ -> assert false in - let masks, canons = List.split (List.map (fun p -> mask_and_canonical p.it) pats) in + let masks, canons = List.split (List.map (fun p -> mask_and_canonical p) pats) in let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in let mask, expected = match shape with | Simd.I8x16 -> all_ones, V128.of_i8x16 (List.map (I32Num.of_num 0) canons) @@ -489,9 +489,9 @@ let of_numpat = function let of_result res = match res.it with - | NumResult n -> of_numpat n.it + | NumResult n -> of_numpat n | SimdResult (shape, pats) -> - Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map (fun x -> of_numpat x.it) pats)) + Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map (fun x -> of_numpat x) pats)) | RefResult t -> "\"ref." ^ string_of_refed_type t ^ "\"" let rec of_definition def = diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 9e1765529b..2e67facd1e 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -252,13 +252,13 @@ let string_of_nan = function let type_of_result r = match r with - | NumResult { it = LitPat v ; _ } -> Values.type_of_value v.it - | NumResult { it = NanPat v ; _ } -> Types.NumType (Values.type_of_num v.it) + | NumResult (LitPat v) -> Values.type_of_value v.it + | NumResult (NanPat v) -> Types.NumType (Values.type_of_num v.it) | SimdResult (_, _) -> Types.NumType Types.V128Type | RefResult t -> Types.RefType t let string_of_num_pat (p : num_pat) = - match p.it with + match p with | LitPat v -> Values.string_of_value v.it | NanPat nanop -> match nanop.it with @@ -361,7 +361,7 @@ let run_action act : Values.value list = let assert_num_pat at v p = let open Values in - match p.it with + match p with | (LitPat v') -> v <> v'.it | (NanPat nanop) -> match nanop.it, v with @@ -384,46 +384,25 @@ let assert_result at got expect = | NumResult v' -> assert_num_pat at v v' | SimdResult (shape, vs) -> begin - let open Simd in - match shape, v with - | I8x16, Num (V128 v) -> - List.exists2 - (fun v r -> assert_num_pat at v r) - (List.init 16 (fun i -> Num (I32 (V128.I8x16.extract_lane_s i v)))) - vs - | I16x8, Num (V128 v) -> - List.exists2 - (fun v r -> assert_num_pat at v r) - (List.init 8 (fun i -> Num (I32 (V128.I16x8.extract_lane_s i v)))) - vs - | I32x4, Num (V128 v) -> - let l0 = Num (I32 (V128.I32x4.extract_lane_s 0 v)) in - let l1 = Num (I32 (V128.I32x4.extract_lane_s 1 v)) in - let l2 = Num (I32 (V128.I32x4.extract_lane_s 2 v)) in - let l3 = Num (I32 (V128.I32x4.extract_lane_s 3 v)) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1; l2; l3] vs - | I64x2, Num (V128 v) -> - List.exists2 - (fun v r -> assert_num_pat at v r) - (List.init 2 (fun i -> Num (I64 (V128.I64x2.extract_lane_s i v)))) - vs - | F32x4, Num (V128 v) -> - let l0 = Num (F32 (V128.F32x4.extract_lane 0 v)) in - let l1 = Num (F32 (V128.F32x4.extract_lane 1 v)) in - let l2 = Num (F32 (V128.F32x4.extract_lane 2 v)) in - let l3 = Num (F32 (V128.F32x4.extract_lane 3 v)) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1; l2; l3] vs - | F64x2, Num (V128 v) -> - let l0 = Num (F64 (V128.F64x2.extract_lane 0 v)) in - let l1 = Num (F64 (V128.F64x2.extract_lane 1 v)) in - List.exists2 (fun v r -> - assert_num_pat at v r - ) [l0; l1] vs - | _ -> failwith "impossible" + let open Simd in + let assert_simd_result to_num extract v = + List.exists2 + (assert_num_pat at) + (List.init (lanes shape) (fun i -> Num (to_num (extract i v)))) vs in + match shape, v with + | I8x16, Num (V128 v) -> + assert_simd_result I32Num.to_num V128.I8x16.extract_lane_s v + | I16x8, Num (V128 v) -> + assert_simd_result I32Num.to_num V128.I16x8.extract_lane_s v + | I32x4, Num (V128 v) -> + assert_simd_result I32Num.to_num V128.I32x4.extract_lane_s v + | I64x2, Num (V128 v) -> + assert_simd_result I64Num.to_num V128.I64x2.extract_lane_s v + | F32x4, Num (V128 v) -> + assert_simd_result F32Num.to_num V128.F32x4.extract_lane v + | F64x2, Num (V128 v) -> + assert_simd_result F64Num.to_num V128.F64x2.extract_lane v + | _ -> failwith "impossible" end | RefResult t -> (match t, v with diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 0bc9ffd585..1c2c7263ef 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -18,8 +18,7 @@ type nanop = nanop' Source.phrase and nanop' = (Lib.void, Lib.void, nan, nan, Lib.void) Values.op and nan = CanonicalNan | ArithmeticNan -type num_pat = num_pat' Source.phrase -and num_pat' = +type num_pat = | LitPat of literal | NanPat of nanop diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 2ffec7518f..ced3404255 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -813,7 +813,7 @@ let result_simd mode res shape pats = (* A different text generation for SIMD, since the literals within * a SimdResult do not need the i32.const instruction *) let num_pat mode res = - match res.it with + match res with | LitPat lit -> literal mode lit (Some shape) | NanPat {it = Values.F32 n; _} | NanPat {it = Values.F64 n; _} -> nan n @@ -826,7 +826,7 @@ let result_simd mode res shape pats = let result mode res = match res.it with | SimdResult (shape, pats) -> result_simd mode res shape pats - | NumResult n -> result_numpat mode n.it + | NumResult n -> result_numpat mode n | RefResult t -> Node ("ref." ^ refed_type t, []) let assertion mode ass = diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 6c2f50806f..98e37d04a9 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -51,20 +51,20 @@ let simd_literal shape ss at = let simd_lane_nan shape l at = let open Simd in match shape with - | F32x4 -> NanPat (Values.F32 l @@ at) @@ at - | F64x2 -> NanPat (Values.F64 l @@ at) @@ at + | F32x4 -> NanPat (Values.F32 l @@ at) + | F64x2 -> NanPat (Values.F64 l @@ at) | _ -> error at "invalid simd constant" let simd_lane_lit shape l at = let open Simd in let open Values in match shape with - | I8x16 -> LitPat (Num (I32 (I8.of_string l)) @@ at) @@ at - | I16x8 -> LitPat (Num (I32 (I16.of_string l)) @@ at) @@ at - | I32x4 -> LitPat (Num (I32 (I32.of_string l)) @@ at) @@ at - | I64x2 -> LitPat (Num (I64 (I64.of_string l)) @@ at) @@ at - | F32x4 -> LitPat (Num (F32 (F32.of_string l)) @@ at) @@ at - | F64x2 -> LitPat (Num (F64 (F64.of_string l)) @@ at) @@ at + | I8x16 -> LitPat (Num (I32 (I8.of_string l)) @@ at) + | I16x8 -> LitPat (Num (I32 (I16.of_string l)) @@ at) + | I32x4 -> LitPat (Num (I32 (I32.of_string l)) @@ at) + | I64x2 -> LitPat (Num (I64 (I64.of_string l)) @@ at) + | F32x4 -> LitPat (Num (F32 (F32.of_string l)) @@ at) + | F64x2 -> LitPat (Num (F64 (F64.of_string l)) @@ at) let simd_lane_index s at = match int_of_string s with @@ -1127,8 +1127,8 @@ numpat_list: | numpat numpat_list { $1 :: $2 } result : - | const { NumResult (LitPat $1 @@ at ()) @@ at () } - | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3)) @@ at ()) @@ at () } + | const { NumResult (LitPat $1) @@ at () } + | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3))) @@ at () } | LPAR REF_FUNC RPAR { RefResult FuncRefType @@ at () } | LPAR REF_EXTERN RPAR { RefResult ExternRefType @@ at () } | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { From 01b412772a95e130aaf4a4cc350b5725a802a732 Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Tue, 23 Mar 2021 09:45:17 +0100 Subject: [PATCH 345/378] Update SpiderMonkey implementation status --- proposals/simd/ImplementationStatus.md | 92 +++++++++++++------------- 1 file changed, 46 insertions(+), 46 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 2f24cf6281..39059713c0 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -128,7 +128,7 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.q15mulr_sat_s` | | | | | | +| `i16x8.q15mulr_sat_s` | | | | | :heavy_check_mark: | | `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -148,21 +148,21 @@ | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.eq` | | | | | | -| `i64x2.abs` | | | | | | +| `i64x2.eq` | | | | | :heavy_check_mark: | +| `i64x2.abs` | | | | | :heavy_check_mark: | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | | | | | | -| `i64x2.bitmask` | | :heavy_check_mark: | | | | +| `i64x2.all_true` | | | | | :heavy_check_mark: | +| `i64x2.bitmask` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_u` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.extend_low_i32x4_s` | | | | | | -| `i64x2.extend_high_i32x4_s` | | | | | | -| `i64x2.extend_low_i32x4_u` | | | | | | -| `i64x2.extend_high_i32x4_u` | | | | | | +| `i64x2.extend_low_i32x4_s` | | | | | :heavy_check_mark: | +| `i64x2.extend_high_i32x4_s` | | | | | :heavy_check_mark: | +| `i64x2.extend_low_i32x4_u` | | | | | :heavy_check_mark: | +| `i64x2.extend_high_i32x4_u` | | | | | :heavy_check_mark: | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -199,43 +199,43 @@ | `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | | -| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | | -| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | | -| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | | -| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | | -| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | | -| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | | -| `v128.any_true` | | | | | | -| `v128.load8_lane` | | | | | | -| `v128.load16_lane` | | | | | | -| `v128.load32_lane` | | | | | | -| `v128.load64_lane` | | | | | | -| `v128.store8_lane` | | | | | | -| `v128.store16_lane` | | | | | | -| `v128.store32_lane` | | | | | | -| `v128.store64_lane` | | | | | | -| `i64x2.ne` | | | | | | -| `f64x2.convert_low_i32x4_s` | | | | | | -| `f64x2.convert_low_i32x4_u` | | | | | | -| `i32x4.trunc_sat_f64x2_s_zero` | | | | | | -| `i32x4.trunc_sat_f64x2_u_zero` | | | | | | -| `f32x4.demote_f64x2_zero` | | | | | | -| `f64x2.promote_low_f32x4` | | | | | | -| `i8x16.popcnt` | | | | | | -| `i16x8.extadd_pairwise_i8x16_s` | | | | | | -| `i16x8.extadd_pairwise_i8x16_u` | | | | | | -| `i32x4.extadd_pairwise_i16x8_s` | | | | | | -| `i32x4.extadd_pairwise_i16x8_u` | | | | | | -| `i64x2.lt_s` | | | | | | -| `i64x2.gt_s` | | | | | | -| `i64x2.le_s` | | | | | | -| `i64x2.ge_s` | | | | | | +| `i16x8.extmul_low_i8x16_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_high_i8x16_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_low_i8x16_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extmul_high_i8x16_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extmul_low_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extmul_high_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extmul_low_i16x8_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extmul_high_i16x8_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extmul_low_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.any_true` | | | | | :heavy_check_mark: | +| `v128.load8_lane` | | | | | :heavy_check_mark: | +| `v128.load16_lane` | | | | | :heavy_check_mark: | +| `v128.load32_lane` | | | | | :heavy_check_mark: | +| `v128.load64_lane` | | | | | :heavy_check_mark: | +| `v128.store8_lane` | | | | | :heavy_check_mark: | +| `v128.store16_lane` | | | | | :heavy_check_mark: | +| `v128.store32_lane` | | | | | :heavy_check_mark: | +| `v128.store64_lane` | | | | | :heavy_check_mark: | +| `i64x2.ne` | | | | | :heavy_check_mark: | +| `f64x2.convert_low_i32x4_s` | | | | | :heavy_check_mark: | +| `f64x2.convert_low_i32x4_u` | | | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f64x2_s_zero` | | | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f64x2_u_zero` | | | | | :heavy_check_mark: | +| `f32x4.demote_f64x2_zero` | | | | | :heavy_check_mark: | +| `f64x2.promote_low_f32x4` | | | | | :heavy_check_mark: | +| `i8x16.popcnt` | | | | | :heavy_check_mark: | +| `i16x8.extadd_pairwise_i8x16_s` | | | | | :heavy_check_mark: | +| `i16x8.extadd_pairwise_i8x16_u` | | | | | :heavy_check_mark: | +| `i32x4.extadd_pairwise_i16x8_s` | | | | | :heavy_check_mark: | +| `i32x4.extadd_pairwise_i16x8_u` | | | | | :heavy_check_mark: | +| `i64x2.lt_s` | | | | | :heavy_check_mark: | +| `i64x2.gt_s` | | | | | :heavy_check_mark: | +| `i64x2.le_s` | | | | | :heavy_check_mark: | +| `i64x2.ge_s` | | | | | :heavy_check_mark: | [1] Tip of tree LLVM as of May 20, 2020 From a65385e7101446c66a5a07f59c2d762b4fb9139c Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Wed, 24 Mar 2021 15:13:42 -0700 Subject: [PATCH 346/378] Convert simd instructions in index to use hex This follows the recent additions of ref types instructions, which uses hex. It also makes it more consistent which the opcode prefix, which is in hex. --- .../core/appendix/gen-index-instructions.py | 472 ++++---- document/core/appendix/index-instructions.rst | 1036 ++++++++--------- 2 files changed, 754 insertions(+), 754 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index d8c46fe13d..8b0e32e404 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -339,242 +339,242 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~5', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), Instruction(r'\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}', r'\hex{FC}~~6', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'), Instruction(r'\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~7', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'), - Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~0', r'[\I32] \to [\V128]', r'valid-load', r'exec-load'), - Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~1', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~2', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~3', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~4', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~5', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~6', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), - Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~7', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), - Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~8', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), - Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~9', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), - Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~10', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), - Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~11', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), - Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~12', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), - Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~13', r'[\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), - Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~14', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), - Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~15', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~16', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~17', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~18', r'[\I64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~19', r'[\F32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~20', r'[\F64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~21', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~22', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~23', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~24', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~25', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~26', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~27', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~28', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~29', r'[\V128] \to [\I64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~30', r'[\V128~\I64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~31', r'[\V128] \to [\F32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~32', r'[\V128~\F32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~33', r'[\V128] \to [\F64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~34', r'[\V128~\F64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~35', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I8X16.\VNE', r'\hex{FD}~~36', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~37', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~38', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~39', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~40', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~41', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~42', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~43', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~44', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~45', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I16X8.\VNE', r'\hex{FD}~~46', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~47', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~48', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~49', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~50', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~51', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~52', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~53', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~54', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~55', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I32X4.\VNE', r'\hex{FD}~~56', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~57', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~58', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~59', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~60', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~61', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~62', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~63', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~64', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~65', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F32X4.\VNE', r'\hex{FD}~~66', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F32X4.\VLT', r'\hex{FD}~~67', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F32X4.\VGT', r'\hex{FD}~~68', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F32X4.\VLE', r'\hex{FD}~~69', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F32X4.\VGE', r'\hex{FD}~~70', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), - Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~71', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F64X2.\VNE', r'\hex{FD}~~72', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F64X2.\VLT', r'\hex{FD}~~73', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F64X2.\VGT', r'\hex{FD}~~74', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F64X2.\VLE', r'\hex{FD}~~75', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F64X2.\VGE', r'\hex{FD}~~76', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), - Instruction(r'\V128.\VNOT', r'\hex{FD}~~77', r'[\V128] \to [\V128]', r'valid-vsunop', r'exec-vsunop', r'op-inot'), - Instruction(r'\V128.\VAND', r'\hex{FD}~~78', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iand'), - Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~79', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iandnot'), - Instruction(r'\V128.\VOR', r'\hex{FD}~~80', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), - Instruction(r'\V128.\VXOR', r'\hex{FD}~~81', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), - Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~82', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), - Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~83', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), - Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~84', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~85', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~86', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\LOAD\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~87', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), - Instruction(r'\V128.\STORE\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~88', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~89', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~90', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~91', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), - Instruction(r'\V128.\LOAD\K{32\_zero}~\memarg~\laneidx', r'\hex{FD}~~92', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), - Instruction(r'\V128.\LOAD\K{64\_zero}~\memarg~\laneidx', r'\hex{FD}~~93', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), - Instruction(r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}', r'\hex{FD}~~94', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-demote'), - Instruction(r'\F64X2.\VPROMOTE\K{\_low\_f32x4}', r'\hex{FD}~~95', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-promote'), - Instruction(r'\I8X16.\VABS', r'\hex{FD}~~96', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), - Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~97', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~98', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), - Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~99', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), - Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~100', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~101', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~102', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\F32X4.\VCEIL', r'\hex{FD}~~103', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), - Instruction(r'\F32X4.\VFLOOR', r'\hex{FD}~~104', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), - Instruction(r'\F32X4.\VTRUNC', r'\hex{FD}~~105', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), - Instruction(r'\F32X4.\VNEAREST', r'\hex{FD}~~106', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), - Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~107', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~108', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~109', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), - Instruction(r'\I8X16.\VADD', r'\hex{FD}~~110', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), - Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~111', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), - Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~112', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), - Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~113', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), - Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~114', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), - Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~115', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), - Instruction(r'\F64X2.\VCEIL', r'\hex{FD}~~116', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), - Instruction(r'\F64X2.\VFLOOR', r'\hex{FD}~~117', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), - Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~118', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), - Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~119', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), - Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~120', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), - Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~121', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), - Instruction(r'\F64X2.\VTRUNC', r'\hex{FD}~~122', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), - Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~123', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~124', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~125', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~126', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~127', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I16X8.\VABS', r'\hex{FD}~~128', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), - Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~129', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~130', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), - Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~131', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), - Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~132', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~133', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~134', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~135', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~136', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~137', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~138', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~139', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~140', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~141', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), - Instruction(r'\I16X8.\VADD', r'\hex{FD}~~142', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), - Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~143', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), - Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~144', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), - Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~145', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), - Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~146', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), - Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~147', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), - Instruction(r'\F64X2.\VNEAREST', r'\hex{FD}~~148', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), - Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~149', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), - Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~150', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), - Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~151', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), - Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~152', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), - Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~153', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), - Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~155', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~156', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~157', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~158', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~159', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\VABS', r'\hex{FD}~~160', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), - Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~161', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~163', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), - Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~164', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~167', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~168', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~169', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~170', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~171', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~172', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~173', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), - Instruction(r'\I32X4.\VADD', r'\hex{FD}~~174', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), - Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~177', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), - Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~181', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), - Instruction(r'\I32X4.\VMIN\K{\_s}', r'\hex{FD}~~182', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), - Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~183', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), - Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~184', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), - Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~185', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), - Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~186', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~188', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~189', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~190', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~191', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\VABS', r'\hex{FD}~~192', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), - Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~193', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~195', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), - Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~196', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~199', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~200', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~201', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~202', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~203', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~204', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~205', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), - Instruction(r'\I64X2.\VADD', r'\hex{FD}~~206', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), - Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~209', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), - Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~213', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), - Instruction(r'\I64X2.\VEQ', r'\hex{FD}~~214', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I64X2.\VNE', r'\hex{FD}~~215', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I64X2.\VLT\K{\_s}', r'\hex{FD}~~216', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~217', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~218', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~219', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~220', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~221', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~222', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~223', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\F32X4.\VABS', r'\hex{FD}~~224', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), - Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~225', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), - Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~227', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), - Instruction(r'\F32X4.\VADD', r'\hex{FD}~~228', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), - Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~229', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), - Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~230', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), - Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~231', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), - Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~232', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), - Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~233', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), - Instruction(r'\F32X4.\VPMIN', r'\hex{FD}~~234', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), - Instruction(r'\F32X4.\VPMAX', r'\hex{FD}~~235', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), - Instruction(r'\F64X2.\VABS', r'\hex{FD}~~236', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), - Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~237', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), - Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~239', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), - Instruction(r'\F64X2.\VADD', r'\hex{FD}~~240', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), - Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~241', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), - Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~242', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), - Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~243', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), - Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~244', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), - Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~245', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), - Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~246', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), - Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~247', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~248', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), - Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~249', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~250', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~251', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), - Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~252', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), - Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~253', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), - Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~254', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), - Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_u}', r'\hex{FD}~~255', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\V128.\LOAD~\memarg', r'\hex{FD}~~\hex{00}', r'[\I32] \to [\V128]', r'valid-load', r'exec-load'), + Instruction(r'\I16X8.\LOAD\K{8x8\_s}~\memarg', r'\hex{FD}~~\hex{01}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I16X8.\LOAD\K{8x8\_u}~\memarg', r'\hex{FD}~~\hex{02}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I32X4.\LOAD\K{16x4\_s}~\memarg', r'\hex{FD}~~\hex{03}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I32X4.\LOAD\K{16x4\_u}~\memarg', r'\hex{FD}~~\hex{04}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I64X2.\LOAD\K{32x2\_s}~\memarg', r'\hex{FD}~~\hex{05}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I64X2.\LOAD\K{32x2\_u}~\memarg', r'\hex{FD}~~\hex{06}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'), + Instruction(r'\I8X16.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{07}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I16X8.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{08}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I32X4.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{09}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{0A}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), + Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~\hex{0B}', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), + Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~\hex{0C}', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), + Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~\hex{0D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), + Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~\hex{0E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), + Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~\hex{0F}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~\hex{10}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~\hex{11}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~\hex{12}', r'[\I64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~\hex{13}', r'[\F32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~\hex{14}', r'[\F64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{15}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{16}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{17}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{18}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{19}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1A}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1B}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1C}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1D}', r'[\V128] \to [\I64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1E}', r'[\V128~\I64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1F}', r'[\V128] \to [\F32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{20}', r'[\V128~\F32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{21}', r'[\V128] \to [\F64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), + Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{22}', r'[\V128~\F64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~\hex{26}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~\hex{27}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~\hex{28}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~\hex{29}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~\hex{2A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~\hex{2B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~\hex{2C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~\hex{2D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I16X8.\VNE', r'\hex{FD}~~\hex{2E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~\hex{2F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~\hex{30}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~\hex{31}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~\hex{32}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~\hex{33}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~\hex{34}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~\hex{35}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~\hex{36}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~\hex{37}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I32X4.\VNE', r'\hex{FD}~~\hex{38}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~\hex{39}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~\hex{3A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), + Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~\hex{3B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~\hex{3C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), + Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~\hex{3D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~\hex{3E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), + Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~\hex{3F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~\hex{40}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), + Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~\hex{41}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), + Instruction(r'\F32X4.\VNE', r'\hex{FD}~~\hex{42}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), + Instruction(r'\F32X4.\VLT', r'\hex{FD}~~\hex{43}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), + Instruction(r'\F32X4.\VGT', r'\hex{FD}~~\hex{44}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), + Instruction(r'\F32X4.\VLE', r'\hex{FD}~~\hex{45}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), + Instruction(r'\F32X4.\VGE', r'\hex{FD}~~\hex{46}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~\hex{47}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), + Instruction(r'\F64X2.\VNE', r'\hex{FD}~~\hex{48}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), + Instruction(r'\F64X2.\VLT', r'\hex{FD}~~\hex{49}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), + Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), + Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), + Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\V128.\VNOT', r'\hex{FD}~~\hex{4D}', r'[\V128] \to [\V128]', r'valid-vsunop', r'exec-vsunop', r'op-inot'), + Instruction(r'\V128.\VAND', r'\hex{FD}~~\hex{4E}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iand'), + Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~\hex{4F}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iandnot'), + Instruction(r'\V128.\VOR', r'\hex{FD}~~\hex{50}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), + Instruction(r'\V128.\VXOR', r'\hex{FD}~~\hex{51}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), + Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~\hex{52}', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~\hex{53}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{54}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{55}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{56}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\LOAD\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{57}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), + Instruction(r'\V128.\STORE\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{58}', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{59}', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{5A}', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{5B}', r'[\I32~\V128] \to [\V128]', r'valid-store-lane', r'exec-store-lane'), + Instruction(r'\V128.\LOAD\K{32\_zero}~\memarg~\laneidx', r'\hex{FD}~~\hex{5C}', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), + Instruction(r'\V128.\LOAD\K{64\_zero}~\memarg~\laneidx', r'\hex{FD}~~\hex{5D}', r'[\I32] \to [\V128]', r'valid-load-zero', r'exec-load-zero'), + Instruction(r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}', r'\hex{FD}~~\hex{5E}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-demote'), + Instruction(r'\F64X2.\VPROMOTE\K{\_low\_f32x4}', r'\hex{FD}~~\hex{5F}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-promote'), + Instruction(r'\I8X16.\VABS', r'\hex{FD}~~\hex{60}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~\hex{61}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~\hex{62}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), + Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~\hex{63}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~\hex{64}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~\hex{65}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~\hex{66}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\F32X4.\VCEIL', r'\hex{FD}~~\hex{67}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), + Instruction(r'\F32X4.\VFLOOR', r'\hex{FD}~~\hex{68}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), + Instruction(r'\F32X4.\VTRUNC', r'\hex{FD}~~\hex{69}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), + Instruction(r'\F32X4.\VNEAREST', r'\hex{FD}~~\hex{6A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), + Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~\hex{6B}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~\hex{6C}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~\hex{6D}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I8X16.\VADD', r'\hex{FD}~~\hex{6E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~\hex{6F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), + Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~\hex{70}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), + Instruction(r'\I8X16.\VSUB', r'\hex{FD}~~\hex{71}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I8X16.\VSUB\K{\_sat\_s}', r'\hex{FD}~~\hex{72}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), + Instruction(r'\I8X16.\VSUB\K{\_sat\_u}', r'\hex{FD}~~\hex{73}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\F64X2.\VCEIL', r'\hex{FD}~~\hex{74}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), + Instruction(r'\F64X2.\VFLOOR', r'\hex{FD}~~\hex{75}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), + Instruction(r'\I8X16.\VMIN\K{\_s}', r'\hex{FD}~~\hex{76}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I8X16.\VMIN\K{\_u}', r'\hex{FD}~~\hex{77}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I8X16.\VMAX\K{\_s}', r'\hex{FD}~~\hex{78}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~\hex{79}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\F64X2.\VTRUNC', r'\hex{FD}~~\hex{7A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), + Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~\hex{7B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~\hex{7C}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~\hex{7D}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~\hex{7E}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~\hex{7F}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I16X8.\VABS', r'\hex{FD}~~\hex{80}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~\hex{81}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~\hex{82}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), + Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~\hex{83}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~\hex{84}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~\hex{85}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~\hex{86}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{87}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{88}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{89}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{8A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~\hex{8B}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~\hex{8C}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~\hex{8D}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I16X8.\VADD', r'\hex{FD}~~\hex{8E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~\hex{8F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), + Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~\hex{90}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), + Instruction(r'\I16X8.\VSUB', r'\hex{FD}~~\hex{91}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I16X8.\VSUB\K{\_sat\_s}', r'\hex{FD}~~\hex{92}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_s'), + Instruction(r'\I16X8.\VSUB\K{\_sat\_u}', r'\hex{FD}~~\hex{93}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub_sat_u'), + Instruction(r'\F64X2.\VNEAREST', r'\hex{FD}~~\hex{94}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), + Instruction(r'\I16X8.\VMUL', r'\hex{FD}~~\hex{95}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I16X8.\VMIN\K{\_s}', r'\hex{FD}~~\hex{96}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I16X8.\VMIN\K{\_u}', r'\hex{FD}~~\hex{97}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~\hex{98}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~\hex{99}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~\hex{9B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{9C}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{9D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{9E}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{9F}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\VABS', r'\hex{FD}~~\hex{A0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~\hex{A1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~\hex{A3}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~\hex{A4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{A7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{A8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{A9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{AA}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~\hex{AB}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~\hex{AC}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~\hex{AD}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I32X4.\VADD', r'\hex{FD}~~\hex{AE}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~\hex{B1}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~\hex{B5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I32X4.\VMIN\K{\_s}', r'\hex{FD}~~\hex{B6}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_s'), + Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~\hex{B7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), + Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~\hex{B8}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), + Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~\hex{B9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), + Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~\hex{BA}', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{BC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{BD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{BE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{BF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\VABS', r'\hex{FD}~~\hex{C0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), + Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~\hex{C1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), + Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~\hex{C3}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~\hex{C4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{C7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{C8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{C9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{CA}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), + Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~\hex{CB}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), + Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~\hex{CC}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), + Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~\hex{CD}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I64X2.\VADD', r'\hex{FD}~~\hex{CE}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), + Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~\hex{D1}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), + Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~\hex{D5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), + Instruction(r'\I64X2.\VEQ', r'\hex{FD}~~\hex{D6}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), + Instruction(r'\I64X2.\VNE', r'\hex{FD}~~\hex{D7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), + Instruction(r'\I64X2.\VLT\K{\_s}', r'\hex{FD}~~\hex{D8}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), + Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~\hex{D9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), + Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~\hex{DA}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), + Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~\hex{DB}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{DC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{DD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{DE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{DF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\F32X4.\VABS', r'\hex{FD}~~\hex{E0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), + Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~\hex{E1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), + Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~\hex{E3}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F32X4.\VADD', r'\hex{FD}~~\hex{E4}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), + Instruction(r'\F32X4.\VSUB', r'\hex{FD}~~\hex{E5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), + Instruction(r'\F32X4.\VMUL', r'\hex{FD}~~\hex{E6}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), + Instruction(r'\F32X4.\VDIV', r'\hex{FD}~~\hex{E7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), + Instruction(r'\F32X4.\VMIN', r'\hex{FD}~~\hex{E8}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), + Instruction(r'\F32X4.\VMAX', r'\hex{FD}~~\hex{E9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\F32X4.\VPMIN', r'\hex{FD}~~\hex{EA}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), + Instruction(r'\F32X4.\VPMAX', r'\hex{FD}~~\hex{EB}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), + Instruction(r'\F64X2.\VABS', r'\hex{FD}~~\hex{EC}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), + Instruction(r'\F64X2.\VNEG', r'\hex{FD}~~\hex{ED}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), + Instruction(r'\F64X2.\VSQRT', r'\hex{FD}~~\hex{EF}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), + Instruction(r'\F64X2.\VADD', r'\hex{FD}~~\hex{F0}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fadd'), + Instruction(r'\F64X2.\VSUB', r'\hex{FD}~~\hex{F1}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fsub'), + Instruction(r'\F64X2.\VMUL', r'\hex{FD}~~\hex{F2}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmul'), + Instruction(r'\F64X2.\VDIV', r'\hex{FD}~~\hex{F3}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fdiv'), + Instruction(r'\F64X2.\VMIN', r'\hex{FD}~~\hex{F4}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmin'), + Instruction(r'\F64X2.\VMAX', r'\hex{FD}~~\hex{F5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fmax'), + Instruction(r'\F64X2.\VPMIN', r'\hex{FD}~~\hex{F6}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmin'), + Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~\hex{F7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~\hex{F8}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~\hex{F9}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~\hex{FA}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~\hex{FB}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~\hex{FC}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), + Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~\hex{FD}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{FE}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{FF}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), ] diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 40ec5a4ebc..1ff8867f30 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,521 +6,521 @@ Index of Instructions --------------------- -================================================= ========================= ============================================= ============================================= ================================================================== -Instruction Binary Opcode Type Validation Execution -================================================= ========================= ============================================= ============================================= ================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\SELECT~t` :math:`\hex{1C}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGET~x` :math:`\hex{25}` :math:`[\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\TABLESET~x` :math:`\hex{26}` :math:`[\I32~t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{05}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{06}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{07}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\MEMORYINIT~x` :math:`\hex{FC}~\hex{08}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\DATADROP~x` :math:`\hex{FC}~\hex{09}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYCOPY` :math:`\hex{FC}~\hex{0A}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYFILL` :math:`\hex{FC}~\hex{0B}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEINIT~x~y` :math:`\hex{FC}~\hex{0C}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~0` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~1` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~2` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~3` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~4` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~5` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~6` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~7` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~8` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~9` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~10` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~11` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~12` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~13` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~14` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~15` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~16` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~17` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~18` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~19` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~20` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~21` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~22` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~23` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~24` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~25` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~26` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~27` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~28` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~29` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~30` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~31` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~32` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~33` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~34` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~35` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~36` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~37` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~38` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~39` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~40` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~41` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~42` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~43` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~44` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~45` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~46` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~47` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~48` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~49` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~50` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~51` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~52` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~53` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~54` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~55` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~56` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~57` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~58` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~59` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~60` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~61` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~62` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~63` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~64` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~65` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~66` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~67` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~68` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~69` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~70` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~71` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~72` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~73` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~74` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~75` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~76` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~77` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~78` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~79` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~80` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~81` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~82` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~83` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~84` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~85` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~86` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~87` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~88` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~89` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~90` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~91` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~92` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~93` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~94` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~95` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~96` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~97` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~98` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~99` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~100` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~101` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~102` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~103` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~104` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~105` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~106` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~107` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~108` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~109` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~110` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~111` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~112` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~113` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~114` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~115` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~116` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~117` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~118` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~119` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~120` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~121` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~122` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~123` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~124` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~125` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~126` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~127` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~128` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~129` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~130` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~131` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~132` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~133` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~134` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~135` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~136` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~137` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~138` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~139` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~140` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~141` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~142` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~143` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~144` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~145` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~146` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~147` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~148` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~149` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~150` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~151` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~152` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~153` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~155` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~156` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~157` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~158` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~159` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~160` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~161` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~163` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~164` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~167` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~168` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~169` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~170` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~171` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~172` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~173` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~174` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~177` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~181` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~182` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~183` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~184` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~185` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~186` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~188` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~189` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~190` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~191` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~192` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~193` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~195` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~196` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~199` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~200` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~201` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~202` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~203` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~204` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~205` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~206` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~209` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~213` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~214` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~215` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~216` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~217` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~218` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~219` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~220` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~221` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~222` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~223` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~224` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~225` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~227` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~228` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~229` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~230` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~231` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMIN` :math:`\hex{FD}~~232` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMAX` :math:`\hex{FD}~~233` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~234` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~235` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VABS` :math:`\hex{FD}~~236` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEG` :math:`\hex{FD}~~237` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~239` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VADD` :math:`\hex{FD}~~240` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~241` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~242` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~243` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~244` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~245` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~246` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~247` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~248` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~249` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~250` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~251` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~252` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~253` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~254` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~255` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -================================================= ========================= ============================================= ============================================= ================================================================== +================================================= ========================== ============================================= ============================================= ================================================================== +Instruction Binary Opcode Type Validation Execution +================================================= ========================== ============================================= ============================================= ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` 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` :ref:`execution ` +:math:`\TABLEGET~x` :math:`\hex{25}` :math:`[\I32] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\TABLESET~x` :math:`\hex{26}` :math:`[\I32~t] \to []` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{27}` +:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` 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:math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{05}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{06}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{07}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\MEMORYINIT~x` :math:`\hex{FC}~\hex{08}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\DATADROP~x` :math:`\hex{FC}~\hex{09}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYCOPY` :math:`\hex{FC}~\hex{0A}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYFILL` :math:`\hex{FC}~\hex{0B}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEINIT~x~y` :math:`\hex{FC}~\hex{0C}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~\hex{00}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~\hex{0E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~\hex{0F}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~\hex{10}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~\hex{11}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~\hex{12}` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~\hex{13}` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~\hex{14}` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{15}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{16}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{17}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{18}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{19}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1A}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1B}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1D}` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1E}` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1F}` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{20}` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{21}` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{22}` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VEQ` :math:`\hex{FD}~~\hex{23}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNE` :math:`\hex{FD}~~\hex{24}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{25}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{26}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{27}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{28}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{29}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{2A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{2B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{2C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~\hex{2D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~\hex{2E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{2F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{30}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{31}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{32}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{33}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{34}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{35}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{36}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~\hex{37}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~\hex{38}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{39}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{3A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{3B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{3C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{3D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{3E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{3F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{40}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~\hex{41}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~\hex{42}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~\hex{43}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~\hex{44}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~\hex{45}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~\hex{46}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~\hex{47}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~\hex{48}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~\hex{49}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{57}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{58}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{59}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5A}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5B}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5C}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5D}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~\hex{5E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~\hex{5F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~\hex{60}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~\hex{61}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~\hex{62}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~\hex{63}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~\hex{64}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{65}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{66}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~\hex{67}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~\hex{71}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{72}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{73}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~\hex{74}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~\hex{75}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{76}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{77}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{78}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{79}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~\hex{7A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{7B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~\hex{7C}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~\hex{7D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{7E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{7F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~\hex{80}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~\hex{81}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~\hex{82}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~\hex{83}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~\hex{84}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{85}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{86}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{87}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~\hex{91}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{92}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{93}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~\hex{94}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~\hex{95}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{96}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{97}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{98}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{99}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{9B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{9C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{9D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{9E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{9F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~\hex{A0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~\hex{A1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~\hex{A3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~\hex{A4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{A7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{B6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{B7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{B8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{B9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{BA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{BC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{BD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{BE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{BF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~\hex{C0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~\hex{C1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~\hex{C3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~\hex{C4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{C7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~\hex{D6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~\hex{D7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{D8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{D9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{DA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{DB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{DC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{DD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{DE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{DF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~\hex{E0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~\hex{E1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~\hex{E3}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~\hex{E4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~\hex{E5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~\hex{E6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~\hex{E7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~\hex{E8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~\hex{E9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~\hex{EA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~\hex{EB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~\hex{EC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~\hex{ED}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~\hex{EF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~\hex{F0}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~\hex{F1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~\hex{F2}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~\hex{F3}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~\hex{F4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~\hex{F5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~\hex{F6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{FF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +================================================= ========================== ============================================= ============================================= ================================================================== From 5580da2eac48f8871cd1adc8f1b7725eed54c8d6 Mon Sep 17 00:00:00 2001 From: Andrew Brown Date: Fri, 26 Mar 2021 11:06:19 -0700 Subject: [PATCH 347/378] Improve simd_i64x2_cmp.wast Fixes #487 by flipping the operands of the `ge_s` and `le_s` tests. This change makes immediately clear when an x86 implementation incorrectly uses the XMM registers; without these tests, running the SIMD suite could pass with an incorrect implementation. --- test/core/simd/meta/simd_i64x2_cmp.py | 2 ++ test/core/simd/simd_i64x2_cmp.wast | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/test/core/simd/meta/simd_i64x2_cmp.py b/test/core/simd/meta/simd_i64x2_cmp.py index 7eca6e27a7..35089efe15 100644 --- a/test/core/simd/meta/simd_i64x2_cmp.py +++ b/test/core/simd/meta/simd_i64x2_cmp.py @@ -136,6 +136,7 @@ def get_case_data(self): # dec vs dec case_data.append(['#', 'dec vs dec']) case_data.append(['le_s', ['-1', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['le_s', [['0', '0'], ['0', '-1']], ['-1', '0'], ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['le_s', ['0', '0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['le_s', ['18446744073709551615', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['le_s', ['18446744073709551615', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) @@ -222,6 +223,7 @@ def get_case_data(self): # dec vs dec case_data.append(['#', 'dec vs dec']) case_data.append(['ge_s', ['-1', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) + case_data.append(['ge_s', [['-1', '-1'], ['0', '-1']], ['0', '-1'], ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['ge_s', ['0', '0'], '-1', ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['ge_s', ['18446744073709551615', '18446744073709551615'], '-1', ['i64x2', 'i64x2', 'i64x2']]) case_data.append(['ge_s', ['18446744073709551615', '-1'], '-1', ['i64x2', 'i64x2', 'i64x2']]) diff --git a/test/core/simd/simd_i64x2_cmp.wast b/test/core/simd/simd_i64x2_cmp.wast index 4dd4282206..50e58b64b1 100644 --- a/test/core/simd/simd_i64x2_cmp.wast +++ b/test/core/simd/simd_i64x2_cmp.wast @@ -192,6 +192,9 @@ (assert_return (invoke "le_s" (v128.const i64x2 -1 -1) (v128.const i64x2 -1 -1)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "le_s" (v128.const i64x2 0 0) + (v128.const i64x2 0 -1)) + (v128.const i64x2 -1 0)) (assert_return (invoke "le_s" (v128.const i64x2 0 0) (v128.const i64x2 0 0)) (v128.const i64x2 -1 -1)) @@ -342,6 +345,9 @@ (assert_return (invoke "ge_s" (v128.const i64x2 -1 -1) (v128.const i64x2 -1 -1)) (v128.const i64x2 -1 -1)) +(assert_return (invoke "ge_s" (v128.const i64x2 -1 -1) + (v128.const i64x2 0 -1)) + (v128.const i64x2 0 -1)) (assert_return (invoke "ge_s" (v128.const i64x2 0 0) (v128.const i64x2 0 0)) (v128.const i64x2 -1 -1)) From 5fcd0bd65cf27eb22af6d159302dce12872f8ed7 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 22 Apr 2021 09:59:24 -0700 Subject: [PATCH 348/378] Update V8 implementation status --- proposals/simd/ImplementationStatus.md | 78 +++++++++++++------------- 1 file changed, 38 insertions(+), 40 deletions(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 39059713c0..8c19f3a155 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -12,7 +12,7 @@ | `v128.load32_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.load64_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `v128.store` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | :heavy_check_mark: | :heavy_check_mark: | +| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -86,7 +86,7 @@ | `i8x16.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i8x16.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.narrow_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i8x16.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -106,7 +106,7 @@ | `i16x8.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i16x8.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.narrow_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.extend_low_i8x16_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -128,11 +128,11 @@ | `i16x8.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i16x8.avgr_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i16x8.q15mulr_sat_s` | | | | | :heavy_check_mark: | +| `i16x8.q15mulr_sat_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.abs` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: | +| `i32x4.bitmask` | `-munimplemented-simd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.extend_low_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.extend_high_i16x8_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.extend_low_i16x8_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | @@ -148,10 +148,10 @@ | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.eq` | | | | | :heavy_check_mark: | -| `i64x2.abs` | | | | | :heavy_check_mark: | +| `i64x2.eq` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.abs` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | -| `i64x2.all_true` | | | | | :heavy_check_mark: | +| `i64x2.all_true` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.bitmask` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -159,10 +159,10 @@ | `i64x2.add` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.sub` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `i64x2.mul` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | -| `i64x2.extend_low_i32x4_s` | | | | | :heavy_check_mark: | -| `i64x2.extend_high_i32x4_s` | | | | | :heavy_check_mark: | -| `i64x2.extend_low_i32x4_u` | | | | | :heavy_check_mark: | -| `i64x2.extend_high_i32x4_u` | | | | | :heavy_check_mark: | +| `i64x2.extend_low_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extend_high_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extend_low_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.extend_high_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | | `f32x4.abs` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | `f32x4.sqrt` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | @@ -211,40 +211,38 @@ | `i64x2.extmul_high_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.extmul_low_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.extmul_high_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | -| `v128.any_true` | | | | | :heavy_check_mark: | -| `v128.load8_lane` | | | | | :heavy_check_mark: | -| `v128.load16_lane` | | | | | :heavy_check_mark: | -| `v128.load32_lane` | | | | | :heavy_check_mark: | -| `v128.load64_lane` | | | | | :heavy_check_mark: | -| `v128.store8_lane` | | | | | :heavy_check_mark: | -| `v128.store16_lane` | | | | | :heavy_check_mark: | -| `v128.store32_lane` | | | | | :heavy_check_mark: | -| `v128.store64_lane` | | | | | :heavy_check_mark: | -| `i64x2.ne` | | | | | :heavy_check_mark: | -| `f64x2.convert_low_i32x4_s` | | | | | :heavy_check_mark: | -| `f64x2.convert_low_i32x4_u` | | | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f64x2_s_zero` | | | | | :heavy_check_mark: | -| `i32x4.trunc_sat_f64x2_u_zero` | | | | | :heavy_check_mark: | -| `f32x4.demote_f64x2_zero` | | | | | :heavy_check_mark: | -| `f64x2.promote_low_f32x4` | | | | | :heavy_check_mark: | -| `i8x16.popcnt` | | | | | :heavy_check_mark: | -| `i16x8.extadd_pairwise_i8x16_s` | | | | | :heavy_check_mark: | -| `i16x8.extadd_pairwise_i8x16_u` | | | | | :heavy_check_mark: | -| `i32x4.extadd_pairwise_i16x8_s` | | | | | :heavy_check_mark: | -| `i32x4.extadd_pairwise_i16x8_u` | | | | | :heavy_check_mark: | -| `i64x2.lt_s` | | | | | :heavy_check_mark: | -| `i64x2.gt_s` | | | | | :heavy_check_mark: | -| `i64x2.le_s` | | | | | :heavy_check_mark: | -| `i64x2.ge_s` | | | | | :heavy_check_mark: | +| `v128.any_true` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load8_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load16_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load32_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.load64_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store8_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store16_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store32_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `v128.store64_lane` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.ne` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.convert_low_i32x4_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.convert_low_i32x4_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f64x2_s_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.trunc_sat_f64x2_u_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f32x4.demote_f64x2_zero` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `f64x2.promote_low_f32x4` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i8x16.popcnt` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extadd_pairwise_i8x16_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i16x8.extadd_pairwise_i8x16_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extadd_pairwise_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.extadd_pairwise_i16x8_u` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.lt_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.gt_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.le_s` | | :heavy_check_mark: | | | :heavy_check_mark: | +| `i64x2.ge_s` | | :heavy_check_mark: | | | :heavy_check_mark: | [1] Tip of tree LLVM as of May 20, 2020 -[2] V8 8.9.238. Requires flag `--experimental-wasm-simd` +[2] V8 9.1.0. [3] Not known to be updated after latest renumbering. Requires flag `--enable simd` [4] Only in 1.12.* (development branch). Requires (case-insensitive) flag `-wasmsimd` [5] Firefox x64/x86 SSE4.1+ only, enabled in Nightly, disabled in other channels, control in about:config under `javascript.options.wasm_simd` - -[6] Will only be in Chrome M87 onwards. From a7404cab8b9aa00e2cbe9953f6656a70e1ddf8c9 Mon Sep 17 00:00:00 2001 From: Lars T Hansen Date: Thu, 27 May 2021 13:27:40 +0200 Subject: [PATCH 349/378] Update Firefox implementation status --- proposals/simd/ImplementationStatus.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 8c19f3a155..24c67d7e66 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -245,4 +245,4 @@ [4] Only in 1.12.* (development branch). Requires (case-insensitive) flag `-wasmsimd` -[5] Firefox x64/x86 SSE4.1+ only, enabled in Nightly, disabled in other channels, control in about:config under `javascript.options.wasm_simd` +[5] Firefox x64/x86 (SSE4.1+ only) from FF89, ARM64 from FF90. Earlier versions control in about:config under `javascript.options.wasm_simd` From b0720df08dce3f76422483a30e32ea666c1b5034 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 15 Jun 2021 14:02:48 -0700 Subject: [PATCH 350/378] Add simple JS api test for SIMD (#496) Global v128 is not supported. --- test/js-api/global/constructor.any.js | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/test/js-api/global/constructor.any.js b/test/js-api/global/constructor.any.js index f536f5d7b5..7c2c02c790 100644 --- a/test/js-api/global/constructor.any.js +++ b/test/js-api/global/constructor.any.js @@ -164,3 +164,8 @@ test(() => { const global = new WebAssembly.Global(argument, 0, {}); assert_Global(global, 0); }, "Stray argument"); + +test(() => { + const argument = { "value": "v128" }; + assert_throws_js(TypeError, () =>new WebAssembly.Global(argument)); +}, "Construct v128 global"); From d53265510dc039932094b4aeaef17c222ae0a046 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 29 Jul 2021 00:23:48 +0200 Subject: [PATCH 351/378] Refactor interpreter --- interpreter/Makefile | 10 +- interpreter/README.md | 9 +- interpreter/binary/decode.ml | 541 ++++++++++++++------------- interpreter/binary/encode.ml | 515 +++++++++++++------------ interpreter/exec/eval.ml | 113 +++--- interpreter/exec/eval_numeric.ml | 13 +- interpreter/exec/eval_simd.ml | 516 ++++++++++++------------- interpreter/exec/eval_simd.mli | 20 +- interpreter/exec/int.ml | 1 + interpreter/exec/simd.ml | 10 +- interpreter/exec/v128.ml | 5 + interpreter/host/spectest.ml | 2 +- interpreter/runtime/instance.ml | 7 + interpreter/runtime/memory.ml | 59 +-- interpreter/runtime/memory.mli | 16 +- interpreter/script/js.ml | 116 +++--- interpreter/script/run.ml | 114 +++--- interpreter/script/script.ml | 24 +- interpreter/syntax/ast.ml | 136 +++---- interpreter/syntax/free.ml | 9 +- interpreter/syntax/operators.ml | 480 ++++++++++++------------ interpreter/syntax/types.ml | 21 +- interpreter/syntax/values.ml | 88 ++++- interpreter/text/arrange.ml | 306 +++++++-------- interpreter/text/lexer.mll | 48 ++- interpreter/text/parser.mly | 94 ++--- interpreter/util/lib.ml | 2 +- interpreter/util/lib.mli | 2 +- interpreter/valid/valid.ml | 174 +++++---- test/core/simd/simd_store8_lane.wast | 2 +- 30 files changed, 1821 insertions(+), 1632 deletions(-) diff --git a/interpreter/Makefile b/interpreter/Makefile index 7878b9a7ac..a1c1eebefc 100644 --- a/interpreter/Makefile +++ b/interpreter/Makefile @@ -137,21 +137,21 @@ debugtest: $(UNOPT) $(TESTDIR)/run.py --wasm `pwd`/$(UNOPT) $(if $(JS),--js '$(JS)',) test/%: $(OPT) - $(TESTDIR)/run.py --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$(@F).wast + $(TESTDIR)/run.py --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$*.wast debugtest/%: $(UNOPT) - $(TESTDIR)/run.py --wasm `pwd`/$(UNOPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$(@F).wast + $(TESTDIR)/run.py --wasm `pwd`/$(UNOPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$*.wast run/%: $(OPT) - ./$(OPT) $(TESTDIR)/$(@F).wast + ./$(OPT) $(TESTDIR)/$*.wast debug/%: $(UNOPT) - ./$(UNOPT) $(TESTDIR)/$(@F).wast + ./$(UNOPT) $(TESTDIR)/$*.wast partest: $(TESTS:%=quiettest/%) @echo All tests passed. quiettest/%: $(OPT) @ ( \ - $(TESTDIR)/run.py 2>$(@F).out --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(@:quiettest/%=$(TESTDIR)/%.wast) && \ + $(TESTDIR)/run.py 2>$(@F).out --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$*.wast && \ rm $(@F).out \ ) || \ cat $(@F).out || rm $(@F).out || exit 1 diff --git a/interpreter/README.md b/interpreter/README.md index 455c58969b..36a5713204 100644 --- a/interpreter/README.md +++ b/interpreter/README.md @@ -247,12 +247,19 @@ op: ref.null ref.is_null ref.func - .const + .const . . . . ._(_)? + .const + + . + . + . + . + ._(_)? +TODO func: ( func ? * * ) ( func ? ( export ) <...> ) ;; = (export (func )) (func ? <...>) diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 5b2f67fa8b..0473e29c3c 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -105,7 +105,7 @@ let vs33 s = I32_convert.wrap_i64 (vsN 33 s) let vs64 s = vsN 64 s let f32 s = F32.of_bits (u32 s) let f64 s = F64.of_bits (u64 s) -let v128 s = V128.of_bits (get_string (Types.size Types.V128Type) s) +let v128 s = V128.of_bits (get_string (Types.simd_size Types.V128Type) s) let len32 s = let pos = pos s in @@ -142,9 +142,13 @@ let num_type s = | -0x02 -> I64Type | -0x03 -> F32Type | -0x04 -> F64Type - | -0x05 -> V128Type | _ -> error s (pos s - 1) "malformed number type" +let simd_type s = + match vs7 s with + | -0x05 -> V128Type + | _ -> error s (pos s - 1) "malformed simd type" + let ref_type s = match vs7 s with | -0x10 -> FuncRefType @@ -153,7 +157,8 @@ let ref_type s = let value_type s = match peek s with - | Some n when n > 0x70 -> NumType (num_type s) + | Some n when n >= ((-0x04) land 0x7f) -> NumType (num_type s) + | Some n when n >= ((-0x0f) land 0x7f) -> SimdType (simd_type s) | _ -> RefType (ref_type s) let result_type s = vec value_type s @@ -215,271 +220,6 @@ let block_type s = | Some b when b land 0xc0 = 0x40 -> ValBlockType (Some (value_type s)) | _ -> VarBlockType (at vs33 s) -let simd_prefix s = - let pos = pos s in - match vu32 s with - | 0x00l -> let a, o = memop s in v128_load a o - | 0x01l -> let a, o = memop s in v128_load8x8_s a o - | 0x02l -> let a, o = memop s in v128_load8x8_u a o - | 0x03l -> let a, o = memop s in v128_load16x4_s a o - | 0x04l -> let a, o = memop s in v128_load16x4_u a o - | 0x05l -> let a, o = memop s in v128_load32x2_s a o - | 0x06l -> let a, o = memop s in v128_load32x2_u a o - | 0x07l -> let a, o = memop s in v128_load8_splat a o - | 0x08l -> let a, o = memop s in v128_load16_splat a o - | 0x09l -> let a, o = memop s in v128_load32_splat a o - | 0x0al -> let a, o = memop s in v128_load64_splat a o - | 0x0bl -> let a, o = memop s in v128_store a o - | 0x0cl -> v128_const (at v128 s) - | 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s)) - | 0x0el -> i8x16_swizzle - | 0x0fl -> i8x16_splat - | 0x10l -> i16x8_splat - | 0x11l -> i32x4_splat - | 0x12l -> i64x2_splat - | 0x13l -> f32x4_splat - | 0x14l -> f64x2_splat - | 0x15l -> let imm = u8 s in i8x16_extract_lane_s imm - | 0x16l -> let imm = u8 s in i8x16_extract_lane_u imm - | 0x17l -> let imm = u8 s in i8x16_replace_lane imm - | 0x18l -> let imm = u8 s in i16x8_extract_lane_s imm - | 0x19l -> let imm = u8 s in i16x8_extract_lane_u imm - | 0x1al -> let imm = u8 s in i16x8_replace_lane imm - | 0x1bl -> let imm = u8 s in i32x4_extract_lane imm - | 0x1cl -> let imm = u8 s in i32x4_replace_lane imm - | 0x1dl -> let imm = u8 s in i64x2_extract_lane imm - | 0x1el -> let imm = u8 s in i64x2_replace_lane imm - | 0x1fl -> let imm = u8 s in f32x4_extract_lane imm - | 0x20l -> let imm = u8 s in f32x4_replace_lane imm - | 0x21l -> let imm = u8 s in f64x2_extract_lane imm - | 0x22l -> let imm = u8 s in f64x2_replace_lane imm - | 0x23l -> i8x16_eq - | 0x24l -> i8x16_ne - | 0x25l -> i8x16_lt_s - | 0x26l -> i8x16_lt_u - | 0x27l -> i8x16_gt_s - | 0x28l -> i8x16_gt_u - | 0x29l -> i8x16_le_s - | 0x2al -> i8x16_le_u - | 0x2bl -> i8x16_ge_s - | 0x2cl -> i8x16_ge_u - | 0x2dl -> i16x8_eq - | 0x2el -> i16x8_ne - | 0x2fl -> i16x8_lt_s - | 0x30l -> i16x8_lt_u - | 0x31l -> i16x8_gt_s - | 0x32l -> i16x8_gt_u - | 0x33l -> i16x8_le_s - | 0x34l -> i16x8_le_u - | 0x35l -> i16x8_ge_s - | 0x36l -> i16x8_ge_u - | 0x37l -> i32x4_eq - | 0x38l -> i32x4_ne - | 0x39l -> i32x4_lt_s - | 0x3al -> i32x4_lt_u - | 0x3bl -> i32x4_gt_s - | 0x3cl -> i32x4_gt_u - | 0x3dl -> i32x4_le_s - | 0x3el -> i32x4_le_u - | 0x3fl -> i32x4_ge_s - | 0x40l -> i32x4_ge_u - | 0x41l -> f32x4_eq - | 0x42l -> f32x4_ne - | 0x43l -> f32x4_lt - | 0x44l -> f32x4_gt - | 0x45l -> f32x4_le - | 0x46l -> f32x4_ge - | 0x47l -> f64x2_eq - | 0x48l -> f64x2_ne - | 0x49l -> f64x2_lt - | 0x4al -> f64x2_gt - | 0x4bl -> f64x2_le - | 0x4cl -> f64x2_ge - | 0x4dl -> v128_not - | 0x4el -> v128_and - | 0x4fl -> v128_andnot - | 0x50l -> v128_or - | 0x51l -> v128_xor - | 0x52l -> v128_bitselect - | 0x53l -> v128_any_true - | 0x54l -> - let a, o = memop s in - let lane = u8 s in - v128_load8_lane a o lane - | 0x55l -> - let a, o = memop s in - let lane = u8 s in - v128_load16_lane a o lane - | 0x56l -> - let a, o = memop s in - let lane = u8 s in - v128_load32_lane a o lane - | 0x57l -> - let a, o = memop s in - let lane = u8 s in - v128_load64_lane a o lane - | 0x58l -> - let a, o = memop s in - let lane = u8 s in - v128_store8_lane a o lane - | 0x59l -> - let a, o = memop s in - let lane = u8 s in - v128_store16_lane a o lane - | 0x5al -> - let a, o = memop s in - let lane = u8 s in - v128_store32_lane a o lane - | 0x5bl -> - let a, o = memop s in - let lane = u8 s in - v128_store64_lane a o lane - | 0x5cl -> let a, o = memop s in v128_load32_zero a o - | 0x5dl -> let a, o = memop s in v128_load64_zero a o - | 0x5el -> f32x4_demote_f64x2_zero - | 0x5fl -> f64x2_promote_low_f32x4 - | 0x60l -> i8x16_abs - | 0x61l -> i8x16_neg - | 0x62l -> i8x16_popcnt - | 0x63l -> i8x16_all_true - | 0x64l -> i8x16_bitmask - | 0x65l -> i8x16_narrow_i16x8_s - | 0x66l -> i8x16_narrow_i16x8_u - | 0x67l -> f32x4_ceil - | 0x68l -> f32x4_floor - | 0x69l -> f32x4_trunc - | 0x6al -> f32x4_nearest - | 0x6bl -> i8x16_shl - | 0x6cl -> i8x16_shr_s - | 0x6dl -> i8x16_shr_u - | 0x6el -> i8x16_add - | 0x6fl -> i8x16_add_sat_s - | 0x70l -> i8x16_add_sat_u - | 0x71l -> i8x16_sub - | 0x72l -> i8x16_sub_sat_s - | 0x73l -> i8x16_sub_sat_u - | 0x74l -> f64x2_ceil - | 0x75l -> f64x2_floor - | 0x76l -> i8x16_min_s - | 0x77l -> i8x16_min_u - | 0x78l -> i8x16_max_s - | 0x79l -> i8x16_max_u - | 0x7al -> f64x2_trunc - | 0x7bl -> i8x16_avgr_u - | 0x7cl -> i16x8_extadd_pairwise_i8x16_s - | 0x7dl -> i16x8_extadd_pairwise_i8x16_u - | 0x7el -> i32x4_extadd_pairwise_i16x8_s - | 0x7fl -> i32x4_extadd_pairwise_i16x8_u - | 0x80l -> i16x8_abs - | 0x81l -> i16x8_neg - | 0x82l -> i16x8_q15mulr_sat_s - | 0x83l -> i16x8_all_true - | 0x84l -> i16x8_bitmask - | 0x85l -> i16x8_narrow_i32x4_s - | 0x86l -> i16x8_narrow_i32x4_u - | 0x87l -> i16x8_extend_low_i8x16_s - | 0x88l -> i16x8_extend_high_i8x16_s - | 0x89l -> i16x8_extend_low_i8x16_u - | 0x8al -> i16x8_extend_high_i8x16_u - | 0x8bl -> i16x8_shl - | 0x8cl -> i16x8_shr_s - | 0x8dl -> i16x8_shr_u - | 0x8el -> i16x8_add - | 0x8fl -> i16x8_add_sat_s - | 0x90l -> i16x8_add_sat_u - | 0x91l -> i16x8_sub - | 0x92l -> i16x8_sub_sat_s - | 0x93l -> i16x8_sub_sat_u - | 0x94l -> f64x2_nearest - | 0x95l -> i16x8_mul - | 0x96l -> i16x8_min_s - | 0x97l -> i16x8_min_u - | 0x98l -> i16x8_max_s - | 0x99l -> i16x8_max_u - | 0x9bl -> i16x8_avgr_u - | 0x9cl -> i16x8_extmul_low_i8x16_s - | 0x9dl -> i16x8_extmul_high_i8x16_s - | 0x9el -> i16x8_extmul_low_i8x16_u - | 0x9fl -> i16x8_extmul_high_i8x16_u - | 0xa0l -> i32x4_abs - | 0xa1l -> i32x4_neg - | 0xa3l -> i32x4_all_true - | 0xa4l -> i32x4_bitmask - | 0xa7l -> i32x4_extend_low_i16x8_s - | 0xa8l -> i32x4_extend_high_i16x8_s - | 0xa9l -> i32x4_extend_low_i16x8_u - | 0xaal -> i32x4_extend_high_i16x8_u - | 0xabl -> i32x4_shl - | 0xacl -> i32x4_shr_s - | 0xadl -> i32x4_shr_u - | 0xael -> i32x4_add - | 0xb1l -> i32x4_sub - | 0xb5l -> i32x4_mul - | 0xb6l -> i32x4_min_s - | 0xb7l -> i32x4_min_u - | 0xb8l -> i32x4_max_s - | 0xb9l -> i32x4_max_u - | 0xbal -> i32x4_dot_i16x8_s - | 0xbcl -> i32x4_extmul_low_i16x8_s - | 0xbdl -> i32x4_extmul_high_i16x8_s - | 0xbel -> i32x4_extmul_low_i16x8_u - | 0xbfl -> i32x4_extmul_high_i16x8_u - | 0xc0l -> i64x2_abs - | 0xc1l -> i64x2_neg - | 0xc3l -> i64x2_all_true - | 0xc4l -> i64x2_bitmask - | 0xc7l -> i64x2_extend_low_i32x4_s - | 0xc8l -> i64x2_extend_high_i32x4_s - | 0xc9l -> i64x2_extend_low_i32x4_u - | 0xcal -> i64x2_extend_high_i32x4_u - | 0xcbl -> i64x2_shl - | 0xccl -> i64x2_shr_s - | 0xcdl -> i64x2_shr_u - | 0xcel -> i64x2_add - | 0xd1l -> i64x2_sub - | 0xd5l -> i64x2_mul - | 0xd6l -> i64x2_eq - | 0xd7l -> i64x2_ne - | 0xd8l -> i64x2_lt_s - | 0xd9l -> i64x2_gt_s - | 0xdal -> i64x2_le_s - | 0xdbl -> i64x2_ge_s - | 0xdcl -> i64x2_extmul_low_i32x4_s - | 0xddl -> i64x2_extmul_high_i32x4_s - | 0xdel -> i64x2_extmul_low_i32x4_u - | 0xdfl -> i64x2_extmul_high_i32x4_u - | 0xe0l -> f32x4_abs - | 0xe1l -> f32x4_neg - | 0xe3l -> f32x4_sqrt - | 0xe4l -> f32x4_add - | 0xe5l -> f32x4_sub - | 0xe6l -> f32x4_mul - | 0xe7l -> f32x4_div - | 0xe8l -> f32x4_min - | 0xe9l -> f32x4_max - | 0xeal -> f32x4_pmin - | 0xebl -> f32x4_pmax - | 0xecl -> f64x2_abs - | 0xedl -> f64x2_neg - | 0xefl -> f64x2_sqrt - | 0xf0l -> f64x2_add - | 0xf1l -> f64x2_sub - | 0xf2l -> f64x2_mul - | 0xf3l -> f64x2_div - | 0xf4l -> f64x2_min - | 0xf5l -> f64x2_max - | 0xf6l -> f64x2_pmin - | 0xf7l -> f64x2_pmax - | 0xf8l -> i32x4_trunc_sat_f32x4_s - | 0xf9l -> i32x4_trunc_sat_f32x4_u - | 0xfal -> f32x4_convert_i32x4_s - | 0xfbl -> f32x4_convert_i32x4_u - | 0xfcl -> i32x4_trunc_sat_f64x2_s_zero - | 0xfdl -> i32x4_trunc_sat_f64x2_u_zero - | 0xfel -> f64x2_convert_low_i32x4_s - | 0xffl -> f64x2_convert_low_i32x4_u - | n -> illegal s pos (I32.to_int_u n) - let rec instr s = let pos = pos s in match op s with @@ -758,7 +498,270 @@ let rec instr s = | n -> illegal2 s pos b n ) - | 0xfd -> simd_prefix s + | 0xfd -> + (match vu32 s with + | 0x00l -> let a, o = memop s in v128_load a o + | 0x01l -> let a, o = memop s in v128_load8x8_s a o + | 0x02l -> let a, o = memop s in v128_load8x8_u a o + | 0x03l -> let a, o = memop s in v128_load16x4_s a o + | 0x04l -> let a, o = memop s in v128_load16x4_u a o + | 0x05l -> let a, o = memop s in v128_load32x2_s a o + | 0x06l -> let a, o = memop s in v128_load32x2_u a o + | 0x07l -> let a, o = memop s in v128_load8_splat a o + | 0x08l -> let a, o = memop s in v128_load16_splat a o + | 0x09l -> let a, o = memop s in v128_load32_splat a o + | 0x0al -> let a, o = memop s in v128_load64_splat a o + | 0x0bl -> let a, o = memop s in v128_store a o + | 0x0cl -> v128_const (at v128 s) + | 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s)) + | 0x0el -> i8x16_swizzle + | 0x0fl -> i8x16_splat + | 0x10l -> i16x8_splat + | 0x11l -> i32x4_splat + | 0x12l -> i64x2_splat + | 0x13l -> f32x4_splat + | 0x14l -> f64x2_splat + | 0x15l -> let i = u8 s in i8x16_extract_lane_s i + | 0x16l -> let i = u8 s in i8x16_extract_lane_u i + | 0x17l -> let i = u8 s in i8x16_replace_lane i + | 0x18l -> let i = u8 s in i16x8_extract_lane_s i + | 0x19l -> let i = u8 s in i16x8_extract_lane_u i + | 0x1al -> let i = u8 s in i16x8_replace_lane i + | 0x1bl -> let i = u8 s in i32x4_extract_lane i + | 0x1cl -> let i = u8 s in i32x4_replace_lane i + | 0x1dl -> let i = u8 s in i64x2_extract_lane i + | 0x1el -> let i = u8 s in i64x2_replace_lane i + | 0x1fl -> let i = u8 s in f32x4_extract_lane i + | 0x20l -> let i = u8 s in f32x4_replace_lane i + | 0x21l -> let i = u8 s in f64x2_extract_lane i + | 0x22l -> let i = u8 s in f64x2_replace_lane i + | 0x23l -> i8x16_eq + | 0x24l -> i8x16_ne + | 0x25l -> i8x16_lt_s + | 0x26l -> i8x16_lt_u + | 0x27l -> i8x16_gt_s + | 0x28l -> i8x16_gt_u + | 0x29l -> i8x16_le_s + | 0x2al -> i8x16_le_u + | 0x2bl -> i8x16_ge_s + | 0x2cl -> i8x16_ge_u + | 0x2dl -> i16x8_eq + | 0x2el -> i16x8_ne + | 0x2fl -> i16x8_lt_s + | 0x30l -> i16x8_lt_u + | 0x31l -> i16x8_gt_s + | 0x32l -> i16x8_gt_u + | 0x33l -> i16x8_le_s + | 0x34l -> i16x8_le_u + | 0x35l -> i16x8_ge_s + | 0x36l -> i16x8_ge_u + | 0x37l -> i32x4_eq + | 0x38l -> i32x4_ne + | 0x39l -> i32x4_lt_s + | 0x3al -> i32x4_lt_u + | 0x3bl -> i32x4_gt_s + | 0x3cl -> i32x4_gt_u + | 0x3dl -> i32x4_le_s + | 0x3el -> i32x4_le_u + | 0x3fl -> i32x4_ge_s + | 0x40l -> i32x4_ge_u + | 0x41l -> f32x4_eq + | 0x42l -> f32x4_ne + | 0x43l -> f32x4_lt + | 0x44l -> f32x4_gt + | 0x45l -> f32x4_le + | 0x46l -> f32x4_ge + | 0x47l -> f64x2_eq + | 0x48l -> f64x2_ne + | 0x49l -> f64x2_lt + | 0x4al -> f64x2_gt + | 0x4bl -> f64x2_le + | 0x4cl -> f64x2_ge + | 0x4dl -> v128_not + | 0x4el -> v128_and + | 0x4fl -> v128_andnot + | 0x50l -> v128_or + | 0x51l -> v128_xor + | 0x52l -> v128_bitselect + | 0x53l -> v128_any_true + | 0x54l -> + let a, o = memop s in + let lane = u8 s in + v128_load8_lane a o lane + | 0x55l -> + let a, o = memop s in + let lane = u8 s in + v128_load16_lane a o lane + | 0x56l -> + let a, o = memop s in + let lane = u8 s in + v128_load32_lane a o lane + | 0x57l -> + let a, o = memop s in + let lane = u8 s in + v128_load64_lane a o lane + | 0x58l -> + let a, o = memop s in + let lane = u8 s in + v128_store8_lane a o lane + | 0x59l -> + let a, o = memop s in + let lane = u8 s in + v128_store16_lane a o lane + | 0x5al -> + let a, o = memop s in + let lane = u8 s in + v128_store32_lane a o lane + | 0x5bl -> + let a, o = memop s in + let lane = u8 s in + v128_store64_lane a o lane + | 0x5cl -> let a, o = memop s in v128_load32_zero a o + | 0x5dl -> let a, o = memop s in v128_load64_zero a o + | 0x5el -> f32x4_demote_f64x2_zero + | 0x5fl -> f64x2_promote_low_f32x4 + | 0x60l -> i8x16_abs + | 0x61l -> i8x16_neg + | 0x62l -> i8x16_popcnt + | 0x63l -> i8x16_all_true + | 0x64l -> i8x16_bitmask + | 0x65l -> i8x16_narrow_i16x8_s + | 0x66l -> i8x16_narrow_i16x8_u + | 0x67l -> f32x4_ceil + | 0x68l -> f32x4_floor + | 0x69l -> f32x4_trunc + | 0x6al -> f32x4_nearest + | 0x6bl -> i8x16_shl + | 0x6cl -> i8x16_shr_s + | 0x6dl -> i8x16_shr_u + | 0x6el -> i8x16_add + | 0x6fl -> i8x16_add_sat_s + | 0x70l -> i8x16_add_sat_u + | 0x71l -> i8x16_sub + | 0x72l -> i8x16_sub_sat_s + | 0x73l -> i8x16_sub_sat_u + | 0x74l -> f64x2_ceil + | 0x75l -> f64x2_floor + | 0x76l -> i8x16_min_s + | 0x77l -> i8x16_min_u + | 0x78l -> i8x16_max_s + | 0x79l -> i8x16_max_u + | 0x7al -> f64x2_trunc + | 0x7bl -> i8x16_avgr_u + | 0x7cl -> i16x8_extadd_pairwise_i8x16_s + | 0x7dl -> i16x8_extadd_pairwise_i8x16_u + | 0x7el -> i32x4_extadd_pairwise_i16x8_s + | 0x7fl -> i32x4_extadd_pairwise_i16x8_u + | 0x80l -> i16x8_abs + | 0x81l -> i16x8_neg + | 0x82l -> i16x8_q15mulr_sat_s + | 0x83l -> i16x8_all_true + | 0x84l -> i16x8_bitmask + | 0x85l -> i16x8_narrow_i32x4_s + | 0x86l -> i16x8_narrow_i32x4_u + | 0x87l -> i16x8_extend_low_i8x16_s + | 0x88l -> i16x8_extend_high_i8x16_s + | 0x89l -> i16x8_extend_low_i8x16_u + | 0x8al -> i16x8_extend_high_i8x16_u + | 0x8bl -> i16x8_shl + | 0x8cl -> i16x8_shr_s + | 0x8dl -> i16x8_shr_u + | 0x8el -> i16x8_add + | 0x8fl -> i16x8_add_sat_s + | 0x90l -> i16x8_add_sat_u + | 0x91l -> i16x8_sub + | 0x92l -> i16x8_sub_sat_s + | 0x93l -> i16x8_sub_sat_u + | 0x94l -> f64x2_nearest + | 0x95l -> i16x8_mul + | 0x96l -> i16x8_min_s + | 0x97l -> i16x8_min_u + | 0x98l -> i16x8_max_s + | 0x99l -> i16x8_max_u + | 0x9bl -> i16x8_avgr_u + | 0x9cl -> i16x8_extmul_low_i8x16_s + | 0x9dl -> i16x8_extmul_high_i8x16_s + | 0x9el -> i16x8_extmul_low_i8x16_u + | 0x9fl -> i16x8_extmul_high_i8x16_u + | 0xa0l -> i32x4_abs + | 0xa1l -> i32x4_neg + | 0xa3l -> i32x4_all_true + | 0xa4l -> i32x4_bitmask + | 0xa7l -> i32x4_extend_low_i16x8_s + | 0xa8l -> i32x4_extend_high_i16x8_s + | 0xa9l -> i32x4_extend_low_i16x8_u + | 0xaal -> i32x4_extend_high_i16x8_u + | 0xabl -> i32x4_shl + | 0xacl -> i32x4_shr_s + | 0xadl -> i32x4_shr_u + | 0xael -> i32x4_add + | 0xb1l -> i32x4_sub + | 0xb5l -> i32x4_mul + | 0xb6l -> i32x4_min_s + | 0xb7l -> i32x4_min_u + | 0xb8l -> i32x4_max_s + | 0xb9l -> i32x4_max_u + | 0xbal -> i32x4_dot_i16x8_s + | 0xbcl -> i32x4_extmul_low_i16x8_s + | 0xbdl -> i32x4_extmul_high_i16x8_s + | 0xbel -> i32x4_extmul_low_i16x8_u + | 0xbfl -> i32x4_extmul_high_i16x8_u + | 0xc0l -> i64x2_abs + | 0xc1l -> i64x2_neg + | 0xc3l -> i64x2_all_true + | 0xc4l -> i64x2_bitmask + | 0xc7l -> i64x2_extend_low_i32x4_s + | 0xc8l -> i64x2_extend_high_i32x4_s + | 0xc9l -> i64x2_extend_low_i32x4_u + | 0xcal -> i64x2_extend_high_i32x4_u + | 0xcbl -> i64x2_shl + | 0xccl -> i64x2_shr_s + | 0xcdl -> i64x2_shr_u + | 0xcel -> i64x2_add + | 0xd1l -> i64x2_sub + | 0xd5l -> i64x2_mul + | 0xd6l -> i64x2_eq + | 0xd7l -> i64x2_ne + | 0xd8l -> i64x2_lt_s + | 0xd9l -> i64x2_gt_s + | 0xdal -> i64x2_le_s + | 0xdbl -> i64x2_ge_s + | 0xdcl -> i64x2_extmul_low_i32x4_s + | 0xddl -> i64x2_extmul_high_i32x4_s + | 0xdel -> i64x2_extmul_low_i32x4_u + | 0xdfl -> i64x2_extmul_high_i32x4_u + | 0xe0l -> f32x4_abs + | 0xe1l -> f32x4_neg + | 0xe3l -> f32x4_sqrt + | 0xe4l -> f32x4_add + | 0xe5l -> f32x4_sub + | 0xe6l -> f32x4_mul + | 0xe7l -> f32x4_div + | 0xe8l -> f32x4_min + | 0xe9l -> f32x4_max + | 0xeal -> f32x4_pmin + | 0xebl -> f32x4_pmax + | 0xecl -> f64x2_abs + | 0xedl -> f64x2_neg + | 0xefl -> f64x2_sqrt + | 0xf0l -> f64x2_add + | 0xf1l -> f64x2_sub + | 0xf2l -> f64x2_mul + | 0xf3l -> f64x2_div + | 0xf4l -> f64x2_min + | 0xf5l -> f64x2_max + | 0xf6l -> f64x2_pmin + | 0xf7l -> f64x2_pmax + | 0xf8l -> i32x4_trunc_sat_f32x4_s + | 0xf9l -> i32x4_trunc_sat_f32x4_u + | 0xfal -> f32x4_convert_i32x4_s + | 0xfbl -> f32x4_convert_i32x4_u + | 0xfcl -> i32x4_trunc_sat_f64x2_s_zero + | 0xfdl -> i32x4_trunc_sat_f64x2_u_zero + | 0xfel -> f64x2_convert_low_i32x4_s + | 0xffl -> f64x2_convert_low_i32x4_u + | n -> illegal s pos (I32.to_int_u n) + ) | b -> illegal s pos b diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index d1501d96bc..9756647f8c 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -97,6 +97,8 @@ struct | I64Type -> vs7 (-0x02) | F32Type -> vs7 (-0x03) | F64Type -> vs7 (-0x04) + + let simd_type = function | V128Type -> vs7 (-0x05) let ref_type = function @@ -105,6 +107,7 @@ struct let value_type = function | NumType t -> num_type t + | SimdType t -> simd_type t | RefType t -> ref_type t let func_type = function @@ -214,8 +217,19 @@ struct assert false | Load {ty = I32Type | I64Type; sz = Some (Pack64, _); _} -> assert false - | Load {ty = V128Type; _} -> - assert false + + | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo + | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo + | Store ({ty = F32Type; sz = None; _} as mo) -> op 0x38; memop mo + | Store ({ty = F64Type; sz = None; _} as mo) -> op 0x39; memop mo + | Store ({ty = I32Type; sz = Some Pack8; _} as mo) -> op 0x3a; memop mo + | Store ({ty = I32Type; sz = Some Pack16; _} as mo) -> op 0x3b; memop mo + | Store {ty = I32Type; sz = Some Pack32; _} -> assert false + | Store ({ty = I64Type; sz = Some Pack8; _} as mo) -> op 0x3c; memop mo + | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo + | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo + | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false + | Store {ty = (I32Type | I64Type); sz = Some Pack64; _} -> assert false | SimdLoad ({ty = V128Type; sz = None; _} as mo) -> simd_op 0x00l; memop mo @@ -245,42 +259,25 @@ struct simd_op 0x5dl; memop mo | SimdLoad _ -> assert false - | SimdLoadLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; sz = Pack8; _} as mo, i) -> simd_op 0x54l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; sz = Pack16; _} as mo, i) -> simd_op 0x55l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; sz = Pack32; _} as mo, i) -> simd_op 0x56l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; sz = Pack64; _} as mo, i) -> simd_op 0x57l; memop mo; u8 i; - | SimdLoadLane _ -> assert false - - | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo - | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo - | Store ({ty = F32Type; sz = None; _} as mo) -> op 0x38; memop mo - | Store ({ty = F64Type; sz = None; _} as mo) -> op 0x39; memop mo - | Store ({ty = I32Type; sz = Some Pack8; _} as mo) -> op 0x3a; memop mo - | Store ({ty = I32Type; sz = Some Pack16; _} as mo) -> op 0x3b; memop mo - | Store {ty = I32Type; sz = Some Pack32; _} -> assert false - | Store ({ty = I64Type; sz = Some Pack8; _} as mo) -> op 0x3c; memop mo - | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo - | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo - | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Store {ty = (I32Type | I64Type); sz = Some Pack64; _} -> assert false - | Store {ty = V128Type; _} -> assert false | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo - | SimdStore {ty = (I32Type | I64Type | F32Type | F64Type); _} -> assert false - | SimdStoreLane ({ty = V128Type; sz = Some Pack8; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; sz = Pack8; _} as mo, i) -> simd_op 0x58l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Some Pack16; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; sz = Pack16; _} as mo, i) -> simd_op 0x59l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Some Pack32; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; sz = Pack32; _} as mo, i) -> simd_op 0x5al; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Some Pack64; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; sz = Pack64; _} as mo, i) -> simd_op 0x5bl; memop mo; u8 i; - | SimdStoreLane _ -> assert false | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -297,19 +294,11 @@ struct | Const {it = I64 c; _} -> op 0x42; vs64 c | Const {it = F32 c; _} -> op 0x43; f32 c | Const {it = F64 c; _} -> op 0x44; f64 c - | Const {it = V128 c; _} -> simd_op 0x0cl; v128 c | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 | Test (F32 _) -> assert false | Test (F64 _) -> assert false - | Test (V128 V128Op.(V128 AnyTrue)) -> simd_op 0x53l - | Test (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l - | Test (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l - | Test (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l - | Test (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l - | Test (V128 V128Op.(V128 AllTrue)) -> assert false - | Test (V128 _) -> assert false | Compare (I32 I32Op.Eq) -> op 0x46 | Compare (I32 I32Op.Ne) -> op 0x47 @@ -347,8 +336,6 @@ struct | Compare (F64 F64Op.Le) -> op 0x65 | Compare (F64 F64Op.Ge) -> op 0x66 - | Compare (V128 _) -> assert false - | Unary (I32 I32Op.Clz) -> op 0x67 | Unary (I32 I32Op.Ctz) -> op 0x68 | Unary (I32 I32Op.Popcnt) -> op 0x69 @@ -381,58 +368,6 @@ struct | Unary (F64 F64Op.Nearest) -> op 0x9e | Unary (F64 F64Op.Sqrt) -> op 0x9f - | Unary (V128 V128Op.(V128 Not)) -> simd_op 0x4dl - | Unary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l - | Unary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l - | Unary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l - | Unary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l - | Unary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l - | Unary (V128 V128Op.(I16x8 ExtendLowS)) -> simd_op 0x87l - | Unary (V128 V128Op.(I16x8 ExtendHighS)) -> simd_op 0x88l - | Unary (V128 V128Op.(I16x8 ExtendLowU)) -> simd_op 0x89l - | Unary (V128 V128Op.(I16x8 ExtendHighU)) -> simd_op 0x8al - | Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0x7cl - | Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0x7dl - | Unary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l - | Unary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l - | Unary (V128 V128Op.(I32x4 ExtendLowS)) -> simd_op 0xa7l - | Unary (V128 V128Op.(I32x4 ExtendHighS)) -> simd_op 0xa8l - | Unary (V128 V128Op.(I32x4 ExtendLowU)) -> simd_op 0xa9l - | Unary (V128 V128Op.(I32x4 ExtendHighU)) -> simd_op 0xaal - | Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0x7el - | Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0x7fl - | Unary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xc0l - | Unary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l - | Unary (V128 V128Op.(I64x2 ExtendLowS)) -> simd_op 0xc7l - | Unary (V128 V128Op.(I64x2 ExtendHighS)) -> simd_op 0xc8l - | Unary (V128 V128Op.(I64x2 ExtendLowU)) -> simd_op 0xc9l - | Unary (V128 V128Op.(I64x2 ExtendHighU)) -> simd_op 0xcal - | Unary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0x67l - | Unary (V128 V128Op.(F32x4 Floor)) -> simd_op 0x68l - | Unary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0x69l - | Unary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0x6al - | Unary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0x74l - | Unary (V128 V128Op.(F64x2 Floor)) -> simd_op 0x75l - | Unary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0x7al - | Unary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0x94l - | Unary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l - | Unary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l - | Unary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l - | Unary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl - | Unary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl - | Unary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl - | Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l - | Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l - | Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0xfcl - | Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0xfdl - | Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal - | Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl - | Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x5el - | Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x5fl - | Unary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0xfel - | Unary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0xffl - | Unary (V128 _) -> failwith "unimplemented V128 Unary op" - | Binary (I32 I32Op.Add) -> op 0x6a | Binary (I32 I32Op.Sub) -> op 0x6b | Binary (I32 I32Op.Mul) -> op 0x6c @@ -481,129 +416,6 @@ struct | Binary (F64 F64Op.Max) -> op 0xa5 | Binary (F64 F64Op.CopySign) -> op 0xa6 - | Binary (V128 V128Op.(I8x16 (Shuffle imms))) -> simd_op 0x0dl; List.iter u8 imms - | Binary (V128 V128Op.(I8x16 Swizzle)) -> simd_op 0x0el - | Binary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l - | Binary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l - | Binary (V128 V128Op.(I8x16 LtS)) -> simd_op 0x25l - | Binary (V128 V128Op.(I8x16 LtU)) -> simd_op 0x26l - | Binary (V128 V128Op.(I8x16 GtS)) -> simd_op 0x27l - | Binary (V128 V128Op.(I8x16 GtU)) -> simd_op 0x28l - | Binary (V128 V128Op.(I8x16 LeS)) -> simd_op 0x29l - | Binary (V128 V128Op.(I8x16 LeU)) -> simd_op 0x2al - | Binary (V128 V128Op.(I8x16 GeS)) -> simd_op 0x2bl - | Binary (V128 V128Op.(I8x16 GeU)) -> simd_op 0x2cl - | Binary (V128 V128Op.(I8x16 NarrowS)) -> simd_op 0x65l - | Binary (V128 V128Op.(I8x16 NarrowU)) -> simd_op 0x66l - | Binary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el - | Binary (V128 V128Op.(I8x16 AddSatS)) -> simd_op 0x6fl - | Binary (V128 V128Op.(I8x16 AddSatU)) -> simd_op 0x70l - | Binary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l - | Binary (V128 V128Op.(I8x16 SubSatS)) -> simd_op 0x72l - | Binary (V128 V128Op.(I8x16 SubSatU)) -> simd_op 0x73l - | Binary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l - | Binary (V128 V128Op.(I8x16 MinU)) -> simd_op 0x77l - | Binary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l - | Binary (V128 V128Op.(I8x16 MaxU)) -> simd_op 0x79l - | Binary (V128 V128Op.(I8x16 AvgrU)) -> simd_op 0x7bl - | Binary (V128 V128Op.(I16x8 Eq)) -> simd_op 0x2dl - | Binary (V128 V128Op.(I16x8 Ne)) -> simd_op 0x2el - | Binary (V128 V128Op.(I16x8 LtS)) -> simd_op 0x2fl - | Binary (V128 V128Op.(I16x8 LtU)) -> simd_op 0x30l - | Binary (V128 V128Op.(I16x8 GtS)) -> simd_op 0x31l - | Binary (V128 V128Op.(I16x8 GtU)) -> simd_op 0x32l - | Binary (V128 V128Op.(I16x8 LeS)) -> simd_op 0x33l - | Binary (V128 V128Op.(I16x8 LeU)) -> simd_op 0x34l - | Binary (V128 V128Op.(I16x8 GeS)) -> simd_op 0x35l - | Binary (V128 V128Op.(I16x8 GeU)) -> simd_op 0x36l - | Binary (V128 V128Op.(I16x8 NarrowS)) -> simd_op 0x85l - | Binary (V128 V128Op.(I16x8 NarrowU)) -> simd_op 0x86l - | Binary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el - | Binary (V128 V128Op.(I16x8 AddSatS)) -> simd_op 0x8fl - | Binary (V128 V128Op.(I16x8 AddSatU)) -> simd_op 0x90l - | Binary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l - | Binary (V128 V128Op.(I16x8 SubSatS)) -> simd_op 0x92l - | Binary (V128 V128Op.(I16x8 SubSatU)) -> simd_op 0x93l - | Binary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l - | Binary (V128 V128Op.(I16x8 MinS)) -> simd_op 0x96l - | Binary (V128 V128Op.(I16x8 MinU)) -> simd_op 0x97l - | Binary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l - | Binary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l - | Binary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl - | Binary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9cl - | Binary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl - | Binary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el - | Binary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl - | Binary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x82l - | Binary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael - | Binary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l - | Binary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l - | Binary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l - | Binary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l - | Binary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l - | Binary (V128 V128Op.(I32x4 DotI16x8S)) -> simd_op 0xbal - | Binary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l - | Binary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l - | Binary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l - | Binary (V128 V128Op.(I32x4 LtS)) -> simd_op 0x39l - | Binary (V128 V128Op.(I32x4 LtU)) -> simd_op 0x3al - | Binary (V128 V128Op.(I32x4 GtS)) -> simd_op 0x3bl - | Binary (V128 V128Op.(I32x4 GtU)) -> simd_op 0x3cl - | Binary (V128 V128Op.(I32x4 LeS)) -> simd_op 0x3dl - | Binary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el - | Binary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl - | Binary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l - | Binary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbcl - | Binary (V128 V128Op.(I32x4 ExtMulHighS)) -> simd_op 0xbdl - | Binary (V128 V128Op.(I32x4 ExtMulLowU)) -> simd_op 0xbel - | Binary (V128 V128Op.(I32x4 ExtMulHighU)) -> simd_op 0xbfl - | Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel - | Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l - | Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l - | Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xd6l - | Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd7l - | Binary (V128 V128Op.(I64x2 LtS)) -> simd_op 0xd8l - | Binary (V128 V128Op.(I64x2 GtS)) -> simd_op 0xd9l - | Binary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xdal - | Binary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xdbl - | Binary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xdcl - | Binary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xddl - | Binary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xdel - | Binary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xdfl - | Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l - | Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l - | Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l - | Binary (V128 V128Op.(F32x4 Gt)) -> simd_op 0x44l - | Binary (V128 V128Op.(F32x4 Le)) -> simd_op 0x45l - | Binary (V128 V128Op.(F32x4 Ge)) -> simd_op 0x46l - | Binary (V128 V128Op.(F32x4 Add)) -> simd_op 0xe4l - | Binary (V128 V128Op.(F32x4 Sub)) -> simd_op 0xe5l - | Binary (V128 V128Op.(F32x4 Mul)) -> simd_op 0xe6l - | Binary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l - | Binary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l - | Binary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l - | Binary (V128 V128Op.(F32x4 Pmin)) -> simd_op 0xeal - | Binary (V128 V128Op.(F32x4 Pmax)) -> simd_op 0xebl - | Binary (V128 V128Op.(F64x2 Eq)) -> simd_op 0x47l - | Binary (V128 V128Op.(F64x2 Ne)) -> simd_op 0x48l - | Binary (V128 V128Op.(F64x2 Lt)) -> simd_op 0x49l - | Binary (V128 V128Op.(F64x2 Gt)) -> simd_op 0x4al - | Binary (V128 V128Op.(F64x2 Le)) -> simd_op 0x4bl - | Binary (V128 V128Op.(F64x2 Ge)) -> simd_op 0x4cl - | Binary (V128 V128Op.(F64x2 Add)) -> simd_op 0xf0l - | Binary (V128 V128Op.(F64x2 Sub)) -> simd_op 0xf1l - | Binary (V128 V128Op.(F64x2 Mul)) -> simd_op 0xf2l - | Binary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l - | Binary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l - | Binary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l - | Binary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l - | Binary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l - | Binary (V128 V128Op.(V128 And)) -> simd_op 0x4el - | Binary (V128 V128Op.(V128 AndNot)) -> simd_op 0x4fl - | Binary (V128 V128Op.(V128 Or)) -> simd_op 0x50l - | Binary (V128 V128Op.(V128 Xor)) -> simd_op 0x51l - | Binary (V128 _) -> assert false - | Convert (I32 I32Op.ExtendSI32) -> assert false | Convert (I32 I32Op.ExtendUI32) -> assert false | Convert (I32 I32Op.WrapI64) -> op 0xa7 @@ -646,53 +458,238 @@ struct | Convert (F64 F64Op.DemoteF64) -> assert false | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf - | Convert (V128 (V128Op.I8x16 V128Op.Splat)) -> simd_op 0x0fl; - | Convert (V128 (V128Op.I16x8 V128Op.Splat)) -> simd_op 0x10l; - | Convert (V128 (V128Op.I32x4 V128Op.Splat)) -> simd_op 0x11l; - | Convert (V128 (V128Op.I64x2 V128Op.Splat)) -> simd_op 0x12l; - | Convert (V128 (V128Op.F32x4 V128Op.Splat)) -> simd_op 0x13l; - | Convert (V128 (V128Op.F64x2 V128Op.Splat)) -> simd_op 0x14l; - | Convert (V128 _) -> assert false - - | SimdTernary (V128Op.Bitselect) -> simd_op 0x52l - - | SimdExtract (V128Op.I8x16 (SX, imm)) -> simd_op 0x15l; u8 imm - | SimdExtract (V128Op.I8x16 (ZX, imm)) -> simd_op 0x16l; u8 imm - | SimdExtract (V128Op.I16x8 (SX, imm)) -> simd_op 0x18l; u8 imm - | SimdExtract (V128Op.I16x8 (ZX, imm)) -> simd_op 0x19l; u8 imm - | SimdExtract (V128Op.I32x4 (ZX, imm)) -> simd_op 0x1bl; u8 imm - | SimdExtract (V128Op.I64x2 (ZX, imm)) -> simd_op 0x1dl; u8 imm - | SimdExtract (V128Op.F32x4 (ZX, imm)) -> simd_op 0x1fl; u8 imm - | SimdExtract (V128Op.F64x2 (ZX, imm)) -> simd_op 0x21l; u8 imm - | SimdExtract _ -> assert false - - | SimdReplace (V128Op.I8x16 imm) -> simd_op 0x17l; u8 imm - | SimdReplace (V128Op.I16x8 imm) -> simd_op 0x1al; u8 imm - | SimdReplace (V128Op.I32x4 imm) -> simd_op 0x1cl; u8 imm - | SimdReplace (V128Op.I64x2 imm) -> simd_op 0x1el; u8 imm - | SimdReplace (V128Op.F32x4 imm) -> simd_op 0x20l; u8 imm - | SimdReplace (V128Op.F64x2 imm) -> simd_op 0x22l; u8 imm - | SimdReplace _ -> assert false - - | SimdShift V128Op.(I8x16 Shl) -> simd_op 0x6bl - | SimdShift V128Op.(I8x16 ShrS) -> simd_op 0x6cl - | SimdShift V128Op.(I8x16 ShrU) -> simd_op 0x6dl - | SimdShift V128Op.(I16x8 Shl) -> simd_op 0x8bl - | SimdShift V128Op.(I16x8 ShrS) -> simd_op 0x8cl - | SimdShift V128Op.(I16x8 ShrU) -> simd_op 0x8dl - | SimdShift V128Op.(I32x4 Shl) -> simd_op 0xabl - | SimdShift V128Op.(I32x4 ShrS) -> simd_op 0xacl - | SimdShift V128Op.(I32x4 ShrU) -> simd_op 0xadl - | SimdShift V128Op.(I64x2 Shl) -> simd_op 0xcbl - | SimdShift V128Op.(I64x2 ShrS) -> simd_op 0xccl - | SimdShift V128Op.(I64x2 ShrU) -> simd_op 0xcdl - | SimdShift (_) -> assert false - - | SimdBitmask Simd.I8x16 -> simd_op 0x64l - | SimdBitmask Simd.I16x8 -> simd_op 0x84l - | SimdBitmask Simd.I32x4 -> simd_op 0xa4l - | SimdBitmask Simd.I64x2 -> simd_op 0xc4l - | SimdBitmask (_) -> assert false + | SimdConst {it = V128 c; _} -> simd_op 0x0cl; v128 c + + | SimdTest (V128 V128Op.(V128x1 AnyTrue)) -> simd_op 0x53l + | SimdTest (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l + | SimdTest (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l + | SimdTest (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l + | SimdTest (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l + | SimdTest (V128 _) -> . + + | SimdUnary (V128 V128Op.(V128x1 Not)) -> simd_op 0x4dl + | SimdUnary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l + | SimdUnary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l + | SimdUnary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l + | SimdUnary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l + | SimdUnary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l + | SimdUnary (V128 V128Op.(I16x8 ExtendLowS)) -> simd_op 0x87l + | SimdUnary (V128 V128Op.(I16x8 ExtendHighS)) -> simd_op 0x88l + | SimdUnary (V128 V128Op.(I16x8 ExtendLowU)) -> simd_op 0x89l + | SimdUnary (V128 V128Op.(I16x8 ExtendHighU)) -> simd_op 0x8al + | SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0x7cl + | SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0x7dl + | SimdUnary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l + | SimdUnary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l + | SimdUnary (V128 V128Op.(I32x4 ExtendLowS)) -> simd_op 0xa7l + | SimdUnary (V128 V128Op.(I32x4 ExtendHighS)) -> simd_op 0xa8l + | SimdUnary (V128 V128Op.(I32x4 ExtendLowU)) -> simd_op 0xa9l + | SimdUnary (V128 V128Op.(I32x4 ExtendHighU)) -> simd_op 0xaal + | SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0x7el + | SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0x7fl + | SimdUnary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xc0l + | SimdUnary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l + | SimdUnary (V128 V128Op.(I64x2 ExtendLowS)) -> simd_op 0xc7l + | SimdUnary (V128 V128Op.(I64x2 ExtendHighS)) -> simd_op 0xc8l + | SimdUnary (V128 V128Op.(I64x2 ExtendLowU)) -> simd_op 0xc9l + | SimdUnary (V128 V128Op.(I64x2 ExtendHighU)) -> simd_op 0xcal + | SimdUnary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0x67l + | SimdUnary (V128 V128Op.(F32x4 Floor)) -> simd_op 0x68l + | SimdUnary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0x69l + | SimdUnary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0x6al + | SimdUnary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0x74l + | SimdUnary (V128 V128Op.(F64x2 Floor)) -> simd_op 0x75l + | SimdUnary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0x7al + | SimdUnary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0x94l + | SimdUnary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l + | SimdUnary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l + | SimdUnary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l + | SimdUnary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl + | SimdUnary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl + | SimdUnary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl + | SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l + | SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l + | SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0xfcl + | SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0xfdl + | SimdUnary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal + | SimdUnary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl + | SimdUnary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x5el + | SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x5fl + | SimdUnary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0xfel + | SimdUnary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0xffl + | SimdUnary (V128 _) -> assert false + + | SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) -> simd_op 0x0dl; List.iter u8 is + | SimdBinary (V128 V128Op.(I8x16 Swizzle)) -> simd_op 0x0el + | SimdBinary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l + | SimdBinary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l + | SimdBinary (V128 V128Op.(I8x16 LtS)) -> simd_op 0x25l + | SimdBinary (V128 V128Op.(I8x16 LtU)) -> simd_op 0x26l + | SimdBinary (V128 V128Op.(I8x16 GtS)) -> simd_op 0x27l + | SimdBinary (V128 V128Op.(I8x16 GtU)) -> simd_op 0x28l + | SimdBinary (V128 V128Op.(I8x16 LeS)) -> simd_op 0x29l + | SimdBinary (V128 V128Op.(I8x16 LeU)) -> simd_op 0x2al + | SimdBinary (V128 V128Op.(I8x16 GeS)) -> simd_op 0x2bl + | SimdBinary (V128 V128Op.(I8x16 GeU)) -> simd_op 0x2cl + | SimdBinary (V128 V128Op.(I8x16 NarrowS)) -> simd_op 0x65l + | SimdBinary (V128 V128Op.(I8x16 NarrowU)) -> simd_op 0x66l + | SimdBinary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el + | SimdBinary (V128 V128Op.(I8x16 AddSatS)) -> simd_op 0x6fl + | SimdBinary (V128 V128Op.(I8x16 AddSatU)) -> simd_op 0x70l + | SimdBinary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l + | SimdBinary (V128 V128Op.(I8x16 SubSatS)) -> simd_op 0x72l + | SimdBinary (V128 V128Op.(I8x16 SubSatU)) -> simd_op 0x73l + | SimdBinary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l + | SimdBinary (V128 V128Op.(I8x16 MinU)) -> simd_op 0x77l + | SimdBinary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l + | SimdBinary (V128 V128Op.(I8x16 MaxU)) -> simd_op 0x79l + | SimdBinary (V128 V128Op.(I8x16 AvgrU)) -> simd_op 0x7bl + | SimdBinary (V128 V128Op.(I16x8 Eq)) -> simd_op 0x2dl + | SimdBinary (V128 V128Op.(I16x8 Ne)) -> simd_op 0x2el + | SimdBinary (V128 V128Op.(I16x8 LtS)) -> simd_op 0x2fl + | SimdBinary (V128 V128Op.(I16x8 LtU)) -> simd_op 0x30l + | SimdBinary (V128 V128Op.(I16x8 GtS)) -> simd_op 0x31l + | SimdBinary (V128 V128Op.(I16x8 GtU)) -> simd_op 0x32l + | SimdBinary (V128 V128Op.(I16x8 LeS)) -> simd_op 0x33l + | SimdBinary (V128 V128Op.(I16x8 LeU)) -> simd_op 0x34l + | SimdBinary (V128 V128Op.(I16x8 GeS)) -> simd_op 0x35l + | SimdBinary (V128 V128Op.(I16x8 GeU)) -> simd_op 0x36l + | SimdBinary (V128 V128Op.(I16x8 NarrowS)) -> simd_op 0x85l + | SimdBinary (V128 V128Op.(I16x8 NarrowU)) -> simd_op 0x86l + | SimdBinary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el + | SimdBinary (V128 V128Op.(I16x8 AddSatS)) -> simd_op 0x8fl + | SimdBinary (V128 V128Op.(I16x8 AddSatU)) -> simd_op 0x90l + | SimdBinary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l + | SimdBinary (V128 V128Op.(I16x8 SubSatS)) -> simd_op 0x92l + | SimdBinary (V128 V128Op.(I16x8 SubSatU)) -> simd_op 0x93l + | SimdBinary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l + | SimdBinary (V128 V128Op.(I16x8 MinS)) -> simd_op 0x96l + | SimdBinary (V128 V128Op.(I16x8 MinU)) -> simd_op 0x97l + | SimdBinary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l + | SimdBinary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l + | SimdBinary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl + | SimdBinary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9cl + | SimdBinary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl + | SimdBinary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el + | SimdBinary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl + | SimdBinary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x82l + | SimdBinary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael + | SimdBinary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l + | SimdBinary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l + | SimdBinary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l + | SimdBinary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l + | SimdBinary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l + | SimdBinary (V128 V128Op.(I32x4 DotI16x8S)) -> simd_op 0xbal + | SimdBinary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l + | SimdBinary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l + | SimdBinary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l + | SimdBinary (V128 V128Op.(I32x4 LtS)) -> simd_op 0x39l + | SimdBinary (V128 V128Op.(I32x4 LtU)) -> simd_op 0x3al + | SimdBinary (V128 V128Op.(I32x4 GtS)) -> simd_op 0x3bl + | SimdBinary (V128 V128Op.(I32x4 GtU)) -> simd_op 0x3cl + | SimdBinary (V128 V128Op.(I32x4 LeS)) -> simd_op 0x3dl + | SimdBinary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el + | SimdBinary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl + | SimdBinary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l + | SimdBinary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbcl + | SimdBinary (V128 V128Op.(I32x4 ExtMulHighS)) -> simd_op 0xbdl + | SimdBinary (V128 V128Op.(I32x4 ExtMulLowU)) -> simd_op 0xbel + | SimdBinary (V128 V128Op.(I32x4 ExtMulHighU)) -> simd_op 0xbfl + | SimdBinary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel + | SimdBinary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l + | SimdBinary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l + | SimdBinary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xd6l + | SimdBinary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd7l + | SimdBinary (V128 V128Op.(I64x2 LtS)) -> simd_op 0xd8l + | SimdBinary (V128 V128Op.(I64x2 GtS)) -> simd_op 0xd9l + | SimdBinary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xdal + | SimdBinary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xdbl + | SimdBinary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xdcl + | SimdBinary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xddl + | SimdBinary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xdel + | SimdBinary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xdfl + | SimdBinary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l + | SimdBinary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l + | SimdBinary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l + | SimdBinary (V128 V128Op.(F32x4 Gt)) -> simd_op 0x44l + | SimdBinary (V128 V128Op.(F32x4 Le)) -> simd_op 0x45l + | SimdBinary (V128 V128Op.(F32x4 Ge)) -> simd_op 0x46l + | SimdBinary (V128 V128Op.(F32x4 Add)) -> simd_op 0xe4l + | SimdBinary (V128 V128Op.(F32x4 Sub)) -> simd_op 0xe5l + | SimdBinary (V128 V128Op.(F32x4 Mul)) -> simd_op 0xe6l + | SimdBinary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l + | SimdBinary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l + | SimdBinary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l + | SimdBinary (V128 V128Op.(F32x4 Pmin)) -> simd_op 0xeal + | SimdBinary (V128 V128Op.(F32x4 Pmax)) -> simd_op 0xebl + | SimdBinary (V128 V128Op.(F64x2 Eq)) -> simd_op 0x47l + | SimdBinary (V128 V128Op.(F64x2 Ne)) -> simd_op 0x48l + | SimdBinary (V128 V128Op.(F64x2 Lt)) -> simd_op 0x49l + | SimdBinary (V128 V128Op.(F64x2 Gt)) -> simd_op 0x4al + | SimdBinary (V128 V128Op.(F64x2 Le)) -> simd_op 0x4bl + | SimdBinary (V128 V128Op.(F64x2 Ge)) -> simd_op 0x4cl + | SimdBinary (V128 V128Op.(F64x2 Add)) -> simd_op 0xf0l + | SimdBinary (V128 V128Op.(F64x2 Sub)) -> simd_op 0xf1l + | SimdBinary (V128 V128Op.(F64x2 Mul)) -> simd_op 0xf2l + | SimdBinary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l + | SimdBinary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l + | SimdBinary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l + | SimdBinary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l + | SimdBinary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l + | SimdBinary (V128 V128Op.(V128x1 And)) -> simd_op 0x4el + | SimdBinary (V128 V128Op.(V128x1 AndNot)) -> simd_op 0x4fl + | SimdBinary (V128 V128Op.(V128x1 Or)) -> simd_op 0x50l + | SimdBinary (V128 V128Op.(V128x1 Xor)) -> simd_op 0x51l + | SimdBinary (V128 _) -> assert false + + | SimdTernary (V128 V128Op.(V128x1 Bitselect)) -> simd_op 0x52l + | SimdTernary (V128 _) -> . + + | SimdShift (V128 V128Op.(I8x16 Shl)) -> simd_op 0x6bl + | SimdShift (V128 V128Op.(I8x16 ShrS)) -> simd_op 0x6cl + | SimdShift (V128 V128Op.(I8x16 ShrU)) -> simd_op 0x6dl + | SimdShift (V128 V128Op.(I16x8 Shl)) -> simd_op 0x8bl + | SimdShift (V128 V128Op.(I16x8 ShrS)) -> simd_op 0x8cl + | SimdShift (V128 V128Op.(I16x8 ShrU)) -> simd_op 0x8dl + | SimdShift (V128 V128Op.(I32x4 Shl)) -> simd_op 0xabl + | SimdShift (V128 V128Op.(I32x4 ShrS)) -> simd_op 0xacl + | SimdShift (V128 V128Op.(I32x4 ShrU)) -> simd_op 0xadl + | SimdShift (V128 V128Op.(I64x2 Shl)) -> simd_op 0xcbl + | SimdShift (V128 V128Op.(I64x2 ShrS)) -> simd_op 0xccl + | SimdShift (V128 V128Op.(I64x2 ShrU)) -> simd_op 0xcdl + | SimdShift (V128 _) -> . + + | SimdBitmask (V128 V128Op.(I8x16 Bitmask)) -> simd_op 0x64l + | SimdBitmask (V128 V128Op.(I16x8 Bitmask)) -> simd_op 0x84l + | SimdBitmask (V128 V128Op.(I32x4 Bitmask)) -> simd_op 0xa4l + | SimdBitmask (V128 V128Op.(I64x2 Bitmask)) -> simd_op 0xc4l + | SimdBitmask (V128 _) -> . + + | SimdConvert (V128 (V128Op.(I8x16 Splat))) -> simd_op 0x0fl + | SimdConvert (V128 (V128Op.(I16x8 Splat))) -> simd_op 0x10l + | SimdConvert (V128 (V128Op.(I32x4 Splat))) -> simd_op 0x11l + | SimdConvert (V128 (V128Op.(I64x2 Splat))) -> simd_op 0x12l + | SimdConvert (V128 (V128Op.(F32x4 Splat))) -> simd_op 0x13l + | SimdConvert (V128 (V128Op.(F64x2 Splat))) -> simd_op 0x14l + | SimdConvert (V128 _) -> . + + | SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some SX)))) -> simd_op 0x15l; u8 i + | SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some ZX)))) -> simd_op 0x16l; u8 i + | SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some SX)))) -> simd_op 0x18l; u8 i + | SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some ZX)))) -> simd_op 0x19l; u8 i + | SimdExtract (V128 V128Op.(I32x4 (Extract (i, None)))) -> simd_op 0x1bl; u8 i + | SimdExtract (V128 V128Op.(I64x2 (Extract (i, None)))) -> simd_op 0x1dl; u8 i + | SimdExtract (V128 V128Op.(F32x4 (Extract (i, None)))) -> simd_op 0x1fl; u8 i + | SimdExtract (V128 V128Op.(F64x2 (Extract (i, None)))) -> simd_op 0x21l; u8 i + | SimdExtract (V128 _) -> assert false + + | SimdReplace (V128 V128Op.(I8x16 (Replace i))) -> simd_op 0x17l; u8 i + | SimdReplace (V128 V128Op.(I16x8 (Replace i))) -> simd_op 0x1al; u8 i + | SimdReplace (V128 V128Op.(I32x4 (Replace i))) -> simd_op 0x1cl; u8 i + | SimdReplace (V128 V128Op.(I64x2 (Replace i))) -> simd_op 0x1el; u8 i + | SimdReplace (V128 V128Op.(F32x4 (Replace i))) -> simd_op 0x20l; u8 i + | SimdReplace (V128 V128Op.(F64x2 (Replace i))) -> simd_op 0x22l; u8 i + | SimdReplace (V128 _) -> . let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 7d0445a42a..03af81af63 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -325,73 +325,75 @@ let rec step (c : config) : config = let n = match sz with | None -> Memory.load_num mem a offset ty - | Some (sz, ext) -> Memory.load_packed sz ext mem a offset ty + | Some (sz, ext) -> Memory.load_num_packed sz ext mem a offset ty in Num n :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) + | Store {offset; sz; _}, Num n :: Num (I32 i) :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let a = I64_convert.extend_i32_u i in + (try + (match sz with + | None -> Memory.store_num mem a offset n + | Some sz -> Memory.store_num_packed sz mem a offset n + ); + vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); + | SimdLoad {offset; ty; sz; _}, Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = match sz with - | None -> Memory.load_num mem addr offset ty + | None -> Memory.load_simd mem addr offset ty | Some (pack_size, simd_load) -> Memory.load_simd_packed pack_size simd_load mem addr offset ty - in Num v :: vs', [] + in Simd v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdLoadLane ({offset; ty; sz; _}, j), Num (V128 v) :: Num (I32 i) :: vs' -> + | SimdStore {offset; sz; _}, Simd v :: Num (I32 i) :: vs' -> + let mem = memory frame.inst (0l @@ e.at) in + let addr = I64_convert.extend_i32_u i in + (try + Memory.store_simd mem addr offset v; + vs', [] + with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); + + | SimdLoadLane ({offset; ty; sz; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = match sz with - | None -> assert false - | Some Pack8 -> + | Pack8 -> V128.I8x16.replace_lane j v - (I32Num.of_num 0 (Memory.load_packed Pack8 SX mem addr offset I32Type)) - | Some Pack16 -> + (I32Num.of_num 0 (Memory.load_num_packed Pack8 SX mem addr offset I32Type)) + | Pack16 -> V128.I16x8.replace_lane j v - (I32Num.of_num 0 (Memory.load_packed Pack16 SX mem addr offset I32Type)) - | Some Pack32 -> + (I32Num.of_num 0 (Memory.load_num_packed Pack16 SX mem addr offset I32Type)) + | Pack32 -> V128.I32x4.replace_lane j v (I32Num.of_num 0 (Memory.load_num mem addr offset I32Type)) - | Some Pack64 -> + | Pack64 -> V128.I64x2.replace_lane j v (I64Num.of_num 0 (Memory.load_num mem addr offset I64Type)) - in Num (V128 v) :: vs', [] + in Simd (V128 v) :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | Store {offset; sz; _}, Num n :: Num (I32 i) :: vs' -> - let mem = memory frame.inst (0l @@ e.at) in - let a = I64_convert.extend_i32_u i in - (try - (match sz with - | None -> Memory.store_num mem a offset n - | Some sz -> Memory.store_packed sz mem a offset n - ); - vs', [] - with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - - | SimdStore {offset; sz; _}, Num v :: Num (I32 i) :: vs' -> - let mem = memory frame.inst (0l @@ e.at) in - let addr = I64_convert.extend_i32_u i in - (try - Memory.store_num mem addr offset v; - vs', [] - with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - - | SimdStoreLane ({offset; ty; sz; _}, j), Num (V128 v) :: Num (I32 i) :: vs' -> + | SimdStoreLane ({offset; ty; sz; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try (match sz with - | None -> assert false - | Some Pack8 -> Memory.store_packed Pack8 mem addr offset (I32 (V128.I8x16.extract_lane_s j v)) - | Some Pack16 -> Memory.store_packed Pack16 mem addr offset (I32 (V128.I16x8.extract_lane_s j v)) - | Some Pack32 -> Memory.store_num mem addr offset (I32 (V128.I32x4.extract_lane_s j v)) - | Some Pack64 -> Memory.store_num mem addr offset (I64 (V128.I64x2.extract_lane_s j v)) + | Pack8 -> + Memory.store_num_packed Pack8 mem addr offset (I32 (V128.I8x16.extract_lane_s j v)) + | Pack16 -> + Memory.store_num_packed Pack16 mem addr offset (I32 (V128.I16x8.extract_lane_s j v)) + | Pack32 -> + Memory.store_num mem addr offset (I32 (V128.I32x4.extract_lane_s j v)) + | Pack64 -> + Memory.store_num mem addr offset (I64 (V128.I64x2.extract_lane_s j v)) ); vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) @@ -519,26 +521,45 @@ let rec step (c : config) : config = (try Num (Eval_numeric.eval_cvtop cvtop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTernary ternop, Num v3 :: Num v2 :: Num v1 :: vs' -> - (try Num (Eval_simd.eval_ternop ternop v1 v2 v3) :: vs', [] + | SimdConst v, vs -> + Simd v.it :: vs, [] + + | SimdUnary unop, Simd n :: vs' -> + (try Simd (Eval_simd.eval_unop unop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdExtract extractop, Num v :: vs' -> - (try Num (Eval_simd.eval_extractop extractop v) :: vs', [] + | SimdBinary binop, Simd n2 :: Simd n1 :: vs' -> + (try Simd (Eval_simd.eval_binop binop n1 n2) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | SimdTernary ternop, Simd v3 :: Simd v2 :: Simd v1 :: vs' -> + (try Simd (Eval_simd.eval_ternop ternop v1 v2 v3) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdReplace replaceop, Num r :: Num v :: vs' -> - (try Num (Eval_simd.eval_replaceop replaceop v r) :: vs', [] + | SimdTest testop, Simd n :: vs' -> + (try value_of_bool (Eval_simd.eval_testop testop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdShift shiftop, Num s :: Num v :: vs' -> - (try Num (Eval_simd.eval_shiftop shiftop v s) :: vs', [] + | SimdShift shiftop, Num s :: Simd v :: vs' -> + (try Simd (Eval_simd.eval_shiftop shiftop v s) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdBitmask bitmaskop, Num v :: vs' -> + | SimdBitmask bitmaskop, Simd v :: vs' -> (try Num (Eval_simd.eval_bitmaskop bitmaskop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdConvert cvtop, Num n :: vs' -> + (try Simd (Eval_simd.eval_cvtop cvtop n) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | SimdExtract extractop, Simd v :: vs' -> + (try Num (Eval_simd.eval_extractop extractop v) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | SimdReplace replaceop, Num r :: Simd v :: vs' -> + (try Simd (Eval_simd.eval_replaceop replaceop v r) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | _ -> let s1 = string_of_values (List.rev vs) in let s2 = string_of_value_types (List.map type_of_value (List.rev vs)) in diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_numeric.ml index 5f80ab025c..b5eaf3dd04 100644 --- a/interpreter/exec/eval_numeric.ml +++ b/interpreter/exec/eval_numeric.ml @@ -183,16 +183,15 @@ end (* Dispatch *) -let op i32 i64 f32 f64 v128 = function +let op i32 i64 f32 f64 = function | I32 x -> i32 x | I64 x -> i64 x | F32 x -> f32 x | F64 x -> f64 x - | V128 x -> v128 x -let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop Eval_simd.unop -let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop Eval_simd.binop -let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop Eval_simd.testop -let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop Eval_simd.relop -let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop Eval_simd.cvtop +let eval_unop = op I32Op.unop I64Op.unop F32Op.unop F64Op.unop +let eval_binop = op I32Op.binop I64Op.binop F32Op.binop F64Op.binop +let eval_testop = op I32Op.testop I64Op.testop F32Op.testop F64Op.testop +let eval_relop = op I32Op.relop I64Op.relop F32Op.relop F64Op.relop +let eval_cvtop = op I32CvtOp.cvtop I64CvtOp.cvtop F32CvtOp.cvtop F64CvtOp.cvtop diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 91ac45a405..6f89ef59d8 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -1,287 +1,287 @@ open Types open Values -module SimdOp (SXX : Simd.S) (Num : NumType with type t = SXX.t) = struct - open Ast.SimdOp - open Num +module V128Op = struct + open Ast.V128Op + open V128Simd let unop (op : unop) = - fun v -> match op with - | I8x16 Neg -> to_num (SXX.I8x16.neg (of_num 1 v)) - | I8x16 Abs -> to_num (SXX.I8x16.abs (of_num 1 v)) - | I8x16 Popcnt -> to_num (SXX.I8x16.popcnt (of_num 1 v)) - | I16x8 Neg -> to_num (SXX.I16x8.neg (of_num 1 v)) - | I16x8 Abs -> to_num (SXX.I16x8.abs (of_num 1 v)) - | I16x8 ExtendLowS -> to_num (SXX.I16x8_convert.extend_low_s (of_num 1 v)) - | I16x8 ExtendHighS -> to_num (SXX.I16x8_convert.extend_high_s (of_num 1 v)) - | I16x8 ExtendLowU -> to_num (SXX.I16x8_convert.extend_low_u (of_num 1 v)) - | I16x8 ExtendHighU -> to_num (SXX.I16x8_convert.extend_high_u (of_num 1 v)) - | I16x8 ExtAddPairwiseS -> to_num (SXX.I16x8_convert.extadd_pairwise_s (of_num 1 v)) - | I16x8 ExtAddPairwiseU -> to_num (SXX.I16x8_convert.extadd_pairwise_u (of_num 1 v)) - | I32x4 Abs -> to_num (SXX.I32x4.abs (of_num 1 v)) - | I32x4 Neg -> to_num (SXX.I32x4.neg (of_num 1 v)) - | I32x4 ExtendLowS -> to_num (SXX.I32x4_convert.extend_low_s (of_num 1 v)) - | I32x4 ExtendHighS -> to_num (SXX.I32x4_convert.extend_high_s (of_num 1 v)) - | I32x4 ExtendLowU -> to_num (SXX.I32x4_convert.extend_low_u (of_num 1 v)) - | I32x4 ExtendHighU -> to_num (SXX.I32x4_convert.extend_high_u (of_num 1 v)) - | I32x4 TruncSatF32x4S -> to_num (SXX.I32x4_convert.trunc_sat_f32x4_s (of_num 1 v)) - | I32x4 TruncSatF32x4U -> to_num (SXX.I32x4_convert.trunc_sat_f32x4_u (of_num 1 v)) - | I32x4 TruncSatF64x2SZero -> - to_num (SXX.I32x4_convert.trunc_sat_f64x2_s_zero (of_num 1 v)) - | I32x4 TruncSatF64x2UZero -> - to_num (SXX.I32x4_convert.trunc_sat_f64x2_u_zero (of_num 1 v)) - | I32x4 ExtAddPairwiseS -> to_num (SXX.I32x4_convert.extadd_pairwise_s (of_num 1 v)) - | I32x4 ExtAddPairwiseU -> to_num (SXX.I32x4_convert.extadd_pairwise_u (of_num 1 v)) - | I64x2 Abs -> to_num (SXX.I64x2.abs (of_num 1 v)) - | I64x2 Neg -> to_num (SXX.I64x2.neg (of_num 1 v)) - | I64x2 ExtendLowS -> to_num (SXX.I64x2_convert.extend_low_s (of_num 1 v)) - | I64x2 ExtendHighS -> to_num (SXX.I64x2_convert.extend_high_s (of_num 1 v)) - | I64x2 ExtendLowU -> to_num (SXX.I64x2_convert.extend_low_u (of_num 1 v)) - | I64x2 ExtendHighU -> to_num (SXX.I64x2_convert.extend_high_u (of_num 1 v)) - | F32x4 Abs -> to_num (SXX.F32x4.abs (of_num 1 v)) - | F32x4 Neg -> to_num (SXX.F32x4.neg (of_num 1 v)) - | F32x4 Sqrt -> to_num (SXX.F32x4.sqrt (of_num 1 v)) - | F32x4 Ceil -> to_num (SXX.F32x4.ceil (of_num 1 v)) - | F32x4 Floor -> to_num (SXX.F32x4.floor (of_num 1 v)) - | F32x4 Trunc -> to_num (SXX.F32x4.trunc (of_num 1 v)) - | F32x4 Nearest -> to_num (SXX.F32x4.nearest (of_num 1 v)) - | F32x4 ConvertI32x4S -> to_num (SXX.F32x4_convert.convert_i32x4_s (of_num 1 v)) - | F32x4 ConvertI32x4U -> to_num (SXX.F32x4_convert.convert_i32x4_u (of_num 1 v)) - | F32x4 DemoteF64x2Zero -> to_num (SXX.F32x4_convert.demote_f64x2_zero (of_num 1 v)) - | F64x2 Abs -> to_num (SXX.F64x2.abs (of_num 1 v)) - | F64x2 Neg -> to_num (SXX.F64x2.neg (of_num 1 v)) - | F64x2 Sqrt -> to_num (SXX.F64x2.sqrt (of_num 1 v)) - | F64x2 Ceil -> to_num (SXX.F64x2.ceil (of_num 1 v)) - | F64x2 Floor -> to_num (SXX.F64x2.floor (of_num 1 v)) - | F64x2 Trunc -> to_num (SXX.F64x2.trunc (of_num 1 v)) - | F64x2 Nearest -> to_num (SXX.F64x2.nearest (of_num 1 v)) - | F64x2 PromoteLowF32x4 -> to_num (SXX.F64x2_convert.promote_low_f32x4 (of_num 1 v)) - | F64x2 ConvertI32x4S -> to_num (SXX.F64x2_convert.convert_i32x4_s (of_num 1 v)) - | F64x2 ConvertI32x4U -> to_num (SXX.F64x2_convert.convert_i32x4_u (of_num 1 v)) - | V128 Not -> to_num (SXX.V128.lognot (of_num 1 v)) + let f = match op with + | I8x16 Neg -> V128.I8x16.neg + | I8x16 Abs -> V128.I8x16.abs + | I8x16 Popcnt -> V128.I8x16.popcnt + | I16x8 Neg -> V128.I16x8.neg + | I16x8 Abs -> V128.I16x8.abs + | I16x8 ExtendLowS -> V128.I16x8_convert.extend_low_s + | I16x8 ExtendHighS -> V128.I16x8_convert.extend_high_s + | I16x8 ExtendLowU -> V128.I16x8_convert.extend_low_u + | I16x8 ExtendHighU -> V128.I16x8_convert.extend_high_u + | I16x8 ExtAddPairwiseS -> V128.I16x8_convert.extadd_pairwise_s + | I16x8 ExtAddPairwiseU -> V128.I16x8_convert.extadd_pairwise_u + | I32x4 Abs -> V128.I32x4.abs + | I32x4 Neg -> V128.I32x4.neg + | I32x4 ExtendLowS -> V128.I32x4_convert.extend_low_s + | I32x4 ExtendHighS -> V128.I32x4_convert.extend_high_s + | I32x4 ExtendLowU -> V128.I32x4_convert.extend_low_u + | I32x4 ExtendHighU -> V128.I32x4_convert.extend_high_u + | I32x4 TruncSatF32x4S -> V128.I32x4_convert.trunc_sat_f32x4_s + | I32x4 TruncSatF32x4U -> V128.I32x4_convert.trunc_sat_f32x4_u + | I32x4 TruncSatF64x2SZero -> V128.I32x4_convert.trunc_sat_f64x2_s_zero + | I32x4 TruncSatF64x2UZero -> V128.I32x4_convert.trunc_sat_f64x2_u_zero + | I32x4 ExtAddPairwiseS -> V128.I32x4_convert.extadd_pairwise_s + | I32x4 ExtAddPairwiseU -> V128.I32x4_convert.extadd_pairwise_u + | I64x2 Abs -> V128.I64x2.abs + | I64x2 Neg -> V128.I64x2.neg + | I64x2 ExtendLowS -> V128.I64x2_convert.extend_low_s + | I64x2 ExtendHighS -> V128.I64x2_convert.extend_high_s + | I64x2 ExtendLowU -> V128.I64x2_convert.extend_low_u + | I64x2 ExtendHighU -> V128.I64x2_convert.extend_high_u + | F32x4 Abs -> V128.F32x4.abs + | F32x4 Neg -> V128.F32x4.neg + | F32x4 Sqrt -> V128.F32x4.sqrt + | F32x4 Ceil -> V128.F32x4.ceil + | F32x4 Floor -> V128.F32x4.floor + | F32x4 Trunc -> V128.F32x4.trunc + | F32x4 Nearest -> V128.F32x4.nearest + | F32x4 ConvertI32x4S -> V128.F32x4_convert.convert_i32x4_s + | F32x4 ConvertI32x4U -> V128.F32x4_convert.convert_i32x4_u + | F32x4 DemoteF64x2Zero -> V128.F32x4_convert.demote_f64x2_zero + | F64x2 Abs -> V128.F64x2.abs + | F64x2 Neg -> V128.F64x2.neg + | F64x2 Sqrt -> V128.F64x2.sqrt + | F64x2 Ceil -> V128.F64x2.ceil + | F64x2 Floor -> V128.F64x2.floor + | F64x2 Trunc -> V128.F64x2.trunc + | F64x2 Nearest -> V128.F64x2.nearest + | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 + | F64x2 ConvertI32x4S -> V128.F64x2_convert.convert_i32x4_s + | F64x2 ConvertI32x4U -> V128.F64x2_convert.convert_i32x4_u + | V128x1 Not -> V128.V128x1.lognot | _ -> assert false + in fun v -> to_simd (f (of_simd 1 v)) let binop (op : binop) = let f = match op with - | I8x16 Swizzle -> SXX.V8x16.swizzle - | I8x16 (Shuffle imms) -> fun a b -> SXX.V8x16.shuffle a b imms - | I8x16 Eq -> SXX.I8x16.eq - | I8x16 Ne -> SXX.I8x16.ne - | I8x16 LtS -> SXX.I8x16.lt_s - | I8x16 LtU -> SXX.I8x16.lt_u - | I8x16 LeS -> SXX.I8x16.le_s - | I8x16 LeU -> SXX.I8x16.le_u - | I8x16 GtS -> SXX.I8x16.gt_s - | I8x16 GtU -> SXX.I8x16.gt_u - | I8x16 GeS -> SXX.I8x16.ge_s - | I8x16 GeU -> SXX.I8x16.ge_u - | I8x16 NarrowS -> SXX.I8x16_convert.narrow_s - | I8x16 NarrowU -> SXX.I8x16_convert.narrow_u - | I8x16 Add -> SXX.I8x16.add - | I8x16 AddSatS -> SXX.I8x16.add_sat_s - | I8x16 AddSatU -> SXX.I8x16.add_sat_u - | I8x16 Sub -> SXX.I8x16.sub - | I8x16 SubSatS -> SXX.I8x16.sub_sat_s - | I8x16 SubSatU -> SXX.I8x16.sub_sat_u - | I8x16 MinS -> SXX.I8x16.min_s - | I8x16 MinU -> SXX.I8x16.min_u - | I8x16 MaxS -> SXX.I8x16.max_s - | I8x16 MaxU -> SXX.I8x16.max_u - | I8x16 AvgrU -> SXX.I8x16.avgr_u - | I16x8 Eq -> SXX.I16x8.eq - | I16x8 Ne -> SXX.I16x8.ne - | I16x8 LtS -> SXX.I16x8.lt_s - | I16x8 LtU -> SXX.I16x8.lt_u - | I16x8 LeS -> SXX.I16x8.le_s - | I16x8 LeU -> SXX.I16x8.le_u - | I16x8 GtS -> SXX.I16x8.gt_s - | I16x8 GtU -> SXX.I16x8.gt_u - | I16x8 GeS -> SXX.I16x8.ge_s - | I16x8 GeU -> SXX.I16x8.ge_u - | I16x8 NarrowS -> SXX.I16x8_convert.narrow_s - | I16x8 NarrowU -> SXX.I16x8_convert.narrow_u - | I16x8 Add -> SXX.I16x8.add - | I16x8 AddSatS -> SXX.I16x8.add_sat_s - | I16x8 AddSatU -> SXX.I16x8.add_sat_u - | I16x8 Sub -> SXX.I16x8.sub - | I16x8 SubSatS -> SXX.I16x8.sub_sat_s - | I16x8 SubSatU -> SXX.I16x8.sub_sat_u - | I16x8 Mul -> SXX.I16x8.mul - | I16x8 MinS -> SXX.I16x8.min_s - | I16x8 MinU -> SXX.I16x8.min_u - | I16x8 MaxS -> SXX.I16x8.max_s - | I16x8 MaxU -> SXX.I16x8.max_u - | I16x8 AvgrU -> SXX.I16x8.avgr_u - | I16x8 ExtMulLowS -> SXX.I16x8_convert.extmul_low_s - | I16x8 ExtMulHighS -> SXX.I16x8_convert.extmul_high_s - | I16x8 ExtMulLowU -> SXX.I16x8_convert.extmul_low_u - | I16x8 ExtMulHighU -> SXX.I16x8_convert.extmul_high_u - | I16x8 Q15MulRSatS -> SXX.I16x8.q15mulr_sat_s - | I32x4 Add -> SXX.I32x4.add - | I32x4 Sub -> SXX.I32x4.sub - | I32x4 MinS -> SXX.I32x4.min_s - | I32x4 MinU -> SXX.I32x4.min_u - | I32x4 MaxS -> SXX.I32x4.max_s - | I32x4 MaxU -> SXX.I32x4.max_u - | I32x4 Mul -> SXX.I32x4.mul - | I32x4 Eq -> SXX.I32x4.eq - | I32x4 Ne -> SXX.I32x4.ne - | I32x4 LtS -> SXX.I32x4.lt_s - | I32x4 LtU -> SXX.I32x4.lt_u - | I32x4 LeS -> SXX.I32x4.le_s - | I32x4 LeU -> SXX.I32x4.le_u - | I32x4 GtS -> SXX.I32x4.gt_s - | I32x4 GtU -> SXX.I32x4.gt_u - | I32x4 GeS -> SXX.I32x4.ge_s - | I32x4 GeU -> SXX.I32x4.ge_u - | I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s - | I64x2 Eq -> SXX.I64x2.eq - | I64x2 Ne -> SXX.I64x2.ne - | I64x2 LtS -> SXX.I64x2.lt_s - | I64x2 LeS -> SXX.I64x2.le_s - | I64x2 GtS -> SXX.I64x2.gt_s - | I64x2 GeS -> SXX.I64x2.ge_s - | I32x4 ExtMulLowS -> SXX.I32x4_convert.extmul_low_s - | I32x4 ExtMulHighS -> SXX.I32x4_convert.extmul_high_s - | I32x4 ExtMulLowU -> SXX.I32x4_convert.extmul_low_u - | I32x4 ExtMulHighU -> SXX.I32x4_convert.extmul_high_u - | I64x2 Add -> SXX.I64x2.add - | I64x2 Sub -> SXX.I64x2.sub - | I64x2 Mul -> SXX.I64x2.mul - | I64x2 ExtMulLowS -> SXX.I64x2_convert.extmul_low_s - | I64x2 ExtMulHighS -> SXX.I64x2_convert.extmul_high_s - | I64x2 ExtMulLowU -> SXX.I64x2_convert.extmul_low_u - | I64x2 ExtMulHighU -> SXX.I64x2_convert.extmul_high_u - | F32x4 Eq -> SXX.F32x4.eq - | F32x4 Ne -> SXX.F32x4.ne - | F32x4 Lt -> SXX.F32x4.lt - | F32x4 Le -> SXX.F32x4.le - | F32x4 Gt -> SXX.F32x4.gt - | F32x4 Ge -> SXX.F32x4.ge - | F32x4 Add -> SXX.F32x4.add - | F32x4 Sub -> SXX.F32x4.sub - | F32x4 Mul -> SXX.F32x4.mul - | F32x4 Div -> SXX.F32x4.div - | F32x4 Min -> SXX.F32x4.min - | F32x4 Max -> SXX.F32x4.max - | F32x4 Pmin -> SXX.F32x4.pmin - | F32x4 Pmax -> SXX.F32x4.pmax - | F64x2 Eq -> SXX.F64x2.eq - | F64x2 Ne -> SXX.F64x2.ne - | F64x2 Lt -> SXX.F64x2.lt - | F64x2 Le -> SXX.F64x2.le - | F64x2 Gt -> SXX.F64x2.gt - | F64x2 Ge -> SXX.F64x2.ge - | F64x2 Add -> SXX.F64x2.add - | F64x2 Sub -> SXX.F64x2.sub - | F64x2 Mul -> SXX.F64x2.mul - | F64x2 Div -> SXX.F64x2.div - | F64x2 Min -> SXX.F64x2.min - | F64x2 Max -> SXX.F64x2.max - | F64x2 Pmin -> SXX.F64x2.pmin - | F64x2 Pmax -> SXX.F64x2.pmax - | V128 And -> SXX.V128.and_ - | V128 Or -> SXX.V128.or_ - | V128 Xor -> SXX.V128.xor - | V128 AndNot -> SXX.V128.andnot + | I8x16 Swizzle -> V128.V8x16.swizzle + | I8x16 (Shuffle is) -> fun a b -> V128.V8x16.shuffle a b is + | I8x16 Eq -> V128.I8x16.eq + | I8x16 Ne -> V128.I8x16.ne + | I8x16 LtS -> V128.I8x16.lt_s + | I8x16 LtU -> V128.I8x16.lt_u + | I8x16 LeS -> V128.I8x16.le_s + | I8x16 LeU -> V128.I8x16.le_u + | I8x16 GtS -> V128.I8x16.gt_s + | I8x16 GtU -> V128.I8x16.gt_u + | I8x16 GeS -> V128.I8x16.ge_s + | I8x16 GeU -> V128.I8x16.ge_u + | I8x16 NarrowS -> V128.I8x16_convert.narrow_s + | I8x16 NarrowU -> V128.I8x16_convert.narrow_u + | I8x16 Add -> V128.I8x16.add + | I8x16 AddSatS -> V128.I8x16.add_sat_s + | I8x16 AddSatU -> V128.I8x16.add_sat_u + | I8x16 Sub -> V128.I8x16.sub + | I8x16 SubSatS -> V128.I8x16.sub_sat_s + | I8x16 SubSatU -> V128.I8x16.sub_sat_u + | I8x16 MinS -> V128.I8x16.min_s + | I8x16 MinU -> V128.I8x16.min_u + | I8x16 MaxS -> V128.I8x16.max_s + | I8x16 MaxU -> V128.I8x16.max_u + | I8x16 AvgrU -> V128.I8x16.avgr_u + | I16x8 Eq -> V128.I16x8.eq + | I16x8 Ne -> V128.I16x8.ne + | I16x8 LtS -> V128.I16x8.lt_s + | I16x8 LtU -> V128.I16x8.lt_u + | I16x8 LeS -> V128.I16x8.le_s + | I16x8 LeU -> V128.I16x8.le_u + | I16x8 GtS -> V128.I16x8.gt_s + | I16x8 GtU -> V128.I16x8.gt_u + | I16x8 GeS -> V128.I16x8.ge_s + | I16x8 GeU -> V128.I16x8.ge_u + | I16x8 NarrowS -> V128.I16x8_convert.narrow_s + | I16x8 NarrowU -> V128.I16x8_convert.narrow_u + | I16x8 Add -> V128.I16x8.add + | I16x8 AddSatS -> V128.I16x8.add_sat_s + | I16x8 AddSatU -> V128.I16x8.add_sat_u + | I16x8 Sub -> V128.I16x8.sub + | I16x8 SubSatS -> V128.I16x8.sub_sat_s + | I16x8 SubSatU -> V128.I16x8.sub_sat_u + | I16x8 Mul -> V128.I16x8.mul + | I16x8 MinS -> V128.I16x8.min_s + | I16x8 MinU -> V128.I16x8.min_u + | I16x8 MaxS -> V128.I16x8.max_s + | I16x8 MaxU -> V128.I16x8.max_u + | I16x8 AvgrU -> V128.I16x8.avgr_u + | I16x8 ExtMulLowS -> V128.I16x8_convert.extmul_low_s + | I16x8 ExtMulHighS -> V128.I16x8_convert.extmul_high_s + | I16x8 ExtMulLowU -> V128.I16x8_convert.extmul_low_u + | I16x8 ExtMulHighU -> V128.I16x8_convert.extmul_high_u + | I16x8 Q15MulRSatS -> V128.I16x8.q15mulr_sat_s + | I32x4 Add -> V128.I32x4.add + | I32x4 Sub -> V128.I32x4.sub + | I32x4 MinS -> V128.I32x4.min_s + | I32x4 MinU -> V128.I32x4.min_u + | I32x4 MaxS -> V128.I32x4.max_s + | I32x4 MaxU -> V128.I32x4.max_u + | I32x4 Mul -> V128.I32x4.mul + | I32x4 Eq -> V128.I32x4.eq + | I32x4 Ne -> V128.I32x4.ne + | I32x4 LtS -> V128.I32x4.lt_s + | I32x4 LtU -> V128.I32x4.lt_u + | I32x4 LeS -> V128.I32x4.le_s + | I32x4 LeU -> V128.I32x4.le_u + | I32x4 GtS -> V128.I32x4.gt_s + | I32x4 GtU -> V128.I32x4.gt_u + | I32x4 GeS -> V128.I32x4.ge_s + | I32x4 GeU -> V128.I32x4.ge_u + | I32x4 DotI16x8S -> V128.I32x4_convert.dot_i16x8_s + | I64x2 Eq -> V128.I64x2.eq + | I64x2 Ne -> V128.I64x2.ne + | I64x2 LtS -> V128.I64x2.lt_s + | I64x2 LeS -> V128.I64x2.le_s + | I64x2 GtS -> V128.I64x2.gt_s + | I64x2 GeS -> V128.I64x2.ge_s + | I32x4 ExtMulLowS -> V128.I32x4_convert.extmul_low_s + | I32x4 ExtMulHighS -> V128.I32x4_convert.extmul_high_s + | I32x4 ExtMulLowU -> V128.I32x4_convert.extmul_low_u + | I32x4 ExtMulHighU -> V128.I32x4_convert.extmul_high_u + | I64x2 Add -> V128.I64x2.add + | I64x2 Sub -> V128.I64x2.sub + | I64x2 Mul -> V128.I64x2.mul + | I64x2 ExtMulLowS -> V128.I64x2_convert.extmul_low_s + | I64x2 ExtMulHighS -> V128.I64x2_convert.extmul_high_s + | I64x2 ExtMulLowU -> V128.I64x2_convert.extmul_low_u + | I64x2 ExtMulHighU -> V128.I64x2_convert.extmul_high_u + | F32x4 Eq -> V128.F32x4.eq + | F32x4 Ne -> V128.F32x4.ne + | F32x4 Lt -> V128.F32x4.lt + | F32x4 Le -> V128.F32x4.le + | F32x4 Gt -> V128.F32x4.gt + | F32x4 Ge -> V128.F32x4.ge + | F32x4 Add -> V128.F32x4.add + | F32x4 Sub -> V128.F32x4.sub + | F32x4 Mul -> V128.F32x4.mul + | F32x4 Div -> V128.F32x4.div + | F32x4 Min -> V128.F32x4.min + | F32x4 Max -> V128.F32x4.max + | F32x4 Pmin -> V128.F32x4.pmin + | F32x4 Pmax -> V128.F32x4.pmax + | F64x2 Eq -> V128.F64x2.eq + | F64x2 Ne -> V128.F64x2.ne + | F64x2 Lt -> V128.F64x2.lt + | F64x2 Le -> V128.F64x2.le + | F64x2 Gt -> V128.F64x2.gt + | F64x2 Ge -> V128.F64x2.ge + | F64x2 Add -> V128.F64x2.add + | F64x2 Sub -> V128.F64x2.sub + | F64x2 Mul -> V128.F64x2.mul + | F64x2 Div -> V128.F64x2.div + | F64x2 Min -> V128.F64x2.min + | F64x2 Max -> V128.F64x2.max + | F64x2 Pmin -> V128.F64x2.pmin + | F64x2 Pmax -> V128.F64x2.pmax + | V128x1 And -> V128.V128x1.and_ + | V128x1 Or -> V128.V128x1.or_ + | V128x1 Xor -> V128.V128x1.xor + | V128x1 AndNot -> V128.V128x1.andnot | _ -> assert false - in fun v1 v2 -> to_num (f (of_num 1 v1) (of_num 2 v2)) - - let testop (op : testop) = - let f = match op with - | V128 AnyTrue -> SXX.I8x16.any_true - | I8x16 AllTrue -> SXX.I8x16.all_true - | I16x8 AllTrue -> SXX.I16x8.all_true - | I32x4 AllTrue -> SXX.I32x4.all_true - | I64x2 AllTrue -> SXX.I64x2.all_true - | _ -> assert false - in fun v -> f (of_num 1 v) - - let relop op = assert false - - let extractop op v = - let v128 = of_num 1 v in - match op with - | I8x16 (SX, imm) -> (I32 (SXX.I8x16.extract_lane_s imm v128)) - | I8x16 (ZX, imm) -> (I32 (SXX.I8x16.extract_lane_u imm v128)) - | I16x8 (SX, imm) -> (I32 (SXX.I16x8.extract_lane_s imm v128)) - | I16x8 (ZX, imm) -> (I32 (SXX.I16x8.extract_lane_u imm v128)) - | I32x4 (_, imm) -> (I32 (SXX.I32x4.extract_lane_s imm v128)) - | I64x2 (_, imm) -> (I64 (SXX.I64x2.extract_lane_s imm v128)) - | F32x4 (_, imm) -> (F32 (SXX.F32x4.extract_lane imm v128)) - | F64x2 (_, imm) -> (F64 (SXX.F64x2.extract_lane imm v128)) - | _ -> assert false - - let replaceop op v (r : Values.num) = - let v128 = of_num 1 v in - match op, r with - | I8x16 imm, I32 r -> to_num (SXX.I8x16.replace_lane imm v128 r) - | I16x8 imm, I32 r -> to_num (SXX.I16x8.replace_lane imm v128 r) - | I32x4 imm, I32 r -> to_num (SXX.I32x4.replace_lane imm v128 r) - | I64x2 imm, I64 r -> to_num (SXX.I64x2.replace_lane imm v128 r) - | F32x4 imm, F32 r -> to_num (SXX.F32x4.replace_lane imm v128 r) - | F64x2 imm, F64 r -> to_num (SXX.F64x2.replace_lane imm v128 r) - | _ -> assert false + in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) let ternop op = let f = match op with - | Bitselect -> SXX.V128.bitselect - in fun v1 v2 v3 -> to_num (f (of_num 1 v1) (of_num 2 v2) (of_num 3 v3)) + | V128x1 Bitselect -> V128.V128x1.bitselect + | _ -> assert false + in fun v1 v2 v3 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2) (of_simd 3 v3)) let shiftop (op : shiftop) = let f = match op with - | I8x16 Shl -> SXX.I8x16.shl - | I8x16 ShrS -> SXX.I8x16.shr_s - | I8x16 ShrU -> SXX.I8x16.shr_u - | I16x8 Shl -> SXX.I16x8.shl - | I16x8 ShrS -> SXX.I16x8.shr_s - | I16x8 ShrU -> SXX.I16x8.shr_u - | I32x4 Shl -> SXX.I32x4.shl - | I32x4 ShrS -> SXX.I32x4.shr_s - | I32x4 ShrU -> SXX.I32x4.shr_u - | I64x2 Shl -> SXX.I64x2.shl - | I64x2 ShrS -> SXX.I64x2.shr_s - | I64x2 ShrU -> SXX.I64x2.shr_u - | _ -> failwith "unimplemented shr_u" - in fun v s -> to_num (f (of_num 1 v) (I32Num.of_num 2 s)) + | I8x16 Shl -> V128.I8x16.shl + | I8x16 ShrS -> V128.I8x16.shr_s + | I8x16 ShrU -> V128.I8x16.shr_u + | I16x8 Shl -> V128.I16x8.shl + | I16x8 ShrS -> V128.I16x8.shr_s + | I16x8 ShrU -> V128.I16x8.shr_u + | I32x4 Shl -> V128.I32x4.shl + | I32x4 ShrS -> V128.I32x4.shr_s + | I32x4 ShrU -> V128.I32x4.shr_u + | I64x2 Shl -> V128.I64x2.shl + | I64x2 ShrS -> V128.I64x2.shr_s + | I64x2 ShrU -> V128.I64x2.shr_u + | _ -> . + in fun v n -> to_simd (f (of_simd 1 v) (I32Num.of_num 2 n)) - let bitmaskop (op : Simd.shape) v = + let testop (op : testop) = let f = match op with - | Simd.I8x16 -> SXX.I8x16.bitmask - | Simd.I16x8 -> SXX.I16x8.bitmask - | Simd.I32x4 -> SXX.I32x4.bitmask - | Simd.I64x2 -> SXX.I64x2.bitmask - | _ -> assert false - in I32 (f (of_num 1 v)) - + | I8x16 AllTrue -> V128.I8x16.all_true + | I16x8 AllTrue -> V128.I16x8.all_true + | I32x4 AllTrue -> V128.I32x4.all_true + | I64x2 AllTrue -> V128.I64x2.all_true + | V128x1 AnyTrue -> V128.I8x16.any_true + | _ -> . + in fun v -> f (of_simd 1 v) + + let bitmaskop (op : bitmaskop) v = + let f = match op with + | I8x16 Bitmask -> V128.I8x16.bitmask + | I16x8 Bitmask -> V128.I16x8.bitmask + | I32x4 Bitmask -> V128.I32x4.bitmask + | I64x2 Bitmask -> V128.I64x2.bitmask + | _ -> . + in I32 (f (of_simd 1 v)) end -module V128Op = SimdOp (V128) (Values.V128Num) - module V128CvtOp = struct - open Ast.SimdOp + open Ast.V128Op + + let cvtop (op : cvtop) v = + let i = + match op with + | I8x16 Splat -> V128.I8x16.splat (I32Num.of_num 1 v) + | I16x8 Splat -> V128.I16x8.splat (I32Num.of_num 1 v) + | I32x4 Splat -> V128.I32x4.splat (I32Num.of_num 1 v) + | I64x2 Splat -> V128.I64x2.splat (I64Num.of_num 1 v) + | F32x4 Splat -> V128.F32x4.splat (F32Num.of_num 1 v) + | F64x2 Splat -> V128.F64x2.splat (F64Num.of_num 1 v) + | _ -> . + in V128Simd.to_simd i - let cvtop op v : num = + let extractop (op : extractop) v = + let v128 = V128Simd.of_simd 1 v in match op with - | I8x16 Splat -> V128Num.to_num (V128.I8x16.splat (I32Num.of_num 1 v)) - | I16x8 Splat -> V128 (V128.I16x8.splat (I32Num.of_num 1 v)) - | I32x4 Splat -> V128 (V128.I32x4.splat (I32Num.of_num 1 v)) - | I64x2 Splat -> V128 (V128.I64x2.splat (I64Num.of_num 1 v)) - | F32x4 Splat -> V128 (V128.F32x4.splat (F32Num.of_num 1 v)) - | F64x2 Splat -> V128 (V128.F64x2.splat (F64Num.of_num 1 v)) + | I8x16 (Extract (i, Some SX)) -> I32 (V128.I8x16.extract_lane_s i v128) + | I8x16 (Extract (i, Some ZX)) -> I32 (V128.I8x16.extract_lane_u i v128) + | I16x8 (Extract (i, Some SX)) -> I32 (V128.I16x8.extract_lane_s i v128) + | I16x8 (Extract (i, Some ZX)) -> I32 (V128.I16x8.extract_lane_u i v128) + | I32x4 (Extract (i, None)) -> I32 (V128.I32x4.extract_lane_u i v128) + | I64x2 (Extract (i, None)) -> I64 (V128.I64x2.extract_lane_u i v128) + | F32x4 (Extract (i, None)) -> F32 (V128.F32x4.extract_lane i v128) + | F64x2 (Extract (i, None)) -> F64 (V128.F64x2.extract_lane i v128) | _ -> assert false + + let replaceop (op : replaceop) v (r : Values.num) = + let v128 = V128Simd.of_simd 1 v in + let v128' = match op, r with + | I8x16 (Replace i), I32 r -> V128.I8x16.replace_lane i v128 r + | I16x8 (Replace i), I32 r -> V128.I16x8.replace_lane i v128 r + | I32x4 (Replace i), I32 r -> V128.I32x4.replace_lane i v128 r + | I64x2 (Replace i), I64 r -> V128.I64x2.replace_lane i v128 r + | F32x4 (Replace i), F32 r -> V128.F32x4.replace_lane i v128 r + | F64x2 (Replace i), F64 r -> V128.F64x2.replace_lane i v128 r + | _ -> assert false + in V128Simd.to_simd v128' end +(* Dispatch *) -let unop = V128Op.unop -let binop = V128Op.binop -let testop = V128Op.testop -let relop = V128Op.relop -let cvtop = V128CvtOp.cvtop +let op v128 = function + | V128 x -> v128 x -let eval_extractop extractop v = V128Op.extractop extractop v -let eval_replaceop replaceop v r = V128Op.replaceop replaceop v r -let eval_ternop = V128Op.ternop -let eval_shiftop = V128Op.shiftop -let eval_bitmaskop = V128Op.bitmaskop +let eval_unop = op V128Op.unop +let eval_binop = op V128Op.binop +let eval_ternop = op V128Op.ternop +let eval_testop = op V128Op.testop +let eval_shiftop = op V128Op.shiftop +let eval_bitmaskop = op V128Op.bitmaskop +let eval_cvtop = op V128CvtOp.cvtop +let eval_extractop = op V128CvtOp.extractop +let eval_replaceop = op V128CvtOp.replaceop diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli index 937fb14364..2c66442184 100644 --- a/interpreter/exec/eval_simd.mli +++ b/interpreter/exec/eval_simd.mli @@ -1,13 +1,11 @@ open Values -val unop : Ast.V128Op.unop -> num -> num -val binop : Ast.V128Op.binop -> num -> num -> num -val testop : Ast.V128Op.testop -> num -> bool -val relop : Ast.V128Op.relop -> num -> num -> bool -val cvtop : Ast.V128Op.cvtop -> num -> num - -val eval_ternop : Ast.V128Op.ternop -> num -> num -> num -> num -val eval_shiftop : Ast.V128Op.shiftop -> num -> num -> num -val eval_bitmaskop : Simd.shape -> num -> num -val eval_extractop : Ast.V128Op.extractop -> num -> num -val eval_replaceop : Ast.V128Op.replaceop -> num -> num -> num +val eval_unop : Ast.simd_unop -> simd -> simd +val eval_binop : Ast.simd_binop -> simd -> simd -> simd +val eval_ternop : Ast.simd_ternop -> simd -> simd -> simd -> simd +val eval_testop : Ast.simd_testop -> simd -> bool +val eval_shiftop : Ast.simd_shiftop -> simd -> num -> simd +val eval_bitmaskop : Ast.simd_bitmaskop -> simd -> num +val eval_cvtop : Ast.simd_cvtop -> num -> simd +val eval_extractop : Ast.simd_extractop -> simd -> num +val eval_replaceop : Ast.simd_replaceop -> simd -> num -> simd diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index 433093132b..a10650e214 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -271,6 +271,7 @@ struct * away the top 32-bitwidth bits. *) let as_unsigned x = + if Rep.bitwidth >= 32 then x else (* Mask with bottom #bitwidth bits set *) let mask = Rep.(shift_right_logical minus_one (32 - Rep.bitwidth)) in Rep.logand x mask diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 2695597aee..2836c58296 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -141,7 +141,7 @@ module type S = sig type t type bits - val default : t (* FIXME good name for default value? *) + val zero : t val to_string : t -> string val to_hex_string : t -> string val of_bits : bits -> t @@ -163,7 +163,7 @@ sig module I64x2 : Int with type t = t and type lane = I64.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t - module V128 : Vec with type t = t + module V128x1 : Vec with type t = t module V8x16 : sig val swizzle : t -> t -> t val shuffle : t -> t -> int list -> t @@ -218,7 +218,6 @@ sig val convert_i32x4_u : t -> t val demote_f64x2_zero : t -> t end - module F64x2_convert : sig val promote_low_f32x4 : t -> t val convert_i32x4_s : t -> t @@ -231,7 +230,7 @@ struct type t = Rep.t type bits = Rep.t - let default = Rep.make Rep.bytewidth (chr 0) + let zero = Rep.make Rep.bytewidth (chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) let to_hex_string = Rep.to_hex_string let of_bits x = x @@ -245,7 +244,7 @@ struct let of_i32x4 = Rep.of_i32x4 let of_i64x2 = Rep.of_i64x2 - module V128 : Vec with type t = Rep.t = struct + module V128x1 : Vec with type t = Rep.t = struct type t = Rep.t let to_shape = Rep.to_i64x2 let of_shape = Rep.of_i64x2 @@ -262,7 +261,6 @@ struct binop I64.or_ v1_and_c v2_andnot_c end - module MakeFloat (Float : Float.S) (Convert : sig val to_shape : Rep.t -> Float.t list val of_shape : Float.t list -> Rep.t diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index f91f08a3bb..d6739b6650 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,3 +1,8 @@ +(* TODO +- inline Simd functor +- unify shape and packed num types for simd & memory +*) + include Simd.Make (struct include String diff --git a/interpreter/host/spectest.ml b/interpreter/host/spectest.ml index 6cb7b5bedc..01bdfb6cd4 100644 --- a/interpreter/host/spectest.ml +++ b/interpreter/host/spectest.ml @@ -14,7 +14,7 @@ let global (GlobalType (t, _) as gt) = | NumType I64Type -> Num (I64 666L) | NumType F32Type -> Num (F32 (F32.of_float 666.6)) | NumType F64Type -> Num (F64 (F64.of_float 666.6)) - | NumType V128Type -> failwith "TODO v128" + | SimdType V128Type -> Simd (V128 (V128.of_i32x4 [666l; 666l; 666l; 666l])) | RefType t -> Ref (NullRef t) in Global.alloc gt v diff --git a/interpreter/runtime/instance.ml b/interpreter/runtime/instance.ml index efc230e0f9..4d4fece078 100644 --- a/interpreter/runtime/instance.ml +++ b/interpreter/runtime/instance.ml @@ -43,6 +43,13 @@ let () = | FuncRef _ -> "func" | r -> string_of_ref' r +let () = + let eq_ref' = !Values.eq_ref' in + Values.eq_ref' := fun r1 r2 -> + match r1, r2 with + | FuncRef f1, FuncRef f2 -> f1 == f2 + | _, _ -> eq_ref' r1 r2 + (* Auxiliary functions *) diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index d9369c27f3..d8c4d861a7 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -103,33 +103,27 @@ let storen mem a o n x = in loop (effective_address a o) n x let load_num mem a o t = + let n = loadn mem a o (Types.num_size t) in match t with - | V128Type -> - V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.size t))) - | _ -> - let n = loadn mem a o (Types.size t) in - match t with - | I32Type -> I32 (Int64.to_int32 n) - | I64Type -> I64 n - | F32Type -> F32 (F32.of_bits (Int64.to_int32 n)) - | F64Type -> F64 (F64.of_bits n) - | _ -> assert false + | I32Type -> I32 (Int64.to_int32 n) + | I64Type -> I64 n + | F32Type -> F32 (F32.of_bits (Int64.to_int32 n)) + | F64Type -> F64 (F64.of_bits n) let store_num mem a o n = - let store = storen mem a o (Types.size (Values.type_of_num n)) in + let store = storen mem a o (Types.num_size (Values.type_of_num n)) in match n with | I32 x -> store (Int64.of_int32 x) | I64 x -> store x | F32 x -> store (Int64.of_int32 (F32.to_bits x)) | F64 x -> store (F64.to_bits x) - | V128 x -> store_bytes mem (effective_address a o) (V128.to_bits x) let extend x n = function | ZX -> x | SX -> let sh = 64 - 8 * n in Int64.(shift_right (shift_left x sh) sh) -let load_packed sz ext mem a o t = - assert (packed_size sz <= Types.size t); +let load_num_packed sz ext mem a o t = + assert (packed_size sz <= Types.num_size t); let w = packed_size sz in let x = extend (loadn mem a o w) w ext in match t with @@ -137,15 +131,34 @@ let load_packed sz ext mem a o t = | I64Type -> I64 x | _ -> raise Type -let load_simd_packed pack_size simd_load mem a o t = - let n = packed_size pack_size in - assert (n < Types.size t); +let store_num_packed sz mem a o n = + assert (packed_size sz <= Types.num_size (Values.type_of_num n)); + let w = packed_size sz in + let x = + match n with + | I32 x -> Int64.of_int32 x + | I64 x -> x + | _ -> raise Type + in storen mem a o w x + +let load_simd mem a o t = + match t with + | V128Type -> + V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.simd_size t))) + +let store_simd mem a o n = + match n with + | V128 x -> store_bytes mem (effective_address a o) (V128.to_bits x) + +let load_simd_packed sz simd_load mem a o t = + let n = packed_size sz in + assert (n < Types.simd_size t); let x = loadn mem a o n in let b = Bytes.make 16 '\x00' in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in let r = - match pack_size, simd_load with + match sz, simd_load with | Pack64, Pack8x8 SX -> V128.I16x8_convert.extend_low_s v | Pack64, Pack8x8 ZX -> V128.I16x8_convert.extend_low_u v | Pack64, Pack16x4 SX -> V128.I32x4_convert.extend_low_s v @@ -160,13 +173,3 @@ let load_simd_packed pack_size simd_load mem a o t = | Pack64, PackZero -> v | _ -> assert false in V128 r - -let store_packed sz mem a o n = - assert (packed_size sz <= Types.size (Values.type_of_num n)); - let w = packed_size sz in - let x = - match n with - | I32 x -> Int64.of_int32 x - | I64 x -> x - | _ -> raise Type - in storen mem a o w x diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index be970ce8fe..a97781b7a0 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -33,12 +33,18 @@ val load_num : memory -> address -> offset -> num_type -> num (* raises Bounds *) val store_num : memory -> address -> offset -> num -> unit (* raises Bounds *) -val load_packed : +val load_num_packed : pack_size -> extension -> memory -> address -> offset -> num_type -> num (* raises Type, Bounds *) -val load_simd_packed : - pack_size -> pack_simd -> memory -> address -> offset -> num_type -> num - (* raises Type, Bounds *) -val store_packed : +val store_num_packed : pack_size -> memory -> address -> offset -> num -> unit (* raises Type, Bounds *) + +val load_simd : + memory -> address -> offset -> simd_type -> simd (* raises Bounds *) +val store_simd : + memory -> address -> offset -> simd -> unit + (* raises Type, Bounds *) +val load_simd_packed : + pack_size -> pack_simd -> memory -> address -> offset -> simd_type -> simd + (* raises Type, Bounds *) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 42bebd683b..eb6fe7dfef 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -239,33 +239,29 @@ let eq_of = function | I64Type -> Values.I64 I64Op.Eq | F32Type -> Values.F32 F32Op.Eq | F64Type -> Values.F64 F64Op.Eq - | V128Type -> assert false let and_of = function | I32Type | F32Type -> Values.I32 I32Op.And | I64Type | F64Type -> Values.I64 I64Op.And - | V128Type -> Values.V128 V128Op.(V128 And) let reinterpret_of = function | I32Type -> I32Type, Nop | I64Type -> I64Type, Nop | F32Type -> I32Type, Convert (Values.I32 I32Op.ReinterpretFloat) | F64Type -> I64Type, Convert (Values.I64 I64Op.ReinterpretFloat) - | V128Type -> assert false let canonical_nan_of = function | I32Type | F32Type -> Values.I32 (F32.to_bits F32.pos_nan) | I64Type | F64Type -> Values.I64 (F64.to_bits F64.pos_nan) - | V128Type -> assert false let abs_mask_of = function | I32Type | F32Type -> Values.I32 Int32.max_int | I64Type | F64Type -> Values.I64 Int64.max_int - | V128Type -> assert false let value v = match v.it with - | Values.Num num -> [Const (num @@ v.at) @@ v.at] + | Values.Num n -> [Const (n @@ v.at) @@ v.at] + | Values.Simd s -> [SimdConst (s @@ v.at) @@ v.at] | Values.Ref (Values.NullRef t) -> [RefNull t @@ v.at] | Values.Ref (ExternRef n) -> [Const (Values.I32 n @@ v.at) @@ v.at; Call (externref_idx @@ v.at) @@ v.at] @@ -288,7 +284,7 @@ let assert_return ress ts at = | ArithmeticNan -> canonical_nan_of (* can be any NaN that's one everywhere the canonical NaN is one *) in match res.it with - | NumResult (LitPat {it = Values.Num num; at = at'}) -> + | NumResult (NumPat {it = num; at = at'}) -> let t', reinterpret = reinterpret_of (Values.type_of_num num) in [ reinterpret @@ at; Const (num @@ at') @@ at; @@ -296,22 +292,10 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | NumResult (LitPat {it = Values.Ref (Values.NullRef t); _}) -> - [ RefIsNull @@ at; - Test (Values.I32 I32Op.Eqz) @@ at; - BrIf (0l @@ at) @@ at ] - | NumResult (LitPat {it = Values.Ref (ExternRef n); _}) -> - [ Const (Values.I32 n @@ at) @@ at; - Call (externref_idx @@ at) @@ at; - Call (eq_externref_idx @@ at) @@ at; - Test (Values.I32 I32Op.Eqz) @@ at; - BrIf (0l @@ at) @@ at ] - | NumResult (LitPat {it = Values.Ref _; _}) -> - assert false | NumResult (NanPat nanop) -> let nan = match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false + | Values.I32 _ | Values.I64 _ -> . | Values.F32 n | Values.F64 n -> n in let t = Values.type_of_num nanop.it in @@ -323,7 +307,7 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | SimdResult (shape, pats) -> + | SimdResult (SimdPat (shape, pats)) -> let open Values in (* SimdResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals * and NaNs. For NaNs, we need to mask it and compare with a canonical NaN. To simplify @@ -331,13 +315,13 @@ let assert_return ress ts at = * a v128, then compare the entire 128 bits. *) let mask_and_canonical = function - | LitPat {it = Num (I32 _ as i); _} -> I32 (Int32.minus_one), i - | LitPat {it = Num (I64 _ as i); _} -> I64 (Int64.minus_one), i - | LitPat {it = Num (F32 f); _} -> I32 (Int32.minus_one), I32 (I32_convert.reinterpret_f32 f) - | LitPat {it = Num (F64 f); _} -> I64 (Int64.minus_one), I64 (I64_convert.reinterpret_f64 f) + | NumPat {it = I32 _ as i; _} -> I32 (Int32.minus_one), i + | NumPat {it = I64 _ as i; _} -> I64 (Int64.minus_one), i + | NumPat {it = F32 f; _} -> I32 (Int32.minus_one), I32 (I32_convert.reinterpret_f32 f) + | NumPat {it = F64 f; _} -> I64 (Int64.minus_one), I64 (I64_convert.reinterpret_f64 f) | NanPat {it = F32 nan; _} -> nan_bitmask_of nan I32Type, canonical_nan_of I32Type | NanPat {it = F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type - | _ -> assert false + | _ -> . in let masks, canons = List.split (List.map (fun p -> mask_and_canonical p) pats) in let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in @@ -353,16 +337,27 @@ let assert_return ress ts at = V128.of_i64x2 (List.map (I64Num.of_num 0) masks), V128.of_i64x2 (List.map (I64Num.of_num 0) canons) in - [ - Const (V128 mask @@ at) @@ at; - Binary (and_of V128Type) @@ at; - Const (V128 expected @@ at) @@ at; - Binary (V128 V128Op.(I8x16 Eq)) @@ at; + [ SimdConst (V128 mask @@ at) @@ at; + SimdBinary (V128 V128Op.(V128x1 And)) @@ at; + SimdConst (V128 expected @@ at) @@ at; + SimdBinary (V128 V128Op.(I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) - Test (V128 V128Op.(I8x16 AllTrue)) @@ at; + SimdTest (V128 V128Op.(I8x16 AllTrue)) @@ at; Test (I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | RefResult t -> + | RefResult (RefPat {it = Values.NullRef t; _}) -> + [ RefIsNull @@ at; + Test (Values.I32 I32Op.Eqz) @@ at; + BrIf (0l @@ at) @@ at ] + | RefResult (RefPat {it = ExternRef n; _}) -> + [ Const (Values.I32 n @@ at) @@ at; + Call (externref_idx @@ at) @@ at; + Call (eq_externref_idx @@ at) @@ at; + Test (Values.I32 I32Op.Eqz) @@ at; + BrIf (0l @@ at) @@ at ] + | RefResult (RefPat _) -> + assert false + | RefResult (RefTypePat t) -> let is_ref_idx = match t with | FuncRefType -> is_funcref_idx @@ -417,10 +412,11 @@ let wrap item_name wrap_action wrap_assertion at = let is_js_num_type = function | I32Type -> true - | I64Type | F32Type | F64Type | V128Type -> false + | I64Type | F32Type | F64Type -> false let is_js_value_type = function | NumType t -> is_js_num_type t + | SimdType t -> false | RefType t -> true let is_js_global_type = function @@ -464,35 +460,57 @@ let of_float z = | "-inf" -> "-Infinity" | s -> s +let of_num n = + let open Values in + match n with + | I32 i -> I32.to_string_s i + | I64 i -> "int64(\"" ^ I64.to_string_s i ^ "\")" + | F32 z -> of_float (F32.to_float z) + | F64 z -> of_float (F64.to_float z) + +let of_simd v = + let open Values in + match v with + | V128 v -> "v128(\"" ^ V128.to_string v ^ "\")" + +let of_ref r = + let open Values in + match r with + | NullRef _ -> "null" + | ExternRef n -> "externref(" ^ Int32.to_string n ^ ")" + | _ -> assert false + let of_value v = let open Values in match v.it with - | Num (I32 i) -> I32.to_string_s i - | Num (I64 i) -> "int64(\"" ^ I64.to_string_s i ^ "\")" - | Num (F32 z) -> of_float (F32.to_float z) - | Num (F64 z) -> of_float (F64.to_float z) - | Num (V128 v) -> "v128(\"" ^ V128.to_string v ^ "\")" - | Ref (NullRef _) -> "null" - | Ref (ExternRef n) -> "externref(" ^ Int32.to_string n ^ ")" - | _ -> assert false + | Num n -> of_num n + | Simd v -> of_simd v + | Ref r -> of_ref r let of_nan = function | CanonicalNan -> "\"nan:canonical\"" | ArithmeticNan -> "\"nan:arithmetic\"" -let of_numpat = function - | LitPat lit -> of_value lit +let of_num_pat = function + | NumPat num -> of_num num.it | NanPat nanop -> match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false + | Values.I32 _ | Values.I64 _ -> . | Values.F32 n | Values.F64 n -> of_nan n +let of_simd_pat = function + | SimdPat (shape, pats) -> + Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map of_num_pat pats)) + +let of_ref_pat = function + | RefPat r -> of_ref r.it + | RefTypePat t -> "\"ref." ^ string_of_refed_type t ^ "\"" + let of_result res = match res.it with - | NumResult n -> of_numpat n - | SimdResult (shape, pats) -> - Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map (fun x -> of_numpat x) pats)) - | RefResult t -> "\"ref." ^ string_of_refed_type t ^ "\"" + | NumResult np -> of_num_pat np + | SimdResult vp -> of_simd_pat vp + | RefResult rp -> of_ref_pat rp let rec of_definition def = match def.it with diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index 2e67facd1e..fcdd50c3f6 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -252,25 +252,34 @@ let string_of_nan = function let type_of_result r = match r with - | NumResult (LitPat v) -> Values.type_of_value v.it - | NumResult (NanPat v) -> Types.NumType (Values.type_of_num v.it) - | SimdResult (_, _) -> Types.NumType Types.V128Type - | RefResult t -> Types.RefType t + | NumResult (NumPat n) -> Types.NumType (Values.type_of_num n.it) + | NumResult (NanPat n) -> Types.NumType (Values.type_of_num n.it) + | SimdResult (SimdPat _) -> Types.SimdType Types.V128Type + | RefResult (RefPat r) -> Types.RefType (Values.type_of_ref r.it) + | RefResult (RefTypePat t) -> Types.RefType t let string_of_num_pat (p : num_pat) = match p with - | LitPat v -> Values.string_of_value v.it + | NumPat n -> Values.string_of_num n.it | NanPat nanop -> match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false + | Values.I32 _ | Values.I64 _ -> assert false | Values.F32 n | Values.F64 n -> string_of_nan n +let string_of_simd_pat (p : simd_pat) = + match p with + | SimdPat (shape, ns) -> String.concat " " (List.map string_of_num_pat ns) + +let string_of_ref_pat (p : ref_pat) = + match p with + | RefPat r -> Values.string_of_ref r.it + | RefTypePat t -> Types.string_of_refed_type t + let string_of_result r = match r with - | NumResult v -> string_of_num_pat v - | SimdResult (shape, vs) -> - String.concat " " (List.map string_of_num_pat vs) - | RefResult t -> Types.string_of_refed_type t + | NumResult np -> string_of_num_pat np + | SimdResult vp -> string_of_simd_pat vp + | RefResult rp -> string_of_ref_pat rp let string_of_results = function | [r] -> string_of_result r @@ -359,58 +368,55 @@ let run_action act : Values.value list = ) -let assert_num_pat at v p = +let assert_num_pat at n np = let open Values in - match p with - | (LitPat v') -> v <> v'.it - | (NanPat nanop) -> - match nanop.it, v with - | F32 CanonicalNan, Num (F32 z) -> z <> F32.pos_nan && z <> F32.neg_nan - | F64 CanonicalNan, Num (F64 z) -> z <> F64.pos_nan && z <> F64.neg_nan - | F32 ArithmeticNan, Num (F32 z) -> + match np with + | NumPat n' -> n = n'.it + | NanPat nanop -> + match n, nanop.it with + | F32 z, F32 CanonicalNan -> z = F32.pos_nan || z = F32.neg_nan + | F64 z, F64 CanonicalNan -> z = F64.pos_nan || z = F64.neg_nan + | F32 z, F32 ArithmeticNan -> let pos_nan = F32.to_bits F32.pos_nan in - Int32.logand (F32.to_bits z) pos_nan <> pos_nan - | F64 ArithmeticNan, Num (F64 z) -> + Int32.logand (F32.to_bits z) pos_nan = pos_nan + | F64 z, F64 ArithmeticNan -> let pos_nan = F64.to_bits F64.pos_nan in - Int64.logand (F64.to_bits z) pos_nan <> pos_nan + Int64.logand (F64.to_bits z) pos_nan = pos_nan | _, _ -> false -let assert_result at got expect = +let assert_simd_pat at v p = + let open Values in + match v, p with + | V128 v, SimdPat (shape, ps) -> + let extract = match shape with + | Simd.I8x16 -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) + | Simd.I16x8 -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) + | Simd.I32x4 -> fun v i -> I32 (V128.I32x4.extract_lane_s i v) + | Simd.I64x2 -> fun v i -> I64 (V128.I64x2.extract_lane_s i v) + | Simd.F32x4 -> fun v i -> F32 (V128.F32x4.extract_lane i v) + | Simd.F64x2 -> fun v i -> F64 (V128.F64x2.extract_lane i v) + in + List.for_all2 (assert_num_pat at) (List.init (Simd.lanes shape) (extract v)) ps + +let assert_ref_pat at r p = + match r, p with + | r, RefPat r' -> r = r'.it + | Instance.FuncRef _, RefTypePat Types.FuncRefType + | ExternRef _, RefTypePat Types.ExternRefType -> true + | _ -> false + +let assert_pat at v r = let open Values in + match v, r with + | Num n, NumResult np -> assert_num_pat at n np + | Simd v, SimdResult vp -> assert_simd_pat at v vp + | Ref r, RefResult rp -> assert_ref_pat at r rp + | _, _ -> false + +let assert_result at got expect = if List.length got <> List.length expect || - List.exists2 (fun v r -> - match r with - | NumResult v' -> assert_num_pat at v v' - | SimdResult (shape, vs) -> - begin - let open Simd in - let assert_simd_result to_num extract v = - List.exists2 - (assert_num_pat at) - (List.init (lanes shape) (fun i -> Num (to_num (extract i v)))) vs in - match shape, v with - | I8x16, Num (V128 v) -> - assert_simd_result I32Num.to_num V128.I8x16.extract_lane_s v - | I16x8, Num (V128 v) -> - assert_simd_result I32Num.to_num V128.I16x8.extract_lane_s v - | I32x4, Num (V128 v) -> - assert_simd_result I32Num.to_num V128.I32x4.extract_lane_s v - | I64x2, Num (V128 v) -> - assert_simd_result I64Num.to_num V128.I64x2.extract_lane_s v - | F32x4, Num (V128 v) -> - assert_simd_result F32Num.to_num V128.F32x4.extract_lane v - | F64x2, Num (V128 v) -> - assert_simd_result F64Num.to_num V128.F64x2.extract_lane v - | _ -> failwith "impossible" - end - | RefResult t -> - (match t, v with - | Types.FuncRefType, Ref (Instance.FuncRef _) - | Types.ExternRefType, Ref (ExternRef _) -> false - | _ -> true - ) - ) got expect + List.exists2 (fun v r -> not (assert_pat at v r)) got expect then begin print_string "Result: "; print_values got; print_string "Expect: "; print_results expect; diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 1c2c7263ef..98fdc8a875 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -1,6 +1,8 @@ type var = string Source.phrase type Values.ref_ += ExternRef of int32 +type num = Values.num Source.phrase +type ref_ = Values.ref_ Source.phrase type literal = Values.value Source.phrase type definition = definition' Source.phrase @@ -15,18 +17,25 @@ and action' = | Get of var option * Ast.name type nanop = nanop' Source.phrase -and nanop' = (Lib.void, Lib.void, nan, nan, Lib.void) Values.op +and nanop' = (Lib.void, Lib.void, nan, nan) Values.op and nan = CanonicalNan | ArithmeticNan type num_pat = - | LitPat of literal + | NumPat of num | NanPat of nanop +type simd_pat = + | SimdPat of Simd.shape * num_pat list + +type ref_pat = + | RefPat of ref_ + | RefTypePat of Types.ref_type + type result = result' Source.phrase and result' = | NumResult of num_pat - | SimdResult of Simd.shape * num_pat list - | RefResult of Types.ref_type + | SimdResult of simd_pat + | RefResult of ref_pat type assertion = assertion' Source.phrase and assertion' = @@ -68,3 +77,10 @@ let () = Values.string_of_ref' := function | ExternRef n -> "ref " ^ Int32.to_string n | r -> string_of_ref' r + +let () = + let eq_ref' = !Values.eq_ref' in + Values.eq_ref' := fun r1 r2 -> + match r1, r2 with + | ExternRef n1, ExternRef n2 -> n1 = n2 + | _, _ -> eq_ref' r1 r2 diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 20236dc90d..6a629cb40a 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -18,6 +18,8 @@ open Types +type void = Lib.void + (* Operators *) @@ -45,84 +47,83 @@ struct | ReinterpretInt end -(* FIXME *) -module SimdOp = +module I32Op = IntOp +module I64Op = IntOp +module F32Op = FloatOp +module F64Op = FloatOp + +module V128Op = struct type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U - | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU - | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero - | ExtAddPairwiseS | ExtAddPairwiseU + | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU + | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero + | ExtAddPairwiseS | ExtAddPairwiseU + type funop = Abs | Neg | Sqrt + | Ceil | Floor | Trunc | Nearest + | ConvertI32x4S | ConvertI32x4U + | DemoteF64x2Zero | PromoteLowF32x4 type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU | DotI16x8S | Q15MulRSatS | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU - type funop = Abs | Neg | Sqrt - | Ceil | Floor | Trunc | Nearest - | ConvertI32x4S | ConvertI32x4U - | DemoteF64x2Zero | PromoteLowF32x4 type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax | Eq | Ne | Lt | Le | Gt | Ge type vunop = Not type vbinop = And | Or | Xor | AndNot - type vtestop = AnyTrue | AllTrue - - type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) v128op = - | I8x16 of 'i8x16 - | I16x8 of 'i16x8 - | I32x4 of 'i32x4 - | I64x2 of 'i64x2 - | F32x4 of 'f32x4 - | F64x2 of 'f64x2 - | V128 of 'v128 - - type unop = (iunop, iunop, iunop, iunop, funop, funop, vunop) v128op - type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop, vbinop) v128op - type testop = (vtestop, vtestop, vtestop, vtestop, vtestop, vtestop, vtestop) v128op - type ternop = Bitselect - type relop = TodoRelOp - type vcvtop = Splat - type cvtop = (vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop, vcvtop) v128op - type extract = - extension (* used for extracting I8 and I16 *) - * int (* lane index *) - type extractop = (extract, extract, extract, extract, extract, extract, extract) v128op - type replaceop = (int, int, int, int, int, int, int) v128op - type shift = Shl | ShrS | ShrU - type shiftop = (shift, shift, shift, shift, shift, shift, shift) v128op + type vternop = Bitselect + type itestop = AllTrue + type vtestop = AnyTrue + type ishiftop = Shl | ShrS | ShrU + type ibitmaskop = Bitmask + + type ncvtop = Splat + type nextractop = Extract of int * extension option + type nreplaceop = Replace of int + + type unop = (iunop, iunop, iunop, iunop, funop, funop, vunop) Values.laneop + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop, vbinop) Values.laneop + type ternop = (void, void, void, void, void, void, vternop) Values.laneop + type testop = (itestop, itestop, itestop, itestop, void, void, vtestop) Values.laneop + type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void, void) Values.laneop + type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void, void) Values.laneop + + type cvtop = (ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, void) Values.laneop + type extractop = (nextractop, nextractop, nextractop, nextractop, nextractop, nextractop, void) Values.laneop + type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, void) Values.laneop end -module I32Op = IntOp -module I64Op = IntOp -module F32Op = FloatOp -module F64Op = FloatOp -module V128Op = SimdOp - -type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop, V128Op.unop) Values.op -type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop, V128Op.binop) Values.op -type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop, V128Op.testop) Values.op -type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop, V128Op.relop) Values.op -type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop, V128Op.cvtop) Values.op -type extractop = V128Op.extractop -type replaceop = V128Op.replaceop -(* Ternary operators only exist for V128 types for now *) -type ternop = V128Op.ternop -type shiftop = V128Op.shiftop - -type 'a memop = {ty : num_type; align : int; offset : int32; sz : 'a option} -type loadop = (pack_size * extension) memop -type storeop = pack_size memop - -type simd_loadop = (pack_size * pack_simd) memop -type empty -type simd_storeop = empty memop -type simd_laneop = pack_size memop * int +type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop) Values.op +type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop) Values.op +type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op +type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Values.op +type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Values.op + +type simd_unop = (V128Op.unop) Values.simdop +type simd_binop = (V128Op.binop) Values.simdop +type simd_ternop = (V128Op.ternop) Values.simdop +type simd_testop = (V128Op.testop) Values.simdop +type simd_shiftop = (V128Op.shiftop) Values.simdop +type simd_bitmaskop = (V128Op.bitmaskop) Values.simdop +type simd_cvtop = (V128Op.cvtop) Values.simdop +type simd_extractop = (V128Op.extractop) Values.simdop +type simd_replaceop = (V128Op.replaceop) Values.simdop + +type ('t, 's) memop = {ty : 't; align : int; offset : int32; sz : 's} +type loadop = (num_type, (pack_size * extension) option) memop +type storeop = (num_type, pack_size option) memop + +type simd_loadop = (simd_type, (pack_size * pack_simd) option) memop +type simd_storeop = (simd_type, unit) memop +type simd_laneop = (simd_type, pack_size) memop * int + (* Expressions *) type var = int32 Source.phrase type num = Values.num Source.phrase +type simd = Values.simd Source.phrase type name = int list type block_type = VarBlockType of var | ValBlockType of value_type option @@ -158,8 +159,8 @@ and instr' = | Load of loadop (* read memory at address *) | Store of storeop (* write memory at address *) | SimdLoad of simd_loadop (* read memory at address *) - | SimdLoadLane of simd_laneop (* read single lane at address *) | SimdStore of simd_storeop (* write memory at address *) + | SimdLoadLane of simd_laneop (* read single lane at address *) | SimdStoreLane of simd_laneop (* write single lane to address *) | MemorySize (* size of memory *) | MemoryGrow (* grow memory *) @@ -176,11 +177,16 @@ and instr' = | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) | Convert of cvtop (* conversion *) - | SimdTernary of ternop (* ternary v128 operator *) - | SimdExtract of extractop (* extract lane from v128 value *) - | SimdReplace of replaceop (* replace lane of v128 value *) - | SimdShift of shiftop (* shifts for v128 value *) - | SimdBitmask of Simd.shape (* bitmask for v128 value *) + | SimdConst of simd (* constant *) + | SimdTest of simd_testop (* simd test *) + | SimdUnary of simd_unop (* unary simd operator *) + | SimdBinary of simd_binop (* binary simd operator *) + | SimdTernary of simd_ternop (* ternary simd operator *) + | SimdShift of simd_shiftop (* shifts for simd value *) + | SimdBitmask of simd_bitmaskop (* bitmask for simd value *) + | SimdConvert of simd_cvtop (* simd conversion *) + | SimdExtract of simd_extractop (* extract lane from simd value *) + | SimdReplace of simd_replaceop (* replace lane of simd value *) (* Globals & Functions *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index a58fb52bfc..be563078ac 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -83,10 +83,13 @@ let rec instr (e : instr) = | TableCopy (x, y) -> tables (var x) ++ tables (var y) | TableInit (x, y) -> tables (var x) ++ elems (var y) | ElemDrop x -> elems (var x) - | Load _ | Store _ | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> + | Load _ | Store _ + | SimdLoad _ | SimdStore _ | SimdLoadLane _ | SimdStoreLane _ + | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> memories zero - | SimdLoad _ | SimdLoadLane _ | SimdStore _ | SimdStoreLane _ - | SimdTernary _ | SimdExtract _ | SimdReplace _ | SimdShift _ | SimdBitmask _ -> + | SimdConst _ | SimdTest _ + | SimdUnary _ | SimdBinary _ | SimdTernary _ | SimdShift _ | SimdBitmask _ + | SimdConvert _ | SimdExtract _ | SimdReplace _ -> memories zero | MemoryInit x -> memories zero ++ datas (var x) | DataDrop x -> datas (var x) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index a79061fdd6..ade270a68e 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -8,7 +8,7 @@ let i32_const n = Const (I32 n.it @@ n.at) let i64_const n = Const (I64 n.it @@ n.at) let f32_const n = Const (F32 n.it @@ n.at) let f64_const n = Const (F64 n.it @@ n.at) -let v128_const n = Const (V128 n.it @@ n.at) +let v128_const n = SimdConst (V128 n.it @@ n.at) let ref_null t = RefNull t let ref_func x = RefFunc x @@ -233,7 +233,6 @@ let i64_reinterpret_f64 = Convert (I64 I64Op.ReinterpretFloat) let f32_reinterpret_i32 = Convert (F32 F32Op.ReinterpretInt) let f64_reinterpret_i64 = Convert (F64 F64Op.ReinterpretInt) -(* SIMD *) let v128_load align offset = SimdLoad {ty = V128Type; align; offset; sz = None} let v128_load8x8_s align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 SX)} @@ -248,256 +247,255 @@ let v128_load32x2_s align offset = let v128_load32x2_u align offset = SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 ZX)} let v128_load8_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack8, PackSplat)} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack8, PackSplat)} let v128_load16_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack16, PackSplat)} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack16, PackSplat)} let v128_load32_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackSplat)} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack32, PackSplat)} let v128_load64_splat align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackSplat)} - -let v128_load8_lane align offset imm = - SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack8}, imm) -let v128_load16_lane align offset imm = - SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack16}, imm) -let v128_load32_lane align offset imm = - SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack32}, imm) -let v128_load64_lane align offset imm = - SimdLoadLane ({ty = V128Type; align; offset; sz = Some Pack64}, imm) - -let v128_store8_lane align offset imm = - SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack8}, imm) -let v128_store16_lane align offset imm = - SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack16}, imm) -let v128_store32_lane align offset imm = - SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack32}, imm) -let v128_store64_lane align offset imm = - SimdStoreLane ({ty = V128Type; align; offset; sz = Some Pack64}, imm) - + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, PackSplat)} let v128_load32_zero align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack32, PackZero)} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack32, PackZero)} let v128_load64_zero align offset = - SimdLoad {ty= V128Type; align; offset; sz = Some (Pack64, PackZero)} + SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, PackZero)} + +let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = ()} + +let v128_load8_lane align offset i = + SimdLoadLane ({ty = V128Type; align; offset; sz = Pack8}, i) +let v128_load16_lane align offset i = + SimdLoadLane ({ty = V128Type; align; offset; sz = Pack16}, i) +let v128_load32_lane align offset i = + SimdLoadLane ({ty = V128Type; align; offset; sz = Pack32}, i) +let v128_load64_lane align offset i = + SimdLoadLane ({ty = V128Type; align; offset; sz = Pack64}, i) -let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = None} +let v128_store8_lane align offset i = + SimdStoreLane ({ty = V128Type; align; offset; sz = Pack8}, i) +let v128_store16_lane align offset i = + SimdStoreLane ({ty = V128Type; align; offset; sz = Pack16}, i) +let v128_store32_lane align offset i = + SimdStoreLane ({ty = V128Type; align; offset; sz = Pack32}, i) +let v128_store64_lane align offset i = + SimdStoreLane ({ty = V128Type; align; offset; sz = Pack64}, i) -let v128_not = Unary (V128 V128Op.(V128 Not)) -let v128_and = Binary (V128 V128Op.(V128 And)) -let v128_andnot = Binary (V128 V128Op.(V128 AndNot)) -let v128_or = Binary (V128 V128Op.(V128 Or)) -let v128_xor = Binary (V128 V128Op.(V128 Xor)) -let v128_bitselect = SimdTernary (V128Op.Bitselect) -let v128_any_true = Test (V128 V128Op.(V128 AnyTrue)) +let v128_not = SimdUnary (V128 V128Op.(V128x1 Not)) +let v128_and = SimdBinary (V128 V128Op.(V128x1 And)) +let v128_andnot = SimdBinary (V128 V128Op.(V128x1 AndNot)) +let v128_or = SimdBinary (V128 V128Op.(V128x1 Or)) +let v128_xor = SimdBinary (V128 V128Op.(V128x1 Xor)) +let v128_bitselect = SimdTernary (V128 V128Op.(V128x1 Bitselect)) +let v128_any_true = SimdTest (V128 V128Op.(V128x1 AnyTrue)) -let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle)) -let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms))) +let i8x16_swizzle = SimdBinary (V128 V128Op.(I8x16 Swizzle)) +let i8x16_shuffle is = SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) -let i8x16_splat = Convert (V128 V128Op.(I8x16 Splat)) -let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm)) -let i8x16_extract_lane_u imm = SimdExtract (V128Op.I8x16 (ZX, imm)) -let i8x16_replace_lane imm = SimdReplace (V128Op.I8x16 imm) -let i8x16_eq = Binary (V128 V128Op.(I8x16 Eq)) -let i8x16_ne = Binary (V128 V128Op.(I8x16 Ne)) -let i8x16_lt_s = Binary (V128 V128Op.(I8x16 LtS)) -let i8x16_lt_u = Binary (V128 V128Op.(I8x16 LtU)) -let i8x16_le_s = Binary (V128 V128Op.(I8x16 LeS)) -let i8x16_le_u = Binary (V128 V128Op.(I8x16 LeU)) -let i8x16_gt_s = Binary (V128 V128Op.(I8x16 GtS)) -let i8x16_gt_u = Binary (V128 V128Op.(I8x16 GtU)) -let i8x16_ge_s = Binary (V128 V128Op.(I8x16 GeS)) -let i8x16_ge_u = Binary (V128 V128Op.(I8x16 GeU)) -let i8x16_neg = Unary (V128 V128Op.(I8x16 Neg)) -let i8x16_bitmask = SimdBitmask Simd.I8x16 -let i8x16_all_true = Test (V128 V128Op.(I8x16 AllTrue)) -let i8x16_narrow_i16x8_s = Binary (V128 V128Op.(I8x16 NarrowS)) -let i8x16_narrow_i16x8_u = Binary (V128 V128Op.(I8x16 NarrowU)) -let i16x8_extend_low_i8x16_s = Unary (V128 V128Op.(I16x8 ExtendLowS)) -let i16x8_extend_high_i8x16_s = Unary (V128 V128Op.(I16x8 ExtendHighS)) -let i16x8_extend_low_i8x16_u = Unary (V128 V128Op.(I16x8 ExtendLowU)) -let i16x8_extend_high_i8x16_u = Unary (V128 V128Op.(I16x8 ExtendHighU)) -let i8x16_shl = SimdShift V128Op.(I8x16 Shl) -let i8x16_shr_s = SimdShift V128Op.(I8x16 ShrS) -let i8x16_shr_u = SimdShift V128Op.(I8x16 ShrU) -let i8x16_add = Binary (V128 V128Op.(I8x16 Add)) -let i8x16_add_sat_s = Binary (V128 V128Op.(I8x16 AddSatS)) -let i8x16_add_sat_u = Binary (V128 V128Op.(I8x16 AddSatU)) -let i8x16_sub = Binary (V128 V128Op.(I8x16 Sub)) -let i8x16_sub_sat_s = Binary (V128 V128Op.(I8x16 SubSatS)) -let i8x16_sub_sat_u = Binary (V128 V128Op.(I8x16 SubSatU)) -let i8x16_abs = Unary (V128 V128Op.(I8x16 Abs)) -let i8x16_popcnt = Unary (V128 V128Op.(I8x16 Popcnt)) -let i8x16_min_s = Binary (V128 V128Op.(I8x16 MinS)) -let i8x16_min_u = Binary (V128 V128Op.(I8x16 MinU)) -let i8x16_max_s = Binary (V128 V128Op.(I8x16 MaxS)) -let i8x16_max_u = Binary (V128 V128Op.(I8x16 MaxU)) -let i8x16_avgr_u = Binary (V128 V128Op.(I8x16 AvgrU)) +let i8x16_splat = SimdConvert (V128 V128Op.(I8x16 Splat)) +let i8x16_extract_lane_s i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some SX)))) +let i8x16_extract_lane_u i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some ZX)))) +let i8x16_replace_lane i = SimdReplace (V128 V128Op.(I8x16 (Replace i))) +let i8x16_eq = SimdBinary (V128 V128Op.(I8x16 Eq)) +let i8x16_ne = SimdBinary (V128 V128Op.(I8x16 Ne)) +let i8x16_lt_s = SimdBinary (V128 V128Op.(I8x16 LtS)) +let i8x16_lt_u = SimdBinary (V128 V128Op.(I8x16 LtU)) +let i8x16_le_s = SimdBinary (V128 V128Op.(I8x16 LeS)) +let i8x16_le_u = SimdBinary (V128 V128Op.(I8x16 LeU)) +let i8x16_gt_s = SimdBinary (V128 V128Op.(I8x16 GtS)) +let i8x16_gt_u = SimdBinary (V128 V128Op.(I8x16 GtU)) +let i8x16_ge_s = SimdBinary (V128 V128Op.(I8x16 GeS)) +let i8x16_ge_u = SimdBinary (V128 V128Op.(I8x16 GeU)) +let i8x16_neg = SimdUnary (V128 V128Op.(I8x16 Neg)) +let i8x16_bitmask = SimdBitmask (V128 V128Op.(I8x16 Bitmask)) +let i8x16_all_true = SimdTest (V128 V128Op.(I8x16 AllTrue)) +let i8x16_narrow_i16x8_s = SimdBinary (V128 V128Op.(I8x16 NarrowS)) +let i8x16_narrow_i16x8_u = SimdBinary (V128 V128Op.(I8x16 NarrowU)) +let i16x8_extend_low_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtendLowS)) +let i16x8_extend_high_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtendHighS)) +let i16x8_extend_low_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtendLowU)) +let i16x8_extend_high_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtendHighU)) +let i8x16_shl = SimdShift (V128 V128Op.(I8x16 Shl)) +let i8x16_shr_s = SimdShift (V128 V128Op.(I8x16 ShrS)) +let i8x16_shr_u = SimdShift (V128 V128Op.(I8x16 ShrU)) +let i8x16_add = SimdBinary (V128 V128Op.(I8x16 Add)) +let i8x16_add_sat_s = SimdBinary (V128 V128Op.(I8x16 AddSatS)) +let i8x16_add_sat_u = SimdBinary (V128 V128Op.(I8x16 AddSatU)) +let i8x16_sub = SimdBinary (V128 V128Op.(I8x16 Sub)) +let i8x16_sub_sat_s = SimdBinary (V128 V128Op.(I8x16 SubSatS)) +let i8x16_sub_sat_u = SimdBinary (V128 V128Op.(I8x16 SubSatU)) +let i8x16_abs = SimdUnary (V128 V128Op.(I8x16 Abs)) +let i8x16_popcnt = SimdUnary (V128 V128Op.(I8x16 Popcnt)) +let i8x16_min_s = SimdBinary (V128 V128Op.(I8x16 MinS)) +let i8x16_min_u = SimdBinary (V128 V128Op.(I8x16 MinU)) +let i8x16_max_s = SimdBinary (V128 V128Op.(I8x16 MaxS)) +let i8x16_max_u = SimdBinary (V128 V128Op.(I8x16 MaxU)) +let i8x16_avgr_u = SimdBinary (V128 V128Op.(I8x16 AvgrU)) -let i16x8_splat = Convert (V128 V128Op.(I16x8 Splat)) -let i16x8_extract_lane_s imm = SimdExtract (V128Op.I16x8 (SX, imm)) -let i16x8_extract_lane_u imm = SimdExtract (V128Op.I16x8 (ZX, imm)) -let i16x8_replace_lane imm = SimdReplace (V128Op.I16x8 imm) -let i16x8_eq = Binary (V128 V128Op.(I16x8 Eq)) -let i16x8_ne = Binary (V128 V128Op.(I16x8 Ne)) -let i16x8_lt_s = Binary (V128 V128Op.(I16x8 LtS)) -let i16x8_lt_u = Binary (V128 V128Op.(I16x8 LtU)) -let i16x8_le_s = Binary (V128 V128Op.(I16x8 LeS)) -let i16x8_le_u = Binary (V128 V128Op.(I16x8 LeU)) -let i16x8_gt_s = Binary (V128 V128Op.(I16x8 GtS)) -let i16x8_gt_u = Binary (V128 V128Op.(I16x8 GtU)) -let i16x8_ge_s = Binary (V128 V128Op.(I16x8 GeS)) -let i16x8_ge_u = Binary (V128 V128Op.(I16x8 GeU)) -let i16x8_neg = Unary (V128 V128Op.(I16x8 Neg)) -let i16x8_bitmask = SimdBitmask Simd.I16x8 -let i16x8_all_true = Test (V128 V128Op.(I16x8 AllTrue)) -let i16x8_narrow_i32x4_s = Binary (V128 V128Op.(I16x8 NarrowS)) -let i16x8_narrow_i32x4_u = Binary (V128 V128Op.(I16x8 NarrowU)) -let i16x8_shl = SimdShift V128Op.(I16x8 Shl) -let i16x8_shr_s = SimdShift V128Op.(I16x8 ShrS) -let i16x8_shr_u = SimdShift V128Op.(I16x8 ShrU) -let i16x8_add = Binary (V128 V128Op.(I16x8 Add)) -let i16x8_add_sat_s = Binary (V128 V128Op.(I16x8 AddSatS)) -let i16x8_add_sat_u = Binary (V128 V128Op.(I16x8 AddSatU)) -let i16x8_sub = Binary (V128 V128Op.(I16x8 Sub)) -let i16x8_sub_sat_s = Binary (V128 V128Op.(I16x8 SubSatS)) -let i16x8_sub_sat_u = Binary (V128 V128Op.(I16x8 SubSatU)) -let i16x8_mul = Binary (V128 V128Op.(I16x8 Mul)) -let i16x8_abs = Unary (V128 V128Op.(I16x8 Abs)) -let i16x8_min_s = Binary (V128 V128Op.(I16x8 MinS)) -let i16x8_min_u = Binary (V128 V128Op.(I16x8 MinU)) -let i16x8_max_s = Binary (V128 V128Op.(I16x8 MaxS)) -let i16x8_max_u = Binary (V128 V128Op.(I16x8 MaxU)) -let i16x8_avgr_u = Binary (V128 V128Op.(I16x8 AvgrU)) -let i16x8_extmul_low_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulLowS)) -let i16x8_extmul_high_i8x16_s = Binary (V128 V128Op.(I16x8 ExtMulHighS)) -let i16x8_extmul_low_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulLowU)) -let i16x8_extmul_high_i8x16_u = Binary (V128 V128Op.(I16x8 ExtMulHighU)) -let i16x8_q15mulr_sat_s = Binary (V128 V128Op.(I16x8 Q15MulRSatS)) -let i16x8_extadd_pairwise_i8x16_s = Unary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -let i16x8_extadd_pairwise_i8x16_u = Unary (V128 V128Op.(I16x8 ExtAddPairwiseU)) +let i16x8_splat = SimdConvert (V128 V128Op.(I16x8 Splat)) +let i16x8_extract_lane_s i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some SX)))) +let i16x8_extract_lane_u i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some ZX)))) +let i16x8_replace_lane i = SimdReplace (V128 V128Op.(I16x8 (Replace i))) +let i16x8_eq = SimdBinary (V128 V128Op.(I16x8 Eq)) +let i16x8_ne = SimdBinary (V128 V128Op.(I16x8 Ne)) +let i16x8_lt_s = SimdBinary (V128 V128Op.(I16x8 LtS)) +let i16x8_lt_u = SimdBinary (V128 V128Op.(I16x8 LtU)) +let i16x8_le_s = SimdBinary (V128 V128Op.(I16x8 LeS)) +let i16x8_le_u = SimdBinary (V128 V128Op.(I16x8 LeU)) +let i16x8_gt_s = SimdBinary (V128 V128Op.(I16x8 GtS)) +let i16x8_gt_u = SimdBinary (V128 V128Op.(I16x8 GtU)) +let i16x8_ge_s = SimdBinary (V128 V128Op.(I16x8 GeS)) +let i16x8_ge_u = SimdBinary (V128 V128Op.(I16x8 GeU)) +let i16x8_neg = SimdUnary (V128 V128Op.(I16x8 Neg)) +let i16x8_bitmask = SimdBitmask (V128 V128Op.(I16x8 Bitmask)) +let i16x8_all_true = SimdTest (V128 V128Op.(I16x8 AllTrue)) +let i16x8_narrow_i32x4_s = SimdBinary (V128 V128Op.(I16x8 NarrowS)) +let i16x8_narrow_i32x4_u = SimdBinary (V128 V128Op.(I16x8 NarrowU)) +let i16x8_shl = SimdShift (V128 V128Op.(I16x8 Shl)) +let i16x8_shr_s = SimdShift (V128 V128Op.(I16x8 ShrS)) +let i16x8_shr_u = SimdShift (V128 V128Op.(I16x8 ShrU)) +let i16x8_add = SimdBinary (V128 V128Op.(I16x8 Add)) +let i16x8_add_sat_s = SimdBinary (V128 V128Op.(I16x8 AddSatS)) +let i16x8_add_sat_u = SimdBinary (V128 V128Op.(I16x8 AddSatU)) +let i16x8_sub = SimdBinary (V128 V128Op.(I16x8 Sub)) +let i16x8_sub_sat_s = SimdBinary (V128 V128Op.(I16x8 SubSatS)) +let i16x8_sub_sat_u = SimdBinary (V128 V128Op.(I16x8 SubSatU)) +let i16x8_mul = SimdBinary (V128 V128Op.(I16x8 Mul)) +let i16x8_abs = SimdUnary (V128 V128Op.(I16x8 Abs)) +let i16x8_min_s = SimdBinary (V128 V128Op.(I16x8 MinS)) +let i16x8_min_u = SimdBinary (V128 V128Op.(I16x8 MinU)) +let i16x8_max_s = SimdBinary (V128 V128Op.(I16x8 MaxS)) +let i16x8_max_u = SimdBinary (V128 V128Op.(I16x8 MaxU)) +let i16x8_avgr_u = SimdBinary (V128 V128Op.(I16x8 AvgrU)) +let i16x8_extmul_low_i8x16_s = SimdBinary (V128 V128Op.(I16x8 ExtMulLowS)) +let i16x8_extmul_high_i8x16_s = SimdBinary (V128 V128Op.(I16x8 ExtMulHighS)) +let i16x8_extmul_low_i8x16_u = SimdBinary (V128 V128Op.(I16x8 ExtMulLowU)) +let i16x8_extmul_high_i8x16_u = SimdBinary (V128 V128Op.(I16x8 ExtMulHighU)) +let i16x8_q15mulr_sat_s = SimdBinary (V128 V128Op.(I16x8 Q15MulRSatS)) +let i16x8_extadd_pairwise_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseS)) +let i16x8_extadd_pairwise_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -let i32x4_splat = Convert (V128 V128Op.(I32x4 Splat)) -let i32x4_extract_lane imm = SimdExtract (V128Op.I32x4 (ZX, imm)) -let i32x4_replace_lane imm = SimdReplace (V128Op.I32x4 imm) -let i32x4_eq = Binary (V128 V128Op.(I32x4 Eq)) -let i32x4_ne = Binary (V128 V128Op.(I32x4 Ne)) -let i32x4_lt_s = Binary (V128 V128Op.(I32x4 LtS)) -let i32x4_lt_u = Binary (V128 V128Op.(I32x4 LtU)) -let i32x4_le_s = Binary (V128 V128Op.(I32x4 LeS)) -let i32x4_le_u = Binary (V128 V128Op.(I32x4 LeU)) -let i32x4_gt_s = Binary (V128 V128Op.(I32x4 GtS)) -let i32x4_gt_u = Binary (V128 V128Op.(I32x4 GtU)) -let i32x4_ge_s = Binary (V128 V128Op.(I32x4 GeS)) -let i32x4_ge_u = Binary (V128 V128Op.(I32x4 GeU)) -let i32x4_abs = Unary (V128 V128Op.(I32x4 Abs)) -let i32x4_neg = Unary (V128 V128Op.(I32x4 Neg)) -let i32x4_bitmask = SimdBitmask Simd.I32x4 -let i32x4_all_true = Test (V128 V128Op.(I32x4 AllTrue)) -let i32x4_extend_low_i16x8_s = Unary (V128 V128Op.(I32x4 ExtendLowS)) -let i32x4_extend_high_i16x8_s = Unary (V128 V128Op.(I32x4 ExtendHighS)) -let i32x4_extend_low_i16x8_u = Unary (V128 V128Op.(I32x4 ExtendLowU)) -let i32x4_extend_high_i16x8_u = Unary (V128 V128Op.(I32x4 ExtendHighU)) -let i32x4_shl = SimdShift V128Op.(I32x4 Shl) -let i32x4_shr_s = SimdShift V128Op.(I32x4 ShrS) -let i32x4_shr_u = SimdShift V128Op.(I32x4 ShrU) -let i32x4_add = Binary (V128 V128Op.(I32x4 Add)) -let i32x4_sub = Binary (V128 V128Op.(I32x4 Sub)) -let i32x4_min_s = Binary (V128 V128Op.(I32x4 MinS)) -let i32x4_min_u = Binary (V128 V128Op.(I32x4 MinU)) -let i32x4_max_s = Binary (V128 V128Op.(I32x4 MaxS)) -let i32x4_max_u = Binary (V128 V128Op.(I32x4 MaxU)) -let i32x4_mul = Binary (V128 V128Op.(I32x4 Mul)) -let i32x4_trunc_sat_f32x4_s = Unary (V128 V128Op.(I32x4 TruncSatF32x4S)) -let i32x4_trunc_sat_f32x4_u = Unary (V128 V128Op.(I32x4 TruncSatF32x4U)) -let i32x4_trunc_sat_f64x2_s_zero = Unary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -let i32x4_trunc_sat_f64x2_u_zero = Unary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S)) -let i32x4_extmul_low_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulLowS)) -let i32x4_extmul_high_i16x8_s = Binary (V128 V128Op.(I32x4 ExtMulHighS)) -let i32x4_extmul_low_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulLowU)) -let i32x4_extmul_high_i16x8_u = Binary (V128 V128Op.(I32x4 ExtMulHighU)) -let i32x4_extadd_pairwise_i16x8_s = Unary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -let i32x4_extadd_pairwise_i16x8_u = Unary (V128 V128Op.(I32x4 ExtAddPairwiseU)) +let i32x4_splat = SimdConvert (V128 V128Op.(I32x4 Splat)) +let i32x4_extract_lane i = SimdExtract (V128 V128Op.(I32x4 (Extract (i, None)))) +let i32x4_replace_lane i = SimdReplace (V128 V128Op.(I32x4 (Replace i))) +let i32x4_eq = SimdBinary (V128 V128Op.(I32x4 Eq)) +let i32x4_ne = SimdBinary (V128 V128Op.(I32x4 Ne)) +let i32x4_lt_s = SimdBinary (V128 V128Op.(I32x4 LtS)) +let i32x4_lt_u = SimdBinary (V128 V128Op.(I32x4 LtU)) +let i32x4_le_s = SimdBinary (V128 V128Op.(I32x4 LeS)) +let i32x4_le_u = SimdBinary (V128 V128Op.(I32x4 LeU)) +let i32x4_gt_s = SimdBinary (V128 V128Op.(I32x4 GtS)) +let i32x4_gt_u = SimdBinary (V128 V128Op.(I32x4 GtU)) +let i32x4_ge_s = SimdBinary (V128 V128Op.(I32x4 GeS)) +let i32x4_ge_u = SimdBinary (V128 V128Op.(I32x4 GeU)) +let i32x4_abs = SimdUnary (V128 V128Op.(I32x4 Abs)) +let i32x4_neg = SimdUnary (V128 V128Op.(I32x4 Neg)) +let i32x4_bitmask = SimdBitmask (V128 V128Op.(I32x4 Bitmask)) +let i32x4_all_true = SimdTest (V128 V128Op.(I32x4 AllTrue)) +let i32x4_extend_low_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtendLowS)) +let i32x4_extend_high_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtendHighS)) +let i32x4_extend_low_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtendLowU)) +let i32x4_extend_high_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtendHighU)) +let i32x4_shl = SimdShift (V128 V128Op.(I32x4 Shl)) +let i32x4_shr_s = SimdShift (V128 V128Op.(I32x4 ShrS)) +let i32x4_shr_u = SimdShift (V128 V128Op.(I32x4 ShrU)) +let i32x4_add = SimdBinary (V128 V128Op.(I32x4 Add)) +let i32x4_sub = SimdBinary (V128 V128Op.(I32x4 Sub)) +let i32x4_min_s = SimdBinary (V128 V128Op.(I32x4 MinS)) +let i32x4_min_u = SimdBinary (V128 V128Op.(I32x4 MinU)) +let i32x4_max_s = SimdBinary (V128 V128Op.(I32x4 MaxS)) +let i32x4_max_u = SimdBinary (V128 V128Op.(I32x4 MaxU)) +let i32x4_mul = SimdBinary (V128 V128Op.(I32x4 Mul)) +let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4S)) +let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4U)) +let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) +let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) +let i32x4_dot_i16x8_s = SimdBinary (V128 V128Op.(I32x4 DotI16x8S)) +let i32x4_extmul_low_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulLowS)) +let i32x4_extmul_high_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulHighS)) +let i32x4_extmul_low_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulLowU)) +let i32x4_extmul_high_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulHighU)) +let i32x4_extadd_pairwise_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseS)) +let i32x4_extadd_pairwise_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat)) -let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm)) -let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm) -let i64x2_extend_low_i32x4_s = Unary (V128 V128Op.(I64x2 ExtendLowS)) -let i64x2_extend_high_i32x4_s = Unary (V128 V128Op.(I64x2 ExtendHighS)) -let i64x2_extend_low_i32x4_u = Unary (V128 V128Op.(I64x2 ExtendLowU)) -let i64x2_extend_high_i32x4_u = Unary (V128 V128Op.(I64x2 ExtendHighU)) -let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq)) -let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne)) -let i64x2_lt_s = Binary (V128 V128Op.(I64x2 LtS)) -let i64x2_le_s = Binary (V128 V128Op.(I64x2 LeS)) -let i64x2_gt_s = Binary (V128 V128Op.(I64x2 GtS)) -let i64x2_ge_s = Binary (V128 V128Op.(I64x2 GeS)) -let i64x2_abs = Unary (V128 V128Op.(I64x2 Abs)) -let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg)) -let i64x2_bitmask = SimdBitmask Simd.I64x2 -let i64x2_all_true = Test (V128 V128Op.(I64x2 AllTrue)) -let i64x2_add = Binary (V128 V128Op.(I64x2 Add)) -let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub)) -let i64x2_mul = Binary (V128 V128Op.(I64x2 Mul)) -let i64x2_shl = SimdShift V128Op.(I64x2 Shl) -let i64x2_shr_s = SimdShift V128Op.(I64x2 ShrS) -let i64x2_shr_u = SimdShift V128Op.(I64x2 ShrU) -let i64x2_extmul_low_i32x4_s = Binary (V128 V128Op.(I64x2 ExtMulLowS)) -let i64x2_extmul_high_i32x4_s = Binary (V128 V128Op.(I64x2 ExtMulHighS)) -let i64x2_extmul_low_i32x4_u = Binary (V128 V128Op.(I64x2 ExtMulLowU)) -let i64x2_extmul_high_i32x4_u = Binary (V128 V128Op.(I64x2 ExtMulHighU)) +let i64x2_splat = SimdConvert (V128 V128Op.(I64x2 Splat)) +let i64x2_extract_lane i = SimdExtract (V128 V128Op.(I64x2 (Extract (i, None)))) +let i64x2_replace_lane i = SimdReplace (V128 V128Op.(I64x2 (Replace i))) +let i64x2_extend_low_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendLowS)) +let i64x2_extend_high_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendHighS)) +let i64x2_extend_low_i32x4_u = SimdUnary (V128 V128Op.(I64x2 ExtendLowU)) +let i64x2_extend_high_i32x4_u = SimdUnary (V128 V128Op.(I64x2 ExtendHighU)) +let i64x2_eq = SimdBinary (V128 V128Op.(I64x2 Eq)) +let i64x2_ne = SimdBinary (V128 V128Op.(I64x2 Ne)) +let i64x2_lt_s = SimdBinary (V128 V128Op.(I64x2 LtS)) +let i64x2_le_s = SimdBinary (V128 V128Op.(I64x2 LeS)) +let i64x2_gt_s = SimdBinary (V128 V128Op.(I64x2 GtS)) +let i64x2_ge_s = SimdBinary (V128 V128Op.(I64x2 GeS)) +let i64x2_abs = SimdUnary (V128 V128Op.(I64x2 Abs)) +let i64x2_neg = SimdUnary (V128 V128Op.(I64x2 Neg)) +let i64x2_bitmask = SimdBitmask (V128 V128Op.(I64x2 Bitmask)) +let i64x2_all_true = SimdTest (V128 V128Op.(I64x2 AllTrue)) +let i64x2_add = SimdBinary (V128 V128Op.(I64x2 Add)) +let i64x2_sub = SimdBinary (V128 V128Op.(I64x2 Sub)) +let i64x2_mul = SimdBinary (V128 V128Op.(I64x2 Mul)) +let i64x2_shl = SimdShift (V128 V128Op.(I64x2 Shl)) +let i64x2_shr_s = SimdShift (V128 V128Op.(I64x2 ShrS)) +let i64x2_shr_u = SimdShift (V128 V128Op.(I64x2 ShrU)) +let i64x2_extmul_low_i32x4_s = SimdBinary (V128 V128Op.(I64x2 ExtMulLowS)) +let i64x2_extmul_high_i32x4_s = SimdBinary (V128 V128Op.(I64x2 ExtMulHighS)) +let i64x2_extmul_low_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulLowU)) +let i64x2_extmul_high_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulHighU)) -let f32x4_splat = Convert (V128 V128Op.(F32x4 Splat)) -let f32x4_extract_lane imm = SimdExtract (V128Op.F32x4 (ZX, imm)) -let f32x4_replace_lane imm = SimdReplace (V128Op.F32x4 imm) -let f32x4_eq = Binary (V128 V128Op.(F32x4 Eq)) -let f32x4_ne = Binary (V128 V128Op.(F32x4 Ne)) -let f32x4_lt = Binary (V128 V128Op.(F32x4 Lt)) -let f32x4_le = Binary (V128 V128Op.(F32x4 Le)) -let f32x4_gt = Binary (V128 V128Op.(F32x4 Gt)) -let f32x4_ge = Binary (V128 V128Op.(F32x4 Ge)) -let f32x4_abs = Unary (V128 V128Op.(F32x4 Abs)) -let f32x4_neg = Unary (V128 V128Op.(F32x4 Neg)) -let f32x4_sqrt = Unary (V128 V128Op.(F32x4 Sqrt)) -let f32x4_ceil = Unary (V128 V128Op.(F32x4 Ceil)) -let f32x4_floor = Unary (V128 V128Op.(F32x4 Floor)) -let f32x4_trunc = Unary (V128 V128Op.(F32x4 Trunc)) -let f32x4_nearest = Unary (V128 V128Op.(F32x4 Nearest)) -let f32x4_add = Binary (V128 V128Op.(F32x4 Add)) -let f32x4_sub = Binary (V128 V128Op.(F32x4 Sub)) -let f32x4_mul = Binary (V128 V128Op.(F32x4 Mul)) -let f32x4_div = Binary (V128 V128Op.(F32x4 Div)) -let f32x4_min = Binary (V128 V128Op.(F32x4 Min)) -let f32x4_max = Binary (V128 V128Op.(F32x4 Max)) -let f32x4_convert_i32x4_s = Unary (V128 V128Op.(F32x4 ConvertI32x4S)) -let f32x4_convert_i32x4_u = Unary (V128 V128Op.(F32x4 ConvertI32x4U)) -let f32x4_pmin = Binary (V128 V128Op.(F32x4 Pmin)) -let f32x4_pmax = Binary (V128 V128Op.(F32x4 Pmax)) -let f32x4_demote_f64x2_zero = Unary (V128 V128Op.(F32x4 DemoteF64x2Zero)) +let f32x4_splat = SimdConvert (V128 V128Op.(F32x4 Splat)) +let f32x4_extract_lane i = SimdExtract (V128 V128Op.(F32x4 (Extract (i, None)))) +let f32x4_replace_lane i = SimdReplace (V128 V128Op.(F32x4 (Replace i))) +let f32x4_eq = SimdBinary (V128 V128Op.(F32x4 Eq)) +let f32x4_ne = SimdBinary (V128 V128Op.(F32x4 Ne)) +let f32x4_lt = SimdBinary (V128 V128Op.(F32x4 Lt)) +let f32x4_le = SimdBinary (V128 V128Op.(F32x4 Le)) +let f32x4_gt = SimdBinary (V128 V128Op.(F32x4 Gt)) +let f32x4_ge = SimdBinary (V128 V128Op.(F32x4 Ge)) +let f32x4_abs = SimdUnary (V128 V128Op.(F32x4 Abs)) +let f32x4_neg = SimdUnary (V128 V128Op.(F32x4 Neg)) +let f32x4_sqrt = SimdUnary (V128 V128Op.(F32x4 Sqrt)) +let f32x4_ceil = SimdUnary (V128 V128Op.(F32x4 Ceil)) +let f32x4_floor = SimdUnary (V128 V128Op.(F32x4 Floor)) +let f32x4_trunc = SimdUnary (V128 V128Op.(F32x4 Trunc)) +let f32x4_nearest = SimdUnary (V128 V128Op.(F32x4 Nearest)) +let f32x4_add = SimdBinary (V128 V128Op.(F32x4 Add)) +let f32x4_sub = SimdBinary (V128 V128Op.(F32x4 Sub)) +let f32x4_mul = SimdBinary (V128 V128Op.(F32x4 Mul)) +let f32x4_div = SimdBinary (V128 V128Op.(F32x4 Div)) +let f32x4_min = SimdBinary (V128 V128Op.(F32x4 Min)) +let f32x4_max = SimdBinary (V128 V128Op.(F32x4 Max)) +let f32x4_convert_i32x4_s = SimdUnary (V128 V128Op.(F32x4 ConvertI32x4S)) +let f32x4_convert_i32x4_u = SimdUnary (V128 V128Op.(F32x4 ConvertI32x4U)) +let f32x4_pmin = SimdBinary (V128 V128Op.(F32x4 Pmin)) +let f32x4_pmax = SimdBinary (V128 V128Op.(F32x4 Pmax)) +let f32x4_demote_f64x2_zero = SimdUnary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -let f64x2_splat = Convert (V128 V128Op.(F64x2 Splat)) -let f64x2_extract_lane imm = SimdExtract (V128Op.F64x2 (ZX, imm)) -let f64x2_replace_lane imm = SimdReplace (V128Op.F64x2 imm) -let f64x2_eq = Binary (V128 V128Op.(F64x2 Eq)) -let f64x2_ne = Binary (V128 V128Op.(F64x2 Ne)) -let f64x2_lt = Binary (V128 V128Op.(F64x2 Lt)) -let f64x2_le = Binary (V128 V128Op.(F64x2 Le)) -let f64x2_gt = Binary (V128 V128Op.(F64x2 Gt)) -let f64x2_ge = Binary (V128 V128Op.(F64x2 Ge)) -let f64x2_neg = Unary (V128 V128Op.(F64x2 Neg)) -let f64x2_sqrt = Unary (V128 V128Op.(F64x2 Sqrt)) -let f64x2_ceil = Unary (V128 V128Op.(F64x2 Ceil)) -let f64x2_floor = Unary (V128 V128Op.(F64x2 Floor)) -let f64x2_trunc = Unary (V128 V128Op.(F64x2 Trunc)) -let f64x2_nearest = Unary (V128 V128Op.(F64x2 Nearest)) -let f64x2_add = Binary (V128 V128Op.(F64x2 Add)) -let f64x2_sub = Binary (V128 V128Op.(F64x2 Sub)) -let f64x2_mul = Binary (V128 V128Op.(F64x2 Mul)) -let f64x2_div = Binary (V128 V128Op.(F64x2 Div)) -let f64x2_min = Binary (V128 V128Op.(F64x2 Min)) -let f64x2_max = Binary (V128 V128Op.(F64x2 Max)) -let f64x2_abs = Unary (V128 V128Op.(F64x2 Abs)) -let f64x2_pmin = Binary (V128 V128Op.(F64x2 Pmin)) -let f64x2_pmax = Binary (V128 V128Op.(F64x2 Pmax)) -let f64x2_promote_low_f32x4 = Unary (V128 V128Op.(F64x2 PromoteLowF32x4)) -let f64x2_convert_low_i32x4_s = Unary (V128 V128Op.(F64x2 ConvertI32x4S)) -let f64x2_convert_low_i32x4_u = Unary (V128 V128Op.(F64x2 ConvertI32x4U)) +let f64x2_splat = SimdConvert (V128 V128Op.(F64x2 Splat)) +let f64x2_extract_lane i = SimdExtract (V128 V128Op.(F64x2 (Extract (i, None)))) +let f64x2_replace_lane i = SimdReplace (V128 V128Op.(F64x2 (Replace i))) +let f64x2_eq = SimdBinary (V128 V128Op.(F64x2 Eq)) +let f64x2_ne = SimdBinary (V128 V128Op.(F64x2 Ne)) +let f64x2_lt = SimdBinary (V128 V128Op.(F64x2 Lt)) +let f64x2_le = SimdBinary (V128 V128Op.(F64x2 Le)) +let f64x2_gt = SimdBinary (V128 V128Op.(F64x2 Gt)) +let f64x2_ge = SimdBinary (V128 V128Op.(F64x2 Ge)) +let f64x2_neg = SimdUnary (V128 V128Op.(F64x2 Neg)) +let f64x2_sqrt = SimdUnary (V128 V128Op.(F64x2 Sqrt)) +let f64x2_ceil = SimdUnary (V128 V128Op.(F64x2 Ceil)) +let f64x2_floor = SimdUnary (V128 V128Op.(F64x2 Floor)) +let f64x2_trunc = SimdUnary (V128 V128Op.(F64x2 Trunc)) +let f64x2_nearest = SimdUnary (V128 V128Op.(F64x2 Nearest)) +let f64x2_add = SimdBinary (V128 V128Op.(F64x2 Add)) +let f64x2_sub = SimdBinary (V128 V128Op.(F64x2 Sub)) +let f64x2_mul = SimdBinary (V128 V128Op.(F64x2 Mul)) +let f64x2_div = SimdBinary (V128 V128Op.(F64x2 Div)) +let f64x2_min = SimdBinary (V128 V128Op.(F64x2 Min)) +let f64x2_max = SimdBinary (V128 V128Op.(F64x2 Max)) +let f64x2_abs = SimdUnary (V128 V128Op.(F64x2 Abs)) +let f64x2_pmin = SimdBinary (V128 V128Op.(F64x2 Pmin)) +let f64x2_pmax = SimdBinary (V128 V128Op.(F64x2 Pmax)) +let f64x2_promote_low_f32x4 = SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) +let f64x2_convert_low_i32x4_s = SimdUnary (V128 V128Op.(F64x2 ConvertI32x4S)) +let f64x2_convert_low_i32x4_u = SimdUnary (V128 V128Op.(F64x2 ConvertI32x4U)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 8b620248d4..87571c1dad 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -1,8 +1,9 @@ (* Types *) -type num_type = I32Type | I64Type | F32Type | F64Type | V128Type +type num_type = I32Type | I64Type | F32Type | F64Type +type simd_type = V128Type type ref_type = FuncRefType | ExternRefType -type value_type = NumType of num_type | RefType of ref_type +type value_type = NumType of num_type | SimdType of simd_type | RefType of ref_type type result_type = value_type list type func_type = FuncType of result_type * result_type @@ -26,11 +27,14 @@ type pack_simd = | Pack32x2 of extension | PackZero + (* Attributes *) -let size = function +let num_size = function | I32Type | F32Type -> 4 | I64Type | F64Type -> 8 + +let simd_size = function | V128Type -> 16 let packed_size = function @@ -41,11 +45,15 @@ let packed_size = function let is_num_type = function | NumType _ -> true - | RefType _ -> false + | _ -> false + +let is_simd_type = function + | SimdType _ -> true + | _ -> false let is_ref_type = function - | NumType _ -> false | RefType _ -> true + | _ -> false (* Filters *) @@ -97,6 +105,8 @@ let string_of_num_type = function | I64Type -> "i64" | F32Type -> "f32" | F64Type -> "f64" + +let string_of_simd_type = function | V128Type -> "v128" let string_of_ref_type = function @@ -109,6 +119,7 @@ let string_of_refed_type = function let string_of_value_type = function | NumType t -> string_of_num_type t + | SimdType t -> string_of_simd_type t | RefType t -> string_of_ref_type t let string_of_value_types = function diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index 0f83059e44..a667aa6274 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -3,19 +3,41 @@ open Types (* Values and operators *) -type ('i32, 'i64, 'f32, 'f64, 'v128) op = - I32 of 'i32 | I64 of 'i64 | F32 of 'f32 | F64 of 'f64 | V128 of 'v128 +type ('i32, 'i64, 'f32, 'f64) op = + I32 of 'i32 | I64 of 'i64 | F32 of 'f32 | F64 of 'f64 -type num = (I32.t, I64.t, F32.t, F64.t, V128.t) op +type ('v128) simdop = + V128 of 'v128 + +type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) laneop = + | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 + | F32x4 of 'f32x4 | F64x2 of 'f64x2 + | V128x1 of 'v128 + +type num = (I32.t, I64.t, F32.t, F64.t) op +type simd = (V128.t) simdop type ref_ = .. type ref_ += NullRef of ref_type -type value = Num of num | Ref of ref_ +type value = Num of num | Simd of simd | Ref of ref_ (* Injection & projection *) +let as_num = function + | Num n -> n + | _ -> failwith "as_num" + +let as_simd = function + | Simd i -> i + | _ -> failwith "as_simd" + +let as_ref = function + | Ref r -> r + | _ -> failwith "as_ref" + + exception TypeError of int * num * num_type module type NumType = @@ -53,11 +75,18 @@ struct let of_num n = function F64 z -> z | v -> raise (TypeError (n, v, F64Type)) end -module V128Num = +module type SimdType = +sig + type t + val to_simd : t -> simd + val of_simd : int -> simd -> t +end + +module V128Simd = struct type t = V128.t - let to_num i = V128 i - let of_num n = function V128 z -> z | v -> raise (TypeError (n, v, V128Type)) + let to_simd i = V128 i + let of_simd n = function V128 z -> z end @@ -68,6 +97,8 @@ let type_of_num = function | I64 _ -> I64Type | F32 _ -> F32Type | F64 _ -> F64Type + +let type_of_simd = function | V128 _ -> V128Type let type_of_ref' = ref (function NullRef t -> t | _ -> assert false) @@ -75,18 +106,30 @@ let type_of_ref r = !type_of_ref' r let type_of_value = function | Num n -> NumType (type_of_num n) + | Simd i -> SimdType (type_of_simd i) | Ref r -> RefType (type_of_ref r) -(* Projections *) +(* Comparison *) -let as_num = function - | Num n -> n - | Ref _ -> failwith "as_num" +let eq_num n1 n2 = n1 = n2 -let as_ref = function - | Num _ -> failwith "as_ref" - | Ref r -> r +let eq_simd v1 v2 = v1 = v2 + +let eq_ref' = ref (fun r1 r2 -> + match r1, r2 with + | NullRef _, NullRef _ -> true + | _, _ -> false +) + +let eq_ref r1 r2 = !eq_ref' r1 r2 + +let eq v1 v2 = + match v1, v2 with + | Num n1, Num n2 -> eq_num n1 n2 + | Simd v1, Simd v2 -> eq_simd v1 v2 + | Ref r1, Ref r2 -> eq_ref r1 r2 + | _, _ -> false (* Defaults *) @@ -96,13 +139,16 @@ let default_num = function | I64Type -> I64 I64.zero | F32Type -> F32 F32.zero | F64Type -> F64 F64.zero - | V128Type -> V128 V128.default + +let default_simd = function + | V128Type -> V128 V128.zero let default_ref = function | t -> NullRef t let default_value = function | NumType t' -> Num (default_num t') + | SimdType t' -> Simd (default_simd t') | RefType t' -> Ref (default_ref t') @@ -115,13 +161,25 @@ let string_of_num = function | I64 i -> I64.to_string_s i | F32 z -> F32.to_string z | F64 z -> F64.to_string z + +let hex_string_of_num = function + | I32 i -> I32.to_hex_string i + | I64 i -> I64.to_hex_string i + | F32 z -> F32.to_hex_string z + | F64 z -> F64.to_hex_string z + +let string_of_simd = function | V128 v -> V128.to_string v +let hex_string_of_simd = function + | V128 v -> V128.to_hex_string v + let string_of_ref' = ref (function NullRef t -> "null" | _ -> "ref") let string_of_ref r = !string_of_ref' r let string_of_value = function | Num n -> string_of_num n + | Simd i -> string_of_simd i | Ref r -> string_of_ref r let string_of_values = function diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index ced3404255..94ccf8d8e0 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -56,6 +56,7 @@ let break_string s = (* Types *) let num_type t = string_of_num_type t +let simd_type t = string_of_simd_type t let ref_type t = string_of_ref_type t let refed_type t = string_of_refed_type t let value_type t = string_of_value_type t @@ -186,21 +187,19 @@ struct | ReinterpretInt -> "reinterpret_i" ^ xx end -module SimdOp = +module V128Op = struct - open Ast.SimdOp + open Ast.V128Op - let testop xx = function + let testop (op : testop) = match op with | I8x16 AllTrue -> "i8x16.all_true" | I16x8 AllTrue -> "i16x8.all_true" | I32x4 AllTrue -> "i32x4.all_true" | I64x2 AllTrue -> "i64x2.all_true" - | V128 AnyTrue -> "v128.any_true" - | _ -> assert false - - let relop xx = assert false + | V128x1 AnyTrue -> "v128.any_true" + | _ -> . - let unop xx (op : unop) = match op with + let unop (op : unop) = match op with | I8x16 Neg -> "i8x16.neg" | I8x16 Abs -> "i8x16.abs" | I8x16 Popcnt -> "i8x16.popcnt" @@ -250,11 +249,11 @@ struct | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" | F64x2 ConvertI32x4S -> "f64x2.convert_low_i32x4_s" | F64x2 ConvertI32x4U -> "f64x2.convert_low_i32x4_u" - | V128 Not -> "v128.not" + | V128x1 Not -> "v128.not" | _ -> failwith "Unimplemented v128 unop" - let binop xx (op : binop) = match op with - | I8x16 (Shuffle imms) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat imms)) + let binop (op : binop) = match op with + | I8x16 (Shuffle is) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat is)) | I8x16 Swizzle -> "i8x16.swizzle" | I8x16 Eq -> "i8x16.eq" | I8x16 Ne -> "i8x16.ne" @@ -371,45 +370,17 @@ struct | F64x2 Max -> "f64x2.max" | F64x2 Pmin -> "f64x2.pmin" | F64x2 Pmax -> "f64x2.pmax" - | V128 And -> "v128.and" - | V128 AndNot -> "v128.andnot" - | V128 Or -> "v128.or" - | V128 Xor -> "v128.xor" + | V128x1 And -> "v128.and" + | V128x1 AndNot -> "v128.andnot" + | V128x1 Or -> "v128.or" + | V128x1 Xor -> "v128.xor" | _ -> failwith "Unimplemented v128 binop" let ternop (op : ternop) = match op with - | Bitselect -> "v128.bitselect" - - let cvtop xx = function - | I8x16 Splat -> "i8x16.splat" - | I16x8 Splat -> "i16x8.splat" - | I32x4 Splat -> "i32x4.splat" - | I64x2 Splat -> "i64x2.splat" - | F32x4 Splat -> "f32x4.splat" - | F64x2 Splat -> "f64x2.splat" - | _ -> assert false + | V128x1 Bitselect -> "v128.bitselect" + | _ -> . - let extractop = function - | I8x16 (SX, imm) -> "i8x16.extract_lane_s " ^ (nat imm) - | I8x16 (ZX, imm) -> "i8x16.extract_lane_u " ^ (nat imm) - | I16x8 (SX, imm) -> "i16x8.extract_lane_s " ^ (nat imm) - | I16x8 (ZX, imm) -> "i16x8.extract_lane_u " ^ (nat imm) - | I32x4 (ZX, imm) -> "i32x4.extract_lane " ^ (nat imm) - | I64x2 (ZX, imm) -> "i64x2.extract_lane " ^ (nat imm) - | F32x4 (ZX, imm) -> "f32x4.extract_lane " ^ (nat imm) - | F64x2 (ZX, imm) -> "f64x2.extract_lane " ^ (nat imm) - | _ -> assert false - - let replaceop = function - | I8x16 imm -> "i8x16.replace_lane " ^ (nat imm) - | I16x8 imm -> "i16x8.replace_lane " ^ (nat imm) - | I32x4 imm -> "i32x4.replace_lane " ^ (nat imm) - | I64x2 imm -> "i64x2.replace_lane " ^ (nat imm) - | F32x4 imm -> "f32x4.replace_lane " ^ (nat imm) - | F64x2 imm -> "f64x2.replace_lane " ^ (nat imm) - | _ -> assert false - - let shiftop = function + let shiftop (op : shiftop) = match op with | I8x16 Shl -> "i8x16.shl" | I8x16 ShrS -> "i8x16.shr_s" | I8x16 ShrU -> "i8x16.shr_u" @@ -422,55 +393,79 @@ struct | I64x2 Shl -> "i64x2.shl" | I64x2 ShrS -> "i64x2.shr_s" | I64x2 ShrU -> "i64x2.shr_u" - | _ -> assert false + | _ -> . + + let bitmaskop (op : bitmaskop) = match op with + | I8x16 Bitmask -> "i8x16.bitmask" + | I16x8 Bitmask -> "i16x8.bitmask" + | I32x4 Bitmask -> "i32x4.bitmask" + | I64x2 Bitmask -> "i64x2.bitmask" + | _ -> . - let bitmaskop = function - | Simd.I8x16 -> "i8x16.bitmask" - | Simd.I16x8 -> "i16x8.bitmask" - | Simd.I32x4 -> "i32x4.bitmask" - | Simd.I64x2 -> "i64x2.bitmask" + let cvtop (op : cvtop) = match op with + | I8x16 Splat -> "i8x16.splat" + | I16x8 Splat -> "i16x8.splat" + | I32x4 Splat -> "i32x4.splat" + | I64x2 Splat -> "i64x2.splat" + | F32x4 Splat -> "f32x4.splat" + | F64x2 Splat -> "f64x2.splat" + | _ -> . + + let extractop (op : extractop) = match op with + | I8x16 (Extract (i, Some SX)) -> "i8x16.extract_lane_s " ^ nat i + | I8x16 (Extract (i, Some ZX)) -> "i8x16.extract_lane_u " ^ nat i + | I16x8 (Extract (i, Some SX)) -> "i16x8.extract_lane_s " ^ nat i + | I16x8 (Extract (i, Some ZX)) -> "i16x8.extract_lane_u " ^ nat i + | I32x4 (Extract (i, None)) -> "i32x4.extract_lane " ^ nat i + | I64x2 (Extract (i, None)) -> "i64x2.extract_lane " ^ nat i + | F32x4 (Extract (i, None)) -> "f32x4.extract_lane " ^ nat i + | F64x2 (Extract (i, None)) -> "f64x2.extract_lane " ^ nat i | _ -> assert false + let replaceop (op : replaceop) = match op with + | I8x16 (Replace i) -> "i8x16.replace_lane " ^ nat i + | I16x8 (Replace i) -> "i16x8.replace_lane " ^ nat i + | I32x4 (Replace i) -> "i32x4.replace_lane " ^ nat i + | I64x2 (Replace i) -> "i64x2.replace_lane " ^ nat i + | F32x4 (Replace i) -> "f32x4.replace_lane " ^ nat i + | F64x2 (Replace i) -> "f64x2.replace_lane " ^ nat i + | _ -> . end -let oper (intop, floatop, simdop) op = - (* v128 operations don't need to be prefixed by the type, - * each instruction will specify their prefix (shape). - *) - let prefix = match op with - | V128 o -> "" - | _ -> num_type (type_of_num op) ^ "." - in - let ops = match op with - | I32 o -> intop "32" o - | I64 o -> intop "64" o - | F32 o -> floatop "32" o - | F64 o -> floatop "64" o - | V128 o -> simdop "128" o - in prefix ^ ops - -let unop = oper (IntOp.unop, FloatOp.unop, SimdOp.unop) -let binop = oper (IntOp.binop, FloatOp.binop, SimdOp.binop) -let testop = oper (IntOp.testop, FloatOp.testop, SimdOp.testop) -let relop = oper (IntOp.relop, FloatOp.relop, SimdOp.relop) -let cvtop = oper (IntOp.cvtop, FloatOp.cvtop, SimdOp.cvtop) -let ternop = SimdOp.ternop - -(* Temporary wart here while we finalize the names of SIMD loads and extends. *) -let memop name {ty; align; offset; _} sz = - num_type ty ^ "." ^ name ^ +let oper (intop, floatop) op = + num_type (type_of_num op) ^ "." ^ + (match op with + | I32 o -> intop "32" o + | I64 o -> intop "64" o + | F32 o -> floatop "32" o + | F64 o -> floatop "64" o + ) + +let unop = oper (IntOp.unop, FloatOp.unop) +let binop = oper (IntOp.binop, FloatOp.binop) +let testop = oper (IntOp.testop, FloatOp.testop) +let relop = oper (IntOp.relop, FloatOp.relop) +let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) + +let memop name typ {ty; align; offset; _} sz = + typ ty ^ "." ^ name ^ (if offset = 0l then "" else " offset=" ^ nat32 offset) ^ (if 1 lsl align = sz then "" else " align=" ^ nat (1 lsl align)) let loadop op = match op.sz with - | None -> memop "load" op (size op.ty) + | None -> memop "load" num_type op (num_size op.ty) | Some (sz, ext) -> - memop ("load" ^ pack_size sz ^ extension ext) op (packed_size sz) + memop ("load" ^ pack_size sz ^ extension ext) num_type op (packed_size sz) + +let storeop op = + match op.sz with + | None -> memop "store" num_type op (num_size op.ty) + | Some sz -> memop ("store" ^ pack_size sz) num_type op (packed_size sz) let simd_loadop (op : simd_loadop) = match op.sz with - | None -> memop "load" op (size op.ty) + | None -> memop "load" simd_type op (simd_size op.ty) | Some (sz, pack_simd) -> let suffix = (match sz, pack_simd with @@ -485,40 +480,27 @@ let simd_loadop (op : simd_loadop) = | Pack64, PackZero -> "64_zero" | _ -> assert false ) in - memop ("load" ^ suffix) op (packed_size sz) - -let simd_laneop instr (op, i) = - match op.sz with - | None -> assert false - | Some sz -> - let suffix = - match sz with - | Pack8 -> "8_lane" - | Pack16 -> "16_lane" - | Pack32 -> "32_lane" - | Pack64 -> "64_lane" - in memop (instr ^ suffix) op (packed_size sz) ^ " " ^ (nat i) - -let storeop op = - match op.sz with - | None -> memop "store" op (size op.ty) - | Some sz -> memop ("store" ^ pack_size sz) op (packed_size sz) + memop ("load" ^ suffix) simd_type op (packed_size sz) let simd_storeop op = - match op.sz with - | None -> memop "store" op (size op.ty) - | Some _ -> assert false + memop "store" simd_type op (simd_size op.ty) + +let simd_laneop instr (op, i) = + let suffix = + match op.sz with + | Pack8 -> "8_lane" + | Pack16 -> "16_lane" + | Pack32 -> "32_lane" + | Pack64 -> "64_lane" + in memop (instr ^ suffix) simd_type op (packed_size op.sz) ^ " " ^ nat i (* Expressions *) let var x = nat32 x.it let num v = string_of_num v.it -let constop v = - let shape = match v.it with - | V128 _ -> "i32x4 " - | _ -> "" - in num_type (type_of_num v.it) ^ ".const " ^ shape +let simd v = string_of_simd v.it +let constop v = num_type (type_of_num v) ^ ".const" let block_type = function | VarBlockType x -> [Node ("type " ^ var x, [])] @@ -560,11 +542,11 @@ let rec instr e = | TableInit (x, y) -> "table.init " ^ var x ^ " " ^ var y, [] | ElemDrop x -> "elem.drop " ^ var x, [] | Load op -> loadop op, [] + | Store op -> storeop op, [] | SimdLoad op -> simd_loadop op, [] + | SimdStore op -> simd_storeop op, [] | SimdLoadLane op -> simd_laneop "load" op, [] | SimdStoreLane op -> simd_laneop "store" op, [] - | SimdStore op -> simd_storeop op, [] - | Store op -> storeop op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] | MemoryFill -> "memory.fill", [] @@ -574,17 +556,22 @@ let rec instr e = | RefNull t -> "ref.null", [Atom (refed_type t)] | RefIsNull -> "ref.is_null", [] | RefFunc x -> "ref.func " ^ var x, [] - | Const n -> constop n ^ " " ^ num n, [] + | Const n -> constop n.it ^ " " ^ num n, [] | Test op -> testop op, [] | Compare op -> relop op, [] | Unary op -> unop op, [] | Binary op -> binop op, [] | Convert op -> cvtop op, [] - | SimdTernary op -> ternop op, [] - | SimdExtract op -> SimdOp.extractop op, [] - | SimdReplace op -> SimdOp.replaceop op, [] - | SimdShift op -> SimdOp.shiftop op, [] - | SimdBitmask op -> SimdOp.bitmaskop op, [] + | SimdConst n -> "v128.const i32x4 " ^ simd n, [] + | SimdTest (V128 op) -> V128Op.testop op, [] + | SimdUnary (V128 op) -> V128Op.unop op, [] + | SimdBinary (V128 op) -> V128Op.binop op, [] + | SimdTernary (V128 op) -> V128Op.ternop op, [] + | SimdShift (V128 op) -> V128Op.shiftop op, [] + | SimdBitmask (V128 op) -> V128Op.bitmaskop op, [] + | SimdConvert (V128 op) -> V128Op.cvtop op, [] + | SimdExtract (V128 op) -> V128Op.extractop op, [] + | SimdReplace (V128 op) -> V128Op.replaceop op, [] in Node (head, inner) let const head c = @@ -739,27 +726,19 @@ let module_ = module_with_var_opt None (* Scripts *) -(* Converts a value to string depending on mode. *) -let literal mode lit shape = - let choose_mode bin not_bin = if mode = `Binary then bin else not_bin in - match lit.it, shape with - | Num (Values.I32 i), Some Simd.I8x16 -> choose_mode I8.to_hex_string I8.to_string_s i - | Num (Values.I32 i), Some Simd.I16x8 -> choose_mode I16.to_hex_string I16.to_string_s i - | Num (Values.I32 i), _ -> choose_mode I32.to_hex_string I32.to_string_s i - | Num (Values.I64 i), _ -> choose_mode I64.to_hex_string I64.to_string_s i - | Num (Values.F32 z), _ -> choose_mode F32.to_hex_string F32.to_string z - | Num (Values.F64 z), _ -> choose_mode F64.to_hex_string F64.to_string z - | Num (Values.V128 v), _ -> choose_mode V128.to_hex_string V128.to_string v - | Ref (NullRef t), _ -> ("ref.null " ^ refed_type t) - | Ref (ExternRef n), _ -> ("ref.extern " ^ nat32 n) - | Ref _, _ -> assert false - -(* Converts a literal into a constant instruction. *) -let constant mode lit = - let lit_string = literal mode lit None in +let num mode = if mode = `Binary then hex_string_of_num else string_of_num +let simd mode = if mode = `Binary then hex_string_of_simd else string_of_simd + +let ref_ = function + | NullRef t -> Node ("ref.null " ^ refed_type t, []) + | ExternRef n -> Node ("ref.extern " ^ nat32 n, []) + | _ -> assert false + +let literal mode lit = match lit.it with - | Num n -> Node (constop (n @@ lit.at) ^ lit_string, []) - | Ref _ -> Node (lit_string, []) + | Num n -> Node (constop n ^ " " ^ num mode n, []) + | Simd v -> Node ("v128.const i32x4 " ^ simd mode v, []) + | Ref r -> ref_ r let definition mode x_opt def = try @@ -792,7 +771,7 @@ let access x_opt n = let action mode act = match act.it with | Invoke (x_opt, name, lits) -> - Node ("invoke" ^ access x_opt name, List.map (constant mode) lits) + Node ("invoke" ^ access x_opt name, List.map (literal mode) lits) | Get (x_opt, name) -> Node ("get" ^ access x_opt name, []) @@ -800,34 +779,39 @@ let nan = function | CanonicalNan -> "nan:canonical" | ArithmeticNan -> "nan:arithmetic" -let result_numpat mode res = - match res with - | LitPat lit -> constant mode lit - | NanPat nanop -> - match nanop.it with - | Values.I32 _ | Values.I64 _ | Values.V128 _ -> assert false - | Values.F32 n -> Node ("f32.const " ^ nan n, []) - | Values.F64 n -> Node ("f64.const " ^ nan n, []) - -let result_simd mode res shape pats = - (* A different text generation for SIMD, since the literals within - * a SimdResult do not need the i32.const instruction *) - let num_pat mode res = - match res with - | LitPat lit -> literal mode lit (Some shape) - | NanPat {it = Values.F32 n; _} - | NanPat {it = Values.F64 n; _} -> nan n - | _ -> assert false - in - let lits = (List.map (num_pat mode) pats) in - let tokens = ["v128.const"; Simd.string_of_shape shape;] @ lits in - Node (String.concat " " tokens, []) +let nanop (n : nanop) = + match n.it with + | F32 n' | F64 n' -> nan n' + | _ -> . + +let num_pat mode = function + | NumPat n -> literal mode (Values.Num n.it @@ n.at) + | NanPat nan -> Node (constop nan.it ^ " " ^ nanop nan, []) + +let lane_pat mode pat shape = + let choose fb ft = if mode = `Binary then fb else ft in + match pat, shape with + | NumPat {it = Values.I32 i; _}, Simd.I8x16 -> + choose I8.to_hex_string I8.to_string_s i + | NumPat {it = Values.I32 i; _}, Simd.I16x8 -> + choose I16.to_hex_string I16.to_string_s i + | NumPat n, _ -> num mode n.it + | NanPat nan, _ -> nanop nan + +let simd_pat mode = function + | SimdPat (shape, pats) -> + let lanes = List.map (fun p -> Atom (lane_pat mode p shape)) pats in + Node ("v128.const " ^ Simd.string_of_shape shape, lanes) + +let ref_pat = function + | RefPat r -> ref_ r.it + | RefTypePat t -> Node ("ref." ^ refed_type t, []) let result mode res = match res.it with - | SimdResult (shape, pats) -> result_simd mode res shape pats - | NumResult n -> result_numpat mode n - | RefResult t -> Node ("ref." ^ refed_type t, []) + | NumResult np -> num_pat mode np + | SimdResult vp -> simd_pat mode vp + | RefResult rp -> ref_pat rp let assertion mode ass = match ass.it with diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 7a3664e20b..4b5b86ce9f 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -50,6 +50,9 @@ let num_type = function | "i64" -> Types.I64Type | "f32" -> Types.F32Type | "f64" -> Types.F64Type + | _ -> assert false + +let simd_type = function | "v128" -> Types.V128Type | _ -> assert false @@ -65,17 +68,14 @@ let floatop t f32 f64 = | "f64" -> f64 | _ -> assert false -let numop t i32 i64 f32 f64 v128 = +let numop t i32 i64 f32 f64 = match t with | "i32" -> i32 | "i64" -> i64 | "f32" -> f32 | "f64" -> f64 - | "v128" -> v128 | _ -> assert false -let unimplemented_simd = fun _ -> failwith "unimplemented simd" - let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = match s with | "i8x16" -> i8x16 @@ -184,8 +184,8 @@ let name = '$' reserved let ixx = "i" ("32" | "64") let fxx = "f" ("32" | "64") +let nxx = ixx | fxx let vxxx = "v128" -let nxx = ixx | fxx | vxxx let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" @@ -212,8 +212,8 @@ rule token = parse | "extern" { EXTERN } | "externref" { EXTERNREF } | "funcref" { FUNCREF } - | (nxx as t) { NUM_TYPE (num_type t) } - | (vxxx)".const" { V128_CONST } + | nxx as t { NUM_TYPE (num_type t) } + | vxxx as t { SIMD_TYPE (simd_type t) } | "mut" { MUT } | (nxx as t)".const" @@ -226,8 +226,14 @@ rule token = parse (fun s -> let n = F32.of_string s.it in f32_const (n @@ s.at), Values.F32 n) (fun s -> let n = F64.of_string s.it in - f64_const (n @@ s.at), Values.F64 n) - unimplemented_simd) + f64_const (n @@ s.at), Values.F64 n)) + } + | vxxx".const" + { let open Source in + SIMD_CONST + (fun shape ss at -> + let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in + (v128_const (v @@ at), Values.V128 v)) } | "ref.null" { REF_NULL } | "ref.func" { REF_FUNC } @@ -276,13 +282,11 @@ rule token = parse | (nxx as t)".load" { LOAD (fun a o -> numop t (i32_load (opt a 2)) (i64_load (opt a 3)) - (f32_load (opt a 2)) (f64_load (opt a 3)) - (v128_load (opt a 4)) o) } + (f32_load (opt a 2)) (f64_load (opt a 3)) o) } | (nxx as t)".store" { STORE (fun a o -> numop t (i32_store (opt a 2)) (i64_store (opt a 3)) - (f32_store (opt a 2)) (f64_store (opt a 3)) - (v128_store (opt a 4)) o) } + (f32_store (opt a 2)) (f64_store (opt a 3)) o) } | (ixx as t)".load"(mem_size as sz)"_"(sign as s) { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; LOAD (fun a o -> @@ -295,6 +299,10 @@ rule token = parse (ext s i64_load8_s i64_load8_u (opt a 0)) (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } + | "v128.load" + { LOAD (fun a o -> (v128_load (opt a 4)) o) } + | "v128.store" + { STORE (fun a o -> (v128_store (opt a 4)) o) } | "v128.load8x8_"(sign as s) { LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } | "v128.load16x4_"(sign as s) @@ -476,14 +484,16 @@ rule token = parse i64x2_splat f32x4_splat f64x2_splat) } | (simd_shape as s)".extract_lane" { except ["i8x16"; "i16x8"] s lexbuf; - EXTRACT_LANE (fun imm -> - simdop s unimplemented_simd unimplemented_simd i32x4_extract_lane - i64x2_extract_lane f32x4_extract_lane f64x2_extract_lane imm) } + EXTRACT_LANE (fun i -> + simdop s + (fun _ -> unreachable) (fun _ -> unreachable) + i32x4_extract_lane i64x2_extract_lane + f32x4_extract_lane f64x2_extract_lane i) } | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) - { EXTRACT_LANE (fun imm -> + { EXTRACT_LANE (fun i -> if t = "i8x16" - then ext s i8x16_extract_lane_s i8x16_extract_lane_u imm - else ext s i16x8_extract_lane_s i16x8_extract_lane_u imm )} + then ext s i8x16_extract_lane_s i8x16_extract_lane_u i + else ext s i16x8_extract_lane_s i16x8_extract_lane_u i )} | (simd_shape as s)".replace_lane" { REPLACE_LANE (simdop s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 98e37d04a9..07760ad303 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,39 +39,34 @@ let ati i = let num f s = try f s with Failure _ -> error s.at "constant out of range" -let simd_literal shape ss at = - try - let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in - (v128_const (v @@ at), Values.Num (Values.V128 v)) - with - (* TODO better location for error messages. *) - | Failure _ -> error at "constant out of range" - | Invalid_argument _ -> error at "wrong number of lane literals" +let simd f shape ss at = + try f shape ss at with + | Failure _ -> error at "constant out of range" + | Invalid_argument _ -> error at "wrong number of lane literals" let simd_lane_nan shape l at = - let open Simd in + let open Values in match shape with - | F32x4 -> NanPat (Values.F32 l @@ at) - | F64x2 -> NanPat (Values.F64 l @@ at) + | Simd.F32x4 -> NanPat (F32 l @@ at) + | Simd.F64x2 -> NanPat (F64 l @@ at) | _ -> error at "invalid simd constant" let simd_lane_lit shape l at = - let open Simd in let open Values in match shape with - | I8x16 -> LitPat (Num (I32 (I8.of_string l)) @@ at) - | I16x8 -> LitPat (Num (I32 (I16.of_string l)) @@ at) - | I32x4 -> LitPat (Num (I32 (I32.of_string l)) @@ at) - | I64x2 -> LitPat (Num (I64 (I64.of_string l)) @@ at) - | F32x4 -> LitPat (Num (F32 (F32.of_string l)) @@ at) - | F64x2 -> LitPat (Num (F64 (F64.of_string l)) @@ at) + | Simd.I8x16 -> NumPat (I32 (I8.of_string l) @@ at) + | Simd.I16x8 -> NumPat (I32 (I16.of_string l) @@ at) + | Simd.I32x4 -> NumPat (I32 (I32.of_string l) @@ at) + | Simd.I64x2 -> NumPat (I64 (I64.of_string l) @@ at) + | Simd.F32x4 -> NumPat (F32 (F32.of_string l) @@ at) + | Simd.F64x2 -> NumPat (F64 (F64.of_string l) @@ at) let simd_lane_index s at = match int_of_string s with | n when 0 <= n && n < 256 -> n | _ | exception Failure _ -> error at "malformed lane index" -let shuffle_literal ss at = +let shuffle_lit ss at = if not (List.length ss = 16) then error at "invalid lane length"; List.map (fun s -> simd_lane_index s.it s.at) ss @@ -82,7 +77,7 @@ let nanop f nan = match snd (f ("0" @@ no_region)) with | F32 _ -> F32 nan.it @@ nan.at | F64 _ -> F64 nan.it @@ nan.at - | I32 _ | I64 _ | V128 _ -> error nan.at "NaN pattern with non-float type" + | I32 _ | I64 _ -> error nan.at "NaN pattern with non-float type" let nat s at = try @@ -211,7 +206,7 @@ let inline_type_explicit (c : context) x ft at = %token LPAR RPAR %token NAT INT FLOAT STRING VAR -%token NUM_TYPE FUNCREF EXTERNREF EXTERN MUT +%token NUM_TYPE SIMD_TYPE FUNCREF EXTERNREF EXTERN MUT %token UNREACHABLE NOP DROP SELECT %token BLOCK END IF THEN ELSE LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN @@ -222,7 +217,7 @@ let inline_type_explicit (c : context) x ft at = %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT %token CONST UNARY BINARY TEST COMPARE CONVERT %token REF_NULL REF_FUNC REF_EXTERN REF_IS_NULL -%token V128_CONST SIMD_SHAPE SIMD_LOAD_LANE SIMD_STORE_LANE SHUFFLE +%token SIMD_CONST SIMD_SHAPE SIMD_LOAD_LANE SIMD_STORE_LANE SHUFFLE %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA DECLARE OFFSET ITEM IMPORT EXPORT %token MODULE BIN QUOTE @@ -239,7 +234,9 @@ let inline_type_explicit (c : context) x ft at = %token STRING %token VAR %token NUM_TYPE +%token SIMD_TYPE %token Ast.instr' * Values.num> CONST +%token string Source.phrase list -> Source.region -> Ast.instr' * Values.simd> SIMD_CONST %token UNARY %token BINARY %token TERNARY @@ -247,12 +244,12 @@ let inline_type_explicit (c : context) x ft at = %token COMPARE %token CONVERT %token Memory.offset -> Ast.instr'> LOAD +%token Memory.offset -> Ast.instr'> STORE %token Memory.offset -> int -> Ast.instr'> SIMD_LOAD_LANE %token Memory.offset -> int -> Ast.instr'> SIMD_STORE_LANE %token SPLAT %token Ast.instr'> EXTRACT_LANE %token Ast.instr'> REPLACE_LANE -%token Memory.offset -> Ast.instr'> STORE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT %token SIMD_SHAPE @@ -292,6 +289,7 @@ ref_type : value_type : | NUM_TYPE { NumType $1 } + | SIMD_TYPE { SimdType $1 } | ref_type { RefType $1 } value_type_list : @@ -441,7 +439,7 @@ plain_instr : | REF_IS_NULL { fun c -> ref_is_null } | REF_FUNC var { fun c -> ref_func ($2 c func) } | CONST num { fun c -> fst (num $1 $2) } - | V128_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd_literal $2 $3 at) } + | SIMD_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd $1 $2 $3 at) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } @@ -452,7 +450,7 @@ plain_instr : | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } | SHIFT { fun c -> $1 } - | SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) } + | SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_lit $2 at) } select_instr : @@ -1068,7 +1066,7 @@ script_module : { $3, Quoted ("quote:" ^ string_of_pos (at()).left, $5) @@ at() } action : - | LPAR INVOKE module_var_opt name const_list RPAR + | LPAR INVOKE module_var_opt name literal_list RPAR { Invoke ($3, $4, $5) @@ at () } | LPAR GET module_var_opt name RPAR { Get ($3, $4) @@ at() } @@ -1103,37 +1101,43 @@ meta : | LPAR OUTPUT script_var_opt STRING RPAR { Output ($3, Some $4) @@ at () } | LPAR OUTPUT script_var_opt RPAR { Output ($3, None) @@ at () } -const : - | LPAR CONST num RPAR { Values.Num (snd (num $2 $3)) @@ at () } - | LPAR REF_NULL ref_kind RPAR { Values.Ref (Values.NullRef $3) @@ at () } - | LPAR REF_EXTERN NAT RPAR { Values.Ref (ExternRef (nat32 $3 (ati 3))) @@ at () } +literal_num : + | LPAR CONST num RPAR { snd (num $2 $3) } -v128const: - | LPAR V128_CONST SIMD_SHAPE num_list RPAR { - snd (simd_literal $3 $4 (at ())) @@ ati 4 - } +literal_simd : + | LPAR SIMD_CONST SIMD_SHAPE num_list RPAR { snd (simd $2 $3 $4 (at ())) } + +literal_ref : + | LPAR REF_NULL ref_kind RPAR { Values.NullRef $3 } + | LPAR REF_EXTERN NAT RPAR { ExternRef (nat32 $3 (ati 3)) } + +literal : + | literal_num { Values.Num $1 @@ at () } + | literal_simd { Values.Simd $1 @@ at () } + | literal_ref { Values.Ref $1 @@ at () } -const_list : +literal_list : | /* empty */ { [] } - | const const_list { $1 :: $2 } - | v128const const_list { $1 :: $2 } + | literal literal_list { $1 :: $2 } numpat : - | num { fun s -> simd_lane_lit s $1.it $1.at } - | NAN { fun s -> simd_lane_nan s $1 (ati 3) } + | num { fun sh -> simd_lane_lit sh $1.it $1.at } + | NAN { fun sh -> simd_lane_nan sh $1 (ati 3) } numpat_list: | /* empty */ { [] } | numpat numpat_list { $1 :: $2 } result : - | const { NumResult (LitPat $1) @@ at () } + | literal_num { NumResult (NumPat ($1 @@ at())) @@ at () } | LPAR CONST NAN RPAR { NumResult (NanPat (nanop $2 ($3 @@ ati 3))) @@ at () } - | LPAR REF_FUNC RPAR { RefResult FuncRefType @@ at () } - | LPAR REF_EXTERN RPAR { RefResult ExternRefType @@ at () } - | LPAR V128_CONST SIMD_SHAPE numpat_list RPAR { - if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; - SimdResult ($3, List.map (fun lit -> lit $3) ($4)) @@ at () + | literal_ref { RefResult (RefPat ($1 @@ at ())) @@ at () } + | LPAR REF_FUNC RPAR { RefResult (RefTypePat FuncRefType) @@ at () } + | LPAR REF_EXTERN RPAR { RefResult (RefTypePat ExternRefType) @@ at () } + | LPAR SIMD_CONST SIMD_SHAPE numpat_list RPAR { + if Simd.lanes $3 <> List.length $4 then + error (at ()) "wrong number of lane literals"; + SimdResult (SimdPat ($3, List.map (fun lit -> lit $3) $4)) @@ at () } result_list : diff --git a/interpreter/util/lib.ml b/interpreter/util/lib.ml index f7f15996fc..76757eb720 100644 --- a/interpreter/util/lib.ml +++ b/interpreter/util/lib.ml @@ -1,4 +1,4 @@ -type void +type void = | module Fun = struct diff --git a/interpreter/util/lib.mli b/interpreter/util/lib.mli index f60e73f892..b66b8b0e82 100644 --- a/interpreter/util/lib.mli +++ b/interpreter/util/lib.mli @@ -1,6 +1,6 @@ (* Things that should be in the OCaml library... *) -type void +type void = | module Fun : sig diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 43961f052c..ce21dedfe7 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -111,10 +111,7 @@ let peek i (ell, ts) = (* Type Synthesis *) let type_num = Values.type_of_num -let type_unop = Values.type_of_num -let type_binop = Values.type_of_num -let type_testop = Values.type_of_num -let type_relop = Values.type_of_num +let type_simd = Values.type_of_simd let type_cvtop at = function | Values.I32 cvtop -> @@ -151,50 +148,55 @@ let type_cvtop at = function | PromoteF32 -> F32Type | DemoteF64 -> error at "invalid conversion" ), F64Type - | Values.V128 cvtop -> + +let type_simd_cvtop at = function + | Values.V128 (cvtop : V128Op.cvtop) -> let open V128Op in (match cvtop with - | I8x16 Splat | I16x8 Splat | I32x4 Splat -> I32Type - | I64x2 Splat -> I64Type - | F32x4 Splat -> F32Type - | F64x2 Splat -> F64Type - | V128 Splat -> error at "invalid conversion" + | Values.I8x16 Splat | Values.I16x8 Splat | Values.I32x4 Splat -> I32Type + | Values.I64x2 Splat -> I64Type + | Values.F32x4 Splat -> F32Type + | Values.F64x2 Splat -> F64Type + | Values.V128x1 _ -> . ), V128Type -let type_simd_lane = function - | V128Op.I8x16 _ -> I32Type - | V128Op.I16x8 _ -> I32Type - | V128Op.I32x4 _ -> I32Type - | V128Op.I64x2 _ -> I64Type - | V128Op.F32x4 _ -> F32Type - | V128Op.F64x2 _ -> F64Type - | V128Op.V128 _ -> V128Type +let type_simd_lane at = function + | Values.V128 op -> + match op with + | Values.I8x16 _ -> I32Type + | Values.I16x8 _ -> I32Type + | Values.I32x4 _ -> I32Type + | Values.I64x2 _ -> I64Type + | Values.F32x4 _ -> F32Type + | Values.F64x2 _ -> F64Type + | Values.V128x1 _ -> assert false + (* Expressions *) -let check_pack sz t at = - require (packed_size sz < size t) at "invalid sign extension" +let check_pack sz t_sz at = + require (packed_size sz < t_sz) at "invalid sign extension" let check_unop unop at = match unop with | Values.I32 (IntOp.ExtendS sz) | Values.I64 (IntOp.ExtendS sz) -> - check_pack sz (Values.type_of_num unop) at + check_pack sz (num_size (Values.type_of_num unop)) at | _ -> () -let check_binop binop at = +let check_simd_binop binop at = match binop with - | Values.V128 V128Op.(I8x16 (Shuffle imms)) -> - if List.exists ((<=) 32) imms then + | Values.(V128 (I8x16 (V128Op.Shuffle is))) -> + if List.exists ((<=) 32) is then error at "invalid lane index" | _ -> () -let check_memop (c : context) (memop : 'a memop) get_sz at = +let check_memop (c : context) (memop : ('t, 's) memop) ty_size get_sz at = let _mt = memory c (0l @@ at) in let size = match get_sz memop.sz with - | None -> size memop.ty + | None -> ty_size memop.ty | Some sz -> - check_pack sz memop.ty at; + check_pack sz (ty_size memop.ty) at; packed_size sz in require (1 lsl memop.align <= size) at @@ -202,20 +204,20 @@ let check_memop (c : context) (memop : 'a memop) get_sz at = let check_simd_lane_index get_lane op at = let max, op' = match op with - | V128Op.I8x16 op' -> 16, op' - | V128Op.I16x8 op' -> 8, op' - | V128Op.I32x4 op' -> 4, op' - | V128Op.I64x2 op' -> 2, op' - | V128Op.F32x4 op' -> 4, op' - | V128Op.F64x2 op' -> 2, op' - | V128Op.V128 op' -> assert false + | Values.(V128 (I8x16 op')) -> 16, op' + | Values.(V128 (I16x8 op')) -> 8, op' + | Values.(V128 (I32x4 op')) -> 4, op' + | Values.(V128 (I64x2 op')) -> 2, op' + | Values.(V128 (F32x4 op')) -> 4, op' + | Values.(V128 (F64x2 op')) -> 2, op' + | Values.(V128 (V128x1 op')) -> assert false in require (get_lane op' < max) at "invalid lane index" let check_simd_extract_lane_index op at = - check_simd_lane_index snd op at + check_simd_lane_index (fun (V128Op.Extract (i, _)) -> i) op at let check_simd_replace_lane_index op at = - check_simd_lane_index Fun.id op at + check_simd_lane_index (fun (V128Op.Replace i) -> i) op at (* * Conventions: @@ -368,32 +370,32 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type [] --> [] | Load memop -> - check_memop c memop (Lib.Option.map fst) e.at; + check_memop c memop num_size (Lib.Option.map fst) e.at; [NumType I32Type] --> [NumType memop.ty] - | SimdLoad memop -> - check_memop c memop (Lib.Option.map fst) e.at; - [NumType I32Type] --> [NumType memop.ty] - - | SimdLoadLane (memop, i) -> - check_memop c memop (fun o -> o) e.at; - let sz = Lib.Option.get memop.sz Pack8 in - require (i < 16 / packed_size sz) e.at "invalid lane index"; - [NumType I32Type; NumType V128Type] --> [NumType memop.ty] - | Store memop -> - check_memop c memop (fun sz -> sz) e.at; + check_memop c memop num_size (fun sz -> sz) e.at; [NumType I32Type; NumType memop.ty] --> [] + | SimdLoad memop -> + check_memop c memop simd_size (Lib.Option.map fst) e.at; + [NumType I32Type] --> [SimdType memop.ty] + | SimdStore memop -> - check_memop c memop (fun _ -> None) e.at; - [NumType I32Type; NumType memop.ty] --> [] + check_memop c memop simd_size (fun _ -> None) e.at; + [NumType I32Type; SimdType memop.ty] --> [] + + | SimdLoadLane (memop, i) -> + check_memop c memop simd_size (fun sz -> Some sz) e.at; + require (i < simd_size memop.ty / packed_size memop.sz) e.at + "invalid lane index"; + [NumType I32Type; SimdType memop.ty] --> [SimdType memop.ty] | SimdStoreLane (memop, i) -> - check_memop c memop (fun o -> o) e.at; - let sz = Lib.Option.get memop.sz Pack8 in - require (i < 16 / packed_size sz) e.at "invalid lane index"; - [NumType I32Type; NumType V128Type] --> [] + check_memop c memop simd_size (fun sz -> Some sz) e.at; + require (i < simd_size memop.ty / packed_size memop.sz) e.at + "invalid lane index"; + [NumType I32Type; SimdType memop.ty] --> [] | MemorySize -> let _mt = memory c (0l @@ e.at) in @@ -440,47 +442,70 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type [] --> [t] | Test testop -> - let t = NumType (type_testop testop) in + let t = NumType (type_num testop) in [t] --> [NumType I32Type] | Compare relop -> - let t = NumType (type_relop relop) in + let t = NumType (type_num relop) in [t; t] --> [NumType I32Type] | Unary unop -> check_unop unop e.at; - let t = NumType (type_unop unop) in + let t = NumType (type_num unop) in [t] --> [t] | Binary binop -> - check_binop binop e.at; - let t = NumType (type_binop binop) in + let t = NumType (type_num binop) in [t; t] --> [t] | Convert cvtop -> let t1, t2 = type_cvtop e.at cvtop in [NumType t1] --> [NumType t2] + | SimdConst v -> + let t = SimdType (type_simd v.it) in + [] --> [t] + + | SimdTest testop -> + let t = SimdType (type_simd testop) in + [t] --> [NumType I32Type] + + | SimdUnary unop -> + let t = SimdType (type_simd unop) in + [t] --> [t] + + | SimdBinary binop -> + check_simd_binop binop e.at; + let t = SimdType (type_simd binop) in + [t; t] --> [t] + | SimdTernary ternop -> - let t = NumType V128Type in + let t = SimdType (type_simd ternop) in [t; t; t] --> [t] - | SimdExtract (V128Op.V128 _) -> assert false + | SimdShift shiftop -> + let t = SimdType (type_simd shiftop) in + [t; NumType I32Type] --> [SimdType V128Type] + + | SimdBitmask bitmaskop -> + let t = SimdType (type_simd bitmaskop) in + [t] --> [NumType I32Type] + + | SimdConvert cvtop -> + let t1, t2 = type_simd_cvtop e.at cvtop in + [NumType t1] --> [SimdType t2] + | SimdExtract extractop -> check_simd_extract_lane_index extractop e.at; - let t = type_simd_lane extractop in - [NumType V128Type] --> [NumType t] + let t = SimdType (type_simd extractop) in + let t2 = type_simd_lane e.at extractop in + [t] --> [NumType t2] | SimdReplace replaceop -> check_simd_replace_lane_index replaceop e.at; - let t = type_simd_lane replaceop in - [NumType V128Type; NumType t] --> [NumType V128Type] - - | SimdShift _ -> - [NumType V128Type; NumType I32Type] --> [NumType V128Type] - - | SimdBitmask _ -> - [NumType V128Type] --> [NumType I32Type] + let t = SimdType (type_simd replaceop) in + let t2 = type_simd_lane e.at replaceop in + [t; NumType t2] --> [t] and check_seq (c : context) (s : infer_result_type) (es : instr list) : infer_result_type = @@ -517,12 +542,16 @@ let check_limits {min; max} range at msg = let check_num_type (t : num_type) at = () +let check_simd_type (t : simd_type) at = + () + let check_ref_type (t : ref_type) at = () let check_value_type (t : value_type) at = match t with | NumType t' -> check_num_type t' at + | SimdType t' -> check_simd_type t' at | RefType t' -> check_ref_type t' at let check_func_type (ft : func_type) at = @@ -574,7 +603,8 @@ let is_const (c : context) (e : instr) = match e.it with | RefNull _ | RefFunc _ - | Const _ -> true + | Const _ + | SimdConst _ -> true | GlobalGet x -> let GlobalType (_, mut) = global c x in mut = Immutable | _ -> false diff --git a/test/core/simd/simd_store8_lane.wast b/test/core/simd/simd_store8_lane.wast index 7258a40dd2..b4e4a583f1 100644 --- a/test/core/simd/simd_store8_lane.wast +++ b/test/core/simd/simd_store8_lane.wast @@ -424,4 +424,4 @@ (module (memory 1) (func (param $x v128) (result v128) (v128.store8_lane align=2 0 (i32.const 0) (local.get $x)))) - "alignment must not be larger than natural") \ No newline at end of file + "alignment must not be larger than natural") From ca8ea9abb52a10871d29d24f5468eaaa358ebab7 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Sat, 31 Jul 2021 19:09:09 +0200 Subject: [PATCH 352/378] Refactor simd pack --- interpreter/binary/encode.ml | 102 ++++++++++++++++---------------- interpreter/exec/eval.ml | 38 ++++++------ interpreter/runtime/memory.ml | 40 ++++++------- interpreter/runtime/memory.mli | 2 +- interpreter/syntax/ast.ml | 4 +- interpreter/syntax/operators.ml | 90 ++++++++++++++-------------- interpreter/syntax/types.ml | 14 +++-- interpreter/text/arrange.ml | 42 ++++++------- interpreter/valid/valid.ml | 6 +- 9 files changed, 166 insertions(+), 172 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 9756647f8c..808e193bbb 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -187,96 +187,96 @@ struct | TableInit (x, y) -> op 0xfc; vu32 0x0cl; var y; var x | ElemDrop x -> op 0xfc; vu32 0x0dl; var x - | Load ({ty = I32Type; sz = None; _} as mo) -> op 0x28; memop mo - | Load ({ty = I64Type; sz = None; _} as mo) -> op 0x29; memop mo - | Load ({ty = F32Type; sz = None; _} as mo) -> op 0x2a; memop mo - | Load ({ty = F64Type; sz = None; _} as mo) -> op 0x2b; memop mo - | Load ({ty = I32Type; sz = Some (Pack8, SX); _} as mo) -> + | Load ({ty = I32Type; pack = None; _} as mo) -> op 0x28; memop mo + | Load ({ty = I64Type; pack = None; _} as mo) -> op 0x29; memop mo + | Load ({ty = F32Type; pack = None; _} as mo) -> op 0x2a; memop mo + | Load ({ty = F64Type; pack = None; _} as mo) -> op 0x2b; memop mo + | Load ({ty = I32Type; pack = Some (Pack8, SX); _} as mo) -> op 0x2c; memop mo - | Load ({ty = I32Type; sz = Some (Pack8, ZX); _} as mo) -> + | Load ({ty = I32Type; pack = Some (Pack8, ZX); _} as mo) -> op 0x2d; memop mo - | Load ({ty = I32Type; sz = Some (Pack16, SX); _} as mo) -> + | Load ({ty = I32Type; pack = Some (Pack16, SX); _} as mo) -> op 0x2e; memop mo - | Load ({ty = I32Type; sz = Some (Pack16, ZX); _} as mo) -> + | Load ({ty = I32Type; pack = Some (Pack16, ZX); _} as mo) -> op 0x2f; memop mo - | Load {ty = I32Type; sz = Some (Pack32, _); _} -> + | Load {ty = I32Type; pack = Some (Pack32, _); _} -> assert false - | Load ({ty = I64Type; sz = Some (Pack8, SX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack8, SX); _} as mo) -> op 0x30; memop mo - | Load ({ty = I64Type; sz = Some (Pack8, ZX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack8, ZX); _} as mo) -> op 0x31; memop mo - | Load ({ty = I64Type; sz = Some (Pack16, SX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack16, SX); _} as mo) -> op 0x32; memop mo - | Load ({ty = I64Type; sz = Some (Pack16, ZX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack16, ZX); _} as mo) -> op 0x33; memop mo - | Load ({ty = I64Type; sz = Some (Pack32, SX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack32, SX); _} as mo) -> op 0x34; memop mo - | Load ({ty = I64Type; sz = Some (Pack32, ZX); _} as mo) -> + | Load ({ty = I64Type; pack = Some (Pack32, ZX); _} as mo) -> op 0x35; memop mo - | Load {ty = F32Type | F64Type; sz = Some _; _} -> + | Load {ty = F32Type | F64Type; pack = Some _; _} -> assert false - | Load {ty = I32Type | I64Type; sz = Some (Pack64, _); _} -> + | Load {ty = I32Type | I64Type; pack = Some (Pack64, _); _} -> assert false - | Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo - | Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo - | Store ({ty = F32Type; sz = None; _} as mo) -> op 0x38; memop mo - | Store ({ty = F64Type; sz = None; _} as mo) -> op 0x39; memop mo - | Store ({ty = I32Type; sz = Some Pack8; _} as mo) -> op 0x3a; memop mo - | Store ({ty = I32Type; sz = Some Pack16; _} as mo) -> op 0x3b; memop mo - | Store {ty = I32Type; sz = Some Pack32; _} -> assert false - | Store ({ty = I64Type; sz = Some Pack8; _} as mo) -> op 0x3c; memop mo - | Store ({ty = I64Type; sz = Some Pack16; _} as mo) -> op 0x3d; memop mo - | Store ({ty = I64Type; sz = Some Pack32; _} as mo) -> op 0x3e; memop mo - | Store {ty = F32Type | F64Type; sz = Some _; _} -> assert false - | Store {ty = (I32Type | I64Type); sz = Some Pack64; _} -> assert false - - | SimdLoad ({ty = V128Type; sz = None; _} as mo) -> + | Store ({ty = I32Type; pack = None; _} as mo) -> op 0x36; memop mo + | Store ({ty = I64Type; pack = None; _} as mo) -> op 0x37; memop mo + | Store ({ty = F32Type; pack = None; _} as mo) -> op 0x38; memop mo + | Store ({ty = F64Type; pack = None; _} as mo) -> op 0x39; memop mo + | Store ({ty = I32Type; pack = Some Pack8; _} as mo) -> op 0x3a; memop mo + | Store ({ty = I32Type; pack = Some Pack16; _} as mo) -> op 0x3b; memop mo + | Store {ty = I32Type; pack = Some Pack32; _} -> assert false + | Store ({ty = I64Type; pack = Some Pack8; _} as mo) -> op 0x3c; memop mo + | Store ({ty = I64Type; pack = Some Pack16; _} as mo) -> op 0x3d; memop mo + | Store ({ty = I64Type; pack = Some Pack32; _} as mo) -> op 0x3e; memop mo + | Store {ty = F32Type | F64Type; pack = Some _; _} -> assert false + | Store {ty = (I32Type | I64Type); pack = Some Pack64; _} -> assert false + + | SimdLoad ({ty = V128Type; pack = None; _} as mo) -> simd_op 0x00l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack8x8 SX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack8x8, SX)); _} as mo) -> simd_op 0x01l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack8x8 ZX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack8x8, ZX)); _} as mo) -> simd_op 0x02l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack16x4 SX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack16x4, SX)); _} as mo) -> simd_op 0x03l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack16x4 ZX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack16x4, ZX)); _} as mo) -> simd_op 0x04l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack32x2 SX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack32x2, SX)); _} as mo) -> simd_op 0x05l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, Pack32x2 ZX); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack32x2, ZX)); _} as mo) -> simd_op 0x06l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack8, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack8, ExtSplat); _} as mo) -> simd_op 0x07l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack16, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack16, ExtSplat); _} as mo) -> simd_op 0x08l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack32, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack32, ExtSplat); _} as mo) -> simd_op 0x09l; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, PackSplat); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtSplat); _} as mo) -> simd_op 0x0al; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack32, PackZero); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack32, ExtZero); _} as mo) -> simd_op 0x5cl; memop mo - | SimdLoad ({ty = V128Type; sz = Some (Pack64, PackZero); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtZero); _} as mo) -> simd_op 0x5dl; memop mo | SimdLoad _ -> assert false - | SimdLoadLane ({ty = V128Type; sz = Pack8; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> simd_op 0x54l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Pack16; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> simd_op 0x55l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Pack32; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> simd_op 0x56l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; sz = Pack64; _} as mo, i) -> + | SimdLoadLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> simd_op 0x57l; memop mo; u8 i; | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo - | SimdStoreLane ({ty = V128Type; sz = Pack8; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> simd_op 0x58l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Pack16; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> simd_op 0x59l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Pack32; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> simd_op 0x5al; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; sz = Pack64; _} as mo, i) -> + | SimdStoreLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> simd_op 0x5bl; memop mo; u8 i; | MemorySize -> op 0x3f; u8 0x00 diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 03af81af63..23f87a7212 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -318,41 +318,41 @@ let rec step (c : config) : config = seg := []; vs, [] - | Load {offset; ty; sz; _}, Num (I32 i) :: vs' -> + | Load {offset; ty; pack; _}, Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let a = I64_convert.extend_i32_u i in (try let n = - match sz with + match pack with | None -> Memory.load_num mem a offset ty | Some (sz, ext) -> Memory.load_num_packed sz ext mem a offset ty in Num n :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | Store {offset; sz; _}, Num n :: Num (I32 i) :: vs' -> + | Store {offset; pack; _}, Num n :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let a = I64_convert.extend_i32_u i in (try - (match sz with + (match pack with | None -> Memory.store_num mem a offset n | Some sz -> Memory.store_num_packed sz mem a offset n ); vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdLoad {offset; ty; sz; _}, Num (I32 i) :: vs' -> + | SimdLoad {offset; ty; pack; _}, Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = - match sz with + match pack with | None -> Memory.load_simd mem addr offset ty - | Some (pack_size, simd_load) -> - Memory.load_simd_packed pack_size simd_load mem addr offset ty + | Some (sz, ext) -> + Memory.load_simd_packed sz ext mem addr offset ty in Simd v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdStore {offset; sz; _}, Simd v :: Num (I32 i) :: vs' -> + | SimdStore {offset; _}, Simd v :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try @@ -360,12 +360,12 @@ let rec step (c : config) : config = vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdLoadLane ({offset; ty; sz; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> + | SimdLoadLane ({offset; ty; pack; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = - match sz with + match pack with | Pack8 -> V128.I8x16.replace_lane j v (I32Num.of_num 0 (Memory.load_num_packed Pack8 SX mem addr offset I32Type)) @@ -381,11 +381,11 @@ let rec step (c : config) : config = in Simd (V128 v) :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdStoreLane ({offset; ty; sz; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> + | SimdStoreLane ({offset; ty; pack; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try - (match sz with + (match pack with | Pack8 -> Memory.store_num_packed Pack8 mem addr offset (I32 (V128.I8x16.extract_lane_s j v)) | Pack16 -> @@ -420,7 +420,7 @@ let rec step (c : config) : config = Plain (Const (I32 i @@ e.at)); Plain (Const (k @@ e.at)); Plain (Store - {ty = I32Type; align = 0; offset = 0l; sz = Some Pack8}); + {ty = I32Type; align = 0; offset = 0l; pack = Some Pack8}); Plain (Const (I32 (I32.add i 1l) @@ e.at)); Plain (Const (k @@ e.at)); Plain (Const (I32 (I32.sub n 1l) @@ e.at)); @@ -437,9 +437,9 @@ let rec step (c : config) : config = Plain (Const (I32 d @@ e.at)); Plain (Const (I32 s @@ e.at)); Plain (Load - {ty = I32Type; align = 0; offset = 0l; sz = Some (Pack8, ZX)}); + {ty = I32Type; align = 0; offset = 0l; pack = Some (Pack8, ZX)}); Plain (Store - {ty = I32Type; align = 0; offset = 0l; sz = Some Pack8}); + {ty = I32Type; align = 0; offset = 0l; pack = Some Pack8}); Plain (Const (I32 (I32.add d 1l) @@ e.at)); Plain (Const (I32 (I32.add s 1l) @@ e.at)); Plain (Const (I32 (I32.sub n 1l) @@ e.at)); @@ -454,9 +454,9 @@ let rec step (c : config) : config = Plain (Const (I32 d @@ e.at)); Plain (Const (I32 s @@ e.at)); Plain (Load - {ty = I32Type; align = 0; offset = 0l; sz = Some (Pack8, ZX)}); + {ty = I32Type; align = 0; offset = 0l; pack = Some (Pack8, ZX)}); Plain (Store - {ty = I32Type; align = 0; offset = 0l; sz = Some Pack8}); + {ty = I32Type; align = 0; offset = 0l; pack = Some Pack8}); ] | MemoryInit x, Num (I32 n) :: Num (I32 s) :: Num (I32 d) :: vs' -> @@ -471,7 +471,7 @@ let rec step (c : config) : config = Plain (Const (I32 d @@ e.at)); Plain (Const (I32 b @@ e.at)); Plain (Store - {ty = I32Type; align = 0; offset = 0l; sz = Some Pack8}); + {ty = I32Type; align = 0; offset = 0l; pack = Some Pack8}); Plain (Const (I32 (I32.add d 1l) @@ e.at)); Plain (Const (I32 (I32.add s 1l) @@ e.at)); Plain (Const (I32 (I32.sub n 1l) @@ e.at)); diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index d8c4d861a7..cdb5682f54 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -123,7 +123,7 @@ let extend x n = function | SX -> let sh = 64 - 8 * n in Int64.(shift_right (shift_left x sh) sh) let load_num_packed sz ext mem a o t = - assert (packed_size sz <= Types.num_size t); + assert (packed_size sz <= num_size t); let w = packed_size sz in let x = extend (loadn mem a o w) w ext in match t with @@ -132,7 +132,7 @@ let load_num_packed sz ext mem a o t = | _ -> raise Type let store_num_packed sz mem a o n = - assert (packed_size sz <= Types.num_size (Values.type_of_num n)); + assert (packed_size sz <= num_size (Values.type_of_num n)); let w = packed_size sz in let x = match n with @@ -150,26 +150,26 @@ let store_simd mem a o n = match n with | V128 x -> store_bytes mem (effective_address a o) (V128.to_bits x) -let load_simd_packed sz simd_load mem a o t = - let n = packed_size sz in - assert (n < Types.simd_size t); - let x = loadn mem a o n in +let load_simd_packed sz ext mem a o t = + assert (packed_size sz < simd_size t); + let x = loadn mem a o (packed_size sz) in let b = Bytes.make 16 '\x00' in Bytes.set_int64_le b 0 x; let v = V128.of_bits (Bytes.to_string b) in let r = - match sz, simd_load with - | Pack64, Pack8x8 SX -> V128.I16x8_convert.extend_low_s v - | Pack64, Pack8x8 ZX -> V128.I16x8_convert.extend_low_u v - | Pack64, Pack16x4 SX -> V128.I32x4_convert.extend_low_s v - | Pack64, Pack16x4 ZX -> V128.I32x4_convert.extend_low_u v - | Pack64, Pack32x2 SX -> V128.I64x2_convert.extend_low_s v - | Pack64, Pack32x2 ZX -> V128.I64x2_convert.extend_low_u v - | Pack8, PackSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) - | Pack16, PackSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) - | Pack32, PackSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) - | Pack64, PackSplat -> V128.I64x2.splat x - | Pack32, PackZero -> v - | Pack64, PackZero -> v - | _ -> assert false + match sz, ext with + | Pack64, ExtShape (Pack8x8, SX) -> V128.I16x8_convert.extend_low_s v + | Pack64, ExtShape (Pack8x8, ZX) -> V128.I16x8_convert.extend_low_u v + | Pack64, ExtShape (Pack16x4, SX) -> V128.I32x4_convert.extend_low_s v + | Pack64, ExtShape (Pack16x4, ZX) -> V128.I32x4_convert.extend_low_u v + | Pack64, ExtShape (Pack32x2, SX) -> V128.I64x2_convert.extend_low_s v + | Pack64, ExtShape (Pack32x2, ZX) -> V128.I64x2_convert.extend_low_u v + | _, ExtShape _ -> assert false + | Pack8, ExtSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) + | Pack16, ExtSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) + | Pack32, ExtSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) + | Pack64, ExtSplat -> V128.I64x2.splat x + | Pack32, ExtZero -> v + | Pack64, ExtZero -> v + | _, ExtZero -> assert false in V128 r diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index a97781b7a0..a7f9ef0997 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -46,5 +46,5 @@ val store_simd : memory -> address -> offset -> simd -> unit (* raises Type, Bounds *) val load_simd_packed : - pack_size -> pack_simd -> memory -> address -> offset -> simd_type -> simd + pack_size -> simd_extension -> memory -> address -> offset -> simd_type -> simd (* raises Type, Bounds *) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 6a629cb40a..f199ad5f23 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -110,11 +110,11 @@ type simd_cvtop = (V128Op.cvtop) Values.simdop type simd_extractop = (V128Op.extractop) Values.simdop type simd_replaceop = (V128Op.replaceop) Values.simdop -type ('t, 's) memop = {ty : 't; align : int; offset : int32; sz : 's} +type ('t, 'p) memop = {ty : 't; align : int; offset : int32; pack : 'p} type loadop = (num_type, (pack_size * extension) option) memop type storeop = (num_type, pack_size option) memop -type simd_loadop = (simd_type, (pack_size * pack_simd) option) memop +type simd_loadop = (simd_type, (pack_size * simd_extension) option) memop type simd_storeop = (simd_type, unit) memop type simd_laneop = (simd_type, pack_size) memop * int diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index ade270a68e..3e2d829cb6 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -42,45 +42,45 @@ let table_copy x y = TableCopy (x, y) let table_init x y = TableInit (x, y) let elem_drop x = ElemDrop x -let i32_load align offset = Load {ty = I32Type; align; offset; sz = None} -let i64_load align offset = Load {ty = I64Type; align; offset; sz = None} -let f32_load align offset = Load {ty = F32Type; align; offset; sz = None} -let f64_load align offset = Load {ty = F64Type; align; offset; sz = None} +let i32_load align offset = Load {ty = I32Type; align; offset; pack = None} +let i64_load align offset = Load {ty = I64Type; align; offset; pack = None} +let f32_load align offset = Load {ty = F32Type; align; offset; pack = None} +let f64_load align offset = Load {ty = F64Type; align; offset; pack = None} let i32_load8_s align offset = - Load {ty = I32Type; align; offset; sz = Some (Pack8, SX)} + Load {ty = I32Type; align; offset; pack = Some (Pack8, SX)} let i32_load8_u align offset = - Load {ty = I32Type; align; offset; sz = Some (Pack8, ZX)} + Load {ty = I32Type; align; offset; pack = Some (Pack8, ZX)} let i32_load16_s align offset = - Load {ty = I32Type; align; offset; sz = Some (Pack16, SX)} + Load {ty = I32Type; align; offset; pack = Some (Pack16, SX)} let i32_load16_u align offset = - Load {ty = I32Type; align; offset; sz = Some (Pack16, ZX)} + Load {ty = I32Type; align; offset; pack = Some (Pack16, ZX)} let i64_load8_s align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack8, SX)} + Load {ty = I64Type; align; offset; pack = Some (Pack8, SX)} let i64_load8_u align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack8, ZX)} + Load {ty = I64Type; align; offset; pack = Some (Pack8, ZX)} let i64_load16_s align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack16, SX)} + Load {ty = I64Type; align; offset; pack = Some (Pack16, SX)} let i64_load16_u align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack16, ZX)} + Load {ty = I64Type; align; offset; pack = Some (Pack16, ZX)} let i64_load32_s align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack32, SX)} + Load {ty = I64Type; align; offset; pack = Some (Pack32, SX)} let i64_load32_u align offset = - Load {ty = I64Type; align; offset; sz = Some (Pack32, ZX)} + Load {ty = I64Type; align; offset; pack = Some (Pack32, ZX)} -let i32_store align offset = Store {ty = I32Type; align; offset; sz = None} -let i64_store align offset = Store {ty = I64Type; align; offset; sz = None} -let f32_store align offset = Store {ty = F32Type; align; offset; sz = None} -let f64_store align offset = Store {ty = F64Type; align; offset; sz = None} +let i32_store align offset = Store {ty = I32Type; align; offset; pack = None} +let i64_store align offset = Store {ty = I64Type; align; offset; pack = None} +let f32_store align offset = Store {ty = F32Type; align; offset; pack = None} +let f64_store align offset = Store {ty = F64Type; align; offset; pack = None} let i32_store8 align offset = - Store {ty = I32Type; align; offset; sz = Some Pack8} + Store {ty = I32Type; align; offset; pack = Some Pack8} let i32_store16 align offset = - Store {ty = I32Type; align; offset; sz = Some Pack16} + Store {ty = I32Type; align; offset; pack = Some Pack16} let i64_store8 align offset = - Store {ty = I64Type; align; offset; sz = Some Pack8} + Store {ty = I64Type; align; offset; pack = Some Pack8} let i64_store16 align offset = - Store {ty = I64Type; align; offset; sz = Some Pack16} + Store {ty = I64Type; align; offset; pack = Some Pack16} let i64_store32 align offset = - Store {ty = I64Type; align; offset; sz = Some Pack32} + Store {ty = I64Type; align; offset; pack = Some Pack32} let memory_size = MemorySize let memory_grow = MemoryGrow @@ -233,51 +233,51 @@ let i64_reinterpret_f64 = Convert (I64 I64Op.ReinterpretFloat) let f32_reinterpret_i32 = Convert (F32 F32Op.ReinterpretInt) let f64_reinterpret_i64 = Convert (F64 F64Op.ReinterpretInt) -let v128_load align offset = SimdLoad {ty = V128Type; align; offset; sz = None} +let v128_load align offset = SimdLoad {ty = V128Type; align; offset; pack = None} let v128_load8x8_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 SX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack8x8, SX))} let v128_load8x8_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack8x8 ZX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack8x8, ZX))} let v128_load16x4_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 SX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack16x4, SX))} let v128_load16x4_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack16x4 ZX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack16x4, ZX))} let v128_load32x2_s align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 SX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack32x2, SX))} let v128_load32x2_u align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, Pack32x2 ZX)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack32x2, ZX))} let v128_load8_splat align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack8, PackSplat)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack8, ExtSplat)} let v128_load16_splat align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack16, PackSplat)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack16, ExtSplat)} let v128_load32_splat align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack32, PackSplat)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtSplat)} let v128_load64_splat align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, PackSplat)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtSplat)} let v128_load32_zero align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack32, PackZero)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtZero)} let v128_load64_zero align offset = - SimdLoad {ty = V128Type; align; offset; sz = Some (Pack64, PackZero)} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtZero)} -let v128_store align offset = SimdStore {ty = V128Type; align; offset; sz = ()} +let v128_store align offset = SimdStore {ty = V128Type; align; offset; pack = ()} let v128_load8_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; sz = Pack8}, i) + SimdLoadLane ({ty = V128Type; align; offset; pack = Pack8}, i) let v128_load16_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; sz = Pack16}, i) + SimdLoadLane ({ty = V128Type; align; offset; pack = Pack16}, i) let v128_load32_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; sz = Pack32}, i) + SimdLoadLane ({ty = V128Type; align; offset; pack = Pack32}, i) let v128_load64_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; sz = Pack64}, i) + SimdLoadLane ({ty = V128Type; align; offset; pack = Pack64}, i) let v128_store8_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; sz = Pack8}, i) + SimdStoreLane ({ty = V128Type; align; offset; pack = Pack8}, i) let v128_store16_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; sz = Pack16}, i) + SimdStoreLane ({ty = V128Type; align; offset; pack = Pack16}, i) let v128_store32_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; sz = Pack32}, i) + SimdStoreLane ({ty = V128Type; align; offset; pack = Pack32}, i) let v128_store64_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; sz = Pack64}, i) + SimdStoreLane ({ty = V128Type; align; offset; pack = Pack64}, i) let v128_not = SimdUnary (V128 V128Op.(V128x1 Not)) let v128_and = SimdBinary (V128 V128Op.(V128x1 And)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 87571c1dad..c38eb1bf23 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -20,12 +20,11 @@ type extern_type = type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX -type pack_simd = - | PackSplat - | Pack8x8 of extension - | Pack16x4 of extension - | Pack32x2 of extension - | PackZero +type pack_shape = Pack8x8 | Pack16x4 | Pack32x2 +type simd_extension = + | ExtShape of pack_shape * extension + | ExtSplat + | ExtZero (* Attributes *) @@ -43,6 +42,9 @@ let packed_size = function | Pack32 -> 4 | Pack64 -> 8 +let packed_shape_size = function + | Pack8x8 | Pack16x4 | Pack32x2 -> 8 + let is_num_type = function | NumType _ -> true | _ -> false diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 94ccf8d8e0..63ca2a757c 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -85,6 +85,16 @@ let extension = function | SX -> "_s" | ZX -> "_u" +let pack_shape = function + | Pack8x8 -> "8x8" + | Pack16x4 -> "16x4" + | Pack32x2 -> "32x2" + +let simd_extension sz = function + | ExtShape (sh, ext) -> pack_shape sh ^ extension ext + | ExtSplat -> pack_size sz ^ "_splat" + | ExtZero -> pack_size sz ^ "_zero" + (* Operators *) @@ -453,46 +463,28 @@ let memop name typ {ty; align; offset; _} sz = (if 1 lsl align = sz then "" else " align=" ^ nat (1 lsl align)) let loadop op = - match op.sz with + match op.pack with | None -> memop "load" num_type op (num_size op.ty) | Some (sz, ext) -> memop ("load" ^ pack_size sz ^ extension ext) num_type op (packed_size sz) let storeop op = - match op.sz with + match op.pack with | None -> memop "store" num_type op (num_size op.ty) | Some sz -> memop ("store" ^ pack_size sz) num_type op (packed_size sz) let simd_loadop (op : simd_loadop) = - match op.sz with + match op.pack with | None -> memop "load" simd_type op (simd_size op.ty) - | Some (sz, pack_simd) -> - let suffix = - (match sz, pack_simd with - | Pack64, Pack8x8 ext -> "8x8" ^ extension ext - | Pack64, Pack16x4 ext -> "16x4" ^ extension ext - | Pack64, Pack32x2 ext -> "32x2" ^ extension ext - | Pack8, PackSplat -> "8_splat" - | Pack16, PackSplat -> "16_splat" - | Pack32, PackSplat -> "32_splat" - | Pack64, PackSplat -> "64_splat" - | Pack32, PackZero -> "32_zero" - | Pack64, PackZero -> "64_zero" - | _ -> assert false - ) in - memop ("load" ^ suffix) simd_type op (packed_size sz) + | Some (sz, ext) -> + memop ("load" ^ simd_extension sz ext) simd_type op (packed_size sz) let simd_storeop op = memop "store" simd_type op (simd_size op.ty) let simd_laneop instr (op, i) = - let suffix = - match op.sz with - | Pack8 -> "8_lane" - | Pack16 -> "16_lane" - | Pack32 -> "32_lane" - | Pack64 -> "64_lane" - in memop (instr ^ suffix) simd_type op (packed_size op.sz) ^ " " ^ nat i + memop (instr ^ pack_size op.pack ^ "_lane") simd_type op + (packed_size op.pack) ^ " " ^ nat i (* Expressions *) diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index ce21dedfe7..f9ab8fedcd 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -193,7 +193,7 @@ let check_simd_binop binop at = let check_memop (c : context) (memop : ('t, 's) memop) ty_size get_sz at = let _mt = memory c (0l @@ at) in let size = - match get_sz memop.sz with + match get_sz memop.pack with | None -> ty_size memop.ty | Some sz -> check_pack sz (ty_size memop.ty) at; @@ -387,13 +387,13 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | SimdLoadLane (memop, i) -> check_memop c memop simd_size (fun sz -> Some sz) e.at; - require (i < simd_size memop.ty / packed_size memop.sz) e.at + require (i < simd_size memop.ty / packed_size memop.pack) e.at "invalid lane index"; [NumType I32Type; SimdType memop.ty] --> [SimdType memop.ty] | SimdStoreLane (memop, i) -> check_memop c memop simd_size (fun sz -> Some sz) e.at; - require (i < simd_size memop.ty / packed_size memop.sz) e.at + require (i < simd_size memop.ty / packed_size memop.pack) e.at "invalid lane index"; [NumType I32Type; SimdType memop.ty] --> [] From 576bcab9c02d08265e4cdfe1e595ea2171b961f7 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Mon, 2 Aug 2021 10:16:11 +0200 Subject: [PATCH 353/378] Tweaks --- interpreter/README.md | 53 ++++-- interpreter/binary/encode.ml | 26 +-- interpreter/exec/eval_simd.ml | 16 +- interpreter/exec/simd.ml | 4 +- interpreter/exec/v128.ml | 5 - interpreter/runtime/memory.ml | 14 +- interpreter/script/js.ml | 2 +- interpreter/script/run.ml | 44 ++--- interpreter/syntax/operators.ml | 26 +-- interpreter/syntax/types.ml | 2 +- interpreter/syntax/values.ml | 2 +- interpreter/text/arrange.ml | 16 +- interpreter/text/lexer.mll | 316 +++++++++++++++++--------------- interpreter/text/parser.mly | 49 +++-- interpreter/valid/valid.ml | 24 +-- 15 files changed, 326 insertions(+), 273 deletions(-) diff --git a/interpreter/README.md b/interpreter/README.md index 36a5713204..8e4ec1de14 100644 --- a/interpreter/README.md +++ b/interpreter/README.md @@ -175,26 +175,35 @@ float: .?(e|E )? | 0x.?(p|P )? name: $( | | _ | . | + | - | * | / | \ | ^ | ~ | = | < | > | ! | ? | @ | # | $ | % | & | | | : | ' | `)+ string: "( | \n | \t | \\ | \' | \" | \ | \u{+})*" +num_type: i32 | i64 | f32 | f64 +simd_type: v128 +simd_shape: i8x16 | i16x8 | i32x4 | i64x2 | f32x4 | f64x2 | v128 +ref_kind: func | extern +ref_type: funcref | externref +val_type: | | +block_type : ( result * )* +func_type: ( type )? * * +global_type: | ( mut ) +table_type: ? +memory_type: ? + num: | var: | unop: ctz | clz | popcnt | ... binop: add | sub | mul | ... +testop: eqz relop: eq | ne | lt | ... sign: s | u offset: offset= align: align=(1|2|4|8|...) cvtop: trunc | extend | wrap | ... -num_type: i32 | i64 | f32 | f64 -ref_kind: func | extern -ref_type: funcref | externref -val_type: num_type | ref_type -block_type : ( result * )* -func_type: ( type )? * * -global_type: | ( mut ) -table_type: ? -memory_type: ? +simdunop: abs | neg | ... +simdbinop: add | sub | min_ | ... +simdternop: bitselect +simdtestop: all_true | any_true +simdshiftop: shl | shr_ expr: ( ) @@ -238,6 +247,10 @@ op: elem.drop .load((8|16|32)_)? ? ? .store(8|16|32)? ? ? + .load((8x8|16x4|32x2)_)? ? ? + .store ? ? + .load(8|16|32|64)_(lane|splat|zero) ? ? + .store(8|16|32|64)_lane ? ? memory.size memory.grow memory.fill @@ -254,12 +267,15 @@ op: . ._(_)? .const + - . - . - . - . - ._(_)? -TODO + . + . + . + . + . + .bitmask + .splat + .extract_lane(_)? + .replace_lane func: ( func ? * * ) ( func ? ( export ) <...> ) ;; = (export (func )) (func ? <...>) @@ -359,8 +375,9 @@ action: const: ( .const ) ;; number value + ( + ) ;; simd value ( ref.null ) ;; null reference - ( ref.host ) ;; host reference + ( ref.extern ) ;; host reference assertion: ( assert_return * ) ;; assert action has expected results @@ -372,12 +389,14 @@ assertion: ( assert_trap ) ;; assert module traps on instantiation result: + ( .const ) + ( .const + ) ( ref.extern ) ( ref.func ) num_pat: - ;; literal result + ;; literal result nan:canonical ;; NaN in canonical form nan:arithmetic ;; NaN with 1 in MSB of payload diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 808e193bbb..cfaae41b61 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -233,17 +233,17 @@ struct | SimdLoad ({ty = V128Type; pack = None; _} as mo) -> simd_op 0x00l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack8x8, SX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, SX)); _} as mo) -> simd_op 0x01l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack8x8, ZX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, ZX)); _} as mo) -> simd_op 0x02l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack16x4, SX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, SX)); _} as mo) -> simd_op 0x03l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack16x4, ZX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, ZX)); _} as mo) -> simd_op 0x04l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack32x2, SX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, SX)); _} as mo) -> simd_op 0x05l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtShape (Pack32x2, ZX)); _} as mo) -> + | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, ZX)); _} as mo) -> simd_op 0x06l; memop mo | SimdLoad ({ty = V128Type; pack = Some (Pack8, ExtSplat); _} as mo) -> simd_op 0x07l; memop mo @@ -460,14 +460,14 @@ struct | SimdConst {it = V128 c; _} -> simd_op 0x0cl; v128 c - | SimdTest (V128 V128Op.(V128x1 AnyTrue)) -> simd_op 0x53l + | SimdTest (V128 V128Op.(V1x128 AnyTrue)) -> simd_op 0x53l | SimdTest (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l | SimdTest (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l | SimdTest (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l | SimdTest (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l | SimdTest (V128 _) -> . - | SimdUnary (V128 V128Op.(V128x1 Not)) -> simd_op 0x4dl + | SimdUnary (V128 V128Op.(V1x128 Not)) -> simd_op 0x4dl | SimdUnary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l | SimdUnary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l | SimdUnary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l @@ -636,13 +636,13 @@ struct | SimdBinary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l | SimdBinary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l | SimdBinary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l - | SimdBinary (V128 V128Op.(V128x1 And)) -> simd_op 0x4el - | SimdBinary (V128 V128Op.(V128x1 AndNot)) -> simd_op 0x4fl - | SimdBinary (V128 V128Op.(V128x1 Or)) -> simd_op 0x50l - | SimdBinary (V128 V128Op.(V128x1 Xor)) -> simd_op 0x51l + | SimdBinary (V128 V128Op.(V1x128 And)) -> simd_op 0x4el + | SimdBinary (V128 V128Op.(V1x128 AndNot)) -> simd_op 0x4fl + | SimdBinary (V128 V128Op.(V1x128 Or)) -> simd_op 0x50l + | SimdBinary (V128 V128Op.(V1x128 Xor)) -> simd_op 0x51l | SimdBinary (V128 _) -> assert false - | SimdTernary (V128 V128Op.(V128x1 Bitselect)) -> simd_op 0x52l + | SimdTernary (V128 V128Op.(V1x128 Bitselect)) -> simd_op 0x52l | SimdTernary (V128 _) -> . | SimdShift (V128 V128Op.(I8x16 Shl)) -> simd_op 0x6bl diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 6f89ef59d8..23b8142816 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -56,7 +56,7 @@ module V128Op = struct | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 | F64x2 ConvertI32x4S -> V128.F64x2_convert.convert_i32x4_s | F64x2 ConvertI32x4U -> V128.F64x2_convert.convert_i32x4_u - | V128x1 Not -> V128.V128x1.lognot + | V1x128 Not -> V128.V1x128.lognot | _ -> assert false in fun v -> to_simd (f (of_simd 1 v)) @@ -179,16 +179,16 @@ module V128Op = struct | F64x2 Max -> V128.F64x2.max | F64x2 Pmin -> V128.F64x2.pmin | F64x2 Pmax -> V128.F64x2.pmax - | V128x1 And -> V128.V128x1.and_ - | V128x1 Or -> V128.V128x1.or_ - | V128x1 Xor -> V128.V128x1.xor - | V128x1 AndNot -> V128.V128x1.andnot + | V1x128 And -> V128.V1x128.and_ + | V1x128 Or -> V128.V1x128.or_ + | V1x128 Xor -> V128.V1x128.xor + | V1x128 AndNot -> V128.V1x128.andnot | _ -> assert false in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) let ternop op = let f = match op with - | V128x1 Bitselect -> V128.V128x1.bitselect + | V1x128 Bitselect -> V128.V1x128.bitselect | _ -> assert false in fun v1 v2 v3 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2) (of_simd 3 v3)) @@ -215,10 +215,10 @@ module V128Op = struct | I16x8 AllTrue -> V128.I16x8.all_true | I32x4 AllTrue -> V128.I32x4.all_true | I64x2 AllTrue -> V128.I64x2.all_true - | V128x1 AnyTrue -> V128.I8x16.any_true + | V1x128 AnyTrue -> V128.I8x16.any_true | _ -> . in fun v -> f (of_simd 1 v) - + let bitmaskop (op : bitmaskop) v = let f = match op with | I8x16 Bitmask -> V128.I8x16.bitmask diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 2836c58296..79147839e5 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -163,7 +163,7 @@ sig module I64x2 : Int with type t = t and type lane = I64.t module F32x4 : Float with type t = t and type lane = F32.t module F64x2 : Float with type t = t and type lane = F64.t - module V128x1 : Vec with type t = t + module V1x128 : Vec with type t = t module V8x16 : sig val swizzle : t -> t -> t val shuffle : t -> t -> int list -> t @@ -244,7 +244,7 @@ struct let of_i32x4 = Rep.of_i32x4 let of_i64x2 = Rep.of_i64x2 - module V128x1 : Vec with type t = Rep.t = struct + module V1x128 : Vec with type t = Rep.t = struct type t = Rep.t let to_shape = Rep.to_i64x2 let of_shape = Rep.of_i64x2 diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index d6739b6650..f91f08a3bb 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,8 +1,3 @@ -(* TODO -- inline Simd functor -- unify shape and packed num types for simd & memory -*) - include Simd.Make (struct include String diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index cdb5682f54..e71d491b74 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -158,13 +158,13 @@ let load_simd_packed sz ext mem a o t = let v = V128.of_bits (Bytes.to_string b) in let r = match sz, ext with - | Pack64, ExtShape (Pack8x8, SX) -> V128.I16x8_convert.extend_low_s v - | Pack64, ExtShape (Pack8x8, ZX) -> V128.I16x8_convert.extend_low_u v - | Pack64, ExtShape (Pack16x4, SX) -> V128.I32x4_convert.extend_low_s v - | Pack64, ExtShape (Pack16x4, ZX) -> V128.I32x4_convert.extend_low_u v - | Pack64, ExtShape (Pack32x2, SX) -> V128.I64x2_convert.extend_low_s v - | Pack64, ExtShape (Pack32x2, ZX) -> V128.I64x2_convert.extend_low_u v - | _, ExtShape _ -> assert false + | Pack64, ExtLane (Pack8x8, SX) -> V128.I16x8_convert.extend_low_s v + | Pack64, ExtLane (Pack8x8, ZX) -> V128.I16x8_convert.extend_low_u v + | Pack64, ExtLane (Pack16x4, SX) -> V128.I32x4_convert.extend_low_s v + | Pack64, ExtLane (Pack16x4, ZX) -> V128.I32x4_convert.extend_low_u v + | Pack64, ExtLane (Pack32x2, SX) -> V128.I64x2_convert.extend_low_s v + | Pack64, ExtLane (Pack32x2, ZX) -> V128.I64x2_convert.extend_low_u v + | _, ExtLane _ -> assert false | Pack8, ExtSplat -> V128.I8x16.splat (I8.of_int_s (Int64.to_int x)) | Pack16, ExtSplat -> V128.I16x8.splat (I16.of_int_s (Int64.to_int x)) | Pack32, ExtSplat -> V128.I32x4.splat (I32.of_int_s (Int64.to_int x)) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index eb6fe7dfef..4539f15de7 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -338,7 +338,7 @@ let assert_return ress ts at = V128.of_i64x2 (List.map (I64Num.of_num 0) canons) in [ SimdConst (V128 mask @@ at) @@ at; - SimdBinary (V128 V128Op.(V128x1 And)) @@ at; + SimdBinary (V128 V128Op.(V1x128 And)) @@ at; SimdConst (V128 expected @@ at) @@ at; SimdBinary (V128 V128Op.(I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index fcdd50c3f6..a8a20f1b46 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -368,23 +368,25 @@ let run_action act : Values.value list = ) -let assert_num_pat at n np = +let assert_nan_pat n nan = let open Values in + match n, nan.it with + | F32 z, F32 CanonicalNan -> z = F32.pos_nan || z = F32.neg_nan + | F64 z, F64 CanonicalNan -> z = F64.pos_nan || z = F64.neg_nan + | F32 z, F32 ArithmeticNan -> + let pos_nan = F32.to_bits F32.pos_nan in + Int32.logand (F32.to_bits z) pos_nan = pos_nan + | F64 z, F64 ArithmeticNan -> + let pos_nan = F64.to_bits F64.pos_nan in + Int64.logand (F64.to_bits z) pos_nan = pos_nan + | _, _ -> false + +let assert_num_pat n np = match np with | NumPat n' -> n = n'.it - | NanPat nanop -> - match n, nanop.it with - | F32 z, F32 CanonicalNan -> z = F32.pos_nan || z = F32.neg_nan - | F64 z, F64 CanonicalNan -> z = F64.pos_nan || z = F64.neg_nan - | F32 z, F32 ArithmeticNan -> - let pos_nan = F32.to_bits F32.pos_nan in - Int32.logand (F32.to_bits z) pos_nan = pos_nan - | F64 z, F64 ArithmeticNan -> - let pos_nan = F64.to_bits F64.pos_nan in - Int64.logand (F64.to_bits z) pos_nan = pos_nan - | _, _ -> false - -let assert_simd_pat at v p = + | NanPat nanop -> assert_nan_pat n nanop + +let assert_simd_pat v p = let open Values in match v, p with | V128 v, SimdPat (shape, ps) -> @@ -396,27 +398,27 @@ let assert_simd_pat at v p = | Simd.F32x4 -> fun v i -> F32 (V128.F32x4.extract_lane i v) | Simd.F64x2 -> fun v i -> F64 (V128.F64x2.extract_lane i v) in - List.for_all2 (assert_num_pat at) (List.init (Simd.lanes shape) (extract v)) ps + List.for_all2 assert_num_pat (List.init (Simd.lanes shape) (extract v)) ps -let assert_ref_pat at r p = +let assert_ref_pat r p = match r, p with | r, RefPat r' -> r = r'.it | Instance.FuncRef _, RefTypePat Types.FuncRefType | ExternRef _, RefTypePat Types.ExternRefType -> true | _ -> false -let assert_pat at v r = +let assert_pat v r = let open Values in match v, r with - | Num n, NumResult np -> assert_num_pat at n np - | Simd v, SimdResult vp -> assert_simd_pat at v vp - | Ref r, RefResult rp -> assert_ref_pat at r rp + | Num n, NumResult np -> assert_num_pat n np + | Simd v, SimdResult vp -> assert_simd_pat v vp + | Ref r, RefResult rp -> assert_ref_pat r rp | _, _ -> false let assert_result at got expect = if List.length got <> List.length expect || - List.exists2 (fun v r -> not (assert_pat at v r)) got expect + List.exists2 (fun v r -> not (assert_pat v r)) got expect then begin print_string "Result: "; print_values got; print_string "Expect: "; print_results expect; diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 3e2d829cb6..cd76230d47 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -235,17 +235,17 @@ let f64_reinterpret_i64 = Convert (F64 F64Op.ReinterpretInt) let v128_load align offset = SimdLoad {ty = V128Type; align; offset; pack = None} let v128_load8x8_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack8x8, SX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, SX))} let v128_load8x8_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack8x8, ZX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, ZX))} let v128_load16x4_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack16x4, SX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, SX))} let v128_load16x4_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack16x4, ZX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, ZX))} let v128_load32x2_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack32x2, SX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, SX))} let v128_load32x2_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtShape (Pack32x2, ZX))} + SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, ZX))} let v128_load8_splat align offset = SimdLoad {ty = V128Type; align; offset; pack = Some (Pack8, ExtSplat)} let v128_load16_splat align offset = @@ -279,13 +279,13 @@ let v128_store32_lane align offset i = let v128_store64_lane align offset i = SimdStoreLane ({ty = V128Type; align; offset; pack = Pack64}, i) -let v128_not = SimdUnary (V128 V128Op.(V128x1 Not)) -let v128_and = SimdBinary (V128 V128Op.(V128x1 And)) -let v128_andnot = SimdBinary (V128 V128Op.(V128x1 AndNot)) -let v128_or = SimdBinary (V128 V128Op.(V128x1 Or)) -let v128_xor = SimdBinary (V128 V128Op.(V128x1 Xor)) -let v128_bitselect = SimdTernary (V128 V128Op.(V128x1 Bitselect)) -let v128_any_true = SimdTest (V128 V128Op.(V128x1 AnyTrue)) +let v128_not = SimdUnary (V128 V128Op.(V1x128 Not)) +let v128_and = SimdBinary (V128 V128Op.(V1x128 And)) +let v128_andnot = SimdBinary (V128 V128Op.(V1x128 AndNot)) +let v128_or = SimdBinary (V128 V128Op.(V1x128 Or)) +let v128_xor = SimdBinary (V128 V128Op.(V1x128 Xor)) +let v128_bitselect = SimdTernary (V128 V128Op.(V1x128 Bitselect)) +let v128_any_true = SimdTest (V128 V128Op.(V1x128 AnyTrue)) let i8x16_swizzle = SimdBinary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle is = SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index c38eb1bf23..794fba4979 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -22,7 +22,7 @@ type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX type pack_shape = Pack8x8 | Pack16x4 | Pack32x2 type simd_extension = - | ExtShape of pack_shape * extension + | ExtLane of pack_shape * extension | ExtSplat | ExtZero diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index a667aa6274..b6ad7c0c88 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -12,7 +12,7 @@ type ('v128) simdop = type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) laneop = | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 | F32x4 of 'f32x4 | F64x2 of 'f64x2 - | V128x1 of 'v128 + | V1x128 of 'v128 type num = (I32.t, I64.t, F32.t, F64.t) op type simd = (V128.t) simdop diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 63ca2a757c..e260fc2f23 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -91,7 +91,7 @@ let pack_shape = function | Pack32x2 -> "32x2" let simd_extension sz = function - | ExtShape (sh, ext) -> pack_shape sh ^ extension ext + | ExtLane (sh, ext) -> pack_shape sh ^ extension ext | ExtSplat -> pack_size sz ^ "_splat" | ExtZero -> pack_size sz ^ "_zero" @@ -206,7 +206,7 @@ struct | I16x8 AllTrue -> "i16x8.all_true" | I32x4 AllTrue -> "i32x4.all_true" | I64x2 AllTrue -> "i64x2.all_true" - | V128x1 AnyTrue -> "v128.any_true" + | V1x128 AnyTrue -> "v128.any_true" | _ -> . let unop (op : unop) = match op with @@ -259,7 +259,7 @@ struct | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" | F64x2 ConvertI32x4S -> "f64x2.convert_low_i32x4_s" | F64x2 ConvertI32x4U -> "f64x2.convert_low_i32x4_u" - | V128x1 Not -> "v128.not" + | V1x128 Not -> "v128.not" | _ -> failwith "Unimplemented v128 unop" let binop (op : binop) = match op with @@ -380,14 +380,14 @@ struct | F64x2 Max -> "f64x2.max" | F64x2 Pmin -> "f64x2.pmin" | F64x2 Pmax -> "f64x2.pmax" - | V128x1 And -> "v128.and" - | V128x1 AndNot -> "v128.andnot" - | V128x1 Or -> "v128.or" - | V128x1 Xor -> "v128.xor" + | V1x128 And -> "v128.and" + | V1x128 AndNot -> "v128.andnot" + | V1x128 Or -> "v128.or" + | V1x128 Xor -> "v128.xor" | _ -> failwith "Unimplemented v128 binop" let ternop (op : ternop) = match op with - | V128x1 Bitselect -> "v128.bitselect" + | V1x128 Bitselect -> "v128.bitselect" | _ -> . let shiftop (op : shiftop) = match op with diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 4b5b86ce9f..ea7da28e74 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -216,6 +216,8 @@ rule token = parse | vxxx as t { SIMD_TYPE (simd_type t) } | "mut" { MUT } + | simd_shape as s { SIMD_SHAPE (simd_shape s) } + | (nxx as t)".const" { let open Source in CONST (numop t @@ -299,28 +301,40 @@ rule token = parse (ext s i64_load8_s i64_load8_u (opt a 0)) (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } + | (ixx as t)".store"(mem_size as sz) + { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; + STORE (fun a o -> + intop t + (memsz sz + (i32_store8 (opt a 0)) + (i32_store16 (opt a 1)) + (fun _ -> unreachable) o) + (memsz sz + (i64_store8 (opt a 0)) + (i64_store16 (opt a 1)) + (i64_store32 (opt a 2)) o)) } | "v128.load" - { LOAD (fun a o -> (v128_load (opt a 4)) o) } + { SIMD_LOAD (fun a o -> (v128_load (opt a 4)) o) } | "v128.store" - { STORE (fun a o -> (v128_store (opt a 4)) o) } + { SIMD_STORE (fun a o -> (v128_store (opt a 4)) o) } | "v128.load8x8_"(sign as s) - { LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } + { SIMD_LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } | "v128.load16x4_"(sign as s) - { LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } + { SIMD_LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } | "v128.load32x2_"(sign as s) - { LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } + { SIMD_LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } | "v128.load8_splat" - { LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } + { SIMD_LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } | "v128.load16_splat" - { LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } + { SIMD_LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } | "v128.load32_splat" - { LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } + { SIMD_LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } | "v128.load64_splat" - { LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } + { SIMD_LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } | "v128.load32_zero" - { LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } + { SIMD_LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } | "v128.load64_zero" - { LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } + { SIMD_LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } | "v128.load8_lane" { SIMD_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } | "v128.load16_lane" @@ -337,18 +351,6 @@ rule token = parse { SIMD_STORE_LANE (fun a o i -> (v128_store32_lane (opt a 2)) o i) } | "v128.store64_lane" { SIMD_STORE_LANE (fun a o i -> (v128_store64_lane (opt a 3)) o i) } - | (ixx as t)".store"(mem_size as sz) - { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; - STORE (fun a o -> - intop t - (memsz sz - (i32_store8 (opt a 0)) - (i32_store16 (opt a 1)) - (fun _ -> unreachable) o) - (memsz sz - (i64_store8 (opt a 0)) - (i64_store16 (opt a 1)) - (i64_store32 (opt a 2)) o)) } | "offset="(nat as s) { OFFSET_EQ_NAT s } | "align="(nat as s) { ALIGN_EQ_NAT s } @@ -479,171 +481,195 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } - | (simd_shape as s)".splat" - { SPLAT (simdop s i8x16_splat i16x8_splat i32x4_splat - i64x2_splat f32x4_splat f64x2_splat) } - | (simd_shape as s)".extract_lane" - { except ["i8x16"; "i16x8"] s lexbuf; - EXTRACT_LANE (fun i -> - simdop s - (fun _ -> unreachable) (fun _ -> unreachable) - i32x4_extract_lane i64x2_extract_lane - f32x4_extract_lane f64x2_extract_lane i) } - | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) - { EXTRACT_LANE (fun i -> - if t = "i8x16" - then ext s i8x16_extract_lane_s i8x16_extract_lane_u i - else ext s i16x8_extract_lane_s i16x8_extract_lane_u i )} - | (simd_shape as s)".replace_lane" - { REPLACE_LANE (simdop s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane - i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } + | vxxx".not" { SIMD_UNARY v128_not } + | vxxx".and" { SIMD_UNARY v128_and } + | vxxx".andnot" { SIMD_UNARY v128_andnot } + | vxxx".or" { SIMD_UNARY v128_or } + | vxxx".xor" { SIMD_UNARY v128_xor } + | vxxx".bitselect" { SIMD_TERNARY v128_bitselect } + | vxxx".any_true" { SIMD_TEST (v128_any_true) } + + | (simd_shape as s)".neg" + { SIMD_UNARY + (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } + | (simd_float_shape as s)".sqrt" + { SIMD_UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } + | (simd_float_shape as s)".ceil" + { SIMD_UNARY (simd_float_op s f32x4_ceil f64x2_ceil) } + | (simd_float_shape as s)".floor" + { SIMD_UNARY (simd_float_op s f32x4_floor f64x2_floor) } + | (simd_float_shape as s)".trunc" + { SIMD_UNARY (simd_float_op s f32x4_trunc f64x2_trunc) } + | (simd_float_shape as s)".nearest" + { SIMD_UNARY (simd_float_op s f32x4_nearest f64x2_nearest) } + | (simd_shape as s)".abs" + { SIMD_UNARY + (simdop s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } + | "i8x16.popcnt" { SIMD_UNARY i8x16_popcnt } + | (simd_int_shape as s)".avgr_u" + { only ["i8x16"; "i16x8"] s lexbuf; + SIMD_UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } + | "i32x4.trunc_sat_f32x4_"(sign as s) + { SIMD_UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } + | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" + { SIMD_UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } + | "f64x2.promote_low_f32x4" + { SIMD_UNARY f64x2_promote_low_f32x4 } + | "f32x4.demote_f64x2_zero" + { SIMD_UNARY f32x4_demote_f64x2_zero } + | "f32x4.convert_i32x4_"(sign as s) + { SIMD_UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } + | "f64x2.convert_low_i32x4_"(sign as s) + { SIMD_UNARY (ext s f64x2_convert_low_i32x4_s f64x2_convert_low_i32x4_u) } + | "i16x8.extadd_pairwise_i8x16_"(sign as s) + { SIMD_UNARY (ext s i16x8_extadd_pairwise_i8x16_s i16x8_extadd_pairwise_i8x16_u) } + | "i32x4.extadd_pairwise_i16x8_"(sign as s) + { SIMD_UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } + | (simd_shape as s)".eq" - { BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } + { SIMD_BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } | (simd_shape as s)".ne" - { BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } + { SIMD_BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } | (simd_int_shape as s)".lt_s" - { BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } + { SIMD_BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } | (simd_int_shape as s)".lt_u" { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } + SIMD_BINARY (simd_int_op s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } | (simd_int_shape as s)".le_s" - { BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } + { SIMD_BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } | (simd_int_shape as s)".le_u" { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } + SIMD_BINARY (simd_int_op s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } | (simd_int_shape as s)".gt_s" - { BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } + { SIMD_BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } | (simd_int_shape as s)".gt_u" { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } + SIMD_BINARY (simd_int_op s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } | (simd_int_shape as s)".ge_s" - { BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } + { SIMD_BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } | (simd_int_shape as s)".ge_u" { except ["i64x2"] s lexbuf; - BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } - | (simd_float_shape as s)".lt" { BINARY (simd_float_op s f32x4_lt f64x2_lt) } - | (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) } - | (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) } - | (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) } - | "i8x16.swizzle" { BINARY i8x16_swizzle } - | "i8x16.shuffle" { SHUFFLE } - | vxxx".not" { UNARY v128_not } - | vxxx".and" { UNARY v128_and } - | vxxx".andnot" { UNARY v128_andnot } - | vxxx".or" { UNARY v128_or } - | vxxx".xor" { UNARY v128_xor } - | vxxx".bitselect" { TERNARY v128_bitselect } - | vxxx".any_true" { UNARY (v128_any_true) } - | (simd_shape as s)".neg" - { UNARY (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } - | (simd_float_shape as s)".sqrt" { UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } - | (simd_float_shape as s)".ceil" { UNARY (simd_float_op s f32x4_ceil f64x2_ceil) } - | (simd_float_shape as s)".floor" { UNARY (simd_float_op s f32x4_floor f64x2_floor) } - | (simd_float_shape as s)".trunc" { UNARY (simd_float_op s f32x4_trunc f64x2_trunc) } - | (simd_float_shape as s)".nearest" { UNARY (simd_float_op s f32x4_nearest f64x2_nearest) } - | (simd_float_shape as s)".pmin" { BINARY (simd_float_op s f32x4_pmin f64x2_pmin) } - | (simd_float_shape as s)".pmax" { BINARY (simd_float_op s f32x4_pmax f64x2_pmax) } + SIMD_BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } + | (simd_float_shape as s)".lt" { SIMD_BINARY (simd_float_op s f32x4_lt f64x2_lt) } + | (simd_float_shape as s)".le" { SIMD_BINARY (simd_float_op s f32x4_le f64x2_le) } + | (simd_float_shape as s)".gt" { SIMD_BINARY (simd_float_op s f32x4_gt f64x2_gt) } + | (simd_float_shape as s)".ge" { SIMD_BINARY (simd_float_op s f32x4_ge f64x2_ge) } + | "i8x16.swizzle" { SIMD_BINARY i8x16_swizzle } + | (simd_shape as s)".add" - { BINARY (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } + { SIMD_BINARY + (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } | (simd_shape as s)".sub" - { BINARY (simdop s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } + { SIMD_BINARY + (simdop s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } | (simd_shape as s)".min_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_min_s i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } + SIMD_BINARY + (simdop s i8x16_min_s i16x8_min_s i32x4_min_s unreachable + unreachable unreachable) } | (simd_shape as s)".min_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_min_u i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } + SIMD_BINARY + (simdop s i8x16_min_u i16x8_min_u i32x4_min_u unreachable + unreachable unreachable) } | (simd_shape as s)".max_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_max_s i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } + SIMD_BINARY + (simdop s i8x16_max_s i16x8_max_s i32x4_max_s unreachable + unreachable unreachable) } | (simd_shape as s)".max_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - BINARY (simdop s i8x16_max_u i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } + SIMD_BINARY + (simdop s i8x16_max_u i16x8_max_u i32x4_max_u unreachable + unreachable unreachable) } | (simd_shape as s)".mul" { only ["i16x8"; "i32x4"; "i64x2"; "f32x4"; "f64x2"] s lexbuf; - BINARY (simdop s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } - | (simd_float_shape as s)".div" { BINARY (simd_float_op s f32x4_div f64x2_div) } - | (simd_float_shape as s)".min" { BINARY (simd_float_op s f32x4_min f64x2_min) } - | (simd_float_shape as s)".max" { BINARY (simd_float_op s f32x4_max f64x2_max) } - | (simd_shape as s)".abs" - { UNARY (simdop s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } - | "i8x16.popcnt" - { UNARY i8x16_popcnt } - | (simd_int_shape as s)".all_true" - { UNARY (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } - | (simd_int_shape as s)".bitmask" - { UNARY (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } - | (simd_int_shape as s)".shl" - { SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } - | (simd_int_shape as s)".shr_s" - { SHIFT (simd_int_op s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } - | (simd_int_shape as s)".shr_u" - { SHIFT (simd_int_op s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } - | (simd_int_shape as s)".avgr_u" - { only ["i8x16"; "i16x8"] s lexbuf; - UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } - | "i32x4.trunc_sat_f32x4_"(sign as s) - { UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } - | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" - { UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } - | "f64x2.promote_low_f32x4" - { UNARY f64x2_promote_low_f32x4 } - | "f32x4.demote_f64x2_zero" - { UNARY f32x4_demote_f64x2_zero } - | "f32x4.convert_i32x4_"(sign as s) - { UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } - | "f64x2.convert_low_i32x4_"(sign as s) - { UNARY (ext s f64x2_convert_low_i32x4_s f64x2_convert_low_i32x4_u) } + SIMD_BINARY + (simdop s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } + | (simd_float_shape as s)".div" + { SIMD_BINARY (simd_float_op s f32x4_div f64x2_div) } + | (simd_float_shape as s)".min" + { SIMD_BINARY (simd_float_op s f32x4_min f64x2_min) } + | (simd_float_shape as s)".max" + { SIMD_BINARY (simd_float_op s f32x4_max f64x2_max) } + | (simd_float_shape as s)".pmin" + { SIMD_BINARY (simd_float_op s f32x4_pmin f64x2_pmin) } + | (simd_float_shape as s)".pmax" + { SIMD_BINARY (simd_float_op s f32x4_pmax f64x2_pmax) } + | "i8x16.add_sat_"(sign as s) + { SIMD_BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } + | "i8x16.sub_sat_"(sign as s) + { SIMD_BINARY (ext s i8x16_sub_sat_s i8x16_sub_sat_u) } + | "i16x8.add_sat_"(sign as s) + { SIMD_BINARY (ext s i16x8_add_sat_s i16x8_add_sat_u) } + | "i16x8.sub_sat_"(sign as s) + { SIMD_BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } + | "i32x4.dot_i16x8_s" + { SIMD_BINARY i32x4_dot_i16x8_s } | "i8x16.narrow_i16x8_"(sign as s) - { BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } + { SIMD_BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } | "i16x8.narrow_i32x4_"(sign as s) - { BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } + { SIMD_BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } | "i16x8.extend_low_i8x16_"(sign as s) - { UNARY (ext s i16x8_extend_low_i8x16_s i16x8_extend_low_i8x16_u) } + { SIMD_UNARY (ext s i16x8_extend_low_i8x16_s i16x8_extend_low_i8x16_u) } | "i16x8.extend_high_i8x16_"(sign as s) - { UNARY (ext s i16x8_extend_high_i8x16_s i16x8_extend_high_i8x16_u) } + { SIMD_UNARY (ext s i16x8_extend_high_i8x16_s i16x8_extend_high_i8x16_u) } | "i32x4.extend_low_i16x8_"(sign as s) - { UNARY (ext s i32x4_extend_low_i16x8_s i32x4_extend_low_i16x8_u) } + { SIMD_UNARY (ext s i32x4_extend_low_i16x8_s i32x4_extend_low_i16x8_u) } | "i32x4.extend_high_i16x8_"(sign as s) - { UNARY (ext s i32x4_extend_high_i16x8_s i32x4_extend_high_i16x8_u) } + { SIMD_UNARY (ext s i32x4_extend_high_i16x8_s i32x4_extend_high_i16x8_u) } | "i64x2.extend_low_i32x4_"(sign as s) - { UNARY (ext s i64x2_extend_low_i32x4_s i64x2_extend_low_i32x4_u) } + { SIMD_UNARY (ext s i64x2_extend_low_i32x4_s i64x2_extend_low_i32x4_u) } | "i64x2.extend_high_i32x4_"(sign as s) - { UNARY (ext s i64x2_extend_high_i32x4_s i64x2_extend_high_i32x4_u) } - - | "i8x16.add_sat_"(sign as s) - { BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } - | "i8x16.sub_sat_"(sign as s) - { BINARY (ext s i8x16_sub_sat_s i8x16_sub_sat_u) } - | "i16x8.add_sat_"(sign as s) - { BINARY (ext s i16x8_add_sat_s i16x8_add_sat_u) } - | "i16x8.sub_sat_"(sign as s) - { BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } - - | "i32x4.dot_i16x8_s" - { BINARY i32x4_dot_i16x8_s } - + { SIMD_UNARY (ext s i64x2_extend_high_i32x4_s i64x2_extend_high_i32x4_u) } | "i16x8.extmul_low_i8x16_"(sign as s) - { BINARY (ext s i16x8_extmul_low_i8x16_s i16x8_extmul_low_i8x16_u) } + { SIMD_BINARY (ext s i16x8_extmul_low_i8x16_s i16x8_extmul_low_i8x16_u) } | "i16x8.extmul_high_i8x16_"(sign as s) - { BINARY (ext s i16x8_extmul_high_i8x16_s i16x8_extmul_high_i8x16_u) } + { SIMD_BINARY (ext s i16x8_extmul_high_i8x16_s i16x8_extmul_high_i8x16_u) } | "i32x4.extmul_low_i16x8_"(sign as s) - { BINARY (ext s i32x4_extmul_low_i16x8_s i32x4_extmul_low_i16x8_u) } + { SIMD_BINARY (ext s i32x4_extmul_low_i16x8_s i32x4_extmul_low_i16x8_u) } | "i32x4.extmul_high_i16x8_"(sign as s) - { BINARY (ext s i32x4_extmul_high_i16x8_s i32x4_extmul_high_i16x8_u) } + { SIMD_BINARY (ext s i32x4_extmul_high_i16x8_s i32x4_extmul_high_i16x8_u) } | "i64x2.extmul_low_i32x4_"(sign as s) - { BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } + { SIMD_BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } | "i64x2.extmul_high_i32x4_"(sign as s) - { BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } + { SIMD_BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } | "i16x8.q15mulr_sat_s" - { BINARY i16x8_q15mulr_sat_s } + { SIMD_BINARY i16x8_q15mulr_sat_s } - | "i16x8.extadd_pairwise_i8x16_"(sign as s) - { UNARY (ext s i16x8_extadd_pairwise_i8x16_s i16x8_extadd_pairwise_i8x16_u) } - | "i32x4.extadd_pairwise_i16x8_"(sign as s) - { UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } + | (simd_int_shape as s)".all_true" + { SIMD_TEST + (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } + | (simd_int_shape as s)".bitmask" + { SIMD_BITMASK + (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } + | (simd_int_shape as s)".shl" + { SIMD_SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } + | (simd_int_shape as s)".shr_s" + { SIMD_SHIFT (simd_int_op s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } + | (simd_int_shape as s)".shr_u" + { SIMD_SHIFT (simd_int_op s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } + | "i8x16.shuffle" { SIMD_SHUFFLE } - | (simd_shape as s) { SIMD_SHAPE (simd_shape s) } + | (simd_shape as s)".splat" + { SIMD_SPLAT (simdop s i8x16_splat i16x8_splat i32x4_splat + i64x2_splat f32x4_splat f64x2_splat) } + | (simd_shape as s)".extract_lane" + { except ["i8x16"; "i16x8"] s lexbuf; + SIMD_EXTRACT (fun i -> + simdop s + (fun _ -> unreachable) (fun _ -> unreachable) + i32x4_extract_lane i64x2_extract_lane + f32x4_extract_lane f64x2_extract_lane i) } + | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) + { SIMD_EXTRACT (fun i -> + if t = "i8x16" + then ext s i8x16_extract_lane_s i8x16_extract_lane_u i + else ext s i16x8_extract_lane_s i16x8_extract_lane_u i )} + | (simd_shape as s)".replace_lane" + { SIMD_REPLACE + (simdop s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane + i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } | name as s { VAR s } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 07760ad303..1ef92daa62 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -206,7 +206,7 @@ let inline_type_explicit (c : context) x ft at = %token LPAR RPAR %token NAT INT FLOAT STRING VAR -%token NUM_TYPE SIMD_TYPE FUNCREF EXTERNREF EXTERN MUT +%token NUM_TYPE SIMD_TYPE SIMD_SHAPE FUNCREF EXTERNREF EXTERN MUT %token UNREACHABLE NOP DROP SELECT %token BLOCK END IF THEN ELSE LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN @@ -217,7 +217,10 @@ let inline_type_explicit (c : context) x ft at = %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT %token CONST UNARY BINARY TEST COMPARE CONVERT %token REF_NULL REF_FUNC REF_EXTERN REF_IS_NULL -%token SIMD_CONST SIMD_SHAPE SIMD_LOAD_LANE SIMD_STORE_LANE SHUFFLE +%token SIMD_LOAD SIMD_STORE SIMD_LOAD_LANE SIMD_STORE_LANE +%token SIMD_CONST SIMD_UNARY SIMD_BINARY SIMD_TERNARY SIMD_TEST +%token SIMD_SHIFT SIMD_BITMASK SIMD_SHUFFLE +%token SIMD_EXTRACT SIMD_REPLACE %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA DECLARE OFFSET ITEM IMPORT EXPORT %token MODULE BIN QUOTE @@ -239,21 +242,27 @@ let inline_type_explicit (c : context) x ft at = %token string Source.phrase list -> Source.region -> Ast.instr' * Values.simd> SIMD_CONST %token UNARY %token BINARY -%token TERNARY %token TEST %token COMPARE %token CONVERT %token Memory.offset -> Ast.instr'> LOAD %token Memory.offset -> Ast.instr'> STORE +%token Memory.offset -> Ast.instr'> SIMD_LOAD +%token Memory.offset -> Ast.instr'> SIMD_STORE %token Memory.offset -> int -> Ast.instr'> SIMD_LOAD_LANE %token Memory.offset -> int -> Ast.instr'> SIMD_STORE_LANE -%token SPLAT -%token Ast.instr'> EXTRACT_LANE -%token Ast.instr'> REPLACE_LANE +%token SIMD_UNARY +%token SIMD_BINARY +%token SIMD_TERNARY +%token SIMD_TEST +%token SIMD_SHIFT +%token SIMD_BITMASK +%token SIMD_SPLAT +%token Ast.instr'> SIMD_EXTRACT +%token Ast.instr'> SIMD_REPLACE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT %token SIMD_SHAPE -%token SHIFT %token NAN @@ -426,9 +435,13 @@ plain_instr : { let at = at () in fun c -> table_init (0l @@ at) ($2 c elem) } | ELEM_DROP var { fun c -> elem_drop ($2 c elem) } | LOAD offset_opt align_opt { fun c -> $1 $3 $2 } - | SIMD_LOAD_LANE offset_opt align_opt NAT { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } - | SIMD_STORE_LANE offset_opt align_opt NAT { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } | STORE offset_opt align_opt { fun c -> $1 $3 $2 } + | SIMD_LOAD offset_opt align_opt { fun c -> $1 $3 $2 } + | SIMD_STORE offset_opt align_opt { fun c -> $1 $3 $2 } + | SIMD_LOAD_LANE offset_opt align_opt NAT + { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } + | SIMD_STORE_LANE offset_opt align_opt NAT + { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } | MEMORY_FILL { fun c -> memory_fill } @@ -439,18 +452,22 @@ plain_instr : | REF_IS_NULL { fun c -> ref_is_null } | REF_FUNC var { fun c -> ref_func ($2 c func) } | CONST num { fun c -> fst (num $1 $2) } - | SIMD_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd $1 $2 $3 at) } | TEST { fun c -> $1 } | COMPARE { fun c -> $1 } | UNARY { fun c -> $1 } | BINARY { fun c -> $1 } - | TERNARY { fun c -> $1 } | CONVERT { fun c -> $1 } - | SPLAT { fun c -> $1 } - | EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } - | REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } - | SHIFT { fun c -> $1 } - | SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_lit $2 at) } + | SIMD_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd $1 $2 $3 at) } + | SIMD_UNARY { fun c -> $1 } + | SIMD_BINARY { fun c -> $1 } + | SIMD_TERNARY { fun c -> $1 } + | SIMD_TEST { fun c -> $1 } + | SIMD_SHIFT { fun c -> $1 } + | SIMD_BITMASK { fun c -> $1 } + | SIMD_SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_lit $2 at) } + | SIMD_SPLAT { fun c -> $1 } + | SIMD_EXTRACT NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } + | SIMD_REPLACE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } select_instr : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index f9ab8fedcd..c7c3082df4 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -153,23 +153,23 @@ let type_simd_cvtop at = function | Values.V128 (cvtop : V128Op.cvtop) -> let open V128Op in (match cvtop with - | Values.I8x16 Splat | Values.I16x8 Splat | Values.I32x4 Splat -> I32Type + | Values.(I8x16 Splat | I16x8 Splat | I32x4 Splat) -> I32Type | Values.I64x2 Splat -> I64Type | Values.F32x4 Splat -> F32Type | Values.F64x2 Splat -> F64Type - | Values.V128x1 _ -> . + | Values.V1x128 _ -> . ), V128Type let type_simd_lane at = function - | Values.V128 op -> - match op with + | Values.V128 (laneop : (_, _, _, _, _, _, void) Values.laneop) -> + match laneop with | Values.I8x16 _ -> I32Type | Values.I16x8 _ -> I32Type | Values.I32x4 _ -> I32Type | Values.I64x2 _ -> I64Type | Values.F32x4 _ -> F32Type | Values.F64x2 _ -> F64Type - | Values.V128x1 _ -> assert false + | Values.V1x128 _ -> . (* Expressions *) @@ -202,7 +202,7 @@ let check_memop (c : context) (memop : ('t, 's) memop) ty_size get_sz at = require (1 lsl memop.align <= size) at "alignment must not be larger than natural" -let check_simd_lane_index get_lane op at = +let check_simd_lane_index get_lane (op : (_, _, _, _, _, _, void) Values.laneop Values.simdop) at = let max, op' = match op with | Values.(V128 (I8x16 op')) -> 16, op' | Values.(V128 (I16x8 op')) -> 8, op' @@ -210,15 +210,9 @@ let check_simd_lane_index get_lane op at = | Values.(V128 (I64x2 op')) -> 2, op' | Values.(V128 (F32x4 op')) -> 4, op' | Values.(V128 (F64x2 op')) -> 2, op' - | Values.(V128 (V128x1 op')) -> assert false + | Values.(V128 (V1x128 _)) -> . in require (get_lane op' < max) at "invalid lane index" -let check_simd_extract_lane_index op at = - check_simd_lane_index (fun (V128Op.Extract (i, _)) -> i) op at - -let check_simd_replace_lane_index op at = - check_simd_lane_index (fun (V128Op.Replace i) -> i) op at - (* * Conventions: * c : context @@ -496,13 +490,13 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type [NumType t1] --> [SimdType t2] | SimdExtract extractop -> - check_simd_extract_lane_index extractop e.at; + check_simd_lane_index (fun (V128Op.Extract (i, _)) -> i) extractop e.at; let t = SimdType (type_simd extractop) in let t2 = type_simd_lane e.at extractop in [t] --> [NumType t2] | SimdReplace replaceop -> - check_simd_replace_lane_index replaceop e.at; + check_simd_lane_index (fun (V128Op.Replace i) -> i) replaceop e.at; let t = SimdType (type_simd replaceop) in let t2 = type_simd_lane e.at replaceop in [t; NumType t2] --> [t] From 89e4f595e971423bf1e55c3802df0056bdd4f6d1 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Mon, 2 Aug 2021 10:43:31 +0200 Subject: [PATCH 354/378] Separate v128 from lane ops --- interpreter/binary/encode.ml | 15 +++--- interpreter/exec/eval.ml | 20 ++++++-- interpreter/exec/eval_simd.ml | 90 +++++++++++++++++++-------------- interpreter/exec/eval_simd.mli | 7 ++- interpreter/script/js.ml | 2 +- interpreter/syntax/ast.ml | 40 ++++++++------- interpreter/syntax/free.ml | 5 +- interpreter/syntax/operators.ml | 14 ++--- interpreter/syntax/values.ml | 3 +- interpreter/text/arrange.ml | 34 ++++++++----- interpreter/valid/valid.ml | 25 ++++++--- 11 files changed, 153 insertions(+), 102 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index cfaae41b61..0e8aca17f4 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -460,14 +460,12 @@ struct | SimdConst {it = V128 c; _} -> simd_op 0x0cl; v128 c - | SimdTest (V128 V128Op.(V1x128 AnyTrue)) -> simd_op 0x53l | SimdTest (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l | SimdTest (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l | SimdTest (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l | SimdTest (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l | SimdTest (V128 _) -> . - | SimdUnary (V128 V128Op.(V1x128 Not)) -> simd_op 0x4dl | SimdUnary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l | SimdUnary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l | SimdUnary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l @@ -636,14 +634,15 @@ struct | SimdBinary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l | SimdBinary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l | SimdBinary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l - | SimdBinary (V128 V128Op.(V1x128 And)) -> simd_op 0x4el - | SimdBinary (V128 V128Op.(V1x128 AndNot)) -> simd_op 0x4fl - | SimdBinary (V128 V128Op.(V1x128 Or)) -> simd_op 0x50l - | SimdBinary (V128 V128Op.(V1x128 Xor)) -> simd_op 0x51l | SimdBinary (V128 _) -> assert false - | SimdTernary (V128 V128Op.(V1x128 Bitselect)) -> simd_op 0x52l - | SimdTernary (V128 _) -> . + | SimdTestVec (V128 V128Op.AnyTrue) -> simd_op 0x53l + | SimdUnaryVec (V128 V128Op.Not) -> simd_op 0x4dl + | SimdBinaryVec (V128 V128Op.And) -> simd_op 0x4el + | SimdBinaryVec (V128 V128Op.AndNot) -> simd_op 0x4fl + | SimdBinaryVec (V128 V128Op.Or) -> simd_op 0x50l + | SimdBinaryVec (V128 V128Op.Xor) -> simd_op 0x51l + | SimdTernaryVec (V128 V128Op.Bitselect) -> simd_op 0x52l | SimdShift (V128 V128Op.(I8x16 Shl)) -> simd_op 0x6bl | SimdShift (V128 V128Op.(I8x16 ShrS)) -> simd_op 0x6cl diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 23f87a7212..8b3c477509 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -524,6 +524,10 @@ let rec step (c : config) : config = | SimdConst v, vs -> Simd v.it :: vs, [] + | SimdTest testop, Simd n :: vs' -> + (try value_of_bool (Eval_simd.eval_testop testop n) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | SimdUnary unop, Simd n :: vs' -> (try Simd (Eval_simd.eval_unop unop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) @@ -532,12 +536,20 @@ let rec step (c : config) : config = (try Simd (Eval_simd.eval_binop binop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTernary ternop, Simd v3 :: Simd v2 :: Simd v1 :: vs' -> - (try Simd (Eval_simd.eval_ternop ternop v1 v2 v3) :: vs', [] + | SimdTestVec vtestop, Simd n :: vs' -> + (try value_of_bool (Eval_simd.eval_vtestop vtestop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTest testop, Simd n :: vs' -> - (try value_of_bool (Eval_simd.eval_testop testop n) :: vs', [] + | SimdUnaryVec vunop, Simd n :: vs' -> + (try Simd (Eval_simd.eval_vunop vunop n) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | SimdBinaryVec vbinop, Simd n2 :: Simd n1 :: vs' -> + (try Simd (Eval_simd.eval_vbinop vbinop n1 n2) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | SimdTernaryVec vternop, Simd v3 :: Simd v2 :: Simd v1 :: vs' -> + (try Simd (Eval_simd.eval_vternop vternop v1 v2 v3) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdShift shiftop, Num s :: Simd v :: vs' -> diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 23b8142816..11273fb6bd 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -5,6 +5,15 @@ module V128Op = struct open Ast.V128Op open V128Simd + let testop (op : testop) = + let f = match op with + | I8x16 AllTrue -> V128.I8x16.all_true + | I16x8 AllTrue -> V128.I16x8.all_true + | I32x4 AllTrue -> V128.I32x4.all_true + | I64x2 AllTrue -> V128.I64x2.all_true + | _ -> . + in fun v -> f (of_simd 1 v) + let unop (op : unop) = let f = match op with | I8x16 Neg -> V128.I8x16.neg @@ -56,7 +65,6 @@ module V128Op = struct | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 | F64x2 ConvertI32x4S -> V128.F64x2_convert.convert_i32x4_s | F64x2 ConvertI32x4U -> V128.F64x2_convert.convert_i32x4_u - | V1x128 Not -> V128.V1x128.lognot | _ -> assert false in fun v -> to_simd (f (of_simd 1 v)) @@ -179,53 +187,56 @@ module V128Op = struct | F64x2 Max -> V128.F64x2.max | F64x2 Pmin -> V128.F64x2.pmin | F64x2 Pmax -> V128.F64x2.pmax - | V1x128 And -> V128.V1x128.and_ - | V1x128 Or -> V128.V1x128.or_ - | V1x128 Xor -> V128.V1x128.xor - | V1x128 AndNot -> V128.V1x128.andnot | _ -> assert false in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) - let ternop op = + let vtestop (op : vtestop) = let f = match op with - | V1x128 Bitselect -> V128.V1x128.bitselect - | _ -> assert false + | AnyTrue -> V128.I8x16.any_true + in fun v -> f (of_simd 1 v) + + let vunop (op : vunop) = + let f = match op with + | Not -> V128.V1x128.lognot + in fun v -> to_simd (f (of_simd 1 v)) + + let vbinop (op : vbinop) = + let f = match op with + | And -> V128.V1x128.and_ + | Or -> V128.V1x128.or_ + | Xor -> V128.V1x128.xor + | AndNot -> V128.V1x128.andnot + in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) + + let vternop (op : vternop) = + let f = match op with + | Bitselect -> V128.V1x128.bitselect in fun v1 v2 v3 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2) (of_simd 3 v3)) let shiftop (op : shiftop) = let f = match op with - | I8x16 Shl -> V128.I8x16.shl - | I8x16 ShrS -> V128.I8x16.shr_s - | I8x16 ShrU -> V128.I8x16.shr_u - | I16x8 Shl -> V128.I16x8.shl - | I16x8 ShrS -> V128.I16x8.shr_s - | I16x8 ShrU -> V128.I16x8.shr_u - | I32x4 Shl -> V128.I32x4.shl - | I32x4 ShrS -> V128.I32x4.shr_s - | I32x4 ShrU -> V128.I32x4.shr_u - | I64x2 Shl -> V128.I64x2.shl - | I64x2 ShrS -> V128.I64x2.shr_s - | I64x2 ShrU -> V128.I64x2.shr_u - | _ -> . + | I8x16 Shl -> V128.I8x16.shl + | I8x16 ShrS -> V128.I8x16.shr_s + | I8x16 ShrU -> V128.I8x16.shr_u + | I16x8 Shl -> V128.I16x8.shl + | I16x8 ShrS -> V128.I16x8.shr_s + | I16x8 ShrU -> V128.I16x8.shr_u + | I32x4 Shl -> V128.I32x4.shl + | I32x4 ShrS -> V128.I32x4.shr_s + | I32x4 ShrU -> V128.I32x4.shr_u + | I64x2 Shl -> V128.I64x2.shl + | I64x2 ShrS -> V128.I64x2.shr_s + | I64x2 ShrU -> V128.I64x2.shr_u + | _ -> . in fun v n -> to_simd (f (of_simd 1 v) (I32Num.of_num 2 n)) - let testop (op : testop) = - let f = match op with - | I8x16 AllTrue -> V128.I8x16.all_true - | I16x8 AllTrue -> V128.I16x8.all_true - | I32x4 AllTrue -> V128.I32x4.all_true - | I64x2 AllTrue -> V128.I64x2.all_true - | V1x128 AnyTrue -> V128.I8x16.any_true - | _ -> . - in fun v -> f (of_simd 1 v) - let bitmaskop (op : bitmaskop) v = let f = match op with - | I8x16 Bitmask -> V128.I8x16.bitmask - | I16x8 Bitmask -> V128.I16x8.bitmask - | I32x4 Bitmask -> V128.I32x4.bitmask - | I64x2 Bitmask -> V128.I64x2.bitmask - | _ -> . + | I8x16 Bitmask -> V128.I8x16.bitmask + | I16x8 Bitmask -> V128.I16x8.bitmask + | I32x4 Bitmask -> V128.I32x4.bitmask + | I64x2 Bitmask -> V128.I64x2.bitmask + | _ -> . in I32 (f (of_simd 1 v)) end @@ -276,10 +287,13 @@ end let op v128 = function | V128 x -> v128 x +let eval_testop = op V128Op.testop let eval_unop = op V128Op.unop let eval_binop = op V128Op.binop -let eval_ternop = op V128Op.ternop -let eval_testop = op V128Op.testop +let eval_vtestop = op V128Op.vtestop +let eval_vunop = op V128Op.vunop +let eval_vbinop = op V128Op.vbinop +let eval_vternop = op V128Op.vternop let eval_shiftop = op V128Op.shiftop let eval_bitmaskop = op V128Op.bitmaskop let eval_cvtop = op V128CvtOp.cvtop diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli index 2c66442184..7153542da1 100644 --- a/interpreter/exec/eval_simd.mli +++ b/interpreter/exec/eval_simd.mli @@ -1,9 +1,12 @@ open Values +val eval_testop : Ast.simd_testop -> simd -> bool val eval_unop : Ast.simd_unop -> simd -> simd val eval_binop : Ast.simd_binop -> simd -> simd -> simd -val eval_ternop : Ast.simd_ternop -> simd -> simd -> simd -> simd -val eval_testop : Ast.simd_testop -> simd -> bool +val eval_vtestop : Ast.simd_vtestop -> simd -> bool +val eval_vunop : Ast.simd_vunop -> simd -> simd +val eval_vbinop : Ast.simd_vbinop -> simd -> simd -> simd +val eval_vternop : Ast.simd_vternop -> simd -> simd -> simd -> simd val eval_shiftop : Ast.simd_shiftop -> simd -> num -> simd val eval_bitmaskop : Ast.simd_bitmaskop -> simd -> num val eval_cvtop : Ast.simd_cvtop -> num -> simd diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 4539f15de7..e9bbca8159 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -338,7 +338,7 @@ let assert_return ress ts at = V128.of_i64x2 (List.map (I64Num.of_num 0) canons) in [ SimdConst (V128 mask @@ at) @@ at; - SimdBinary (V128 V128Op.(V1x128 And)) @@ at; + SimdBinaryVec (V128 V128Op.And) @@ at; SimdConst (V128 expected @@ at) @@ at; SimdBinary (V128 V128Op.(I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index f199ad5f23..72ac0c5f93 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -54,6 +54,7 @@ module F64Op = FloatOp module V128Op = struct + type itestop = AllTrue type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero @@ -70,40 +71,42 @@ struct | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax | Eq | Ne | Lt | Le | Gt | Ge + type ishiftop = Shl | ShrS | ShrU + type ibitmaskop = Bitmask + + type vtestop = AnyTrue type vunop = Not type vbinop = And | Or | Xor | AndNot type vternop = Bitselect - type itestop = AllTrue - type vtestop = AnyTrue - type ishiftop = Shl | ShrS | ShrU - type ibitmaskop = Bitmask type ncvtop = Splat type nextractop = Extract of int * extension option type nreplaceop = Replace of int - type unop = (iunop, iunop, iunop, iunop, funop, funop, vunop) Values.laneop - type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop, vbinop) Values.laneop - type ternop = (void, void, void, void, void, void, vternop) Values.laneop - type testop = (itestop, itestop, itestop, itestop, void, void, vtestop) Values.laneop - type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void, void) Values.laneop - type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void, void) Values.laneop + type testop = (itestop, itestop, itestop, itestop, void, void) Values.laneop + type unop = (iunop, iunop, iunop, iunop, funop, funop) Values.laneop + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) Values.laneop + type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) Values.laneop + type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) Values.laneop - type cvtop = (ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, void) Values.laneop - type extractop = (nextractop, nextractop, nextractop, nextractop, nextractop, nextractop, void) Values.laneop - type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, void) Values.laneop + type cvtop = (ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, ncvtop) Values.laneop + type extractop = (nextractop, nextractop, nextractop, nextractop, nextractop, nextractop) Values.laneop + type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop) Values.laneop end +type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op type unop = (I32Op.unop, I64Op.unop, F32Op.unop, F64Op.unop) Values.op type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop) Values.op -type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Values.op +type simd_testop = (V128Op.testop) Values.simdop type simd_unop = (V128Op.unop) Values.simdop type simd_binop = (V128Op.binop) Values.simdop -type simd_ternop = (V128Op.ternop) Values.simdop -type simd_testop = (V128Op.testop) Values.simdop +type simd_vtestop = (V128Op.vtestop) Values.simdop +type simd_vunop = (V128Op.vunop) Values.simdop +type simd_vbinop = (V128Op.vbinop) Values.simdop +type simd_vternop = (V128Op.vternop) Values.simdop type simd_shiftop = (V128Op.shiftop) Values.simdop type simd_bitmaskop = (V128Op.bitmaskop) Values.simdop type simd_cvtop = (V128Op.cvtop) Values.simdop @@ -181,7 +184,10 @@ and instr' = | SimdTest of simd_testop (* simd test *) | SimdUnary of simd_unop (* unary simd operator *) | SimdBinary of simd_binop (* binary simd operator *) - | SimdTernary of simd_ternop (* ternary simd operator *) + | SimdTestVec of simd_vtestop (* simd test vector *) + | SimdUnaryVec of simd_vunop (* unary simd vector operator *) + | SimdBinaryVec of simd_vbinop (* binary simd vector operator *) + | SimdTernaryVec of simd_vternop (* ternary simd vector operator *) | SimdShift of simd_shiftop (* shifts for simd value *) | SimdBitmask of simd_bitmaskop (* bitmask for simd value *) | SimdConvert of simd_cvtop (* simd conversion *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index be563078ac..dfe94bc544 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -87,8 +87,9 @@ let rec instr (e : instr) = | SimdLoad _ | SimdStore _ | SimdLoadLane _ | SimdStoreLane _ | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> memories zero - | SimdConst _ | SimdTest _ - | SimdUnary _ | SimdBinary _ | SimdTernary _ | SimdShift _ | SimdBitmask _ + | SimdConst _ + | SimdTest _ | SimdUnary _ | SimdBinary _ | SimdShift _ | SimdBitmask _ + | SimdTestVec _ | SimdUnaryVec _ | SimdBinaryVec _ | SimdTernaryVec _ | SimdConvert _ | SimdExtract _ | SimdReplace _ -> memories zero | MemoryInit x -> memories zero ++ datas (var x) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index cd76230d47..8344573550 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -279,13 +279,13 @@ let v128_store32_lane align offset i = let v128_store64_lane align offset i = SimdStoreLane ({ty = V128Type; align; offset; pack = Pack64}, i) -let v128_not = SimdUnary (V128 V128Op.(V1x128 Not)) -let v128_and = SimdBinary (V128 V128Op.(V1x128 And)) -let v128_andnot = SimdBinary (V128 V128Op.(V1x128 AndNot)) -let v128_or = SimdBinary (V128 V128Op.(V1x128 Or)) -let v128_xor = SimdBinary (V128 V128Op.(V1x128 Xor)) -let v128_bitselect = SimdTernary (V128 V128Op.(V1x128 Bitselect)) -let v128_any_true = SimdTest (V128 V128Op.(V1x128 AnyTrue)) +let v128_not = SimdUnaryVec (V128 V128Op.Not) +let v128_and = SimdBinaryVec (V128 V128Op.And) +let v128_andnot = SimdBinaryVec (V128 V128Op.AndNot) +let v128_or = SimdBinaryVec (V128 V128Op.Or) +let v128_xor = SimdBinaryVec (V128 V128Op.Xor) +let v128_bitselect = SimdTernaryVec (V128 V128Op.Bitselect) +let v128_any_true = SimdTestVec (V128 V128Op.AnyTrue) let i8x16_swizzle = SimdBinary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle is = SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index b6ad7c0c88..2309f245c1 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -9,10 +9,9 @@ type ('i32, 'i64, 'f32, 'f64) op = type ('v128) simdop = V128 of 'v128 -type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2, 'v128) laneop = +type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 | F32x4 of 'f32x4 | F64x2 of 'f64x2 - | V1x128 of 'v128 type num = (I32.t, I64.t, F32.t, F64.t) op type simd = (V128.t) simdop diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index e260fc2f23..9dbd10bc12 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -206,7 +206,6 @@ struct | I16x8 AllTrue -> "i16x8.all_true" | I32x4 AllTrue -> "i32x4.all_true" | I64x2 AllTrue -> "i64x2.all_true" - | V1x128 AnyTrue -> "v128.any_true" | _ -> . let unop (op : unop) = match op with @@ -259,8 +258,7 @@ struct | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" | F64x2 ConvertI32x4S -> "f64x2.convert_low_i32x4_s" | F64x2 ConvertI32x4U -> "f64x2.convert_low_i32x4_u" - | V1x128 Not -> "v128.not" - | _ -> failwith "Unimplemented v128 unop" + | _ -> assert false let binop (op : binop) = match op with | I8x16 (Shuffle is) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat is)) @@ -380,15 +378,7 @@ struct | F64x2 Max -> "f64x2.max" | F64x2 Pmin -> "f64x2.pmin" | F64x2 Pmax -> "f64x2.pmax" - | V1x128 And -> "v128.and" - | V1x128 AndNot -> "v128.andnot" - | V1x128 Or -> "v128.or" - | V1x128 Xor -> "v128.xor" - | _ -> failwith "Unimplemented v128 binop" - - let ternop (op : ternop) = match op with - | V1x128 Bitselect -> "v128.bitselect" - | _ -> . + | _ -> assert false let shiftop (op : shiftop) = match op with | I8x16 Shl -> "i8x16.shl" @@ -412,6 +402,21 @@ struct | I64x2 Bitmask -> "i64x2.bitmask" | _ -> . + let vtestop (op : vtestop) = match op with + | AnyTrue -> "v128.any_true" + + let vunop (op : vunop) = match op with + | Not -> "v128.not" + + let vbinop (op : vbinop) = match op with + | And -> "v128.and" + | AndNot -> "v128.andnot" + | Or -> "v128.or" + | Xor -> "v128.xor" + + let vternop (op : vternop) = match op with + | Bitselect -> "v128.bitselect" + let cvtop (op : cvtop) = match op with | I8x16 Splat -> "i8x16.splat" | I16x8 Splat -> "i16x8.splat" @@ -558,7 +563,10 @@ let rec instr e = | SimdTest (V128 op) -> V128Op.testop op, [] | SimdUnary (V128 op) -> V128Op.unop op, [] | SimdBinary (V128 op) -> V128Op.binop op, [] - | SimdTernary (V128 op) -> V128Op.ternop op, [] + | SimdTestVec (V128 op) -> V128Op.vtestop op, [] + | SimdUnaryVec (V128 op) -> V128Op.vunop op, [] + | SimdBinaryVec (V128 op) -> V128Op.vbinop op, [] + | SimdTernaryVec (V128 op) -> V128Op.vternop op, [] | SimdShift (V128 op) -> V128Op.shiftop op, [] | SimdBitmask (V128 op) -> V128Op.bitmaskop op, [] | SimdConvert (V128 op) -> V128Op.cvtop op, [] diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index c7c3082df4..e8f6529bfb 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -150,18 +150,17 @@ let type_cvtop at = function ), F64Type let type_simd_cvtop at = function - | Values.V128 (cvtop : V128Op.cvtop) -> + | Values.V128 cvtop -> let open V128Op in (match cvtop with | Values.(I8x16 Splat | I16x8 Splat | I32x4 Splat) -> I32Type | Values.I64x2 Splat -> I64Type | Values.F32x4 Splat -> F32Type | Values.F64x2 Splat -> F64Type - | Values.V1x128 _ -> . ), V128Type let type_simd_lane at = function - | Values.V128 (laneop : (_, _, _, _, _, _, void) Values.laneop) -> + | Values.V128 laneop -> match laneop with | Values.I8x16 _ -> I32Type | Values.I16x8 _ -> I32Type @@ -169,7 +168,6 @@ let type_simd_lane at = function | Values.I64x2 _ -> I64Type | Values.F32x4 _ -> F32Type | Values.F64x2 _ -> F64Type - | Values.V1x128 _ -> . (* Expressions *) @@ -202,7 +200,7 @@ let check_memop (c : context) (memop : ('t, 's) memop) ty_size get_sz at = require (1 lsl memop.align <= size) at "alignment must not be larger than natural" -let check_simd_lane_index get_lane (op : (_, _, _, _, _, _, void) Values.laneop Values.simdop) at = +let check_simd_lane_index get_lane op at = let max, op' = match op with | Values.(V128 (I8x16 op')) -> 16, op' | Values.(V128 (I16x8 op')) -> 8, op' @@ -210,7 +208,6 @@ let check_simd_lane_index get_lane (op : (_, _, _, _, _, _, void) Values.laneop | Values.(V128 (I64x2 op')) -> 2, op' | Values.(V128 (F32x4 op')) -> 4, op' | Values.(V128 (F64x2 op')) -> 2, op' - | Values.(V128 (V1x128 _)) -> . in require (get_lane op' < max) at "invalid lane index" (* @@ -473,8 +470,20 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type let t = SimdType (type_simd binop) in [t; t] --> [t] - | SimdTernary ternop -> - let t = SimdType (type_simd ternop) in + | SimdTestVec vtestop -> + let t = SimdType (type_simd vtestop) in + [t] --> [NumType I32Type] + + | SimdUnaryVec vunop -> + let t = SimdType (type_simd vunop) in + [t] --> [t] + + | SimdBinaryVec vbinop -> + let t = SimdType (type_simd vbinop) in + [t; t] --> [t] + + | SimdTernaryVec vternop -> + let t = SimdType (type_simd vternop) in [t; t; t] --> [t] | SimdShift shiftop -> From a3736255ac1f1b7e780ab8f96efed009b59cedcf Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Mon, 2 Aug 2021 14:34:01 +0200 Subject: [PATCH 355/378] Simplify printing --- interpreter/binary/encode.ml | 60 +++-- interpreter/exec/eval.ml | 4 +- interpreter/exec/eval_simd.ml | 61 +++-- interpreter/exec/eval_simd.mli | 2 +- interpreter/exec/simd.ml | 55 ++-- interpreter/exec/v128.ml | 12 +- interpreter/script/js.ml | 20 +- interpreter/script/run.ml | 17 +- interpreter/script/script.ml | 2 +- interpreter/syntax/ast.ml | 48 ++-- interpreter/syntax/free.ml | 2 +- interpreter/syntax/operators.ml | 49 ++-- interpreter/syntax/values.ml | 4 - interpreter/text/arrange.ml | 428 +++++++++++++------------------- interpreter/text/lexer.mll | 24 +- interpreter/text/parser.mly | 18 +- interpreter/valid/valid.ml | 67 +++-- 17 files changed, 397 insertions(+), 476 deletions(-) diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 0e8aca17f4..133446153b 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -135,6 +135,7 @@ struct open Source open Ast open Values + open Simd let op n = u8 n let simd_op n = op 0xfd; vu32 n @@ -297,8 +298,7 @@ struct | Test (I32 I32Op.Eqz) -> op 0x45 | Test (I64 I64Op.Eqz) -> op 0x50 - | Test (F32 _) -> assert false - | Test (F64 _) -> assert false + | Test (F32 _ | F64 _) -> . | Compare (I32 I32Op.Eq) -> op 0x46 | Compare (I32 I32Op.Ne) -> op 0x47 @@ -341,8 +341,7 @@ struct | Unary (I32 I32Op.Popcnt) -> op 0x69 | Unary (I32 (I32Op.ExtendS Pack8)) -> op 0xc0 | Unary (I32 (I32Op.ExtendS Pack16)) -> op 0xc1 - | Unary (I32 (I32Op.ExtendS Pack32)) -> assert false - | Unary (I32 (I32Op.ExtendS Pack64)) -> assert false + | Unary (I32 (I32Op.ExtendS (Pack32 | Pack64))) -> assert false | Unary (I64 I64Op.Clz) -> op 0x79 | Unary (I64 I64Op.Ctz) -> op 0x7a @@ -505,16 +504,16 @@ struct | SimdUnary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl | SimdUnary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl | SimdUnary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl - | SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4S)) -> simd_op 0xf8l - | SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4U)) -> simd_op 0xf9l - | SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -> simd_op 0xfcl - | SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -> simd_op 0xfdl - | SimdUnary (V128 V128Op.(F32x4 ConvertI32x4S)) -> simd_op 0xfal - | SimdUnary (V128 V128Op.(F32x4 ConvertI32x4U)) -> simd_op 0xfbl - | SimdUnary (V128 V128Op.(F32x4 DemoteF64x2Zero)) -> simd_op 0x5el + | SimdUnary (V128 V128Op.(I32x4 TruncSatSF32x4)) -> simd_op 0xf8l + | SimdUnary (V128 V128Op.(I32x4 TruncSatUF32x4)) -> simd_op 0xf9l + | SimdUnary (V128 V128Op.(I32x4 TruncSatSZeroF64x2)) -> simd_op 0xfcl + | SimdUnary (V128 V128Op.(I32x4 TruncSatUZeroF64x2)) -> simd_op 0xfdl + | SimdUnary (V128 V128Op.(F32x4 ConvertSI32x4)) -> simd_op 0xfal + | SimdUnary (V128 V128Op.(F32x4 ConvertUI32x4)) -> simd_op 0xfbl + | SimdUnary (V128 V128Op.(F32x4 DemoteZeroF64x2)) -> simd_op 0x5el | SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x5fl - | SimdUnary (V128 V128Op.(F64x2 ConvertI32x4S)) -> simd_op 0xfel - | SimdUnary (V128 V128Op.(F64x2 ConvertI32x4U)) -> simd_op 0xffl + | SimdUnary (V128 V128Op.(F64x2 ConvertSI32x4)) -> simd_op 0xfel + | SimdUnary (V128 V128Op.(F64x2 ConvertUI32x4)) -> simd_op 0xffl | SimdUnary (V128 _) -> assert false | SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) -> simd_op 0x0dl; List.iter u8 is @@ -577,7 +576,7 @@ struct | SimdBinary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l | SimdBinary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l | SimdBinary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l - | SimdBinary (V128 V128Op.(I32x4 DotI16x8S)) -> simd_op 0xbal + | SimdBinary (V128 V128Op.(I32x4 DotS)) -> simd_op 0xbal | SimdBinary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l | SimdBinary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l | SimdBinary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l @@ -664,23 +663,21 @@ struct | SimdBitmask (V128 V128Op.(I64x2 Bitmask)) -> simd_op 0xc4l | SimdBitmask (V128 _) -> . - | SimdConvert (V128 (V128Op.(I8x16 Splat))) -> simd_op 0x0fl - | SimdConvert (V128 (V128Op.(I16x8 Splat))) -> simd_op 0x10l - | SimdConvert (V128 (V128Op.(I32x4 Splat))) -> simd_op 0x11l - | SimdConvert (V128 (V128Op.(I64x2 Splat))) -> simd_op 0x12l - | SimdConvert (V128 (V128Op.(F32x4 Splat))) -> simd_op 0x13l - | SimdConvert (V128 (V128Op.(F64x2 Splat))) -> simd_op 0x14l - | SimdConvert (V128 _) -> . - - | SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some SX)))) -> simd_op 0x15l; u8 i - | SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some ZX)))) -> simd_op 0x16l; u8 i - | SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some SX)))) -> simd_op 0x18l; u8 i - | SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some ZX)))) -> simd_op 0x19l; u8 i - | SimdExtract (V128 V128Op.(I32x4 (Extract (i, None)))) -> simd_op 0x1bl; u8 i - | SimdExtract (V128 V128Op.(I64x2 (Extract (i, None)))) -> simd_op 0x1dl; u8 i - | SimdExtract (V128 V128Op.(F32x4 (Extract (i, None)))) -> simd_op 0x1fl; u8 i - | SimdExtract (V128 V128Op.(F64x2 (Extract (i, None)))) -> simd_op 0x21l; u8 i - | SimdExtract (V128 _) -> assert false + | SimdSplat (V128 (V128Op.(I8x16 Splat))) -> simd_op 0x0fl + | SimdSplat (V128 (V128Op.(I16x8 Splat))) -> simd_op 0x10l + | SimdSplat (V128 (V128Op.(I32x4 Splat))) -> simd_op 0x11l + | SimdSplat (V128 (V128Op.(I64x2 Splat))) -> simd_op 0x12l + | SimdSplat (V128 (V128Op.(F32x4 Splat))) -> simd_op 0x13l + | SimdSplat (V128 (V128Op.(F64x2 Splat))) -> simd_op 0x14l + + | SimdExtract (V128 V128Op.(I8x16 (Extract (i, SX)))) -> simd_op 0x15l; u8 i + | SimdExtract (V128 V128Op.(I8x16 (Extract (i, ZX)))) -> simd_op 0x16l; u8 i + | SimdExtract (V128 V128Op.(I16x8 (Extract (i, SX)))) -> simd_op 0x18l; u8 i + | SimdExtract (V128 V128Op.(I16x8 (Extract (i, ZX)))) -> simd_op 0x19l; u8 i + | SimdExtract (V128 V128Op.(I32x4 (Extract (i, ())))) -> simd_op 0x1bl; u8 i + | SimdExtract (V128 V128Op.(I64x2 (Extract (i, ())))) -> simd_op 0x1dl; u8 i + | SimdExtract (V128 V128Op.(F32x4 (Extract (i, ())))) -> simd_op 0x1fl; u8 i + | SimdExtract (V128 V128Op.(F64x2 (Extract (i, ())))) -> simd_op 0x21l; u8 i | SimdReplace (V128 V128Op.(I8x16 (Replace i))) -> simd_op 0x17l; u8 i | SimdReplace (V128 V128Op.(I16x8 (Replace i))) -> simd_op 0x1al; u8 i @@ -688,7 +685,6 @@ struct | SimdReplace (V128 V128Op.(I64x2 (Replace i))) -> simd_op 0x1el; u8 i | SimdReplace (V128 V128Op.(F32x4 (Replace i))) -> simd_op 0x20l; u8 i | SimdReplace (V128 V128Op.(F64x2 (Replace i))) -> simd_op 0x22l; u8 i - | SimdReplace (V128 _) -> . let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 8b3c477509..b4bfd99356 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -560,8 +560,8 @@ let rec step (c : config) : config = (try Num (Eval_simd.eval_bitmaskop bitmaskop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdConvert cvtop, Num n :: vs' -> - (try Simd (Eval_simd.eval_cvtop cvtop n) :: vs', [] + | SimdSplat splatop, Num n :: vs' -> + (try Simd (Eval_simd.eval_splatop splatop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdExtract extractop, Simd v :: vs' -> diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index 11273fb6bd..bff3463856 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -4,6 +4,7 @@ open Values module V128Op = struct open Ast.V128Op open V128Simd + open Simd let testop (op : testop) = let f = match op with @@ -33,10 +34,10 @@ module V128Op = struct | I32x4 ExtendHighS -> V128.I32x4_convert.extend_high_s | I32x4 ExtendLowU -> V128.I32x4_convert.extend_low_u | I32x4 ExtendHighU -> V128.I32x4_convert.extend_high_u - | I32x4 TruncSatF32x4S -> V128.I32x4_convert.trunc_sat_f32x4_s - | I32x4 TruncSatF32x4U -> V128.I32x4_convert.trunc_sat_f32x4_u - | I32x4 TruncSatF64x2SZero -> V128.I32x4_convert.trunc_sat_f64x2_s_zero - | I32x4 TruncSatF64x2UZero -> V128.I32x4_convert.trunc_sat_f64x2_u_zero + | I32x4 TruncSatSF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_s + | I32x4 TruncSatUF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_u + | I32x4 TruncSatSZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_s_zero + | I32x4 TruncSatUZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_u_zero | I32x4 ExtAddPairwiseS -> V128.I32x4_convert.extadd_pairwise_s | I32x4 ExtAddPairwiseU -> V128.I32x4_convert.extadd_pairwise_u | I64x2 Abs -> V128.I64x2.abs @@ -52,9 +53,9 @@ module V128Op = struct | F32x4 Floor -> V128.F32x4.floor | F32x4 Trunc -> V128.F32x4.trunc | F32x4 Nearest -> V128.F32x4.nearest - | F32x4 ConvertI32x4S -> V128.F32x4_convert.convert_i32x4_s - | F32x4 ConvertI32x4U -> V128.F32x4_convert.convert_i32x4_u - | F32x4 DemoteF64x2Zero -> V128.F32x4_convert.demote_f64x2_zero + | F32x4 ConvertSI32x4 -> V128.F32x4_convert.convert_i32x4_s + | F32x4 ConvertUI32x4 -> V128.F32x4_convert.convert_i32x4_u + | F32x4 DemoteZeroF64x2 -> V128.F32x4_convert.demote_f64x2_zero | F64x2 Abs -> V128.F64x2.abs | F64x2 Neg -> V128.F64x2.neg | F64x2 Sqrt -> V128.F64x2.sqrt @@ -63,8 +64,8 @@ module V128Op = struct | F64x2 Trunc -> V128.F64x2.trunc | F64x2 Nearest -> V128.F64x2.nearest | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 - | F64x2 ConvertI32x4S -> V128.F64x2_convert.convert_i32x4_s - | F64x2 ConvertI32x4U -> V128.F64x2_convert.convert_i32x4_u + | F64x2 ConvertSI32x4 -> V128.F64x2_convert.convert_i32x4_s + | F64x2 ConvertUI32x4 -> V128.F64x2_convert.convert_i32x4_u | _ -> assert false in fun v -> to_simd (f (of_simd 1 v)) @@ -141,7 +142,6 @@ module V128Op = struct | I32x4 GtU -> V128.I32x4.gt_u | I32x4 GeS -> V128.I32x4.ge_s | I32x4 GeU -> V128.I32x4.ge_u - | I32x4 DotI16x8S -> V128.I32x4_convert.dot_i16x8_s | I64x2 Eq -> V128.I64x2.eq | I64x2 Ne -> V128.I64x2.ne | I64x2 LtS -> V128.I64x2.lt_s @@ -155,6 +155,7 @@ module V128Op = struct | I64x2 Add -> V128.I64x2.add | I64x2 Sub -> V128.I64x2.sub | I64x2 Mul -> V128.I64x2.mul + | I32x4 DotS -> V128.I32x4_convert.dot_s | I64x2 ExtMulLowS -> V128.I64x2_convert.extmul_low_s | I64x2 ExtMulHighS -> V128.I64x2_convert.extmul_high_s | I64x2 ExtMulLowU -> V128.I64x2_convert.extmul_low_u @@ -243,8 +244,9 @@ end module V128CvtOp = struct open Ast.V128Op + open Simd - let cvtop (op : cvtop) v = + let splatop (op : splatop) v = let i = match op with | I8x16 Splat -> V128.I8x16.splat (I32Num.of_num 1 v) @@ -253,32 +255,29 @@ struct | I64x2 Splat -> V128.I64x2.splat (I64Num.of_num 1 v) | F32x4 Splat -> V128.F32x4.splat (F32Num.of_num 1 v) | F64x2 Splat -> V128.F64x2.splat (F64Num.of_num 1 v) - | _ -> . in V128Simd.to_simd i let extractop (op : extractop) v = let v128 = V128Simd.of_simd 1 v in match op with - | I8x16 (Extract (i, Some SX)) -> I32 (V128.I8x16.extract_lane_s i v128) - | I8x16 (Extract (i, Some ZX)) -> I32 (V128.I8x16.extract_lane_u i v128) - | I16x8 (Extract (i, Some SX)) -> I32 (V128.I16x8.extract_lane_s i v128) - | I16x8 (Extract (i, Some ZX)) -> I32 (V128.I16x8.extract_lane_u i v128) - | I32x4 (Extract (i, None)) -> I32 (V128.I32x4.extract_lane_u i v128) - | I64x2 (Extract (i, None)) -> I64 (V128.I64x2.extract_lane_u i v128) - | F32x4 (Extract (i, None)) -> F32 (V128.F32x4.extract_lane i v128) - | F64x2 (Extract (i, None)) -> F64 (V128.F64x2.extract_lane i v128) - | _ -> assert false + | I8x16 (Extract (i, SX)) -> I32 (V128.I8x16.extract_lane_s i v128) + | I8x16 (Extract (i, ZX)) -> I32 (V128.I8x16.extract_lane_u i v128) + | I16x8 (Extract (i, SX)) -> I32 (V128.I16x8.extract_lane_s i v128) + | I16x8 (Extract (i, ZX)) -> I32 (V128.I16x8.extract_lane_u i v128) + | I32x4 (Extract (i, ())) -> I32 (V128.I32x4.extract_lane_u i v128) + | I64x2 (Extract (i, ())) -> I64 (V128.I64x2.extract_lane_u i v128) + | F32x4 (Extract (i, ())) -> F32 (V128.F32x4.extract_lane i v128) + | F64x2 (Extract (i, ())) -> F64 (V128.F64x2.extract_lane i v128) - let replaceop (op : replaceop) v (r : Values.num) = + let replaceop (op : replaceop) v (n : Values.num) = let v128 = V128Simd.of_simd 1 v in - let v128' = match op, r with - | I8x16 (Replace i), I32 r -> V128.I8x16.replace_lane i v128 r - | I16x8 (Replace i), I32 r -> V128.I16x8.replace_lane i v128 r - | I32x4 (Replace i), I32 r -> V128.I32x4.replace_lane i v128 r - | I64x2 (Replace i), I64 r -> V128.I64x2.replace_lane i v128 r - | F32x4 (Replace i), F32 r -> V128.F32x4.replace_lane i v128 r - | F64x2 (Replace i), F64 r -> V128.F64x2.replace_lane i v128 r - | _ -> assert false + let v128' = match op with + | I8x16 (Replace i) -> V128.I8x16.replace_lane i v128 (I32Num.of_num 1 n) + | I16x8 (Replace i) -> V128.I16x8.replace_lane i v128 (I32Num.of_num 1 n) + | I32x4 (Replace i) -> V128.I32x4.replace_lane i v128 (I32Num.of_num 1 n) + | I64x2 (Replace i) -> V128.I64x2.replace_lane i v128 (I64Num.of_num 1 n) + | F32x4 (Replace i) -> V128.F32x4.replace_lane i v128 (F32Num.of_num 1 n) + | F64x2 (Replace i) -> V128.F64x2.replace_lane i v128 (F64Num.of_num 1 n) in V128Simd.to_simd v128' end @@ -296,6 +295,6 @@ let eval_vbinop = op V128Op.vbinop let eval_vternop = op V128Op.vternop let eval_shiftop = op V128Op.shiftop let eval_bitmaskop = op V128Op.bitmaskop -let eval_cvtop = op V128CvtOp.cvtop +let eval_splatop = op V128CvtOp.splatop let eval_extractop = op V128CvtOp.extractop let eval_replaceop = op V128CvtOp.replaceop diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli index 7153542da1..64d92f3701 100644 --- a/interpreter/exec/eval_simd.mli +++ b/interpreter/exec/eval_simd.mli @@ -9,6 +9,6 @@ val eval_vbinop : Ast.simd_vbinop -> simd -> simd -> simd val eval_vternop : Ast.simd_vternop -> simd -> simd -> simd -> simd val eval_shiftop : Ast.simd_shiftop -> simd -> num -> simd val eval_bitmaskop : Ast.simd_bitmaskop -> simd -> num -val eval_cvtop : Ast.simd_cvtop -> num -> simd +val eval_splatop : Ast.simd_splatop -> num -> simd val eval_extractop : Ast.simd_extractop -> simd -> num val eval_replaceop : Ast.simd_replaceop -> simd -> num -> simd diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml index 79147839e5..93b6c17da0 100644 --- a/interpreter/exec/simd.ml +++ b/interpreter/exec/simd.ml @@ -1,23 +1,32 @@ -open Char +type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = + | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 + | F32x4 of 'f32x4 | F64x2 of 'f64x2 -type shape = I8x16 | I16x8 | I32x4 | I64x2 | F32x4 | F64x2 +type shape = (unit, unit, unit, unit, unit, unit) laneop let lanes shape = match shape with - | I8x16 -> 16 - | I16x8 -> 8 - | I32x4 -> 4 - | I64x2 -> 2 - | F32x4 -> 4 - | F64x2 -> 2 + | I8x16 _ -> 16 + | I16x8 _ -> 8 + | I32x4 _ -> 4 + | I64x2 _ -> 2 + | F32x4 _ -> 4 + | F64x2 _ -> 2 + +let type_of_lane = function + | I8x16 _ | I16x8 _ | I32x4 _ -> Types.I32Type + | I64x2 _ -> Types.I64Type + | F32x4 _ -> Types.F32Type + | F64x2 _ -> Types.F64Type let string_of_shape = function - | I8x16 -> "i8x16" - | I16x8 -> "i16x8" - | I32x4 -> "i32x4" - | I64x2 -> "i64x2" - | F32x4 -> "f32x4" - | F64x2 -> "f64x2" + | I8x16 _ -> "i8x16" + | I16x8 _ -> "i16x8" + | I32x4 _ -> "i32x4" + | I64x2 _ -> "i64x2" + | F32x4 _ -> "f32x4" + | F64x2 _ -> "f64x2" + module type RepType = sig @@ -195,7 +204,7 @@ sig val extend_high_s : t -> t val extend_low_u : t -> t val extend_high_u : t -> t - val dot_i16x8_s : t -> t -> t + val dot_s : t -> t -> t val extmul_low_s : t -> t -> t val extmul_high_s : t -> t -> t val extmul_low_u : t -> t -> t @@ -230,7 +239,7 @@ struct type t = Rep.t type bits = Rep.t - let zero = Rep.make Rep.bytewidth (chr 0) + let zero = Rep.make Rep.bytewidth (Char.chr 0) let to_string = Rep.to_string (* FIXME very very wrong *) let to_hex_string = Rep.to_hex_string let of_bits x = x @@ -391,37 +400,37 @@ struct module I8x16 = MakeInt (I8) (struct let to_shape = Rep.to_i8x16 let of_shape = Rep.of_i8x16 - let num_lanes = lanes I8x16 + let num_lanes = lanes (I8x16 ()) end) module I16x8 = MakeInt (I16) (struct let to_shape = Rep.to_i16x8 let of_shape = Rep.of_i16x8 - let num_lanes = lanes I16x8 + let num_lanes = lanes (I16x8 ()) end) module I32x4 = MakeInt (I32) (struct let to_shape = Rep.to_i32x4 let of_shape = Rep.of_i32x4 - let num_lanes = lanes I32x4 + let num_lanes = lanes (I32x4 ()) end) module I64x2 = MakeInt (I64) (struct let to_shape = Rep.to_i64x2 let of_shape = Rep.of_i64x2 - let num_lanes = lanes I64x2 + let num_lanes = lanes (I64x2 ()) end) module F32x4 = MakeFloat (F32) (struct let to_shape = Rep.to_f32x4 let of_shape = Rep.of_f32x4 - let num_lanes = lanes F32x4 + let num_lanes = lanes (F32x4 ()) end) module F64x2 = MakeFloat (F64) (struct let to_shape = Rep.to_f64x2 let of_shape = Rep.of_f64x2 - let num_lanes = lanes F64x2 + let num_lanes = lanes (F64x2 ()) end) (* Narrow two v128 into one v128 by using to_shape on both operands, @@ -479,7 +488,7 @@ struct let extend_low_u = extend Lib.List.take ext_u let extend_high_u = extend Lib.List.drop ext_u - let dot_i16x8_s x y = + let dot_s x y = let xs = Rep.to_i16x8 x in let ys = Rep.to_i16x8 y in let rec dot xs ys = diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index f91f08a3bb..af3f262b69 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -62,17 +62,17 @@ include Simd.Make let open Bytes in let b = create bytewidth in (match shape with - | Simd.I8x16 -> + | Simd.I8x16 () -> List.iteri (fun i s -> set_uint8 b i (i8_of_string s)) ss - | Simd.I16x8 -> + | Simd.I16x8 () -> List.iteri (fun i s -> set_int16_le b (i * 2) (i16_of_string s)) ss - | Simd.I32x4 -> + | Simd.I32x4 () -> List.iteri (fun i s -> set_int32_le b (i * 4) (I32.of_string s)) ss - | Simd.I64x2 -> + | Simd.I64x2 () -> List.iteri (fun i s -> set_int64_le b (i * 8) (I64.of_string s)) ss - | Simd.F32x4 -> + | Simd.F32x4 () -> List.iteri (fun i s -> set_int32_le b (i * 4) (F32.to_bits (F32.of_string s))) ss - | Simd.F64x2 -> + | Simd.F64x2 () -> List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss); Bytes.to_string b diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index e9bbca8159..9f246f5a34 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -307,7 +307,7 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | SimdResult (SimdPat (shape, pats)) -> + | SimdResult (SimdPat (Values.V128 (shape, pats))) -> let open Values in (* SimdResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals * and NaNs. For NaNs, we need to mask it and compare with a canonical NaN. To simplify @@ -326,23 +326,23 @@ let assert_return ress ts at = let masks, canons = List.split (List.map (fun p -> mask_and_canonical p) pats) in let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in let mask, expected = match shape with - | Simd.I8x16 -> all_ones, V128.of_i8x16 (List.map (I32Num.of_num 0) canons) - | Simd.I16x8 -> all_ones, V128.of_i16x8 (List.map (I32Num.of_num 0) canons) - | Simd.I32x4 -> all_ones, V128.of_i32x4 (List.map (I32Num.of_num 0) canons) - | Simd.I64x2 -> all_ones, V128.of_i64x2 (List.map (I64Num.of_num 0) canons) - | Simd.F32x4 -> + | Simd.I8x16 () -> all_ones, V128.of_i8x16 (List.map (I32Num.of_num 0) canons) + | Simd.I16x8 () -> all_ones, V128.of_i16x8 (List.map (I32Num.of_num 0) canons) + | Simd.I32x4 () -> all_ones, V128.of_i32x4 (List.map (I32Num.of_num 0) canons) + | Simd.I64x2 () -> all_ones, V128.of_i64x2 (List.map (I64Num.of_num 0) canons) + | Simd.F32x4 () -> V128.of_i32x4 (List.map (I32Num.of_num 0) masks), V128.of_i32x4 (List.map (I32Num.of_num 0) canons) - | Simd.F64x2 -> + | Simd.F64x2 () -> V128.of_i64x2 (List.map (I64Num.of_num 0) masks), V128.of_i64x2 (List.map (I64Num.of_num 0) canons) in [ SimdConst (V128 mask @@ at) @@ at; SimdBinaryVec (V128 V128Op.And) @@ at; SimdConst (V128 expected @@ at) @@ at; - SimdBinary (V128 V128Op.(I8x16 Eq)) @@ at; + SimdBinary (V128 V128Op.(Simd.I8x16 Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) - SimdTest (V128 V128Op.(I8x16 AllTrue)) @@ at; + SimdTest (V128 V128Op.(Simd.I8x16 AllTrue)) @@ at; Test (I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] | RefResult (RefPat {it = Values.NullRef t; _}) -> @@ -499,7 +499,7 @@ let of_num_pat = function | Values.F32 n | Values.F64 n -> of_nan n let of_simd_pat = function - | SimdPat (shape, pats) -> + | SimdPat (Values.V128 (shape, pats)) -> Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map of_num_pat pats)) let of_ref_pat = function diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index a8a20f1b46..e5c4298ff8 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -268,7 +268,8 @@ let string_of_num_pat (p : num_pat) = let string_of_simd_pat (p : simd_pat) = match p with - | SimdPat (shape, ns) -> String.concat " " (List.map string_of_num_pat ns) + | SimdPat (Values.V128 (shape, ns)) -> + String.concat " " (List.map string_of_num_pat ns) let string_of_ref_pat (p : ref_pat) = match p with @@ -389,14 +390,14 @@ let assert_num_pat n np = let assert_simd_pat v p = let open Values in match v, p with - | V128 v, SimdPat (shape, ps) -> + | V128 v, SimdPat (V128 (shape, ps)) -> let extract = match shape with - | Simd.I8x16 -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) - | Simd.I16x8 -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) - | Simd.I32x4 -> fun v i -> I32 (V128.I32x4.extract_lane_s i v) - | Simd.I64x2 -> fun v i -> I64 (V128.I64x2.extract_lane_s i v) - | Simd.F32x4 -> fun v i -> F32 (V128.F32x4.extract_lane i v) - | Simd.F64x2 -> fun v i -> F64 (V128.F64x2.extract_lane i v) + | Simd.I8x16 () -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) + | Simd.I16x8 () -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) + | Simd.I32x4 () -> fun v i -> I32 (V128.I32x4.extract_lane_s i v) + | Simd.I64x2 () -> fun v i -> I64 (V128.I64x2.extract_lane_s i v) + | Simd.F32x4 () -> fun v i -> F32 (V128.F32x4.extract_lane i v) + | Simd.F64x2 () -> fun v i -> F64 (V128.F64x2.extract_lane i v) in List.for_all2 assert_num_pat (List.init (Simd.lanes shape) (extract v)) ps diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 98fdc8a875..668165ef9c 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -25,7 +25,7 @@ type num_pat = | NanPat of nanop type simd_pat = - | SimdPat of Simd.shape * num_pat list + | SimdPat of (Simd.shape * num_pat list) Values.simdop type ref_pat = | RefPat of ref_ diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 72ac0c5f93..b43b0c5edd 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -40,7 +40,7 @@ module FloatOp = struct type unop = Neg | Abs | Ceil | Floor | Trunc | Nearest | Sqrt type binop = Add | Sub | Mul | Div | Min | Max | CopySign - type testop + type testop = | type relop = Eq | Ne | Lt | Gt | Le | Ge type cvtop = ConvertSI32 | ConvertUI32 | ConvertSI64 | ConvertUI64 | PromoteF32 | DemoteF64 @@ -55,20 +55,21 @@ module F64Op = FloatOp module V128Op = struct type itestop = AllTrue - type iunop = Abs | Neg | TruncSatF32x4S | TruncSatF32x4U + type iunop = Abs | Neg | Popcnt | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU - | Popcnt | TruncSatF64x2SZero | TruncSatF64x2UZero | ExtAddPairwiseS | ExtAddPairwiseU + | TruncSatSF32x4 | TruncSatUF32x4 + | TruncSatSZeroF64x2 | TruncSatUZeroF64x2 type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest - | ConvertI32x4S | ConvertI32x4U - | DemoteF64x2Zero | PromoteLowF32x4 - type ibinop = Add | Sub | MinS | MinU | MaxS | MaxU | Mul | AvgrU + | ConvertSI32x4 | ConvertUI32x4 + | DemoteZeroF64x2 | PromoteLowF32x4 + type ibinop = Add | Sub | Mul | MinS | MinU | MaxS | MaxU | AvgrU | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU - | Swizzle | Shuffle of int list | NarrowS | NarrowU | AddSatS | AddSatU | SubSatS | SubSatU - | DotI16x8S | Q15MulRSatS + | DotS | Q15MulRSatS | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU + | Swizzle | Shuffle of int list | NarrowS | NarrowU type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax | Eq | Ne | Lt | Le | Gt | Ge type ishiftop = Shl | ShrS | ShrU @@ -79,19 +80,19 @@ struct type vbinop = And | Or | Xor | AndNot type vternop = Bitselect - type ncvtop = Splat - type nextractop = Extract of int * extension option - type nreplaceop = Replace of int + type testop = (itestop, itestop, itestop, itestop, void, void) Simd.laneop + type unop = (iunop, iunop, iunop, iunop, funop, funop) Simd.laneop + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) Simd.laneop + type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) Simd.laneop + type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) Simd.laneop - type testop = (itestop, itestop, itestop, itestop, void, void) Values.laneop - type unop = (iunop, iunop, iunop, iunop, funop, funop) Values.laneop - type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) Values.laneop - type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) Values.laneop - type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) Values.laneop + type nsplatop = Splat + type 'a nextractop = Extract of int * 'a + type nreplaceop = Replace of int - type cvtop = (ncvtop, ncvtop, ncvtop, ncvtop, ncvtop, ncvtop) Values.laneop - type extractop = (nextractop, nextractop, nextractop, nextractop, nextractop, nextractop) Values.laneop - type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop) Values.laneop + type splatop = (nsplatop, nsplatop, nsplatop, nsplatop, nsplatop, nsplatop) Simd.laneop + type extractop = (extension nextractop, extension nextractop, unit nextractop, unit nextractop, unit nextractop, unit nextractop) Simd.laneop + type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop) Simd.laneop end type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op @@ -109,7 +110,8 @@ type simd_vbinop = (V128Op.vbinop) Values.simdop type simd_vternop = (V128Op.vternop) Values.simdop type simd_shiftop = (V128Op.shiftop) Values.simdop type simd_bitmaskop = (V128Op.bitmaskop) Values.simdop -type simd_cvtop = (V128Op.cvtop) Values.simdop + +type simd_splatop = (V128Op.splatop) Values.simdop type simd_extractop = (V128Op.extractop) Values.simdop type simd_replaceop = (V128Op.replaceop) Values.simdop @@ -190,9 +192,9 @@ and instr' = | SimdTernaryVec of simd_vternop (* ternary simd vector operator *) | SimdShift of simd_shiftop (* shifts for simd value *) | SimdBitmask of simd_bitmaskop (* bitmask for simd value *) - | SimdConvert of simd_cvtop (* simd conversion *) - | SimdExtract of simd_extractop (* extract lane from simd value *) - | SimdReplace of simd_replaceop (* replace lane of simd value *) + | SimdSplat of simd_splatop (* number to simd conversion *) + | SimdExtract of simd_extractop (* extract lane from simd value*) + | SimdReplace of simd_replaceop (* replace lane in simd value *) (* Globals & Functions *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index dfe94bc544..4d51b983e6 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -90,7 +90,7 @@ let rec instr (e : instr) = | SimdConst _ | SimdTest _ | SimdUnary _ | SimdBinary _ | SimdShift _ | SimdBitmask _ | SimdTestVec _ | SimdUnaryVec _ | SimdBinaryVec _ | SimdTernaryVec _ - | SimdConvert _ | SimdExtract _ | SimdReplace _ -> + | SimdSplat _ | SimdExtract _ | SimdReplace _ -> memories zero | MemoryInit x -> memories zero ++ datas (var x) | DataDrop x -> datas (var x) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 8344573550..7e784ed8e3 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -1,6 +1,7 @@ open Source open Types open Values +open Simd open Ast @@ -290,9 +291,9 @@ let v128_any_true = SimdTestVec (V128 V128Op.AnyTrue) let i8x16_swizzle = SimdBinary (V128 V128Op.(I8x16 Swizzle)) let i8x16_shuffle is = SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) -let i8x16_splat = SimdConvert (V128 V128Op.(I8x16 Splat)) -let i8x16_extract_lane_s i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some SX)))) -let i8x16_extract_lane_u i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, Some ZX)))) +let i8x16_splat = SimdSplat (V128 V128Op.(I8x16 Splat)) +let i8x16_extract_lane_s i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, SX)))) +let i8x16_extract_lane_u i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, ZX)))) let i8x16_replace_lane i = SimdReplace (V128 V128Op.(I8x16 (Replace i))) let i8x16_eq = SimdBinary (V128 V128Op.(I8x16 Eq)) let i8x16_ne = SimdBinary (V128 V128Op.(I8x16 Ne)) @@ -330,9 +331,9 @@ let i8x16_max_s = SimdBinary (V128 V128Op.(I8x16 MaxS)) let i8x16_max_u = SimdBinary (V128 V128Op.(I8x16 MaxU)) let i8x16_avgr_u = SimdBinary (V128 V128Op.(I8x16 AvgrU)) -let i16x8_splat = SimdConvert (V128 V128Op.(I16x8 Splat)) -let i16x8_extract_lane_s i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some SX)))) -let i16x8_extract_lane_u i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, Some ZX)))) +let i16x8_splat = SimdSplat (V128 V128Op.(I16x8 Splat)) +let i16x8_extract_lane_s i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, SX)))) +let i16x8_extract_lane_u i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, ZX)))) let i16x8_replace_lane i = SimdReplace (V128 V128Op.(I16x8 (Replace i))) let i16x8_eq = SimdBinary (V128 V128Op.(I16x8 Eq)) let i16x8_ne = SimdBinary (V128 V128Op.(I16x8 Ne)) @@ -373,8 +374,8 @@ let i16x8_q15mulr_sat_s = SimdBinary (V128 V128Op.(I16x8 Q15MulRSatS)) let i16x8_extadd_pairwise_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseS)) let i16x8_extadd_pairwise_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -let i32x4_splat = SimdConvert (V128 V128Op.(I32x4 Splat)) -let i32x4_extract_lane i = SimdExtract (V128 V128Op.(I32x4 (Extract (i, None)))) +let i32x4_splat = SimdSplat (V128 V128Op.(I32x4 Splat)) +let i32x4_extract_lane i = SimdExtract (V128 V128Op.(I32x4 (Extract (i, ())))) let i32x4_replace_lane i = SimdReplace (V128 V128Op.(I32x4 (Replace i))) let i32x4_eq = SimdBinary (V128 V128Op.(I32x4 Eq)) let i32x4_ne = SimdBinary (V128 V128Op.(I32x4 Ne)) @@ -404,11 +405,11 @@ let i32x4_min_u = SimdBinary (V128 V128Op.(I32x4 MinU)) let i32x4_max_s = SimdBinary (V128 V128Op.(I32x4 MaxS)) let i32x4_max_u = SimdBinary (V128 V128Op.(I32x4 MaxU)) let i32x4_mul = SimdBinary (V128 V128Op.(I32x4 Mul)) -let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4S)) -let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 V128Op.(I32x4 TruncSatF32x4U)) -let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2SZero)) -let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatF64x2UZero)) -let i32x4_dot_i16x8_s = SimdBinary (V128 V128Op.(I32x4 DotI16x8S)) +let i32x4_dot_i16x8_s = SimdBinary (V128 V128Op.(I32x4 DotS)) +let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 V128Op.(I32x4 TruncSatSF32x4)) +let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 V128Op.(I32x4 TruncSatUF32x4)) +let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatSZeroF64x2)) +let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatUZeroF64x2)) let i32x4_extmul_low_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulLowS)) let i32x4_extmul_high_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulHighS)) let i32x4_extmul_low_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulLowU)) @@ -416,8 +417,8 @@ let i32x4_extmul_high_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulHighU)) let i32x4_extadd_pairwise_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseS)) let i32x4_extadd_pairwise_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -let i64x2_splat = SimdConvert (V128 V128Op.(I64x2 Splat)) -let i64x2_extract_lane i = SimdExtract (V128 V128Op.(I64x2 (Extract (i, None)))) +let i64x2_splat = SimdSplat (V128 V128Op.(I64x2 Splat)) +let i64x2_extract_lane i = SimdExtract (V128 V128Op.(I64x2 (Extract (i, ())))) let i64x2_replace_lane i = SimdReplace (V128 V128Op.(I64x2 (Replace i))) let i64x2_extend_low_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendLowS)) let i64x2_extend_high_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendHighS)) @@ -444,8 +445,8 @@ let i64x2_extmul_high_i32x4_s = SimdBinary (V128 V128Op.(I64x2 ExtMulHighS)) let i64x2_extmul_low_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulLowU)) let i64x2_extmul_high_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulHighU)) -let f32x4_splat = SimdConvert (V128 V128Op.(F32x4 Splat)) -let f32x4_extract_lane i = SimdExtract (V128 V128Op.(F32x4 (Extract (i, None)))) +let f32x4_splat = SimdSplat (V128 V128Op.(F32x4 Splat)) +let f32x4_extract_lane i = SimdExtract (V128 V128Op.(F32x4 (Extract (i, ())))) let f32x4_replace_lane i = SimdReplace (V128 V128Op.(F32x4 (Replace i))) let f32x4_eq = SimdBinary (V128 V128Op.(F32x4 Eq)) let f32x4_ne = SimdBinary (V128 V128Op.(F32x4 Ne)) @@ -466,14 +467,14 @@ let f32x4_mul = SimdBinary (V128 V128Op.(F32x4 Mul)) let f32x4_div = SimdBinary (V128 V128Op.(F32x4 Div)) let f32x4_min = SimdBinary (V128 V128Op.(F32x4 Min)) let f32x4_max = SimdBinary (V128 V128Op.(F32x4 Max)) -let f32x4_convert_i32x4_s = SimdUnary (V128 V128Op.(F32x4 ConvertI32x4S)) -let f32x4_convert_i32x4_u = SimdUnary (V128 V128Op.(F32x4 ConvertI32x4U)) let f32x4_pmin = SimdBinary (V128 V128Op.(F32x4 Pmin)) let f32x4_pmax = SimdBinary (V128 V128Op.(F32x4 Pmax)) -let f32x4_demote_f64x2_zero = SimdUnary (V128 V128Op.(F32x4 DemoteF64x2Zero)) +let f32x4_demote_f64x2_zero = SimdUnary (V128 V128Op.(F32x4 DemoteZeroF64x2)) +let f32x4_convert_i32x4_s = SimdUnary (V128 V128Op.(F32x4 ConvertSI32x4)) +let f32x4_convert_i32x4_u = SimdUnary (V128 V128Op.(F32x4 ConvertUI32x4)) -let f64x2_splat = SimdConvert (V128 V128Op.(F64x2 Splat)) -let f64x2_extract_lane i = SimdExtract (V128 V128Op.(F64x2 (Extract (i, None)))) +let f64x2_splat = SimdSplat (V128 V128Op.(F64x2 Splat)) +let f64x2_extract_lane i = SimdExtract (V128 V128Op.(F64x2 (Extract (i, ())))) let f64x2_replace_lane i = SimdReplace (V128 V128Op.(F64x2 (Replace i))) let f64x2_eq = SimdBinary (V128 V128Op.(F64x2 Eq)) let f64x2_ne = SimdBinary (V128 V128Op.(F64x2 Ne)) @@ -497,5 +498,5 @@ let f64x2_abs = SimdUnary (V128 V128Op.(F64x2 Abs)) let f64x2_pmin = SimdBinary (V128 V128Op.(F64x2 Pmin)) let f64x2_pmax = SimdBinary (V128 V128Op.(F64x2 Pmax)) let f64x2_promote_low_f32x4 = SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) -let f64x2_convert_low_i32x4_s = SimdUnary (V128 V128Op.(F64x2 ConvertI32x4S)) -let f64x2_convert_low_i32x4_u = SimdUnary (V128 V128Op.(F64x2 ConvertI32x4U)) +let f64x2_convert_low_i32x4_s = SimdUnary (V128 V128Op.(F64x2 ConvertSI32x4)) +let f64x2_convert_low_i32x4_u = SimdUnary (V128 V128Op.(F64x2 ConvertUI32x4)) diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index 2309f245c1..cd01a5600f 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -9,10 +9,6 @@ type ('i32, 'i64, 'f32, 'f64) op = type ('v128) simdop = V128 of 'v128 -type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = - | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 - | F32x4 of 'f32x4 | F64x2 of 'f64x2 - type num = (I32.t, I64.t, F32.t, F64.t) op type simd = (V128.t) simdop diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 9dbd10bc12..82855d30cf 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -2,6 +2,7 @@ open Source open Ast open Script open Values +open Simd open Types open Sexpr @@ -159,7 +160,7 @@ module FloatOp = struct open Ast.FloatOp - let testop xx = fun _ -> assert false + let testop xx = function (_ : testop) -> . let relop xx = function | Eq -> "eq" @@ -201,267 +202,185 @@ module V128Op = struct open Ast.V128Op - let testop (op : testop) = match op with - | I8x16 AllTrue -> "i8x16.all_true" - | I16x8 AllTrue -> "i16x8.all_true" - | I32x4 AllTrue -> "i32x4.all_true" - | I64x2 AllTrue -> "i64x2.all_true" - | _ -> . - - let unop (op : unop) = match op with - | I8x16 Neg -> "i8x16.neg" - | I8x16 Abs -> "i8x16.abs" - | I8x16 Popcnt -> "i8x16.popcnt" - | I16x8 Abs -> "i16x8.abs" - | I16x8 Neg -> "i16x8.neg" - | I16x8 ExtendLowS -> "i16x8.extend_low_i8x16_s" - | I16x8 ExtendHighS -> "i16x8.extend_high_i8x16_s" - | I16x8 ExtendLowU -> "i16x8.extend_low_i8x16_u" - | I16x8 ExtendHighU -> "i16x8.extend_high_i8x16_u" - | I16x8 ExtAddPairwiseS -> "i16x8.extadd_pairwise_i8x16_s" - | I16x8 ExtAddPairwiseU -> "i16x8.extadd_pairwise_i8x16_u" - | I32x4 Abs -> "i32x4.abs" - | I32x4 Neg -> "i32x4.neg" - | I32x4 ExtendLowS -> "i32x4.extend_low_i16x8_s" - | I32x4 ExtendHighS -> "i32x4.extend_high_i16x8_s" - | I32x4 ExtendLowU -> "i32x4.extend_low_i16x8_u" - | I32x4 ExtendHighU -> "i32x4.extend_high_i16x8_u" - | I32x4 TruncSatF32x4S -> "i32x4.trunc_sat_f32x4_s" - | I32x4 TruncSatF32x4U -> "i32x4.trunc_sat_f32x4_u" - | I32x4 TruncSatF64x2SZero -> "i32x4.trunc_sat_f64x2_s_zero" - | I32x4 TruncSatF64x2UZero -> "i32x4.trunc_sat_f64x2_u_zero" - | I32x4 ExtAddPairwiseS -> "i32x4.extadd_pairwise_i16x8_s" - | I32x4 ExtAddPairwiseU -> "i32x4.extadd_pairwise_i16x8_u" - | I64x2 Abs -> "i64x2.abs" - | I64x2 Neg -> "i64x2.neg" - | I64x2 ExtendLowS -> "i64x2.extend_low_i32x4_s" - | I64x2 ExtendHighS -> "i64x2.extend_high_i32x4_s" - | I64x2 ExtendLowU -> "i64x2.extend_low_i32x4_u" - | I64x2 ExtendHighU -> "i64x2.extend_high_i32x4_u" - | F32x4 Ceil -> "f32x4.ceil" - | F32x4 Floor -> "f32x4.floor" - | F32x4 Trunc -> "f32x4.trunc" - | F32x4 Nearest -> "f32x4.nearest" - | F32x4 DemoteF64x2Zero -> "f32x4.demote_f64x2_zero" - | F64x2 Ceil -> "f64x2.ceil" - | F64x2 Floor -> "f64x2.floor" - | F64x2 Trunc -> "f64x2.trunc" - | F64x2 Nearest -> "f64x2.nearest" - | F32x4 Abs -> "f32x4.abs" - | F32x4 Neg -> "f32x4.neg" - | F32x4 Sqrt -> "f32x4.sqrt" - | F32x4 ConvertI32x4S -> "f32x4.convert_i32x4_s" - | F32x4 ConvertI32x4U -> "f32x4.convert_i32x4_u" - | F64x2 Abs -> "f64x2.abs" - | F64x2 Neg -> "f64x2.neg" - | F64x2 Sqrt -> "f64x2.sqrt" - | F64x2 PromoteLowF32x4 -> "f64x2.promote_low_f32x4" - | F64x2 ConvertI32x4S -> "f64x2.convert_low_i32x4_s" - | F64x2 ConvertI32x4U -> "f64x2.convert_low_i32x4_u" + let half = function + | "16x8" -> "8x16" + | "32x4" -> "16x8" + | "64x2" -> "32x4" | _ -> assert false - let binop (op : binop) = match op with - | I8x16 (Shuffle is) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat is)) - | I8x16 Swizzle -> "i8x16.swizzle" - | I8x16 Eq -> "i8x16.eq" - | I8x16 Ne -> "i8x16.ne" - | I8x16 LtS -> "i8x16.lt_s" - | I8x16 LtU -> "i8x16.lt_u" - | I8x16 GtS -> "i8x16.gt_s" - | I8x16 GtU -> "i8x16.gt_u" - | I8x16 LeS -> "i8x16.le_s" - | I8x16 LeU -> "i8x16.le_u" - | I8x16 GeS -> "i8x16.ge_s" - | I8x16 GeU -> "i8x16.ge_u" - | I16x8 Eq -> "i16x8.eq" - | I16x8 Ne -> "i16x8.ne" - | I16x8 LtS -> "i16x8.lt_s" - | I16x8 LtU -> "i16x8.lt_u" - | I16x8 GtS -> "i16x8.gt_s" - | I16x8 GtU -> "i16x8.gt_u" - | I16x8 LeS -> "i16x8.le_s" - | I16x8 LeU -> "i16x8.le_u" - | I16x8 GeS -> "i16x8.ge_s" - | I16x8 GeU -> "i16x8.ge_u" - | I32x4 Eq -> "i32x4.eq" - | I32x4 Ne -> "i32x4.ne" - | I32x4 LtS -> "i32x4.lt_s" - | I32x4 LtU -> "i32x4.lt_u" - | I32x4 GtS -> "i32x4.gt_s" - | I32x4 GtU -> "i32x4.gt_u" - | I32x4 LeS -> "i32x4.le_s" - | I32x4 LeU -> "i32x4.le_u" - | I32x4 GeS -> "i32x4.ge_s" - | I32x4 GeU -> "i32x4.ge_u" - | I64x2 Eq -> "i64x2.eq" - | I64x2 Ne -> "i64x2.ne" - | I64x2 LtS -> "i64x2.lt_s" - | I64x2 GtS -> "i64x2.gt_s" - | I64x2 LeS -> "i64x2.le_s" - | I64x2 GeS -> "i64x2.ge_s" - | I8x16 NarrowS -> "i8x16.narrow_i16x8_s" - | I8x16 NarrowU -> "i8x16.narrow_i16x8_u" - | I8x16 Add -> "i8x16.add" - | I8x16 AddSatS -> "i8x16.add_sat_s" - | I8x16 AddSatU -> "i8x16.add_sat_u" - | I8x16 Sub -> "i8x16.sub" - | I8x16 SubSatS -> "i8x16.sub_sat_s" - | I8x16 SubSatU -> "i8x16.sub_sat_u" - | I8x16 MinS -> "i8x16.min_s" - | I8x16 MinU -> "i8x16.min_u" - | I8x16 MaxS -> "i8x16.max_s" - | I8x16 MaxU -> "i8x16.max_u" - | I8x16 AvgrU -> "i8x16.avgr_u" - | I16x8 NarrowS -> "i16x8.narrow_i32x4_s" - | I16x8 NarrowU -> "i16x8.narrow_i32x4_u" - | I16x8 Add -> "i16x8.add" - | I16x8 AddSatS -> "i16x8.add_sat_s" - | I16x8 AddSatU -> "i16x8.add_sat_u" - | I16x8 Sub -> "i16x8.sub" - | I16x8 SubSatS -> "i16x8.sub_sat_s" - | I16x8 SubSatU -> "i16x8.sub_sat_u" - | I16x8 Mul -> "i16x8.mul" - | I16x8 MinS -> "i16x8.min_s" - | I16x8 MinU -> "i16x8.min_u" - | I16x8 MaxS -> "i16x8.max_s" - | I16x8 MaxU -> "i16x8.max_u" - | I16x8 AvgrU -> "i16x8.avgr_u" - | I16x8 ExtMulLowS -> "i16x8.extmul_low_i8x16_s" - | I16x8 ExtMulHighS -> "i16x8.extmul_high_i8x16_s" - | I16x8 ExtMulLowU -> "i16x8.extmul_low_i8x16_u" - | I16x8 ExtMulHighU -> "i16x8.extmul_high_i8x16_u" - | I16x8 Q15MulRSatS -> "i16x8.q15mulr_sat_s" - | I32x4 Add -> "i32x4.add" - | I32x4 Sub -> "i32x4.sub" - | I32x4 Mul -> "i32x4.mul" - | I32x4 MinS -> "i32x4.min_s" - | I32x4 MinU -> "i32x4.min_u" - | I32x4 MaxS -> "i32x4.max_s" - | I32x4 MaxU -> "i32x4.max_u" - | I32x4 DotI16x8S -> "i32x4.dot_i16x8_s" - | I32x4 ExtMulLowS -> "i32x4.extmul_low_i16x8_s" - | I32x4 ExtMulHighS -> "i32x4.extmul_high_i16x8_s" - | I32x4 ExtMulLowU -> "i32x4.extmul_low_i16x8_u" - | I32x4 ExtMulHighU -> "i32x4.extmul_high_i16x8_u" - | I64x2 Add -> "i64x2.add" - | I64x2 Sub -> "i64x2.sub" - | I64x2 Mul -> "i64x2.mul" - | I64x2 ExtMulLowS -> "i64x2.extmul_low_i32x4_s" - | I64x2 ExtMulHighS -> "i64x2.extmul_high_i32x4_s" - | I64x2 ExtMulLowU -> "i64x2.extmul_low_i32x4_u" - | I64x2 ExtMulHighU -> "i64x2.extmul_high_i32x4_u" - | F32x4 Eq -> "f32x4.eq" - | F32x4 Ne -> "f32x4.ne" - | F32x4 Lt -> "f32x4.lt" - | F32x4 Le -> "f32x4.le" - | F32x4 Gt -> "f32x4.gt" - | F32x4 Ge -> "f32x4.ge" - | F32x4 Add -> "f32x4.add" - | F32x4 Sub -> "f32x4.sub" - | F32x4 Mul -> "f32x4.mul" - | F32x4 Div -> "f32x4.div" - | F32x4 Min -> "f32x4.min" - | F32x4 Max -> "f32x4.max" - | F32x4 Pmin -> "f32x4.pmin" - | F32x4 Pmax -> "f32x4.pmax" - | F64x2 Eq -> "f64x2.eq" - | F64x2 Ne -> "f64x2.ne" - | F64x2 Lt -> "f64x2.lt" - | F64x2 Gt -> "f64x2.gt" - | F64x2 Le -> "f64x2.le" - | F64x2 Ge -> "f64x2.ge" - | F64x2 Add -> "f64x2.add" - | F64x2 Sub -> "f64x2.sub" - | F64x2 Mul -> "f64x2.mul" - | F64x2 Div -> "f64x2.div" - | F64x2 Min -> "f64x2.min" - | F64x2 Max -> "f64x2.max" - | F64x2 Pmin -> "f64x2.pmin" - | F64x2 Pmax -> "f64x2.pmax" + let double = function + | "8x16" -> "16x8" + | "16x8" -> "32x4" + | "32x4" -> "64x2" | _ -> assert false - let shiftop (op : shiftop) = match op with - | I8x16 Shl -> "i8x16.shl" - | I8x16 ShrS -> "i8x16.shr_s" - | I8x16 ShrU -> "i8x16.shr_u" - | I16x8 Shl -> "i16x8.shl" - | I16x8 ShrS -> "i16x8.shr_s" - | I16x8 ShrU -> "i16x8.shr_u" - | I32x4 Shl -> "i32x4.shl" - | I32x4 ShrS -> "i32x4.shr_s" - | I32x4 ShrU -> "i32x4.shr_u" - | I64x2 Shl -> "i64x2.shl" - | I64x2 ShrS -> "i64x2.shr_s" - | I64x2 ShrU -> "i64x2.shr_u" - | _ -> . - - let bitmaskop (op : bitmaskop) = match op with - | I8x16 Bitmask -> "i8x16.bitmask" - | I16x8 Bitmask -> "i16x8.bitmask" - | I32x4 Bitmask -> "i32x4.bitmask" - | I64x2 Bitmask -> "i64x2.bitmask" - | _ -> . + let voidop xxxx = function (_ : void) -> . + + let itestop xxxx (op : itestop) = match op with + | AllTrue -> "all_true" + + let iunop xxxx (op : iunop) = match op with + | Neg -> "neg" + | Abs -> "abs" + | Popcnt -> "popcnt" + | ExtendLowS -> "extend_low_i" ^ half xxxx ^ "_s" + | ExtendLowU -> "extend_low_i" ^ half xxxx ^ "_u" + | ExtendHighS -> "extend_high_i" ^ half xxxx ^ "_s" + | ExtendHighU -> "extend_high_i" ^ half xxxx ^ "_u" + | ExtAddPairwiseS -> "extadd_pairwise_i" ^ half xxxx ^ "_s" + | ExtAddPairwiseU -> "extadd_pairwise_i" ^ half xxxx ^ "_u" + | TruncSatSF32x4 -> "trunc_sat_f32x4_s" + | TruncSatUF32x4 -> "trunc_sat_f32x4_u" + | TruncSatSZeroF64x2 -> "trunc_sat_f64x2_s_zero" + | TruncSatUZeroF64x2 -> "trunc_sat_f64x2_u_zero" + + let funop xxxx (op : funop) = match op with + | Neg -> "neg" + | Abs -> "abs" + | Sqrt -> "sqrt" + | Ceil -> "ceil" + | Floor -> "floor" + | Trunc -> "trunc" + | Nearest -> "nearest" + | DemoteZeroF64x2 -> "demote_f64x2_zero" + | PromoteLowF32x4 -> "promote_low_f32x4" + | ConvertSI32x4 -> + "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_s" + | ConvertUI32x4 -> + "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_u" + + let ibinop xxxx (op : ibinop) = match op with + | Eq -> "eq" + | Ne -> "ne" + | LtS -> "lt_s" + | LtU -> "lt_u" + | GtS -> "gt_s" + | GtU -> "gt_u" + | LeS -> "le_s" + | LeU -> "le_u" + | GeS -> "ge_s" + | GeU -> "ge_u" + | Add -> "add" + | AddSatS -> "add_sat_s" + | AddSatU -> "add_sat_u" + | Sub -> "sub" + | SubSatS -> "sub_sat_s" + | SubSatU -> "sub_sat_u" + | Mul -> "mul" + | DotS -> "dot_i" ^ half xxxx ^ "_s" + | ExtMulLowS -> "extmul_low_i" ^ half xxxx ^ "_s" + | ExtMulHighS -> "extmul_high_i" ^ half xxxx ^ "_s" + | ExtMulLowU -> "extmul_low_i" ^ half xxxx ^ "_u" + | ExtMulHighU -> "extmul_high_i" ^ half xxxx ^ "_u" + | Q15MulRSatS -> "q15mulr_sat_s" + | MinS -> "min_s" + | MinU -> "min_u" + | MaxS -> "max_s" + | MaxU -> "max_u" + | AvgrU -> "avgr_u" + | NarrowS -> "narrow_i" ^ double xxxx ^ "_s" + | NarrowU -> "narrow_i" ^ double xxxx ^ "_u" + | Shuffle is -> "shuffle " ^ String.concat " " (List.map nat is) + | Swizzle -> "swizzle" + + let fbinop xxxx (op : fbinop) = match op with + | Eq -> "eq" + | Ne -> "ne" + | Lt -> "lt" + | Le -> "le" + | Gt -> "gt" + | Ge -> "ge" + | Add -> "add" + | Sub -> "sub" + | Mul -> "mul" + | Div -> "div" + | Min -> "min" + | Max -> "max" + | Pmin -> "pmin" + | Pmax -> "pmax" + + let ishiftop xxxx (op : ishiftop) = match op with + | Shl -> "shl" + | ShrS -> "shr_s" + | ShrU -> "shr_u" + + let ibitmaskop xxxx (op : ibitmaskop) = match op with + | Bitmask -> "bitmask" let vtestop (op : vtestop) = match op with - | AnyTrue -> "v128.any_true" + | AnyTrue -> "any_true" let vunop (op : vunop) = match op with - | Not -> "v128.not" + | Not -> "not" let vbinop (op : vbinop) = match op with - | And -> "v128.and" - | AndNot -> "v128.andnot" - | Or -> "v128.or" - | Xor -> "v128.xor" + | And -> "and" + | AndNot -> "andnot" + | Or -> "or" + | Xor -> "xor" let vternop (op : vternop) = match op with - | Bitselect -> "v128.bitselect" - - let cvtop (op : cvtop) = match op with - | I8x16 Splat -> "i8x16.splat" - | I16x8 Splat -> "i16x8.splat" - | I32x4 Splat -> "i32x4.splat" - | I64x2 Splat -> "i64x2.splat" - | F32x4 Splat -> "f32x4.splat" - | F64x2 Splat -> "f64x2.splat" - | _ -> . - - let extractop (op : extractop) = match op with - | I8x16 (Extract (i, Some SX)) -> "i8x16.extract_lane_s " ^ nat i - | I8x16 (Extract (i, Some ZX)) -> "i8x16.extract_lane_u " ^ nat i - | I16x8 (Extract (i, Some SX)) -> "i16x8.extract_lane_s " ^ nat i - | I16x8 (Extract (i, Some ZX)) -> "i16x8.extract_lane_u " ^ nat i - | I32x4 (Extract (i, None)) -> "i32x4.extract_lane " ^ nat i - | I64x2 (Extract (i, None)) -> "i64x2.extract_lane " ^ nat i - | F32x4 (Extract (i, None)) -> "f32x4.extract_lane " ^ nat i - | F64x2 (Extract (i, None)) -> "f64x2.extract_lane " ^ nat i - | _ -> assert false + | Bitselect -> "bitselect" + + let splatop xxxx (op : nsplatop) = match op with + | Splat -> "splat" + + let pextractop xxxx (op : extension nextractop) = match op with + | Extract (i, ext) -> "extract_lane" ^ extension ext ^ " " ^ nat i - let replaceop (op : replaceop) = match op with - | I8x16 (Replace i) -> "i8x16.replace_lane " ^ nat i - | I16x8 (Replace i) -> "i16x8.replace_lane " ^ nat i - | I32x4 (Replace i) -> "i32x4.replace_lane " ^ nat i - | I64x2 (Replace i) -> "i64x2.replace_lane " ^ nat i - | F32x4 (Replace i) -> "f32x4.replace_lane " ^ nat i - | F64x2 (Replace i) -> "f64x2.replace_lane " ^ nat i - | _ -> . + let extractop xxxx (op : unit nextractop) = match op with + | Extract (i, ()) -> "extract_lane " ^ nat i + + let replaceop xxxx (op : nreplaceop) = match op with + | Replace i -> "replace_lane " ^ nat i + + let lane_oper (pop, iop, fop) op = + match op with + | I8x16 o -> pop "8x16" o + | I16x8 o -> pop "16x8" o + | I32x4 o -> iop "32x4" o + | I64x2 o -> iop "64x2" o + | F32x4 o -> fop "32x4" o + | F64x2 o -> fop "64x2" o end -let oper (intop, floatop) op = +let oper (iop, fop) op = num_type (type_of_num op) ^ "." ^ (match op with - | I32 o -> intop "32" o - | I64 o -> intop "64" o - | F32 o -> floatop "32" o - | F64 o -> floatop "64" o + | I32 o -> iop "32" o + | I64 o -> iop "64" o + | F32 o -> fop "32" o + | F64 o -> fop "64" o ) +let simd_oper (vop) op = + match op with + | V128 o -> "v128." ^ vop o + +let simd_shape_oper (pop, iop, fop) op = + match op with + | V128 o -> Simd.string_of_shape o ^ "." ^ V128Op.lane_oper (pop, iop, fop) o + let unop = oper (IntOp.unop, FloatOp.unop) let binop = oper (IntOp.binop, FloatOp.binop) let testop = oper (IntOp.testop, FloatOp.testop) let relop = oper (IntOp.relop, FloatOp.relop) let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) +let simd_unop = simd_shape_oper (V128Op.iunop, V128Op.iunop, V128Op.funop) +let simd_binop = simd_shape_oper (V128Op.ibinop, V128Op.ibinop, V128Op.fbinop) +let simd_testop = simd_shape_oper (V128Op.itestop, V128Op.itestop, V128Op.voidop) +let simd_vunop = simd_oper (V128Op.vunop) +let simd_vbinop = simd_oper (V128Op.vbinop) +let simd_vternop = simd_oper (V128Op.vternop) +let simd_vtestop = simd_oper (V128Op.vtestop) +let simd_shiftop = simd_shape_oper (V128Op.ishiftop, V128Op.ishiftop, V128Op.voidop) +let simd_bitmaskop = simd_shape_oper (V128Op.ibitmaskop, V128Op.ibitmaskop, V128Op.voidop) + +let simd_splatop = simd_shape_oper (V128Op.splatop, V128Op.splatop, V128Op.splatop) +let simd_extractop = simd_shape_oper (V128Op.pextractop, V128Op.extractop, V128Op.extractop) +let simd_replaceop = simd_shape_oper (V128Op.replaceop, V128Op.replaceop, V128Op.replaceop) + let memop name typ {ty; align; offset; _} sz = typ ty ^ "." ^ name ^ (if offset = 0l then "" else " offset=" ^ nat32 offset) ^ @@ -498,6 +417,7 @@ let var x = nat32 x.it let num v = string_of_num v.it let simd v = string_of_simd v.it let constop v = num_type (type_of_num v) ^ ".const" +let simd_constop v = simd_type (type_of_simd v) ^ ".const i32x4" let block_type = function | VarBlockType x -> [Node ("type " ^ var x, [])] @@ -559,19 +479,19 @@ let rec instr e = | Unary op -> unop op, [] | Binary op -> binop op, [] | Convert op -> cvtop op, [] - | SimdConst n -> "v128.const i32x4 " ^ simd n, [] - | SimdTest (V128 op) -> V128Op.testop op, [] - | SimdUnary (V128 op) -> V128Op.unop op, [] - | SimdBinary (V128 op) -> V128Op.binop op, [] - | SimdTestVec (V128 op) -> V128Op.vtestop op, [] - | SimdUnaryVec (V128 op) -> V128Op.vunop op, [] - | SimdBinaryVec (V128 op) -> V128Op.vbinop op, [] - | SimdTernaryVec (V128 op) -> V128Op.vternop op, [] - | SimdShift (V128 op) -> V128Op.shiftop op, [] - | SimdBitmask (V128 op) -> V128Op.bitmaskop op, [] - | SimdConvert (V128 op) -> V128Op.cvtop op, [] - | SimdExtract (V128 op) -> V128Op.extractop op, [] - | SimdReplace (V128 op) -> V128Op.replaceop op, [] + | SimdConst v -> simd_constop v.it ^ " " ^ simd v, [] + | SimdTest op -> simd_testop op, [] + | SimdUnary op -> simd_unop op, [] + | SimdBinary op -> simd_binop op, [] + | SimdTestVec op -> simd_vtestop op, [] + | SimdUnaryVec op -> simd_vunop op, [] + | SimdBinaryVec op -> simd_vbinop op, [] + | SimdTernaryVec op -> simd_vternop op, [] + | SimdShift op -> simd_shiftop op, [] + | SimdBitmask op -> simd_bitmaskop op, [] + | SimdSplat op -> simd_splatop op, [] + | SimdExtract op -> simd_extractop op, [] + | SimdReplace op -> simd_replaceop op, [] in Node (head, inner) let const head c = @@ -737,7 +657,7 @@ let ref_ = function let literal mode lit = match lit.it with | Num n -> Node (constop n ^ " " ^ num mode n, []) - | Simd v -> Node ("v128.const i32x4 " ^ simd mode v, []) + | Simd v -> Node (simd_constop v ^ " " ^ simd mode v, []) | Ref r -> ref_ r let definition mode x_opt def = @@ -791,15 +711,15 @@ let num_pat mode = function let lane_pat mode pat shape = let choose fb ft = if mode = `Binary then fb else ft in match pat, shape with - | NumPat {it = Values.I32 i; _}, Simd.I8x16 -> + | NumPat {it = Values.I32 i; _}, Simd.I8x16 () -> choose I8.to_hex_string I8.to_string_s i - | NumPat {it = Values.I32 i; _}, Simd.I16x8 -> + | NumPat {it = Values.I32 i; _}, Simd.I16x8 () -> choose I16.to_hex_string I16.to_string_s i | NumPat n, _ -> num mode n.it | NanPat nan, _ -> nanop nan let simd_pat mode = function - | SimdPat (shape, pats) -> + | SimdPat (V128 (shape, pats)) -> let lanes = List.map (fun p -> Atom (lane_pat mode p shape)) pats in Node ("v128.const " ^ Simd.string_of_shape shape, lanes) diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index ea7da28e74..8eb50a57cd 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -18,6 +18,8 @@ let error_nest start lexbuf msg = lexbuf.Lexing.lex_start_p <- start; error lexbuf msg +let unknown lexbuf = error lexbuf ("unknown operator " ^ Lexing.lexeme lexbuf) + let string s = let b = Buffer.create (String.length s) in let i = ref 1 in @@ -116,21 +118,21 @@ let ext e s u = let opt = Lib.Option.get let simd_shape = function - | "i8x16" -> Simd.I8x16 - | "i16x8" -> Simd.I16x8 - | "i32x4" -> Simd.I32x4 - | "i64x2" -> Simd.I64x2 - | "f32x4" -> Simd.F32x4 - | "f64x2" -> Simd.F64x2 + | "i8x16" -> Simd.I8x16 () + | "i16x8" -> Simd.I16x8 () + | "i32x4" -> Simd.I32x4 () + | "i64x2" -> Simd.I64x2 () + | "f32x4" -> Simd.F32x4 () + | "f64x2" -> Simd.F64x2 () | _ -> assert false let only shapes s lexbuf = if not (List.mem s shapes) then - error lexbuf "unknown operator" + unknown lexbuf let except shapes s lexbuf = if (List.mem s shapes) then - error lexbuf "unknown operator" + unknown lexbuf } let sign = '+' | '-' @@ -290,7 +292,7 @@ rule token = parse numop t (i32_store (opt a 2)) (i64_store (opt a 3)) (f32_store (opt a 2)) (f64_store (opt a 3)) o) } | (ixx as t)".load"(mem_size as sz)"_"(sign as s) - { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; + { if t = "i32" && sz = "32" then unknown lexbuf; LOAD (fun a o -> intop t (memsz sz @@ -302,7 +304,7 @@ rule token = parse (ext s i64_load16_s i64_load16_u (opt a 1)) (ext s i64_load32_s i64_load32_u (opt a 2)) o)) } | (ixx as t)".store"(mem_size as sz) - { if t = "i32" && sz = "32" then error lexbuf "unknown operator"; + { if t = "i32" && sz = "32" then unknown lexbuf; STORE (fun a o -> intop t (memsz sz @@ -681,7 +683,7 @@ rule token = parse | '\n' { Lexing.new_line lexbuf; token lexbuf } | eof { EOF } - | reserved { error lexbuf "unknown operator" } + | reserved { unknown lexbuf } | utf8 { error lexbuf "malformed operator" } | _ { error lexbuf "malformed UTF-8 encoding" } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index 1ef92daa62..b74e954a47 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -47,19 +47,19 @@ let simd f shape ss at = let simd_lane_nan shape l at = let open Values in match shape with - | Simd.F32x4 -> NanPat (F32 l @@ at) - | Simd.F64x2 -> NanPat (F64 l @@ at) + | Simd.F32x4 () -> NanPat (F32 l @@ at) + | Simd.F64x2 () -> NanPat (F64 l @@ at) | _ -> error at "invalid simd constant" let simd_lane_lit shape l at = let open Values in match shape with - | Simd.I8x16 -> NumPat (I32 (I8.of_string l) @@ at) - | Simd.I16x8 -> NumPat (I32 (I16.of_string l) @@ at) - | Simd.I32x4 -> NumPat (I32 (I32.of_string l) @@ at) - | Simd.I64x2 -> NumPat (I64 (I64.of_string l) @@ at) - | Simd.F32x4 -> NumPat (F32 (F32.of_string l) @@ at) - | Simd.F64x2 -> NumPat (F64 (F64.of_string l) @@ at) + | Simd.I8x16 () -> NumPat (I32 (I8.of_string l) @@ at) + | Simd.I16x8 () -> NumPat (I32 (I16.of_string l) @@ at) + | Simd.I32x4 () -> NumPat (I32 (I32.of_string l) @@ at) + | Simd.I64x2 () -> NumPat (I64 (I64.of_string l) @@ at) + | Simd.F32x4 () -> NumPat (F32 (F32.of_string l) @@ at) + | Simd.F64x2 () -> NumPat (F64 (F64.of_string l) @@ at) let simd_lane_index s at = match int_of_string s with @@ -1154,7 +1154,7 @@ result : | LPAR SIMD_CONST SIMD_SHAPE numpat_list RPAR { if Simd.lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; - SimdResult (SimdPat ($3, List.map (fun lit -> lit $3) $4)) @@ at () + SimdResult (SimdPat (Values.V128 ($3, List.map (fun lit -> lit $3) $4))) @@ at () } result_list : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index e8f6529bfb..ebd1834306 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -112,6 +112,8 @@ let peek i (ell, ts) = let type_num = Values.type_of_num let type_simd = Values.type_of_simd +let type_simd_lane = function + | Values.V128 laneop -> Simd.type_of_lane laneop let type_cvtop at = function | Values.I32 cvtop -> @@ -149,25 +151,24 @@ let type_cvtop at = function | DemoteF64 -> error at "invalid conversion" ), F64Type -let type_simd_cvtop at = function - | Values.V128 cvtop -> - let open V128Op in - (match cvtop with - | Values.(I8x16 Splat | I16x8 Splat | I32x4 Splat) -> I32Type - | Values.I64x2 Splat -> I64Type - | Values.F32x4 Splat -> F32Type - | Values.F64x2 Splat -> F64Type - ), V128Type - -let type_simd_lane at = function - | Values.V128 laneop -> - match laneop with - | Values.I8x16 _ -> I32Type - | Values.I16x8 _ -> I32Type - | Values.I32x4 _ -> I32Type - | Values.I64x2 _ -> I64Type - | Values.F32x4 _ -> F32Type - | Values.F64x2 _ -> F64Type +let lanes = function + | Values.V128 laneop -> Simd.lanes laneop + +let lane_extractop = function + | Values.V128 extractop -> + let open Simd in let open V128Op in + match extractop with + | I8x16 (Extract (i, _)) | I16x8 (Extract (i, _)) + | I32x4 (Extract (i, _)) | I64x2 (Extract (i, _)) + | F32x4 (Extract (i, _)) | F64x2 (Extract (i, _)) -> i + +let lane_replaceop = function + | Values.V128 replaceop -> + let open Simd in let open V128Op in + match replaceop with + | I8x16 (Replace i) | I16x8 (Replace i) + | I32x4 (Replace i) | I64x2 (Replace i) + | F32x4 (Replace i) | F64x2 (Replace i) -> i (* Expressions *) @@ -183,7 +184,7 @@ let check_unop unop at = let check_simd_binop binop at = match binop with - | Values.(V128 (I8x16 (V128Op.Shuffle is))) -> + | Values.(V128 (Simd.I8x16 (V128Op.Shuffle is))) -> if List.exists ((<=) 32) is then error at "invalid lane index" | _ -> () @@ -200,15 +201,6 @@ let check_memop (c : context) (memop : ('t, 's) memop) ty_size get_sz at = require (1 lsl memop.align <= size) at "alignment must not be larger than natural" -let check_simd_lane_index get_lane op at = - let max, op' = match op with - | Values.(V128 (I8x16 op')) -> 16, op' - | Values.(V128 (I16x8 op')) -> 8, op' - | Values.(V128 (I32x4 op')) -> 4, op' - | Values.(V128 (I64x2 op')) -> 2, op' - | Values.(V128 (F32x4 op')) -> 4, op' - | Values.(V128 (F64x2 op')) -> 2, op' - in require (get_lane op' < max) at "invalid lane index" (* * Conventions: @@ -494,20 +486,23 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type let t = SimdType (type_simd bitmaskop) in [t] --> [NumType I32Type] - | SimdConvert cvtop -> - let t1, t2 = type_simd_cvtop e.at cvtop in - [NumType t1] --> [SimdType t2] + | SimdSplat splatop -> + let t1 = type_simd_lane splatop in + let t2 = SimdType (type_simd splatop) in + [NumType t1] --> [t2] | SimdExtract extractop -> - check_simd_lane_index (fun (V128Op.Extract (i, _)) -> i) extractop e.at; let t = SimdType (type_simd extractop) in - let t2 = type_simd_lane e.at extractop in + let t2 = type_simd_lane extractop in + require (lane_extractop extractop < lanes extractop) e.at + "invalid lane index"; [t] --> [NumType t2] | SimdReplace replaceop -> - check_simd_lane_index (fun (V128Op.Replace i) -> i) replaceop e.at; let t = SimdType (type_simd replaceop) in - let t2 = type_simd_lane e.at replaceop in + let t2 = type_simd_lane replaceop in + require (lane_replaceop replaceop < lanes replaceop) e.at + "invalid lane index"; [t; NumType t2] --> [t] and check_seq (c : context) (s : infer_result_type) (es : instr list) From 6ffe701e4ec705c95b1731d6202caed7a7041d41 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Mon, 2 Aug 2021 14:42:02 +0200 Subject: [PATCH 356/378] Todos --- interpreter/exec/v128.ml | 1 + interpreter/syntax/types.ml | 1 + 2 files changed, 2 insertions(+) diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index af3f262b69..9744d44dda 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,3 +1,4 @@ +(* TODO: inline this functor, since it won't really work for other types *) include Simd.Make (struct include String diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 794fba4979..12e14739b6 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -18,6 +18,7 @@ type extern_type = | ExternMemoryType of memory_type | ExternGlobalType of global_type +(* TODO: these types should move somewhere else *) type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX type pack_shape = Pack8x8 | Pack16x4 | Pack32x2 From 08a82f9e0b158e697ab15f1a6d1ea1e739fa4661 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 3 Aug 2021 08:33:34 +0200 Subject: [PATCH 357/378] Rename Eval_numeric to Eval_num; remove Numeric_error --- interpreter/exec/eval.ml | 16 ++++++++-------- .../exec/{eval_numeric.ml => eval_num.ml} | 0 .../exec/{eval_numeric.mli => eval_num.mli} | 0 interpreter/exec/i32_convert.ml | 16 ++++++++-------- interpreter/exec/i64_convert.ml | 16 ++++++++-------- interpreter/exec/int.ml | 16 ++++++++++------ interpreter/exec/numeric_error.ml | 3 --- interpreter/valid/valid.ml | 7 ++++--- 8 files changed, 38 insertions(+), 36 deletions(-) rename interpreter/exec/{eval_numeric.ml => eval_num.ml} (100%) rename interpreter/exec/{eval_numeric.mli => eval_num.mli} (100%) delete mode 100644 interpreter/exec/numeric_error.ml diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index b4bfd99356..a00ce57528 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -32,9 +32,9 @@ let memory_error at = function | exn -> raise exn let numeric_error at = function - | Numeric_error.IntegerOverflow -> "integer overflow" - | Numeric_error.IntegerDivideByZero -> "integer divide by zero" - | Numeric_error.InvalidConversionToInteger -> "invalid conversion to integer" + | Int.Overflow -> "integer overflow" + | Int.DivideByZero -> "integer divide by zero" + | Int.InvalidConversion -> "invalid conversion to integer" | Values.TypeError (i, v, t) -> Crash.error at ("type error, expected " ^ Types.string_of_num_type t ^ " as operand " ^ @@ -502,23 +502,23 @@ let rec step (c : config) : config = Num n.it :: vs, [] | Test testop, Num n :: vs' -> - (try value_of_bool (Eval_numeric.eval_testop testop n) :: vs', [] + (try value_of_bool (Eval_num.eval_testop testop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | Compare relop, Num n2 :: Num n1 :: vs' -> - (try value_of_bool (Eval_numeric.eval_relop relop n1 n2) :: vs', [] + (try value_of_bool (Eval_num.eval_relop relop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | Unary unop, Num n :: vs' -> - (try Num (Eval_numeric.eval_unop unop n) :: vs', [] + (try Num (Eval_num.eval_unop unop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | Binary binop, Num n2 :: Num n1 :: vs' -> - (try Num (Eval_numeric.eval_binop binop n1 n2) :: vs', [] + (try Num (Eval_num.eval_binop binop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | Convert cvtop, Num n :: vs' -> - (try Num (Eval_numeric.eval_cvtop cvtop n) :: vs', [] + (try Num (Eval_num.eval_cvtop cvtop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | SimdConst v, vs -> diff --git a/interpreter/exec/eval_numeric.ml b/interpreter/exec/eval_num.ml similarity index 100% rename from interpreter/exec/eval_numeric.ml rename to interpreter/exec/eval_num.ml diff --git a/interpreter/exec/eval_numeric.mli b/interpreter/exec/eval_num.mli similarity index 100% rename from interpreter/exec/eval_numeric.mli rename to interpreter/exec/eval_num.mli diff --git a/interpreter/exec/i32_convert.ml b/interpreter/exec/i32_convert.ml index 05814fa498..03cb413131 100644 --- a/interpreter/exec/i32_convert.ml +++ b/interpreter/exec/i32_convert.ml @@ -4,41 +4,41 @@ let wrap_i64 x = Int64.to_int32 x let trunc_f32_s x = if F32.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int32.(to_float min_int) || xf < Int32.(to_float min_int) then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int32.of_float xf let trunc_f32_u x = if F32.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int32.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int64.(to_int32 (of_float xf)) let trunc_f64_s x = if F64.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int32.(to_float min_int) || xf <= Int32.(to_float min_int) -. 1.0 then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int32.of_float xf let trunc_f64_u x = if F64.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int32.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int64.(to_int32 (of_float xf)) diff --git a/interpreter/exec/i64_convert.ml b/interpreter/exec/i64_convert.ml index 0c14e6c4ca..9c27c3d358 100644 --- a/interpreter/exec/i64_convert.ml +++ b/interpreter/exec/i64_convert.ml @@ -6,21 +6,21 @@ let extend_i32_u x = Int64.logand (Int64.of_int32 x) 0x0000_0000_ffff_ffffL let trunc_f32_s x = if F32.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int64.(to_float min_int) || xf < Int64.(to_float min_int) then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int64.of_float xf let trunc_f32_u x = if F32.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int64.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else if xf >= -.Int64.(to_float min_int) then Int64.(logxor (of_float (xf -. 0x1p63)) min_int) else @@ -28,21 +28,21 @@ let trunc_f32_u x = let trunc_f64_s x = if F64.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int64.(to_float min_int) || xf < Int64.(to_float min_int) then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else Int64.of_float xf let trunc_f64_u x = if F64.ne x x then - raise Numeric_error.InvalidConversionToInteger + raise Int.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int64.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Numeric_error.IntegerOverflow + raise Int.Overflow else if xf >= -.Int64.(to_float min_int) then Int64.(logxor (of_float (xf -. 0x1p63)) min_int) else diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index a10650e214..fb0a3b0075 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -1,3 +1,7 @@ +exception Overflow +exception DivideByZero +exception InvalidConversion + module type RepType = sig type t @@ -13,8 +17,8 @@ sig val add : t -> t -> t val sub : t -> t -> t val mul : t -> t -> t - val div : t -> t -> t (* raises Division_by_zero *) - val rem : t -> t -> t (* raises Division_by_zero *) + val div : t -> t -> t (* raises DivideByZero *) + val rem : t -> t -> t (* raises DivideByZero *) val logand : t -> t -> t val lognot : t -> t @@ -121,7 +125,7 @@ struct * "Unsigned Short Division from Signed Division". *) let divrem_u n d = - if d = Rep.zero then raise Numeric_error.IntegerDivideByZero else + if d = Rep.zero then raise DivideByZero else let t = Rep.shift_right d (Rep.bitwidth - 1) in let n' = Rep.logand n (Rep.lognot t) in let q = Rep.shift_left (Rep.div (Rep.shift_right_logical n' 1) d) 1 in @@ -153,9 +157,9 @@ struct (* result is truncated toward zero *) let div_s x y = if y = Rep.zero then - raise Numeric_error.IntegerDivideByZero + raise DivideByZero else if x = Rep.min_int && y = Rep.minus_one then - raise Numeric_error.IntegerOverflow + raise Overflow else Rep.div x y @@ -166,7 +170,7 @@ struct (* result has the sign of the dividend *) let rem_s x y = if y = Rep.zero then - raise Numeric_error.IntegerDivideByZero + raise DivideByZero else Rep.rem x y diff --git a/interpreter/exec/numeric_error.ml b/interpreter/exec/numeric_error.ml deleted file mode 100644 index 0dcf7bc19d..0000000000 --- a/interpreter/exec/numeric_error.ml +++ /dev/null @@ -1,3 +0,0 @@ -exception IntegerOverflow -exception IntegerDivideByZero -exception InvalidConversionToInteger diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index ebd1834306..110adb5c4f 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -241,13 +241,14 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | Select None -> let t = peek 1 s in - require (match t with None -> true | Some t -> is_num_type t) e.at - ("type mismatch: instruction requires numeric type" ^ + require (match t with None -> true | Some t -> is_num_type t || is_simd_type t) e.at + ("type mismatch: instruction requires numeric or SIMD type" ^ " but stack has " ^ string_of_infer_type t); [t; t; Some (NumType I32Type)] -~> [t] | Select (Some ts) -> - require (List.length ts = 1) e.at "invalid result arity other than 1 is not (yet) allowed"; + require (List.length ts = 1) e.at + "invalid result arity other than 1 is not (yet) allowed"; (ts @ ts @ [NumType I32Type]) --> ts | Block (bt, es) -> From da4e92691ee920df3e7f12587c8c3e5eb93df4fa Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 3 Aug 2021 11:40:11 +0200 Subject: [PATCH 358/378] Inline Simd functor; simplifications --- interpreter/binary/encode.ml | 418 ++++++++++++------------ interpreter/exec/eval_simd.ml | 16 +- interpreter/exec/i16.ml | 6 +- interpreter/exec/i8.ml | 6 +- interpreter/exec/int.ml | 6 +- interpreter/exec/simd.ml | 547 -------------------------------- interpreter/exec/v128.ml | 532 +++++++++++++++++++++++++++---- interpreter/exec/v128.mli | 211 ++++++++++++ interpreter/host/spectest.ml | 2 +- interpreter/script/js.ml | 42 ++- interpreter/script/run.ml | 15 +- interpreter/script/script.ml | 2 +- interpreter/syntax/ast.ml | 16 +- interpreter/syntax/operators.ml | 414 ++++++++++++------------ interpreter/text/arrange.ml | 21 +- interpreter/text/lexer.mll | 188 +++++------ interpreter/text/parser.mly | 22 +- interpreter/valid/valid.ml | 16 +- 18 files changed, 1282 insertions(+), 1198 deletions(-) delete mode 100644 interpreter/exec/simd.ml create mode 100644 interpreter/exec/v128.mli diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 133446153b..567ec483ab 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -135,7 +135,7 @@ struct open Source open Ast open Values - open Simd + open V128 let op n = u8 n let simd_op n = op 0xfd; vu32 n @@ -459,180 +459,180 @@ struct | SimdConst {it = V128 c; _} -> simd_op 0x0cl; v128 c - | SimdTest (V128 V128Op.(I8x16 AllTrue)) -> simd_op 0x63l - | SimdTest (V128 V128Op.(I16x8 AllTrue)) -> simd_op 0x83l - | SimdTest (V128 V128Op.(I32x4 AllTrue)) -> simd_op 0xa3l - | SimdTest (V128 V128Op.(I64x2 AllTrue)) -> simd_op 0xc3l + | SimdTest (V128 (I8x16 V128Op.AllTrue)) -> simd_op 0x63l + | SimdTest (V128 (I16x8 V128Op.AllTrue)) -> simd_op 0x83l + | SimdTest (V128 (I32x4 V128Op.AllTrue)) -> simd_op 0xa3l + | SimdTest (V128 (I64x2 V128Op.AllTrue)) -> simd_op 0xc3l | SimdTest (V128 _) -> . - | SimdUnary (V128 V128Op.(I8x16 Abs)) -> simd_op 0x60l - | SimdUnary (V128 V128Op.(I8x16 Neg)) -> simd_op 0x61l - | SimdUnary (V128 V128Op.(I8x16 Popcnt)) -> simd_op 0x62l - | SimdUnary (V128 V128Op.(I16x8 Abs)) -> simd_op 0x80l - | SimdUnary (V128 V128Op.(I16x8 Neg)) -> simd_op 0x81l - | SimdUnary (V128 V128Op.(I16x8 ExtendLowS)) -> simd_op 0x87l - | SimdUnary (V128 V128Op.(I16x8 ExtendHighS)) -> simd_op 0x88l - | SimdUnary (V128 V128Op.(I16x8 ExtendLowU)) -> simd_op 0x89l - | SimdUnary (V128 V128Op.(I16x8 ExtendHighU)) -> simd_op 0x8al - | SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -> simd_op 0x7cl - | SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseU)) -> simd_op 0x7dl - | SimdUnary (V128 V128Op.(I32x4 Abs)) -> simd_op 0xa0l - | SimdUnary (V128 V128Op.(I32x4 Neg)) -> simd_op 0xa1l - | SimdUnary (V128 V128Op.(I32x4 ExtendLowS)) -> simd_op 0xa7l - | SimdUnary (V128 V128Op.(I32x4 ExtendHighS)) -> simd_op 0xa8l - | SimdUnary (V128 V128Op.(I32x4 ExtendLowU)) -> simd_op 0xa9l - | SimdUnary (V128 V128Op.(I32x4 ExtendHighU)) -> simd_op 0xaal - | SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -> simd_op 0x7el - | SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseU)) -> simd_op 0x7fl - | SimdUnary (V128 V128Op.(I64x2 Abs)) -> simd_op 0xc0l - | SimdUnary (V128 V128Op.(I64x2 Neg)) -> simd_op 0xc1l - | SimdUnary (V128 V128Op.(I64x2 ExtendLowS)) -> simd_op 0xc7l - | SimdUnary (V128 V128Op.(I64x2 ExtendHighS)) -> simd_op 0xc8l - | SimdUnary (V128 V128Op.(I64x2 ExtendLowU)) -> simd_op 0xc9l - | SimdUnary (V128 V128Op.(I64x2 ExtendHighU)) -> simd_op 0xcal - | SimdUnary (V128 V128Op.(F32x4 Ceil)) -> simd_op 0x67l - | SimdUnary (V128 V128Op.(F32x4 Floor)) -> simd_op 0x68l - | SimdUnary (V128 V128Op.(F32x4 Trunc)) -> simd_op 0x69l - | SimdUnary (V128 V128Op.(F32x4 Nearest)) -> simd_op 0x6al - | SimdUnary (V128 V128Op.(F64x2 Ceil)) -> simd_op 0x74l - | SimdUnary (V128 V128Op.(F64x2 Floor)) -> simd_op 0x75l - | SimdUnary (V128 V128Op.(F64x2 Trunc)) -> simd_op 0x7al - | SimdUnary (V128 V128Op.(F64x2 Nearest)) -> simd_op 0x94l - | SimdUnary (V128 V128Op.(F32x4 Abs)) -> simd_op 0xe0l - | SimdUnary (V128 V128Op.(F32x4 Neg)) -> simd_op 0xe1l - | SimdUnary (V128 V128Op.(F32x4 Sqrt)) -> simd_op 0xe3l - | SimdUnary (V128 V128Op.(F64x2 Abs)) -> simd_op 0xecl - | SimdUnary (V128 V128Op.(F64x2 Neg)) -> simd_op 0xedl - | SimdUnary (V128 V128Op.(F64x2 Sqrt)) -> simd_op 0xefl - | SimdUnary (V128 V128Op.(I32x4 TruncSatSF32x4)) -> simd_op 0xf8l - | SimdUnary (V128 V128Op.(I32x4 TruncSatUF32x4)) -> simd_op 0xf9l - | SimdUnary (V128 V128Op.(I32x4 TruncSatSZeroF64x2)) -> simd_op 0xfcl - | SimdUnary (V128 V128Op.(I32x4 TruncSatUZeroF64x2)) -> simd_op 0xfdl - | SimdUnary (V128 V128Op.(F32x4 ConvertSI32x4)) -> simd_op 0xfal - | SimdUnary (V128 V128Op.(F32x4 ConvertUI32x4)) -> simd_op 0xfbl - | SimdUnary (V128 V128Op.(F32x4 DemoteZeroF64x2)) -> simd_op 0x5el - | SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) -> simd_op 0x5fl - | SimdUnary (V128 V128Op.(F64x2 ConvertSI32x4)) -> simd_op 0xfel - | SimdUnary (V128 V128Op.(F64x2 ConvertUI32x4)) -> simd_op 0xffl + | SimdUnary (V128 (I8x16 V128Op.Abs)) -> simd_op 0x60l + | SimdUnary (V128 (I8x16 V128Op.Neg)) -> simd_op 0x61l + | SimdUnary (V128 (I8x16 V128Op.Popcnt)) -> simd_op 0x62l + | SimdUnary (V128 (I16x8 V128Op.Abs)) -> simd_op 0x80l + | SimdUnary (V128 (I16x8 V128Op.Neg)) -> simd_op 0x81l + | SimdUnary (V128 (I16x8 V128Op.ExtendLowS)) -> simd_op 0x87l + | SimdUnary (V128 (I16x8 V128Op.ExtendHighS)) -> simd_op 0x88l + | SimdUnary (V128 (I16x8 V128Op.ExtendLowU)) -> simd_op 0x89l + | SimdUnary (V128 (I16x8 V128Op.ExtendHighU)) -> simd_op 0x8al + | SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -> simd_op 0x7cl + | SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -> simd_op 0x7dl + | SimdUnary (V128 (I32x4 V128Op.Abs)) -> simd_op 0xa0l + | SimdUnary (V128 (I32x4 V128Op.Neg)) -> simd_op 0xa1l + | SimdUnary (V128 (I32x4 V128Op.ExtendLowS)) -> simd_op 0xa7l + | SimdUnary (V128 (I32x4 V128Op.ExtendHighS)) -> simd_op 0xa8l + | SimdUnary (V128 (I32x4 V128Op.ExtendLowU)) -> simd_op 0xa9l + | SimdUnary (V128 (I32x4 V128Op.ExtendHighU)) -> simd_op 0xaal + | SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -> simd_op 0x7el + | SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -> simd_op 0x7fl + | SimdUnary (V128 (I64x2 V128Op.Abs)) -> simd_op 0xc0l + | SimdUnary (V128 (I64x2 V128Op.Neg)) -> simd_op 0xc1l + | SimdUnary (V128 (I64x2 V128Op.ExtendLowS)) -> simd_op 0xc7l + | SimdUnary (V128 (I64x2 V128Op.ExtendHighS)) -> simd_op 0xc8l + | SimdUnary (V128 (I64x2 V128Op.ExtendLowU)) -> simd_op 0xc9l + | SimdUnary (V128 (I64x2 V128Op.ExtendHighU)) -> simd_op 0xcal + | SimdUnary (V128 (F32x4 V128Op.Ceil)) -> simd_op 0x67l + | SimdUnary (V128 (F32x4 V128Op.Floor)) -> simd_op 0x68l + | SimdUnary (V128 (F32x4 V128Op.Trunc)) -> simd_op 0x69l + | SimdUnary (V128 (F32x4 V128Op.Nearest)) -> simd_op 0x6al + | SimdUnary (V128 (F64x2 V128Op.Ceil)) -> simd_op 0x74l + | SimdUnary (V128 (F64x2 V128Op.Floor)) -> simd_op 0x75l + | SimdUnary (V128 (F64x2 V128Op.Trunc)) -> simd_op 0x7al + | SimdUnary (V128 (F64x2 V128Op.Nearest)) -> simd_op 0x94l + | SimdUnary (V128 (F32x4 V128Op.Abs)) -> simd_op 0xe0l + | SimdUnary (V128 (F32x4 V128Op.Neg)) -> simd_op 0xe1l + | SimdUnary (V128 (F32x4 V128Op.Sqrt)) -> simd_op 0xe3l + | SimdUnary (V128 (F64x2 V128Op.Abs)) -> simd_op 0xecl + | SimdUnary (V128 (F64x2 V128Op.Neg)) -> simd_op 0xedl + | SimdUnary (V128 (F64x2 V128Op.Sqrt)) -> simd_op 0xefl + | SimdUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -> simd_op 0xf8l + | SimdUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -> simd_op 0xf9l + | SimdUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -> simd_op 0xfcl + | SimdUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -> simd_op 0xfdl + | SimdUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -> simd_op 0xfal + | SimdUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -> simd_op 0xfbl + | SimdUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -> simd_op 0x5el + | SimdUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -> simd_op 0x5fl + | SimdUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -> simd_op 0xfel + | SimdUnary (V128 (F64x2 V128Op.ConvertUI32x4)) -> simd_op 0xffl | SimdUnary (V128 _) -> assert false - | SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) -> simd_op 0x0dl; List.iter u8 is - | SimdBinary (V128 V128Op.(I8x16 Swizzle)) -> simd_op 0x0el - | SimdBinary (V128 V128Op.(I8x16 Eq)) -> simd_op 0x23l - | SimdBinary (V128 V128Op.(I8x16 Ne)) -> simd_op 0x24l - | SimdBinary (V128 V128Op.(I8x16 LtS)) -> simd_op 0x25l - | SimdBinary (V128 V128Op.(I8x16 LtU)) -> simd_op 0x26l - | SimdBinary (V128 V128Op.(I8x16 GtS)) -> simd_op 0x27l - | SimdBinary (V128 V128Op.(I8x16 GtU)) -> simd_op 0x28l - | SimdBinary (V128 V128Op.(I8x16 LeS)) -> simd_op 0x29l - | SimdBinary (V128 V128Op.(I8x16 LeU)) -> simd_op 0x2al - | SimdBinary (V128 V128Op.(I8x16 GeS)) -> simd_op 0x2bl - | SimdBinary (V128 V128Op.(I8x16 GeU)) -> simd_op 0x2cl - | SimdBinary (V128 V128Op.(I8x16 NarrowS)) -> simd_op 0x65l - | SimdBinary (V128 V128Op.(I8x16 NarrowU)) -> simd_op 0x66l - | SimdBinary (V128 V128Op.(I8x16 Add)) -> simd_op 0x6el - | SimdBinary (V128 V128Op.(I8x16 AddSatS)) -> simd_op 0x6fl - | SimdBinary (V128 V128Op.(I8x16 AddSatU)) -> simd_op 0x70l - | SimdBinary (V128 V128Op.(I8x16 Sub)) -> simd_op 0x71l - | SimdBinary (V128 V128Op.(I8x16 SubSatS)) -> simd_op 0x72l - | SimdBinary (V128 V128Op.(I8x16 SubSatU)) -> simd_op 0x73l - | SimdBinary (V128 V128Op.(I8x16 MinS)) -> simd_op 0x76l - | SimdBinary (V128 V128Op.(I8x16 MinU)) -> simd_op 0x77l - | SimdBinary (V128 V128Op.(I8x16 MaxS)) -> simd_op 0x78l - | SimdBinary (V128 V128Op.(I8x16 MaxU)) -> simd_op 0x79l - | SimdBinary (V128 V128Op.(I8x16 AvgrU)) -> simd_op 0x7bl - | SimdBinary (V128 V128Op.(I16x8 Eq)) -> simd_op 0x2dl - | SimdBinary (V128 V128Op.(I16x8 Ne)) -> simd_op 0x2el - | SimdBinary (V128 V128Op.(I16x8 LtS)) -> simd_op 0x2fl - | SimdBinary (V128 V128Op.(I16x8 LtU)) -> simd_op 0x30l - | SimdBinary (V128 V128Op.(I16x8 GtS)) -> simd_op 0x31l - | SimdBinary (V128 V128Op.(I16x8 GtU)) -> simd_op 0x32l - | SimdBinary (V128 V128Op.(I16x8 LeS)) -> simd_op 0x33l - | SimdBinary (V128 V128Op.(I16x8 LeU)) -> simd_op 0x34l - | SimdBinary (V128 V128Op.(I16x8 GeS)) -> simd_op 0x35l - | SimdBinary (V128 V128Op.(I16x8 GeU)) -> simd_op 0x36l - | SimdBinary (V128 V128Op.(I16x8 NarrowS)) -> simd_op 0x85l - | SimdBinary (V128 V128Op.(I16x8 NarrowU)) -> simd_op 0x86l - | SimdBinary (V128 V128Op.(I16x8 Add)) -> simd_op 0x8el - | SimdBinary (V128 V128Op.(I16x8 AddSatS)) -> simd_op 0x8fl - | SimdBinary (V128 V128Op.(I16x8 AddSatU)) -> simd_op 0x90l - | SimdBinary (V128 V128Op.(I16x8 Sub)) -> simd_op 0x91l - | SimdBinary (V128 V128Op.(I16x8 SubSatS)) -> simd_op 0x92l - | SimdBinary (V128 V128Op.(I16x8 SubSatU)) -> simd_op 0x93l - | SimdBinary (V128 V128Op.(I16x8 Mul)) -> simd_op 0x95l - | SimdBinary (V128 V128Op.(I16x8 MinS)) -> simd_op 0x96l - | SimdBinary (V128 V128Op.(I16x8 MinU)) -> simd_op 0x97l - | SimdBinary (V128 V128Op.(I16x8 MaxS)) -> simd_op 0x98l - | SimdBinary (V128 V128Op.(I16x8 MaxU)) -> simd_op 0x99l - | SimdBinary (V128 V128Op.(I16x8 AvgrU)) -> simd_op 0x9bl - | SimdBinary (V128 V128Op.(I16x8 ExtMulLowS)) -> simd_op 0x9cl - | SimdBinary (V128 V128Op.(I16x8 ExtMulHighS)) -> simd_op 0x9dl - | SimdBinary (V128 V128Op.(I16x8 ExtMulLowU)) -> simd_op 0x9el - | SimdBinary (V128 V128Op.(I16x8 ExtMulHighU)) -> simd_op 0x9fl - | SimdBinary (V128 V128Op.(I16x8 Q15MulRSatS)) -> simd_op 0x82l - | SimdBinary (V128 V128Op.(I32x4 Add)) -> simd_op 0xael - | SimdBinary (V128 V128Op.(I32x4 Sub)) -> simd_op 0xb1l - | SimdBinary (V128 V128Op.(I32x4 MinS)) -> simd_op 0xb6l - | SimdBinary (V128 V128Op.(I32x4 MinU)) -> simd_op 0xb7l - | SimdBinary (V128 V128Op.(I32x4 MaxS)) -> simd_op 0xb8l - | SimdBinary (V128 V128Op.(I32x4 MaxU)) -> simd_op 0xb9l - | SimdBinary (V128 V128Op.(I32x4 DotS)) -> simd_op 0xbal - | SimdBinary (V128 V128Op.(I32x4 Mul)) -> simd_op 0xb5l - | SimdBinary (V128 V128Op.(I32x4 Eq)) -> simd_op 0x37l - | SimdBinary (V128 V128Op.(I32x4 Ne)) -> simd_op 0x38l - | SimdBinary (V128 V128Op.(I32x4 LtS)) -> simd_op 0x39l - | SimdBinary (V128 V128Op.(I32x4 LtU)) -> simd_op 0x3al - | SimdBinary (V128 V128Op.(I32x4 GtS)) -> simd_op 0x3bl - | SimdBinary (V128 V128Op.(I32x4 GtU)) -> simd_op 0x3cl - | SimdBinary (V128 V128Op.(I32x4 LeS)) -> simd_op 0x3dl - | SimdBinary (V128 V128Op.(I32x4 LeU)) -> simd_op 0x3el - | SimdBinary (V128 V128Op.(I32x4 GeS)) -> simd_op 0x3fl - | SimdBinary (V128 V128Op.(I32x4 GeU)) -> simd_op 0x40l - | SimdBinary (V128 V128Op.(I32x4 ExtMulLowS)) -> simd_op 0xbcl - | SimdBinary (V128 V128Op.(I32x4 ExtMulHighS)) -> simd_op 0xbdl - | SimdBinary (V128 V128Op.(I32x4 ExtMulLowU)) -> simd_op 0xbel - | SimdBinary (V128 V128Op.(I32x4 ExtMulHighU)) -> simd_op 0xbfl - | SimdBinary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel - | SimdBinary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l - | SimdBinary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l - | SimdBinary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xd6l - | SimdBinary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd7l - | SimdBinary (V128 V128Op.(I64x2 LtS)) -> simd_op 0xd8l - | SimdBinary (V128 V128Op.(I64x2 GtS)) -> simd_op 0xd9l - | SimdBinary (V128 V128Op.(I64x2 LeS)) -> simd_op 0xdal - | SimdBinary (V128 V128Op.(I64x2 GeS)) -> simd_op 0xdbl - | SimdBinary (V128 V128Op.(I64x2 ExtMulLowS)) -> simd_op 0xdcl - | SimdBinary (V128 V128Op.(I64x2 ExtMulHighS)) -> simd_op 0xddl - | SimdBinary (V128 V128Op.(I64x2 ExtMulLowU)) -> simd_op 0xdel - | SimdBinary (V128 V128Op.(I64x2 ExtMulHighU)) -> simd_op 0xdfl - | SimdBinary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l - | SimdBinary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l - | SimdBinary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l - | SimdBinary (V128 V128Op.(F32x4 Gt)) -> simd_op 0x44l - | SimdBinary (V128 V128Op.(F32x4 Le)) -> simd_op 0x45l - | SimdBinary (V128 V128Op.(F32x4 Ge)) -> simd_op 0x46l - | SimdBinary (V128 V128Op.(F32x4 Add)) -> simd_op 0xe4l - | SimdBinary (V128 V128Op.(F32x4 Sub)) -> simd_op 0xe5l - | SimdBinary (V128 V128Op.(F32x4 Mul)) -> simd_op 0xe6l - | SimdBinary (V128 V128Op.(F32x4 Div)) -> simd_op 0xe7l - | SimdBinary (V128 V128Op.(F32x4 Min)) -> simd_op 0xe8l - | SimdBinary (V128 V128Op.(F32x4 Max)) -> simd_op 0xe9l - | SimdBinary (V128 V128Op.(F32x4 Pmin)) -> simd_op 0xeal - | SimdBinary (V128 V128Op.(F32x4 Pmax)) -> simd_op 0xebl - | SimdBinary (V128 V128Op.(F64x2 Eq)) -> simd_op 0x47l - | SimdBinary (V128 V128Op.(F64x2 Ne)) -> simd_op 0x48l - | SimdBinary (V128 V128Op.(F64x2 Lt)) -> simd_op 0x49l - | SimdBinary (V128 V128Op.(F64x2 Gt)) -> simd_op 0x4al - | SimdBinary (V128 V128Op.(F64x2 Le)) -> simd_op 0x4bl - | SimdBinary (V128 V128Op.(F64x2 Ge)) -> simd_op 0x4cl - | SimdBinary (V128 V128Op.(F64x2 Add)) -> simd_op 0xf0l - | SimdBinary (V128 V128Op.(F64x2 Sub)) -> simd_op 0xf1l - | SimdBinary (V128 V128Op.(F64x2 Mul)) -> simd_op 0xf2l - | SimdBinary (V128 V128Op.(F64x2 Div)) -> simd_op 0xf3l - | SimdBinary (V128 V128Op.(F64x2 Min)) -> simd_op 0xf4l - | SimdBinary (V128 V128Op.(F64x2 Max)) -> simd_op 0xf5l - | SimdBinary (V128 V128Op.(F64x2 Pmin)) -> simd_op 0xf6l - | SimdBinary (V128 V128Op.(F64x2 Pmax)) -> simd_op 0xf7l + | SimdBinary (V128 (I8x16 (V128Op.Shuffle is))) -> simd_op 0x0dl; List.iter u8 is + | SimdBinary (V128 (I8x16 V128Op.Swizzle)) -> simd_op 0x0el + | SimdBinary (V128 (I8x16 V128Op.Eq)) -> simd_op 0x23l + | SimdBinary (V128 (I8x16 V128Op.Ne)) -> simd_op 0x24l + | SimdBinary (V128 (I8x16 V128Op.LtS)) -> simd_op 0x25l + | SimdBinary (V128 (I8x16 V128Op.LtU)) -> simd_op 0x26l + | SimdBinary (V128 (I8x16 V128Op.GtS)) -> simd_op 0x27l + | SimdBinary (V128 (I8x16 V128Op.GtU)) -> simd_op 0x28l + | SimdBinary (V128 (I8x16 V128Op.LeS)) -> simd_op 0x29l + | SimdBinary (V128 (I8x16 V128Op.LeU)) -> simd_op 0x2al + | SimdBinary (V128 (I8x16 V128Op.GeS)) -> simd_op 0x2bl + | SimdBinary (V128 (I8x16 V128Op.GeU)) -> simd_op 0x2cl + | SimdBinary (V128 (I8x16 V128Op.NarrowS)) -> simd_op 0x65l + | SimdBinary (V128 (I8x16 V128Op.NarrowU)) -> simd_op 0x66l + | SimdBinary (V128 (I8x16 V128Op.Add)) -> simd_op 0x6el + | SimdBinary (V128 (I8x16 V128Op.AddSatS)) -> simd_op 0x6fl + | SimdBinary (V128 (I8x16 V128Op.AddSatU)) -> simd_op 0x70l + | SimdBinary (V128 (I8x16 V128Op.Sub)) -> simd_op 0x71l + | SimdBinary (V128 (I8x16 V128Op.SubSatS)) -> simd_op 0x72l + | SimdBinary (V128 (I8x16 V128Op.SubSatU)) -> simd_op 0x73l + | SimdBinary (V128 (I8x16 V128Op.MinS)) -> simd_op 0x76l + | SimdBinary (V128 (I8x16 V128Op.MinU)) -> simd_op 0x77l + | SimdBinary (V128 (I8x16 V128Op.MaxS)) -> simd_op 0x78l + | SimdBinary (V128 (I8x16 V128Op.MaxU)) -> simd_op 0x79l + | SimdBinary (V128 (I8x16 V128Op.AvgrU)) -> simd_op 0x7bl + | SimdBinary (V128 (I16x8 V128Op.Eq)) -> simd_op 0x2dl + | SimdBinary (V128 (I16x8 V128Op.Ne)) -> simd_op 0x2el + | SimdBinary (V128 (I16x8 V128Op.LtS)) -> simd_op 0x2fl + | SimdBinary (V128 (I16x8 V128Op.LtU)) -> simd_op 0x30l + | SimdBinary (V128 (I16x8 V128Op.GtS)) -> simd_op 0x31l + | SimdBinary (V128 (I16x8 V128Op.GtU)) -> simd_op 0x32l + | SimdBinary (V128 (I16x8 V128Op.LeS)) -> simd_op 0x33l + | SimdBinary (V128 (I16x8 V128Op.LeU)) -> simd_op 0x34l + | SimdBinary (V128 (I16x8 V128Op.GeS)) -> simd_op 0x35l + | SimdBinary (V128 (I16x8 V128Op.GeU)) -> simd_op 0x36l + | SimdBinary (V128 (I16x8 V128Op.NarrowS)) -> simd_op 0x85l + | SimdBinary (V128 (I16x8 V128Op.NarrowU)) -> simd_op 0x86l + | SimdBinary (V128 (I16x8 V128Op.Add)) -> simd_op 0x8el + | SimdBinary (V128 (I16x8 V128Op.AddSatS)) -> simd_op 0x8fl + | SimdBinary (V128 (I16x8 V128Op.AddSatU)) -> simd_op 0x90l + | SimdBinary (V128 (I16x8 V128Op.Sub)) -> simd_op 0x91l + | SimdBinary (V128 (I16x8 V128Op.SubSatS)) -> simd_op 0x92l + | SimdBinary (V128 (I16x8 V128Op.SubSatU)) -> simd_op 0x93l + | SimdBinary (V128 (I16x8 V128Op.Mul)) -> simd_op 0x95l + | SimdBinary (V128 (I16x8 V128Op.MinS)) -> simd_op 0x96l + | SimdBinary (V128 (I16x8 V128Op.MinU)) -> simd_op 0x97l + | SimdBinary (V128 (I16x8 V128Op.MaxS)) -> simd_op 0x98l + | SimdBinary (V128 (I16x8 V128Op.MaxU)) -> simd_op 0x99l + | SimdBinary (V128 (I16x8 V128Op.AvgrU)) -> simd_op 0x9bl + | SimdBinary (V128 (I16x8 V128Op.ExtMulLowS)) -> simd_op 0x9cl + | SimdBinary (V128 (I16x8 V128Op.ExtMulHighS)) -> simd_op 0x9dl + | SimdBinary (V128 (I16x8 V128Op.ExtMulLowU)) -> simd_op 0x9el + | SimdBinary (V128 (I16x8 V128Op.ExtMulHighU)) -> simd_op 0x9fl + | SimdBinary (V128 (I16x8 V128Op.Q15MulRSatS)) -> simd_op 0x82l + | SimdBinary (V128 (I32x4 V128Op.Add)) -> simd_op 0xael + | SimdBinary (V128 (I32x4 V128Op.Sub)) -> simd_op 0xb1l + | SimdBinary (V128 (I32x4 V128Op.MinS)) -> simd_op 0xb6l + | SimdBinary (V128 (I32x4 V128Op.MinU)) -> simd_op 0xb7l + | SimdBinary (V128 (I32x4 V128Op.MaxS)) -> simd_op 0xb8l + | SimdBinary (V128 (I32x4 V128Op.MaxU)) -> simd_op 0xb9l + | SimdBinary (V128 (I32x4 V128Op.DotS)) -> simd_op 0xbal + | SimdBinary (V128 (I32x4 V128Op.Mul)) -> simd_op 0xb5l + | SimdBinary (V128 (I32x4 V128Op.Eq)) -> simd_op 0x37l + | SimdBinary (V128 (I32x4 V128Op.Ne)) -> simd_op 0x38l + | SimdBinary (V128 (I32x4 V128Op.LtS)) -> simd_op 0x39l + | SimdBinary (V128 (I32x4 V128Op.LtU)) -> simd_op 0x3al + | SimdBinary (V128 (I32x4 V128Op.GtS)) -> simd_op 0x3bl + | SimdBinary (V128 (I32x4 V128Op.GtU)) -> simd_op 0x3cl + | SimdBinary (V128 (I32x4 V128Op.LeS)) -> simd_op 0x3dl + | SimdBinary (V128 (I32x4 V128Op.LeU)) -> simd_op 0x3el + | SimdBinary (V128 (I32x4 V128Op.GeS)) -> simd_op 0x3fl + | SimdBinary (V128 (I32x4 V128Op.GeU)) -> simd_op 0x40l + | SimdBinary (V128 (I32x4 V128Op.ExtMulLowS)) -> simd_op 0xbcl + | SimdBinary (V128 (I32x4 V128Op.ExtMulHighS)) -> simd_op 0xbdl + | SimdBinary (V128 (I32x4 V128Op.ExtMulLowU)) -> simd_op 0xbel + | SimdBinary (V128 (I32x4 V128Op.ExtMulHighU)) -> simd_op 0xbfl + | SimdBinary (V128 (I64x2 V128Op.Add)) -> simd_op 0xcel + | SimdBinary (V128 (I64x2 V128Op.Sub)) -> simd_op 0xd1l + | SimdBinary (V128 (I64x2 V128Op.Mul)) -> simd_op 0xd5l + | SimdBinary (V128 (I64x2 V128Op.Eq)) -> simd_op 0xd6l + | SimdBinary (V128 (I64x2 V128Op.Ne)) -> simd_op 0xd7l + | SimdBinary (V128 (I64x2 V128Op.LtS)) -> simd_op 0xd8l + | SimdBinary (V128 (I64x2 V128Op.GtS)) -> simd_op 0xd9l + | SimdBinary (V128 (I64x2 V128Op.LeS)) -> simd_op 0xdal + | SimdBinary (V128 (I64x2 V128Op.GeS)) -> simd_op 0xdbl + | SimdBinary (V128 (I64x2 V128Op.ExtMulLowS)) -> simd_op 0xdcl + | SimdBinary (V128 (I64x2 V128Op.ExtMulHighS)) -> simd_op 0xddl + | SimdBinary (V128 (I64x2 V128Op.ExtMulLowU)) -> simd_op 0xdel + | SimdBinary (V128 (I64x2 V128Op.ExtMulHighU)) -> simd_op 0xdfl + | SimdBinary (V128 (F32x4 V128Op.Eq)) -> simd_op 0x41l + | SimdBinary (V128 (F32x4 V128Op.Ne)) -> simd_op 0x42l + | SimdBinary (V128 (F32x4 V128Op.Lt)) -> simd_op 0x43l + | SimdBinary (V128 (F32x4 V128Op.Gt)) -> simd_op 0x44l + | SimdBinary (V128 (F32x4 V128Op.Le)) -> simd_op 0x45l + | SimdBinary (V128 (F32x4 V128Op.Ge)) -> simd_op 0x46l + | SimdBinary (V128 (F32x4 V128Op.Add)) -> simd_op 0xe4l + | SimdBinary (V128 (F32x4 V128Op.Sub)) -> simd_op 0xe5l + | SimdBinary (V128 (F32x4 V128Op.Mul)) -> simd_op 0xe6l + | SimdBinary (V128 (F32x4 V128Op.Div)) -> simd_op 0xe7l + | SimdBinary (V128 (F32x4 V128Op.Min)) -> simd_op 0xe8l + | SimdBinary (V128 (F32x4 V128Op.Max)) -> simd_op 0xe9l + | SimdBinary (V128 (F32x4 V128Op.Pmin)) -> simd_op 0xeal + | SimdBinary (V128 (F32x4 V128Op.Pmax)) -> simd_op 0xebl + | SimdBinary (V128 (F64x2 V128Op.Eq)) -> simd_op 0x47l + | SimdBinary (V128 (F64x2 V128Op.Ne)) -> simd_op 0x48l + | SimdBinary (V128 (F64x2 V128Op.Lt)) -> simd_op 0x49l + | SimdBinary (V128 (F64x2 V128Op.Gt)) -> simd_op 0x4al + | SimdBinary (V128 (F64x2 V128Op.Le)) -> simd_op 0x4bl + | SimdBinary (V128 (F64x2 V128Op.Ge)) -> simd_op 0x4cl + | SimdBinary (V128 (F64x2 V128Op.Add)) -> simd_op 0xf0l + | SimdBinary (V128 (F64x2 V128Op.Sub)) -> simd_op 0xf1l + | SimdBinary (V128 (F64x2 V128Op.Mul)) -> simd_op 0xf2l + | SimdBinary (V128 (F64x2 V128Op.Div)) -> simd_op 0xf3l + | SimdBinary (V128 (F64x2 V128Op.Min)) -> simd_op 0xf4l + | SimdBinary (V128 (F64x2 V128Op.Max)) -> simd_op 0xf5l + | SimdBinary (V128 (F64x2 V128Op.Pmin)) -> simd_op 0xf6l + | SimdBinary (V128 (F64x2 V128Op.Pmax)) -> simd_op 0xf7l | SimdBinary (V128 _) -> assert false | SimdTestVec (V128 V128Op.AnyTrue) -> simd_op 0x53l @@ -643,48 +643,48 @@ struct | SimdBinaryVec (V128 V128Op.Xor) -> simd_op 0x51l | SimdTernaryVec (V128 V128Op.Bitselect) -> simd_op 0x52l - | SimdShift (V128 V128Op.(I8x16 Shl)) -> simd_op 0x6bl - | SimdShift (V128 V128Op.(I8x16 ShrS)) -> simd_op 0x6cl - | SimdShift (V128 V128Op.(I8x16 ShrU)) -> simd_op 0x6dl - | SimdShift (V128 V128Op.(I16x8 Shl)) -> simd_op 0x8bl - | SimdShift (V128 V128Op.(I16x8 ShrS)) -> simd_op 0x8cl - | SimdShift (V128 V128Op.(I16x8 ShrU)) -> simd_op 0x8dl - | SimdShift (V128 V128Op.(I32x4 Shl)) -> simd_op 0xabl - | SimdShift (V128 V128Op.(I32x4 ShrS)) -> simd_op 0xacl - | SimdShift (V128 V128Op.(I32x4 ShrU)) -> simd_op 0xadl - | SimdShift (V128 V128Op.(I64x2 Shl)) -> simd_op 0xcbl - | SimdShift (V128 V128Op.(I64x2 ShrS)) -> simd_op 0xccl - | SimdShift (V128 V128Op.(I64x2 ShrU)) -> simd_op 0xcdl + | SimdShift (V128 (I8x16 V128Op.Shl)) -> simd_op 0x6bl + | SimdShift (V128 (I8x16 V128Op.ShrS)) -> simd_op 0x6cl + | SimdShift (V128 (I8x16 V128Op.ShrU)) -> simd_op 0x6dl + | SimdShift (V128 (I16x8 V128Op.Shl)) -> simd_op 0x8bl + | SimdShift (V128 (I16x8 V128Op.ShrS)) -> simd_op 0x8cl + | SimdShift (V128 (I16x8 V128Op.ShrU)) -> simd_op 0x8dl + | SimdShift (V128 (I32x4 V128Op.Shl)) -> simd_op 0xabl + | SimdShift (V128 (I32x4 V128Op.ShrS)) -> simd_op 0xacl + | SimdShift (V128 (I32x4 V128Op.ShrU)) -> simd_op 0xadl + | SimdShift (V128 (I64x2 V128Op.Shl)) -> simd_op 0xcbl + | SimdShift (V128 (I64x2 V128Op.ShrS)) -> simd_op 0xccl + | SimdShift (V128 (I64x2 V128Op.ShrU)) -> simd_op 0xcdl | SimdShift (V128 _) -> . - | SimdBitmask (V128 V128Op.(I8x16 Bitmask)) -> simd_op 0x64l - | SimdBitmask (V128 V128Op.(I16x8 Bitmask)) -> simd_op 0x84l - | SimdBitmask (V128 V128Op.(I32x4 Bitmask)) -> simd_op 0xa4l - | SimdBitmask (V128 V128Op.(I64x2 Bitmask)) -> simd_op 0xc4l + | SimdBitmask (V128 (I8x16 V128Op.Bitmask)) -> simd_op 0x64l + | SimdBitmask (V128 (I16x8 V128Op.Bitmask)) -> simd_op 0x84l + | SimdBitmask (V128 (I32x4 V128Op.Bitmask)) -> simd_op 0xa4l + | SimdBitmask (V128 (I64x2 V128Op.Bitmask)) -> simd_op 0xc4l | SimdBitmask (V128 _) -> . - | SimdSplat (V128 (V128Op.(I8x16 Splat))) -> simd_op 0x0fl - | SimdSplat (V128 (V128Op.(I16x8 Splat))) -> simd_op 0x10l - | SimdSplat (V128 (V128Op.(I32x4 Splat))) -> simd_op 0x11l - | SimdSplat (V128 (V128Op.(I64x2 Splat))) -> simd_op 0x12l - | SimdSplat (V128 (V128Op.(F32x4 Splat))) -> simd_op 0x13l - | SimdSplat (V128 (V128Op.(F64x2 Splat))) -> simd_op 0x14l - - | SimdExtract (V128 V128Op.(I8x16 (Extract (i, SX)))) -> simd_op 0x15l; u8 i - | SimdExtract (V128 V128Op.(I8x16 (Extract (i, ZX)))) -> simd_op 0x16l; u8 i - | SimdExtract (V128 V128Op.(I16x8 (Extract (i, SX)))) -> simd_op 0x18l; u8 i - | SimdExtract (V128 V128Op.(I16x8 (Extract (i, ZX)))) -> simd_op 0x19l; u8 i - | SimdExtract (V128 V128Op.(I32x4 (Extract (i, ())))) -> simd_op 0x1bl; u8 i - | SimdExtract (V128 V128Op.(I64x2 (Extract (i, ())))) -> simd_op 0x1dl; u8 i - | SimdExtract (V128 V128Op.(F32x4 (Extract (i, ())))) -> simd_op 0x1fl; u8 i - | SimdExtract (V128 V128Op.(F64x2 (Extract (i, ())))) -> simd_op 0x21l; u8 i - - | SimdReplace (V128 V128Op.(I8x16 (Replace i))) -> simd_op 0x17l; u8 i - | SimdReplace (V128 V128Op.(I16x8 (Replace i))) -> simd_op 0x1al; u8 i - | SimdReplace (V128 V128Op.(I32x4 (Replace i))) -> simd_op 0x1cl; u8 i - | SimdReplace (V128 V128Op.(I64x2 (Replace i))) -> simd_op 0x1el; u8 i - | SimdReplace (V128 V128Op.(F32x4 (Replace i))) -> simd_op 0x20l; u8 i - | SimdReplace (V128 V128Op.(F64x2 (Replace i))) -> simd_op 0x22l; u8 i + | SimdSplat (V128 ((I8x16 V128Op.Splat))) -> simd_op 0x0fl + | SimdSplat (V128 ((I16x8 V128Op.Splat))) -> simd_op 0x10l + | SimdSplat (V128 ((I32x4 V128Op.Splat))) -> simd_op 0x11l + | SimdSplat (V128 ((I64x2 V128Op.Splat))) -> simd_op 0x12l + | SimdSplat (V128 ((F32x4 V128Op.Splat))) -> simd_op 0x13l + | SimdSplat (V128 ((F64x2 V128Op.Splat))) -> simd_op 0x14l + + | SimdExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) -> simd_op 0x15l; u8 i + | SimdExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) -> simd_op 0x16l; u8 i + | SimdExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) -> simd_op 0x18l; u8 i + | SimdExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) -> simd_op 0x19l; u8 i + | SimdExtract (V128 (I32x4 (V128Op.Extract (i, ())))) -> simd_op 0x1bl; u8 i + | SimdExtract (V128 (I64x2 (V128Op.Extract (i, ())))) -> simd_op 0x1dl; u8 i + | SimdExtract (V128 (F32x4 (V128Op.Extract (i, ())))) -> simd_op 0x1fl; u8 i + | SimdExtract (V128 (F64x2 (V128Op.Extract (i, ())))) -> simd_op 0x21l; u8 i + + | SimdReplace (V128 (I8x16 (V128Op.Replace i))) -> simd_op 0x17l; u8 i + | SimdReplace (V128 (I16x8 (V128Op.Replace i))) -> simd_op 0x1al; u8 i + | SimdReplace (V128 (I32x4 (V128Op.Replace i))) -> simd_op 0x1cl; u8 i + | SimdReplace (V128 (I64x2 (V128Op.Replace i))) -> simd_op 0x1el; u8 i + | SimdReplace (V128 (F32x4 (V128Op.Replace i))) -> simd_op 0x20l; u8 i + | SimdReplace (V128 (F64x2 (V128Op.Replace i))) -> simd_op 0x22l; u8 i let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_simd.ml index bff3463856..58dafe07f0 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_simd.ml @@ -1,10 +1,11 @@ open Types open Values -module V128Op = struct +module V128Op = +struct open Ast.V128Op open V128Simd - open Simd + open V128 let testop (op : testop) = let f = match op with @@ -244,7 +245,8 @@ end module V128CvtOp = struct open Ast.V128Op - open Simd + open V128Simd + open V128 let splatop (op : splatop) v = let i = @@ -255,10 +257,10 @@ struct | I64x2 Splat -> V128.I64x2.splat (I64Num.of_num 1 v) | F32x4 Splat -> V128.F32x4.splat (F32Num.of_num 1 v) | F64x2 Splat -> V128.F64x2.splat (F64Num.of_num 1 v) - in V128Simd.to_simd i + in to_simd i let extractop (op : extractop) v = - let v128 = V128Simd.of_simd 1 v in + let v128 = of_simd 1 v in match op with | I8x16 (Extract (i, SX)) -> I32 (V128.I8x16.extract_lane_s i v128) | I8x16 (Extract (i, ZX)) -> I32 (V128.I8x16.extract_lane_u i v128) @@ -270,7 +272,7 @@ struct | F64x2 (Extract (i, ())) -> F64 (V128.F64x2.extract_lane i v128) let replaceop (op : replaceop) v (n : Values.num) = - let v128 = V128Simd.of_simd 1 v in + let v128 = of_simd 1 v in let v128' = match op with | I8x16 (Replace i) -> V128.I8x16.replace_lane i v128 (I32Num.of_num 1 n) | I16x8 (Replace i) -> V128.I16x8.replace_lane i v128 (I32Num.of_num 1 n) @@ -278,7 +280,7 @@ struct | I64x2 (Replace i) -> V128.I64x2.replace_lane i v128 (I64Num.of_num 1 n) | F32x4 (Replace i) -> V128.F32x4.replace_lane i v128 (F32Num.of_num 1 n) | F64x2 (Replace i) -> V128.F64x2.replace_lane i v128 (F64Num.of_num 1 n) - in V128Simd.to_simd v128' + in to_simd v128' end (* Dispatch *) diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index 7aadf53f9c..8fc1b6a017 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -5,11 +5,7 @@ include Int.Make (struct include Int32 let bitwidth = 16 - let to_hex_string i = - (* Always print the full 32-bits (8 hex characters), and pad with 0s. - * Then only take the 4 least significant characters. *) - let s = Printf.sprintf "%08lx" i in - String.sub s ((String.length s) - 4) 4 + let to_hex_string i = Printf.sprintf "%lx" (Int32.logand i 0xffffl) let of_int64 = Int64.to_int32 let to_int64 = Int64.of_int32 diff --git a/interpreter/exec/i8.ml b/interpreter/exec/i8.ml index 4643904df9..dce4075575 100644 --- a/interpreter/exec/i8.ml +++ b/interpreter/exec/i8.ml @@ -5,11 +5,7 @@ include Int.Make (struct include Int32 let bitwidth = 8 - let to_hex_string i = - (* Always print the full 32-bits (8 hex characters), and pad with 0s. - * Then only take the 2 least significant characters. *) - let s = Printf.sprintf "%08lx" i in - String.sub s ((String.length s) - 2) 2 + let to_hex_string i = Printf.sprintf "%lx" (Int32.logand i 0xffl) let of_int64 = Int64.to_int32 let to_int64 = Int64.of_int32 diff --git a/interpreter/exec/int.ml b/interpreter/exec/int.ml index fb0a3b0075..27ab90a0c7 100644 --- a/interpreter/exec/int.ml +++ b/interpreter/exec/int.ml @@ -304,7 +304,7 @@ struct saturate_s (Rep.of_int64 Int64.((shift_right (add (mul x64 y64) 0x4000L) 15))) let to_int_s = Rep.to_int - let to_int_u i = Rep.to_int i land (Rep.to_int Rep.max_int lsl 1) lor 1 + let to_int_u i = Rep.to_int i land ((Rep.to_int Rep.max_int lsl 1) lor 1) let of_int_s = Rep.of_int let of_int_u i = and_ (Rep.of_int i) (or_ (shl (Rep.of_int max_int) one) one) @@ -375,7 +375,9 @@ struct Rep.neg n | _ -> parse_int 0 in - sign_extend parsed + let n = sign_extend parsed in + require (low_int <= n && n <= high_int); + n let of_string_s s = let n = of_string s in diff --git a/interpreter/exec/simd.ml b/interpreter/exec/simd.ml deleted file mode 100644 index 93b6c17da0..0000000000 --- a/interpreter/exec/simd.ml +++ /dev/null @@ -1,547 +0,0 @@ -type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = - | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 - | F32x4 of 'f32x4 | F64x2 of 'f64x2 - -type shape = (unit, unit, unit, unit, unit, unit) laneop - -let lanes shape = - match shape with - | I8x16 _ -> 16 - | I16x8 _ -> 8 - | I32x4 _ -> 4 - | I64x2 _ -> 2 - | F32x4 _ -> 4 - | F64x2 _ -> 2 - -let type_of_lane = function - | I8x16 _ | I16x8 _ | I32x4 _ -> Types.I32Type - | I64x2 _ -> Types.I64Type - | F32x4 _ -> Types.F32Type - | F64x2 _ -> Types.F64Type - -let string_of_shape = function - | I8x16 _ -> "i8x16" - | I16x8 _ -> "i16x8" - | I32x4 _ -> "i32x4" - | I64x2 _ -> "i64x2" - | F32x4 _ -> "f32x4" - | F64x2 _ -> "f64x2" - - -module type RepType = -sig - type t - - val make : int -> char -> t - (* ^ bits_make ? *) - val to_string : t -> string - val to_hex_string : t -> string - val bytewidth : int - val of_strings : shape -> string list -> t - - val to_i8x16 : t -> I8.t list - val of_i8x16 : I8.t list -> t - - val to_i16x8 : t -> I16.t list - val of_i16x8 : I16.t list -> t - - val to_i32x4 : t -> I32.t list - val of_i32x4 : I32.t list -> t - - val to_i64x2 : t -> I64.t list - val of_i64x2 : I64.t list -> t - - val to_f32x4 : t -> F32.t list - val of_f32x4 : F32.t list -> t - - val to_f64x2 : t -> F64.t list - val of_f64x2 : F64.t list -> t -end - -(* This signature defines the types and operations SIMD ints can expose. *) -module type Int = -sig - type t - type lane - - val splat : lane -> t - val extract_lane_s : int -> t -> lane - val extract_lane_u : int -> t -> lane - val replace_lane : int -> t -> lane -> t - val eq : t -> t -> t - val ne : t -> t -> t - val lt_s : t -> t -> t - val lt_u : t -> t -> t - val le_s : t -> t -> t - val le_u : t -> t -> t - val gt_s : t -> t -> t - val gt_u : t -> t -> t - val ge_s : t -> t -> t - val ge_u : t -> t -> t - val abs : t -> t - val neg : t -> t - val popcnt : t -> t - val add : t -> t -> t - val sub : t -> t -> t - val min_s : t -> t -> t - val min_u : t -> t -> t - val max_s : t -> t -> t - val max_u : t -> t -> t - val mul : t -> t -> t - val avgr_u : t -> t -> t - val any_true : t -> bool - val all_true : t -> bool - val bitmask : t -> Int32.t - val shl : t -> I32.t -> t - val shr_s : t -> I32.t -> t - val shr_u : t -> I32.t -> t - val add_sat_s : t -> t -> t - val add_sat_u : t -> t -> t - val sub_sat_s : t -> t -> t - val sub_sat_u : t -> t -> t - val q15mulr_sat_s : t -> t -> t -end - -(* This signature defines the types and operations SIMD floats can expose. *) -module type Float = -sig - type t - type lane - - val splat : lane -> t - val extract_lane : int -> t -> lane - val replace_lane : int -> t -> lane -> t - val eq : t -> t -> t - val ne : t -> t -> t - val lt : t -> t -> t - val le : t -> t -> t - val gt : t -> t -> t - val ge : t -> t -> t - val abs : t -> t - val neg : t -> t - val sqrt : t -> t - val ceil : t -> t - val floor : t -> t - val trunc : t -> t - val nearest : t -> t - val add : t -> t -> t - val sub : t -> t -> t - val mul : t -> t -> t - val div : t -> t -> t - val min : t -> t -> t - val max : t -> t -> t - val pmin : t -> t -> t - val pmax : t -> t -> t -end - -module type Vec = -sig - type t - - val lognot : t -> t - val and_ : t -> t -> t - val or_ : t -> t -> t - val xor : t -> t -> t - val andnot : t -> t -> t - val bitselect : t -> t -> t -> t -end - -module type S = -sig - type t - type bits - val zero : t - val to_string : t -> string - val to_hex_string : t -> string - val of_bits : bits -> t - val to_bits : t -> bits - val of_strings : shape -> string list -> t - val to_i16x8 : t -> I16.t list - val to_i32x4 : t -> I32.t list - - val of_i8x16 : I32.t list -> t - val of_i16x8 : I32.t list -> t - val of_i32x4 : I32.t list -> t - val of_i64x2 : I64.t list -> t - - (* We need type t = t to ensure that all submodule types are S.t, - * then callers don't have to change *) - module I8x16 : Int with type t = t and type lane = I8.t - module I16x8 : Int with type t = t and type lane = I16.t - module I32x4 : Int with type t = t and type lane = I32.t - module I64x2 : Int with type t = t and type lane = I64.t - module F32x4 : Float with type t = t and type lane = F32.t - module F64x2 : Float with type t = t and type lane = F64.t - module V1x128 : Vec with type t = t - module V8x16 : sig - val swizzle : t -> t -> t - val shuffle : t -> t -> int list -> t - end - module I8x16_convert : sig - val narrow_s : t -> t -> t - val narrow_u : t -> t -> t - end - module I16x8_convert : sig - val narrow_s : t -> t -> t - val narrow_u : t -> t -> t - val extend_low_s : t -> t - val extend_high_s : t -> t - val extend_low_u : t -> t - val extend_high_u : t -> t - val extmul_low_s : t -> t -> t - val extmul_high_s : t -> t -> t - val extmul_low_u : t -> t -> t - val extmul_high_u : t -> t -> t - val extadd_pairwise_s : t -> t - val extadd_pairwise_u : t -> t - end - module I32x4_convert : sig - val trunc_sat_f32x4_s : t -> t - val trunc_sat_f32x4_u : t -> t - val trunc_sat_f64x2_s_zero : t -> t - val trunc_sat_f64x2_u_zero : t -> t - val extend_low_s : t -> t - val extend_high_s : t -> t - val extend_low_u : t -> t - val extend_high_u : t -> t - val dot_s : t -> t -> t - val extmul_low_s : t -> t -> t - val extmul_high_s : t -> t -> t - val extmul_low_u : t -> t -> t - val extmul_high_u : t -> t -> t - val extadd_pairwise_s : t -> t - val extadd_pairwise_u : t -> t - end - module I64x2_convert : sig - val extend_low_s : t -> t - val extend_high_s : t -> t - val extend_low_u : t -> t - val extend_high_u : t -> t - val extmul_low_s : t -> t -> t - val extmul_high_s : t -> t -> t - val extmul_low_u : t -> t -> t - val extmul_high_u : t -> t -> t - end - module F32x4_convert : sig - val convert_i32x4_s : t -> t - val convert_i32x4_u : t -> t - val demote_f64x2_zero : t -> t - end - module F64x2_convert : sig - val promote_low_f32x4 : t -> t - val convert_i32x4_s : t -> t - val convert_i32x4_u : t -> t - end -end - -module Make (Rep : RepType) : S with type bits = Rep.t = -struct - type t = Rep.t - type bits = Rep.t - - let zero = Rep.make Rep.bytewidth (Char.chr 0) - let to_string = Rep.to_string (* FIXME very very wrong *) - let to_hex_string = Rep.to_hex_string - let of_bits x = x - let to_bits x = x - let of_strings = Rep.of_strings - let to_i16x8 = Rep.to_i16x8 - let to_i32x4 = Rep.to_i32x4 - - let of_i8x16 = Rep.of_i8x16 - let of_i16x8 = Rep.of_i16x8 - let of_i32x4 = Rep.of_i32x4 - let of_i64x2 = Rep.of_i64x2 - - module V1x128 : Vec with type t = Rep.t = struct - type t = Rep.t - let to_shape = Rep.to_i64x2 - let of_shape = Rep.of_i64x2 - let unop f x = of_shape (List.map f (to_shape x)) - let binop f x y = of_shape (List.map2 f (to_shape x) (to_shape y)) - let lognot = unop I64.lognot - let and_ = binop I64.and_ - let or_ = binop I64.or_ - let xor = binop I64.xor - let andnot = binop (fun x y -> I64.and_ x (I64.lognot y)) - let bitselect v1 v2 c = - let v2_andnot_c = andnot v2 c in - let v1_and_c = binop I64.and_ v1 c in - binop I64.or_ v1_and_c v2_andnot_c - end - - module MakeFloat (Float : Float.S) (Convert : sig - val to_shape : Rep.t -> Float.t list - val of_shape : Float.t list -> Rep.t - val num_lanes : int - end) : Float with type t = Rep.t and type lane = Float.t = - struct - type t = Rep.t - type lane = Float.t - let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) - let unopi f x = Convert.of_shape (List.mapi f (Convert.to_shape x)) - let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) - - let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) - let extract_lane i s = List.nth (Convert.to_shape s) i - let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v - - let all_ones = Float.of_float (Int64.float_of_bits (Int64.minus_one)) - let cmp f x y = if f x y then all_ones else Float.zero - let eq = binop (cmp Float.eq) - let ne = binop (cmp Float.ne) - let lt = binop (cmp Float.lt) - let le = binop (cmp Float.le) - let gt = binop (cmp Float.gt) - let ge = binop (cmp Float.ge) - let abs = unop Float.abs - let neg = unop Float.neg - let sqrt = unop Float.sqrt - let ceil = unop Float.ceil - let floor = unop Float.floor - let trunc = unop Float.trunc - let nearest = unop Float.nearest - let add = binop Float.add - let sub = binop Float.sub - let mul = binop Float.mul - let div = binop Float.div - let min = binop Float.min - let max = binop Float.max - let pmin = binop (fun x y -> if Float.lt y x then y else x) - let pmax = binop (fun x y -> if Float.lt x y then y else x) - end - - module MakeInt (Int : Int.S) (Convert : sig - val to_shape : Rep.t -> Int.t list - val of_shape : Int.t list -> Rep.t - val num_lanes : int - end) : Int with type t = Rep.t and type lane = Int.t = - struct - type t = Rep.t - type lane = Int.t - let unop f x = Convert.of_shape (List.map f (Convert.to_shape x)) - let unopi f x = Convert.of_shape (List.mapi f (Convert.to_shape x)) - let binop f x y = Convert.of_shape (List.map2 f (Convert.to_shape x) (Convert.to_shape y)) - - let splat x = Convert.of_shape (List.init Convert.num_lanes (fun i -> x)) - let extract_lane_s i s = List.nth (Convert.to_shape s) i - let extract_lane_u i s = Int.as_unsigned (extract_lane_s i s) - let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v - - let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero - let eq = binop (cmp Int.eq) - let ne = binop (cmp Int.ne) - let lt_s = binop (cmp Int.lt_s) - let lt_u = binop (cmp Int.lt_u) - let le_s = binop (cmp Int.le_s) - let le_u = binop (cmp Int.le_u) - let gt_s = binop (cmp Int.gt_s) - let gt_u = binop (cmp Int.gt_u) - let ge_s = binop (cmp Int.ge_s) - let ge_u = binop (cmp Int.ge_u) - let abs = unop Int.abs - let neg = unop Int.neg - let popcnt = unop Int.popcnt - let add = binop Int.add - let sub = binop Int.sub - let mul = binop Int.mul - let choose f x y = if f x y then x else y - let min_s = binop (choose Int.le_s) - let min_u = binop (choose Int.le_u) - let max_s = binop (choose Int.ge_s) - let max_u = binop (choose Int.ge_u) - (* The result of avgr_u will not overflow this type, but the intermediate might, - * so have the Int type implement it so they can extend it accordingly *) - let avgr_u = binop Int.avgr_u - let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (Convert.to_shape s) - let any_true = reduceop (||) false - let all_true = reduceop (&&) true - (* Extract top bits using signed-comparision with zero *) - let bitmask x = - let xs = Convert.to_shape x in - let negs = List.map (fun x -> if Int.(lt_s x zero) then Int32.one else Int32.zero) xs in - List.fold_right (fun a b -> Int32.(logor a (shift_left b 1))) negs Int32.zero - let shl v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shl a shift) v - let shr_s v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shr_s a shift) v - let shr_u v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shr_u a shift) v - let add_sat_s = binop Int.add_sat_s - let add_sat_u = binop Int.add_sat_u - let sub_sat_s = binop Int.sub_sat_s - let sub_sat_u = binop Int.sub_sat_u - (* The intermediate will overflow lane.t, so have Int implement this. *) - let q15mulr_sat_s = binop Int.q15mulr_sat_s - end - - module V8x16 = struct - let swizzle value index = - let vs = Rep.to_i8x16 value in - let is = Rep.to_i8x16 index in - let select i = - Option.( - value - (bind (Int32.unsigned_to_int i) (List.nth_opt vs)) - ~default:Int32.zero) - in - Rep.of_i8x16 (List.map select is) - let shuffle x y imms = - let xs = Rep.to_i8x16 x in - let ys = Rep.to_i8x16 y in - let joined = List.append xs ys in - let result = List.map (fun i -> List.nth joined i) imms in - Rep.of_i8x16 result - end - - module I8x16 = MakeInt (I8) (struct - let to_shape = Rep.to_i8x16 - let of_shape = Rep.of_i8x16 - let num_lanes = lanes (I8x16 ()) - end) - - module I16x8 = MakeInt (I16) (struct - let to_shape = Rep.to_i16x8 - let of_shape = Rep.of_i16x8 - let num_lanes = lanes (I16x8 ()) - end) - - module I32x4 = MakeInt (I32) (struct - let to_shape = Rep.to_i32x4 - let of_shape = Rep.of_i32x4 - let num_lanes = lanes (I32x4 ()) - end) - - module I64x2 = MakeInt (I64) (struct - let to_shape = Rep.to_i64x2 - let of_shape = Rep.of_i64x2 - let num_lanes = lanes (I64x2 ()) - end) - - module F32x4 = MakeFloat (F32) (struct - let to_shape = Rep.to_f32x4 - let of_shape = Rep.of_f32x4 - let num_lanes = lanes (F32x4 ()) - end) - - module F64x2 = MakeFloat (F64) (struct - let to_shape = Rep.to_f64x2 - let of_shape = Rep.of_f64x2 - let num_lanes = lanes (F64x2 ()) - end) - - (* Narrow two v128 into one v128 by using to_shape on both operands, - * concatenating them, saturating the wider type to the narrower type, - * then of_shape to reconstruct a v128. *) - let narrow to_shape of_shape sat_op x y = - let xy = (to_shape x) @ (to_shape y) in - of_shape (List.map sat_op xy) - - module I8x16_convert = struct - let narrow_s = narrow Rep.to_i16x8 Rep.of_i8x16 I8.saturate_s - let narrow_u = narrow Rep.to_i16x8 Rep.of_i8x16 I8.saturate_u - end - - module I16x8_convert = struct - let narrow_s = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_s - let narrow_u = narrow Rep.to_i32x4 Rep.of_i16x8 I16.saturate_u - - let ext_s = Int32.logand 0xffffffffl - let ext_u = Int32.logand 0xffl - - let extend take_or_drop ext x = Rep.of_i16x8 (List.map ext (take_or_drop 8 (Rep.to_i8x16 x))) - let extend_low_s = extend Lib.List.take ext_s - let extend_high_s = extend Lib.List.drop ext_s - let extend_low_u = extend Lib.List.take ext_u - let extend_high_u = extend Lib.List.drop ext_u - - let extmul_low_s x y = I16x8.mul (extend_low_s x) (extend_low_s y) - let extmul_high_s x y = I16x8.mul (extend_high_s x) (extend_high_s y) - let extmul_low_u x y = I16x8.mul (extend_low_u x) (extend_low_u y) - let extmul_high_u x y = I16x8.mul (extend_high_u x) (extend_high_u y) - - let extadd ext x y = Int32.add (ext x) (ext y) - let extadd_pairwise_s x = Rep.of_i16x8 (Lib.List.pairwise (extadd ext_s) (Rep.to_i8x16 x)) - let extadd_pairwise_u x = Rep.of_i16x8 (Lib.List.pairwise (extadd ext_u) (Rep.to_i8x16 x)) - end - - module I32x4_convert = struct - let convert f v = Rep.of_i32x4 (List.map f (Rep.to_f32x4 v)) - let trunc_sat_f32x4_s = convert I32_convert.trunc_sat_f32_s - let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u - - let convert_zero f v = - Rep.(of_i32x4 I32.(List.map f (to_f64x2 v) @ [zero; zero])) - let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s - let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u - - let ext_s = Int32.logand 0xffffffffl - let ext_u = Int32.logand 0xffffl - - let extend take_or_drop ext x = - Rep.of_i32x4 (List.map ext (take_or_drop 4 (Rep.to_i16x8 x))) - let extend_low_s = extend Lib.List.take ext_s - let extend_high_s = extend Lib.List.drop ext_s - let extend_low_u = extend Lib.List.take ext_u - let extend_high_u = extend Lib.List.drop ext_u - - let dot_s x y = - let xs = Rep.to_i16x8 x in - let ys = Rep.to_i16x8 y in - let rec dot xs ys = - match xs, ys with - | x1::x2::xss, y1::y2::yss -> - Int32.(add (mul x1 y1) (mul x2 y2)) :: dot xss yss - | [], [] -> [] - | _, _ -> assert false - in Rep.of_i32x4 (dot xs ys) - - let extmul_low_s x y = I32x4.mul (extend_low_s x) (extend_low_s y) - let extmul_high_s x y = I32x4.mul (extend_high_s x) (extend_high_s y) - let extmul_low_u x y = I32x4.mul (extend_low_u x) (extend_low_u y) - let extmul_high_u x y = I32x4.mul (extend_high_u x) (extend_high_u y) - - let extadd ext x y = Int32.add (ext x) (ext y) - let extadd_pairwise_s x = Rep.of_i32x4 (Lib.List.pairwise (extadd ext_s) (Rep.to_i16x8 x)) - let extadd_pairwise_u x = Rep.of_i32x4 (Lib.List.pairwise (extadd ext_u) (Rep.to_i16x8 x)) - end - - module I64x2_convert = struct - let ext_s = Int64.logand 0xffffffffffffffffL - let ext_u = Int64.logand 0xffffffffL - - let extend take_or_drop ext x = - Rep.of_i64x2 - (List.map - (fun i32 -> ext (Int64.of_int32 i32)) - (take_or_drop 2 (Rep.to_i32x4 x))) - let extend_low_s = extend Lib.List.take ext_s - let extend_high_s = extend Lib.List.drop ext_s - let extend_low_u = extend Lib.List.take ext_u - let extend_high_u = extend Lib.List.drop ext_u - - let extmul_low_s x y = I64x2.mul (extend_low_s x) (extend_low_s y) - let extmul_high_s x y = I64x2.mul (extend_high_s x) (extend_high_s y) - let extmul_low_u x y = I64x2.mul (extend_low_u x) (extend_low_u y) - let extmul_high_u x y = I64x2.mul (extend_high_u x) (extend_high_u y) - end - - module F32x4_convert = struct - let convert f v = Rep.of_f32x4 (List.map f (Rep.to_i32x4 v)) - let convert_i32x4_s = convert F32_convert.convert_i32_s - let convert_i32x4_u = convert F32_convert.convert_i32_u - let demote_f64x2_zero v = - Rep.(of_f32x4 F32.(List.map F32_convert.demote_f64 (to_f64x2 v) @ [zero; zero])) - end - - module F64x2_convert = struct - let convert f v = Rep.of_f64x2 (List.map f (Lib.List.take 2 (Rep.to_i32x4 v))) - let convert_i32x4_s = convert F64_convert.convert_i32_s - let convert_i32x4_u = convert F64_convert.convert_i32_u - let promote_low_f32x4 v = - Rep.(of_f64x2 (List.map F64_convert.promote_f32 (Lib.List.take 2 (to_f32x4 v)))) - end -end diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 9744d44dda..640fd25381 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -1,90 +1,506 @@ -(* TODO: inline this functor, since it won't really work for other types *) -include Simd.Make - (struct - include String - let bytewidth = 16 +(* Types *) + +type t = string +type bits = string + +type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = + | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 + | F32x4 of 'f32x4 | F64x2 of 'f64x2 + +type shape = (unit, unit, unit, unit, unit, unit) laneop + + +(* Basics *) + +let bitwidth = 128 +let bytewidth = bitwidth / 8 + +let zero = String.make bytewidth '\x00' +let of_bits x = x +let to_bits x = x + +let num_lanes shape = + match shape with + | I8x16 _ -> 16 + | I16x8 _ -> 8 + | I32x4 _ -> 4 + | I64x2 _ -> 2 + | F32x4 _ -> 4 + | F64x2 _ -> 2 + +let type_of_lane = function + | I8x16 _ | I16x8 _ | I32x4 _ -> Types.I32Type + | I64x2 _ -> Types.I64Type + | F32x4 _ -> Types.F32Type + | F64x2 _ -> Types.F64Type + + +(* Shape-based operations *) + +module Convert (Lane : sig type t end) = +struct + module type S = + sig + val shape : shape + val to_lanes : t -> Lane.t list + val of_lanes : Lane.t list -> t + end +end + +module type IntShape = +sig + type lane + + val num_lanes : int + val to_lanes : t -> lane list + val of_lanes : lane list -> t + + val splat : lane -> t + val extract_lane_s : int -> t -> lane + val extract_lane_u : int -> t -> lane + val replace_lane : int -> t -> lane -> t + + val eq : t -> t -> t + val ne : t -> t -> t + val lt_s : t -> t -> t + val lt_u : t -> t -> t + val le_s : t -> t -> t + val le_u : t -> t -> t + val gt_s : t -> t -> t + val gt_u : t -> t -> t + val ge_s : t -> t -> t + val ge_u : t -> t -> t + val abs : t -> t + val neg : t -> t + val popcnt : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val min_s : t -> t -> t + val min_u : t -> t -> t + val max_s : t -> t -> t + val max_u : t -> t -> t + val mul : t -> t -> t + val avgr_u : t -> t -> t + val any_true : t -> bool + val all_true : t -> bool + val bitmask : t -> Int32.t + val shl : t -> I32.t -> t + val shr_s : t -> I32.t -> t + val shr_u : t -> I32.t -> t + val add_sat_s : t -> t -> t + val add_sat_u : t -> t -> t + val sub_sat_s : t -> t -> t + val sub_sat_u : t -> t -> t + val q15mulr_sat_s : t -> t -> t +end + +module MakeIntShape (Int : Int.S) (Cvt : Convert(Int).S) : + IntShape with type lane = Int.t = +struct + type lane = Int.t + + let num_lanes = num_lanes Cvt.shape + let of_lanes = Cvt.of_lanes + let to_lanes = Cvt.to_lanes + + let unop f x = of_lanes (List.map f (to_lanes x)) + let unopi f x = of_lanes (List.mapi f (to_lanes x)) + let binop f x y = of_lanes (List.map2 f (to_lanes x) (to_lanes y)) + + let splat x = of_lanes (List.init num_lanes (fun i -> x)) + let extract_lane_s i s = List.nth (to_lanes s) i + let extract_lane_u i s = Int.as_unsigned (extract_lane_s i s) + let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v - let to_i8x16 s = - List.init 16 (fun i -> (Int32.of_int (Bytes.get_int8 (Bytes.of_string s) i))) + let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero + let eq = binop (cmp Int.eq) + let ne = binop (cmp Int.ne) + let lt_s = binop (cmp Int.lt_s) + let lt_u = binop (cmp Int.lt_u) + let le_s = binop (cmp Int.le_s) + let le_u = binop (cmp Int.le_u) + let gt_s = binop (cmp Int.gt_s) + let gt_u = binop (cmp Int.gt_u) + let ge_s = binop (cmp Int.ge_s) + let ge_u = binop (cmp Int.ge_u) + let abs = unop Int.abs + let neg = unop Int.neg + let popcnt = unop Int.popcnt + let add = binop Int.add + let sub = binop Int.sub + let mul = binop Int.mul + let choose f x y = if f x y then x else y + let min_s = binop (choose Int.le_s) + let min_u = binop (choose Int.le_u) + let max_s = binop (choose Int.ge_s) + let max_u = binop (choose Int.ge_u) + (* The result of avgr_u will not overflow this type, but the intermediate might, + * so have the Int type implement it so they can extend it accordingly *) + let avgr_u = binop Int.avgr_u + let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (to_lanes s) + let any_true = reduceop (||) false + let all_true = reduceop (&&) true + (* Extract top bits using signed-comparision with zero *) + let bitmask x = + let xs = to_lanes x in + let negs = List.map (fun x -> if Int.(lt_s x zero) then Int32.one else Int32.zero) xs in + List.fold_right (fun a b -> Int32.(logor a (shift_left b 1))) negs Int32.zero + let shl v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shl a shift) v + let shr_s v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shr_s a shift) v + let shr_u v s = + let shift = Int.of_int_u (Int32.to_int s) in + unop (fun a -> Int.shr_u a shift) v + let add_sat_s = binop Int.add_sat_s + let add_sat_u = binop Int.add_sat_u + let sub_sat_s = binop Int.sub_sat_s + let sub_sat_u = binop Int.sub_sat_u + (* The intermediate will overflow lane.t, so have Int implement this. *) + let q15mulr_sat_s = binop Int.q15mulr_sat_s +end - let of_i8x16 fs = +module type FloatShape = +sig + type lane + + val num_lanes : int + val to_lanes : t -> lane list + val of_lanes : lane list -> t + + val splat : lane -> t + val extract_lane : int -> t -> lane + val replace_lane : int -> t -> lane -> t + + val eq : t -> t -> t + val ne : t -> t -> t + val lt : t -> t -> t + val le : t -> t -> t + val gt : t -> t -> t + val ge : t -> t -> t + val abs : t -> t + val neg : t -> t + val sqrt : t -> t + val ceil : t -> t + val floor : t -> t + val trunc : t -> t + val nearest : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val mul : t -> t -> t + val div : t -> t -> t + val min : t -> t -> t + val max : t -> t -> t + val pmin : t -> t -> t + val pmax : t -> t -> t +end + +module MakeFloatShape (Float : Float.S) (Cvt : Convert(Float).S) : + FloatShape with type lane = Float.t = +struct + type lane = Float.t + + let num_lanes = num_lanes Cvt.shape + let of_lanes = Cvt.of_lanes + let to_lanes = Cvt.to_lanes + + let unop f x = of_lanes (List.map f (to_lanes x)) + let unopi f x = of_lanes (List.mapi f (to_lanes x)) + let binop f x y = of_lanes (List.map2 f (to_lanes x) (to_lanes y)) + + let splat x = of_lanes (List.init num_lanes (fun i -> x)) + let extract_lane i s = List.nth (to_lanes s) i + let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v + + let all_ones = Float.of_float (Int64.float_of_bits (Int64.minus_one)) + let cmp f x y = if f x y then all_ones else Float.zero + let eq = binop (cmp Float.eq) + let ne = binop (cmp Float.ne) + let lt = binop (cmp Float.lt) + let le = binop (cmp Float.le) + let gt = binop (cmp Float.gt) + let ge = binop (cmp Float.ge) + let abs = unop Float.abs + let neg = unop Float.neg + let sqrt = unop Float.sqrt + let ceil = unop Float.ceil + let floor = unop Float.floor + let trunc = unop Float.trunc + let nearest = unop Float.nearest + let add = binop Float.add + let sub = binop Float.sub + let mul = binop Float.mul + let div = binop Float.div + let min = binop Float.min + let max = binop Float.max + let pmin = binop (fun x y -> if Float.lt y x then y else x) + let pmax = binop (fun x y -> if Float.lt x y then y else x) +end + +module I8x16 = MakeIntShape (I8) + (struct + let shape = I8x16 () + let to_lanes s = + List.init 16 (fun i -> Int32.of_int (Bytes.get_int8 (Bytes.of_string s) i)) + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int8 b i (Int32.to_int f)) fs; Bytes.to_string b + end) - let to_i16x8 s = +module I16x8 = MakeIntShape (I16) + (struct + let shape = I16x8 () + let to_lanes s = List.init 8 (fun i -> Int32.of_int (Bytes.get_int16_le (Bytes.of_string s) (i*2))) - - let of_i16x8 fs = + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int16_le b (i*2) (Int32.to_int f)) fs; Bytes.to_string b + end) - let to_i32x4 s = +module I32x4 = MakeIntShape (I32) + (struct + let shape = I32x4 () + let to_lanes s = List.init 4 (fun i -> I32.of_bits (Bytes.get_int32_le (Bytes.of_string s) (i*4))) - - let of_i32x4 fs = + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int32_le b (i*4) (I32.to_bits f)) fs; Bytes.to_string b + end) - let to_i64x2 s = +module I64x2 = MakeIntShape (I64) + (struct + let shape = I64x2 () + let to_lanes s = List.init 2 (fun i -> I64.of_bits (Bytes.get_int64_le (Bytes.of_string s) (i*8))) - - let of_i64x2 fs = + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int64_le b (i*8) (I64.to_bits f)) fs; Bytes.to_string b + end) - let to_f32x4 s = +module F32x4 = MakeFloatShape (F32) + (struct + let shape = F32x4 () + let to_lanes s = List.init 4 (fun i -> F32.of_bits (Bytes.get_int32_le (Bytes.of_string s) (i*4))) - - let of_f32x4 fs = + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int32_le b (i*4) (F32.to_bits f)) fs; Bytes.to_string b + end) - let to_f64x2 s = +module F64x2 = MakeFloatShape (F64) + (struct + let shape = F64x2 () + let to_lanes s = List.init 2 (fun i -> F64.of_bits (Bytes.get_int64_le (Bytes.of_string s) (i*8))) - - let of_f64x2 fs = + let of_lanes fs = let b = Bytes.create bytewidth in List.iteri (fun i f -> Bytes.set_int64_le b (i*8) (F64.to_bits f)) fs; Bytes.to_string b + end) - let of_strings shape ss = - if List.length ss <> Simd.lanes shape then raise (Invalid_argument "wrong length"); - let range_check i32 min max at = - let i = Int32.to_int i32 in - if i > max || i < min then raise (Failure "constant out of range") else i in - (* TODO create proper I8 and I16 modules *) - let i8_of_string s = range_check (I32.of_string s) (-128) 255 s in - let i16_of_string s = range_check (I32.of_string s) (-32768) 65535 s in - let open Bytes in - let b = create bytewidth in - (match shape with - | Simd.I8x16 () -> - List.iteri (fun i s -> set_uint8 b i (i8_of_string s)) ss - | Simd.I16x8 () -> - List.iteri (fun i s -> set_int16_le b (i * 2) (i16_of_string s)) ss - | Simd.I32x4 () -> - List.iteri (fun i s -> set_int32_le b (i * 4) (I32.of_string s)) ss - | Simd.I64x2 () -> - List.iteri (fun i s -> set_int64_le b (i * 8) (I64.of_string s)) ss - | Simd.F32x4 () -> - List.iteri (fun i s -> set_int32_le b (i * 4) (F32.to_bits (F32.of_string s))) ss - | Simd.F64x2 () -> - List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss); - Bytes.to_string b - (* This is needed for generating text format. In the text format, we can specify a shape, - * like "v128.const i8x16", but the binary format does not keep the shape, so we have to - * pick one when converting to text. Arbitrary pick i32x4, and make sure to be consistent. - *) - let to_string s = - let i32x4 = to_i32x4 s in - String.concat " " (List.map I32.to_string_s i32x4) - let to_hex_string s = - let i32x4 = to_i32x4 s in - String.concat " " (List.map I32.to_hex_string i32x4) - end) +(* Special shapes *) + +module V1x128 = +struct + let unop f x = I64x2.of_lanes (List.map f (I64x2.to_lanes x)) + let binop f x y = + I64x2.of_lanes (List.map2 f (I64x2.to_lanes x) (I64x2.to_lanes y)) + + let lognot = unop I64.lognot + let and_ = binop I64.and_ + let or_ = binop I64.or_ + let xor = binop I64.xor + let andnot = binop (fun x y -> I64.and_ x (I64.lognot y)) + + let bitselect v1 v2 c = + let v2_andnot_c = andnot v2 c in + let v1_and_c = binop I64.and_ v1 c in + binop I64.or_ v1_and_c v2_andnot_c +end + +module V8x16 = +struct + let swizzle v1 v2 = + let ns = I8x16.to_lanes v1 in + let is = I8x16.to_lanes v2 in + let select i = + Option.value (List.nth_opt ns (I32.to_int_u i)) ~default: I32.zero + in I8x16.of_lanes (List.map select is) + + let shuffle v1 v2 is = + let ns = I8x16.to_lanes v1 @ I8x16.to_lanes v2 in + I8x16.of_lanes (List.map (List.nth ns) is) +end + + +(* Conversions *) + +let narrow to_lanes of_lanes sat_op x y = + let xy = to_lanes x @ to_lanes y in + of_lanes (List.map sat_op xy) + +module I8x16_convert = +struct + let narrow_s = narrow I16x8.to_lanes I8x16.of_lanes I8.saturate_s + let narrow_u = narrow I16x8.to_lanes I8x16.of_lanes I8.saturate_u +end + +module I16x8_convert = +struct + let narrow_s = narrow I32x4.to_lanes I16x8.of_lanes I16.saturate_s + let narrow_u = narrow I32x4.to_lanes I16x8.of_lanes I16.saturate_u + + let ext_s = Int32.logand 0xffffffffl + let ext_u = Int32.logand 0xffl + + let extend take_or_drop ext x = + I16x8.of_lanes (List.map ext (take_or_drop 8 (I8x16.to_lanes x))) + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u + + let extmul_low_s x y = I16x8.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I16x8.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I16x8.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I16x8.mul (extend_high_u x) (extend_high_u y) + + let extadd ext x y = Int32.add (ext x) (ext y) + let extadd_pairwise_s x = + I16x8.of_lanes (Lib.List.pairwise (extadd ext_s) (I8x16.to_lanes x)) + let extadd_pairwise_u x = + I16x8.of_lanes (Lib.List.pairwise (extadd ext_u) (I8x16.to_lanes x)) +end + +module I32x4_convert = +struct + let convert f v = I32x4.of_lanes (List.map f (F32x4.to_lanes v)) + let trunc_sat_f32x4_s = convert I32_convert.trunc_sat_f32_s + let trunc_sat_f32x4_u = convert I32_convert.trunc_sat_f32_u + + let convert_zero f v = + I32x4.of_lanes (List.map f (F64x2.to_lanes v) @ I32.[zero; zero]) + let trunc_sat_f64x2_s_zero = convert_zero I32_convert.trunc_sat_f64_s + let trunc_sat_f64x2_u_zero = convert_zero I32_convert.trunc_sat_f64_u + + let ext_s = Int32.logand 0xffffffffl + let ext_u = Int32.logand 0xffffl + + let extend take_or_drop ext x = + I32x4.of_lanes (List.map ext (take_or_drop 4 (I16x8.to_lanes x))) + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u + + let dot_s x y = + let xs = I16x8.to_lanes x in + let ys = I16x8.to_lanes y in + let rec dot xs ys = + match xs, ys with + | x1::x2::xss, y1::y2::yss -> + Int32.(add (mul x1 y1) (mul x2 y2)) :: dot xss yss + | [], [] -> [] + | _, _ -> assert false + in I32x4.of_lanes (dot xs ys) + + let extmul_low_s x y = I32x4.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I32x4.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I32x4.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I32x4.mul (extend_high_u x) (extend_high_u y) + + let extadd ext x y = Int32.add (ext x) (ext y) + let extadd_pairwise_s x = + I32x4.of_lanes (Lib.List.pairwise (extadd ext_s) (I16x8.to_lanes x)) + let extadd_pairwise_u x = + I32x4.of_lanes (Lib.List.pairwise (extadd ext_u) (I16x8.to_lanes x)) +end + +module I64x2_convert = +struct + let ext_s = Int64.logand 0xffffffffffffffffL + let ext_u = Int64.logand 0xffffffffL + + let extend take_or_drop ext x = + I64x2.of_lanes + (List.map + (fun i32 -> ext (Int64.of_int32 i32)) + (take_or_drop 2 (I32x4.to_lanes x))) + let extend_low_s = extend Lib.List.take ext_s + let extend_high_s = extend Lib.List.drop ext_s + let extend_low_u = extend Lib.List.take ext_u + let extend_high_u = extend Lib.List.drop ext_u + + let extmul_low_s x y = I64x2.mul (extend_low_s x) (extend_low_s y) + let extmul_high_s x y = I64x2.mul (extend_high_s x) (extend_high_s y) + let extmul_low_u x y = I64x2.mul (extend_low_u x) (extend_low_u y) + let extmul_high_u x y = I64x2.mul (extend_high_u x) (extend_high_u y) +end + +module F32x4_convert = +struct + let convert f v = F32x4.of_lanes (List.map f (I32x4.to_lanes v)) + let convert_i32x4_s = convert F32_convert.convert_i32_s + let convert_i32x4_u = convert F32_convert.convert_i32_u + let demote_f64x2_zero v = + F32x4.of_lanes + (List.map F32_convert.demote_f64 (F64x2.to_lanes v) @ F32.[zero; zero]) +end + +module F64x2_convert = +struct + let convert f v = + F64x2.of_lanes (List.map f (Lib.List.take 2 (I32x4.to_lanes v))) + let convert_i32x4_s = convert F64_convert.convert_i32_s + let convert_i32x4_u = convert F64_convert.convert_i32_u + let promote_low_f32x4 v = + F64x2.of_lanes + (List.map F64_convert.promote_f32 (Lib.List.take 2 (F32x4.to_lanes v))) +end + + +(* String conversion *) + +let to_string s = + String.concat " " (List.map I32.to_string_s (I32x4.to_lanes s)) + +let to_hex_string s = + String.concat " " (List.map I32.to_hex_string (I32x4.to_lanes s)) + +let of_strings shape ss = + if List.length ss <> num_lanes shape then + raise (Invalid_argument "wrong length"); + let open Bytes in + let b = create bytewidth in + (match shape with + | I8x16 () -> + List.iteri (fun i s -> set_uint8 b i (I8.to_int_u (I8.of_string s))) ss + | I16x8 () -> + List.iteri (fun i s -> set_int16_le b (i * 2) (I16.to_int_u (I16.of_string s))) ss + | I32x4 () -> + List.iteri (fun i s -> set_int32_le b (i * 4) (I32.of_string s)) ss + | I64x2 () -> + List.iteri (fun i s -> set_int64_le b (i * 8) (I64.of_string s)) ss + | F32x4 () -> + List.iteri (fun i s -> set_int32_le b (i * 4) (F32.to_bits (F32.of_string s))) ss + | F64x2 () -> + List.iteri (fun i s -> set_int64_le b (i * 8) (F64.to_bits (F64.of_string s))) ss + ); + to_string b + + +let string_of_shape = function + | I8x16 _ -> "i8x16" + | I16x8 _ -> "i16x8" + | I32x4 _ -> "i32x4" + | I64x2 _ -> "i64x2" + | F32x4 _ -> "f32x4" + | F64x2 _ -> "f64x2" diff --git a/interpreter/exec/v128.mli b/interpreter/exec/v128.mli new file mode 100644 index 0000000000..f9535c1589 --- /dev/null +++ b/interpreter/exec/v128.mli @@ -0,0 +1,211 @@ +(* Types *) + +type t +type bits = string + +type ('i8x16, 'i16x8, 'i32x4, 'i64x2, 'f32x4, 'f64x2) laneop = + | I8x16 of 'i8x16 | I16x8 of 'i16x8 | I32x4 of 'i32x4 | I64x2 of 'i64x2 + | F32x4 of 'f32x4 | F64x2 of 'f64x2 + +type shape = (unit, unit, unit, unit, unit, unit) laneop + + +(* Basics *) + +val bitwidth : int + +val num_lanes : ('a, 'b, 'c, 'd, 'e, 'f) laneop -> int +val type_of_lane : ('a, 'b, 'c, 'd, 'e, 'f) laneop -> Types.num_type +val string_of_shape : ('a, 'b, 'c, 'd, 'e, 'f) laneop -> string + +val zero : t +val of_bits : bits -> t +val to_bits : t -> bits + + +(* String conversion *) + +val to_string : t -> string +val to_hex_string : t -> string +val of_strings : shape -> string list -> t + + +(* Shape-based operations *) + +module type IntShape = +sig + type lane + + val num_lanes : int + val to_lanes : t -> lane list + val of_lanes : lane list -> t + + val splat : lane -> t + val extract_lane_s : int -> t -> lane + val extract_lane_u : int -> t -> lane + val replace_lane : int -> t -> lane -> t + + val eq : t -> t -> t + val ne : t -> t -> t + val lt_s : t -> t -> t + val lt_u : t -> t -> t + val le_s : t -> t -> t + val le_u : t -> t -> t + val gt_s : t -> t -> t + val gt_u : t -> t -> t + val ge_s : t -> t -> t + val ge_u : t -> t -> t + val abs : t -> t + val neg : t -> t + val popcnt : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val min_s : t -> t -> t + val min_u : t -> t -> t + val max_s : t -> t -> t + val max_u : t -> t -> t + val mul : t -> t -> t + val avgr_u : t -> t -> t + val any_true : t -> bool + val all_true : t -> bool + val bitmask : t -> Int32.t + val shl : t -> I32.t -> t + val shr_s : t -> I32.t -> t + val shr_u : t -> I32.t -> t + val add_sat_s : t -> t -> t + val add_sat_u : t -> t -> t + val sub_sat_s : t -> t -> t + val sub_sat_u : t -> t -> t + val q15mulr_sat_s : t -> t -> t +end + +module type FloatShape = +sig + type lane + + val num_lanes : int + val to_lanes : t -> lane list + val of_lanes : lane list -> t + + val splat : lane -> t + val extract_lane : int -> t -> lane + val replace_lane : int -> t -> lane -> t + + val eq : t -> t -> t + val ne : t -> t -> t + val lt : t -> t -> t + val le : t -> t -> t + val gt : t -> t -> t + val ge : t -> t -> t + val abs : t -> t + val neg : t -> t + val sqrt : t -> t + val ceil : t -> t + val floor : t -> t + val trunc : t -> t + val nearest : t -> t + val add : t -> t -> t + val sub : t -> t -> t + val mul : t -> t -> t + val div : t -> t -> t + val min : t -> t -> t + val max : t -> t -> t + val pmin : t -> t -> t + val pmax : t -> t -> t +end + +module I8x16 : IntShape with type lane = I8.t +module I16x8 : IntShape with type lane = I16.t +module I32x4 : IntShape with type lane = I32.t +module I64x2 : IntShape with type lane = I64.t +module F32x4 : FloatShape with type lane = F32.t +module F64x2 : FloatShape with type lane = F64.t + + +(* Special shapes *) + +module V1x128 : +sig + val lognot : t -> t + val and_ : t -> t -> t + val or_ : t -> t -> t + val xor : t -> t -> t + val andnot : t -> t -> t + val bitselect : t -> t -> t -> t +end + +module V8x16 : +sig + val swizzle : t -> t -> t + val shuffle : t -> t -> int list -> t +end + + +(* Conversions *) + +module I8x16_convert : +sig + val narrow_s : t -> t -> t + val narrow_u : t -> t -> t +end + +module I16x8_convert : +sig + val narrow_s : t -> t -> t + val narrow_u : t -> t -> t + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t + val extadd_pairwise_s : t -> t + val extadd_pairwise_u : t -> t +end + +module I32x4_convert : +sig + val trunc_sat_f32x4_s : t -> t + val trunc_sat_f32x4_u : t -> t + val trunc_sat_f64x2_s_zero : t -> t + val trunc_sat_f64x2_u_zero : t -> t + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t + val dot_s : t -> t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t + val extadd_pairwise_s : t -> t + val extadd_pairwise_u : t -> t +end + +module I64x2_convert : +sig + val extend_low_s : t -> t + val extend_high_s : t -> t + val extend_low_u : t -> t + val extend_high_u : t -> t + val extmul_low_s : t -> t -> t + val extmul_high_s : t -> t -> t + val extmul_low_u : t -> t -> t + val extmul_high_u : t -> t -> t +end + +module F32x4_convert : +sig + val convert_i32x4_s : t -> t + val convert_i32x4_u : t -> t + val demote_f64x2_zero : t -> t +end + +module F64x2_convert : +sig + val promote_low_f32x4 : t -> t + val convert_i32x4_s : t -> t + val convert_i32x4_u : t -> t +end diff --git a/interpreter/host/spectest.ml b/interpreter/host/spectest.ml index 01bdfb6cd4..bdeade78f0 100644 --- a/interpreter/host/spectest.ml +++ b/interpreter/host/spectest.ml @@ -14,7 +14,7 @@ let global (GlobalType (t, _) as gt) = | NumType I64Type -> Num (I64 666L) | NumType F32Type -> Num (F32 (F32.of_float 666.6)) | NumType F64Type -> Num (F64 (F64.of_float 666.6)) - | SimdType V128Type -> Simd (V128 (V128.of_i32x4 [666l; 666l; 666l; 666l])) + | SimdType V128Type -> Simd (V128 (V128.I32x4.of_lanes [666l; 666l; 666l; 666l])) | RefType t -> Ref (NullRef t) in Global.alloc gt v diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index 9f246f5a34..c646b303f4 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -317,32 +317,40 @@ let assert_return ress ts at = let mask_and_canonical = function | NumPat {it = I32 _ as i; _} -> I32 (Int32.minus_one), i | NumPat {it = I64 _ as i; _} -> I64 (Int64.minus_one), i - | NumPat {it = F32 f; _} -> I32 (Int32.minus_one), I32 (I32_convert.reinterpret_f32 f) - | NumPat {it = F64 f; _} -> I64 (Int64.minus_one), I64 (I64_convert.reinterpret_f64 f) - | NanPat {it = F32 nan; _} -> nan_bitmask_of nan I32Type, canonical_nan_of I32Type - | NanPat {it = F64 nan; _} -> nan_bitmask_of nan I64Type, canonical_nan_of I64Type + | NumPat {it = F32 f; _} -> + I32 (Int32.minus_one), I32 (I32_convert.reinterpret_f32 f) + | NumPat {it = F64 f; _} -> + I64 (Int64.minus_one), I64 (I64_convert.reinterpret_f64 f) + | NanPat {it = F32 nan; _} -> + nan_bitmask_of nan I32Type, canonical_nan_of I32Type + | NanPat {it = F64 nan; _} -> + nan_bitmask_of nan I64Type, canonical_nan_of I64Type | _ -> . in let masks, canons = List.split (List.map (fun p -> mask_and_canonical p) pats) in - let all_ones = V128.of_i32x4 (List.init 4 (fun _ -> Int32.minus_one)) in + let all_ones = V128.I32x4.of_lanes (List.init 4 (fun _ -> Int32.minus_one)) in let mask, expected = match shape with - | Simd.I8x16 () -> all_ones, V128.of_i8x16 (List.map (I32Num.of_num 0) canons) - | Simd.I16x8 () -> all_ones, V128.of_i16x8 (List.map (I32Num.of_num 0) canons) - | Simd.I32x4 () -> all_ones, V128.of_i32x4 (List.map (I32Num.of_num 0) canons) - | Simd.I64x2 () -> all_ones, V128.of_i64x2 (List.map (I64Num.of_num 0) canons) - | Simd.F32x4 () -> - V128.of_i32x4 (List.map (I32Num.of_num 0) masks), - V128.of_i32x4 (List.map (I32Num.of_num 0) canons) - | Simd.F64x2 () -> - V128.of_i64x2 (List.map (I64Num.of_num 0) masks), - V128.of_i64x2 (List.map (I64Num.of_num 0) canons) + | V128.I8x16 () -> + all_ones, V128.I8x16.of_lanes (List.map (I32Num.of_num 0) canons) + | V128.I16x8 () -> + all_ones, V128.I16x8.of_lanes (List.map (I32Num.of_num 0) canons) + | V128.I32x4 () -> + all_ones, V128.I32x4.of_lanes (List.map (I32Num.of_num 0) canons) + | V128.I64x2 () -> + all_ones, V128.I64x2.of_lanes (List.map (I64Num.of_num 0) canons) + | V128.F32x4 () -> + V128.I32x4.of_lanes (List.map (I32Num.of_num 0) masks), + V128.I32x4.of_lanes (List.map (I32Num.of_num 0) canons) + | V128.F64x2 () -> + V128.I64x2.of_lanes (List.map (I64Num.of_num 0) masks), + V128.I64x2.of_lanes (List.map (I64Num.of_num 0) canons) in [ SimdConst (V128 mask @@ at) @@ at; SimdBinaryVec (V128 V128Op.And) @@ at; SimdConst (V128 expected @@ at) @@ at; - SimdBinary (V128 V128Op.(Simd.I8x16 Eq)) @@ at; + SimdBinary (V128 (V128.I8x16 V128Op.Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) - SimdTest (V128 V128Op.(Simd.I8x16 AllTrue)) @@ at; + SimdTest (V128 (V128.I8x16 V128Op.AllTrue)) @@ at; Test (I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] | RefResult (RefPat {it = Values.NullRef t; _}) -> diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index e5c4298ff8..cf0c4d53d4 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -392,14 +392,15 @@ let assert_simd_pat v p = match v, p with | V128 v, SimdPat (V128 (shape, ps)) -> let extract = match shape with - | Simd.I8x16 () -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) - | Simd.I16x8 () -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) - | Simd.I32x4 () -> fun v i -> I32 (V128.I32x4.extract_lane_s i v) - | Simd.I64x2 () -> fun v i -> I64 (V128.I64x2.extract_lane_s i v) - | Simd.F32x4 () -> fun v i -> F32 (V128.F32x4.extract_lane i v) - | Simd.F64x2 () -> fun v i -> F64 (V128.F64x2.extract_lane i v) + | V128.I8x16 () -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) + | V128.I16x8 () -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) + | V128.I32x4 () -> fun v i -> I32 (V128.I32x4.extract_lane_s i v) + | V128.I64x2 () -> fun v i -> I64 (V128.I64x2.extract_lane_s i v) + | V128.F32x4 () -> fun v i -> F32 (V128.F32x4.extract_lane i v) + | V128.F64x2 () -> fun v i -> F64 (V128.F64x2.extract_lane i v) in - List.for_all2 assert_num_pat (List.init (Simd.lanes shape) (extract v)) ps + List.for_all2 assert_num_pat + (List.init (V128.num_lanes shape) (extract v)) ps let assert_ref_pat r p = match r, p with diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 668165ef9c..9f760fea5f 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -25,7 +25,7 @@ type num_pat = | NanPat of nanop type simd_pat = - | SimdPat of (Simd.shape * num_pat list) Values.simdop + | SimdPat of (V128.shape * num_pat list) Values.simdop type ref_pat = | RefPat of ref_ diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index b43b0c5edd..518f6efe33 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -80,19 +80,19 @@ struct type vbinop = And | Or | Xor | AndNot type vternop = Bitselect - type testop = (itestop, itestop, itestop, itestop, void, void) Simd.laneop - type unop = (iunop, iunop, iunop, iunop, funop, funop) Simd.laneop - type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) Simd.laneop - type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) Simd.laneop - type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) Simd.laneop + type testop = (itestop, itestop, itestop, itestop, void, void) V128.laneop + type unop = (iunop, iunop, iunop, iunop, funop, funop) V128.laneop + type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) V128.laneop + type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) V128.laneop + type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) V128.laneop type nsplatop = Splat type 'a nextractop = Extract of int * 'a type nreplaceop = Replace of int - type splatop = (nsplatop, nsplatop, nsplatop, nsplatop, nsplatop, nsplatop) Simd.laneop - type extractop = (extension nextractop, extension nextractop, unit nextractop, unit nextractop, unit nextractop, unit nextractop) Simd.laneop - type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop) Simd.laneop + type splatop = (nsplatop, nsplatop, nsplatop, nsplatop, nsplatop, nsplatop) V128.laneop + type extractop = (extension nextractop, extension nextractop, unit nextractop, unit nextractop, unit nextractop, unit nextractop) V128.laneop + type replaceop = (nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop, nreplaceop) V128.laneop end type testop = (I32Op.testop, I64Op.testop, F32Op.testop, F64Op.testop) Values.op diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index 7e784ed8e3..b9334d4501 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -1,7 +1,7 @@ open Source open Types open Values -open Simd +open V128 open Ast @@ -288,215 +288,215 @@ let v128_xor = SimdBinaryVec (V128 V128Op.Xor) let v128_bitselect = SimdTernaryVec (V128 V128Op.Bitselect) let v128_any_true = SimdTestVec (V128 V128Op.AnyTrue) -let i8x16_swizzle = SimdBinary (V128 V128Op.(I8x16 Swizzle)) -let i8x16_shuffle is = SimdBinary (V128 V128Op.(I8x16 (Shuffle is))) +let i8x16_swizzle = SimdBinary (V128 (I8x16 V128Op.Swizzle)) +let i8x16_shuffle is = SimdBinary (V128 (I8x16 (V128Op.Shuffle is))) -let i8x16_splat = SimdSplat (V128 V128Op.(I8x16 Splat)) -let i8x16_extract_lane_s i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, SX)))) -let i8x16_extract_lane_u i = SimdExtract (V128 V128Op.(I8x16 (Extract (i, ZX)))) -let i8x16_replace_lane i = SimdReplace (V128 V128Op.(I8x16 (Replace i))) -let i8x16_eq = SimdBinary (V128 V128Op.(I8x16 Eq)) -let i8x16_ne = SimdBinary (V128 V128Op.(I8x16 Ne)) -let i8x16_lt_s = SimdBinary (V128 V128Op.(I8x16 LtS)) -let i8x16_lt_u = SimdBinary (V128 V128Op.(I8x16 LtU)) -let i8x16_le_s = SimdBinary (V128 V128Op.(I8x16 LeS)) -let i8x16_le_u = SimdBinary (V128 V128Op.(I8x16 LeU)) -let i8x16_gt_s = SimdBinary (V128 V128Op.(I8x16 GtS)) -let i8x16_gt_u = SimdBinary (V128 V128Op.(I8x16 GtU)) -let i8x16_ge_s = SimdBinary (V128 V128Op.(I8x16 GeS)) -let i8x16_ge_u = SimdBinary (V128 V128Op.(I8x16 GeU)) -let i8x16_neg = SimdUnary (V128 V128Op.(I8x16 Neg)) -let i8x16_bitmask = SimdBitmask (V128 V128Op.(I8x16 Bitmask)) -let i8x16_all_true = SimdTest (V128 V128Op.(I8x16 AllTrue)) -let i8x16_narrow_i16x8_s = SimdBinary (V128 V128Op.(I8x16 NarrowS)) -let i8x16_narrow_i16x8_u = SimdBinary (V128 V128Op.(I8x16 NarrowU)) -let i16x8_extend_low_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtendLowS)) -let i16x8_extend_high_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtendHighS)) -let i16x8_extend_low_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtendLowU)) -let i16x8_extend_high_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtendHighU)) -let i8x16_shl = SimdShift (V128 V128Op.(I8x16 Shl)) -let i8x16_shr_s = SimdShift (V128 V128Op.(I8x16 ShrS)) -let i8x16_shr_u = SimdShift (V128 V128Op.(I8x16 ShrU)) -let i8x16_add = SimdBinary (V128 V128Op.(I8x16 Add)) -let i8x16_add_sat_s = SimdBinary (V128 V128Op.(I8x16 AddSatS)) -let i8x16_add_sat_u = SimdBinary (V128 V128Op.(I8x16 AddSatU)) -let i8x16_sub = SimdBinary (V128 V128Op.(I8x16 Sub)) -let i8x16_sub_sat_s = SimdBinary (V128 V128Op.(I8x16 SubSatS)) -let i8x16_sub_sat_u = SimdBinary (V128 V128Op.(I8x16 SubSatU)) -let i8x16_abs = SimdUnary (V128 V128Op.(I8x16 Abs)) -let i8x16_popcnt = SimdUnary (V128 V128Op.(I8x16 Popcnt)) -let i8x16_min_s = SimdBinary (V128 V128Op.(I8x16 MinS)) -let i8x16_min_u = SimdBinary (V128 V128Op.(I8x16 MinU)) -let i8x16_max_s = SimdBinary (V128 V128Op.(I8x16 MaxS)) -let i8x16_max_u = SimdBinary (V128 V128Op.(I8x16 MaxU)) -let i8x16_avgr_u = SimdBinary (V128 V128Op.(I8x16 AvgrU)) +let i8x16_splat = SimdSplat (V128 (I8x16 V128Op.Splat)) +let i8x16_extract_lane_s i = SimdExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) +let i8x16_extract_lane_u i = SimdExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) +let i8x16_replace_lane i = SimdReplace (V128 (I8x16 (V128Op.Replace i))) +let i8x16_eq = SimdBinary (V128 (I8x16 V128Op.Eq)) +let i8x16_ne = SimdBinary (V128 (I8x16 V128Op.Ne)) +let i8x16_lt_s = SimdBinary (V128 (I8x16 V128Op.LtS)) +let i8x16_lt_u = SimdBinary (V128 (I8x16 V128Op.LtU)) +let i8x16_le_s = SimdBinary (V128 (I8x16 V128Op.LeS)) +let i8x16_le_u = SimdBinary (V128 (I8x16 V128Op.LeU)) +let i8x16_gt_s = SimdBinary (V128 (I8x16 V128Op.GtS)) +let i8x16_gt_u = SimdBinary (V128 (I8x16 V128Op.GtU)) +let i8x16_ge_s = SimdBinary (V128 (I8x16 V128Op.GeS)) +let i8x16_ge_u = SimdBinary (V128 (I8x16 V128Op.GeU)) +let i8x16_neg = SimdUnary (V128 (I8x16 V128Op.Neg)) +let i8x16_bitmask = SimdBitmask (V128 (I8x16 V128Op.Bitmask)) +let i8x16_all_true = SimdTest (V128 (I8x16 V128Op.AllTrue)) +let i8x16_narrow_i16x8_s = SimdBinary (V128 (I8x16 V128Op.NarrowS)) +let i8x16_narrow_i16x8_u = SimdBinary (V128 (I8x16 V128Op.NarrowU)) +let i16x8_extend_low_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtendLowS)) +let i16x8_extend_high_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtendHighS)) +let i16x8_extend_low_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtendLowU)) +let i16x8_extend_high_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtendHighU)) +let i8x16_shl = SimdShift (V128 (I8x16 V128Op.Shl)) +let i8x16_shr_s = SimdShift (V128 (I8x16 V128Op.ShrS)) +let i8x16_shr_u = SimdShift (V128 (I8x16 V128Op.ShrU)) +let i8x16_add = SimdBinary (V128 (I8x16 V128Op.Add)) +let i8x16_add_sat_s = SimdBinary (V128 (I8x16 V128Op.AddSatS)) +let i8x16_add_sat_u = SimdBinary (V128 (I8x16 V128Op.AddSatU)) +let i8x16_sub = SimdBinary (V128 (I8x16 V128Op.Sub)) +let i8x16_sub_sat_s = SimdBinary (V128 (I8x16 V128Op.SubSatS)) +let i8x16_sub_sat_u = SimdBinary (V128 (I8x16 V128Op.SubSatU)) +let i8x16_abs = SimdUnary (V128 (I8x16 V128Op.Abs)) +let i8x16_popcnt = SimdUnary (V128 (I8x16 V128Op.Popcnt)) +let i8x16_min_s = SimdBinary (V128 (I8x16 V128Op.MinS)) +let i8x16_min_u = SimdBinary (V128 (I8x16 V128Op.MinU)) +let i8x16_max_s = SimdBinary (V128 (I8x16 V128Op.MaxS)) +let i8x16_max_u = SimdBinary (V128 (I8x16 V128Op.MaxU)) +let i8x16_avgr_u = SimdBinary (V128 (I8x16 V128Op.AvgrU)) -let i16x8_splat = SimdSplat (V128 V128Op.(I16x8 Splat)) -let i16x8_extract_lane_s i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, SX)))) -let i16x8_extract_lane_u i = SimdExtract (V128 V128Op.(I16x8 (Extract (i, ZX)))) -let i16x8_replace_lane i = SimdReplace (V128 V128Op.(I16x8 (Replace i))) -let i16x8_eq = SimdBinary (V128 V128Op.(I16x8 Eq)) -let i16x8_ne = SimdBinary (V128 V128Op.(I16x8 Ne)) -let i16x8_lt_s = SimdBinary (V128 V128Op.(I16x8 LtS)) -let i16x8_lt_u = SimdBinary (V128 V128Op.(I16x8 LtU)) -let i16x8_le_s = SimdBinary (V128 V128Op.(I16x8 LeS)) -let i16x8_le_u = SimdBinary (V128 V128Op.(I16x8 LeU)) -let i16x8_gt_s = SimdBinary (V128 V128Op.(I16x8 GtS)) -let i16x8_gt_u = SimdBinary (V128 V128Op.(I16x8 GtU)) -let i16x8_ge_s = SimdBinary (V128 V128Op.(I16x8 GeS)) -let i16x8_ge_u = SimdBinary (V128 V128Op.(I16x8 GeU)) -let i16x8_neg = SimdUnary (V128 V128Op.(I16x8 Neg)) -let i16x8_bitmask = SimdBitmask (V128 V128Op.(I16x8 Bitmask)) -let i16x8_all_true = SimdTest (V128 V128Op.(I16x8 AllTrue)) -let i16x8_narrow_i32x4_s = SimdBinary (V128 V128Op.(I16x8 NarrowS)) -let i16x8_narrow_i32x4_u = SimdBinary (V128 V128Op.(I16x8 NarrowU)) -let i16x8_shl = SimdShift (V128 V128Op.(I16x8 Shl)) -let i16x8_shr_s = SimdShift (V128 V128Op.(I16x8 ShrS)) -let i16x8_shr_u = SimdShift (V128 V128Op.(I16x8 ShrU)) -let i16x8_add = SimdBinary (V128 V128Op.(I16x8 Add)) -let i16x8_add_sat_s = SimdBinary (V128 V128Op.(I16x8 AddSatS)) -let i16x8_add_sat_u = SimdBinary (V128 V128Op.(I16x8 AddSatU)) -let i16x8_sub = SimdBinary (V128 V128Op.(I16x8 Sub)) -let i16x8_sub_sat_s = SimdBinary (V128 V128Op.(I16x8 SubSatS)) -let i16x8_sub_sat_u = SimdBinary (V128 V128Op.(I16x8 SubSatU)) -let i16x8_mul = SimdBinary (V128 V128Op.(I16x8 Mul)) -let i16x8_abs = SimdUnary (V128 V128Op.(I16x8 Abs)) -let i16x8_min_s = SimdBinary (V128 V128Op.(I16x8 MinS)) -let i16x8_min_u = SimdBinary (V128 V128Op.(I16x8 MinU)) -let i16x8_max_s = SimdBinary (V128 V128Op.(I16x8 MaxS)) -let i16x8_max_u = SimdBinary (V128 V128Op.(I16x8 MaxU)) -let i16x8_avgr_u = SimdBinary (V128 V128Op.(I16x8 AvgrU)) -let i16x8_extmul_low_i8x16_s = SimdBinary (V128 V128Op.(I16x8 ExtMulLowS)) -let i16x8_extmul_high_i8x16_s = SimdBinary (V128 V128Op.(I16x8 ExtMulHighS)) -let i16x8_extmul_low_i8x16_u = SimdBinary (V128 V128Op.(I16x8 ExtMulLowU)) -let i16x8_extmul_high_i8x16_u = SimdBinary (V128 V128Op.(I16x8 ExtMulHighU)) -let i16x8_q15mulr_sat_s = SimdBinary (V128 V128Op.(I16x8 Q15MulRSatS)) -let i16x8_extadd_pairwise_i8x16_s = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseS)) -let i16x8_extadd_pairwise_i8x16_u = SimdUnary (V128 V128Op.(I16x8 ExtAddPairwiseU)) +let i16x8_splat = SimdSplat (V128 (I16x8 V128Op.Splat)) +let i16x8_extract_lane_s i = SimdExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) +let i16x8_extract_lane_u i = SimdExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) +let i16x8_replace_lane i = SimdReplace (V128 (I16x8 (V128Op.Replace i))) +let i16x8_eq = SimdBinary (V128 (I16x8 V128Op.Eq)) +let i16x8_ne = SimdBinary (V128 (I16x8 V128Op.Ne)) +let i16x8_lt_s = SimdBinary (V128 (I16x8 V128Op.LtS)) +let i16x8_lt_u = SimdBinary (V128 (I16x8 V128Op.LtU)) +let i16x8_le_s = SimdBinary (V128 (I16x8 V128Op.LeS)) +let i16x8_le_u = SimdBinary (V128 (I16x8 V128Op.LeU)) +let i16x8_gt_s = SimdBinary (V128 (I16x8 V128Op.GtS)) +let i16x8_gt_u = SimdBinary (V128 (I16x8 V128Op.GtU)) +let i16x8_ge_s = SimdBinary (V128 (I16x8 V128Op.GeS)) +let i16x8_ge_u = SimdBinary (V128 (I16x8 V128Op.GeU)) +let i16x8_neg = SimdUnary (V128 (I16x8 V128Op.Neg)) +let i16x8_bitmask = SimdBitmask (V128 (I16x8 V128Op.Bitmask)) +let i16x8_all_true = SimdTest (V128 (I16x8 V128Op.AllTrue)) +let i16x8_narrow_i32x4_s = SimdBinary (V128 (I16x8 V128Op.NarrowS)) +let i16x8_narrow_i32x4_u = SimdBinary (V128 (I16x8 V128Op.NarrowU)) +let i16x8_shl = SimdShift (V128 (I16x8 V128Op.Shl)) +let i16x8_shr_s = SimdShift (V128 (I16x8 V128Op.ShrS)) +let i16x8_shr_u = SimdShift (V128 (I16x8 V128Op.ShrU)) +let i16x8_add = SimdBinary (V128 (I16x8 V128Op.Add)) +let i16x8_add_sat_s = SimdBinary (V128 (I16x8 V128Op.AddSatS)) +let i16x8_add_sat_u = SimdBinary (V128 (I16x8 V128Op.AddSatU)) +let i16x8_sub = SimdBinary (V128 (I16x8 V128Op.Sub)) +let i16x8_sub_sat_s = SimdBinary (V128 (I16x8 V128Op.SubSatS)) +let i16x8_sub_sat_u = SimdBinary (V128 (I16x8 V128Op.SubSatU)) +let i16x8_mul = SimdBinary (V128 (I16x8 V128Op.Mul)) +let i16x8_abs = SimdUnary (V128 (I16x8 V128Op.Abs)) +let i16x8_min_s = SimdBinary (V128 (I16x8 V128Op.MinS)) +let i16x8_min_u = SimdBinary (V128 (I16x8 V128Op.MinU)) +let i16x8_max_s = SimdBinary (V128 (I16x8 V128Op.MaxS)) +let i16x8_max_u = SimdBinary (V128 (I16x8 V128Op.MaxU)) +let i16x8_avgr_u = SimdBinary (V128 (I16x8 V128Op.AvgrU)) +let i16x8_extmul_low_i8x16_s = SimdBinary (V128 (I16x8 V128Op.ExtMulLowS)) +let i16x8_extmul_high_i8x16_s = SimdBinary (V128 (I16x8 V128Op.ExtMulHighS)) +let i16x8_extmul_low_i8x16_u = SimdBinary (V128 (I16x8 V128Op.ExtMulLowU)) +let i16x8_extmul_high_i8x16_u = SimdBinary (V128 (I16x8 V128Op.ExtMulHighU)) +let i16x8_q15mulr_sat_s = SimdBinary (V128 (I16x8 V128Op.Q15MulRSatS)) +let i16x8_extadd_pairwise_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) +let i16x8_extadd_pairwise_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -let i32x4_splat = SimdSplat (V128 V128Op.(I32x4 Splat)) -let i32x4_extract_lane i = SimdExtract (V128 V128Op.(I32x4 (Extract (i, ())))) -let i32x4_replace_lane i = SimdReplace (V128 V128Op.(I32x4 (Replace i))) -let i32x4_eq = SimdBinary (V128 V128Op.(I32x4 Eq)) -let i32x4_ne = SimdBinary (V128 V128Op.(I32x4 Ne)) -let i32x4_lt_s = SimdBinary (V128 V128Op.(I32x4 LtS)) -let i32x4_lt_u = SimdBinary (V128 V128Op.(I32x4 LtU)) -let i32x4_le_s = SimdBinary (V128 V128Op.(I32x4 LeS)) -let i32x4_le_u = SimdBinary (V128 V128Op.(I32x4 LeU)) -let i32x4_gt_s = SimdBinary (V128 V128Op.(I32x4 GtS)) -let i32x4_gt_u = SimdBinary (V128 V128Op.(I32x4 GtU)) -let i32x4_ge_s = SimdBinary (V128 V128Op.(I32x4 GeS)) -let i32x4_ge_u = SimdBinary (V128 V128Op.(I32x4 GeU)) -let i32x4_abs = SimdUnary (V128 V128Op.(I32x4 Abs)) -let i32x4_neg = SimdUnary (V128 V128Op.(I32x4 Neg)) -let i32x4_bitmask = SimdBitmask (V128 V128Op.(I32x4 Bitmask)) -let i32x4_all_true = SimdTest (V128 V128Op.(I32x4 AllTrue)) -let i32x4_extend_low_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtendLowS)) -let i32x4_extend_high_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtendHighS)) -let i32x4_extend_low_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtendLowU)) -let i32x4_extend_high_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtendHighU)) -let i32x4_shl = SimdShift (V128 V128Op.(I32x4 Shl)) -let i32x4_shr_s = SimdShift (V128 V128Op.(I32x4 ShrS)) -let i32x4_shr_u = SimdShift (V128 V128Op.(I32x4 ShrU)) -let i32x4_add = SimdBinary (V128 V128Op.(I32x4 Add)) -let i32x4_sub = SimdBinary (V128 V128Op.(I32x4 Sub)) -let i32x4_min_s = SimdBinary (V128 V128Op.(I32x4 MinS)) -let i32x4_min_u = SimdBinary (V128 V128Op.(I32x4 MinU)) -let i32x4_max_s = SimdBinary (V128 V128Op.(I32x4 MaxS)) -let i32x4_max_u = SimdBinary (V128 V128Op.(I32x4 MaxU)) -let i32x4_mul = SimdBinary (V128 V128Op.(I32x4 Mul)) -let i32x4_dot_i16x8_s = SimdBinary (V128 V128Op.(I32x4 DotS)) -let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 V128Op.(I32x4 TruncSatSF32x4)) -let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 V128Op.(I32x4 TruncSatUF32x4)) -let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatSZeroF64x2)) -let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 V128Op.(I32x4 TruncSatUZeroF64x2)) -let i32x4_extmul_low_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulLowS)) -let i32x4_extmul_high_i16x8_s = SimdBinary (V128 V128Op.(I32x4 ExtMulHighS)) -let i32x4_extmul_low_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulLowU)) -let i32x4_extmul_high_i16x8_u = SimdBinary (V128 V128Op.(I32x4 ExtMulHighU)) -let i32x4_extadd_pairwise_i16x8_s = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseS)) -let i32x4_extadd_pairwise_i16x8_u = SimdUnary (V128 V128Op.(I32x4 ExtAddPairwiseU)) +let i32x4_splat = SimdSplat (V128 (I32x4 V128Op.Splat)) +let i32x4_extract_lane i = SimdExtract (V128 (I32x4 (V128Op.Extract (i, ())))) +let i32x4_replace_lane i = SimdReplace (V128 (I32x4 (V128Op.Replace i))) +let i32x4_eq = SimdBinary (V128 (I32x4 V128Op.Eq)) +let i32x4_ne = SimdBinary (V128 (I32x4 V128Op.Ne)) +let i32x4_lt_s = SimdBinary (V128 (I32x4 V128Op.LtS)) +let i32x4_lt_u = SimdBinary (V128 (I32x4 V128Op.LtU)) +let i32x4_le_s = SimdBinary (V128 (I32x4 V128Op.LeS)) +let i32x4_le_u = SimdBinary (V128 (I32x4 V128Op.LeU)) +let i32x4_gt_s = SimdBinary (V128 (I32x4 V128Op.GtS)) +let i32x4_gt_u = SimdBinary (V128 (I32x4 V128Op.GtU)) +let i32x4_ge_s = SimdBinary (V128 (I32x4 V128Op.GeS)) +let i32x4_ge_u = SimdBinary (V128 (I32x4 V128Op.GeU)) +let i32x4_abs = SimdUnary (V128 (I32x4 V128Op.Abs)) +let i32x4_neg = SimdUnary (V128 (I32x4 V128Op.Neg)) +let i32x4_bitmask = SimdBitmask (V128 (I32x4 V128Op.Bitmask)) +let i32x4_all_true = SimdTest (V128 (I32x4 V128Op.AllTrue)) +let i32x4_extend_low_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtendLowS)) +let i32x4_extend_high_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtendHighS)) +let i32x4_extend_low_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtendLowU)) +let i32x4_extend_high_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtendHighU)) +let i32x4_shl = SimdShift (V128 (I32x4 V128Op.Shl)) +let i32x4_shr_s = SimdShift (V128 (I32x4 V128Op.ShrS)) +let i32x4_shr_u = SimdShift (V128 (I32x4 V128Op.ShrU)) +let i32x4_add = SimdBinary (V128 (I32x4 V128Op.Add)) +let i32x4_sub = SimdBinary (V128 (I32x4 V128Op.Sub)) +let i32x4_min_s = SimdBinary (V128 (I32x4 V128Op.MinS)) +let i32x4_min_u = SimdBinary (V128 (I32x4 V128Op.MinU)) +let i32x4_max_s = SimdBinary (V128 (I32x4 V128Op.MaxS)) +let i32x4_max_u = SimdBinary (V128 (I32x4 V128Op.MaxU)) +let i32x4_mul = SimdBinary (V128 (I32x4 V128Op.Mul)) +let i32x4_dot_i16x8_s = SimdBinary (V128 (I32x4 V128Op.DotS)) +let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) +let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) +let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) +let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) +let i32x4_extmul_low_i16x8_s = SimdBinary (V128 (I32x4 V128Op.ExtMulLowS)) +let i32x4_extmul_high_i16x8_s = SimdBinary (V128 (I32x4 V128Op.ExtMulHighS)) +let i32x4_extmul_low_i16x8_u = SimdBinary (V128 (I32x4 V128Op.ExtMulLowU)) +let i32x4_extmul_high_i16x8_u = SimdBinary (V128 (I32x4 V128Op.ExtMulHighU)) +let i32x4_extadd_pairwise_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) +let i32x4_extadd_pairwise_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -let i64x2_splat = SimdSplat (V128 V128Op.(I64x2 Splat)) -let i64x2_extract_lane i = SimdExtract (V128 V128Op.(I64x2 (Extract (i, ())))) -let i64x2_replace_lane i = SimdReplace (V128 V128Op.(I64x2 (Replace i))) -let i64x2_extend_low_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendLowS)) -let i64x2_extend_high_i32x4_s = SimdUnary (V128 V128Op.(I64x2 ExtendHighS)) -let i64x2_extend_low_i32x4_u = SimdUnary (V128 V128Op.(I64x2 ExtendLowU)) -let i64x2_extend_high_i32x4_u = SimdUnary (V128 V128Op.(I64x2 ExtendHighU)) -let i64x2_eq = SimdBinary (V128 V128Op.(I64x2 Eq)) -let i64x2_ne = SimdBinary (V128 V128Op.(I64x2 Ne)) -let i64x2_lt_s = SimdBinary (V128 V128Op.(I64x2 LtS)) -let i64x2_le_s = SimdBinary (V128 V128Op.(I64x2 LeS)) -let i64x2_gt_s = SimdBinary (V128 V128Op.(I64x2 GtS)) -let i64x2_ge_s = SimdBinary (V128 V128Op.(I64x2 GeS)) -let i64x2_abs = SimdUnary (V128 V128Op.(I64x2 Abs)) -let i64x2_neg = SimdUnary (V128 V128Op.(I64x2 Neg)) -let i64x2_bitmask = SimdBitmask (V128 V128Op.(I64x2 Bitmask)) -let i64x2_all_true = SimdTest (V128 V128Op.(I64x2 AllTrue)) -let i64x2_add = SimdBinary (V128 V128Op.(I64x2 Add)) -let i64x2_sub = SimdBinary (V128 V128Op.(I64x2 Sub)) -let i64x2_mul = SimdBinary (V128 V128Op.(I64x2 Mul)) -let i64x2_shl = SimdShift (V128 V128Op.(I64x2 Shl)) -let i64x2_shr_s = SimdShift (V128 V128Op.(I64x2 ShrS)) -let i64x2_shr_u = SimdShift (V128 V128Op.(I64x2 ShrU)) -let i64x2_extmul_low_i32x4_s = SimdBinary (V128 V128Op.(I64x2 ExtMulLowS)) -let i64x2_extmul_high_i32x4_s = SimdBinary (V128 V128Op.(I64x2 ExtMulHighS)) -let i64x2_extmul_low_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulLowU)) -let i64x2_extmul_high_i32x4_u = SimdBinary (V128 V128Op.(I64x2 ExtMulHighU)) +let i64x2_splat = SimdSplat (V128 (I64x2 V128Op.Splat)) +let i64x2_extract_lane i = SimdExtract (V128 (I64x2 (V128Op.Extract (i, ())))) +let i64x2_replace_lane i = SimdReplace (V128 (I64x2 (V128Op.Replace i))) +let i64x2_extend_low_i32x4_s = SimdUnary (V128 (I64x2 V128Op.ExtendLowS)) +let i64x2_extend_high_i32x4_s = SimdUnary (V128 (I64x2 V128Op.ExtendHighS)) +let i64x2_extend_low_i32x4_u = SimdUnary (V128 (I64x2 V128Op.ExtendLowU)) +let i64x2_extend_high_i32x4_u = SimdUnary (V128 (I64x2 V128Op.ExtendHighU)) +let i64x2_eq = SimdBinary (V128 (I64x2 V128Op.Eq)) +let i64x2_ne = SimdBinary (V128 (I64x2 V128Op.Ne)) +let i64x2_lt_s = SimdBinary (V128 (I64x2 V128Op.LtS)) +let i64x2_le_s = SimdBinary (V128 (I64x2 V128Op.LeS)) +let i64x2_gt_s = SimdBinary (V128 (I64x2 V128Op.GtS)) +let i64x2_ge_s = SimdBinary (V128 (I64x2 V128Op.GeS)) +let i64x2_abs = SimdUnary (V128 (I64x2 V128Op.Abs)) +let i64x2_neg = SimdUnary (V128 (I64x2 V128Op.Neg)) +let i64x2_bitmask = SimdBitmask (V128 (I64x2 V128Op.Bitmask)) +let i64x2_all_true = SimdTest (V128 (I64x2 V128Op.AllTrue)) +let i64x2_add = SimdBinary (V128 (I64x2 V128Op.Add)) +let i64x2_sub = SimdBinary (V128 (I64x2 V128Op.Sub)) +let i64x2_mul = SimdBinary (V128 (I64x2 V128Op.Mul)) +let i64x2_shl = SimdShift (V128 (I64x2 V128Op.Shl)) +let i64x2_shr_s = SimdShift (V128 (I64x2 V128Op.ShrS)) +let i64x2_shr_u = SimdShift (V128 (I64x2 V128Op.ShrU)) +let i64x2_extmul_low_i32x4_s = SimdBinary (V128 (I64x2 V128Op.ExtMulLowS)) +let i64x2_extmul_high_i32x4_s = SimdBinary (V128 (I64x2 V128Op.ExtMulHighS)) +let i64x2_extmul_low_i32x4_u = SimdBinary (V128 (I64x2 V128Op.ExtMulLowU)) +let i64x2_extmul_high_i32x4_u = SimdBinary (V128 (I64x2 V128Op.ExtMulHighU)) -let f32x4_splat = SimdSplat (V128 V128Op.(F32x4 Splat)) -let f32x4_extract_lane i = SimdExtract (V128 V128Op.(F32x4 (Extract (i, ())))) -let f32x4_replace_lane i = SimdReplace (V128 V128Op.(F32x4 (Replace i))) -let f32x4_eq = SimdBinary (V128 V128Op.(F32x4 Eq)) -let f32x4_ne = SimdBinary (V128 V128Op.(F32x4 Ne)) -let f32x4_lt = SimdBinary (V128 V128Op.(F32x4 Lt)) -let f32x4_le = SimdBinary (V128 V128Op.(F32x4 Le)) -let f32x4_gt = SimdBinary (V128 V128Op.(F32x4 Gt)) -let f32x4_ge = SimdBinary (V128 V128Op.(F32x4 Ge)) -let f32x4_abs = SimdUnary (V128 V128Op.(F32x4 Abs)) -let f32x4_neg = SimdUnary (V128 V128Op.(F32x4 Neg)) -let f32x4_sqrt = SimdUnary (V128 V128Op.(F32x4 Sqrt)) -let f32x4_ceil = SimdUnary (V128 V128Op.(F32x4 Ceil)) -let f32x4_floor = SimdUnary (V128 V128Op.(F32x4 Floor)) -let f32x4_trunc = SimdUnary (V128 V128Op.(F32x4 Trunc)) -let f32x4_nearest = SimdUnary (V128 V128Op.(F32x4 Nearest)) -let f32x4_add = SimdBinary (V128 V128Op.(F32x4 Add)) -let f32x4_sub = SimdBinary (V128 V128Op.(F32x4 Sub)) -let f32x4_mul = SimdBinary (V128 V128Op.(F32x4 Mul)) -let f32x4_div = SimdBinary (V128 V128Op.(F32x4 Div)) -let f32x4_min = SimdBinary (V128 V128Op.(F32x4 Min)) -let f32x4_max = SimdBinary (V128 V128Op.(F32x4 Max)) -let f32x4_pmin = SimdBinary (V128 V128Op.(F32x4 Pmin)) -let f32x4_pmax = SimdBinary (V128 V128Op.(F32x4 Pmax)) -let f32x4_demote_f64x2_zero = SimdUnary (V128 V128Op.(F32x4 DemoteZeroF64x2)) -let f32x4_convert_i32x4_s = SimdUnary (V128 V128Op.(F32x4 ConvertSI32x4)) -let f32x4_convert_i32x4_u = SimdUnary (V128 V128Op.(F32x4 ConvertUI32x4)) +let f32x4_splat = SimdSplat (V128 (F32x4 V128Op.Splat)) +let f32x4_extract_lane i = SimdExtract (V128 (F32x4 (V128Op.Extract (i, ())))) +let f32x4_replace_lane i = SimdReplace (V128 (F32x4 (V128Op.Replace i))) +let f32x4_eq = SimdBinary (V128 (F32x4 V128Op.Eq)) +let f32x4_ne = SimdBinary (V128 (F32x4 V128Op.Ne)) +let f32x4_lt = SimdBinary (V128 (F32x4 V128Op.Lt)) +let f32x4_le = SimdBinary (V128 (F32x4 V128Op.Le)) +let f32x4_gt = SimdBinary (V128 (F32x4 V128Op.Gt)) +let f32x4_ge = SimdBinary (V128 (F32x4 V128Op.Ge)) +let f32x4_abs = SimdUnary (V128 (F32x4 V128Op.Abs)) +let f32x4_neg = SimdUnary (V128 (F32x4 V128Op.Neg)) +let f32x4_sqrt = SimdUnary (V128 (F32x4 V128Op.Sqrt)) +let f32x4_ceil = SimdUnary (V128 (F32x4 V128Op.Ceil)) +let f32x4_floor = SimdUnary (V128 (F32x4 V128Op.Floor)) +let f32x4_trunc = SimdUnary (V128 (F32x4 V128Op.Trunc)) +let f32x4_nearest = SimdUnary (V128 (F32x4 V128Op.Nearest)) +let f32x4_add = SimdBinary (V128 (F32x4 V128Op.Add)) +let f32x4_sub = SimdBinary (V128 (F32x4 V128Op.Sub)) +let f32x4_mul = SimdBinary (V128 (F32x4 V128Op.Mul)) +let f32x4_div = SimdBinary (V128 (F32x4 V128Op.Div)) +let f32x4_min = SimdBinary (V128 (F32x4 V128Op.Min)) +let f32x4_max = SimdBinary (V128 (F32x4 V128Op.Max)) +let f32x4_pmin = SimdBinary (V128 (F32x4 V128Op.Pmin)) +let f32x4_pmax = SimdBinary (V128 (F32x4 V128Op.Pmax)) +let f32x4_demote_f64x2_zero = SimdUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) +let f32x4_convert_i32x4_s = SimdUnary (V128 (F32x4 V128Op.ConvertSI32x4)) +let f32x4_convert_i32x4_u = SimdUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -let f64x2_splat = SimdSplat (V128 V128Op.(F64x2 Splat)) -let f64x2_extract_lane i = SimdExtract (V128 V128Op.(F64x2 (Extract (i, ())))) -let f64x2_replace_lane i = SimdReplace (V128 V128Op.(F64x2 (Replace i))) -let f64x2_eq = SimdBinary (V128 V128Op.(F64x2 Eq)) -let f64x2_ne = SimdBinary (V128 V128Op.(F64x2 Ne)) -let f64x2_lt = SimdBinary (V128 V128Op.(F64x2 Lt)) -let f64x2_le = SimdBinary (V128 V128Op.(F64x2 Le)) -let f64x2_gt = SimdBinary (V128 V128Op.(F64x2 Gt)) -let f64x2_ge = SimdBinary (V128 V128Op.(F64x2 Ge)) -let f64x2_neg = SimdUnary (V128 V128Op.(F64x2 Neg)) -let f64x2_sqrt = SimdUnary (V128 V128Op.(F64x2 Sqrt)) -let f64x2_ceil = SimdUnary (V128 V128Op.(F64x2 Ceil)) -let f64x2_floor = SimdUnary (V128 V128Op.(F64x2 Floor)) -let f64x2_trunc = SimdUnary (V128 V128Op.(F64x2 Trunc)) -let f64x2_nearest = SimdUnary (V128 V128Op.(F64x2 Nearest)) -let f64x2_add = SimdBinary (V128 V128Op.(F64x2 Add)) -let f64x2_sub = SimdBinary (V128 V128Op.(F64x2 Sub)) -let f64x2_mul = SimdBinary (V128 V128Op.(F64x2 Mul)) -let f64x2_div = SimdBinary (V128 V128Op.(F64x2 Div)) -let f64x2_min = SimdBinary (V128 V128Op.(F64x2 Min)) -let f64x2_max = SimdBinary (V128 V128Op.(F64x2 Max)) -let f64x2_abs = SimdUnary (V128 V128Op.(F64x2 Abs)) -let f64x2_pmin = SimdBinary (V128 V128Op.(F64x2 Pmin)) -let f64x2_pmax = SimdBinary (V128 V128Op.(F64x2 Pmax)) -let f64x2_promote_low_f32x4 = SimdUnary (V128 V128Op.(F64x2 PromoteLowF32x4)) -let f64x2_convert_low_i32x4_s = SimdUnary (V128 V128Op.(F64x2 ConvertSI32x4)) -let f64x2_convert_low_i32x4_u = SimdUnary (V128 V128Op.(F64x2 ConvertUI32x4)) +let f64x2_splat = SimdSplat (V128 (F64x2 V128Op.Splat)) +let f64x2_extract_lane i = SimdExtract (V128 (F64x2 (V128Op.Extract (i, ())))) +let f64x2_replace_lane i = SimdReplace (V128 (F64x2 (V128Op.Replace i))) +let f64x2_eq = SimdBinary (V128 (F64x2 V128Op.Eq)) +let f64x2_ne = SimdBinary (V128 (F64x2 V128Op.Ne)) +let f64x2_lt = SimdBinary (V128 (F64x2 V128Op.Lt)) +let f64x2_le = SimdBinary (V128 (F64x2 V128Op.Le)) +let f64x2_gt = SimdBinary (V128 (F64x2 V128Op.Gt)) +let f64x2_ge = SimdBinary (V128 (F64x2 V128Op.Ge)) +let f64x2_neg = SimdUnary (V128 (F64x2 V128Op.Neg)) +let f64x2_sqrt = SimdUnary (V128 (F64x2 V128Op.Sqrt)) +let f64x2_ceil = SimdUnary (V128 (F64x2 V128Op.Ceil)) +let f64x2_floor = SimdUnary (V128 (F64x2 V128Op.Floor)) +let f64x2_trunc = SimdUnary (V128 (F64x2 V128Op.Trunc)) +let f64x2_nearest = SimdUnary (V128 (F64x2 V128Op.Nearest)) +let f64x2_add = SimdBinary (V128 (F64x2 V128Op.Add)) +let f64x2_sub = SimdBinary (V128 (F64x2 V128Op.Sub)) +let f64x2_mul = SimdBinary (V128 (F64x2 V128Op.Mul)) +let f64x2_div = SimdBinary (V128 (F64x2 V128Op.Div)) +let f64x2_min = SimdBinary (V128 (F64x2 V128Op.Min)) +let f64x2_max = SimdBinary (V128 (F64x2 V128Op.Max)) +let f64x2_abs = SimdUnary (V128 (F64x2 V128Op.Abs)) +let f64x2_pmin = SimdBinary (V128 (F64x2 V128Op.Pmin)) +let f64x2_pmax = SimdBinary (V128 (F64x2 V128Op.Pmax)) +let f64x2_promote_low_f32x4 = SimdUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) +let f64x2_convert_low_i32x4_s = SimdUnary (V128 (F64x2 V128Op.ConvertSI32x4)) +let f64x2_convert_low_i32x4_u = SimdUnary (V128 (F64x2 V128Op.ConvertUI32x4)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 82855d30cf..68bf2d7206 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -2,7 +2,6 @@ open Source open Ast open Script open Values -open Simd open Types open Sexpr @@ -336,12 +335,12 @@ struct let lane_oper (pop, iop, fop) op = match op with - | I8x16 o -> pop "8x16" o - | I16x8 o -> pop "16x8" o - | I32x4 o -> iop "32x4" o - | I64x2 o -> iop "64x2" o - | F32x4 o -> fop "32x4" o - | F64x2 o -> fop "64x2" o + | V128.I8x16 o -> pop "8x16" o + | V128.I16x8 o -> pop "16x8" o + | V128.I32x4 o -> iop "32x4" o + | V128.I64x2 o -> iop "64x2" o + | V128.F32x4 o -> fop "32x4" o + | V128.F64x2 o -> fop "64x2" o end let oper (iop, fop) op = @@ -359,7 +358,7 @@ let simd_oper (vop) op = let simd_shape_oper (pop, iop, fop) op = match op with - | V128 o -> Simd.string_of_shape o ^ "." ^ V128Op.lane_oper (pop, iop, fop) o + | V128 o -> V128.string_of_shape o ^ "." ^ V128Op.lane_oper (pop, iop, fop) o let unop = oper (IntOp.unop, FloatOp.unop) let binop = oper (IntOp.binop, FloatOp.binop) @@ -711,9 +710,9 @@ let num_pat mode = function let lane_pat mode pat shape = let choose fb ft = if mode = `Binary then fb else ft in match pat, shape with - | NumPat {it = Values.I32 i; _}, Simd.I8x16 () -> + | NumPat {it = Values.I32 i; _}, V128.I8x16 () -> choose I8.to_hex_string I8.to_string_s i - | NumPat {it = Values.I32 i; _}, Simd.I16x8 () -> + | NumPat {it = Values.I32 i; _}, V128.I16x8 () -> choose I16.to_hex_string I16.to_string_s i | NumPat n, _ -> num mode n.it | NanPat nan, _ -> nanop nan @@ -721,7 +720,7 @@ let lane_pat mode pat shape = let simd_pat mode = function | SimdPat (V128 (shape, pats)) -> let lanes = List.map (fun p -> Atom (lane_pat mode p shape)) pats in - Node ("v128.const " ^ Simd.string_of_shape shape, lanes) + Node ("v128.const " ^ V128.string_of_shape shape, lanes) let ref_pat = function | RefPat r -> ref_ r.it diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 8eb50a57cd..99750e0e68 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -78,7 +78,7 @@ let numop t i32 i64 f32 f64 = | "f64" -> f64 | _ -> assert false -let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = +let v128op s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = match s with | "i8x16" -> i8x16 | "i16x8" -> i16x8 @@ -88,7 +88,7 @@ let simdop s i8x16 i16x8 i32x4 i64x2 f32x4 f64x2 = | "f64x2" -> f64x2 | _ -> assert false -let simd_int_op s i8x16 i16x8 i32x4 i64x2 = +let v128intop s i8x16 i16x8 i32x4 i64x2 = match s with | "i8x16" -> i8x16 | "i16x8" -> i16x8 @@ -96,7 +96,7 @@ let simd_int_op s i8x16 i16x8 i32x4 i64x2 = | "i64x2" -> i64x2 | _ -> assert false -let simd_float_op s f32x4 f64x2 = +let v128floatop s f32x4 f64x2 = match s with | "f32x4" -> f32x4 | "f64x2" -> f64x2 @@ -117,13 +117,13 @@ let ext e s u = let opt = Lib.Option.get -let simd_shape = function - | "i8x16" -> Simd.I8x16 () - | "i16x8" -> Simd.I16x8 () - | "i32x4" -> Simd.I32x4 () - | "i64x2" -> Simd.I64x2 () - | "f32x4" -> Simd.F32x4 () - | "f64x2" -> Simd.F64x2 () +let v128_shape = function + | "i8x16" -> V128.I8x16 () + | "i16x8" -> V128.I16x8 () + | "i32x4" -> V128.I32x4 () + | "i64x2" -> V128.I64x2 () + | "f32x4" -> V128.F32x4 () + | "f64x2" -> V128.F64x2 () | _ -> assert false let only shapes s lexbuf = @@ -192,9 +192,9 @@ let mixx = "i" ("8" | "16" | "32" | "64") let mfxx = "f" ("32" | "64") let sign = "s" | "u" let mem_size = "8" | "16" | "32" -let simd_int_shape = "i8x16" | "i16x8" | "i32x4" | "i64x2" -let simd_float_shape = "f32x4" | "f64x2" -let simd_shape = simd_int_shape | simd_float_shape +let v128_int_shape = "i8x16" | "i16x8" | "i32x4" | "i64x2" +let v128_float_shape = "f32x4" | "f64x2" +let v128_shape = v128_int_shape | v128_float_shape rule token = parse | "(" { LPAR } @@ -218,7 +218,7 @@ rule token = parse | vxxx as t { SIMD_TYPE (simd_type t) } | "mut" { MUT } - | simd_shape as s { SIMD_SHAPE (simd_shape s) } + | v128_shape as s { SIMD_SHAPE (v128_shape s) } | (nxx as t)".const" { let open Source in @@ -491,26 +491,26 @@ rule token = parse | vxxx".bitselect" { SIMD_TERNARY v128_bitselect } | vxxx".any_true" { SIMD_TEST (v128_any_true) } - | (simd_shape as s)".neg" + | (v128_shape as s)".neg" { SIMD_UNARY - (simdop s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } - | (simd_float_shape as s)".sqrt" - { SIMD_UNARY (simd_float_op s f32x4_sqrt f64x2_sqrt) } - | (simd_float_shape as s)".ceil" - { SIMD_UNARY (simd_float_op s f32x4_ceil f64x2_ceil) } - | (simd_float_shape as s)".floor" - { SIMD_UNARY (simd_float_op s f32x4_floor f64x2_floor) } - | (simd_float_shape as s)".trunc" - { SIMD_UNARY (simd_float_op s f32x4_trunc f64x2_trunc) } - | (simd_float_shape as s)".nearest" - { SIMD_UNARY (simd_float_op s f32x4_nearest f64x2_nearest) } - | (simd_shape as s)".abs" + (v128op s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } + | (v128_float_shape as s)".sqrt" + { SIMD_UNARY (v128floatop s f32x4_sqrt f64x2_sqrt) } + | (v128_float_shape as s)".ceil" + { SIMD_UNARY (v128floatop s f32x4_ceil f64x2_ceil) } + | (v128_float_shape as s)".floor" + { SIMD_UNARY (v128floatop s f32x4_floor f64x2_floor) } + | (v128_float_shape as s)".trunc" + { SIMD_UNARY (v128floatop s f32x4_trunc f64x2_trunc) } + | (v128_float_shape as s)".nearest" + { SIMD_UNARY (v128floatop s f32x4_nearest f64x2_nearest) } + | (v128_shape as s)".abs" { SIMD_UNARY - (simdop s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } + (v128op s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } | "i8x16.popcnt" { SIMD_UNARY i8x16_popcnt } - | (simd_int_shape as s)".avgr_u" + | (v128_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; - SIMD_UNARY (simd_int_op s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } + SIMD_UNARY (v128intop s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } | "i32x4.trunc_sat_f32x4_"(sign as s) { SIMD_UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" @@ -528,76 +528,76 @@ rule token = parse | "i32x4.extadd_pairwise_i16x8_"(sign as s) { SIMD_UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } - | (simd_shape as s)".eq" - { SIMD_BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } - | (simd_shape as s)".ne" - { SIMD_BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } - | (simd_int_shape as s)".lt_s" - { SIMD_BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } - | (simd_int_shape as s)".lt_u" + | (v128_shape as s)".eq" + { SIMD_BINARY (v128op s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } + | (v128_shape as s)".ne" + { SIMD_BINARY (v128op s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } + | (v128_int_shape as s)".lt_s" + { SIMD_BINARY (v128intop s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } + | (v128_int_shape as s)".lt_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (simd_int_op s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } - | (simd_int_shape as s)".le_s" - { SIMD_BINARY (simd_int_op s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } - | (simd_int_shape as s)".le_u" + SIMD_BINARY (v128intop s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } + | (v128_int_shape as s)".le_s" + { SIMD_BINARY (v128intop s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } + | (v128_int_shape as s)".le_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (simd_int_op s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } - | (simd_int_shape as s)".gt_s" - { SIMD_BINARY (simd_int_op s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } - | (simd_int_shape as s)".gt_u" + SIMD_BINARY (v128intop s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } + | (v128_int_shape as s)".gt_s" + { SIMD_BINARY (v128intop s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } + | (v128_int_shape as s)".gt_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (simd_int_op s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } - | (simd_int_shape as s)".ge_s" - { SIMD_BINARY (simd_int_op s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } - | (simd_int_shape as s)".ge_u" + SIMD_BINARY (v128intop s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } + | (v128_int_shape as s)".ge_s" + { SIMD_BINARY (v128intop s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } + | (v128_int_shape as s)".ge_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (simd_int_op s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } - | (simd_float_shape as s)".lt" { SIMD_BINARY (simd_float_op s f32x4_lt f64x2_lt) } - | (simd_float_shape as s)".le" { SIMD_BINARY (simd_float_op s f32x4_le f64x2_le) } - | (simd_float_shape as s)".gt" { SIMD_BINARY (simd_float_op s f32x4_gt f64x2_gt) } - | (simd_float_shape as s)".ge" { SIMD_BINARY (simd_float_op s f32x4_ge f64x2_ge) } + SIMD_BINARY (v128intop s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } + | (v128_float_shape as s)".lt" { SIMD_BINARY (v128floatop s f32x4_lt f64x2_lt) } + | (v128_float_shape as s)".le" { SIMD_BINARY (v128floatop s f32x4_le f64x2_le) } + | (v128_float_shape as s)".gt" { SIMD_BINARY (v128floatop s f32x4_gt f64x2_gt) } + | (v128_float_shape as s)".ge" { SIMD_BINARY (v128floatop s f32x4_ge f64x2_ge) } | "i8x16.swizzle" { SIMD_BINARY i8x16_swizzle } - | (simd_shape as s)".add" + | (v128_shape as s)".add" { SIMD_BINARY - (simdop s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } - | (simd_shape as s)".sub" + (v128op s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } + | (v128_shape as s)".sub" { SIMD_BINARY - (simdop s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } - | (simd_shape as s)".min_s" + (v128op s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } + | (v128_shape as s)".min_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; SIMD_BINARY - (simdop s i8x16_min_s i16x8_min_s i32x4_min_s unreachable + (v128op s i8x16_min_s i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } - | (simd_shape as s)".min_u" + | (v128_shape as s)".min_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; SIMD_BINARY - (simdop s i8x16_min_u i16x8_min_u i32x4_min_u unreachable + (v128op s i8x16_min_u i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } - | (simd_shape as s)".max_s" + | (v128_shape as s)".max_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; SIMD_BINARY - (simdop s i8x16_max_s i16x8_max_s i32x4_max_s unreachable + (v128op s i8x16_max_s i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } - | (simd_shape as s)".max_u" + | (v128_shape as s)".max_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; SIMD_BINARY - (simdop s i8x16_max_u i16x8_max_u i32x4_max_u unreachable + (v128op s i8x16_max_u i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } - | (simd_shape as s)".mul" + | (v128_shape as s)".mul" { only ["i16x8"; "i32x4"; "i64x2"; "f32x4"; "f64x2"] s lexbuf; SIMD_BINARY - (simdop s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } - | (simd_float_shape as s)".div" - { SIMD_BINARY (simd_float_op s f32x4_div f64x2_div) } - | (simd_float_shape as s)".min" - { SIMD_BINARY (simd_float_op s f32x4_min f64x2_min) } - | (simd_float_shape as s)".max" - { SIMD_BINARY (simd_float_op s f32x4_max f64x2_max) } - | (simd_float_shape as s)".pmin" - { SIMD_BINARY (simd_float_op s f32x4_pmin f64x2_pmin) } - | (simd_float_shape as s)".pmax" - { SIMD_BINARY (simd_float_op s f32x4_pmax f64x2_pmax) } + (v128op s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } + | (v128_float_shape as s)".div" + { SIMD_BINARY (v128floatop s f32x4_div f64x2_div) } + | (v128_float_shape as s)".min" + { SIMD_BINARY (v128floatop s f32x4_min f64x2_min) } + | (v128_float_shape as s)".max" + { SIMD_BINARY (v128floatop s f32x4_max f64x2_max) } + | (v128_float_shape as s)".pmin" + { SIMD_BINARY (v128floatop s f32x4_pmin f64x2_pmin) } + | (v128_float_shape as s)".pmax" + { SIMD_BINARY (v128floatop s f32x4_pmax f64x2_pmax) } | "i8x16.add_sat_"(sign as s) { SIMD_BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } | "i8x16.sub_sat_"(sign as s) @@ -639,27 +639,27 @@ rule token = parse | "i16x8.q15mulr_sat_s" { SIMD_BINARY i16x8_q15mulr_sat_s } - | (simd_int_shape as s)".all_true" + | (v128_int_shape as s)".all_true" { SIMD_TEST - (simd_int_op s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } - | (simd_int_shape as s)".bitmask" + (v128intop s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } + | (v128_int_shape as s)".bitmask" { SIMD_BITMASK - (simd_int_op s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } - | (simd_int_shape as s)".shl" - { SIMD_SHIFT (simd_int_op s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } - | (simd_int_shape as s)".shr_s" - { SIMD_SHIFT (simd_int_op s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } - | (simd_int_shape as s)".shr_u" - { SIMD_SHIFT (simd_int_op s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } + (v128intop s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } + | (v128_int_shape as s)".shl" + { SIMD_SHIFT (v128intop s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } + | (v128_int_shape as s)".shr_s" + { SIMD_SHIFT (v128intop s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } + | (v128_int_shape as s)".shr_u" + { SIMD_SHIFT (v128intop s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } | "i8x16.shuffle" { SIMD_SHUFFLE } - | (simd_shape as s)".splat" - { SIMD_SPLAT (simdop s i8x16_splat i16x8_splat i32x4_splat + | (v128_shape as s)".splat" + { SIMD_SPLAT (v128op s i8x16_splat i16x8_splat i32x4_splat i64x2_splat f32x4_splat f64x2_splat) } - | (simd_shape as s)".extract_lane" + | (v128_shape as s)".extract_lane" { except ["i8x16"; "i16x8"] s lexbuf; SIMD_EXTRACT (fun i -> - simdop s + v128op s (fun _ -> unreachable) (fun _ -> unreachable) i32x4_extract_lane i64x2_extract_lane f32x4_extract_lane f64x2_extract_lane i) } @@ -668,9 +668,9 @@ rule token = parse if t = "i8x16" then ext s i8x16_extract_lane_s i8x16_extract_lane_u i else ext s i16x8_extract_lane_s i16x8_extract_lane_u i )} - | (simd_shape as s)".replace_lane" + | (v128_shape as s)".replace_lane" { SIMD_REPLACE - (simdop s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane + (v128op s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } | name as s { VAR s } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index b74e954a47..d8afc60222 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -47,19 +47,19 @@ let simd f shape ss at = let simd_lane_nan shape l at = let open Values in match shape with - | Simd.F32x4 () -> NanPat (F32 l @@ at) - | Simd.F64x2 () -> NanPat (F64 l @@ at) + | V128.F32x4 () -> NanPat (F32 l @@ at) + | V128.F64x2 () -> NanPat (F64 l @@ at) | _ -> error at "invalid simd constant" let simd_lane_lit shape l at = let open Values in match shape with - | Simd.I8x16 () -> NumPat (I32 (I8.of_string l) @@ at) - | Simd.I16x8 () -> NumPat (I32 (I16.of_string l) @@ at) - | Simd.I32x4 () -> NumPat (I32 (I32.of_string l) @@ at) - | Simd.I64x2 () -> NumPat (I64 (I64.of_string l) @@ at) - | Simd.F32x4 () -> NumPat (F32 (F32.of_string l) @@ at) - | Simd.F64x2 () -> NumPat (F64 (F64.of_string l) @@ at) + | V128.I8x16 () -> NumPat (I32 (I8.of_string l) @@ at) + | V128.I16x8 () -> NumPat (I32 (I16.of_string l) @@ at) + | V128.I32x4 () -> NumPat (I32 (I32.of_string l) @@ at) + | V128.I64x2 () -> NumPat (I64 (I64.of_string l) @@ at) + | V128.F32x4 () -> NumPat (F32 (F32.of_string l) @@ at) + | V128.F64x2 () -> NumPat (F64 (F64.of_string l) @@ at) let simd_lane_index s at = match int_of_string s with @@ -239,7 +239,7 @@ let inline_type_explicit (c : context) x ft at = %token NUM_TYPE %token SIMD_TYPE %token Ast.instr' * Values.num> CONST -%token string Source.phrase list -> Source.region -> Ast.instr' * Values.simd> SIMD_CONST +%token string Source.phrase list -> Source.region -> Ast.instr' * Values.simd> SIMD_CONST %token UNARY %token BINARY %token TEST @@ -262,7 +262,7 @@ let inline_type_explicit (c : context) x ft at = %token Ast.instr'> SIMD_REPLACE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT -%token SIMD_SHAPE +%token SIMD_SHAPE %token NAN @@ -1152,7 +1152,7 @@ result : | LPAR REF_FUNC RPAR { RefResult (RefTypePat FuncRefType) @@ at () } | LPAR REF_EXTERN RPAR { RefResult (RefTypePat ExternRefType) @@ at () } | LPAR SIMD_CONST SIMD_SHAPE numpat_list RPAR { - if Simd.lanes $3 <> List.length $4 then + if V128.num_lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; SimdResult (SimdPat (Values.V128 ($3, List.map (fun lit -> lit $3) $4))) @@ at () } diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 110adb5c4f..135c03d55f 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -113,7 +113,7 @@ let peek i (ell, ts) = let type_num = Values.type_of_num let type_simd = Values.type_of_simd let type_simd_lane = function - | Values.V128 laneop -> Simd.type_of_lane laneop + | Values.V128 laneop -> V128.type_of_lane laneop let type_cvtop at = function | Values.I32 cvtop -> @@ -151,12 +151,12 @@ let type_cvtop at = function | DemoteF64 -> error at "invalid conversion" ), F64Type -let lanes = function - | Values.V128 laneop -> Simd.lanes laneop +let num_lanes = function + | Values.V128 laneop -> V128.num_lanes laneop let lane_extractop = function | Values.V128 extractop -> - let open Simd in let open V128Op in + let open V128 in let open V128Op in match extractop with | I8x16 (Extract (i, _)) | I16x8 (Extract (i, _)) | I32x4 (Extract (i, _)) | I64x2 (Extract (i, _)) @@ -164,7 +164,7 @@ let lane_extractop = function let lane_replaceop = function | Values.V128 replaceop -> - let open Simd in let open V128Op in + let open V128 in let open V128Op in match replaceop with | I8x16 (Replace i) | I16x8 (Replace i) | I32x4 (Replace i) | I64x2 (Replace i) @@ -184,7 +184,7 @@ let check_unop unop at = let check_simd_binop binop at = match binop with - | Values.(V128 (Simd.I8x16 (V128Op.Shuffle is))) -> + | Values.(V128 (V128.I8x16 (V128Op.Shuffle is))) -> if List.exists ((<=) 32) is then error at "invalid lane index" | _ -> () @@ -495,14 +495,14 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | SimdExtract extractop -> let t = SimdType (type_simd extractop) in let t2 = type_simd_lane extractop in - require (lane_extractop extractop < lanes extractop) e.at + require (lane_extractop extractop < num_lanes extractop) e.at "invalid lane index"; [t] --> [NumType t2] | SimdReplace replaceop -> let t = SimdType (type_simd replaceop) in let t2 = type_simd_lane replaceop in - require (lane_replaceop replaceop < lanes replaceop) e.at + require (lane_replaceop replaceop < num_lanes replaceop) e.at "invalid lane index"; [t; NumType t2] --> [t] From eb515ca6982e8967bfe8517e7a3001e909c26791 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 3 Aug 2021 13:37:49 +0200 Subject: [PATCH 359/378] Rename Int/Float to Ixx/Fxx --- interpreter/exec/eval.ml | 6 +++--- interpreter/exec/eval_num.ml | 5 +++-- interpreter/exec/f32.ml | 2 +- interpreter/exec/f64.ml | 2 +- interpreter/exec/{float.ml => fxx.ml} | 0 interpreter/exec/i16.ml | 2 +- interpreter/exec/i32.ml | 2 +- interpreter/exec/i32_convert.ml | 16 ++++++++-------- interpreter/exec/i64.ml | 2 +- interpreter/exec/i64_convert.ml | 16 ++++++++-------- interpreter/exec/i8.ml | 2 +- interpreter/exec/{int.ml => ixx.ml} | 0 12 files changed, 28 insertions(+), 27 deletions(-) rename interpreter/exec/{float.ml => fxx.ml} (100%) rename interpreter/exec/{int.ml => ixx.ml} (100%) diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index a00ce57528..d83d57fcba 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -32,9 +32,9 @@ let memory_error at = function | exn -> raise exn let numeric_error at = function - | Int.Overflow -> "integer overflow" - | Int.DivideByZero -> "integer divide by zero" - | Int.InvalidConversion -> "invalid conversion to integer" + | Ixx.Overflow -> "integer overflow" + | Ixx.DivideByZero -> "integer divide by zero" + | Ixx.InvalidConversion -> "invalid conversion to integer" | Values.TypeError (i, v, t) -> Crash.error at ("type error, expected " ^ Types.string_of_num_type t ^ " as operand " ^ diff --git a/interpreter/exec/eval_num.ml b/interpreter/exec/eval_num.ml index b5eaf3dd04..f1245a133b 100644 --- a/interpreter/exec/eval_num.ml +++ b/interpreter/exec/eval_num.ml @@ -4,7 +4,7 @@ open Values (* Int operators *) -module IntOp (IXX : Int.S) (Num : NumType with type t = IXX.t) = +module IntOp (IXX : Ixx.S) (Num : NumType with type t = IXX.t) = struct open Ast.IntOp open Num @@ -62,7 +62,7 @@ module I64Op = IntOp (I64) (I64Num) (* Float operators *) -module FloatOp (FXX : Float.S) (Num : NumType with type t = FXX.t) = +module FloatOp (FXX : Fxx.S) (Num : NumType with type t = FXX.t) = struct open Ast.FloatOp open Num @@ -105,6 +105,7 @@ end module F32Op = FloatOp (F32) (F32Num) module F64Op = FloatOp (F64) (F64Num) + (* Conversion operators *) module I32CvtOp = diff --git a/interpreter/exec/f32.ml b/interpreter/exec/f32.ml index 5f26a03947..11983ccf6a 100644 --- a/interpreter/exec/f32.ml +++ b/interpreter/exec/f32.ml @@ -3,7 +3,7 @@ * using 64-bit floats, as described in the paper * "When is double rounding innocuous?" by Samuel A. Figueroa. *) -include Float.Make +include Fxx.Make (struct include Int32 let mantissa = 23 diff --git a/interpreter/exec/f64.ml b/interpreter/exec/f64.ml index 623150fe76..9a9f7ebcac 100644 --- a/interpreter/exec/f64.ml +++ b/interpreter/exec/f64.ml @@ -1,4 +1,4 @@ -include Float.Make +include Fxx.Make (struct include Int64 let mantissa = 52 diff --git a/interpreter/exec/float.ml b/interpreter/exec/fxx.ml similarity index 100% rename from interpreter/exec/float.ml rename to interpreter/exec/fxx.ml diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index 8fc1b6a017..bf0ab58a9c 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -1,7 +1,7 @@ (* I16 for SIMD. Uses Int32 as the underlying storage. All int16 values will be * stored signed-extended. E.g. -1 will be stored with all high bits set. *) -include Int.Make (struct +include Ixx.Make (struct include Int32 let bitwidth = 16 diff --git a/interpreter/exec/i32.ml b/interpreter/exec/i32.ml index a6bb489b0c..49c85e2fa1 100644 --- a/interpreter/exec/i32.ml +++ b/interpreter/exec/i32.ml @@ -1,6 +1,6 @@ (* WebAssembly-compatible i32 implementation *) -include Int.Make +include Ixx.Make (struct include Int32 let bitwidth = 32 diff --git a/interpreter/exec/i32_convert.ml b/interpreter/exec/i32_convert.ml index 03cb413131..166d5ff0fd 100644 --- a/interpreter/exec/i32_convert.ml +++ b/interpreter/exec/i32_convert.ml @@ -4,41 +4,41 @@ let wrap_i64 x = Int64.to_int32 x let trunc_f32_s x = if F32.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int32.(to_float min_int) || xf < Int32.(to_float min_int) then - raise Int.Overflow + raise Ixx.Overflow else Int32.of_float xf let trunc_f32_u x = if F32.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int32.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Int.Overflow + raise Ixx.Overflow else Int64.(to_int32 (of_float xf)) let trunc_f64_s x = if F64.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int32.(to_float min_int) || xf <= Int32.(to_float min_int) -. 1.0 then - raise Int.Overflow + raise Ixx.Overflow else Int32.of_float xf let trunc_f64_u x = if F64.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int32.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Int.Overflow + raise Ixx.Overflow else Int64.(to_int32 (of_float xf)) diff --git a/interpreter/exec/i64.ml b/interpreter/exec/i64.ml index 497e13a2d0..f43235dd3e 100644 --- a/interpreter/exec/i64.ml +++ b/interpreter/exec/i64.ml @@ -1,6 +1,6 @@ (* WebAssembly-compatible i64 implementation *) -include Int.Make +include Ixx.Make (struct include Int64 let bitwidth = 64 diff --git a/interpreter/exec/i64_convert.ml b/interpreter/exec/i64_convert.ml index 9c27c3d358..835cdf6c73 100644 --- a/interpreter/exec/i64_convert.ml +++ b/interpreter/exec/i64_convert.ml @@ -6,21 +6,21 @@ let extend_i32_u x = Int64.logand (Int64.of_int32 x) 0x0000_0000_ffff_ffffL let trunc_f32_s x = if F32.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int64.(to_float min_int) || xf < Int64.(to_float min_int) then - raise Int.Overflow + raise Ixx.Overflow else Int64.of_float xf let trunc_f32_u x = if F32.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F32.to_float x in if xf >= -.Int64.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Int.Overflow + raise Ixx.Overflow else if xf >= -.Int64.(to_float min_int) then Int64.(logxor (of_float (xf -. 0x1p63)) min_int) else @@ -28,21 +28,21 @@ let trunc_f32_u x = let trunc_f64_s x = if F64.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int64.(to_float min_int) || xf < Int64.(to_float min_int) then - raise Int.Overflow + raise Ixx.Overflow else Int64.of_float xf let trunc_f64_u x = if F64.ne x x then - raise Int.InvalidConversion + raise Ixx.InvalidConversion else let xf = F64.to_float x in if xf >= -.Int64.(to_float min_int) *. 2.0 || xf <= -1.0 then - raise Int.Overflow + raise Ixx.Overflow else if xf >= -.Int64.(to_float min_int) then Int64.(logxor (of_float (xf -. 0x1p63)) min_int) else diff --git a/interpreter/exec/i8.ml b/interpreter/exec/i8.ml index dce4075575..110b8a7187 100644 --- a/interpreter/exec/i8.ml +++ b/interpreter/exec/i8.ml @@ -1,7 +1,7 @@ (* I8 for SIMD. Uses Int32 as the underlying storage. All int8 values will be * stored signed-extended. E.g. -1 will be stored with all high bits set. *) -include Int.Make (struct +include Ixx.Make (struct include Int32 let bitwidth = 8 diff --git a/interpreter/exec/int.ml b/interpreter/exec/ixx.ml similarity index 100% rename from interpreter/exec/int.ml rename to interpreter/exec/ixx.ml From 2387754204cafd5c968c2f152079f31c15dd860f Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 3 Aug 2021 13:52:47 +0200 Subject: [PATCH 360/378] Rename internal modules as well --- interpreter/exec/v128.ml | 130 +++++++++++++++++++-------------------- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/interpreter/exec/v128.ml b/interpreter/exec/v128.ml index 640fd25381..550fd9bfab 100644 --- a/interpreter/exec/v128.ml +++ b/interpreter/exec/v128.ml @@ -94,10 +94,10 @@ sig val q15mulr_sat_s : t -> t -> t end -module MakeIntShape (Int : Int.S) (Cvt : Convert(Int).S) : - IntShape with type lane = Int.t = +module MakeIntShape (IXX : Ixx.S) (Cvt : Convert(IXX).S) : + IntShape with type lane = IXX.t = struct - type lane = Int.t + type lane = IXX.t let num_lanes = num_lanes Cvt.shape let of_lanes = Cvt.of_lanes @@ -106,60 +106,60 @@ struct let unop f x = of_lanes (List.map f (to_lanes x)) let unopi f x = of_lanes (List.mapi f (to_lanes x)) let binop f x y = of_lanes (List.map2 f (to_lanes x) (to_lanes y)) + let reduceop f a s = List.fold_left (fun a b -> f a (b <> IXX.zero)) a (to_lanes s) + let cmp f x y = if f x y then IXX.of_int_s (-1) else IXX.zero let splat x = of_lanes (List.init num_lanes (fun i -> x)) let extract_lane_s i s = List.nth (to_lanes s) i - let extract_lane_u i s = Int.as_unsigned (extract_lane_s i s) + let extract_lane_u i s = IXX.as_unsigned (extract_lane_s i s) let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v - let cmp f x y = if f x y then (Int.of_int_s (-1)) else Int.zero - let eq = binop (cmp Int.eq) - let ne = binop (cmp Int.ne) - let lt_s = binop (cmp Int.lt_s) - let lt_u = binop (cmp Int.lt_u) - let le_s = binop (cmp Int.le_s) - let le_u = binop (cmp Int.le_u) - let gt_s = binop (cmp Int.gt_s) - let gt_u = binop (cmp Int.gt_u) - let ge_s = binop (cmp Int.ge_s) - let ge_u = binop (cmp Int.ge_u) - let abs = unop Int.abs - let neg = unop Int.neg - let popcnt = unop Int.popcnt - let add = binop Int.add - let sub = binop Int.sub - let mul = binop Int.mul + let eq = binop (cmp IXX.eq) + let ne = binop (cmp IXX.ne) + let lt_s = binop (cmp IXX.lt_s) + let lt_u = binop (cmp IXX.lt_u) + let le_s = binop (cmp IXX.le_s) + let le_u = binop (cmp IXX.le_u) + let gt_s = binop (cmp IXX.gt_s) + let gt_u = binop (cmp IXX.gt_u) + let ge_s = binop (cmp IXX.ge_s) + let ge_u = binop (cmp IXX.ge_u) + let abs = unop IXX.abs + let neg = unop IXX.neg + let popcnt = unop IXX.popcnt + let add = binop IXX.add + let sub = binop IXX.sub + let mul = binop IXX.mul let choose f x y = if f x y then x else y - let min_s = binop (choose Int.le_s) - let min_u = binop (choose Int.le_u) - let max_s = binop (choose Int.ge_s) - let max_u = binop (choose Int.ge_u) + let min_s = binop (choose IXX.le_s) + let min_u = binop (choose IXX.le_u) + let max_s = binop (choose IXX.ge_s) + let max_u = binop (choose IXX.ge_u) (* The result of avgr_u will not overflow this type, but the intermediate might, * so have the Int type implement it so they can extend it accordingly *) - let avgr_u = binop Int.avgr_u - let reduceop f a s = List.fold_left (fun a b -> f a (b <> Int.zero)) a (to_lanes s) + let avgr_u = binop IXX.avgr_u let any_true = reduceop (||) false let all_true = reduceop (&&) true (* Extract top bits using signed-comparision with zero *) let bitmask x = let xs = to_lanes x in - let negs = List.map (fun x -> if Int.(lt_s x zero) then Int32.one else Int32.zero) xs in + let negs = List.map (fun x -> if IXX.(lt_s x zero) then Int32.one else Int32.zero) xs in List.fold_right (fun a b -> Int32.(logor a (shift_left b 1))) negs Int32.zero let shl v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shl a shift) v + let shift = IXX.of_int_u (Int32.to_int s) in + unop (fun a -> IXX.shl a shift) v let shr_s v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shr_s a shift) v + let shift = IXX.of_int_u (Int32.to_int s) in + unop (fun a -> IXX.shr_s a shift) v let shr_u v s = - let shift = Int.of_int_u (Int32.to_int s) in - unop (fun a -> Int.shr_u a shift) v - let add_sat_s = binop Int.add_sat_s - let add_sat_u = binop Int.add_sat_u - let sub_sat_s = binop Int.sub_sat_s - let sub_sat_u = binop Int.sub_sat_u + let shift = IXX.of_int_u (Int32.to_int s) in + unop (fun a -> IXX.shr_u a shift) v + let add_sat_s = binop IXX.add_sat_s + let add_sat_u = binop IXX.add_sat_u + let sub_sat_s = binop IXX.sub_sat_s + let sub_sat_u = binop IXX.sub_sat_u (* The intermediate will overflow lane.t, so have Int implement this. *) - let q15mulr_sat_s = binop Int.q15mulr_sat_s + let q15mulr_sat_s = binop IXX.q15mulr_sat_s end module type FloatShape = @@ -197,10 +197,10 @@ sig val pmax : t -> t -> t end -module MakeFloatShape (Float : Float.S) (Cvt : Convert(Float).S) : - FloatShape with type lane = Float.t = +module MakeFloatShape (FXX : Fxx.S) (Cvt : Convert(FXX).S) : + FloatShape with type lane = FXX.t = struct - type lane = Float.t + type lane = FXX.t let num_lanes = num_lanes Cvt.shape let of_lanes = Cvt.of_lanes @@ -209,34 +209,34 @@ struct let unop f x = of_lanes (List.map f (to_lanes x)) let unopi f x = of_lanes (List.mapi f (to_lanes x)) let binop f x y = of_lanes (List.map2 f (to_lanes x) (to_lanes y)) + let all_ones = FXX.of_float (Int64.float_of_bits (Int64.minus_one)) + let cmp f x y = if f x y then all_ones else FXX.zero let splat x = of_lanes (List.init num_lanes (fun i -> x)) let extract_lane i s = List.nth (to_lanes s) i let replace_lane i v x = unopi (fun j y -> if j = i then x else y) v - let all_ones = Float.of_float (Int64.float_of_bits (Int64.minus_one)) - let cmp f x y = if f x y then all_ones else Float.zero - let eq = binop (cmp Float.eq) - let ne = binop (cmp Float.ne) - let lt = binop (cmp Float.lt) - let le = binop (cmp Float.le) - let gt = binop (cmp Float.gt) - let ge = binop (cmp Float.ge) - let abs = unop Float.abs - let neg = unop Float.neg - let sqrt = unop Float.sqrt - let ceil = unop Float.ceil - let floor = unop Float.floor - let trunc = unop Float.trunc - let nearest = unop Float.nearest - let add = binop Float.add - let sub = binop Float.sub - let mul = binop Float.mul - let div = binop Float.div - let min = binop Float.min - let max = binop Float.max - let pmin = binop (fun x y -> if Float.lt y x then y else x) - let pmax = binop (fun x y -> if Float.lt x y then y else x) + let eq = binop (cmp FXX.eq) + let ne = binop (cmp FXX.ne) + let lt = binop (cmp FXX.lt) + let le = binop (cmp FXX.le) + let gt = binop (cmp FXX.gt) + let ge = binop (cmp FXX.ge) + let abs = unop FXX.abs + let neg = unop FXX.neg + let sqrt = unop FXX.sqrt + let ceil = unop FXX.ceil + let floor = unop FXX.floor + let trunc = unop FXX.trunc + let nearest = unop FXX.nearest + let add = binop FXX.add + let sub = binop FXX.sub + let mul = binop FXX.mul + let div = binop FXX.div + let min = binop FXX.min + let max = binop FXX.max + let pmin = binop (fun x y -> if FXX.lt y x then y else x) + let pmax = binop (fun x y -> if FXX.lt x y then y else x) end module I8x16 = MakeIntShape (I8) From e68f37aea74f42f238258b51556d6b34249d4bd3 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 5 Aug 2021 13:56:40 +0200 Subject: [PATCH 361/378] Simd -> Vec --- interpreter/binary/decode.ml | 8 +- interpreter/binary/encode.ml | 556 +++++++++--------- interpreter/exec/eval.ml | 70 +-- interpreter/exec/eval_simd.mli | 14 - .../exec/{eval_simd.ml => eval_vec.ml} | 30 +- interpreter/exec/eval_vec.mli | 14 + interpreter/exec/i16.ml | 2 +- interpreter/exec/i8.ml | 2 +- interpreter/host/spectest.ml | 2 +- interpreter/runtime/memory.ml | 10 +- interpreter/runtime/memory.mli | 12 +- interpreter/script/js.ml | 28 +- interpreter/script/run.ml | 14 +- interpreter/script/script.ml | 6 +- interpreter/syntax/ast.ml | 68 +-- interpreter/syntax/free.ml | 10 +- interpreter/syntax/operators.ml | 472 +++++++-------- interpreter/syntax/types.ml | 16 +- interpreter/syntax/values.ml | 42 +- interpreter/text/arrange.ml | 94 +-- interpreter/text/lexer.mll | 208 +++---- interpreter/text/parser.mly | 104 ++-- interpreter/valid/valid.ml | 106 ++-- 23 files changed, 944 insertions(+), 944 deletions(-) delete mode 100644 interpreter/exec/eval_simd.mli rename interpreter/exec/{eval_simd.ml => eval_vec.ml} (95%) create mode 100644 interpreter/exec/eval_vec.mli diff --git a/interpreter/binary/decode.ml b/interpreter/binary/decode.ml index 0473e29c3c..e920b35309 100644 --- a/interpreter/binary/decode.ml +++ b/interpreter/binary/decode.ml @@ -105,7 +105,7 @@ let vs33 s = I32_convert.wrap_i64 (vsN 33 s) let vs64 s = vsN 64 s let f32 s = F32.of_bits (u32 s) let f64 s = F64.of_bits (u64 s) -let v128 s = V128.of_bits (get_string (Types.simd_size Types.V128Type) s) +let v128 s = V128.of_bits (get_string (Types.vec_size Types.V128Type) s) let len32 s = let pos = pos s in @@ -144,10 +144,10 @@ let num_type s = | -0x04 -> F64Type | _ -> error s (pos s - 1) "malformed number type" -let simd_type s = +let vec_type s = match vs7 s with | -0x05 -> V128Type - | _ -> error s (pos s - 1) "malformed simd type" + | _ -> error s (pos s - 1) "malformed vector type" let ref_type s = match vs7 s with @@ -158,7 +158,7 @@ let ref_type s = let value_type s = match peek s with | Some n when n >= ((-0x04) land 0x7f) -> NumType (num_type s) - | Some n when n >= ((-0x0f) land 0x7f) -> SimdType (simd_type s) + | Some n when n >= ((-0x0f) land 0x7f) -> VecType (vec_type s) | _ -> RefType (ref_type s) let result_type s = vec value_type s diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 567ec483ab..8435e6caf5 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -98,7 +98,7 @@ struct | F32Type -> vs7 (-0x03) | F64Type -> vs7 (-0x04) - let simd_type = function + let vec_type = function | V128Type -> vs7 (-0x05) let ref_type = function @@ -107,7 +107,7 @@ struct let value_type = function | NumType t -> num_type t - | SimdType t -> simd_type t + | VecType t -> vec_type t | RefType t -> ref_type t let func_type = function @@ -138,7 +138,7 @@ struct open V128 let op n = u8 n - let simd_op n = op 0xfd; vu32 n + let vecop n = op 0xfd; vu32 n let end_ () = op 0x0b let memop {align; offset; _} = vu32 (Int32.of_int align); vu32 offset @@ -232,53 +232,53 @@ struct | Store {ty = F32Type | F64Type; pack = Some _; _} -> assert false | Store {ty = (I32Type | I64Type); pack = Some Pack64; _} -> assert false - | SimdLoad ({ty = V128Type; pack = None; _} as mo) -> - simd_op 0x00l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, SX)); _} as mo) -> - simd_op 0x01l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, ZX)); _} as mo) -> - simd_op 0x02l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, SX)); _} as mo) -> - simd_op 0x03l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, ZX)); _} as mo) -> - simd_op 0x04l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, SX)); _} as mo) -> - simd_op 0x05l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, ZX)); _} as mo) -> - simd_op 0x06l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack8, ExtSplat); _} as mo) -> - simd_op 0x07l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack16, ExtSplat); _} as mo) -> - simd_op 0x08l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack32, ExtSplat); _} as mo) -> - simd_op 0x09l; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtSplat); _} as mo) -> - simd_op 0x0al; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack32, ExtZero); _} as mo) -> - simd_op 0x5cl; memop mo - | SimdLoad ({ty = V128Type; pack = Some (Pack64, ExtZero); _} as mo) -> - simd_op 0x5dl; memop mo - | SimdLoad _ -> assert false - - | SimdLoadLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> - simd_op 0x54l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> - simd_op 0x55l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> - simd_op 0x56l; memop mo; u8 i; - | SimdLoadLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> - simd_op 0x57l; memop mo; u8 i; - - | SimdStore ({ty = V128Type; _} as mo) -> simd_op 0x0bl; memop mo - - | SimdStoreLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> - simd_op 0x58l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> - simd_op 0x59l; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> - simd_op 0x5al; memop mo; u8 i; - | SimdStoreLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> - simd_op 0x5bl; memop mo; u8 i; + | VecLoad ({ty = V128Type; pack = None; _} as mo) -> + vecop 0x00l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, SX)); _} as mo) -> + vecop 0x01l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack8x8, ZX)); _} as mo) -> + vecop 0x02l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, SX)); _} as mo) -> + vecop 0x03l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack16x4, ZX)); _} as mo) -> + vecop 0x04l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, SX)); _} as mo) -> + vecop 0x05l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtLane (Pack32x2, ZX)); _} as mo) -> + vecop 0x06l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack8, ExtSplat); _} as mo) -> + vecop 0x07l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack16, ExtSplat); _} as mo) -> + vecop 0x08l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack32, ExtSplat); _} as mo) -> + vecop 0x09l; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtSplat); _} as mo) -> + vecop 0x0al; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack32, ExtZero); _} as mo) -> + vecop 0x5cl; memop mo + | VecLoad ({ty = V128Type; pack = Some (Pack64, ExtZero); _} as mo) -> + vecop 0x5dl; memop mo + | VecLoad _ -> assert false + + | VecLoadLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> + vecop 0x54l; memop mo; u8 i; + | VecLoadLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> + vecop 0x55l; memop mo; u8 i; + | VecLoadLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> + vecop 0x56l; memop mo; u8 i; + | VecLoadLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> + vecop 0x57l; memop mo; u8 i; + + | VecStore ({ty = V128Type; _} as mo) -> vecop 0x0bl; memop mo + + | VecStoreLane ({ty = V128Type; pack = Pack8; _} as mo, i) -> + vecop 0x58l; memop mo; u8 i; + | VecStoreLane ({ty = V128Type; pack = Pack16; _} as mo, i) -> + vecop 0x59l; memop mo; u8 i; + | VecStoreLane ({ty = V128Type; pack = Pack32; _} as mo, i) -> + vecop 0x5al; memop mo; u8 i; + | VecStoreLane ({ty = V128Type; pack = Pack64; _} as mo, i) -> + vecop 0x5bl; memop mo; u8 i; | MemorySize -> op 0x3f; u8 0x00 | MemoryGrow -> op 0x40; u8 0x00 @@ -457,234 +457,234 @@ struct | Convert (F64 F64Op.DemoteF64) -> assert false | Convert (F64 F64Op.ReinterpretInt) -> op 0xbf - | SimdConst {it = V128 c; _} -> simd_op 0x0cl; v128 c - - | SimdTest (V128 (I8x16 V128Op.AllTrue)) -> simd_op 0x63l - | SimdTest (V128 (I16x8 V128Op.AllTrue)) -> simd_op 0x83l - | SimdTest (V128 (I32x4 V128Op.AllTrue)) -> simd_op 0xa3l - | SimdTest (V128 (I64x2 V128Op.AllTrue)) -> simd_op 0xc3l - | SimdTest (V128 _) -> . - - | SimdUnary (V128 (I8x16 V128Op.Abs)) -> simd_op 0x60l - | SimdUnary (V128 (I8x16 V128Op.Neg)) -> simd_op 0x61l - | SimdUnary (V128 (I8x16 V128Op.Popcnt)) -> simd_op 0x62l - | SimdUnary (V128 (I16x8 V128Op.Abs)) -> simd_op 0x80l - | SimdUnary (V128 (I16x8 V128Op.Neg)) -> simd_op 0x81l - | SimdUnary (V128 (I16x8 V128Op.ExtendLowS)) -> simd_op 0x87l - | SimdUnary (V128 (I16x8 V128Op.ExtendHighS)) -> simd_op 0x88l - | SimdUnary (V128 (I16x8 V128Op.ExtendLowU)) -> simd_op 0x89l - | SimdUnary (V128 (I16x8 V128Op.ExtendHighU)) -> simd_op 0x8al - | SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -> simd_op 0x7cl - | SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -> simd_op 0x7dl - | SimdUnary (V128 (I32x4 V128Op.Abs)) -> simd_op 0xa0l - | SimdUnary (V128 (I32x4 V128Op.Neg)) -> simd_op 0xa1l - | SimdUnary (V128 (I32x4 V128Op.ExtendLowS)) -> simd_op 0xa7l - | SimdUnary (V128 (I32x4 V128Op.ExtendHighS)) -> simd_op 0xa8l - | SimdUnary (V128 (I32x4 V128Op.ExtendLowU)) -> simd_op 0xa9l - | SimdUnary (V128 (I32x4 V128Op.ExtendHighU)) -> simd_op 0xaal - | SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -> simd_op 0x7el - | SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -> simd_op 0x7fl - | SimdUnary (V128 (I64x2 V128Op.Abs)) -> simd_op 0xc0l - | SimdUnary (V128 (I64x2 V128Op.Neg)) -> simd_op 0xc1l - | SimdUnary (V128 (I64x2 V128Op.ExtendLowS)) -> simd_op 0xc7l - | SimdUnary (V128 (I64x2 V128Op.ExtendHighS)) -> simd_op 0xc8l - | SimdUnary (V128 (I64x2 V128Op.ExtendLowU)) -> simd_op 0xc9l - | SimdUnary (V128 (I64x2 V128Op.ExtendHighU)) -> simd_op 0xcal - | SimdUnary (V128 (F32x4 V128Op.Ceil)) -> simd_op 0x67l - | SimdUnary (V128 (F32x4 V128Op.Floor)) -> simd_op 0x68l - | SimdUnary (V128 (F32x4 V128Op.Trunc)) -> simd_op 0x69l - | SimdUnary (V128 (F32x4 V128Op.Nearest)) -> simd_op 0x6al - | SimdUnary (V128 (F64x2 V128Op.Ceil)) -> simd_op 0x74l - | SimdUnary (V128 (F64x2 V128Op.Floor)) -> simd_op 0x75l - | SimdUnary (V128 (F64x2 V128Op.Trunc)) -> simd_op 0x7al - | SimdUnary (V128 (F64x2 V128Op.Nearest)) -> simd_op 0x94l - | SimdUnary (V128 (F32x4 V128Op.Abs)) -> simd_op 0xe0l - | SimdUnary (V128 (F32x4 V128Op.Neg)) -> simd_op 0xe1l - | SimdUnary (V128 (F32x4 V128Op.Sqrt)) -> simd_op 0xe3l - | SimdUnary (V128 (F64x2 V128Op.Abs)) -> simd_op 0xecl - | SimdUnary (V128 (F64x2 V128Op.Neg)) -> simd_op 0xedl - | SimdUnary (V128 (F64x2 V128Op.Sqrt)) -> simd_op 0xefl - | SimdUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -> simd_op 0xf8l - | SimdUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -> simd_op 0xf9l - | SimdUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -> simd_op 0xfcl - | SimdUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -> simd_op 0xfdl - | SimdUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -> simd_op 0xfal - | SimdUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -> simd_op 0xfbl - | SimdUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -> simd_op 0x5el - | SimdUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -> simd_op 0x5fl - | SimdUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -> simd_op 0xfel - | SimdUnary (V128 (F64x2 V128Op.ConvertUI32x4)) -> simd_op 0xffl - | SimdUnary (V128 _) -> assert false - - | SimdBinary (V128 (I8x16 (V128Op.Shuffle is))) -> simd_op 0x0dl; List.iter u8 is - | SimdBinary (V128 (I8x16 V128Op.Swizzle)) -> simd_op 0x0el - | SimdBinary (V128 (I8x16 V128Op.Eq)) -> simd_op 0x23l - | SimdBinary (V128 (I8x16 V128Op.Ne)) -> simd_op 0x24l - | SimdBinary (V128 (I8x16 V128Op.LtS)) -> simd_op 0x25l - | SimdBinary (V128 (I8x16 V128Op.LtU)) -> simd_op 0x26l - | SimdBinary (V128 (I8x16 V128Op.GtS)) -> simd_op 0x27l - | SimdBinary (V128 (I8x16 V128Op.GtU)) -> simd_op 0x28l - | SimdBinary (V128 (I8x16 V128Op.LeS)) -> simd_op 0x29l - | SimdBinary (V128 (I8x16 V128Op.LeU)) -> simd_op 0x2al - | SimdBinary (V128 (I8x16 V128Op.GeS)) -> simd_op 0x2bl - | SimdBinary (V128 (I8x16 V128Op.GeU)) -> simd_op 0x2cl - | SimdBinary (V128 (I8x16 V128Op.NarrowS)) -> simd_op 0x65l - | SimdBinary (V128 (I8x16 V128Op.NarrowU)) -> simd_op 0x66l - | SimdBinary (V128 (I8x16 V128Op.Add)) -> simd_op 0x6el - | SimdBinary (V128 (I8x16 V128Op.AddSatS)) -> simd_op 0x6fl - | SimdBinary (V128 (I8x16 V128Op.AddSatU)) -> simd_op 0x70l - | SimdBinary (V128 (I8x16 V128Op.Sub)) -> simd_op 0x71l - | SimdBinary (V128 (I8x16 V128Op.SubSatS)) -> simd_op 0x72l - | SimdBinary (V128 (I8x16 V128Op.SubSatU)) -> simd_op 0x73l - | SimdBinary (V128 (I8x16 V128Op.MinS)) -> simd_op 0x76l - | SimdBinary (V128 (I8x16 V128Op.MinU)) -> simd_op 0x77l - | SimdBinary (V128 (I8x16 V128Op.MaxS)) -> simd_op 0x78l - | SimdBinary (V128 (I8x16 V128Op.MaxU)) -> simd_op 0x79l - | SimdBinary (V128 (I8x16 V128Op.AvgrU)) -> simd_op 0x7bl - | SimdBinary (V128 (I16x8 V128Op.Eq)) -> simd_op 0x2dl - | SimdBinary (V128 (I16x8 V128Op.Ne)) -> simd_op 0x2el - | SimdBinary (V128 (I16x8 V128Op.LtS)) -> simd_op 0x2fl - | SimdBinary (V128 (I16x8 V128Op.LtU)) -> simd_op 0x30l - | SimdBinary (V128 (I16x8 V128Op.GtS)) -> simd_op 0x31l - | SimdBinary (V128 (I16x8 V128Op.GtU)) -> simd_op 0x32l - | SimdBinary (V128 (I16x8 V128Op.LeS)) -> simd_op 0x33l - | SimdBinary (V128 (I16x8 V128Op.LeU)) -> simd_op 0x34l - | SimdBinary (V128 (I16x8 V128Op.GeS)) -> simd_op 0x35l - | SimdBinary (V128 (I16x8 V128Op.GeU)) -> simd_op 0x36l - | SimdBinary (V128 (I16x8 V128Op.NarrowS)) -> simd_op 0x85l - | SimdBinary (V128 (I16x8 V128Op.NarrowU)) -> simd_op 0x86l - | SimdBinary (V128 (I16x8 V128Op.Add)) -> simd_op 0x8el - | SimdBinary (V128 (I16x8 V128Op.AddSatS)) -> simd_op 0x8fl - | SimdBinary (V128 (I16x8 V128Op.AddSatU)) -> simd_op 0x90l - | SimdBinary (V128 (I16x8 V128Op.Sub)) -> simd_op 0x91l - | SimdBinary (V128 (I16x8 V128Op.SubSatS)) -> simd_op 0x92l - | SimdBinary (V128 (I16x8 V128Op.SubSatU)) -> simd_op 0x93l - | SimdBinary (V128 (I16x8 V128Op.Mul)) -> simd_op 0x95l - | SimdBinary (V128 (I16x8 V128Op.MinS)) -> simd_op 0x96l - | SimdBinary (V128 (I16x8 V128Op.MinU)) -> simd_op 0x97l - | SimdBinary (V128 (I16x8 V128Op.MaxS)) -> simd_op 0x98l - | SimdBinary (V128 (I16x8 V128Op.MaxU)) -> simd_op 0x99l - | SimdBinary (V128 (I16x8 V128Op.AvgrU)) -> simd_op 0x9bl - | SimdBinary (V128 (I16x8 V128Op.ExtMulLowS)) -> simd_op 0x9cl - | SimdBinary (V128 (I16x8 V128Op.ExtMulHighS)) -> simd_op 0x9dl - | SimdBinary (V128 (I16x8 V128Op.ExtMulLowU)) -> simd_op 0x9el - | SimdBinary (V128 (I16x8 V128Op.ExtMulHighU)) -> simd_op 0x9fl - | SimdBinary (V128 (I16x8 V128Op.Q15MulRSatS)) -> simd_op 0x82l - | SimdBinary (V128 (I32x4 V128Op.Add)) -> simd_op 0xael - | SimdBinary (V128 (I32x4 V128Op.Sub)) -> simd_op 0xb1l - | SimdBinary (V128 (I32x4 V128Op.MinS)) -> simd_op 0xb6l - | SimdBinary (V128 (I32x4 V128Op.MinU)) -> simd_op 0xb7l - | SimdBinary (V128 (I32x4 V128Op.MaxS)) -> simd_op 0xb8l - | SimdBinary (V128 (I32x4 V128Op.MaxU)) -> simd_op 0xb9l - | SimdBinary (V128 (I32x4 V128Op.DotS)) -> simd_op 0xbal - | SimdBinary (V128 (I32x4 V128Op.Mul)) -> simd_op 0xb5l - | SimdBinary (V128 (I32x4 V128Op.Eq)) -> simd_op 0x37l - | SimdBinary (V128 (I32x4 V128Op.Ne)) -> simd_op 0x38l - | SimdBinary (V128 (I32x4 V128Op.LtS)) -> simd_op 0x39l - | SimdBinary (V128 (I32x4 V128Op.LtU)) -> simd_op 0x3al - | SimdBinary (V128 (I32x4 V128Op.GtS)) -> simd_op 0x3bl - | SimdBinary (V128 (I32x4 V128Op.GtU)) -> simd_op 0x3cl - | SimdBinary (V128 (I32x4 V128Op.LeS)) -> simd_op 0x3dl - | SimdBinary (V128 (I32x4 V128Op.LeU)) -> simd_op 0x3el - | SimdBinary (V128 (I32x4 V128Op.GeS)) -> simd_op 0x3fl - | SimdBinary (V128 (I32x4 V128Op.GeU)) -> simd_op 0x40l - | SimdBinary (V128 (I32x4 V128Op.ExtMulLowS)) -> simd_op 0xbcl - | SimdBinary (V128 (I32x4 V128Op.ExtMulHighS)) -> simd_op 0xbdl - | SimdBinary (V128 (I32x4 V128Op.ExtMulLowU)) -> simd_op 0xbel - | SimdBinary (V128 (I32x4 V128Op.ExtMulHighU)) -> simd_op 0xbfl - | SimdBinary (V128 (I64x2 V128Op.Add)) -> simd_op 0xcel - | SimdBinary (V128 (I64x2 V128Op.Sub)) -> simd_op 0xd1l - | SimdBinary (V128 (I64x2 V128Op.Mul)) -> simd_op 0xd5l - | SimdBinary (V128 (I64x2 V128Op.Eq)) -> simd_op 0xd6l - | SimdBinary (V128 (I64x2 V128Op.Ne)) -> simd_op 0xd7l - | SimdBinary (V128 (I64x2 V128Op.LtS)) -> simd_op 0xd8l - | SimdBinary (V128 (I64x2 V128Op.GtS)) -> simd_op 0xd9l - | SimdBinary (V128 (I64x2 V128Op.LeS)) -> simd_op 0xdal - | SimdBinary (V128 (I64x2 V128Op.GeS)) -> simd_op 0xdbl - | SimdBinary (V128 (I64x2 V128Op.ExtMulLowS)) -> simd_op 0xdcl - | SimdBinary (V128 (I64x2 V128Op.ExtMulHighS)) -> simd_op 0xddl - | SimdBinary (V128 (I64x2 V128Op.ExtMulLowU)) -> simd_op 0xdel - | SimdBinary (V128 (I64x2 V128Op.ExtMulHighU)) -> simd_op 0xdfl - | SimdBinary (V128 (F32x4 V128Op.Eq)) -> simd_op 0x41l - | SimdBinary (V128 (F32x4 V128Op.Ne)) -> simd_op 0x42l - | SimdBinary (V128 (F32x4 V128Op.Lt)) -> simd_op 0x43l - | SimdBinary (V128 (F32x4 V128Op.Gt)) -> simd_op 0x44l - | SimdBinary (V128 (F32x4 V128Op.Le)) -> simd_op 0x45l - | SimdBinary (V128 (F32x4 V128Op.Ge)) -> simd_op 0x46l - | SimdBinary (V128 (F32x4 V128Op.Add)) -> simd_op 0xe4l - | SimdBinary (V128 (F32x4 V128Op.Sub)) -> simd_op 0xe5l - | SimdBinary (V128 (F32x4 V128Op.Mul)) -> simd_op 0xe6l - | SimdBinary (V128 (F32x4 V128Op.Div)) -> simd_op 0xe7l - | SimdBinary (V128 (F32x4 V128Op.Min)) -> simd_op 0xe8l - | SimdBinary (V128 (F32x4 V128Op.Max)) -> simd_op 0xe9l - | SimdBinary (V128 (F32x4 V128Op.Pmin)) -> simd_op 0xeal - | SimdBinary (V128 (F32x4 V128Op.Pmax)) -> simd_op 0xebl - | SimdBinary (V128 (F64x2 V128Op.Eq)) -> simd_op 0x47l - | SimdBinary (V128 (F64x2 V128Op.Ne)) -> simd_op 0x48l - | SimdBinary (V128 (F64x2 V128Op.Lt)) -> simd_op 0x49l - | SimdBinary (V128 (F64x2 V128Op.Gt)) -> simd_op 0x4al - | SimdBinary (V128 (F64x2 V128Op.Le)) -> simd_op 0x4bl - | SimdBinary (V128 (F64x2 V128Op.Ge)) -> simd_op 0x4cl - | SimdBinary (V128 (F64x2 V128Op.Add)) -> simd_op 0xf0l - | SimdBinary (V128 (F64x2 V128Op.Sub)) -> simd_op 0xf1l - | SimdBinary (V128 (F64x2 V128Op.Mul)) -> simd_op 0xf2l - | SimdBinary (V128 (F64x2 V128Op.Div)) -> simd_op 0xf3l - | SimdBinary (V128 (F64x2 V128Op.Min)) -> simd_op 0xf4l - | SimdBinary (V128 (F64x2 V128Op.Max)) -> simd_op 0xf5l - | SimdBinary (V128 (F64x2 V128Op.Pmin)) -> simd_op 0xf6l - | SimdBinary (V128 (F64x2 V128Op.Pmax)) -> simd_op 0xf7l - | SimdBinary (V128 _) -> assert false - - | SimdTestVec (V128 V128Op.AnyTrue) -> simd_op 0x53l - | SimdUnaryVec (V128 V128Op.Not) -> simd_op 0x4dl - | SimdBinaryVec (V128 V128Op.And) -> simd_op 0x4el - | SimdBinaryVec (V128 V128Op.AndNot) -> simd_op 0x4fl - | SimdBinaryVec (V128 V128Op.Or) -> simd_op 0x50l - | SimdBinaryVec (V128 V128Op.Xor) -> simd_op 0x51l - | SimdTernaryVec (V128 V128Op.Bitselect) -> simd_op 0x52l - - | SimdShift (V128 (I8x16 V128Op.Shl)) -> simd_op 0x6bl - | SimdShift (V128 (I8x16 V128Op.ShrS)) -> simd_op 0x6cl - | SimdShift (V128 (I8x16 V128Op.ShrU)) -> simd_op 0x6dl - | SimdShift (V128 (I16x8 V128Op.Shl)) -> simd_op 0x8bl - | SimdShift (V128 (I16x8 V128Op.ShrS)) -> simd_op 0x8cl - | SimdShift (V128 (I16x8 V128Op.ShrU)) -> simd_op 0x8dl - | SimdShift (V128 (I32x4 V128Op.Shl)) -> simd_op 0xabl - | SimdShift (V128 (I32x4 V128Op.ShrS)) -> simd_op 0xacl - | SimdShift (V128 (I32x4 V128Op.ShrU)) -> simd_op 0xadl - | SimdShift (V128 (I64x2 V128Op.Shl)) -> simd_op 0xcbl - | SimdShift (V128 (I64x2 V128Op.ShrS)) -> simd_op 0xccl - | SimdShift (V128 (I64x2 V128Op.ShrU)) -> simd_op 0xcdl - | SimdShift (V128 _) -> . - - | SimdBitmask (V128 (I8x16 V128Op.Bitmask)) -> simd_op 0x64l - | SimdBitmask (V128 (I16x8 V128Op.Bitmask)) -> simd_op 0x84l - | SimdBitmask (V128 (I32x4 V128Op.Bitmask)) -> simd_op 0xa4l - | SimdBitmask (V128 (I64x2 V128Op.Bitmask)) -> simd_op 0xc4l - | SimdBitmask (V128 _) -> . - - | SimdSplat (V128 ((I8x16 V128Op.Splat))) -> simd_op 0x0fl - | SimdSplat (V128 ((I16x8 V128Op.Splat))) -> simd_op 0x10l - | SimdSplat (V128 ((I32x4 V128Op.Splat))) -> simd_op 0x11l - | SimdSplat (V128 ((I64x2 V128Op.Splat))) -> simd_op 0x12l - | SimdSplat (V128 ((F32x4 V128Op.Splat))) -> simd_op 0x13l - | SimdSplat (V128 ((F64x2 V128Op.Splat))) -> simd_op 0x14l - - | SimdExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) -> simd_op 0x15l; u8 i - | SimdExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) -> simd_op 0x16l; u8 i - | SimdExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) -> simd_op 0x18l; u8 i - | SimdExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) -> simd_op 0x19l; u8 i - | SimdExtract (V128 (I32x4 (V128Op.Extract (i, ())))) -> simd_op 0x1bl; u8 i - | SimdExtract (V128 (I64x2 (V128Op.Extract (i, ())))) -> simd_op 0x1dl; u8 i - | SimdExtract (V128 (F32x4 (V128Op.Extract (i, ())))) -> simd_op 0x1fl; u8 i - | SimdExtract (V128 (F64x2 (V128Op.Extract (i, ())))) -> simd_op 0x21l; u8 i - - | SimdReplace (V128 (I8x16 (V128Op.Replace i))) -> simd_op 0x17l; u8 i - | SimdReplace (V128 (I16x8 (V128Op.Replace i))) -> simd_op 0x1al; u8 i - | SimdReplace (V128 (I32x4 (V128Op.Replace i))) -> simd_op 0x1cl; u8 i - | SimdReplace (V128 (I64x2 (V128Op.Replace i))) -> simd_op 0x1el; u8 i - | SimdReplace (V128 (F32x4 (V128Op.Replace i))) -> simd_op 0x20l; u8 i - | SimdReplace (V128 (F64x2 (V128Op.Replace i))) -> simd_op 0x22l; u8 i + | VecConst {it = V128 c; _} -> vecop 0x0cl; v128 c + + | VecTest (V128 (I8x16 V128Op.AllTrue)) -> vecop 0x63l + | VecTest (V128 (I16x8 V128Op.AllTrue)) -> vecop 0x83l + | VecTest (V128 (I32x4 V128Op.AllTrue)) -> vecop 0xa3l + | VecTest (V128 (I64x2 V128Op.AllTrue)) -> vecop 0xc3l + | VecTest (V128 _) -> . + + | VecUnary (V128 (I8x16 V128Op.Abs)) -> vecop 0x60l + | VecUnary (V128 (I8x16 V128Op.Neg)) -> vecop 0x61l + | VecUnary (V128 (I8x16 V128Op.Popcnt)) -> vecop 0x62l + | VecUnary (V128 (I16x8 V128Op.Abs)) -> vecop 0x80l + | VecUnary (V128 (I16x8 V128Op.Neg)) -> vecop 0x81l + | VecUnary (V128 (I16x8 V128Op.ExtendLowS)) -> vecop 0x87l + | VecUnary (V128 (I16x8 V128Op.ExtendHighS)) -> vecop 0x88l + | VecUnary (V128 (I16x8 V128Op.ExtendLowU)) -> vecop 0x89l + | VecUnary (V128 (I16x8 V128Op.ExtendHighU)) -> vecop 0x8al + | VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -> vecop 0x7cl + | VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -> vecop 0x7dl + | VecUnary (V128 (I32x4 V128Op.Abs)) -> vecop 0xa0l + | VecUnary (V128 (I32x4 V128Op.Neg)) -> vecop 0xa1l + | VecUnary (V128 (I32x4 V128Op.ExtendLowS)) -> vecop 0xa7l + | VecUnary (V128 (I32x4 V128Op.ExtendHighS)) -> vecop 0xa8l + | VecUnary (V128 (I32x4 V128Op.ExtendLowU)) -> vecop 0xa9l + | VecUnary (V128 (I32x4 V128Op.ExtendHighU)) -> vecop 0xaal + | VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -> vecop 0x7el + | VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -> vecop 0x7fl + | VecUnary (V128 (I64x2 V128Op.Abs)) -> vecop 0xc0l + | VecUnary (V128 (I64x2 V128Op.Neg)) -> vecop 0xc1l + | VecUnary (V128 (I64x2 V128Op.ExtendLowS)) -> vecop 0xc7l + | VecUnary (V128 (I64x2 V128Op.ExtendHighS)) -> vecop 0xc8l + | VecUnary (V128 (I64x2 V128Op.ExtendLowU)) -> vecop 0xc9l + | VecUnary (V128 (I64x2 V128Op.ExtendHighU)) -> vecop 0xcal + | VecUnary (V128 (F32x4 V128Op.Ceil)) -> vecop 0x67l + | VecUnary (V128 (F32x4 V128Op.Floor)) -> vecop 0x68l + | VecUnary (V128 (F32x4 V128Op.Trunc)) -> vecop 0x69l + | VecUnary (V128 (F32x4 V128Op.Nearest)) -> vecop 0x6al + | VecUnary (V128 (F64x2 V128Op.Ceil)) -> vecop 0x74l + | VecUnary (V128 (F64x2 V128Op.Floor)) -> vecop 0x75l + | VecUnary (V128 (F64x2 V128Op.Trunc)) -> vecop 0x7al + | VecUnary (V128 (F64x2 V128Op.Nearest)) -> vecop 0x94l + | VecUnary (V128 (F32x4 V128Op.Abs)) -> vecop 0xe0l + | VecUnary (V128 (F32x4 V128Op.Neg)) -> vecop 0xe1l + | VecUnary (V128 (F32x4 V128Op.Sqrt)) -> vecop 0xe3l + | VecUnary (V128 (F64x2 V128Op.Abs)) -> vecop 0xecl + | VecUnary (V128 (F64x2 V128Op.Neg)) -> vecop 0xedl + | VecUnary (V128 (F64x2 V128Op.Sqrt)) -> vecop 0xefl + | VecUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -> vecop 0xf8l + | VecUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -> vecop 0xf9l + | VecUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -> vecop 0xfcl + | VecUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -> vecop 0xfdl + | VecUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -> vecop 0xfal + | VecUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -> vecop 0xfbl + | VecUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -> vecop 0x5el + | VecUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -> vecop 0x5fl + | VecUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -> vecop 0xfel + | VecUnary (V128 (F64x2 V128Op.ConvertUI32x4)) -> vecop 0xffl + | VecUnary (V128 _) -> assert false + + | VecBinary (V128 (I8x16 (V128Op.Shuffle is))) -> vecop 0x0dl; List.iter u8 is + | VecBinary (V128 (I8x16 V128Op.Swizzle)) -> vecop 0x0el + | VecBinary (V128 (I8x16 V128Op.Eq)) -> vecop 0x23l + | VecBinary (V128 (I8x16 V128Op.Ne)) -> vecop 0x24l + | VecBinary (V128 (I8x16 V128Op.LtS)) -> vecop 0x25l + | VecBinary (V128 (I8x16 V128Op.LtU)) -> vecop 0x26l + | VecBinary (V128 (I8x16 V128Op.GtS)) -> vecop 0x27l + | VecBinary (V128 (I8x16 V128Op.GtU)) -> vecop 0x28l + | VecBinary (V128 (I8x16 V128Op.LeS)) -> vecop 0x29l + | VecBinary (V128 (I8x16 V128Op.LeU)) -> vecop 0x2al + | VecBinary (V128 (I8x16 V128Op.GeS)) -> vecop 0x2bl + | VecBinary (V128 (I8x16 V128Op.GeU)) -> vecop 0x2cl + | VecBinary (V128 (I8x16 V128Op.NarrowS)) -> vecop 0x65l + | VecBinary (V128 (I8x16 V128Op.NarrowU)) -> vecop 0x66l + | VecBinary (V128 (I8x16 V128Op.Add)) -> vecop 0x6el + | VecBinary (V128 (I8x16 V128Op.AddSatS)) -> vecop 0x6fl + | VecBinary (V128 (I8x16 V128Op.AddSatU)) -> vecop 0x70l + | VecBinary (V128 (I8x16 V128Op.Sub)) -> vecop 0x71l + | VecBinary (V128 (I8x16 V128Op.SubSatS)) -> vecop 0x72l + | VecBinary (V128 (I8x16 V128Op.SubSatU)) -> vecop 0x73l + | VecBinary (V128 (I8x16 V128Op.MinS)) -> vecop 0x76l + | VecBinary (V128 (I8x16 V128Op.MinU)) -> vecop 0x77l + | VecBinary (V128 (I8x16 V128Op.MaxS)) -> vecop 0x78l + | VecBinary (V128 (I8x16 V128Op.MaxU)) -> vecop 0x79l + | VecBinary (V128 (I8x16 V128Op.AvgrU)) -> vecop 0x7bl + | VecBinary (V128 (I16x8 V128Op.Eq)) -> vecop 0x2dl + | VecBinary (V128 (I16x8 V128Op.Ne)) -> vecop 0x2el + | VecBinary (V128 (I16x8 V128Op.LtS)) -> vecop 0x2fl + | VecBinary (V128 (I16x8 V128Op.LtU)) -> vecop 0x30l + | VecBinary (V128 (I16x8 V128Op.GtS)) -> vecop 0x31l + | VecBinary (V128 (I16x8 V128Op.GtU)) -> vecop 0x32l + | VecBinary (V128 (I16x8 V128Op.LeS)) -> vecop 0x33l + | VecBinary (V128 (I16x8 V128Op.LeU)) -> vecop 0x34l + | VecBinary (V128 (I16x8 V128Op.GeS)) -> vecop 0x35l + | VecBinary (V128 (I16x8 V128Op.GeU)) -> vecop 0x36l + | VecBinary (V128 (I16x8 V128Op.NarrowS)) -> vecop 0x85l + | VecBinary (V128 (I16x8 V128Op.NarrowU)) -> vecop 0x86l + | VecBinary (V128 (I16x8 V128Op.Add)) -> vecop 0x8el + | VecBinary (V128 (I16x8 V128Op.AddSatS)) -> vecop 0x8fl + | VecBinary (V128 (I16x8 V128Op.AddSatU)) -> vecop 0x90l + | VecBinary (V128 (I16x8 V128Op.Sub)) -> vecop 0x91l + | VecBinary (V128 (I16x8 V128Op.SubSatS)) -> vecop 0x92l + | VecBinary (V128 (I16x8 V128Op.SubSatU)) -> vecop 0x93l + | VecBinary (V128 (I16x8 V128Op.Mul)) -> vecop 0x95l + | VecBinary (V128 (I16x8 V128Op.MinS)) -> vecop 0x96l + | VecBinary (V128 (I16x8 V128Op.MinU)) -> vecop 0x97l + | VecBinary (V128 (I16x8 V128Op.MaxS)) -> vecop 0x98l + | VecBinary (V128 (I16x8 V128Op.MaxU)) -> vecop 0x99l + | VecBinary (V128 (I16x8 V128Op.AvgrU)) -> vecop 0x9bl + | VecBinary (V128 (I16x8 V128Op.ExtMulLowS)) -> vecop 0x9cl + | VecBinary (V128 (I16x8 V128Op.ExtMulHighS)) -> vecop 0x9dl + | VecBinary (V128 (I16x8 V128Op.ExtMulLowU)) -> vecop 0x9el + | VecBinary (V128 (I16x8 V128Op.ExtMulHighU)) -> vecop 0x9fl + | VecBinary (V128 (I16x8 V128Op.Q15MulRSatS)) -> vecop 0x82l + | VecBinary (V128 (I32x4 V128Op.Add)) -> vecop 0xael + | VecBinary (V128 (I32x4 V128Op.Sub)) -> vecop 0xb1l + | VecBinary (V128 (I32x4 V128Op.MinS)) -> vecop 0xb6l + | VecBinary (V128 (I32x4 V128Op.MinU)) -> vecop 0xb7l + | VecBinary (V128 (I32x4 V128Op.MaxS)) -> vecop 0xb8l + | VecBinary (V128 (I32x4 V128Op.MaxU)) -> vecop 0xb9l + | VecBinary (V128 (I32x4 V128Op.DotS)) -> vecop 0xbal + | VecBinary (V128 (I32x4 V128Op.Mul)) -> vecop 0xb5l + | VecBinary (V128 (I32x4 V128Op.Eq)) -> vecop 0x37l + | VecBinary (V128 (I32x4 V128Op.Ne)) -> vecop 0x38l + | VecBinary (V128 (I32x4 V128Op.LtS)) -> vecop 0x39l + | VecBinary (V128 (I32x4 V128Op.LtU)) -> vecop 0x3al + | VecBinary (V128 (I32x4 V128Op.GtS)) -> vecop 0x3bl + | VecBinary (V128 (I32x4 V128Op.GtU)) -> vecop 0x3cl + | VecBinary (V128 (I32x4 V128Op.LeS)) -> vecop 0x3dl + | VecBinary (V128 (I32x4 V128Op.LeU)) -> vecop 0x3el + | VecBinary (V128 (I32x4 V128Op.GeS)) -> vecop 0x3fl + | VecBinary (V128 (I32x4 V128Op.GeU)) -> vecop 0x40l + | VecBinary (V128 (I32x4 V128Op.ExtMulLowS)) -> vecop 0xbcl + | VecBinary (V128 (I32x4 V128Op.ExtMulHighS)) -> vecop 0xbdl + | VecBinary (V128 (I32x4 V128Op.ExtMulLowU)) -> vecop 0xbel + | VecBinary (V128 (I32x4 V128Op.ExtMulHighU)) -> vecop 0xbfl + | VecBinary (V128 (I64x2 V128Op.Add)) -> vecop 0xcel + | VecBinary (V128 (I64x2 V128Op.Sub)) -> vecop 0xd1l + | VecBinary (V128 (I64x2 V128Op.Mul)) -> vecop 0xd5l + | VecBinary (V128 (I64x2 V128Op.Eq)) -> vecop 0xd6l + | VecBinary (V128 (I64x2 V128Op.Ne)) -> vecop 0xd7l + | VecBinary (V128 (I64x2 V128Op.LtS)) -> vecop 0xd8l + | VecBinary (V128 (I64x2 V128Op.GtS)) -> vecop 0xd9l + | VecBinary (V128 (I64x2 V128Op.LeS)) -> vecop 0xdal + | VecBinary (V128 (I64x2 V128Op.GeS)) -> vecop 0xdbl + | VecBinary (V128 (I64x2 V128Op.ExtMulLowS)) -> vecop 0xdcl + | VecBinary (V128 (I64x2 V128Op.ExtMulHighS)) -> vecop 0xddl + | VecBinary (V128 (I64x2 V128Op.ExtMulLowU)) -> vecop 0xdel + | VecBinary (V128 (I64x2 V128Op.ExtMulHighU)) -> vecop 0xdfl + | VecBinary (V128 (F32x4 V128Op.Eq)) -> vecop 0x41l + | VecBinary (V128 (F32x4 V128Op.Ne)) -> vecop 0x42l + | VecBinary (V128 (F32x4 V128Op.Lt)) -> vecop 0x43l + | VecBinary (V128 (F32x4 V128Op.Gt)) -> vecop 0x44l + | VecBinary (V128 (F32x4 V128Op.Le)) -> vecop 0x45l + | VecBinary (V128 (F32x4 V128Op.Ge)) -> vecop 0x46l + | VecBinary (V128 (F32x4 V128Op.Add)) -> vecop 0xe4l + | VecBinary (V128 (F32x4 V128Op.Sub)) -> vecop 0xe5l + | VecBinary (V128 (F32x4 V128Op.Mul)) -> vecop 0xe6l + | VecBinary (V128 (F32x4 V128Op.Div)) -> vecop 0xe7l + | VecBinary (V128 (F32x4 V128Op.Min)) -> vecop 0xe8l + | VecBinary (V128 (F32x4 V128Op.Max)) -> vecop 0xe9l + | VecBinary (V128 (F32x4 V128Op.Pmin)) -> vecop 0xeal + | VecBinary (V128 (F32x4 V128Op.Pmax)) -> vecop 0xebl + | VecBinary (V128 (F64x2 V128Op.Eq)) -> vecop 0x47l + | VecBinary (V128 (F64x2 V128Op.Ne)) -> vecop 0x48l + | VecBinary (V128 (F64x2 V128Op.Lt)) -> vecop 0x49l + | VecBinary (V128 (F64x2 V128Op.Gt)) -> vecop 0x4al + | VecBinary (V128 (F64x2 V128Op.Le)) -> vecop 0x4bl + | VecBinary (V128 (F64x2 V128Op.Ge)) -> vecop 0x4cl + | VecBinary (V128 (F64x2 V128Op.Add)) -> vecop 0xf0l + | VecBinary (V128 (F64x2 V128Op.Sub)) -> vecop 0xf1l + | VecBinary (V128 (F64x2 V128Op.Mul)) -> vecop 0xf2l + | VecBinary (V128 (F64x2 V128Op.Div)) -> vecop 0xf3l + | VecBinary (V128 (F64x2 V128Op.Min)) -> vecop 0xf4l + | VecBinary (V128 (F64x2 V128Op.Max)) -> vecop 0xf5l + | VecBinary (V128 (F64x2 V128Op.Pmin)) -> vecop 0xf6l + | VecBinary (V128 (F64x2 V128Op.Pmax)) -> vecop 0xf7l + | VecBinary (V128 _) -> assert false + + | VecTestBits (V128 V128Op.AnyTrue) -> vecop 0x53l + | VecUnaryBits (V128 V128Op.Not) -> vecop 0x4dl + | VecBinaryBits (V128 V128Op.And) -> vecop 0x4el + | VecBinaryBits (V128 V128Op.AndNot) -> vecop 0x4fl + | VecBinaryBits (V128 V128Op.Or) -> vecop 0x50l + | VecBinaryBits (V128 V128Op.Xor) -> vecop 0x51l + | VecTernaryBits (V128 V128Op.Bitselect) -> vecop 0x52l + + | VecShift (V128 (I8x16 V128Op.Shl)) -> vecop 0x6bl + | VecShift (V128 (I8x16 V128Op.ShrS)) -> vecop 0x6cl + | VecShift (V128 (I8x16 V128Op.ShrU)) -> vecop 0x6dl + | VecShift (V128 (I16x8 V128Op.Shl)) -> vecop 0x8bl + | VecShift (V128 (I16x8 V128Op.ShrS)) -> vecop 0x8cl + | VecShift (V128 (I16x8 V128Op.ShrU)) -> vecop 0x8dl + | VecShift (V128 (I32x4 V128Op.Shl)) -> vecop 0xabl + | VecShift (V128 (I32x4 V128Op.ShrS)) -> vecop 0xacl + | VecShift (V128 (I32x4 V128Op.ShrU)) -> vecop 0xadl + | VecShift (V128 (I64x2 V128Op.Shl)) -> vecop 0xcbl + | VecShift (V128 (I64x2 V128Op.ShrS)) -> vecop 0xccl + | VecShift (V128 (I64x2 V128Op.ShrU)) -> vecop 0xcdl + | VecShift (V128 _) -> . + + | VecBitmask (V128 (I8x16 V128Op.Bitmask)) -> vecop 0x64l + | VecBitmask (V128 (I16x8 V128Op.Bitmask)) -> vecop 0x84l + | VecBitmask (V128 (I32x4 V128Op.Bitmask)) -> vecop 0xa4l + | VecBitmask (V128 (I64x2 V128Op.Bitmask)) -> vecop 0xc4l + | VecBitmask (V128 _) -> . + + | VecSplat (V128 ((I8x16 V128Op.Splat))) -> vecop 0x0fl + | VecSplat (V128 ((I16x8 V128Op.Splat))) -> vecop 0x10l + | VecSplat (V128 ((I32x4 V128Op.Splat))) -> vecop 0x11l + | VecSplat (V128 ((I64x2 V128Op.Splat))) -> vecop 0x12l + | VecSplat (V128 ((F32x4 V128Op.Splat))) -> vecop 0x13l + | VecSplat (V128 ((F64x2 V128Op.Splat))) -> vecop 0x14l + + | VecExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) -> vecop 0x15l; u8 i + | VecExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) -> vecop 0x16l; u8 i + | VecExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) -> vecop 0x18l; u8 i + | VecExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) -> vecop 0x19l; u8 i + | VecExtract (V128 (I32x4 (V128Op.Extract (i, ())))) -> vecop 0x1bl; u8 i + | VecExtract (V128 (I64x2 (V128Op.Extract (i, ())))) -> vecop 0x1dl; u8 i + | VecExtract (V128 (F32x4 (V128Op.Extract (i, ())))) -> vecop 0x1fl; u8 i + | VecExtract (V128 (F64x2 (V128Op.Extract (i, ())))) -> vecop 0x21l; u8 i + + | VecReplace (V128 (I8x16 (V128Op.Replace i))) -> vecop 0x17l; u8 i + | VecReplace (V128 (I16x8 (V128Op.Replace i))) -> vecop 0x1al; u8 i + | VecReplace (V128 (I32x4 (V128Op.Replace i))) -> vecop 0x1cl; u8 i + | VecReplace (V128 (I64x2 (V128Op.Replace i))) -> vecop 0x1el; u8 i + | VecReplace (V128 (F32x4 (V128Op.Replace i))) -> vecop 0x20l; u8 i + | VecReplace (V128 (F64x2 (V128Op.Replace i))) -> vecop 0x22l; u8 i let const c = list instr c.it; end_ () diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index d83d57fcba..35c4fcab46 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -340,27 +340,27 @@ let rec step (c : config) : config = vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdLoad {offset; ty; pack; _}, Num (I32 i) :: vs' -> + | VecLoad {offset; ty; pack; _}, Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try let v = match pack with - | None -> Memory.load_simd mem addr offset ty + | None -> Memory.load_vec mem addr offset ty | Some (sz, ext) -> - Memory.load_simd_packed sz ext mem addr offset ty - in Simd v :: vs', [] + Memory.load_vec_packed sz ext mem addr offset ty + in Vec v :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdStore {offset; _}, Simd v :: Num (I32 i) :: vs' -> + | VecStore {offset; _}, Vec v :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try - Memory.store_simd mem addr offset v; + Memory.store_vec mem addr offset v; vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]); - | SimdLoadLane ({offset; ty; pack; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> + | VecLoadLane ({offset; ty; pack; _}, j), Vec (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try @@ -378,10 +378,10 @@ let rec step (c : config) : config = | Pack64 -> V128.I64x2.replace_lane j v (I64Num.of_num 0 (Memory.load_num mem addr offset I64Type)) - in Simd (V128 v) :: vs', [] + in Vec (V128 v) :: vs', [] with exn -> vs', [Trapping (memory_error e.at exn) @@ e.at]) - | SimdStoreLane ({offset; ty; pack; _}, j), Simd (V128 v) :: Num (I32 i) :: vs' -> + | VecStoreLane ({offset; ty; pack; _}, j), Vec (V128 v) :: Num (I32 i) :: vs' -> let mem = memory frame.inst (0l @@ e.at) in let addr = I64_convert.extend_i32_u i in (try @@ -521,55 +521,55 @@ let rec step (c : config) : config = (try Num (Eval_num.eval_cvtop cvtop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdConst v, vs -> - Simd v.it :: vs, [] + | VecConst v, vs -> + Vec v.it :: vs, [] - | SimdTest testop, Simd n :: vs' -> - (try value_of_bool (Eval_simd.eval_testop testop n) :: vs', [] + | VecTest testop, Vec n :: vs' -> + (try value_of_bool (Eval_vec.eval_testop testop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdUnary unop, Simd n :: vs' -> - (try Simd (Eval_simd.eval_unop unop n) :: vs', [] + | VecUnary unop, Vec n :: vs' -> + (try Vec (Eval_vec.eval_unop unop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdBinary binop, Simd n2 :: Simd n1 :: vs' -> - (try Simd (Eval_simd.eval_binop binop n1 n2) :: vs', [] + | VecBinary binop, Vec n2 :: Vec n1 :: vs' -> + (try Vec (Eval_vec.eval_binop binop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTestVec vtestop, Simd n :: vs' -> - (try value_of_bool (Eval_simd.eval_vtestop vtestop n) :: vs', [] + | VecTestBits vtestop, Vec n :: vs' -> + (try value_of_bool (Eval_vec.eval_vtestop vtestop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdUnaryVec vunop, Simd n :: vs' -> - (try Simd (Eval_simd.eval_vunop vunop n) :: vs', [] + | VecUnaryBits vunop, Vec n :: vs' -> + (try Vec (Eval_vec.eval_vunop vunop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdBinaryVec vbinop, Simd n2 :: Simd n1 :: vs' -> - (try Simd (Eval_simd.eval_vbinop vbinop n1 n2) :: vs', [] + | VecBinaryBits vbinop, Vec n2 :: Vec n1 :: vs' -> + (try Vec (Eval_vec.eval_vbinop vbinop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdTernaryVec vternop, Simd v3 :: Simd v2 :: Simd v1 :: vs' -> - (try Simd (Eval_simd.eval_vternop vternop v1 v2 v3) :: vs', [] + | VecTernaryBits vternop, Vec v3 :: Vec v2 :: Vec v1 :: vs' -> + (try Vec (Eval_vec.eval_vternop vternop v1 v2 v3) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdShift shiftop, Num s :: Simd v :: vs' -> - (try Simd (Eval_simd.eval_shiftop shiftop v s) :: vs', [] + | VecShift shiftop, Num s :: Vec v :: vs' -> + (try Vec (Eval_vec.eval_shiftop shiftop v s) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdBitmask bitmaskop, Simd v :: vs' -> - (try Num (Eval_simd.eval_bitmaskop bitmaskop v) :: vs', [] + | VecBitmask bitmaskop, Vec v :: vs' -> + (try Num (Eval_vec.eval_bitmaskop bitmaskop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdSplat splatop, Num n :: vs' -> - (try Simd (Eval_simd.eval_splatop splatop n) :: vs', [] + | VecSplat splatop, Num n :: vs' -> + (try Vec (Eval_vec.eval_splatop splatop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdExtract extractop, Simd v :: vs' -> - (try Num (Eval_simd.eval_extractop extractop v) :: vs', [] + | VecExtract extractop, Vec v :: vs' -> + (try Num (Eval_vec.eval_extractop extractop v) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | SimdReplace replaceop, Num r :: Simd v :: vs' -> - (try Simd (Eval_simd.eval_replaceop replaceop v r) :: vs', [] + | VecReplace replaceop, Num r :: Vec v :: vs' -> + (try Vec (Eval_vec.eval_replaceop replaceop v r) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) | _ -> diff --git a/interpreter/exec/eval_simd.mli b/interpreter/exec/eval_simd.mli deleted file mode 100644 index 64d92f3701..0000000000 --- a/interpreter/exec/eval_simd.mli +++ /dev/null @@ -1,14 +0,0 @@ -open Values - -val eval_testop : Ast.simd_testop -> simd -> bool -val eval_unop : Ast.simd_unop -> simd -> simd -val eval_binop : Ast.simd_binop -> simd -> simd -> simd -val eval_vtestop : Ast.simd_vtestop -> simd -> bool -val eval_vunop : Ast.simd_vunop -> simd -> simd -val eval_vbinop : Ast.simd_vbinop -> simd -> simd -> simd -val eval_vternop : Ast.simd_vternop -> simd -> simd -> simd -> simd -val eval_shiftop : Ast.simd_shiftop -> simd -> num -> simd -val eval_bitmaskop : Ast.simd_bitmaskop -> simd -> num -val eval_splatop : Ast.simd_splatop -> num -> simd -val eval_extractop : Ast.simd_extractop -> simd -> num -val eval_replaceop : Ast.simd_replaceop -> simd -> num -> simd diff --git a/interpreter/exec/eval_simd.ml b/interpreter/exec/eval_vec.ml similarity index 95% rename from interpreter/exec/eval_simd.ml rename to interpreter/exec/eval_vec.ml index 58dafe07f0..8495e256bd 100644 --- a/interpreter/exec/eval_simd.ml +++ b/interpreter/exec/eval_vec.ml @@ -4,7 +4,7 @@ open Values module V128Op = struct open Ast.V128Op - open V128Simd + open V128Vec open V128 let testop (op : testop) = @@ -14,7 +14,7 @@ struct | I32x4 AllTrue -> V128.I32x4.all_true | I64x2 AllTrue -> V128.I64x2.all_true | _ -> . - in fun v -> f (of_simd 1 v) + in fun v -> f (of_vec 1 v) let unop (op : unop) = let f = match op with @@ -68,7 +68,7 @@ struct | F64x2 ConvertSI32x4 -> V128.F64x2_convert.convert_i32x4_s | F64x2 ConvertUI32x4 -> V128.F64x2_convert.convert_i32x4_u | _ -> assert false - in fun v -> to_simd (f (of_simd 1 v)) + in fun v -> to_vec (f (of_vec 1 v)) let binop (op : binop) = let f = match op with @@ -190,17 +190,17 @@ struct | F64x2 Pmin -> V128.F64x2.pmin | F64x2 Pmax -> V128.F64x2.pmax | _ -> assert false - in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) + in fun v1 v2 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2)) let vtestop (op : vtestop) = let f = match op with | AnyTrue -> V128.I8x16.any_true - in fun v -> f (of_simd 1 v) + in fun v -> f (of_vec 1 v) let vunop (op : vunop) = let f = match op with | Not -> V128.V1x128.lognot - in fun v -> to_simd (f (of_simd 1 v)) + in fun v -> to_vec (f (of_vec 1 v)) let vbinop (op : vbinop) = let f = match op with @@ -208,12 +208,12 @@ struct | Or -> V128.V1x128.or_ | Xor -> V128.V1x128.xor | AndNot -> V128.V1x128.andnot - in fun v1 v2 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2)) + in fun v1 v2 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2)) let vternop (op : vternop) = let f = match op with | Bitselect -> V128.V1x128.bitselect - in fun v1 v2 v3 -> to_simd (f (of_simd 1 v1) (of_simd 2 v2) (of_simd 3 v3)) + in fun v1 v2 v3 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2) (of_vec 3 v3)) let shiftop (op : shiftop) = let f = match op with @@ -230,7 +230,7 @@ struct | I64x2 ShrS -> V128.I64x2.shr_s | I64x2 ShrU -> V128.I64x2.shr_u | _ -> . - in fun v n -> to_simd (f (of_simd 1 v) (I32Num.of_num 2 n)) + in fun v n -> to_vec (f (of_vec 1 v) (I32Num.of_num 2 n)) let bitmaskop (op : bitmaskop) v = let f = match op with @@ -239,13 +239,13 @@ struct | I32x4 Bitmask -> V128.I32x4.bitmask | I64x2 Bitmask -> V128.I64x2.bitmask | _ -> . - in I32 (f (of_simd 1 v)) + in I32 (f (of_vec 1 v)) end module V128CvtOp = struct open Ast.V128Op - open V128Simd + open V128Vec open V128 let splatop (op : splatop) v = @@ -257,10 +257,10 @@ struct | I64x2 Splat -> V128.I64x2.splat (I64Num.of_num 1 v) | F32x4 Splat -> V128.F32x4.splat (F32Num.of_num 1 v) | F64x2 Splat -> V128.F64x2.splat (F64Num.of_num 1 v) - in to_simd i + in to_vec i let extractop (op : extractop) v = - let v128 = of_simd 1 v in + let v128 = of_vec 1 v in match op with | I8x16 (Extract (i, SX)) -> I32 (V128.I8x16.extract_lane_s i v128) | I8x16 (Extract (i, ZX)) -> I32 (V128.I8x16.extract_lane_u i v128) @@ -272,7 +272,7 @@ struct | F64x2 (Extract (i, ())) -> F64 (V128.F64x2.extract_lane i v128) let replaceop (op : replaceop) v (n : Values.num) = - let v128 = of_simd 1 v in + let v128 = of_vec 1 v in let v128' = match op with | I8x16 (Replace i) -> V128.I8x16.replace_lane i v128 (I32Num.of_num 1 n) | I16x8 (Replace i) -> V128.I16x8.replace_lane i v128 (I32Num.of_num 1 n) @@ -280,7 +280,7 @@ struct | I64x2 (Replace i) -> V128.I64x2.replace_lane i v128 (I64Num.of_num 1 n) | F32x4 (Replace i) -> V128.F32x4.replace_lane i v128 (F32Num.of_num 1 n) | F64x2 (Replace i) -> V128.F64x2.replace_lane i v128 (F64Num.of_num 1 n) - in to_simd v128' + in to_vec v128' end (* Dispatch *) diff --git a/interpreter/exec/eval_vec.mli b/interpreter/exec/eval_vec.mli new file mode 100644 index 0000000000..13679c87ad --- /dev/null +++ b/interpreter/exec/eval_vec.mli @@ -0,0 +1,14 @@ +open Values + +val eval_testop : Ast.vec_testop -> vec -> bool +val eval_unop : Ast.vec_unop -> vec -> vec +val eval_binop : Ast.vec_binop -> vec -> vec -> vec +val eval_vtestop : Ast.vec_vtestop -> vec -> bool +val eval_vunop : Ast.vec_vunop -> vec -> vec +val eval_vbinop : Ast.vec_vbinop -> vec -> vec -> vec +val eval_vternop : Ast.vec_vternop -> vec -> vec -> vec -> vec +val eval_shiftop : Ast.vec_shiftop -> vec -> num -> vec +val eval_bitmaskop : Ast.vec_bitmaskop -> vec -> num +val eval_splatop : Ast.vec_splatop -> num -> vec +val eval_extractop : Ast.vec_extractop -> vec -> num +val eval_replaceop : Ast.vec_replaceop -> vec -> num -> vec diff --git a/interpreter/exec/i16.ml b/interpreter/exec/i16.ml index bf0ab58a9c..54eb9ed846 100644 --- a/interpreter/exec/i16.ml +++ b/interpreter/exec/i16.ml @@ -1,4 +1,4 @@ -(* I16 for SIMD. Uses Int32 as the underlying storage. All int16 values will be +(* Uses Int32 as the underlying storage. All int16 values will be * stored signed-extended. E.g. -1 will be stored with all high bits set. *) include Ixx.Make (struct diff --git a/interpreter/exec/i8.ml b/interpreter/exec/i8.ml index 110b8a7187..bd15d39dab 100644 --- a/interpreter/exec/i8.ml +++ b/interpreter/exec/i8.ml @@ -1,4 +1,4 @@ -(* I8 for SIMD. Uses Int32 as the underlying storage. All int8 values will be +(* Uses Int32 as the underlying storage. All int8 values will be * stored signed-extended. E.g. -1 will be stored with all high bits set. *) include Ixx.Make (struct diff --git a/interpreter/host/spectest.ml b/interpreter/host/spectest.ml index bdeade78f0..c3a7837867 100644 --- a/interpreter/host/spectest.ml +++ b/interpreter/host/spectest.ml @@ -14,7 +14,7 @@ let global (GlobalType (t, _) as gt) = | NumType I64Type -> Num (I64 666L) | NumType F32Type -> Num (F32 (F32.of_float 666.6)) | NumType F64Type -> Num (F64 (F64.of_float 666.6)) - | SimdType V128Type -> Simd (V128 (V128.I32x4.of_lanes [666l; 666l; 666l; 666l])) + | VecType V128Type -> Vec (V128 (V128.I32x4.of_lanes [666l; 666l; 666l; 666l])) | RefType t -> Ref (NullRef t) in Global.alloc gt v diff --git a/interpreter/runtime/memory.ml b/interpreter/runtime/memory.ml index e71d491b74..e2c1fbf70c 100644 --- a/interpreter/runtime/memory.ml +++ b/interpreter/runtime/memory.ml @@ -141,17 +141,17 @@ let store_num_packed sz mem a o n = | _ -> raise Type in storen mem a o w x -let load_simd mem a o t = +let load_vec mem a o t = match t with | V128Type -> - V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.simd_size t))) + V128 (V128.of_bits (load_bytes mem (effective_address a o) (Types.vec_size t))) -let store_simd mem a o n = +let store_vec mem a o n = match n with | V128 x -> store_bytes mem (effective_address a o) (V128.to_bits x) -let load_simd_packed sz ext mem a o t = - assert (packed_size sz < simd_size t); +let load_vec_packed sz ext mem a o t = + assert (packed_size sz < vec_size t); let x = loadn mem a o (packed_size sz) in let b = Bytes.make 16 '\x00' in Bytes.set_int64_le b 0 x; diff --git a/interpreter/runtime/memory.mli b/interpreter/runtime/memory.mli index a7f9ef0997..d3ee9c532d 100644 --- a/interpreter/runtime/memory.mli +++ b/interpreter/runtime/memory.mli @@ -40,11 +40,11 @@ val store_num_packed : pack_size -> memory -> address -> offset -> num -> unit (* raises Type, Bounds *) -val load_simd : - memory -> address -> offset -> simd_type -> simd (* raises Bounds *) -val store_simd : - memory -> address -> offset -> simd -> unit +val load_vec : + memory -> address -> offset -> vec_type -> vec (* raises Bounds *) +val store_vec : + memory -> address -> offset -> vec -> unit (* raises Type, Bounds *) -val load_simd_packed : - pack_size -> simd_extension -> memory -> address -> offset -> simd_type -> simd +val load_vec_packed : + pack_size -> vec_extension -> memory -> address -> offset -> vec_type -> vec (* raises Type, Bounds *) diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index c646b303f4..cc14c0b75c 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -261,7 +261,7 @@ let abs_mask_of = function let value v = match v.it with | Values.Num n -> [Const (n @@ v.at) @@ v.at] - | Values.Simd s -> [SimdConst (s @@ v.at) @@ v.at] + | Values.Vec s -> [VecConst (s @@ v.at) @@ v.at] | Values.Ref (Values.NullRef t) -> [RefNull t @@ v.at] | Values.Ref (ExternRef n) -> [Const (Values.I32 n @@ v.at) @@ v.at; Call (externref_idx @@ v.at) @@ v.at] @@ -307,9 +307,9 @@ let assert_return ress ts at = Compare (eq_of t') @@ at; Test (Values.I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] - | SimdResult (SimdPat (Values.V128 (shape, pats))) -> + | VecResult (VecPat (Values.V128 (shape, pats))) -> let open Values in - (* SimdResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals + (* VecResult is a list of NumPat or LitPat. For float shapes, we can have a mix of literals * and NaNs. For NaNs, we need to mask it and compare with a canonical NaN. To simplify * comparison, we build masks even for literals (will just be all set), collect them into * a v128, then compare the entire 128 bits. @@ -345,12 +345,12 @@ let assert_return ress ts at = V128.I64x2.of_lanes (List.map (I64Num.of_num 0) masks), V128.I64x2.of_lanes (List.map (I64Num.of_num 0) canons) in - [ SimdConst (V128 mask @@ at) @@ at; - SimdBinaryVec (V128 V128Op.And) @@ at; - SimdConst (V128 expected @@ at) @@ at; - SimdBinary (V128 (V128.I8x16 V128Op.Eq)) @@ at; + [ VecConst (V128 mask @@ at) @@ at; + VecBinaryBits (V128 V128Op.And) @@ at; + VecConst (V128 expected @@ at) @@ at; + VecBinary (V128 (V128.I8x16 V128Op.Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) - SimdTest (V128 (V128.I8x16 V128Op.AllTrue)) @@ at; + VecTest (V128 (V128.I8x16 V128Op.AllTrue)) @@ at; Test (I32 I32Op.Eqz) @@ at; BrIf (0l @@ at) @@ at ] | RefResult (RefPat {it = Values.NullRef t; _}) -> @@ -424,7 +424,7 @@ let is_js_num_type = function let is_js_value_type = function | NumType t -> is_js_num_type t - | SimdType t -> false + | VecType t -> false | RefType t -> true let is_js_global_type = function @@ -476,7 +476,7 @@ let of_num n = | F32 z -> of_float (F32.to_float z) | F64 z -> of_float (F64.to_float z) -let of_simd v = +let of_vec v = let open Values in match v with | V128 v -> "v128(\"" ^ V128.to_string v ^ "\")" @@ -492,7 +492,7 @@ let of_value v = let open Values in match v.it with | Num n -> of_num n - | Simd v -> of_simd v + | Vec v -> of_vec v | Ref r -> of_ref r let of_nan = function @@ -506,8 +506,8 @@ let of_num_pat = function | Values.I32 _ | Values.I64 _ -> . | Values.F32 n | Values.F64 n -> of_nan n -let of_simd_pat = function - | SimdPat (Values.V128 (shape, pats)) -> +let of_vec_pat = function + | VecPat (Values.V128 (shape, pats)) -> Printf.sprintf "v128(\"%s\")" (String.concat " " (List.map of_num_pat pats)) let of_ref_pat = function @@ -517,7 +517,7 @@ let of_ref_pat = function let of_result res = match res.it with | NumResult np -> of_num_pat np - | SimdResult vp -> of_simd_pat vp + | VecResult vp -> of_vec_pat vp | RefResult rp -> of_ref_pat rp let rec of_definition def = diff --git a/interpreter/script/run.ml b/interpreter/script/run.ml index cf0c4d53d4..e0019d84a0 100644 --- a/interpreter/script/run.ml +++ b/interpreter/script/run.ml @@ -254,7 +254,7 @@ let type_of_result r = match r with | NumResult (NumPat n) -> Types.NumType (Values.type_of_num n.it) | NumResult (NanPat n) -> Types.NumType (Values.type_of_num n.it) - | SimdResult (SimdPat _) -> Types.SimdType Types.V128Type + | VecResult (VecPat _) -> Types.VecType Types.V128Type | RefResult (RefPat r) -> Types.RefType (Values.type_of_ref r.it) | RefResult (RefTypePat t) -> Types.RefType t @@ -266,9 +266,9 @@ let string_of_num_pat (p : num_pat) = | Values.I32 _ | Values.I64 _ -> assert false | Values.F32 n | Values.F64 n -> string_of_nan n -let string_of_simd_pat (p : simd_pat) = +let string_of_vec_pat (p : vec_pat) = match p with - | SimdPat (Values.V128 (shape, ns)) -> + | VecPat (Values.V128 (shape, ns)) -> String.concat " " (List.map string_of_num_pat ns) let string_of_ref_pat (p : ref_pat) = @@ -279,7 +279,7 @@ let string_of_ref_pat (p : ref_pat) = let string_of_result r = match r with | NumResult np -> string_of_num_pat np - | SimdResult vp -> string_of_simd_pat vp + | VecResult vp -> string_of_vec_pat vp | RefResult rp -> string_of_ref_pat rp let string_of_results = function @@ -387,10 +387,10 @@ let assert_num_pat n np = | NumPat n' -> n = n'.it | NanPat nanop -> assert_nan_pat n nanop -let assert_simd_pat v p = +let assert_vec_pat v p = let open Values in match v, p with - | V128 v, SimdPat (V128 (shape, ps)) -> + | V128 v, VecPat (V128 (shape, ps)) -> let extract = match shape with | V128.I8x16 () -> fun v i -> I32 (V128.I8x16.extract_lane_s i v) | V128.I16x8 () -> fun v i -> I32 (V128.I16x8.extract_lane_s i v) @@ -413,7 +413,7 @@ let assert_pat v r = let open Values in match v, r with | Num n, NumResult np -> assert_num_pat n np - | Simd v, SimdResult vp -> assert_simd_pat v vp + | Vec v, VecResult vp -> assert_vec_pat v vp | Ref r, RefResult rp -> assert_ref_pat r rp | _, _ -> false diff --git a/interpreter/script/script.ml b/interpreter/script/script.ml index 9f760fea5f..4c4f550f2c 100644 --- a/interpreter/script/script.ml +++ b/interpreter/script/script.ml @@ -24,8 +24,8 @@ type num_pat = | NumPat of num | NanPat of nanop -type simd_pat = - | SimdPat of (V128.shape * num_pat list) Values.simdop +type vec_pat = + | VecPat of (V128.shape * num_pat list) Values.vecop type ref_pat = | RefPat of ref_ @@ -34,7 +34,7 @@ type ref_pat = type result = result' Source.phrase and result' = | NumResult of num_pat - | SimdResult of simd_pat + | VecResult of vec_pat | RefResult of ref_pat type assertion = assertion' Source.phrase diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index 518f6efe33..a8a3283d52 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -101,34 +101,34 @@ type binop = (I32Op.binop, I64Op.binop, F32Op.binop, F64Op.binop) Values.op type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Values.op -type simd_testop = (V128Op.testop) Values.simdop -type simd_unop = (V128Op.unop) Values.simdop -type simd_binop = (V128Op.binop) Values.simdop -type simd_vtestop = (V128Op.vtestop) Values.simdop -type simd_vunop = (V128Op.vunop) Values.simdop -type simd_vbinop = (V128Op.vbinop) Values.simdop -type simd_vternop = (V128Op.vternop) Values.simdop -type simd_shiftop = (V128Op.shiftop) Values.simdop -type simd_bitmaskop = (V128Op.bitmaskop) Values.simdop - -type simd_splatop = (V128Op.splatop) Values.simdop -type simd_extractop = (V128Op.extractop) Values.simdop -type simd_replaceop = (V128Op.replaceop) Values.simdop +type vec_testop = (V128Op.testop) Values.vecop +type vec_unop = (V128Op.unop) Values.vecop +type vec_binop = (V128Op.binop) Values.vecop +type vec_vtestop = (V128Op.vtestop) Values.vecop +type vec_vunop = (V128Op.vunop) Values.vecop +type vec_vbinop = (V128Op.vbinop) Values.vecop +type vec_vternop = (V128Op.vternop) Values.vecop +type vec_shiftop = (V128Op.shiftop) Values.vecop +type vec_bitmaskop = (V128Op.bitmaskop) Values.vecop + +type vec_splatop = (V128Op.splatop) Values.vecop +type vec_extractop = (V128Op.extractop) Values.vecop +type vec_replaceop = (V128Op.replaceop) Values.vecop type ('t, 'p) memop = {ty : 't; align : int; offset : int32; pack : 'p} type loadop = (num_type, (pack_size * extension) option) memop type storeop = (num_type, pack_size option) memop -type simd_loadop = (simd_type, (pack_size * simd_extension) option) memop -type simd_storeop = (simd_type, unit) memop -type simd_laneop = (simd_type, pack_size) memop * int +type vec_loadop = (vec_type, (pack_size * vec_extension) option) memop +type vec_storeop = (vec_type, unit) memop +type vec_laneop = (vec_type, pack_size) memop * int (* Expressions *) type var = int32 Source.phrase type num = Values.num Source.phrase -type simd = Values.simd Source.phrase +type vec = Values.vec Source.phrase type name = int list type block_type = VarBlockType of var | ValBlockType of value_type option @@ -163,10 +163,10 @@ and instr' = | ElemDrop of var (* drop passive element segment *) | Load of loadop (* read memory at address *) | Store of storeop (* write memory at address *) - | SimdLoad of simd_loadop (* read memory at address *) - | SimdStore of simd_storeop (* write memory at address *) - | SimdLoadLane of simd_laneop (* read single lane at address *) - | SimdStoreLane of simd_laneop (* write single lane to address *) + | VecLoad of vec_loadop (* read memory at address *) + | VecStore of vec_storeop (* write memory at address *) + | VecLoadLane of vec_laneop (* read single lane at address *) + | VecStoreLane of vec_laneop (* write single lane to address *) | MemorySize (* size of memory *) | MemoryGrow (* grow memory *) | MemoryFill (* fill memory range with value *) @@ -182,19 +182,19 @@ and instr' = | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) | Convert of cvtop (* conversion *) - | SimdConst of simd (* constant *) - | SimdTest of simd_testop (* simd test *) - | SimdUnary of simd_unop (* unary simd operator *) - | SimdBinary of simd_binop (* binary simd operator *) - | SimdTestVec of simd_vtestop (* simd test vector *) - | SimdUnaryVec of simd_vunop (* unary simd vector operator *) - | SimdBinaryVec of simd_vbinop (* binary simd vector operator *) - | SimdTernaryVec of simd_vternop (* ternary simd vector operator *) - | SimdShift of simd_shiftop (* shifts for simd value *) - | SimdBitmask of simd_bitmaskop (* bitmask for simd value *) - | SimdSplat of simd_splatop (* number to simd conversion *) - | SimdExtract of simd_extractop (* extract lane from simd value*) - | SimdReplace of simd_replaceop (* replace lane in simd value *) + | VecConst of vec (* vector constant *) + | VecTest of vec_testop (* vector test *) + | VecUnary of vec_unop (* unary vector operator *) + | VecBinary of vec_binop (* binary vector operator *) + | VecTestBits of vec_vtestop (* vector bit test *) + | VecUnaryBits of vec_vunop (* unary vector bit operator *) + | VecBinaryBits of vec_vbinop (* binary vector bit operator *) + | VecTernaryBits of vec_vternop (* ternary vector bit operator *) + | VecShift of vec_shiftop (* shifts for vector value *) + | VecBitmask of vec_bitmaskop (* bitmask for vector value *) + | VecSplat of vec_splatop (* number to vector conversion *) + | VecExtract of vec_extractop (* extract lane from vector value*) + | VecReplace of vec_replaceop (* replace lane in vector value *) (* Globals & Functions *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index 4d51b983e6..e8aebafde2 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -84,13 +84,13 @@ let rec instr (e : instr) = | TableInit (x, y) -> tables (var x) ++ elems (var y) | ElemDrop x -> elems (var x) | Load _ | Store _ - | SimdLoad _ | SimdStore _ | SimdLoadLane _ | SimdStoreLane _ + | VecLoad _ | VecStore _ | VecLoadLane _ | VecStoreLane _ | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> memories zero - | SimdConst _ - | SimdTest _ | SimdUnary _ | SimdBinary _ | SimdShift _ | SimdBitmask _ - | SimdTestVec _ | SimdUnaryVec _ | SimdBinaryVec _ | SimdTernaryVec _ - | SimdSplat _ | SimdExtract _ | SimdReplace _ -> + | VecConst _ + | VecTest _ | VecUnary _ | VecBinary _ | VecShift _ | VecBitmask _ + | VecTestBits _ | VecUnaryBits _ | VecBinaryBits _ | VecTernaryBits _ + | VecSplat _ | VecExtract _ | VecReplace _ -> memories zero | MemoryInit x -> memories zero ++ datas (var x) | DataDrop x -> datas (var x) diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index b9334d4501..f2cb7b2f08 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -9,7 +9,7 @@ let i32_const n = Const (I32 n.it @@ n.at) let i64_const n = Const (I64 n.it @@ n.at) let f32_const n = Const (F32 n.it @@ n.at) let f64_const n = Const (F64 n.it @@ n.at) -let v128_const n = SimdConst (V128 n.it @@ n.at) +let v128_const n = VecConst (V128 n.it @@ n.at) let ref_null t = RefNull t let ref_func x = RefFunc x @@ -234,269 +234,269 @@ let i64_reinterpret_f64 = Convert (I64 I64Op.ReinterpretFloat) let f32_reinterpret_i32 = Convert (F32 F32Op.ReinterpretInt) let f64_reinterpret_i64 = Convert (F64 F64Op.ReinterpretInt) -let v128_load align offset = SimdLoad {ty = V128Type; align; offset; pack = None} +let v128_load align offset = VecLoad {ty = V128Type; align; offset; pack = None} let v128_load8x8_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, SX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, SX))} let v128_load8x8_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, ZX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack8x8, ZX))} let v128_load16x4_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, SX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, SX))} let v128_load16x4_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, ZX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack16x4, ZX))} let v128_load32x2_s align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, SX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, SX))} let v128_load32x2_u align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, ZX))} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtLane (Pack32x2, ZX))} let v128_load8_splat align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack8, ExtSplat)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack8, ExtSplat)} let v128_load16_splat align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack16, ExtSplat)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack16, ExtSplat)} let v128_load32_splat align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtSplat)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtSplat)} let v128_load64_splat align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtSplat)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtSplat)} let v128_load32_zero align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtZero)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack32, ExtZero)} let v128_load64_zero align offset = - SimdLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtZero)} + VecLoad {ty = V128Type; align; offset; pack = Some (Pack64, ExtZero)} -let v128_store align offset = SimdStore {ty = V128Type; align; offset; pack = ()} +let v128_store align offset = VecStore {ty = V128Type; align; offset; pack = ()} let v128_load8_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; pack = Pack8}, i) + VecLoadLane ({ty = V128Type; align; offset; pack = Pack8}, i) let v128_load16_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; pack = Pack16}, i) + VecLoadLane ({ty = V128Type; align; offset; pack = Pack16}, i) let v128_load32_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; pack = Pack32}, i) + VecLoadLane ({ty = V128Type; align; offset; pack = Pack32}, i) let v128_load64_lane align offset i = - SimdLoadLane ({ty = V128Type; align; offset; pack = Pack64}, i) + VecLoadLane ({ty = V128Type; align; offset; pack = Pack64}, i) let v128_store8_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; pack = Pack8}, i) + VecStoreLane ({ty = V128Type; align; offset; pack = Pack8}, i) let v128_store16_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; pack = Pack16}, i) + VecStoreLane ({ty = V128Type; align; offset; pack = Pack16}, i) let v128_store32_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; pack = Pack32}, i) + VecStoreLane ({ty = V128Type; align; offset; pack = Pack32}, i) let v128_store64_lane align offset i = - SimdStoreLane ({ty = V128Type; align; offset; pack = Pack64}, i) + VecStoreLane ({ty = V128Type; align; offset; pack = Pack64}, i) -let v128_not = SimdUnaryVec (V128 V128Op.Not) -let v128_and = SimdBinaryVec (V128 V128Op.And) -let v128_andnot = SimdBinaryVec (V128 V128Op.AndNot) -let v128_or = SimdBinaryVec (V128 V128Op.Or) -let v128_xor = SimdBinaryVec (V128 V128Op.Xor) -let v128_bitselect = SimdTernaryVec (V128 V128Op.Bitselect) -let v128_any_true = SimdTestVec (V128 V128Op.AnyTrue) +let v128_not = VecUnaryBits (V128 V128Op.Not) +let v128_and = VecBinaryBits (V128 V128Op.And) +let v128_andnot = VecBinaryBits (V128 V128Op.AndNot) +let v128_or = VecBinaryBits (V128 V128Op.Or) +let v128_xor = VecBinaryBits (V128 V128Op.Xor) +let v128_bitselect = VecTernaryBits (V128 V128Op.Bitselect) +let v128_any_true = VecTestBits (V128 V128Op.AnyTrue) -let i8x16_swizzle = SimdBinary (V128 (I8x16 V128Op.Swizzle)) -let i8x16_shuffle is = SimdBinary (V128 (I8x16 (V128Op.Shuffle is))) +let i8x16_swizzle = VecBinary (V128 (I8x16 V128Op.Swizzle)) +let i8x16_shuffle is = VecBinary (V128 (I8x16 (V128Op.Shuffle is))) -let i8x16_splat = SimdSplat (V128 (I8x16 V128Op.Splat)) -let i8x16_extract_lane_s i = SimdExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) -let i8x16_extract_lane_u i = SimdExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) -let i8x16_replace_lane i = SimdReplace (V128 (I8x16 (V128Op.Replace i))) -let i8x16_eq = SimdBinary (V128 (I8x16 V128Op.Eq)) -let i8x16_ne = SimdBinary (V128 (I8x16 V128Op.Ne)) -let i8x16_lt_s = SimdBinary (V128 (I8x16 V128Op.LtS)) -let i8x16_lt_u = SimdBinary (V128 (I8x16 V128Op.LtU)) -let i8x16_le_s = SimdBinary (V128 (I8x16 V128Op.LeS)) -let i8x16_le_u = SimdBinary (V128 (I8x16 V128Op.LeU)) -let i8x16_gt_s = SimdBinary (V128 (I8x16 V128Op.GtS)) -let i8x16_gt_u = SimdBinary (V128 (I8x16 V128Op.GtU)) -let i8x16_ge_s = SimdBinary (V128 (I8x16 V128Op.GeS)) -let i8x16_ge_u = SimdBinary (V128 (I8x16 V128Op.GeU)) -let i8x16_neg = SimdUnary (V128 (I8x16 V128Op.Neg)) -let i8x16_bitmask = SimdBitmask (V128 (I8x16 V128Op.Bitmask)) -let i8x16_all_true = SimdTest (V128 (I8x16 V128Op.AllTrue)) -let i8x16_narrow_i16x8_s = SimdBinary (V128 (I8x16 V128Op.NarrowS)) -let i8x16_narrow_i16x8_u = SimdBinary (V128 (I8x16 V128Op.NarrowU)) -let i16x8_extend_low_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtendLowS)) -let i16x8_extend_high_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtendHighS)) -let i16x8_extend_low_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtendLowU)) -let i16x8_extend_high_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtendHighU)) -let i8x16_shl = SimdShift (V128 (I8x16 V128Op.Shl)) -let i8x16_shr_s = SimdShift (V128 (I8x16 V128Op.ShrS)) -let i8x16_shr_u = SimdShift (V128 (I8x16 V128Op.ShrU)) -let i8x16_add = SimdBinary (V128 (I8x16 V128Op.Add)) -let i8x16_add_sat_s = SimdBinary (V128 (I8x16 V128Op.AddSatS)) -let i8x16_add_sat_u = SimdBinary (V128 (I8x16 V128Op.AddSatU)) -let i8x16_sub = SimdBinary (V128 (I8x16 V128Op.Sub)) -let i8x16_sub_sat_s = SimdBinary (V128 (I8x16 V128Op.SubSatS)) -let i8x16_sub_sat_u = SimdBinary (V128 (I8x16 V128Op.SubSatU)) -let i8x16_abs = SimdUnary (V128 (I8x16 V128Op.Abs)) -let i8x16_popcnt = SimdUnary (V128 (I8x16 V128Op.Popcnt)) -let i8x16_min_s = SimdBinary (V128 (I8x16 V128Op.MinS)) -let i8x16_min_u = SimdBinary (V128 (I8x16 V128Op.MinU)) -let i8x16_max_s = SimdBinary (V128 (I8x16 V128Op.MaxS)) -let i8x16_max_u = SimdBinary (V128 (I8x16 V128Op.MaxU)) -let i8x16_avgr_u = SimdBinary (V128 (I8x16 V128Op.AvgrU)) +let i8x16_splat = VecSplat (V128 (I8x16 V128Op.Splat)) +let i8x16_extract_lane_s i = VecExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) +let i8x16_extract_lane_u i = VecExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) +let i8x16_replace_lane i = VecReplace (V128 (I8x16 (V128Op.Replace i))) +let i8x16_eq = VecBinary (V128 (I8x16 V128Op.Eq)) +let i8x16_ne = VecBinary (V128 (I8x16 V128Op.Ne)) +let i8x16_lt_s = VecBinary (V128 (I8x16 V128Op.LtS)) +let i8x16_lt_u = VecBinary (V128 (I8x16 V128Op.LtU)) +let i8x16_le_s = VecBinary (V128 (I8x16 V128Op.LeS)) +let i8x16_le_u = VecBinary (V128 (I8x16 V128Op.LeU)) +let i8x16_gt_s = VecBinary (V128 (I8x16 V128Op.GtS)) +let i8x16_gt_u = VecBinary (V128 (I8x16 V128Op.GtU)) +let i8x16_ge_s = VecBinary (V128 (I8x16 V128Op.GeS)) +let i8x16_ge_u = VecBinary (V128 (I8x16 V128Op.GeU)) +let i8x16_neg = VecUnary (V128 (I8x16 V128Op.Neg)) +let i8x16_bitmask = VecBitmask (V128 (I8x16 V128Op.Bitmask)) +let i8x16_all_true = VecTest (V128 (I8x16 V128Op.AllTrue)) +let i8x16_narrow_i16x8_s = VecBinary (V128 (I8x16 V128Op.NarrowS)) +let i8x16_narrow_i16x8_u = VecBinary (V128 (I8x16 V128Op.NarrowU)) +let i16x8_extend_low_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtendLowS)) +let i16x8_extend_high_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtendHighS)) +let i16x8_extend_low_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtendLowU)) +let i16x8_extend_high_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtendHighU)) +let i8x16_shl = VecShift (V128 (I8x16 V128Op.Shl)) +let i8x16_shr_s = VecShift (V128 (I8x16 V128Op.ShrS)) +let i8x16_shr_u = VecShift (V128 (I8x16 V128Op.ShrU)) +let i8x16_add = VecBinary (V128 (I8x16 V128Op.Add)) +let i8x16_add_sat_s = VecBinary (V128 (I8x16 V128Op.AddSatS)) +let i8x16_add_sat_u = VecBinary (V128 (I8x16 V128Op.AddSatU)) +let i8x16_sub = VecBinary (V128 (I8x16 V128Op.Sub)) +let i8x16_sub_sat_s = VecBinary (V128 (I8x16 V128Op.SubSatS)) +let i8x16_sub_sat_u = VecBinary (V128 (I8x16 V128Op.SubSatU)) +let i8x16_abs = VecUnary (V128 (I8x16 V128Op.Abs)) +let i8x16_popcnt = VecUnary (V128 (I8x16 V128Op.Popcnt)) +let i8x16_min_s = VecBinary (V128 (I8x16 V128Op.MinS)) +let i8x16_min_u = VecBinary (V128 (I8x16 V128Op.MinU)) +let i8x16_max_s = VecBinary (V128 (I8x16 V128Op.MaxS)) +let i8x16_max_u = VecBinary (V128 (I8x16 V128Op.MaxU)) +let i8x16_avgr_u = VecBinary (V128 (I8x16 V128Op.AvgrU)) -let i16x8_splat = SimdSplat (V128 (I16x8 V128Op.Splat)) -let i16x8_extract_lane_s i = SimdExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) -let i16x8_extract_lane_u i = SimdExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) -let i16x8_replace_lane i = SimdReplace (V128 (I16x8 (V128Op.Replace i))) -let i16x8_eq = SimdBinary (V128 (I16x8 V128Op.Eq)) -let i16x8_ne = SimdBinary (V128 (I16x8 V128Op.Ne)) -let i16x8_lt_s = SimdBinary (V128 (I16x8 V128Op.LtS)) -let i16x8_lt_u = SimdBinary (V128 (I16x8 V128Op.LtU)) -let i16x8_le_s = SimdBinary (V128 (I16x8 V128Op.LeS)) -let i16x8_le_u = SimdBinary (V128 (I16x8 V128Op.LeU)) -let i16x8_gt_s = SimdBinary (V128 (I16x8 V128Op.GtS)) -let i16x8_gt_u = SimdBinary (V128 (I16x8 V128Op.GtU)) -let i16x8_ge_s = SimdBinary (V128 (I16x8 V128Op.GeS)) -let i16x8_ge_u = SimdBinary (V128 (I16x8 V128Op.GeU)) -let i16x8_neg = SimdUnary (V128 (I16x8 V128Op.Neg)) -let i16x8_bitmask = SimdBitmask (V128 (I16x8 V128Op.Bitmask)) -let i16x8_all_true = SimdTest (V128 (I16x8 V128Op.AllTrue)) -let i16x8_narrow_i32x4_s = SimdBinary (V128 (I16x8 V128Op.NarrowS)) -let i16x8_narrow_i32x4_u = SimdBinary (V128 (I16x8 V128Op.NarrowU)) -let i16x8_shl = SimdShift (V128 (I16x8 V128Op.Shl)) -let i16x8_shr_s = SimdShift (V128 (I16x8 V128Op.ShrS)) -let i16x8_shr_u = SimdShift (V128 (I16x8 V128Op.ShrU)) -let i16x8_add = SimdBinary (V128 (I16x8 V128Op.Add)) -let i16x8_add_sat_s = SimdBinary (V128 (I16x8 V128Op.AddSatS)) -let i16x8_add_sat_u = SimdBinary (V128 (I16x8 V128Op.AddSatU)) -let i16x8_sub = SimdBinary (V128 (I16x8 V128Op.Sub)) -let i16x8_sub_sat_s = SimdBinary (V128 (I16x8 V128Op.SubSatS)) -let i16x8_sub_sat_u = SimdBinary (V128 (I16x8 V128Op.SubSatU)) -let i16x8_mul = SimdBinary (V128 (I16x8 V128Op.Mul)) -let i16x8_abs = SimdUnary (V128 (I16x8 V128Op.Abs)) -let i16x8_min_s = SimdBinary (V128 (I16x8 V128Op.MinS)) -let i16x8_min_u = SimdBinary (V128 (I16x8 V128Op.MinU)) -let i16x8_max_s = SimdBinary (V128 (I16x8 V128Op.MaxS)) -let i16x8_max_u = SimdBinary (V128 (I16x8 V128Op.MaxU)) -let i16x8_avgr_u = SimdBinary (V128 (I16x8 V128Op.AvgrU)) -let i16x8_extmul_low_i8x16_s = SimdBinary (V128 (I16x8 V128Op.ExtMulLowS)) -let i16x8_extmul_high_i8x16_s = SimdBinary (V128 (I16x8 V128Op.ExtMulHighS)) -let i16x8_extmul_low_i8x16_u = SimdBinary (V128 (I16x8 V128Op.ExtMulLowU)) -let i16x8_extmul_high_i8x16_u = SimdBinary (V128 (I16x8 V128Op.ExtMulHighU)) -let i16x8_q15mulr_sat_s = SimdBinary (V128 (I16x8 V128Op.Q15MulRSatS)) -let i16x8_extadd_pairwise_i8x16_s = SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -let i16x8_extadd_pairwise_i8x16_u = SimdUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) +let i16x8_splat = VecSplat (V128 (I16x8 V128Op.Splat)) +let i16x8_extract_lane_s i = VecExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) +let i16x8_extract_lane_u i = VecExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) +let i16x8_replace_lane i = VecReplace (V128 (I16x8 (V128Op.Replace i))) +let i16x8_eq = VecBinary (V128 (I16x8 V128Op.Eq)) +let i16x8_ne = VecBinary (V128 (I16x8 V128Op.Ne)) +let i16x8_lt_s = VecBinary (V128 (I16x8 V128Op.LtS)) +let i16x8_lt_u = VecBinary (V128 (I16x8 V128Op.LtU)) +let i16x8_le_s = VecBinary (V128 (I16x8 V128Op.LeS)) +let i16x8_le_u = VecBinary (V128 (I16x8 V128Op.LeU)) +let i16x8_gt_s = VecBinary (V128 (I16x8 V128Op.GtS)) +let i16x8_gt_u = VecBinary (V128 (I16x8 V128Op.GtU)) +let i16x8_ge_s = VecBinary (V128 (I16x8 V128Op.GeS)) +let i16x8_ge_u = VecBinary (V128 (I16x8 V128Op.GeU)) +let i16x8_neg = VecUnary (V128 (I16x8 V128Op.Neg)) +let i16x8_bitmask = VecBitmask (V128 (I16x8 V128Op.Bitmask)) +let i16x8_all_true = VecTest (V128 (I16x8 V128Op.AllTrue)) +let i16x8_narrow_i32x4_s = VecBinary (V128 (I16x8 V128Op.NarrowS)) +let i16x8_narrow_i32x4_u = VecBinary (V128 (I16x8 V128Op.NarrowU)) +let i16x8_shl = VecShift (V128 (I16x8 V128Op.Shl)) +let i16x8_shr_s = VecShift (V128 (I16x8 V128Op.ShrS)) +let i16x8_shr_u = VecShift (V128 (I16x8 V128Op.ShrU)) +let i16x8_add = VecBinary (V128 (I16x8 V128Op.Add)) +let i16x8_add_sat_s = VecBinary (V128 (I16x8 V128Op.AddSatS)) +let i16x8_add_sat_u = VecBinary (V128 (I16x8 V128Op.AddSatU)) +let i16x8_sub = VecBinary (V128 (I16x8 V128Op.Sub)) +let i16x8_sub_sat_s = VecBinary (V128 (I16x8 V128Op.SubSatS)) +let i16x8_sub_sat_u = VecBinary (V128 (I16x8 V128Op.SubSatU)) +let i16x8_mul = VecBinary (V128 (I16x8 V128Op.Mul)) +let i16x8_abs = VecUnary (V128 (I16x8 V128Op.Abs)) +let i16x8_min_s = VecBinary (V128 (I16x8 V128Op.MinS)) +let i16x8_min_u = VecBinary (V128 (I16x8 V128Op.MinU)) +let i16x8_max_s = VecBinary (V128 (I16x8 V128Op.MaxS)) +let i16x8_max_u = VecBinary (V128 (I16x8 V128Op.MaxU)) +let i16x8_avgr_u = VecBinary (V128 (I16x8 V128Op.AvgrU)) +let i16x8_extmul_low_i8x16_s = VecBinary (V128 (I16x8 V128Op.ExtMulLowS)) +let i16x8_extmul_high_i8x16_s = VecBinary (V128 (I16x8 V128Op.ExtMulHighS)) +let i16x8_extmul_low_i8x16_u = VecBinary (V128 (I16x8 V128Op.ExtMulLowU)) +let i16x8_extmul_high_i8x16_u = VecBinary (V128 (I16x8 V128Op.ExtMulHighU)) +let i16x8_q15mulr_sat_s = VecBinary (V128 (I16x8 V128Op.Q15MulRSatS)) +let i16x8_extadd_pairwise_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) +let i16x8_extadd_pairwise_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -let i32x4_splat = SimdSplat (V128 (I32x4 V128Op.Splat)) -let i32x4_extract_lane i = SimdExtract (V128 (I32x4 (V128Op.Extract (i, ())))) -let i32x4_replace_lane i = SimdReplace (V128 (I32x4 (V128Op.Replace i))) -let i32x4_eq = SimdBinary (V128 (I32x4 V128Op.Eq)) -let i32x4_ne = SimdBinary (V128 (I32x4 V128Op.Ne)) -let i32x4_lt_s = SimdBinary (V128 (I32x4 V128Op.LtS)) -let i32x4_lt_u = SimdBinary (V128 (I32x4 V128Op.LtU)) -let i32x4_le_s = SimdBinary (V128 (I32x4 V128Op.LeS)) -let i32x4_le_u = SimdBinary (V128 (I32x4 V128Op.LeU)) -let i32x4_gt_s = SimdBinary (V128 (I32x4 V128Op.GtS)) -let i32x4_gt_u = SimdBinary (V128 (I32x4 V128Op.GtU)) -let i32x4_ge_s = SimdBinary (V128 (I32x4 V128Op.GeS)) -let i32x4_ge_u = SimdBinary (V128 (I32x4 V128Op.GeU)) -let i32x4_abs = SimdUnary (V128 (I32x4 V128Op.Abs)) -let i32x4_neg = SimdUnary (V128 (I32x4 V128Op.Neg)) -let i32x4_bitmask = SimdBitmask (V128 (I32x4 V128Op.Bitmask)) -let i32x4_all_true = SimdTest (V128 (I32x4 V128Op.AllTrue)) -let i32x4_extend_low_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtendLowS)) -let i32x4_extend_high_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtendHighS)) -let i32x4_extend_low_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtendLowU)) -let i32x4_extend_high_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtendHighU)) -let i32x4_shl = SimdShift (V128 (I32x4 V128Op.Shl)) -let i32x4_shr_s = SimdShift (V128 (I32x4 V128Op.ShrS)) -let i32x4_shr_u = SimdShift (V128 (I32x4 V128Op.ShrU)) -let i32x4_add = SimdBinary (V128 (I32x4 V128Op.Add)) -let i32x4_sub = SimdBinary (V128 (I32x4 V128Op.Sub)) -let i32x4_min_s = SimdBinary (V128 (I32x4 V128Op.MinS)) -let i32x4_min_u = SimdBinary (V128 (I32x4 V128Op.MinU)) -let i32x4_max_s = SimdBinary (V128 (I32x4 V128Op.MaxS)) -let i32x4_max_u = SimdBinary (V128 (I32x4 V128Op.MaxU)) -let i32x4_mul = SimdBinary (V128 (I32x4 V128Op.Mul)) -let i32x4_dot_i16x8_s = SimdBinary (V128 (I32x4 V128Op.DotS)) -let i32x4_trunc_sat_f32x4_s = SimdUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -let i32x4_trunc_sat_f32x4_u = SimdUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -let i32x4_trunc_sat_f64x2_s_zero = SimdUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -let i32x4_trunc_sat_f64x2_u_zero = SimdUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -let i32x4_extmul_low_i16x8_s = SimdBinary (V128 (I32x4 V128Op.ExtMulLowS)) -let i32x4_extmul_high_i16x8_s = SimdBinary (V128 (I32x4 V128Op.ExtMulHighS)) -let i32x4_extmul_low_i16x8_u = SimdBinary (V128 (I32x4 V128Op.ExtMulLowU)) -let i32x4_extmul_high_i16x8_u = SimdBinary (V128 (I32x4 V128Op.ExtMulHighU)) -let i32x4_extadd_pairwise_i16x8_s = SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -let i32x4_extadd_pairwise_i16x8_u = SimdUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) +let i32x4_splat = VecSplat (V128 (I32x4 V128Op.Splat)) +let i32x4_extract_lane i = VecExtract (V128 (I32x4 (V128Op.Extract (i, ())))) +let i32x4_replace_lane i = VecReplace (V128 (I32x4 (V128Op.Replace i))) +let i32x4_eq = VecBinary (V128 (I32x4 V128Op.Eq)) +let i32x4_ne = VecBinary (V128 (I32x4 V128Op.Ne)) +let i32x4_lt_s = VecBinary (V128 (I32x4 V128Op.LtS)) +let i32x4_lt_u = VecBinary (V128 (I32x4 V128Op.LtU)) +let i32x4_le_s = VecBinary (V128 (I32x4 V128Op.LeS)) +let i32x4_le_u = VecBinary (V128 (I32x4 V128Op.LeU)) +let i32x4_gt_s = VecBinary (V128 (I32x4 V128Op.GtS)) +let i32x4_gt_u = VecBinary (V128 (I32x4 V128Op.GtU)) +let i32x4_ge_s = VecBinary (V128 (I32x4 V128Op.GeS)) +let i32x4_ge_u = VecBinary (V128 (I32x4 V128Op.GeU)) +let i32x4_abs = VecUnary (V128 (I32x4 V128Op.Abs)) +let i32x4_neg = VecUnary (V128 (I32x4 V128Op.Neg)) +let i32x4_bitmask = VecBitmask (V128 (I32x4 V128Op.Bitmask)) +let i32x4_all_true = VecTest (V128 (I32x4 V128Op.AllTrue)) +let i32x4_extend_low_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtendLowS)) +let i32x4_extend_high_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtendHighS)) +let i32x4_extend_low_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtendLowU)) +let i32x4_extend_high_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtendHighU)) +let i32x4_shl = VecShift (V128 (I32x4 V128Op.Shl)) +let i32x4_shr_s = VecShift (V128 (I32x4 V128Op.ShrS)) +let i32x4_shr_u = VecShift (V128 (I32x4 V128Op.ShrU)) +let i32x4_add = VecBinary (V128 (I32x4 V128Op.Add)) +let i32x4_sub = VecBinary (V128 (I32x4 V128Op.Sub)) +let i32x4_min_s = VecBinary (V128 (I32x4 V128Op.MinS)) +let i32x4_min_u = VecBinary (V128 (I32x4 V128Op.MinU)) +let i32x4_max_s = VecBinary (V128 (I32x4 V128Op.MaxS)) +let i32x4_max_u = VecBinary (V128 (I32x4 V128Op.MaxU)) +let i32x4_mul = VecBinary (V128 (I32x4 V128Op.Mul)) +let i32x4_dot_i16x8_s = VecBinary (V128 (I32x4 V128Op.DotS)) +let i32x4_trunc_sat_f32x4_s = VecUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) +let i32x4_trunc_sat_f32x4_u = VecUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) +let i32x4_trunc_sat_f64x2_s_zero = VecUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) +let i32x4_trunc_sat_f64x2_u_zero = VecUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) +let i32x4_extmul_low_i16x8_s = VecBinary (V128 (I32x4 V128Op.ExtMulLowS)) +let i32x4_extmul_high_i16x8_s = VecBinary (V128 (I32x4 V128Op.ExtMulHighS)) +let i32x4_extmul_low_i16x8_u = VecBinary (V128 (I32x4 V128Op.ExtMulLowU)) +let i32x4_extmul_high_i16x8_u = VecBinary (V128 (I32x4 V128Op.ExtMulHighU)) +let i32x4_extadd_pairwise_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) +let i32x4_extadd_pairwise_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -let i64x2_splat = SimdSplat (V128 (I64x2 V128Op.Splat)) -let i64x2_extract_lane i = SimdExtract (V128 (I64x2 (V128Op.Extract (i, ())))) -let i64x2_replace_lane i = SimdReplace (V128 (I64x2 (V128Op.Replace i))) -let i64x2_extend_low_i32x4_s = SimdUnary (V128 (I64x2 V128Op.ExtendLowS)) -let i64x2_extend_high_i32x4_s = SimdUnary (V128 (I64x2 V128Op.ExtendHighS)) -let i64x2_extend_low_i32x4_u = SimdUnary (V128 (I64x2 V128Op.ExtendLowU)) -let i64x2_extend_high_i32x4_u = SimdUnary (V128 (I64x2 V128Op.ExtendHighU)) -let i64x2_eq = SimdBinary (V128 (I64x2 V128Op.Eq)) -let i64x2_ne = SimdBinary (V128 (I64x2 V128Op.Ne)) -let i64x2_lt_s = SimdBinary (V128 (I64x2 V128Op.LtS)) -let i64x2_le_s = SimdBinary (V128 (I64x2 V128Op.LeS)) -let i64x2_gt_s = SimdBinary (V128 (I64x2 V128Op.GtS)) -let i64x2_ge_s = SimdBinary (V128 (I64x2 V128Op.GeS)) -let i64x2_abs = SimdUnary (V128 (I64x2 V128Op.Abs)) -let i64x2_neg = SimdUnary (V128 (I64x2 V128Op.Neg)) -let i64x2_bitmask = SimdBitmask (V128 (I64x2 V128Op.Bitmask)) -let i64x2_all_true = SimdTest (V128 (I64x2 V128Op.AllTrue)) -let i64x2_add = SimdBinary (V128 (I64x2 V128Op.Add)) -let i64x2_sub = SimdBinary (V128 (I64x2 V128Op.Sub)) -let i64x2_mul = SimdBinary (V128 (I64x2 V128Op.Mul)) -let i64x2_shl = SimdShift (V128 (I64x2 V128Op.Shl)) -let i64x2_shr_s = SimdShift (V128 (I64x2 V128Op.ShrS)) -let i64x2_shr_u = SimdShift (V128 (I64x2 V128Op.ShrU)) -let i64x2_extmul_low_i32x4_s = SimdBinary (V128 (I64x2 V128Op.ExtMulLowS)) -let i64x2_extmul_high_i32x4_s = SimdBinary (V128 (I64x2 V128Op.ExtMulHighS)) -let i64x2_extmul_low_i32x4_u = SimdBinary (V128 (I64x2 V128Op.ExtMulLowU)) -let i64x2_extmul_high_i32x4_u = SimdBinary (V128 (I64x2 V128Op.ExtMulHighU)) +let i64x2_splat = VecSplat (V128 (I64x2 V128Op.Splat)) +let i64x2_extract_lane i = VecExtract (V128 (I64x2 (V128Op.Extract (i, ())))) +let i64x2_replace_lane i = VecReplace (V128 (I64x2 (V128Op.Replace i))) +let i64x2_extend_low_i32x4_s = VecUnary (V128 (I64x2 V128Op.ExtendLowS)) +let i64x2_extend_high_i32x4_s = VecUnary (V128 (I64x2 V128Op.ExtendHighS)) +let i64x2_extend_low_i32x4_u = VecUnary (V128 (I64x2 V128Op.ExtendLowU)) +let i64x2_extend_high_i32x4_u = VecUnary (V128 (I64x2 V128Op.ExtendHighU)) +let i64x2_eq = VecBinary (V128 (I64x2 V128Op.Eq)) +let i64x2_ne = VecBinary (V128 (I64x2 V128Op.Ne)) +let i64x2_lt_s = VecBinary (V128 (I64x2 V128Op.LtS)) +let i64x2_le_s = VecBinary (V128 (I64x2 V128Op.LeS)) +let i64x2_gt_s = VecBinary (V128 (I64x2 V128Op.GtS)) +let i64x2_ge_s = VecBinary (V128 (I64x2 V128Op.GeS)) +let i64x2_abs = VecUnary (V128 (I64x2 V128Op.Abs)) +let i64x2_neg = VecUnary (V128 (I64x2 V128Op.Neg)) +let i64x2_bitmask = VecBitmask (V128 (I64x2 V128Op.Bitmask)) +let i64x2_all_true = VecTest (V128 (I64x2 V128Op.AllTrue)) +let i64x2_add = VecBinary (V128 (I64x2 V128Op.Add)) +let i64x2_sub = VecBinary (V128 (I64x2 V128Op.Sub)) +let i64x2_mul = VecBinary (V128 (I64x2 V128Op.Mul)) +let i64x2_shl = VecShift (V128 (I64x2 V128Op.Shl)) +let i64x2_shr_s = VecShift (V128 (I64x2 V128Op.ShrS)) +let i64x2_shr_u = VecShift (V128 (I64x2 V128Op.ShrU)) +let i64x2_extmul_low_i32x4_s = VecBinary (V128 (I64x2 V128Op.ExtMulLowS)) +let i64x2_extmul_high_i32x4_s = VecBinary (V128 (I64x2 V128Op.ExtMulHighS)) +let i64x2_extmul_low_i32x4_u = VecBinary (V128 (I64x2 V128Op.ExtMulLowU)) +let i64x2_extmul_high_i32x4_u = VecBinary (V128 (I64x2 V128Op.ExtMulHighU)) -let f32x4_splat = SimdSplat (V128 (F32x4 V128Op.Splat)) -let f32x4_extract_lane i = SimdExtract (V128 (F32x4 (V128Op.Extract (i, ())))) -let f32x4_replace_lane i = SimdReplace (V128 (F32x4 (V128Op.Replace i))) -let f32x4_eq = SimdBinary (V128 (F32x4 V128Op.Eq)) -let f32x4_ne = SimdBinary (V128 (F32x4 V128Op.Ne)) -let f32x4_lt = SimdBinary (V128 (F32x4 V128Op.Lt)) -let f32x4_le = SimdBinary (V128 (F32x4 V128Op.Le)) -let f32x4_gt = SimdBinary (V128 (F32x4 V128Op.Gt)) -let f32x4_ge = SimdBinary (V128 (F32x4 V128Op.Ge)) -let f32x4_abs = SimdUnary (V128 (F32x4 V128Op.Abs)) -let f32x4_neg = SimdUnary (V128 (F32x4 V128Op.Neg)) -let f32x4_sqrt = SimdUnary (V128 (F32x4 V128Op.Sqrt)) -let f32x4_ceil = SimdUnary (V128 (F32x4 V128Op.Ceil)) -let f32x4_floor = SimdUnary (V128 (F32x4 V128Op.Floor)) -let f32x4_trunc = SimdUnary (V128 (F32x4 V128Op.Trunc)) -let f32x4_nearest = SimdUnary (V128 (F32x4 V128Op.Nearest)) -let f32x4_add = SimdBinary (V128 (F32x4 V128Op.Add)) -let f32x4_sub = SimdBinary (V128 (F32x4 V128Op.Sub)) -let f32x4_mul = SimdBinary (V128 (F32x4 V128Op.Mul)) -let f32x4_div = SimdBinary (V128 (F32x4 V128Op.Div)) -let f32x4_min = SimdBinary (V128 (F32x4 V128Op.Min)) -let f32x4_max = SimdBinary (V128 (F32x4 V128Op.Max)) -let f32x4_pmin = SimdBinary (V128 (F32x4 V128Op.Pmin)) -let f32x4_pmax = SimdBinary (V128 (F32x4 V128Op.Pmax)) -let f32x4_demote_f64x2_zero = SimdUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -let f32x4_convert_i32x4_s = SimdUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -let f32x4_convert_i32x4_u = SimdUnary (V128 (F32x4 V128Op.ConvertUI32x4)) +let f32x4_splat = VecSplat (V128 (F32x4 V128Op.Splat)) +let f32x4_extract_lane i = VecExtract (V128 (F32x4 (V128Op.Extract (i, ())))) +let f32x4_replace_lane i = VecReplace (V128 (F32x4 (V128Op.Replace i))) +let f32x4_eq = VecBinary (V128 (F32x4 V128Op.Eq)) +let f32x4_ne = VecBinary (V128 (F32x4 V128Op.Ne)) +let f32x4_lt = VecBinary (V128 (F32x4 V128Op.Lt)) +let f32x4_le = VecBinary (V128 (F32x4 V128Op.Le)) +let f32x4_gt = VecBinary (V128 (F32x4 V128Op.Gt)) +let f32x4_ge = VecBinary (V128 (F32x4 V128Op.Ge)) +let f32x4_abs = VecUnary (V128 (F32x4 V128Op.Abs)) +let f32x4_neg = VecUnary (V128 (F32x4 V128Op.Neg)) +let f32x4_sqrt = VecUnary (V128 (F32x4 V128Op.Sqrt)) +let f32x4_ceil = VecUnary (V128 (F32x4 V128Op.Ceil)) +let f32x4_floor = VecUnary (V128 (F32x4 V128Op.Floor)) +let f32x4_trunc = VecUnary (V128 (F32x4 V128Op.Trunc)) +let f32x4_nearest = VecUnary (V128 (F32x4 V128Op.Nearest)) +let f32x4_add = VecBinary (V128 (F32x4 V128Op.Add)) +let f32x4_sub = VecBinary (V128 (F32x4 V128Op.Sub)) +let f32x4_mul = VecBinary (V128 (F32x4 V128Op.Mul)) +let f32x4_div = VecBinary (V128 (F32x4 V128Op.Div)) +let f32x4_min = VecBinary (V128 (F32x4 V128Op.Min)) +let f32x4_max = VecBinary (V128 (F32x4 V128Op.Max)) +let f32x4_pmin = VecBinary (V128 (F32x4 V128Op.Pmin)) +let f32x4_pmax = VecBinary (V128 (F32x4 V128Op.Pmax)) +let f32x4_demote_f64x2_zero = VecUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) +let f32x4_convert_i32x4_s = VecUnary (V128 (F32x4 V128Op.ConvertSI32x4)) +let f32x4_convert_i32x4_u = VecUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -let f64x2_splat = SimdSplat (V128 (F64x2 V128Op.Splat)) -let f64x2_extract_lane i = SimdExtract (V128 (F64x2 (V128Op.Extract (i, ())))) -let f64x2_replace_lane i = SimdReplace (V128 (F64x2 (V128Op.Replace i))) -let f64x2_eq = SimdBinary (V128 (F64x2 V128Op.Eq)) -let f64x2_ne = SimdBinary (V128 (F64x2 V128Op.Ne)) -let f64x2_lt = SimdBinary (V128 (F64x2 V128Op.Lt)) -let f64x2_le = SimdBinary (V128 (F64x2 V128Op.Le)) -let f64x2_gt = SimdBinary (V128 (F64x2 V128Op.Gt)) -let f64x2_ge = SimdBinary (V128 (F64x2 V128Op.Ge)) -let f64x2_neg = SimdUnary (V128 (F64x2 V128Op.Neg)) -let f64x2_sqrt = SimdUnary (V128 (F64x2 V128Op.Sqrt)) -let f64x2_ceil = SimdUnary (V128 (F64x2 V128Op.Ceil)) -let f64x2_floor = SimdUnary (V128 (F64x2 V128Op.Floor)) -let f64x2_trunc = SimdUnary (V128 (F64x2 V128Op.Trunc)) -let f64x2_nearest = SimdUnary (V128 (F64x2 V128Op.Nearest)) -let f64x2_add = SimdBinary (V128 (F64x2 V128Op.Add)) -let f64x2_sub = SimdBinary (V128 (F64x2 V128Op.Sub)) -let f64x2_mul = SimdBinary (V128 (F64x2 V128Op.Mul)) -let f64x2_div = SimdBinary (V128 (F64x2 V128Op.Div)) -let f64x2_min = SimdBinary (V128 (F64x2 V128Op.Min)) -let f64x2_max = SimdBinary (V128 (F64x2 V128Op.Max)) -let f64x2_abs = SimdUnary (V128 (F64x2 V128Op.Abs)) -let f64x2_pmin = SimdBinary (V128 (F64x2 V128Op.Pmin)) -let f64x2_pmax = SimdBinary (V128 (F64x2 V128Op.Pmax)) -let f64x2_promote_low_f32x4 = SimdUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -let f64x2_convert_low_i32x4_s = SimdUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -let f64x2_convert_low_i32x4_u = SimdUnary (V128 (F64x2 V128Op.ConvertUI32x4)) +let f64x2_splat = VecSplat (V128 (F64x2 V128Op.Splat)) +let f64x2_extract_lane i = VecExtract (V128 (F64x2 (V128Op.Extract (i, ())))) +let f64x2_replace_lane i = VecReplace (V128 (F64x2 (V128Op.Replace i))) +let f64x2_eq = VecBinary (V128 (F64x2 V128Op.Eq)) +let f64x2_ne = VecBinary (V128 (F64x2 V128Op.Ne)) +let f64x2_lt = VecBinary (V128 (F64x2 V128Op.Lt)) +let f64x2_le = VecBinary (V128 (F64x2 V128Op.Le)) +let f64x2_gt = VecBinary (V128 (F64x2 V128Op.Gt)) +let f64x2_ge = VecBinary (V128 (F64x2 V128Op.Ge)) +let f64x2_neg = VecUnary (V128 (F64x2 V128Op.Neg)) +let f64x2_sqrt = VecUnary (V128 (F64x2 V128Op.Sqrt)) +let f64x2_ceil = VecUnary (V128 (F64x2 V128Op.Ceil)) +let f64x2_floor = VecUnary (V128 (F64x2 V128Op.Floor)) +let f64x2_trunc = VecUnary (V128 (F64x2 V128Op.Trunc)) +let f64x2_nearest = VecUnary (V128 (F64x2 V128Op.Nearest)) +let f64x2_add = VecBinary (V128 (F64x2 V128Op.Add)) +let f64x2_sub = VecBinary (V128 (F64x2 V128Op.Sub)) +let f64x2_mul = VecBinary (V128 (F64x2 V128Op.Mul)) +let f64x2_div = VecBinary (V128 (F64x2 V128Op.Div)) +let f64x2_min = VecBinary (V128 (F64x2 V128Op.Min)) +let f64x2_max = VecBinary (V128 (F64x2 V128Op.Max)) +let f64x2_abs = VecUnary (V128 (F64x2 V128Op.Abs)) +let f64x2_pmin = VecBinary (V128 (F64x2 V128Op.Pmin)) +let f64x2_pmax = VecBinary (V128 (F64x2 V128Op.Pmax)) +let f64x2_promote_low_f32x4 = VecUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) +let f64x2_convert_low_i32x4_s = VecUnary (V128 (F64x2 V128Op.ConvertSI32x4)) +let f64x2_convert_low_i32x4_u = VecUnary (V128 (F64x2 V128Op.ConvertUI32x4)) diff --git a/interpreter/syntax/types.ml b/interpreter/syntax/types.ml index 12e14739b6..e878cc8c2c 100644 --- a/interpreter/syntax/types.ml +++ b/interpreter/syntax/types.ml @@ -1,9 +1,9 @@ (* Types *) type num_type = I32Type | I64Type | F32Type | F64Type -type simd_type = V128Type +type vec_type = V128Type type ref_type = FuncRefType | ExternRefType -type value_type = NumType of num_type | SimdType of simd_type | RefType of ref_type +type value_type = NumType of num_type | VecType of vec_type | RefType of ref_type type result_type = value_type list type func_type = FuncType of result_type * result_type @@ -22,7 +22,7 @@ type extern_type = type pack_size = Pack8 | Pack16 | Pack32 | Pack64 type extension = SX | ZX type pack_shape = Pack8x8 | Pack16x4 | Pack32x2 -type simd_extension = +type vec_extension = | ExtLane of pack_shape * extension | ExtSplat | ExtZero @@ -34,7 +34,7 @@ let num_size = function | I32Type | F32Type -> 4 | I64Type | F64Type -> 8 -let simd_size = function +let vec_size = function | V128Type -> 16 let packed_size = function @@ -50,8 +50,8 @@ let is_num_type = function | NumType _ -> true | _ -> false -let is_simd_type = function - | SimdType _ -> true +let is_vec_type = function + | VecType _ -> true | _ -> false let is_ref_type = function @@ -109,7 +109,7 @@ let string_of_num_type = function | F32Type -> "f32" | F64Type -> "f64" -let string_of_simd_type = function +let string_of_vec_type = function | V128Type -> "v128" let string_of_ref_type = function @@ -122,7 +122,7 @@ let string_of_refed_type = function let string_of_value_type = function | NumType t -> string_of_num_type t - | SimdType t -> string_of_simd_type t + | VecType t -> string_of_vec_type t | RefType t -> string_of_ref_type t let string_of_value_types = function diff --git a/interpreter/syntax/values.ml b/interpreter/syntax/values.ml index cd01a5600f..eefe37d5d0 100644 --- a/interpreter/syntax/values.ml +++ b/interpreter/syntax/values.ml @@ -6,16 +6,16 @@ open Types type ('i32, 'i64, 'f32, 'f64) op = I32 of 'i32 | I64 of 'i64 | F32 of 'f32 | F64 of 'f64 -type ('v128) simdop = +type ('v128) vecop = V128 of 'v128 type num = (I32.t, I64.t, F32.t, F64.t) op -type simd = (V128.t) simdop +type vec = (V128.t) vecop type ref_ = .. type ref_ += NullRef of ref_type -type value = Num of num | Simd of simd | Ref of ref_ +type value = Num of num | Vec of vec | Ref of ref_ (* Injection & projection *) @@ -24,9 +24,9 @@ let as_num = function | Num n -> n | _ -> failwith "as_num" -let as_simd = function - | Simd i -> i - | _ -> failwith "as_simd" +let as_vec = function + | Vec i -> i + | _ -> failwith "as_vec" let as_ref = function | Ref r -> r @@ -70,18 +70,18 @@ struct let of_num n = function F64 z -> z | v -> raise (TypeError (n, v, F64Type)) end -module type SimdType = +module type VecType = sig type t - val to_simd : t -> simd - val of_simd : int -> simd -> t + val to_vec : t -> vec + val of_vec : int -> vec -> t end -module V128Simd = +module V128Vec = struct type t = V128.t - let to_simd i = V128 i - let of_simd n = function V128 z -> z + let to_vec i = V128 i + let of_vec n = function V128 z -> z end @@ -93,7 +93,7 @@ let type_of_num = function | F32 _ -> F32Type | F64 _ -> F64Type -let type_of_simd = function +let type_of_vec = function | V128 _ -> V128Type let type_of_ref' = ref (function NullRef t -> t | _ -> assert false) @@ -101,7 +101,7 @@ let type_of_ref r = !type_of_ref' r let type_of_value = function | Num n -> NumType (type_of_num n) - | Simd i -> SimdType (type_of_simd i) + | Vec i -> VecType (type_of_vec i) | Ref r -> RefType (type_of_ref r) @@ -109,7 +109,7 @@ let type_of_value = function let eq_num n1 n2 = n1 = n2 -let eq_simd v1 v2 = v1 = v2 +let eq_vec v1 v2 = v1 = v2 let eq_ref' = ref (fun r1 r2 -> match r1, r2 with @@ -122,7 +122,7 @@ let eq_ref r1 r2 = !eq_ref' r1 r2 let eq v1 v2 = match v1, v2 with | Num n1, Num n2 -> eq_num n1 n2 - | Simd v1, Simd v2 -> eq_simd v1 v2 + | Vec v1, Vec v2 -> eq_vec v1 v2 | Ref r1, Ref r2 -> eq_ref r1 r2 | _, _ -> false @@ -135,7 +135,7 @@ let default_num = function | F32Type -> F32 F32.zero | F64Type -> F64 F64.zero -let default_simd = function +let default_vec = function | V128Type -> V128 V128.zero let default_ref = function @@ -143,7 +143,7 @@ let default_ref = function let default_value = function | NumType t' -> Num (default_num t') - | SimdType t' -> Simd (default_simd t') + | VecType t' -> Vec (default_vec t') | RefType t' -> Ref (default_ref t') @@ -163,10 +163,10 @@ let hex_string_of_num = function | F32 z -> F32.to_hex_string z | F64 z -> F64.to_hex_string z -let string_of_simd = function +let string_of_vec = function | V128 v -> V128.to_string v -let hex_string_of_simd = function +let hex_string_of_vec = function | V128 v -> V128.to_hex_string v let string_of_ref' = ref (function NullRef t -> "null" | _ -> "ref") @@ -174,7 +174,7 @@ let string_of_ref r = !string_of_ref' r let string_of_value = function | Num n -> string_of_num n - | Simd i -> string_of_simd i + | Vec i -> string_of_vec i | Ref r -> string_of_ref r let string_of_values = function diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 68bf2d7206..4825660482 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -56,7 +56,7 @@ let break_string s = (* Types *) let num_type t = string_of_num_type t -let simd_type t = string_of_simd_type t +let vec_type t = string_of_vec_type t let ref_type t = string_of_ref_type t let refed_type t = string_of_refed_type t let value_type t = string_of_value_type t @@ -90,7 +90,7 @@ let pack_shape = function | Pack16x4 -> "16x4" | Pack32x2 -> "32x2" -let simd_extension sz = function +let vec_extension sz = function | ExtLane (sh, ext) -> pack_shape sh ^ extension ext | ExtSplat -> pack_size sz ^ "_splat" | ExtZero -> pack_size sz ^ "_zero" @@ -352,11 +352,11 @@ let oper (iop, fop) op = | F64 o -> fop "64" o ) -let simd_oper (vop) op = +let vec_oper (vop) op = match op with | V128 o -> "v128." ^ vop o -let simd_shape_oper (pop, iop, fop) op = +let vec_shape_oper (pop, iop, fop) op = match op with | V128 o -> V128.string_of_shape o ^ "." ^ V128Op.lane_oper (pop, iop, fop) o @@ -366,19 +366,19 @@ let testop = oper (IntOp.testop, FloatOp.testop) let relop = oper (IntOp.relop, FloatOp.relop) let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) -let simd_unop = simd_shape_oper (V128Op.iunop, V128Op.iunop, V128Op.funop) -let simd_binop = simd_shape_oper (V128Op.ibinop, V128Op.ibinop, V128Op.fbinop) -let simd_testop = simd_shape_oper (V128Op.itestop, V128Op.itestop, V128Op.voidop) -let simd_vunop = simd_oper (V128Op.vunop) -let simd_vbinop = simd_oper (V128Op.vbinop) -let simd_vternop = simd_oper (V128Op.vternop) -let simd_vtestop = simd_oper (V128Op.vtestop) -let simd_shiftop = simd_shape_oper (V128Op.ishiftop, V128Op.ishiftop, V128Op.voidop) -let simd_bitmaskop = simd_shape_oper (V128Op.ibitmaskop, V128Op.ibitmaskop, V128Op.voidop) +let vec_unop = vec_shape_oper (V128Op.iunop, V128Op.iunop, V128Op.funop) +let vec_binop = vec_shape_oper (V128Op.ibinop, V128Op.ibinop, V128Op.fbinop) +let vec_testop = vec_shape_oper (V128Op.itestop, V128Op.itestop, V128Op.voidop) +let vec_vunop = vec_oper (V128Op.vunop) +let vec_vbinop = vec_oper (V128Op.vbinop) +let vec_vternop = vec_oper (V128Op.vternop) +let vec_vtestop = vec_oper (V128Op.vtestop) +let vec_shiftop = vec_shape_oper (V128Op.ishiftop, V128Op.ishiftop, V128Op.voidop) +let vec_bitmaskop = vec_shape_oper (V128Op.ibitmaskop, V128Op.ibitmaskop, V128Op.voidop) -let simd_splatop = simd_shape_oper (V128Op.splatop, V128Op.splatop, V128Op.splatop) -let simd_extractop = simd_shape_oper (V128Op.pextractop, V128Op.extractop, V128Op.extractop) -let simd_replaceop = simd_shape_oper (V128Op.replaceop, V128Op.replaceop, V128Op.replaceop) +let vec_splatop = vec_shape_oper (V128Op.splatop, V128Op.splatop, V128Op.splatop) +let vec_extractop = vec_shape_oper (V128Op.pextractop, V128Op.extractop, V128Op.extractop) +let vec_replaceop = vec_shape_oper (V128Op.replaceop, V128Op.replaceop, V128Op.replaceop) let memop name typ {ty; align; offset; _} sz = typ ty ^ "." ^ name ^ @@ -396,17 +396,17 @@ let storeop op = | None -> memop "store" num_type op (num_size op.ty) | Some sz -> memop ("store" ^ pack_size sz) num_type op (packed_size sz) -let simd_loadop (op : simd_loadop) = +let vec_loadop (op : vec_loadop) = match op.pack with - | None -> memop "load" simd_type op (simd_size op.ty) + | None -> memop "load" vec_type op (vec_size op.ty) | Some (sz, ext) -> - memop ("load" ^ simd_extension sz ext) simd_type op (packed_size sz) + memop ("load" ^ vec_extension sz ext) vec_type op (packed_size sz) -let simd_storeop op = - memop "store" simd_type op (simd_size op.ty) +let vec_storeop op = + memop "store" vec_type op (vec_size op.ty) -let simd_laneop instr (op, i) = - memop (instr ^ pack_size op.pack ^ "_lane") simd_type op +let vec_laneop instr (op, i) = + memop (instr ^ pack_size op.pack ^ "_lane") vec_type op (packed_size op.pack) ^ " " ^ nat i @@ -414,9 +414,9 @@ let simd_laneop instr (op, i) = let var x = nat32 x.it let num v = string_of_num v.it -let simd v = string_of_simd v.it +let vec v = string_of_vec v.it let constop v = num_type (type_of_num v) ^ ".const" -let simd_constop v = simd_type (type_of_simd v) ^ ".const i32x4" +let vec_constop v = vec_type (type_of_vec v) ^ ".const i32x4" let block_type = function | VarBlockType x -> [Node ("type " ^ var x, [])] @@ -459,10 +459,10 @@ let rec instr e = | ElemDrop x -> "elem.drop " ^ var x, [] | Load op -> loadop op, [] | Store op -> storeop op, [] - | SimdLoad op -> simd_loadop op, [] - | SimdStore op -> simd_storeop op, [] - | SimdLoadLane op -> simd_laneop "load" op, [] - | SimdStoreLane op -> simd_laneop "store" op, [] + | VecLoad op -> vec_loadop op, [] + | VecStore op -> vec_storeop op, [] + | VecLoadLane op -> vec_laneop "load" op, [] + | VecStoreLane op -> vec_laneop "store" op, [] | MemorySize -> "memory.size", [] | MemoryGrow -> "memory.grow", [] | MemoryFill -> "memory.fill", [] @@ -478,19 +478,19 @@ let rec instr e = | Unary op -> unop op, [] | Binary op -> binop op, [] | Convert op -> cvtop op, [] - | SimdConst v -> simd_constop v.it ^ " " ^ simd v, [] - | SimdTest op -> simd_testop op, [] - | SimdUnary op -> simd_unop op, [] - | SimdBinary op -> simd_binop op, [] - | SimdTestVec op -> simd_vtestop op, [] - | SimdUnaryVec op -> simd_vunop op, [] - | SimdBinaryVec op -> simd_vbinop op, [] - | SimdTernaryVec op -> simd_vternop op, [] - | SimdShift op -> simd_shiftop op, [] - | SimdBitmask op -> simd_bitmaskop op, [] - | SimdSplat op -> simd_splatop op, [] - | SimdExtract op -> simd_extractop op, [] - | SimdReplace op -> simd_replaceop op, [] + | VecConst v -> vec_constop v.it ^ " " ^ vec v, [] + | VecTest op -> vec_testop op, [] + | VecUnary op -> vec_unop op, [] + | VecBinary op -> vec_binop op, [] + | VecTestBits op -> vec_vtestop op, [] + | VecUnaryBits op -> vec_vunop op, [] + | VecBinaryBits op -> vec_vbinop op, [] + | VecTernaryBits op -> vec_vternop op, [] + | VecShift op -> vec_shiftop op, [] + | VecBitmask op -> vec_bitmaskop op, [] + | VecSplat op -> vec_splatop op, [] + | VecExtract op -> vec_extractop op, [] + | VecReplace op -> vec_replaceop op, [] in Node (head, inner) let const head c = @@ -646,7 +646,7 @@ let module_ = module_with_var_opt None (* Scripts *) let num mode = if mode = `Binary then hex_string_of_num else string_of_num -let simd mode = if mode = `Binary then hex_string_of_simd else string_of_simd +let vec mode = if mode = `Binary then hex_string_of_vec else string_of_vec let ref_ = function | NullRef t -> Node ("ref.null " ^ refed_type t, []) @@ -656,7 +656,7 @@ let ref_ = function let literal mode lit = match lit.it with | Num n -> Node (constop n ^ " " ^ num mode n, []) - | Simd v -> Node (simd_constop v ^ " " ^ simd mode v, []) + | Vec v -> Node (vec_constop v ^ " " ^ vec mode v, []) | Ref r -> ref_ r let definition mode x_opt def = @@ -717,8 +717,8 @@ let lane_pat mode pat shape = | NumPat n, _ -> num mode n.it | NanPat nan, _ -> nanop nan -let simd_pat mode = function - | SimdPat (V128 (shape, pats)) -> +let vec_pat mode = function + | VecPat (V128 (shape, pats)) -> let lanes = List.map (fun p -> Atom (lane_pat mode p shape)) pats in Node ("v128.const " ^ V128.string_of_shape shape, lanes) @@ -729,7 +729,7 @@ let ref_pat = function let result mode res = match res.it with | NumResult np -> num_pat mode np - | SimdResult vp -> simd_pat mode vp + | VecResult vp -> vec_pat mode vp | RefResult rp -> ref_pat rp let assertion mode ass = diff --git a/interpreter/text/lexer.mll b/interpreter/text/lexer.mll index 99750e0e68..c5d759fb88 100644 --- a/interpreter/text/lexer.mll +++ b/interpreter/text/lexer.mll @@ -54,7 +54,7 @@ let num_type = function | "f64" -> Types.F64Type | _ -> assert false -let simd_type = function +let vec_type = function | "v128" -> Types.V128Type | _ -> assert false @@ -215,10 +215,10 @@ rule token = parse | "externref" { EXTERNREF } | "funcref" { FUNCREF } | nxx as t { NUM_TYPE (num_type t) } - | vxxx as t { SIMD_TYPE (simd_type t) } + | vxxx as t { VEC_TYPE (vec_type t) } | "mut" { MUT } - | v128_shape as s { SIMD_SHAPE (v128_shape s) } + | v128_shape as s { VEC_SHAPE (v128_shape s) } | (nxx as t)".const" { let open Source in @@ -234,7 +234,7 @@ rule token = parse } | vxxx".const" { let open Source in - SIMD_CONST + VEC_CONST (fun shape ss at -> let v = V128.of_strings shape (List.map (fun s -> s.it) ss) in (v128_const (v @@ at), Values.V128 v)) @@ -316,43 +316,43 @@ rule token = parse (i64_store16 (opt a 1)) (i64_store32 (opt a 2)) o)) } | "v128.load" - { SIMD_LOAD (fun a o -> (v128_load (opt a 4)) o) } + { VEC_LOAD (fun a o -> (v128_load (opt a 4)) o) } | "v128.store" - { SIMD_STORE (fun a o -> (v128_store (opt a 4)) o) } + { VEC_STORE (fun a o -> (v128_store (opt a 4)) o) } | "v128.load8x8_"(sign as s) - { SIMD_LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } + { VEC_LOAD (fun a o -> (ext s v128_load8x8_s v128_load8x8_u (opt a 3)) o) } | "v128.load16x4_"(sign as s) - { SIMD_LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } + { VEC_LOAD (fun a o -> (ext s v128_load16x4_s v128_load16x4_u (opt a 3)) o) } | "v128.load32x2_"(sign as s) - { SIMD_LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } + { VEC_LOAD (fun a o -> (ext s v128_load32x2_s v128_load32x2_u (opt a 3)) o) } | "v128.load8_splat" - { SIMD_LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } + { VEC_LOAD (fun a o -> (v128_load8_splat (opt a 0)) o) } | "v128.load16_splat" - { SIMD_LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } + { VEC_LOAD (fun a o -> (v128_load16_splat (opt a 1)) o) } | "v128.load32_splat" - { SIMD_LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } + { VEC_LOAD (fun a o -> (v128_load32_splat (opt a 2)) o) } | "v128.load64_splat" - { SIMD_LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } + { VEC_LOAD (fun a o -> (v128_load64_splat (opt a 3)) o) } | "v128.load32_zero" - { SIMD_LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } + { VEC_LOAD (fun a o -> (v128_load32_zero (opt a 2)) o) } | "v128.load64_zero" - { SIMD_LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } + { VEC_LOAD (fun a o -> (v128_load64_zero (opt a 3)) o) } | "v128.load8_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } + { VEC_LOAD_LANE (fun a o i -> (v128_load8_lane (opt a 0)) o i) } | "v128.load16_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load16_lane (opt a 1)) o i) } + { VEC_LOAD_LANE (fun a o i -> (v128_load16_lane (opt a 1)) o i) } | "v128.load32_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load32_lane (opt a 2)) o i) } + { VEC_LOAD_LANE (fun a o i -> (v128_load32_lane (opt a 2)) o i) } | "v128.load64_lane" - { SIMD_LOAD_LANE (fun a o i -> (v128_load64_lane (opt a 3)) o i) } + { VEC_LOAD_LANE (fun a o i -> (v128_load64_lane (opt a 3)) o i) } | "v128.store8_lane" - { SIMD_STORE_LANE (fun a o i -> (v128_store8_lane (opt a 0)) o i) } + { VEC_STORE_LANE (fun a o i -> (v128_store8_lane (opt a 0)) o i) } | "v128.store16_lane" - { SIMD_STORE_LANE (fun a o i -> (v128_store16_lane (opt a 1)) o i) } + { VEC_STORE_LANE (fun a o i -> (v128_store16_lane (opt a 1)) o i) } | "v128.store32_lane" - { SIMD_STORE_LANE (fun a o i -> (v128_store32_lane (opt a 2)) o i) } + { VEC_STORE_LANE (fun a o i -> (v128_store32_lane (opt a 2)) o i) } | "v128.store64_lane" - { SIMD_STORE_LANE (fun a o i -> (v128_store64_lane (opt a 3)) o i) } + { VEC_STORE_LANE (fun a o i -> (v128_store64_lane (opt a 3)) o i) } | "offset="(nat as s) { OFFSET_EQ_NAT s } | "align="(nat as s) { ALIGN_EQ_NAT s } @@ -483,193 +483,193 @@ rule token = parse | "input" { INPUT } | "output" { OUTPUT } - | vxxx".not" { SIMD_UNARY v128_not } - | vxxx".and" { SIMD_UNARY v128_and } - | vxxx".andnot" { SIMD_UNARY v128_andnot } - | vxxx".or" { SIMD_UNARY v128_or } - | vxxx".xor" { SIMD_UNARY v128_xor } - | vxxx".bitselect" { SIMD_TERNARY v128_bitselect } - | vxxx".any_true" { SIMD_TEST (v128_any_true) } + | vxxx".not" { VEC_UNARY v128_not } + | vxxx".and" { VEC_UNARY v128_and } + | vxxx".andnot" { VEC_UNARY v128_andnot } + | vxxx".or" { VEC_UNARY v128_or } + | vxxx".xor" { VEC_UNARY v128_xor } + | vxxx".bitselect" { VEC_TERNARY v128_bitselect } + | vxxx".any_true" { VEC_TEST (v128_any_true) } | (v128_shape as s)".neg" - { SIMD_UNARY + { VEC_UNARY (v128op s i8x16_neg i16x8_neg i32x4_neg i64x2_neg f32x4_neg f64x2_neg) } | (v128_float_shape as s)".sqrt" - { SIMD_UNARY (v128floatop s f32x4_sqrt f64x2_sqrt) } + { VEC_UNARY (v128floatop s f32x4_sqrt f64x2_sqrt) } | (v128_float_shape as s)".ceil" - { SIMD_UNARY (v128floatop s f32x4_ceil f64x2_ceil) } + { VEC_UNARY (v128floatop s f32x4_ceil f64x2_ceil) } | (v128_float_shape as s)".floor" - { SIMD_UNARY (v128floatop s f32x4_floor f64x2_floor) } + { VEC_UNARY (v128floatop s f32x4_floor f64x2_floor) } | (v128_float_shape as s)".trunc" - { SIMD_UNARY (v128floatop s f32x4_trunc f64x2_trunc) } + { VEC_UNARY (v128floatop s f32x4_trunc f64x2_trunc) } | (v128_float_shape as s)".nearest" - { SIMD_UNARY (v128floatop s f32x4_nearest f64x2_nearest) } + { VEC_UNARY (v128floatop s f32x4_nearest f64x2_nearest) } | (v128_shape as s)".abs" - { SIMD_UNARY + { VEC_UNARY (v128op s i8x16_abs i16x8_abs i32x4_abs i64x2_abs f32x4_abs f64x2_abs) } - | "i8x16.popcnt" { SIMD_UNARY i8x16_popcnt } + | "i8x16.popcnt" { VEC_UNARY i8x16_popcnt } | (v128_int_shape as s)".avgr_u" { only ["i8x16"; "i16x8"] s lexbuf; - SIMD_UNARY (v128intop s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } + VEC_UNARY (v128intop s i8x16_avgr_u i16x8_avgr_u unreachable unreachable) } | "i32x4.trunc_sat_f32x4_"(sign as s) - { SIMD_UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } + { VEC_UNARY (ext s i32x4_trunc_sat_f32x4_s i32x4_trunc_sat_f32x4_u) } | "i32x4.trunc_sat_f64x2_"(sign as s)"_zero" - { SIMD_UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } + { VEC_UNARY (ext s i32x4_trunc_sat_f64x2_s_zero i32x4_trunc_sat_f64x2_u_zero) } | "f64x2.promote_low_f32x4" - { SIMD_UNARY f64x2_promote_low_f32x4 } + { VEC_UNARY f64x2_promote_low_f32x4 } | "f32x4.demote_f64x2_zero" - { SIMD_UNARY f32x4_demote_f64x2_zero } + { VEC_UNARY f32x4_demote_f64x2_zero } | "f32x4.convert_i32x4_"(sign as s) - { SIMD_UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } + { VEC_UNARY (ext s f32x4_convert_i32x4_s f32x4_convert_i32x4_u) } | "f64x2.convert_low_i32x4_"(sign as s) - { SIMD_UNARY (ext s f64x2_convert_low_i32x4_s f64x2_convert_low_i32x4_u) } + { VEC_UNARY (ext s f64x2_convert_low_i32x4_s f64x2_convert_low_i32x4_u) } | "i16x8.extadd_pairwise_i8x16_"(sign as s) - { SIMD_UNARY (ext s i16x8_extadd_pairwise_i8x16_s i16x8_extadd_pairwise_i8x16_u) } + { VEC_UNARY (ext s i16x8_extadd_pairwise_i8x16_s i16x8_extadd_pairwise_i8x16_u) } | "i32x4.extadd_pairwise_i16x8_"(sign as s) - { SIMD_UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } + { VEC_UNARY (ext s i32x4_extadd_pairwise_i16x8_s i32x4_extadd_pairwise_i16x8_u) } | (v128_shape as s)".eq" - { SIMD_BINARY (v128op s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } + { VEC_BINARY (v128op s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) } | (v128_shape as s)".ne" - { SIMD_BINARY (v128op s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } + { VEC_BINARY (v128op s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) } | (v128_int_shape as s)".lt_s" - { SIMD_BINARY (v128intop s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } + { VEC_BINARY (v128intop s i8x16_lt_s i16x8_lt_s i32x4_lt_s i64x2_lt_s) } | (v128_int_shape as s)".lt_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (v128intop s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } + VEC_BINARY (v128intop s i8x16_lt_u i16x8_lt_u i32x4_lt_u unreachable) } | (v128_int_shape as s)".le_s" - { SIMD_BINARY (v128intop s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } + { VEC_BINARY (v128intop s i8x16_le_s i16x8_le_s i32x4_le_s i64x2_le_s) } | (v128_int_shape as s)".le_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (v128intop s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } + VEC_BINARY (v128intop s i8x16_le_u i16x8_le_u i32x4_le_u unreachable) } | (v128_int_shape as s)".gt_s" - { SIMD_BINARY (v128intop s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } + { VEC_BINARY (v128intop s i8x16_gt_s i16x8_gt_s i32x4_gt_s i64x2_gt_s) } | (v128_int_shape as s)".gt_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (v128intop s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } + VEC_BINARY (v128intop s i8x16_gt_u i16x8_gt_u i32x4_gt_u unreachable) } | (v128_int_shape as s)".ge_s" - { SIMD_BINARY (v128intop s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } + { VEC_BINARY (v128intop s i8x16_ge_s i16x8_ge_s i32x4_ge_s i64x2_ge_s) } | (v128_int_shape as s)".ge_u" { except ["i64x2"] s lexbuf; - SIMD_BINARY (v128intop s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } - | (v128_float_shape as s)".lt" { SIMD_BINARY (v128floatop s f32x4_lt f64x2_lt) } - | (v128_float_shape as s)".le" { SIMD_BINARY (v128floatop s f32x4_le f64x2_le) } - | (v128_float_shape as s)".gt" { SIMD_BINARY (v128floatop s f32x4_gt f64x2_gt) } - | (v128_float_shape as s)".ge" { SIMD_BINARY (v128floatop s f32x4_ge f64x2_ge) } - | "i8x16.swizzle" { SIMD_BINARY i8x16_swizzle } + VEC_BINARY (v128intop s i8x16_ge_u i16x8_ge_u i32x4_ge_u unreachable) } + | (v128_float_shape as s)".lt" { VEC_BINARY (v128floatop s f32x4_lt f64x2_lt) } + | (v128_float_shape as s)".le" { VEC_BINARY (v128floatop s f32x4_le f64x2_le) } + | (v128_float_shape as s)".gt" { VEC_BINARY (v128floatop s f32x4_gt f64x2_gt) } + | (v128_float_shape as s)".ge" { VEC_BINARY (v128floatop s f32x4_ge f64x2_ge) } + | "i8x16.swizzle" { VEC_BINARY i8x16_swizzle } | (v128_shape as s)".add" - { SIMD_BINARY + { VEC_BINARY (v128op s i8x16_add i16x8_add i32x4_add i64x2_add f32x4_add f64x2_add) } | (v128_shape as s)".sub" - { SIMD_BINARY + { VEC_BINARY (v128op s i8x16_sub i16x8_sub i32x4_sub i64x2_sub f32x4_sub f64x2_sub) } | (v128_shape as s)".min_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - SIMD_BINARY + VEC_BINARY (v128op s i8x16_min_s i16x8_min_s i32x4_min_s unreachable unreachable unreachable) } | (v128_shape as s)".min_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - SIMD_BINARY + VEC_BINARY (v128op s i8x16_min_u i16x8_min_u i32x4_min_u unreachable unreachable unreachable) } | (v128_shape as s)".max_s" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - SIMD_BINARY + VEC_BINARY (v128op s i8x16_max_s i16x8_max_s i32x4_max_s unreachable unreachable unreachable) } | (v128_shape as s)".max_u" { only ["i8x16"; "i16x8"; "i32x4"] s lexbuf; - SIMD_BINARY + VEC_BINARY (v128op s i8x16_max_u i16x8_max_u i32x4_max_u unreachable unreachable unreachable) } | (v128_shape as s)".mul" { only ["i16x8"; "i32x4"; "i64x2"; "f32x4"; "f64x2"] s lexbuf; - SIMD_BINARY + VEC_BINARY (v128op s unreachable i16x8_mul i32x4_mul i64x2_mul f32x4_mul f64x2_mul) } | (v128_float_shape as s)".div" - { SIMD_BINARY (v128floatop s f32x4_div f64x2_div) } + { VEC_BINARY (v128floatop s f32x4_div f64x2_div) } | (v128_float_shape as s)".min" - { SIMD_BINARY (v128floatop s f32x4_min f64x2_min) } + { VEC_BINARY (v128floatop s f32x4_min f64x2_min) } | (v128_float_shape as s)".max" - { SIMD_BINARY (v128floatop s f32x4_max f64x2_max) } + { VEC_BINARY (v128floatop s f32x4_max f64x2_max) } | (v128_float_shape as s)".pmin" - { SIMD_BINARY (v128floatop s f32x4_pmin f64x2_pmin) } + { VEC_BINARY (v128floatop s f32x4_pmin f64x2_pmin) } | (v128_float_shape as s)".pmax" - { SIMD_BINARY (v128floatop s f32x4_pmax f64x2_pmax) } + { VEC_BINARY (v128floatop s f32x4_pmax f64x2_pmax) } | "i8x16.add_sat_"(sign as s) - { SIMD_BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } + { VEC_BINARY (ext s i8x16_add_sat_s i8x16_add_sat_u) } | "i8x16.sub_sat_"(sign as s) - { SIMD_BINARY (ext s i8x16_sub_sat_s i8x16_sub_sat_u) } + { VEC_BINARY (ext s i8x16_sub_sat_s i8x16_sub_sat_u) } | "i16x8.add_sat_"(sign as s) - { SIMD_BINARY (ext s i16x8_add_sat_s i16x8_add_sat_u) } + { VEC_BINARY (ext s i16x8_add_sat_s i16x8_add_sat_u) } | "i16x8.sub_sat_"(sign as s) - { SIMD_BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } + { VEC_BINARY (ext s i16x8_sub_sat_s i16x8_sub_sat_u) } | "i32x4.dot_i16x8_s" - { SIMD_BINARY i32x4_dot_i16x8_s } + { VEC_BINARY i32x4_dot_i16x8_s } | "i8x16.narrow_i16x8_"(sign as s) - { SIMD_BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } + { VEC_BINARY (ext s i8x16_narrow_i16x8_s i8x16_narrow_i16x8_u) } | "i16x8.narrow_i32x4_"(sign as s) - { SIMD_BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } + { VEC_BINARY (ext s i16x8_narrow_i32x4_s i16x8_narrow_i32x4_u) } | "i16x8.extend_low_i8x16_"(sign as s) - { SIMD_UNARY (ext s i16x8_extend_low_i8x16_s i16x8_extend_low_i8x16_u) } + { VEC_UNARY (ext s i16x8_extend_low_i8x16_s i16x8_extend_low_i8x16_u) } | "i16x8.extend_high_i8x16_"(sign as s) - { SIMD_UNARY (ext s i16x8_extend_high_i8x16_s i16x8_extend_high_i8x16_u) } + { VEC_UNARY (ext s i16x8_extend_high_i8x16_s i16x8_extend_high_i8x16_u) } | "i32x4.extend_low_i16x8_"(sign as s) - { SIMD_UNARY (ext s i32x4_extend_low_i16x8_s i32x4_extend_low_i16x8_u) } + { VEC_UNARY (ext s i32x4_extend_low_i16x8_s i32x4_extend_low_i16x8_u) } | "i32x4.extend_high_i16x8_"(sign as s) - { SIMD_UNARY (ext s i32x4_extend_high_i16x8_s i32x4_extend_high_i16x8_u) } + { VEC_UNARY (ext s i32x4_extend_high_i16x8_s i32x4_extend_high_i16x8_u) } | "i64x2.extend_low_i32x4_"(sign as s) - { SIMD_UNARY (ext s i64x2_extend_low_i32x4_s i64x2_extend_low_i32x4_u) } + { VEC_UNARY (ext s i64x2_extend_low_i32x4_s i64x2_extend_low_i32x4_u) } | "i64x2.extend_high_i32x4_"(sign as s) - { SIMD_UNARY (ext s i64x2_extend_high_i32x4_s i64x2_extend_high_i32x4_u) } + { VEC_UNARY (ext s i64x2_extend_high_i32x4_s i64x2_extend_high_i32x4_u) } | "i16x8.extmul_low_i8x16_"(sign as s) - { SIMD_BINARY (ext s i16x8_extmul_low_i8x16_s i16x8_extmul_low_i8x16_u) } + { VEC_BINARY (ext s i16x8_extmul_low_i8x16_s i16x8_extmul_low_i8x16_u) } | "i16x8.extmul_high_i8x16_"(sign as s) - { SIMD_BINARY (ext s i16x8_extmul_high_i8x16_s i16x8_extmul_high_i8x16_u) } + { VEC_BINARY (ext s i16x8_extmul_high_i8x16_s i16x8_extmul_high_i8x16_u) } | "i32x4.extmul_low_i16x8_"(sign as s) - { SIMD_BINARY (ext s i32x4_extmul_low_i16x8_s i32x4_extmul_low_i16x8_u) } + { VEC_BINARY (ext s i32x4_extmul_low_i16x8_s i32x4_extmul_low_i16x8_u) } | "i32x4.extmul_high_i16x8_"(sign as s) - { SIMD_BINARY (ext s i32x4_extmul_high_i16x8_s i32x4_extmul_high_i16x8_u) } + { VEC_BINARY (ext s i32x4_extmul_high_i16x8_s i32x4_extmul_high_i16x8_u) } | "i64x2.extmul_low_i32x4_"(sign as s) - { SIMD_BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } + { VEC_BINARY (ext s i64x2_extmul_low_i32x4_s i64x2_extmul_low_i32x4_u) } | "i64x2.extmul_high_i32x4_"(sign as s) - { SIMD_BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } + { VEC_BINARY (ext s i64x2_extmul_high_i32x4_s i64x2_extmul_high_i32x4_u) } | "i16x8.q15mulr_sat_s" - { SIMD_BINARY i16x8_q15mulr_sat_s } + { VEC_BINARY i16x8_q15mulr_sat_s } | (v128_int_shape as s)".all_true" - { SIMD_TEST + { VEC_TEST (v128intop s i8x16_all_true i16x8_all_true i32x4_all_true i64x2_all_true) } | (v128_int_shape as s)".bitmask" - { SIMD_BITMASK + { VEC_BITMASK (v128intop s i8x16_bitmask i16x8_bitmask i32x4_bitmask i64x2_bitmask) } | (v128_int_shape as s)".shl" - { SIMD_SHIFT (v128intop s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } + { VEC_SHIFT (v128intop s i8x16_shl i16x8_shl i32x4_shl i64x2_shl) } | (v128_int_shape as s)".shr_s" - { SIMD_SHIFT (v128intop s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } + { VEC_SHIFT (v128intop s i8x16_shr_s i16x8_shr_s i32x4_shr_s i64x2_shr_s) } | (v128_int_shape as s)".shr_u" - { SIMD_SHIFT (v128intop s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } - | "i8x16.shuffle" { SIMD_SHUFFLE } + { VEC_SHIFT (v128intop s i8x16_shr_u i16x8_shr_u i32x4_shr_u i64x2_shr_u) } + | "i8x16.shuffle" { VEC_SHUFFLE } | (v128_shape as s)".splat" - { SIMD_SPLAT (v128op s i8x16_splat i16x8_splat i32x4_splat + { VEC_SPLAT (v128op s i8x16_splat i16x8_splat i32x4_splat i64x2_splat f32x4_splat f64x2_splat) } | (v128_shape as s)".extract_lane" { except ["i8x16"; "i16x8"] s lexbuf; - SIMD_EXTRACT (fun i -> + VEC_EXTRACT (fun i -> v128op s (fun _ -> unreachable) (fun _ -> unreachable) i32x4_extract_lane i64x2_extract_lane f32x4_extract_lane f64x2_extract_lane i) } | (("i8x16"|"i16x8") as t)".extract_lane_"(sign as s) - { SIMD_EXTRACT (fun i -> + { VEC_EXTRACT (fun i -> if t = "i8x16" then ext s i8x16_extract_lane_s i8x16_extract_lane_u i else ext s i16x8_extract_lane_s i16x8_extract_lane_u i )} | (v128_shape as s)".replace_lane" - { SIMD_REPLACE + { VEC_REPLACE (v128op s i8x16_replace_lane i16x8_replace_lane i32x4_replace_lane i64x2_replace_lane f32x4_replace_lane f64x2_replace_lane) } diff --git a/interpreter/text/parser.mly b/interpreter/text/parser.mly index d8afc60222..62799fe5a1 100644 --- a/interpreter/text/parser.mly +++ b/interpreter/text/parser.mly @@ -39,19 +39,19 @@ let ati i = let num f s = try f s with Failure _ -> error s.at "constant out of range" -let simd f shape ss at = +let vec f shape ss at = try f shape ss at with | Failure _ -> error at "constant out of range" | Invalid_argument _ -> error at "wrong number of lane literals" -let simd_lane_nan shape l at = +let vec_lane_nan shape l at = let open Values in match shape with | V128.F32x4 () -> NanPat (F32 l @@ at) | V128.F64x2 () -> NanPat (F64 l @@ at) - | _ -> error at "invalid simd constant" + | _ -> error at "invalid vector constant" -let simd_lane_lit shape l at = +let vec_lane_lit shape l at = let open Values in match shape with | V128.I8x16 () -> NumPat (I32 (I8.of_string l) @@ at) @@ -61,7 +61,7 @@ let simd_lane_lit shape l at = | V128.F32x4 () -> NumPat (F32 (F32.of_string l) @@ at) | V128.F64x2 () -> NumPat (F64 (F64.of_string l) @@ at) -let simd_lane_index s at = +let vec_lane_index s at = match int_of_string s with | n when 0 <= n && n < 256 -> n | _ | exception Failure _ -> error at "malformed lane index" @@ -69,7 +69,7 @@ let simd_lane_index s at = let shuffle_lit ss at = if not (List.length ss = 16) then error at "invalid lane length"; - List.map (fun s -> simd_lane_index s.it s.at) ss + List.map (fun s -> vec_lane_index s.it s.at) ss let nanop f nan = let open Source in @@ -206,7 +206,7 @@ let inline_type_explicit (c : context) x ft at = %token LPAR RPAR %token NAT INT FLOAT STRING VAR -%token NUM_TYPE SIMD_TYPE SIMD_SHAPE FUNCREF EXTERNREF EXTERN MUT +%token NUM_TYPE VEC_TYPE VEC_SHAPE FUNCREF EXTERNREF EXTERN MUT %token UNREACHABLE NOP DROP SELECT %token BLOCK END IF THEN ELSE LOOP BR BR_IF BR_TABLE %token CALL CALL_INDIRECT RETURN @@ -217,10 +217,10 @@ let inline_type_explicit (c : context) x ft at = %token LOAD STORE OFFSET_EQ_NAT ALIGN_EQ_NAT %token CONST UNARY BINARY TEST COMPARE CONVERT %token REF_NULL REF_FUNC REF_EXTERN REF_IS_NULL -%token SIMD_LOAD SIMD_STORE SIMD_LOAD_LANE SIMD_STORE_LANE -%token SIMD_CONST SIMD_UNARY SIMD_BINARY SIMD_TERNARY SIMD_TEST -%token SIMD_SHIFT SIMD_BITMASK SIMD_SHUFFLE -%token SIMD_EXTRACT SIMD_REPLACE +%token VEC_LOAD VEC_STORE VEC_LOAD_LANE VEC_STORE_LANE +%token VEC_CONST VEC_UNARY VEC_BINARY VEC_TERNARY VEC_TEST +%token VEC_SHIFT VEC_BITMASK VEC_SHUFFLE +%token VEC_EXTRACT VEC_REPLACE %token FUNC START TYPE PARAM RESULT LOCAL GLOBAL %token TABLE ELEM MEMORY DATA DECLARE OFFSET ITEM IMPORT EXPORT %token MODULE BIN QUOTE @@ -237,9 +237,9 @@ let inline_type_explicit (c : context) x ft at = %token STRING %token VAR %token NUM_TYPE -%token SIMD_TYPE +%token VEC_TYPE %token Ast.instr' * Values.num> CONST -%token string Source.phrase list -> Source.region -> Ast.instr' * Values.simd> SIMD_CONST +%token string Source.phrase list -> Source.region -> Ast.instr' * Values.vec> VEC_CONST %token UNARY %token BINARY %token TEST @@ -247,22 +247,22 @@ let inline_type_explicit (c : context) x ft at = %token CONVERT %token Memory.offset -> Ast.instr'> LOAD %token Memory.offset -> Ast.instr'> STORE -%token Memory.offset -> Ast.instr'> SIMD_LOAD -%token Memory.offset -> Ast.instr'> SIMD_STORE -%token Memory.offset -> int -> Ast.instr'> SIMD_LOAD_LANE -%token Memory.offset -> int -> Ast.instr'> SIMD_STORE_LANE -%token SIMD_UNARY -%token SIMD_BINARY -%token SIMD_TERNARY -%token SIMD_TEST -%token SIMD_SHIFT -%token SIMD_BITMASK -%token SIMD_SPLAT -%token Ast.instr'> SIMD_EXTRACT -%token Ast.instr'> SIMD_REPLACE +%token Memory.offset -> Ast.instr'> VEC_LOAD +%token Memory.offset -> Ast.instr'> VEC_STORE +%token Memory.offset -> int -> Ast.instr'> VEC_LOAD_LANE +%token Memory.offset -> int -> Ast.instr'> VEC_STORE_LANE +%token VEC_UNARY +%token VEC_BINARY +%token VEC_TERNARY +%token VEC_TEST +%token VEC_SHIFT +%token VEC_BITMASK +%token VEC_SPLAT +%token Ast.instr'> VEC_EXTRACT +%token Ast.instr'> VEC_REPLACE %token OFFSET_EQ_NAT %token ALIGN_EQ_NAT -%token SIMD_SHAPE +%token VEC_SHAPE %token NAN @@ -298,7 +298,7 @@ ref_type : value_type : | NUM_TYPE { NumType $1 } - | SIMD_TYPE { SimdType $1 } + | VEC_TYPE { VecType $1 } | ref_type { RefType $1 } value_type_list : @@ -436,12 +436,12 @@ plain_instr : | ELEM_DROP var { fun c -> elem_drop ($2 c elem) } | LOAD offset_opt align_opt { fun c -> $1 $3 $2 } | STORE offset_opt align_opt { fun c -> $1 $3 $2 } - | SIMD_LOAD offset_opt align_opt { fun c -> $1 $3 $2 } - | SIMD_STORE offset_opt align_opt { fun c -> $1 $3 $2 } - | SIMD_LOAD_LANE offset_opt align_opt NAT - { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } - | SIMD_STORE_LANE offset_opt align_opt NAT - { let at = at () in fun c -> $1 $3 $2 (simd_lane_index $4 at) } + | VEC_LOAD offset_opt align_opt { fun c -> $1 $3 $2 } + | VEC_STORE offset_opt align_opt { fun c -> $1 $3 $2 } + | VEC_LOAD_LANE offset_opt align_opt NAT + { let at = at () in fun c -> $1 $3 $2 (vec_lane_index $4 at) } + | VEC_STORE_LANE offset_opt align_opt NAT + { let at = at () in fun c -> $1 $3 $2 (vec_lane_index $4 at) } | MEMORY_SIZE { fun c -> memory_size } | MEMORY_GROW { fun c -> memory_grow } | MEMORY_FILL { fun c -> memory_fill } @@ -457,17 +457,17 @@ plain_instr : | UNARY { fun c -> $1 } | BINARY { fun c -> $1 } | CONVERT { fun c -> $1 } - | SIMD_CONST SIMD_SHAPE num_list { let at = at () in fun c -> fst (simd $1 $2 $3 at) } - | SIMD_UNARY { fun c -> $1 } - | SIMD_BINARY { fun c -> $1 } - | SIMD_TERNARY { fun c -> $1 } - | SIMD_TEST { fun c -> $1 } - | SIMD_SHIFT { fun c -> $1 } - | SIMD_BITMASK { fun c -> $1 } - | SIMD_SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_lit $2 at) } - | SIMD_SPLAT { fun c -> $1 } - | SIMD_EXTRACT NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } - | SIMD_REPLACE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) } + | VEC_CONST VEC_SHAPE num_list { let at = at () in fun c -> fst (vec $1 $2 $3 at) } + | VEC_UNARY { fun c -> $1 } + | VEC_BINARY { fun c -> $1 } + | VEC_TERNARY { fun c -> $1 } + | VEC_TEST { fun c -> $1 } + | VEC_SHIFT { fun c -> $1 } + | VEC_BITMASK { fun c -> $1 } + | VEC_SHUFFLE num_list { let at = at () in fun c -> i8x16_shuffle (shuffle_lit $2 at) } + | VEC_SPLAT { fun c -> $1 } + | VEC_EXTRACT NAT { let at = at () in fun c -> $1 (vec_lane_index $2 at) } + | VEC_REPLACE NAT { let at = at () in fun c -> $1 (vec_lane_index $2 at) } select_instr : @@ -1121,8 +1121,8 @@ meta : literal_num : | LPAR CONST num RPAR { snd (num $2 $3) } -literal_simd : - | LPAR SIMD_CONST SIMD_SHAPE num_list RPAR { snd (simd $2 $3 $4 (at ())) } +literal_vec : + | LPAR VEC_CONST VEC_SHAPE num_list RPAR { snd (vec $2 $3 $4 (at ())) } literal_ref : | LPAR REF_NULL ref_kind RPAR { Values.NullRef $3 } @@ -1130,7 +1130,7 @@ literal_ref : literal : | literal_num { Values.Num $1 @@ at () } - | literal_simd { Values.Simd $1 @@ at () } + | literal_vec { Values.Vec $1 @@ at () } | literal_ref { Values.Ref $1 @@ at () } literal_list : @@ -1138,8 +1138,8 @@ literal_list : | literal literal_list { $1 :: $2 } numpat : - | num { fun sh -> simd_lane_lit sh $1.it $1.at } - | NAN { fun sh -> simd_lane_nan sh $1 (ati 3) } + | num { fun sh -> vec_lane_lit sh $1.it $1.at } + | NAN { fun sh -> vec_lane_nan sh $1 (ati 3) } numpat_list: | /* empty */ { [] } @@ -1151,10 +1151,10 @@ result : | literal_ref { RefResult (RefPat ($1 @@ at ())) @@ at () } | LPAR REF_FUNC RPAR { RefResult (RefTypePat FuncRefType) @@ at () } | LPAR REF_EXTERN RPAR { RefResult (RefTypePat ExternRefType) @@ at () } - | LPAR SIMD_CONST SIMD_SHAPE numpat_list RPAR { + | LPAR VEC_CONST VEC_SHAPE numpat_list RPAR { if V128.num_lanes $3 <> List.length $4 then error (at ()) "wrong number of lane literals"; - SimdResult (SimdPat (Values.V128 ($3, List.map (fun lit -> lit $3) $4))) @@ at () + VecResult (VecPat (Values.V128 ($3, List.map (fun lit -> lit $3) $4))) @@ at () } result_list : diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index 135c03d55f..c65f86323a 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -111,8 +111,8 @@ let peek i (ell, ts) = (* Type Synthesis *) let type_num = Values.type_of_num -let type_simd = Values.type_of_simd -let type_simd_lane = function +let type_vec = Values.type_of_vec +let type_vec_lane = function | Values.V128 laneop -> V128.type_of_lane laneop let type_cvtop at = function @@ -182,7 +182,7 @@ let check_unop unop at = check_pack sz (num_size (Values.type_of_num unop)) at | _ -> () -let check_simd_binop binop at = +let check_vec_binop binop at = match binop with | Values.(V128 (V128.I8x16 (V128Op.Shuffle is))) -> if List.exists ((<=) 32) is then @@ -241,8 +241,8 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type | Select None -> let t = peek 1 s in - require (match t with None -> true | Some t -> is_num_type t || is_simd_type t) e.at - ("type mismatch: instruction requires numeric or SIMD type" ^ + require (match t with None -> true | Some t -> is_num_type t || is_vec_type t) e.at + ("type mismatch: instruction requires numeric or vector type" ^ " but stack has " ^ string_of_infer_type t); [t; t; Some (NumType I32Type)] -~> [t] @@ -361,25 +361,25 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type check_memop c memop num_size (fun sz -> sz) e.at; [NumType I32Type; NumType memop.ty] --> [] - | SimdLoad memop -> - check_memop c memop simd_size (Lib.Option.map fst) e.at; - [NumType I32Type] --> [SimdType memop.ty] + | VecLoad memop -> + check_memop c memop vec_size (Lib.Option.map fst) e.at; + [NumType I32Type] --> [VecType memop.ty] - | SimdStore memop -> - check_memop c memop simd_size (fun _ -> None) e.at; - [NumType I32Type; SimdType memop.ty] --> [] + | VecStore memop -> + check_memop c memop vec_size (fun _ -> None) e.at; + [NumType I32Type; VecType memop.ty] --> [] - | SimdLoadLane (memop, i) -> - check_memop c memop simd_size (fun sz -> Some sz) e.at; - require (i < simd_size memop.ty / packed_size memop.pack) e.at + | VecLoadLane (memop, i) -> + check_memop c memop vec_size (fun sz -> Some sz) e.at; + require (i < vec_size memop.ty / packed_size memop.pack) e.at "invalid lane index"; - [NumType I32Type; SimdType memop.ty] --> [SimdType memop.ty] + [NumType I32Type; VecType memop.ty] --> [VecType memop.ty] - | SimdStoreLane (memop, i) -> - check_memop c memop simd_size (fun sz -> Some sz) e.at; - require (i < simd_size memop.ty / packed_size memop.pack) e.at + | VecStoreLane (memop, i) -> + check_memop c memop vec_size (fun sz -> Some sz) e.at; + require (i < vec_size memop.ty / packed_size memop.pack) e.at "invalid lane index"; - [NumType I32Type; SimdType memop.ty] --> [] + [NumType I32Type; VecType memop.ty] --> [] | MemorySize -> let _mt = memory c (0l @@ e.at) in @@ -446,62 +446,62 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type let t1, t2 = type_cvtop e.at cvtop in [NumType t1] --> [NumType t2] - | SimdConst v -> - let t = SimdType (type_simd v.it) in + | VecConst v -> + let t = VecType (type_vec v.it) in [] --> [t] - | SimdTest testop -> - let t = SimdType (type_simd testop) in + | VecTest testop -> + let t = VecType (type_vec testop) in [t] --> [NumType I32Type] - | SimdUnary unop -> - let t = SimdType (type_simd unop) in + | VecUnary unop -> + let t = VecType (type_vec unop) in [t] --> [t] - | SimdBinary binop -> - check_simd_binop binop e.at; - let t = SimdType (type_simd binop) in + | VecBinary binop -> + check_vec_binop binop e.at; + let t = VecType (type_vec binop) in [t; t] --> [t] - | SimdTestVec vtestop -> - let t = SimdType (type_simd vtestop) in + | VecTestBits vtestop -> + let t = VecType (type_vec vtestop) in [t] --> [NumType I32Type] - | SimdUnaryVec vunop -> - let t = SimdType (type_simd vunop) in + | VecUnaryBits vunop -> + let t = VecType (type_vec vunop) in [t] --> [t] - | SimdBinaryVec vbinop -> - let t = SimdType (type_simd vbinop) in + | VecBinaryBits vbinop -> + let t = VecType (type_vec vbinop) in [t; t] --> [t] - | SimdTernaryVec vternop -> - let t = SimdType (type_simd vternop) in + | VecTernaryBits vternop -> + let t = VecType (type_vec vternop) in [t; t; t] --> [t] - | SimdShift shiftop -> - let t = SimdType (type_simd shiftop) in - [t; NumType I32Type] --> [SimdType V128Type] + | VecShift shiftop -> + let t = VecType (type_vec shiftop) in + [t; NumType I32Type] --> [VecType V128Type] - | SimdBitmask bitmaskop -> - let t = SimdType (type_simd bitmaskop) in + | VecBitmask bitmaskop -> + let t = VecType (type_vec bitmaskop) in [t] --> [NumType I32Type] - | SimdSplat splatop -> - let t1 = type_simd_lane splatop in - let t2 = SimdType (type_simd splatop) in + | VecSplat splatop -> + let t1 = type_vec_lane splatop in + let t2 = VecType (type_vec splatop) in [NumType t1] --> [t2] - | SimdExtract extractop -> - let t = SimdType (type_simd extractop) in - let t2 = type_simd_lane extractop in + | VecExtract extractop -> + let t = VecType (type_vec extractop) in + let t2 = type_vec_lane extractop in require (lane_extractop extractop < num_lanes extractop) e.at "invalid lane index"; [t] --> [NumType t2] - | SimdReplace replaceop -> - let t = SimdType (type_simd replaceop) in - let t2 = type_simd_lane replaceop in + | VecReplace replaceop -> + let t = VecType (type_vec replaceop) in + let t2 = type_vec_lane replaceop in require (lane_replaceop replaceop < num_lanes replaceop) e.at "invalid lane index"; [t; NumType t2] --> [t] @@ -541,7 +541,7 @@ let check_limits {min; max} range at msg = let check_num_type (t : num_type) at = () -let check_simd_type (t : simd_type) at = +let check_vec_type (t : vec_type) at = () let check_ref_type (t : ref_type) at = @@ -550,7 +550,7 @@ let check_ref_type (t : ref_type) at = let check_value_type (t : value_type) at = match t with | NumType t' -> check_num_type t' at - | SimdType t' -> check_simd_type t' at + | VecType t' -> check_vec_type t' at | RefType t' -> check_ref_type t' at let check_func_type (ft : func_type) at = @@ -603,7 +603,7 @@ let is_const (c : context) (e : instr) = | RefNull _ | RefFunc _ | Const _ - | SimdConst _ -> true + | VecConst _ -> true | GlobalGet x -> let GlobalType (_, mut) = global c x in mut = Immutable | _ -> false From 17c4983b34e18cc14796c48051df7fe676ea7ee2 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 5 Aug 2021 20:21:13 +0200 Subject: [PATCH 362/378] Update README --- interpreter/README.md | 48 +++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/interpreter/README.md b/interpreter/README.md index 8e4ec1de14..943f5c58a8 100644 --- a/interpreter/README.md +++ b/interpreter/README.md @@ -176,11 +176,11 @@ name: $( | | _ | . | + | - | * | / | \ | ^ | ~ | = | < | > | ! string: "( | \n | \t | \\ | \' | \" | \ | \u{+})*" num_type: i32 | i64 | f32 | f64 -simd_type: v128 -simd_shape: i8x16 | i16x8 | i32x4 | i64x2 | f32x4 | f64x2 | v128 +vec_type: v128 +vec_shape: i8x16 | i16x8 | i32x4 | i64x2 | f32x4 | f64x2 | v128 ref_kind: func | extern ref_type: funcref | externref -val_type: | | +val_type: | | block_type : ( result * )* func_type: ( type )? * * global_type: | ( mut ) @@ -199,11 +199,11 @@ offset: offset= align: align=(1|2|4|8|...) cvtop: trunc | extend | wrap | ... -simdunop: abs | neg | ... -simdbinop: add | sub | min_ | ... -simdternop: bitselect -simdtestop: all_true | any_true -simdshiftop: shl | shr_ +vecunop: abs | neg | ... +vecbinop: add | sub | min_ | ... +vecternop: bitselect +vectestop: all_true | any_true +vecshiftop: shl | shr_ expr: ( ) @@ -247,10 +247,10 @@ op: elem.drop .load((8|16|32)_)? ? ? .store(8|16|32)? ? ? - .load((8x8|16x4|32x2)_)? ? ? - .store ? ? - .load(8|16|32|64)_(lane|splat|zero) ? ? - .store(8|16|32|64)_lane ? ? + .load((8x8|16x4|32x2)_)? ? ? + .store ? ? + .load(8|16|32|64)_(lane|splat|zero) ? ? + .store(8|16|32|64)_lane ? ? memory.size memory.grow memory.fill @@ -266,16 +266,16 @@ op: . . ._(_)? - .const + - . - . - . - . - . - .bitmask - .splat - .extract_lane(_)? - .replace_lane + .const + + . + . + . + . + . + .bitmask + .splat + .extract_lane(_)? + .replace_lane func: ( func ? * * ) ( func ? ( export ) <...> ) ;; = (export (func )) (func ? <...>) @@ -375,7 +375,7 @@ action: const: ( .const ) ;; number value - ( + ) ;; simd value + ( + ) ;; vector value ( ref.null ) ;; null reference ( ref.extern ) ;; host reference @@ -391,7 +391,7 @@ assertion: result: ( .const ) - ( .const + ) + ( .const + ) ( ref.extern ) ( ref.func ) From f6c9635793b04951f26c07214b641d3398d2be48 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 5 Aug 2021 20:18:56 +0200 Subject: [PATCH 363/378] Bring spec and interpreter closer together --- .../core/appendix/gen-index-instructions.py | 42 +- document/core/appendix/index-instructions.rst | 1036 ++++++++--------- document/core/appendix/index-types.rst | 4 +- document/core/binary/types.rst | 17 +- document/core/exec/instructions.rst | 81 +- document/core/syntax/instructions.rst | 105 +- document/core/syntax/types.rst | 43 +- document/core/text/types.rst | 22 +- document/core/util/macros.def | 9 +- document/core/valid/instructions.rst | 118 +- interpreter/README.md | 4 + interpreter/binary/encode.ml | 177 +-- interpreter/exec/eval.ml | 24 +- interpreter/exec/eval_vec.ml | 200 ++-- interpreter/exec/eval_vec.mli | 6 +- interpreter/script/js.ml | 2 +- interpreter/syntax/ast.ml | 49 +- interpreter/syntax/free.ml | 4 +- interpreter/syntax/operators.ml | 148 +-- interpreter/text/arrange.ml | 85 +- interpreter/valid/valid.ml | 24 +- 21 files changed, 1139 insertions(+), 1061 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 8b0e32e404..0e6f358f30 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -422,7 +422,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\V128.\VOR', r'\hex{FD}~~\hex{50}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), Instruction(r'\V128.\VXOR', r'\hex{FD}~~\hex{51}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~\hex{52}', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), - Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~\hex{53}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~\hex{53}', r'[\V128] \to [\I32]', r'valid-vstestop', r'exec-vstestop'), Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{54}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{55}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{56}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), @@ -438,7 +438,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VABS', r'\hex{FD}~~\hex{60}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~\hex{61}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~\hex{62}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), - Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~\hex{63}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~\hex{63}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~\hex{64}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~\hex{65}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~\hex{66}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), @@ -463,14 +463,14 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~\hex{79}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\F64X2.\VTRUNC', r'\hex{FD}~~\hex{7A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~\hex{7B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~\hex{7C}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~\hex{7D}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~\hex{7E}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~\hex{7F}', r'[\V128] \to [\V128]', r'valid-simd-extaddpairwise', r'exec-simd-extaddpairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~\hex{7C}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~\hex{7D}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~\hex{7E}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~\hex{7F}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), Instruction(r'\I16X8.\VABS', r'\hex{FD}~~\hex{80}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~\hex{81}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~\hex{82}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), - Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~\hex{83}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~\hex{83}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~\hex{84}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~\hex{85}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~\hex{86}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), @@ -494,13 +494,13 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~\hex{98}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~\hex{99}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~\hex{9B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{9C}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{9D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{9E}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{9F}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{9C}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{9D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{9E}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{9F}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~\hex{A0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~\hex{A1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~\hex{A3}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~\hex{A3}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~\hex{A4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{A7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{A8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -517,13 +517,13 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~\hex{B8}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~\hex{B9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~\hex{BA}', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{BC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{BD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{BE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{BF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{BC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{BD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{BE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{BF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), Instruction(r'\I64X2.\VABS', r'\hex{FD}~~\hex{C0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~\hex{C1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), - Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~\hex{C3}', r'[\V128] \to [\I32]', r'valid-vitestop', r'exec-vitestop'), + Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~\hex{C3}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~\hex{C4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{C7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{C8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -541,10 +541,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~\hex{D9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~\hex{DA}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~\hex{DB}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{DC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{DD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{DE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{DF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-vextmul', r'exec-simd-vextmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{DC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{DD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{DE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{DF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~\hex{E0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~\hex{E1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~\hex{E3}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 1ff8867f30..c3d6fb76a3 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,521 +6,521 @@ Index of Instructions --------------------- -================================================= ========================== ============================================= ============================================= ================================================================== -Instruction Binary Opcode Type Validation Execution -================================================= ========================== ============================================= ============================================= ================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\SELECT~t` :math:`\hex{1C}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGET~x` :math:`\hex{25}` :math:`[\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\TABLESET~x` :math:`\hex{26}` :math:`[\I32~t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{05}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{06}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{07}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\MEMORYINIT~x` :math:`\hex{FC}~\hex{08}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\DATADROP~x` :math:`\hex{FC}~\hex{09}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYCOPY` :math:`\hex{FC}~\hex{0A}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYFILL` :math:`\hex{FC}~\hex{0B}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEINIT~x~y` :math:`\hex{FC}~\hex{0C}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~\hex{00}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~\hex{0E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~\hex{0F}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~\hex{10}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~\hex{11}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~\hex{12}` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~\hex{13}` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~\hex{14}` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{15}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{16}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{17}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{18}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{19}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1A}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1B}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1D}` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1E}` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1F}` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{20}` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{21}` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{22}` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~\hex{23}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~\hex{24}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{25}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{26}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{27}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{28}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{29}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{2A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{2B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{2C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~\hex{2D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~\hex{2E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{2F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{30}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{31}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{32}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{33}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{34}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{35}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{36}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~\hex{37}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~\hex{38}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{39}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{3A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{3B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{3C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{3D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{3E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{3F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{40}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~\hex{41}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~\hex{42}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~\hex{43}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~\hex{44}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~\hex{45}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~\hex{46}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~\hex{47}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~\hex{48}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~\hex{49}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{57}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{58}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{59}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5A}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5B}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5C}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5D}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~\hex{5E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~\hex{5F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~\hex{60}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~\hex{61}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~\hex{62}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~\hex{63}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~\hex{64}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{65}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{66}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~\hex{67}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~\hex{71}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{72}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{73}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~\hex{74}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~\hex{75}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{76}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{77}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{78}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{79}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~\hex{7A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{7B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~\hex{7C}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~\hex{7D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{7E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{7F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~\hex{80}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~\hex{81}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~\hex{82}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~\hex{83}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~\hex{84}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{85}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{86}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{87}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~\hex{91}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{92}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{93}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~\hex{94}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~\hex{95}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{96}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{97}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{98}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{99}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{9B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{9C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{9D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{9E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{9F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~\hex{A0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~\hex{A1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~\hex{A3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~\hex{A4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{A7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{B6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{B7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{B8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{B9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{BA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{BC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{BD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{BE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{BF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~\hex{C0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~\hex{C1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~\hex{C3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~\hex{C4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{C7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~\hex{D6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~\hex{D7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{D8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{D9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{DA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{DB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{DC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{DD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{DE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{DF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~\hex{E0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~\hex{E1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~\hex{E3}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~\hex{E4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~\hex{E5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~\hex{E6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~\hex{E7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMIN` :math:`\hex{FD}~~\hex{E8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMAX` :math:`\hex{FD}~~\hex{E9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~\hex{EA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~\hex{EB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VABS` :math:`\hex{FD}~~\hex{EC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEG` :math:`\hex{FD}~~\hex{ED}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~\hex{EF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VADD` :math:`\hex{FD}~~\hex{F0}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~\hex{F1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~\hex{F2}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~\hex{F3}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~\hex{F4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~\hex{F5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~\hex{F6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{FF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -================================================= ========================== ============================================= ============================================= ================================================================== +================================================= ========================== ============================================= ============================================== ================================================================== +Instruction Binary Opcode Type Validation Execution +================================================= ========================== ============================================= ============================================== ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` +:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\SELECT~t` :math:`\hex{1C}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{1D}` +(reserved) :math:`\hex{1E}` +(reserved) :math:`\hex{1F}` +:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEGET~x` :math:`\hex{25}` :math:`[\I32] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\TABLESET~x` :math:`\hex{26}` :math:`[\I32~t] \to []` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{27}` +:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` 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+:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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` :ref:`execution ` +:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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+:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~\hex{0E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~\hex{0F}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~\hex{10}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~\hex{11}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~\hex{12}` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~\hex{13}` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~\hex{14}` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{15}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{16}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{17}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{18}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{19}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1A}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1B}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1D}` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1E}` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1F}` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{20}` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` 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:math:`\hex{FD}~~\hex{28}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{29}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{2A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{2B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{2C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~\hex{2D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~\hex{2E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{2F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{30}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{31}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{32}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{33}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{34}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{35}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{36}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~\hex{37}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~\hex{38}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{39}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{3A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{3B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{3C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{3D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{3E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{3F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{40}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~\hex{41}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~\hex{42}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~\hex{43}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~\hex{44}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~\hex{45}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~\hex{46}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~\hex{47}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~\hex{48}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~\hex{49}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{57}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{58}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{59}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5A}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5B}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5C}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5D}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~\hex{5E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~\hex{5F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~\hex{60}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~\hex{61}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~\hex{62}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~\hex{63}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~\hex{64}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{65}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{66}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~\hex{67}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~\hex{71}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{72}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{73}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~\hex{74}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~\hex{75}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{76}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{77}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{78}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{79}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~\hex{7A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{7B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~\hex{7C}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~\hex{7D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{7E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{7F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~\hex{80}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~\hex{81}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~\hex{82}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~\hex{83}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~\hex{84}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{85}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{86}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{87}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~\hex{91}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{92}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{93}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~\hex{94}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~\hex{95}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{96}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{97}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{98}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{99}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{9B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{9C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{9D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{9E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{9F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~\hex{A0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~\hex{A1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~\hex{A3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~\hex{A4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{A7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{B6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{B7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{B8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{B9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{BA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{BC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{BD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{BE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{BF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~\hex{C0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~\hex{C1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~\hex{C3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~\hex{C4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{C7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~\hex{D6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~\hex{D7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{D8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{D9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{DA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{DB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{DC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{DD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{DE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{DF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~\hex{E0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~\hex{E1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~\hex{E3}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~\hex{E4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~\hex{E5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~\hex{E6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~\hex{E7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~\hex{E8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~\hex{E9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~\hex{EA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~\hex{EB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~\hex{EC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~\hex{ED}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~\hex{EF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~\hex{F0}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~\hex{F1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~\hex{F2}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~\hex{F3}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~\hex{F4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~\hex{F5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~\hex{F6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{FF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +================================================= ========================== ============================================= ============================================== ================================================================== diff --git a/document/core/appendix/index-types.rst b/document/core/appendix/index-types.rst index 73312cb1c1..a94bbd6f4e 100644 --- a/document/core/appendix/index-types.rst +++ b/document/core/appendix/index-types.rst @@ -12,8 +12,8 @@ Category Constructor :ref:`Number type ` |I64| :math:`\hex{7E}` (-2 as |Bs7|) :ref:`Number type ` |F32| :math:`\hex{7D}` (-3 as |Bs7|) :ref:`Number type ` |F64| :math:`\hex{7C}` (-4 as |Bs7|) -:ref:`Number type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) -(reserved) :math:`\hex{7B}` .. :math:`\hex{71}` +:ref:`Number type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) +(reserved) :math:`\hex{7A}` .. :math:`\hex{71}` :ref:`Reference type ` |FUNCREF| :math:`\hex{70}` (-16 as |Bs7|) :ref:`Reference type ` |EXTERNREF| :math:`\hex{6F}` (-17 as |Bs7|) (reserved) :math:`\hex{6E}` .. :math:`\hex{61}` diff --git a/document/core/binary/types.rst b/document/core/binary/types.rst index 68537823e1..6785de8633 100644 --- a/document/core/binary/types.rst +++ b/document/core/binary/types.rst @@ -25,7 +25,22 @@ Number Types \hex{7F} &\Rightarrow& \I32 \\ &&|& \hex{7E} &\Rightarrow& \I64 \\ &&|& \hex{7D} &\Rightarrow& \F32 \\ &&|& - \hex{7C} &\Rightarrow& \F64 \\ &&|& + \hex{7C} &\Rightarrow& \F64 \\ + \end{array} + + +.. index:: SIMD type + pair: binary format; SIMD type +.. _binary-simdtype: + +SIMD Types +~~~~~~~~~~ + +:ref:`SIMD types ` are also encoded by a single byte. + +.. math:: + \begin{array}{llclll@{\qquad\qquad}l} + \production{SIMD type} & \Bsimdtype &::=& \hex{7B} &\Rightarrow& \V128 \\ \end{array} diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index c7aca505e8..8e7bbd254b 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -253,9 +253,9 @@ Reference Instructions .. _exec-instr-simd: SIMD Instructions -~~~~~~~~~~~~~~~~~~~~ +~~~~~~~~~~~~~~~~~ -SIMD instructions are defined in terms of generic numeric operators applied lane-wise based on the :ref:`shape `. +Most SIMD instructions are defined in terms of generic numeric operators applied lane-wise based on the :ref:`shape `. .. math:: \begin{array}{lll@{\qquad}l} @@ -349,12 +349,13 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} +.. _exec-vstestop: .. _exec-simd-any_true: :math:`\V128\K{.}\ANYTRUE` -........................... +.......................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -647,13 +648,13 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-vitestop: +.. _exec-vtestop: .. _exec-simd-all_true: :math:`\shape\K{.}\ALLTRUE` ........................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -682,7 +683,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane :math:`t\K{x}N\K{.}\BITMASK` ............................ -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -711,7 +712,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 1. Assert: due to :ref:`syntax `, :math:`N = 2\cdot M`. -2. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. +2. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. 3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -766,8 +767,8 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -:math:`t_2\K{x}N\K{.}\vcvtop\K{\_low\_}t_1\K{x}M\K{\_}\sx^?` and :math:`t_2\K{x}N\K{.}\vcvtop\K{\_high\_}t_1\K{x}M\K{\_}\sx^?` -.............................................................................................................................. +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^?` +.................................................................. 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. @@ -786,23 +787,19 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 6. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: - \begin{array}{l} - \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_low\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ - \end{array} - \\ \qquad - \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[0 \slice N])) - \end{array} - \\[1ex] \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_high\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[N \slice N])) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[\side(0, N) \slice N])) \end{array} - \end{array} + +where: + +.. math:: + \K{low}(x, y) = x + \K{high}(x, y) = y :math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero}` @@ -835,7 +832,7 @@ SIMD instructions are defined in terms of generic numeric operators applied lane :math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` .................................... -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -863,18 +860,18 @@ SIMD instructions are defined in terms of generic numeric operators applied lane \end{array} -.. _exec-simd-vextmul: +.. _exec-simd-extmul: -:math:`t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx` and :math:`t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx` -.................................................................................................................. +:math:`t_2\K{x}N\K{.}\EXTMUL\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx` +................................................................ -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. 3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -4. If :math:`\K{low}` is part of the instruction, then: +4. If :math:`\side` is :math:`\K{low}`, then: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. @@ -891,35 +888,29 @@ SIMD instructions are defined in terms of generic numeric operators applied lane 8. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: - \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\_\K{low}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\K{\_}\side\K{\_}t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[0 \slice N] \\ - \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[0 \slice N] \\ + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[\side(0, N) \slice N] \\ + \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[\side(0, N) \slice N] \\ \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast))) \end{array} - \\[1ex] - \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\_\K{high}\_t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ - \end{array} - \\ \qquad - \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[N \slice N] \\ - \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[N \slice N] \\ - \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast))) - \end{array} - \end{array} + +where: + +.. math:: + \K{low}(x, y) = x + \K{high}(x, y) = y -.. _exec-simd-extaddpairwise: +.. _exec-simd-extadd_pairwise: :math:`t_2\K{x}N\K{.}\EXTADDPAIRWISE\_t_1\K{x}M\_\sx` ..................................................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index c5a75d07c2..899131a0c7 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -171,34 +171,11 @@ Occasionally, it is convenient to group operators together according to the foll \end{array} -.. index:: ! reference instruction, reference, null - pair: abstract syntax; instruction -.. _syntax-ref.null: -.. _syntax-ref.is_null: -.. _syntax-ref.func: -.. _syntax-instr-ref: - -Reference Instructions -~~~~~~~~~~~~~~~~~~~~~~ - -Instructions in this group are concerned with accessing :ref:`references `. - -.. math:: - \begin{array}{llcl} - \production{instruction} & \instr &::=& - \dots \\&&|& - \REFNULL~\reftype \\&&|& - \REFISNULL \\&&|& - \REFFUNC~\funcidx \\ - \end{array} - -These instruction produce a null value, check for a null value, or produce a reference to a given function, respectively. - - -.. index:: ! simd instruction, fixed-width simd, value, value type +.. index:: ! SIMD instruction, fixed-width SIMD, number, value, value type pair: abstract syntax; instruction .. _syntax-laneidx: .. _syntax-shape: +.. _syntax-side: .. _syntax-vternop: .. _syntax-vsunop: .. _syntax-vsbinop: @@ -228,6 +205,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{f32x4} ~|~ \K{f64x2} \\ \production{shape} & \shape &::=& \ishape ~|~ \fshape \\ + \production{side} & \side &::=& + \K{low} ~|~ \K{high} \\ \production{lane index} & \laneidx &::=& \u8 \\ \production{instruction} & \instr &::=& \dots \\&&|& @@ -235,7 +214,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{v128.}\vsunop \\&&|& \K{v128.}\vsbinop \\&&|& \K{v128.}\vsternop \\&&|& - \K{v128.}\ANYTRUE \\&&|& + \K{v128.}\vstestop \\&&|& \K{i8x16.}\SHUFFLE~\laneidx^{16} \\&&|& \K{i8x16.}\SWIZZLE \\&&|& \shape\K{.}\SPLAT \\&&|& @@ -249,16 +228,13 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8}\K{.}\virelop ~|~ \K{i32x4}\K{.}\virelop \\&&|& \K{i64x2.}\K{eq} ~|~ - \K{i64x2.}\K{ne} \\&&|& + \K{i64x2.}\K{ne} ~|~ \K{i64x2.}\K{lt\_s} ~|~ \K{i64x2.}\K{gt\_s} ~|~ \K{i64x2.}\K{le\_s} ~|~ \K{i64x2.}\K{ge\_s} \\&&|& \fshape\K{.}\vfrelop \\&&|& - \K{i8x16.}\viunop ~|~ - \K{i16x8.}\viunop ~|~ - \K{i32x4.}\viunop ~|~ - \K{i64x2.}\viunop \\&&|& + \ishape\K{.}\viunop ~|~ \K{i8x16.}\VPOPCNT \\&&|& \K{i16x8.}\Q15MULRSAT\K{\_s} \\ &&|& \K{i32x4.}\DOT\K{\_i16x8\_s} \\ &&|& @@ -267,12 +243,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \ishape\K{.}\BITMASK \\ &&|& \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& - \K{i16x8.}\VEXTEND\K{\_low}\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\VEXTEND\K{\_low}\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\VEXTEND\K{\_low}\K{\_i32x4\_}\sx \\&&|& - \K{i16x8.}\VEXTEND\K{\_high}\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\VEXTEND\K{\_high}\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\VEXTEND\K{\_high}\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\VEXTEND\K{\_}\side^?\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\VEXTEND\K{\_}\side^?\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\VEXTEND\K{\_}\side^?\K{\_i32x4\_}\sx \\&&|& \ishape\K{.}\vshiftop \\&&|& \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ @@ -285,18 +258,18 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i64x2.}\K{mul} \\&&|& \K{i8x16.}\AVGR\K{\_u} ~|~ \K{i16x8.}\AVGR\K{\_u} \\&&|& - \K{i16x8.}\EXTMUL\K{\_low}\K{\_i8x16\_}\sx ~|~ - \K{i16x8.}\EXTMUL\K{\_high}\K{\_i8x16\_}\sx \\&&|& - \K{i32x4.}\EXTMUL\K{\_low}\K{\_i16x8\_}\sx ~|~ - \K{i32x4.}\EXTMUL\K{\_high}\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\EXTMUL\K{\_low}\K{\_i32x4\_}\sx ~|~ - \K{i64x2.}\EXTMUL\K{\_high}\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\EXTMUL\K{\_}\side^?\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\EXTMUL\K{\_}\side^?\K{\_i16x8\_}\sx ~|~ + \K{i64x2.}\EXTMUL\K{\_}\side^?\K{\_i32x4\_}\sx ~|~ \K{i16x8.}\EXTADDPAIRWISE\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\EXTADDPAIRWISE\K{\_i16x8\_}\sx \\ &&|& \fshape\K{.}\vfbinop \\&&|& - \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx ~|~ \K{i32x4.}\VTRUNC\K{\_sat\_f64x2\_}\sx\K{\_zero} \\&&|& - \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx ~|~ \K{f32x4.}\VDEMOTE\K{\_f64x2\_zero} \\&&|& - \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& + \K{i32x4.}\VTRUNC\K{\_sat\_f32x4\_}\sx ~|~ + \K{i32x4.}\VTRUNC\K{\_sat\_f64x2\_}\sx\K{\_zero} \\&&|& + \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx ~|~ + \K{f32x4.}\VDEMOTE\K{\_f64x2\_zero} \\&&|& + \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ + \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ \production{SIMD unary operator} & \vsunop &::=& \K{not} \\ @@ -307,6 +280,8 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{xor} \\ \production{SIMD ternary operator} & \vsternop &::=& \K{bitselect} \\ + \production{SIMD test operator} & \vstestop &::=& + \K{any\_true} \\ \production{SIMD test operator} & \vitestop &::=& \K{all\_true} \\ \production{SIMD integer relational operator} & \virelop &::=& @@ -363,7 +338,7 @@ SIMD instructions provide basic operations over :ref:`values ` of SIMD instructions have a naming convention involving a prefix that determines how their operands will be interpreted. This prefix describes the *shape* of the operand, -written :math:`t\K{x}N`, and consisting of a packed numeric type :math:`t` and the number of *lanes* :math:`N` of that type. +written :math:`t\K{x}N`, and consisting of a packed :ref:`numeric type ` :math:`t` and the number of *lanes* :math:`N` of that type. Operations are performed point-wise on the values of each lane. .. note:: @@ -400,8 +375,8 @@ For the other SIMD instructions, the use of two's complement for the signed inte .. _syntax-vunop: .. _syntax-vbinop: .. _syntax-vrelop: +.. _syntax-vtestop: .. _syntax-vcvtop: -.. _syntax-vextmul: Conventions ........... @@ -417,24 +392,46 @@ Occasionally, it is convenient to group operators together according to the foll \production{binary operator} & \vbinop &::=& \vibinop ~|~ \vfbinop \\&&|& \viminmaxop ~|~ \visatbinop \\&&|& - \SWIZZLE ~|~ \VMUL ~|~ \AVGR\K{\_u} ~|~ \Q15MULRSAT\K{\_s} \\ - \production{simd relational operator} & \vrelop &::=& + \production{test operator} & \vtestop &::=& + \vitestop \\ + \production{relational operator} & \vrelop &::=& \virelop ~|~ \vfrelop \\ \production{conversion operator} & \vcvtop &::=& - \VTRUNC\K{\_sat} ~|~ \VEXTEND ~|~ + \VTRUNC\K{\_sat} ~|~ \VCONVERT ~|~ \VDEMOTE ~|~ \VPROMOTE \\ - \production{extmul operator} & \vextmul &::=& - \EXTMUL\K{\_low} ~|~ - \EXTMUL\K{\_high} \\ \end{array} +.. index:: ! reference instruction, reference, null + pair: abstract syntax; instruction +.. _syntax-ref.null: +.. _syntax-ref.is_null: +.. _syntax-ref.func: +.. _syntax-instr-ref: + +Reference Instructions +~~~~~~~~~~~~~~~~~~~~~~ + +Instructions in this group are concerned with accessing :ref:`references `. + +.. math:: + \begin{array}{llcl} + \production{instruction} & \instr &::=& + \dots \\&&|& + \REFNULL~\reftype \\&&|& + \REFISNULL \\&&|& + \REFFUNC~\funcidx \\ + \end{array} + +These instruction produce a null value, check for a null value, or produce a reference to a given function, respectively. + + .. index:: ! parametric instruction, value type pair: abstract syntax; instruction .. _syntax-instr-parametric: diff --git a/document/core/syntax/types.rst b/document/core/syntax/types.rst index 177b6e23f2..307f132330 100644 --- a/document/core/syntax/types.rst +++ b/document/core/syntax/types.rst @@ -22,7 +22,7 @@ Number Types .. math:: \begin{array}{llll} \production{number type} & \numtype &::=& - \I32 ~|~ \I64 ~|~ \F32 ~|~ \F64 ~|~ \V128 \\ + \I32 ~|~ \I64 ~|~ \F32 ~|~ \F64 \\ \end{array} The types |I32| and |I64| classify 32 and 64 bit integers, respectively. @@ -31,18 +31,45 @@ Integers are not inherently signed or unsigned, their interpretation is determin The types |F32| and |F64| classify 32 and 64 bit floating-point data, respectively. They correspond to the respective binary floating-point representations, also known as *single* and *double* precision, as defined by the |IEEE754|_ standard (Section 3.3). +Number types are *transparent*, meaning that their bit patterns can be observed. +Values of number type can be stored in :ref:`memories `. + +.. _bitwidth: + +Conventions +........... + +* The notation :math:`|t|` denotes the *bit width* of a number type :math:`t`. + That is, :math:`|\I32| = |\F32| = 32` and :math:`|\I64| = |\F64| = 64`. + + +.. index:: ! SIMD type, integer, floating-point, IEEE 754, bit width, memory + pair: abstract syntax; number type + pair: number; type +.. _syntax-simdtype: + +SIMD Types +~~~~~~~~~~ + +*SIMD types* classify vectors of :ref:`numeric ` values processed by SIMD instructions (single instruction multiple data). + +.. math:: + \begin{array}{llll} + \production{SIMD type} & \simdtype &::=& + \V128 \\ + \end{array} + The type |V128| corresponds to a 128 bit vector of packed integer or floating-point data. The packed data can be interpreted as signed or unsigned integers, single or double precision floating-point values, or a single 128 bit type. The interpretation is determined by individual operations. -Number types are *transparent*, meaning that their bit patterns can be observed. -Values of number type can be stored in :ref:`memories `. +SIMD types, like :ref:`number types ` are *transparent*, meaning that their bit patterns can be observed. +Values of SIMD type can be stored in :ref:`memories `. Conventions ........... -* The notation :math:`|t|` denotes the *bit width* of a number type :math:`t`. - That is, :math:`|\I32| = |\F32| = 32` and :math:`|\I64| = |\F64| = 64`, and :math:`|\V128| = 128`. +* The notation :math:`|t|` for :ref:`bit width ` extends to SIMD types as well, that is, :math:`|\V128| = 128`. .. index:: ! reference type, reference, table, function, function type, null @@ -69,7 +96,7 @@ Reference types are *opaque*, meaning that neither their size nor their bit patt Values of reference type can be stored in :ref:`tables `. -.. index:: ! value type, number type, reference type +.. index:: ! value type, number type, SIMD type, reference type pair: abstract syntax; value type pair: value; type .. _syntax-valtype: @@ -78,12 +105,12 @@ Value Types ~~~~~~~~~~~ *Value types* classify the individual values that WebAssembly code can compute with and the values that a variable accepts. -They are either :ref:`number types ` or :ref:`reference types `. +They are either :ref:`number types `, :ref:`SIMD types `, or :ref:`reference types `. .. math:: \begin{array}{llll} \production{value type} & \valtype &::=& - \numtype ~|~ \reftype \\ + \numtype ~|~ \simdtype ~|~ \reftype \\ \end{array} Conventions diff --git a/document/core/text/types.rst b/document/core/text/types.rst index 012fa4aa9b..ee1527f627 100644 --- a/document/core/text/types.rst +++ b/document/core/text/types.rst @@ -22,6 +22,20 @@ Number Types \end{array} +.. index:: SIMD type + pair: text format; SIMD type +.. _text-simdtype: + +SIMD Types +~~~~~~~~~~ + +.. math:: + \begin{array}{llcll@{\qquad\qquad}l} + \production{SIMD type} & \Tsimdtype &::=& + \text{v128} &\Rightarrow& \V128 \\ + \end{array} + + .. index:: reference type pair: text format; reference type .. _text-reftype: @@ -41,7 +55,7 @@ Reference Types \end{array} -.. index:: value type, number type, reference type +.. index:: value type, number type, SIMD type, reference type pair: text format; value type .. _text-valtype: @@ -51,12 +65,8 @@ Value Types .. math:: \begin{array}{llcll@{\qquad\qquad}l} \production{value type} & \Tvaltype &::=& - \text{i32} &\Rightarrow& \I32 \\ &&|& - \text{i64} &\Rightarrow& \I64 \\ &&|& - \text{f32} &\Rightarrow& \F32 \\ &&|& - \text{f64} &\Rightarrow& \F64 \\ &&|& - \text{v128} &\Rightarrow& \V128 \\ &&|& t{:}\Tnumtype &\Rightarrow& t \\ &&|& + t{:}\Tsimdtype &\Rightarrow& t \\ &&|& t{:}\Treftype &\Rightarrow& t \\ \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index ec6c8dc80a..cfba1b0cd8 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -206,6 +206,7 @@ .. Types, non-terminals .. |numtype| mathdef:: \xref{syntax/types}{syntax-numtype}{\X{numtype}} +.. |simdtype| mathdef:: \xref{syntax/types}{syntax-simdtype}{\X{simdtype}} .. |reftype| mathdef:: \xref{syntax/types}{syntax-reftype}{\X{reftype}} .. |valtype| mathdef:: \xref{syntax/types}{syntax-valtype}{\X{valtype}} .. |resulttype| mathdef:: \xref{syntax/types}{syntax-resulttype}{\X{resulttype}} @@ -518,7 +519,7 @@ .. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} .. |vsbinop| mathdef:: \xref{syntax/instructions}{syntax-vsbinop}{\X{vsbinop}} .. |vsternop| mathdef:: \xref{syntax/instructions}{syntax-vsternop}{\X{vsternop}} -.. |vitestop| mathdef:: \xref{syntax/instructions}{syntax-vitestop}{\X{vitestop}} +.. |vstestop| mathdef:: \xref{syntax/instructions}{syntax-vstestop}{\X{vstestop}} .. |vshiftop| mathdef:: \xref{syntax/instructions}{syntax-vshiftop}{\X{vshiftop}} .. |viunop| mathdef:: \xref{syntax/instructions}{syntax-viunop}{\X{viunop}} .. |vibinop| mathdef:: \xref{syntax/instructions}{syntax-vibinop}{\X{vibinop}} @@ -528,8 +529,11 @@ .. |vfbinop| mathdef:: \xref{syntax/instructions}{syntax-vfbinop}{\X{vfbinop}} .. |virelop| mathdef:: \xref{syntax/instructions}{syntax-virelop}{\X{virelop}} .. |vfrelop| mathdef:: \xref{syntax/instructions}{syntax-vfrelop}{\X{vfrelop}} +.. |vitestop| mathdef:: \xref{syntax/instructions}{syntax-vitestop}{\X{vitestop}} +.. |vtestop| mathdef:: \xref{syntax/instructions}{syntax-vtestop}{\X{vtestop}} .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} +.. |side| mathdef:: \xref{syntax/instructions}{syntax-side}{\X{side}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} .. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}} @@ -589,6 +593,7 @@ .. Types, non-terminals .. |Bnumtype| mathdef:: \xref{binary/types}{binary-numtype}{\B{numtype}} +.. |Bsimdtype| mathdef:: \xref{binary/types}{binary-simdtype}{\B{simdtype}} .. |Breftype| mathdef:: \xref{binary/types}{binary-reftype}{\B{reftype}} .. |Bvaltype| mathdef:: \xref{binary/types}{binary-valtype}{\B{valtype}} .. |Bresulttype| mathdef:: \xref{binary/types}{binary-resulttype}{\B{resulttype}} @@ -755,6 +760,7 @@ .. Types, non-terminals .. |Tnumtype| mathdef:: \xref{text/types}{text-numtype}{\T{numtype}} +.. |Tsimdtype| mathdef:: \xref{text/types}{text-simdtype}{\T{simdtype}} .. |Treftype| mathdef:: \xref{text/types}{text-reftype}{\T{reftype}} .. |Theaptype| mathdef:: \xref{text/types}{text-heaptype}{\T{heaptype}} .. |Tvaltype| mathdef:: \xref{text/types}{text-valtype}{\T{valtype}} @@ -1064,6 +1070,7 @@ .. Values & Results, non-terminals .. |num| mathdef:: \xref{exec/runtime}{syntax-num}{\X{num}} +.. |simd| mathdef:: \xref{exec/runtime}{syntax-simd}{\X{simd}} .. |reff| mathdef:: \xref{exec/runtime}{syntax-ref}{\X{ref}} .. |val| mathdef:: \xref{exec/runtime}{syntax-val}{\X{val}} .. |result| mathdef:: \xref{exec/runtime}{syntax-result}{\X{result}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index e830b0dc88..3c5e7519ba 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -334,17 +334,31 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-any-true: +.. _valid-vstestop: -:math:`\V128\K{.}\ANYTRUE` -............................ +:math:`\V128\K{.}\vstestop` +........................... * The instruction is valid with type :math:`[\V128] \to [\I32]`. .. math:: \frac{ }{ - C \vdashinstr \V128\K{.}\ANYTRUE : [\V128] \to [\I32] + C \vdashinstr \V128\K{.}\vstestop : [\V128] \to [\I32] + } + + +.. _valid-simd-swizzle: + +:math:`\K{i8x16.}\SWIZZLE` +.......................... + +* The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. + +.. math:: + \frac{ + }{ + C \vdashinstr \K{i8x16.}\SWIZZLE : [\V128~\V128] \to [\V128] } @@ -459,20 +473,6 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vternop: - -:math:`\shape\K{.}\vternop` -........................... - -* The instruction is valid with type :math:`[\V128~\V128~\V128] \to [\V128]`. - -.. math:: - \frac{ - }{ - C \vdashinstr \shape\K{.}\vternop : [\V128~\V128~\V128] \to [\V128] - } - - .. _valid-vshiftop: :math:`\ishape\K{.}\vshiftop` @@ -487,81 +487,45 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vitestop: +.. _valid-vtestop: -:math:`\shape\K{.}\vitestop` -............................ +:math:`\shape\K{.}\vtestop` +........................... * The instruction is valid with type :math:`[\V128] \to [\I32]`. .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\vitestop : [\V128] \to [\I32] + C \vdashinstr \shape\K{.}\vtestop : [\V128] \to [\I32] } .. _valid-vcvtop: -:math:`\shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx` -............................................... - -* The instruction is valid with type :math:`[\V128] \to [\V128]`. - -.. math:: - \frac{ - }{ - C \vdashinstr \shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] - } - - -:math:`\shape\K{.}\vcvtop\K{\_low\_}\shape\K{\_}\sx^?` -...................................................... - -* The instruction is valid with type :math:`[\V128] \to [\V128]`. - -.. math:: - \frac{ - }{ - C \vdashinstr \shape\K{.}\vcvtop\K{\_low\_}\shape\K{\_}\sx : [\V128] \to [\V128] - } - - -:math:`\shape\K{.}\vcvtop\K{\_high\_}\shape\K{\_}\sx^?` -....................................................... +:math:`\shape\K{.}\vcvtop\K{\_}\side^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^?` +.......................................................................... * The instruction is valid with type :math:`[\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\vcvtop\K{\_high\_}\shape\K{\_}\sx : [\V128] \to [\V128] + C \vdashinstr \shape\K{.}\vcvtop\K{\_}\side^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^? : [\V128] \to [\V128] } -:math:`\shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx^?\K{\_zero}` -............................................................... - -* The instruction is valid with type :math:`[\V128] \to [\V128]`. +.. _valid-simd-narrow: -.. math:: - \frac{ - }{ - C \vdashinstr \shape\K{.}\vcvtop\K{\_}\shape\K{\_}\sx : [\V128] \to [\V128] - } - - -.. _valid-narrow: - -:math:`\shape\K{.}\NARROW\K{\_}\shape\K{\_}\sx` -............................................... +:math:`\ishape_1\K{.}\NARROW\K{\_}\ishape_2\K{\_}\sx` +..................................................... * The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\NARROW\K{\_}\shape\K{\_}\sx : [\V128~\V128] \to [\V128] + C \vdashinstr \ishape_1\K{.}\NARROW\K{\_}\ishape_2\K{\_}\sx : [\V128~\V128] \to [\V128] } @@ -581,33 +545,33 @@ We also define an auxiliary function to get number of packed numeric types in a .. _valid-simd-dot: -:math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` -.................................... +:math:`\ishape_1\K{.}\DOT\K{\_}\ishape_2\K{\_s}` +................................................ * The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \K{i32x4.}\DOT\K{\_i16x8\_s} : [\V128~\V128] \to [\V128] + C \vdashinstr \ishape_1\K{.}\DOT\K{\_}\ishape_2\K{\_s} : [\V128~\V128] \to [\V128] } -.. _valid-simd-vextmul: +.. _valid-simd-extmul: -:math:`\ishape\K{.}\vextmul\K{\_}\ishape\K{\_}\sx` -.................................................. +:math:`\ishape\K{.}\EXTMUL\K{\_}\side\K{\_}\ishape\K{\_}\sx` +............................................................ * The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \ishape\K{.}\EXTMUL\K{\_}\ishape\K{\_}\sx : [\V128~\V128] \to [\V128] + C \vdashinstr \ishape\K{.}\EXTMUL\K{\_}\side\K{\_}\ishape\K{\_}\sx : [\V128~\V128] \to [\V128] } -.. _valid-simd-extaddpairwise: +.. _valid-simd-extadd_pairwise: :math:`\ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx` ......................................................... @@ -660,7 +624,7 @@ Parametric Instructions * Else: - * The instruction is valid with type :math:`[t~t~\I32] \to [t]`, for any :ref:`operand type ` :math:`t` that :ref:`matches ` some :ref:`number type `. + * The instruction is valid with type :math:`[t~t~\I32] \to [t]`, for any :ref:`operand type ` :math:`t` that :ref:`matches ` some :ref:`number type ` or :ref:`SIMD type `. .. math:: \frac{ @@ -673,6 +637,12 @@ Parametric Instructions }{ C \vdashinstr \SELECT : [t~t~\I32] \to [t] } + \qquad + \frac{ + \vdash t \leq \simdtype + }{ + C \vdashinstr \SELECT : [t~t~\I32] \to [t] + } .. note:: In future versions of WebAssembly, |SELECT| may allow more than one value per choice. diff --git a/interpreter/README.md b/interpreter/README.md index 943f5c58a8..601422b133 100644 --- a/interpreter/README.md +++ b/interpreter/README.md @@ -203,6 +203,8 @@ vecunop: abs | neg | ... vecbinop: add | sub | min_ | ... vecternop: bitselect vectestop: all_true | any_true +vecrelop: eq | ne | lt | ... +veccvtop: extend_low | extend_high | trunc_sat | ... vecshiftop: shl | shr_ expr: @@ -271,6 +273,8 @@ op: . . . + . + ._(_)?(_)? . .bitmask .splat diff --git a/interpreter/binary/encode.ml b/interpreter/binary/encode.ml index 8435e6caf5..254b341b25 100644 --- a/interpreter/binary/encode.ml +++ b/interpreter/binary/encode.ml @@ -470,26 +470,13 @@ struct | VecUnary (V128 (I8x16 V128Op.Popcnt)) -> vecop 0x62l | VecUnary (V128 (I16x8 V128Op.Abs)) -> vecop 0x80l | VecUnary (V128 (I16x8 V128Op.Neg)) -> vecop 0x81l - | VecUnary (V128 (I16x8 V128Op.ExtendLowS)) -> vecop 0x87l - | VecUnary (V128 (I16x8 V128Op.ExtendHighS)) -> vecop 0x88l - | VecUnary (V128 (I16x8 V128Op.ExtendLowU)) -> vecop 0x89l - | VecUnary (V128 (I16x8 V128Op.ExtendHighU)) -> vecop 0x8al - | VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -> vecop 0x7cl - | VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) -> vecop 0x7dl + | VecUnary (V128 (I16x8 V128Op.Popcnt)) -> assert false | VecUnary (V128 (I32x4 V128Op.Abs)) -> vecop 0xa0l | VecUnary (V128 (I32x4 V128Op.Neg)) -> vecop 0xa1l - | VecUnary (V128 (I32x4 V128Op.ExtendLowS)) -> vecop 0xa7l - | VecUnary (V128 (I32x4 V128Op.ExtendHighS)) -> vecop 0xa8l - | VecUnary (V128 (I32x4 V128Op.ExtendLowU)) -> vecop 0xa9l - | VecUnary (V128 (I32x4 V128Op.ExtendHighU)) -> vecop 0xaal - | VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -> vecop 0x7el - | VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) -> vecop 0x7fl + | VecUnary (V128 (I32x4 V128Op.Popcnt)) -> assert false | VecUnary (V128 (I64x2 V128Op.Abs)) -> vecop 0xc0l | VecUnary (V128 (I64x2 V128Op.Neg)) -> vecop 0xc1l - | VecUnary (V128 (I64x2 V128Op.ExtendLowS)) -> vecop 0xc7l - | VecUnary (V128 (I64x2 V128Op.ExtendHighS)) -> vecop 0xc8l - | VecUnary (V128 (I64x2 V128Op.ExtendLowU)) -> vecop 0xc9l - | VecUnary (V128 (I64x2 V128Op.ExtendHighU)) -> vecop 0xcal + | VecUnary (V128 (I64x2 V128Op.Popcnt)) -> assert false | VecUnary (V128 (F32x4 V128Op.Ceil)) -> vecop 0x67l | VecUnary (V128 (F32x4 V128Op.Floor)) -> vecop 0x68l | VecUnary (V128 (F32x4 V128Op.Trunc)) -> vecop 0x69l @@ -504,30 +491,62 @@ struct | VecUnary (V128 (F64x2 V128Op.Abs)) -> vecop 0xecl | VecUnary (V128 (F64x2 V128Op.Neg)) -> vecop 0xedl | VecUnary (V128 (F64x2 V128Op.Sqrt)) -> vecop 0xefl - | VecUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -> vecop 0xf8l - | VecUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -> vecop 0xf9l - | VecUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -> vecop 0xfcl - | VecUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -> vecop 0xfdl - | VecUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -> vecop 0xfal - | VecUnary (V128 (F32x4 V128Op.ConvertUI32x4)) -> vecop 0xfbl - | VecUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -> vecop 0x5el - | VecUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -> vecop 0x5fl - | VecUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -> vecop 0xfel - | VecUnary (V128 (F64x2 V128Op.ConvertUI32x4)) -> vecop 0xffl - | VecUnary (V128 _) -> assert false + + | VecCompare (V128 (I8x16 V128Op.Eq)) -> vecop 0x23l + | VecCompare (V128 (I8x16 V128Op.Ne)) -> vecop 0x24l + | VecCompare (V128 (I8x16 V128Op.LtS)) -> vecop 0x25l + | VecCompare (V128 (I8x16 V128Op.LtU)) -> vecop 0x26l + | VecCompare (V128 (I8x16 V128Op.GtS)) -> vecop 0x27l + | VecCompare (V128 (I8x16 V128Op.GtU)) -> vecop 0x28l + | VecCompare (V128 (I8x16 V128Op.LeS)) -> vecop 0x29l + | VecCompare (V128 (I8x16 V128Op.LeU)) -> vecop 0x2al + | VecCompare (V128 (I8x16 V128Op.GeS)) -> vecop 0x2bl + | VecCompare (V128 (I8x16 V128Op.GeU)) -> vecop 0x2cl + | VecCompare (V128 (I16x8 V128Op.Eq)) -> vecop 0x2dl + | VecCompare (V128 (I16x8 V128Op.Ne)) -> vecop 0x2el + | VecCompare (V128 (I16x8 V128Op.LtS)) -> vecop 0x2fl + | VecCompare (V128 (I16x8 V128Op.LtU)) -> vecop 0x30l + | VecCompare (V128 (I16x8 V128Op.GtS)) -> vecop 0x31l + | VecCompare (V128 (I16x8 V128Op.GtU)) -> vecop 0x32l + | VecCompare (V128 (I16x8 V128Op.LeS)) -> vecop 0x33l + | VecCompare (V128 (I16x8 V128Op.LeU)) -> vecop 0x34l + | VecCompare (V128 (I16x8 V128Op.GeS)) -> vecop 0x35l + | VecCompare (V128 (I16x8 V128Op.GeU)) -> vecop 0x36l + | VecCompare (V128 (I32x4 V128Op.Eq)) -> vecop 0x37l + | VecCompare (V128 (I32x4 V128Op.Ne)) -> vecop 0x38l + | VecCompare (V128 (I32x4 V128Op.LtS)) -> vecop 0x39l + | VecCompare (V128 (I32x4 V128Op.LtU)) -> vecop 0x3al + | VecCompare (V128 (I32x4 V128Op.GtS)) -> vecop 0x3bl + | VecCompare (V128 (I32x4 V128Op.GtU)) -> vecop 0x3cl + | VecCompare (V128 (I32x4 V128Op.LeS)) -> vecop 0x3dl + | VecCompare (V128 (I32x4 V128Op.LeU)) -> vecop 0x3el + | VecCompare (V128 (I32x4 V128Op.GeS)) -> vecop 0x3fl + | VecCompare (V128 (I32x4 V128Op.GeU)) -> vecop 0x40l + | VecCompare (V128 (I64x2 V128Op.Eq)) -> vecop 0xd6l + | VecCompare (V128 (I64x2 V128Op.Ne)) -> vecop 0xd7l + | VecCompare (V128 (I64x2 V128Op.LtS)) -> vecop 0xd8l + | VecCompare (V128 (I64x2 V128Op.LtU)) -> assert false + | VecCompare (V128 (I64x2 V128Op.GtS)) -> vecop 0xd9l + | VecCompare (V128 (I64x2 V128Op.GtU)) -> assert false + | VecCompare (V128 (I64x2 V128Op.LeS)) -> vecop 0xdal + | VecCompare (V128 (I64x2 V128Op.LeU)) -> assert false + | VecCompare (V128 (I64x2 V128Op.GeS)) -> vecop 0xdbl + | VecCompare (V128 (I64x2 V128Op.GeU)) -> assert false + | VecCompare (V128 (F32x4 V128Op.Eq)) -> vecop 0x41l + | VecCompare (V128 (F32x4 V128Op.Ne)) -> vecop 0x42l + | VecCompare (V128 (F32x4 V128Op.Lt)) -> vecop 0x43l + | VecCompare (V128 (F32x4 V128Op.Gt)) -> vecop 0x44l + | VecCompare (V128 (F32x4 V128Op.Le)) -> vecop 0x45l + | VecCompare (V128 (F32x4 V128Op.Ge)) -> vecop 0x46l + | VecCompare (V128 (F64x2 V128Op.Eq)) -> vecop 0x47l + | VecCompare (V128 (F64x2 V128Op.Ne)) -> vecop 0x48l + | VecCompare (V128 (F64x2 V128Op.Lt)) -> vecop 0x49l + | VecCompare (V128 (F64x2 V128Op.Gt)) -> vecop 0x4al + | VecCompare (V128 (F64x2 V128Op.Le)) -> vecop 0x4bl + | VecCompare (V128 (F64x2 V128Op.Ge)) -> vecop 0x4cl | VecBinary (V128 (I8x16 (V128Op.Shuffle is))) -> vecop 0x0dl; List.iter u8 is | VecBinary (V128 (I8x16 V128Op.Swizzle)) -> vecop 0x0el - | VecBinary (V128 (I8x16 V128Op.Eq)) -> vecop 0x23l - | VecBinary (V128 (I8x16 V128Op.Ne)) -> vecop 0x24l - | VecBinary (V128 (I8x16 V128Op.LtS)) -> vecop 0x25l - | VecBinary (V128 (I8x16 V128Op.LtU)) -> vecop 0x26l - | VecBinary (V128 (I8x16 V128Op.GtS)) -> vecop 0x27l - | VecBinary (V128 (I8x16 V128Op.GtU)) -> vecop 0x28l - | VecBinary (V128 (I8x16 V128Op.LeS)) -> vecop 0x29l - | VecBinary (V128 (I8x16 V128Op.LeU)) -> vecop 0x2al - | VecBinary (V128 (I8x16 V128Op.GeS)) -> vecop 0x2bl - | VecBinary (V128 (I8x16 V128Op.GeU)) -> vecop 0x2cl | VecBinary (V128 (I8x16 V128Op.NarrowS)) -> vecop 0x65l | VecBinary (V128 (I8x16 V128Op.NarrowU)) -> vecop 0x66l | VecBinary (V128 (I8x16 V128Op.Add)) -> vecop 0x6el @@ -541,16 +560,6 @@ struct | VecBinary (V128 (I8x16 V128Op.MaxS)) -> vecop 0x78l | VecBinary (V128 (I8x16 V128Op.MaxU)) -> vecop 0x79l | VecBinary (V128 (I8x16 V128Op.AvgrU)) -> vecop 0x7bl - | VecBinary (V128 (I16x8 V128Op.Eq)) -> vecop 0x2dl - | VecBinary (V128 (I16x8 V128Op.Ne)) -> vecop 0x2el - | VecBinary (V128 (I16x8 V128Op.LtS)) -> vecop 0x2fl - | VecBinary (V128 (I16x8 V128Op.LtU)) -> vecop 0x30l - | VecBinary (V128 (I16x8 V128Op.GtS)) -> vecop 0x31l - | VecBinary (V128 (I16x8 V128Op.GtU)) -> vecop 0x32l - | VecBinary (V128 (I16x8 V128Op.LeS)) -> vecop 0x33l - | VecBinary (V128 (I16x8 V128Op.LeU)) -> vecop 0x34l - | VecBinary (V128 (I16x8 V128Op.GeS)) -> vecop 0x35l - | VecBinary (V128 (I16x8 V128Op.GeU)) -> vecop 0x36l | VecBinary (V128 (I16x8 V128Op.NarrowS)) -> vecop 0x85l | VecBinary (V128 (I16x8 V128Op.NarrowU)) -> vecop 0x86l | VecBinary (V128 (I16x8 V128Op.Add)) -> vecop 0x8el @@ -578,16 +587,6 @@ struct | VecBinary (V128 (I32x4 V128Op.MaxU)) -> vecop 0xb9l | VecBinary (V128 (I32x4 V128Op.DotS)) -> vecop 0xbal | VecBinary (V128 (I32x4 V128Op.Mul)) -> vecop 0xb5l - | VecBinary (V128 (I32x4 V128Op.Eq)) -> vecop 0x37l - | VecBinary (V128 (I32x4 V128Op.Ne)) -> vecop 0x38l - | VecBinary (V128 (I32x4 V128Op.LtS)) -> vecop 0x39l - | VecBinary (V128 (I32x4 V128Op.LtU)) -> vecop 0x3al - | VecBinary (V128 (I32x4 V128Op.GtS)) -> vecop 0x3bl - | VecBinary (V128 (I32x4 V128Op.GtU)) -> vecop 0x3cl - | VecBinary (V128 (I32x4 V128Op.LeS)) -> vecop 0x3dl - | VecBinary (V128 (I32x4 V128Op.LeU)) -> vecop 0x3el - | VecBinary (V128 (I32x4 V128Op.GeS)) -> vecop 0x3fl - | VecBinary (V128 (I32x4 V128Op.GeU)) -> vecop 0x40l | VecBinary (V128 (I32x4 V128Op.ExtMulLowS)) -> vecop 0xbcl | VecBinary (V128 (I32x4 V128Op.ExtMulHighS)) -> vecop 0xbdl | VecBinary (V128 (I32x4 V128Op.ExtMulLowU)) -> vecop 0xbel @@ -595,22 +594,10 @@ struct | VecBinary (V128 (I64x2 V128Op.Add)) -> vecop 0xcel | VecBinary (V128 (I64x2 V128Op.Sub)) -> vecop 0xd1l | VecBinary (V128 (I64x2 V128Op.Mul)) -> vecop 0xd5l - | VecBinary (V128 (I64x2 V128Op.Eq)) -> vecop 0xd6l - | VecBinary (V128 (I64x2 V128Op.Ne)) -> vecop 0xd7l - | VecBinary (V128 (I64x2 V128Op.LtS)) -> vecop 0xd8l - | VecBinary (V128 (I64x2 V128Op.GtS)) -> vecop 0xd9l - | VecBinary (V128 (I64x2 V128Op.LeS)) -> vecop 0xdal - | VecBinary (V128 (I64x2 V128Op.GeS)) -> vecop 0xdbl | VecBinary (V128 (I64x2 V128Op.ExtMulLowS)) -> vecop 0xdcl | VecBinary (V128 (I64x2 V128Op.ExtMulHighS)) -> vecop 0xddl | VecBinary (V128 (I64x2 V128Op.ExtMulLowU)) -> vecop 0xdel | VecBinary (V128 (I64x2 V128Op.ExtMulHighU)) -> vecop 0xdfl - | VecBinary (V128 (F32x4 V128Op.Eq)) -> vecop 0x41l - | VecBinary (V128 (F32x4 V128Op.Ne)) -> vecop 0x42l - | VecBinary (V128 (F32x4 V128Op.Lt)) -> vecop 0x43l - | VecBinary (V128 (F32x4 V128Op.Gt)) -> vecop 0x44l - | VecBinary (V128 (F32x4 V128Op.Le)) -> vecop 0x45l - | VecBinary (V128 (F32x4 V128Op.Ge)) -> vecop 0x46l | VecBinary (V128 (F32x4 V128Op.Add)) -> vecop 0xe4l | VecBinary (V128 (F32x4 V128Op.Sub)) -> vecop 0xe5l | VecBinary (V128 (F32x4 V128Op.Mul)) -> vecop 0xe6l @@ -619,12 +606,6 @@ struct | VecBinary (V128 (F32x4 V128Op.Max)) -> vecop 0xe9l | VecBinary (V128 (F32x4 V128Op.Pmin)) -> vecop 0xeal | VecBinary (V128 (F32x4 V128Op.Pmax)) -> vecop 0xebl - | VecBinary (V128 (F64x2 V128Op.Eq)) -> vecop 0x47l - | VecBinary (V128 (F64x2 V128Op.Ne)) -> vecop 0x48l - | VecBinary (V128 (F64x2 V128Op.Lt)) -> vecop 0x49l - | VecBinary (V128 (F64x2 V128Op.Gt)) -> vecop 0x4al - | VecBinary (V128 (F64x2 V128Op.Le)) -> vecop 0x4bl - | VecBinary (V128 (F64x2 V128Op.Ge)) -> vecop 0x4cl | VecBinary (V128 (F64x2 V128Op.Add)) -> vecop 0xf0l | VecBinary (V128 (F64x2 V128Op.Sub)) -> vecop 0xf1l | VecBinary (V128 (F64x2 V128Op.Mul)) -> vecop 0xf2l @@ -635,13 +616,37 @@ struct | VecBinary (V128 (F64x2 V128Op.Pmax)) -> vecop 0xf7l | VecBinary (V128 _) -> assert false - | VecTestBits (V128 V128Op.AnyTrue) -> vecop 0x53l - | VecUnaryBits (V128 V128Op.Not) -> vecop 0x4dl - | VecBinaryBits (V128 V128Op.And) -> vecop 0x4el - | VecBinaryBits (V128 V128Op.AndNot) -> vecop 0x4fl - | VecBinaryBits (V128 V128Op.Or) -> vecop 0x50l - | VecBinaryBits (V128 V128Op.Xor) -> vecop 0x51l - | VecTernaryBits (V128 V128Op.Bitselect) -> vecop 0x52l + | VecConvert (V128 (I8x16 _)) -> assert false + | VecConvert (V128 (I16x8 V128Op.ExtendLowS)) -> vecop 0x87l + | VecConvert (V128 (I16x8 V128Op.ExtendHighS)) -> vecop 0x88l + | VecConvert (V128 (I16x8 V128Op.ExtendLowU)) -> vecop 0x89l + | VecConvert (V128 (I16x8 V128Op.ExtendHighU)) -> vecop 0x8al + | VecConvert (V128 (I16x8 V128Op.ExtAddPairwiseS)) -> vecop 0x7cl + | VecConvert (V128 (I16x8 V128Op.ExtAddPairwiseU)) -> vecop 0x7dl + | VecConvert (V128 (I16x8 _)) -> assert false + | VecConvert (V128 (I32x4 V128Op.ExtendLowS)) -> vecop 0xa7l + | VecConvert (V128 (I32x4 V128Op.ExtendHighS)) -> vecop 0xa8l + | VecConvert (V128 (I32x4 V128Op.ExtendLowU)) -> vecop 0xa9l + | VecConvert (V128 (I32x4 V128Op.ExtendHighU)) -> vecop 0xaal + | VecConvert (V128 (I32x4 V128Op.ExtAddPairwiseS)) -> vecop 0x7el + | VecConvert (V128 (I32x4 V128Op.ExtAddPairwiseU)) -> vecop 0x7fl + | VecConvert (V128 (I32x4 V128Op.TruncSatSF32x4)) -> vecop 0xf8l + | VecConvert (V128 (I32x4 V128Op.TruncSatUF32x4)) -> vecop 0xf9l + | VecConvert (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -> vecop 0xfcl + | VecConvert (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) -> vecop 0xfdl + | VecConvert (V128 (I64x2 V128Op.ExtendLowS)) -> vecop 0xc7l + | VecConvert (V128 (I64x2 V128Op.ExtendHighS)) -> vecop 0xc8l + | VecConvert (V128 (I64x2 V128Op.ExtendLowU)) -> vecop 0xc9l + | VecConvert (V128 (I64x2 V128Op.ExtendHighU)) -> vecop 0xcal + | VecConvert (V128 (I64x2 _)) -> assert false + | VecConvert (V128 (F32x4 V128Op.DemoteZeroF64x2)) -> vecop 0x5el + | VecConvert (V128 (F32x4 V128Op.PromoteLowF32x4)) -> assert false + | VecConvert (V128 (F32x4 V128Op.ConvertSI32x4)) -> vecop 0xfal + | VecConvert (V128 (F32x4 V128Op.ConvertUI32x4)) -> vecop 0xfbl + | VecConvert (V128 (F64x2 V128Op.DemoteZeroF64x2)) -> assert false + | VecConvert (V128 (F64x2 V128Op.PromoteLowF32x4)) -> vecop 0x5fl + | VecConvert (V128 (F64x2 V128Op.ConvertSI32x4)) -> vecop 0xfel + | VecConvert (V128 (F64x2 V128Op.ConvertUI32x4)) -> vecop 0xffl | VecShift (V128 (I8x16 V128Op.Shl)) -> vecop 0x6bl | VecShift (V128 (I8x16 V128Op.ShrS)) -> vecop 0x6cl @@ -663,6 +668,14 @@ struct | VecBitmask (V128 (I64x2 V128Op.Bitmask)) -> vecop 0xc4l | VecBitmask (V128 _) -> . + | VecTestBits (V128 V128Op.AnyTrue) -> vecop 0x53l + | VecUnaryBits (V128 V128Op.Not) -> vecop 0x4dl + | VecBinaryBits (V128 V128Op.And) -> vecop 0x4el + | VecBinaryBits (V128 V128Op.AndNot) -> vecop 0x4fl + | VecBinaryBits (V128 V128Op.Or) -> vecop 0x50l + | VecBinaryBits (V128 V128Op.Xor) -> vecop 0x51l + | VecTernaryBits (V128 V128Op.Bitselect) -> vecop 0x52l + | VecSplat (V128 ((I8x16 V128Op.Splat))) -> vecop 0x0fl | VecSplat (V128 ((I16x8 V128Op.Splat))) -> vecop 0x10l | VecSplat (V128 ((I32x4 V128Op.Splat))) -> vecop 0x11l diff --git a/interpreter/exec/eval.ml b/interpreter/exec/eval.ml index 35c4fcab46..fb7beac05f 100644 --- a/interpreter/exec/eval.ml +++ b/interpreter/exec/eval.ml @@ -536,6 +536,22 @@ let rec step (c : config) : config = (try Vec (Eval_vec.eval_binop binop n1 n2) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | VecCompare relop, Vec n2 :: Vec n1 :: vs' -> + (try Vec (Eval_vec.eval_relop relop n1 n2) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | VecConvert cvtop, Vec n :: vs' -> + (try Vec (Eval_vec.eval_cvtop cvtop n) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | VecShift shiftop, Num s :: Vec v :: vs' -> + (try Vec (Eval_vec.eval_shiftop shiftop v s) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + + | VecBitmask bitmaskop, Vec v :: vs' -> + (try Num (Eval_vec.eval_bitmaskop bitmaskop v) :: vs', [] + with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) + | VecTestBits vtestop, Vec n :: vs' -> (try value_of_bool (Eval_vec.eval_vtestop vtestop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) @@ -552,14 +568,6 @@ let rec step (c : config) : config = (try Vec (Eval_vec.eval_vternop vternop v1 v2 v3) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | VecShift shiftop, Num s :: Vec v :: vs' -> - (try Vec (Eval_vec.eval_shiftop shiftop v s) :: vs', [] - with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - - | VecBitmask bitmaskop, Vec v :: vs' -> - (try Num (Eval_vec.eval_bitmaskop bitmaskop v) :: vs', [] - with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) - | VecSplat splatop, Num n :: vs' -> (try Vec (Eval_vec.eval_splatop splatop n) :: vs', [] with exn -> vs', [Trapping (numeric_error e.at exn) @@ e.at]) diff --git a/interpreter/exec/eval_vec.ml b/interpreter/exec/eval_vec.ml index 8495e256bd..d4c6e9648e 100644 --- a/interpreter/exec/eval_vec.ml +++ b/interpreter/exec/eval_vec.ml @@ -23,30 +23,10 @@ struct | I8x16 Popcnt -> V128.I8x16.popcnt | I16x8 Neg -> V128.I16x8.neg | I16x8 Abs -> V128.I16x8.abs - | I16x8 ExtendLowS -> V128.I16x8_convert.extend_low_s - | I16x8 ExtendHighS -> V128.I16x8_convert.extend_high_s - | I16x8 ExtendLowU -> V128.I16x8_convert.extend_low_u - | I16x8 ExtendHighU -> V128.I16x8_convert.extend_high_u - | I16x8 ExtAddPairwiseS -> V128.I16x8_convert.extadd_pairwise_s - | I16x8 ExtAddPairwiseU -> V128.I16x8_convert.extadd_pairwise_u | I32x4 Abs -> V128.I32x4.abs | I32x4 Neg -> V128.I32x4.neg - | I32x4 ExtendLowS -> V128.I32x4_convert.extend_low_s - | I32x4 ExtendHighS -> V128.I32x4_convert.extend_high_s - | I32x4 ExtendLowU -> V128.I32x4_convert.extend_low_u - | I32x4 ExtendHighU -> V128.I32x4_convert.extend_high_u - | I32x4 TruncSatSF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_s - | I32x4 TruncSatUF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_u - | I32x4 TruncSatSZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_s_zero - | I32x4 TruncSatUZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_u_zero - | I32x4 ExtAddPairwiseS -> V128.I32x4_convert.extadd_pairwise_s - | I32x4 ExtAddPairwiseU -> V128.I32x4_convert.extadd_pairwise_u | I64x2 Abs -> V128.I64x2.abs | I64x2 Neg -> V128.I64x2.neg - | I64x2 ExtendLowS -> V128.I64x2_convert.extend_low_s - | I64x2 ExtendHighS -> V128.I64x2_convert.extend_high_s - | I64x2 ExtendLowU -> V128.I64x2_convert.extend_low_u - | I64x2 ExtendHighU -> V128.I64x2_convert.extend_high_u | F32x4 Abs -> V128.F32x4.abs | F32x4 Neg -> V128.F32x4.neg | F32x4 Sqrt -> V128.F32x4.sqrt @@ -54,9 +34,6 @@ struct | F32x4 Floor -> V128.F32x4.floor | F32x4 Trunc -> V128.F32x4.trunc | F32x4 Nearest -> V128.F32x4.nearest - | F32x4 ConvertSI32x4 -> V128.F32x4_convert.convert_i32x4_s - | F32x4 ConvertUI32x4 -> V128.F32x4_convert.convert_i32x4_u - | F32x4 DemoteZeroF64x2 -> V128.F32x4_convert.demote_f64x2_zero | F64x2 Abs -> V128.F64x2.abs | F64x2 Neg -> V128.F64x2.neg | F64x2 Sqrt -> V128.F64x2.sqrt @@ -64,9 +41,6 @@ struct | F64x2 Floor -> V128.F64x2.floor | F64x2 Trunc -> V128.F64x2.trunc | F64x2 Nearest -> V128.F64x2.nearest - | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 - | F64x2 ConvertSI32x4 -> V128.F64x2_convert.convert_i32x4_s - | F64x2 ConvertUI32x4 -> V128.F64x2_convert.convert_i32x4_u | _ -> assert false in fun v -> to_vec (f (of_vec 1 v)) @@ -74,16 +48,6 @@ struct let f = match op with | I8x16 Swizzle -> V128.V8x16.swizzle | I8x16 (Shuffle is) -> fun a b -> V128.V8x16.shuffle a b is - | I8x16 Eq -> V128.I8x16.eq - | I8x16 Ne -> V128.I8x16.ne - | I8x16 LtS -> V128.I8x16.lt_s - | I8x16 LtU -> V128.I8x16.lt_u - | I8x16 LeS -> V128.I8x16.le_s - | I8x16 LeU -> V128.I8x16.le_u - | I8x16 GtS -> V128.I8x16.gt_s - | I8x16 GtU -> V128.I8x16.gt_u - | I8x16 GeS -> V128.I8x16.ge_s - | I8x16 GeU -> V128.I8x16.ge_u | I8x16 NarrowS -> V128.I8x16_convert.narrow_s | I8x16 NarrowU -> V128.I8x16_convert.narrow_u | I8x16 Add -> V128.I8x16.add @@ -97,16 +61,6 @@ struct | I8x16 MaxS -> V128.I8x16.max_s | I8x16 MaxU -> V128.I8x16.max_u | I8x16 AvgrU -> V128.I8x16.avgr_u - | I16x8 Eq -> V128.I16x8.eq - | I16x8 Ne -> V128.I16x8.ne - | I16x8 LtS -> V128.I16x8.lt_s - | I16x8 LtU -> V128.I16x8.lt_u - | I16x8 LeS -> V128.I16x8.le_s - | I16x8 LeU -> V128.I16x8.le_u - | I16x8 GtS -> V128.I16x8.gt_s - | I16x8 GtU -> V128.I16x8.gt_u - | I16x8 GeS -> V128.I16x8.ge_s - | I16x8 GeU -> V128.I16x8.ge_u | I16x8 NarrowS -> V128.I16x8_convert.narrow_s | I16x8 NarrowU -> V128.I16x8_convert.narrow_u | I16x8 Add -> V128.I16x8.add @@ -133,22 +87,6 @@ struct | I32x4 MaxS -> V128.I32x4.max_s | I32x4 MaxU -> V128.I32x4.max_u | I32x4 Mul -> V128.I32x4.mul - | I32x4 Eq -> V128.I32x4.eq - | I32x4 Ne -> V128.I32x4.ne - | I32x4 LtS -> V128.I32x4.lt_s - | I32x4 LtU -> V128.I32x4.lt_u - | I32x4 LeS -> V128.I32x4.le_s - | I32x4 LeU -> V128.I32x4.le_u - | I32x4 GtS -> V128.I32x4.gt_s - | I32x4 GtU -> V128.I32x4.gt_u - | I32x4 GeS -> V128.I32x4.ge_s - | I32x4 GeU -> V128.I32x4.ge_u - | I64x2 Eq -> V128.I64x2.eq - | I64x2 Ne -> V128.I64x2.ne - | I64x2 LtS -> V128.I64x2.lt_s - | I64x2 LeS -> V128.I64x2.le_s - | I64x2 GtS -> V128.I64x2.gt_s - | I64x2 GeS -> V128.I64x2.ge_s | I32x4 ExtMulLowS -> V128.I32x4_convert.extmul_low_s | I32x4 ExtMulHighS -> V128.I32x4_convert.extmul_high_s | I32x4 ExtMulLowU -> V128.I32x4_convert.extmul_low_u @@ -161,12 +99,6 @@ struct | I64x2 ExtMulHighS -> V128.I64x2_convert.extmul_high_s | I64x2 ExtMulLowU -> V128.I64x2_convert.extmul_low_u | I64x2 ExtMulHighU -> V128.I64x2_convert.extmul_high_u - | F32x4 Eq -> V128.F32x4.eq - | F32x4 Ne -> V128.F32x4.ne - | F32x4 Lt -> V128.F32x4.lt - | F32x4 Le -> V128.F32x4.le - | F32x4 Gt -> V128.F32x4.gt - | F32x4 Ge -> V128.F32x4.ge | F32x4 Add -> V128.F32x4.add | F32x4 Sub -> V128.F32x4.sub | F32x4 Mul -> V128.F32x4.mul @@ -175,12 +107,6 @@ struct | F32x4 Max -> V128.F32x4.max | F32x4 Pmin -> V128.F32x4.pmin | F32x4 Pmax -> V128.F32x4.pmax - | F64x2 Eq -> V128.F64x2.eq - | F64x2 Ne -> V128.F64x2.ne - | F64x2 Lt -> V128.F64x2.lt - | F64x2 Le -> V128.F64x2.le - | F64x2 Gt -> V128.F64x2.gt - | F64x2 Ge -> V128.F64x2.ge | F64x2 Add -> V128.F64x2.add | F64x2 Sub -> V128.F64x2.sub | F64x2 Mul -> V128.F64x2.mul @@ -192,28 +118,89 @@ struct | _ -> assert false in fun v1 v2 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2)) - let vtestop (op : vtestop) = - let f = match op with - | AnyTrue -> V128.I8x16.any_true - in fun v -> f (of_vec 1 v) - - let vunop (op : vunop) = + let relop (op : relop) = let f = match op with - | Not -> V128.V1x128.lognot - in fun v -> to_vec (f (of_vec 1 v)) - - let vbinop (op : vbinop) = - let f = match op with - | And -> V128.V1x128.and_ - | Or -> V128.V1x128.or_ - | Xor -> V128.V1x128.xor - | AndNot -> V128.V1x128.andnot + | I8x16 Eq -> V128.I8x16.eq + | I8x16 Ne -> V128.I8x16.ne + | I8x16 LtS -> V128.I8x16.lt_s + | I8x16 LtU -> V128.I8x16.lt_u + | I8x16 LeS -> V128.I8x16.le_s + | I8x16 LeU -> V128.I8x16.le_u + | I8x16 GtS -> V128.I8x16.gt_s + | I8x16 GtU -> V128.I8x16.gt_u + | I8x16 GeS -> V128.I8x16.ge_s + | I8x16 GeU -> V128.I8x16.ge_u + | I16x8 Eq -> V128.I16x8.eq + | I16x8 Ne -> V128.I16x8.ne + | I16x8 LtS -> V128.I16x8.lt_s + | I16x8 LtU -> V128.I16x8.lt_u + | I16x8 LeS -> V128.I16x8.le_s + | I16x8 LeU -> V128.I16x8.le_u + | I16x8 GtS -> V128.I16x8.gt_s + | I16x8 GtU -> V128.I16x8.gt_u + | I16x8 GeS -> V128.I16x8.ge_s + | I16x8 GeU -> V128.I16x8.ge_u + | I32x4 Eq -> V128.I32x4.eq + | I32x4 Ne -> V128.I32x4.ne + | I32x4 LtS -> V128.I32x4.lt_s + | I32x4 LtU -> V128.I32x4.lt_u + | I32x4 LeS -> V128.I32x4.le_s + | I32x4 LeU -> V128.I32x4.le_u + | I32x4 GtS -> V128.I32x4.gt_s + | I32x4 GtU -> V128.I32x4.gt_u + | I32x4 GeS -> V128.I32x4.ge_s + | I32x4 GeU -> V128.I32x4.ge_u + | I64x2 Eq -> V128.I64x2.eq + | I64x2 Ne -> V128.I64x2.ne + | I64x2 LtS -> V128.I64x2.lt_s + | I64x2 LeS -> V128.I64x2.le_s + | I64x2 GtS -> V128.I64x2.gt_s + | I64x2 GeS -> V128.I64x2.ge_s + | F32x4 Eq -> V128.F32x4.eq + | F32x4 Ne -> V128.F32x4.ne + | F32x4 Lt -> V128.F32x4.lt + | F32x4 Le -> V128.F32x4.le + | F32x4 Gt -> V128.F32x4.gt + | F32x4 Ge -> V128.F32x4.ge + | F64x2 Eq -> V128.F64x2.eq + | F64x2 Ne -> V128.F64x2.ne + | F64x2 Lt -> V128.F64x2.lt + | F64x2 Le -> V128.F64x2.le + | F64x2 Gt -> V128.F64x2.gt + | F64x2 Ge -> V128.F64x2.ge + | _ -> assert false in fun v1 v2 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2)) - let vternop (op : vternop) = + let cvtop (op : cvtop) = let f = match op with - | Bitselect -> V128.V1x128.bitselect - in fun v1 v2 v3 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2) (of_vec 3 v3)) + | I16x8 ExtendLowS -> V128.I16x8_convert.extend_low_s + | I16x8 ExtendHighS -> V128.I16x8_convert.extend_high_s + | I16x8 ExtendLowU -> V128.I16x8_convert.extend_low_u + | I16x8 ExtendHighU -> V128.I16x8_convert.extend_high_u + | I16x8 ExtAddPairwiseS -> V128.I16x8_convert.extadd_pairwise_s + | I16x8 ExtAddPairwiseU -> V128.I16x8_convert.extadd_pairwise_u + | I32x4 ExtendLowS -> V128.I32x4_convert.extend_low_s + | I32x4 ExtendHighS -> V128.I32x4_convert.extend_high_s + | I32x4 ExtendLowU -> V128.I32x4_convert.extend_low_u + | I32x4 ExtendHighU -> V128.I32x4_convert.extend_high_u + | I32x4 TruncSatSF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_s + | I32x4 TruncSatUF32x4 -> V128.I32x4_convert.trunc_sat_f32x4_u + | I32x4 TruncSatSZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_s_zero + | I32x4 TruncSatUZeroF64x2 -> V128.I32x4_convert.trunc_sat_f64x2_u_zero + | I32x4 ExtAddPairwiseS -> V128.I32x4_convert.extadd_pairwise_s + | I32x4 ExtAddPairwiseU -> V128.I32x4_convert.extadd_pairwise_u + | I64x2 ExtendLowS -> V128.I64x2_convert.extend_low_s + | I64x2 ExtendHighS -> V128.I64x2_convert.extend_high_s + | I64x2 ExtendLowU -> V128.I64x2_convert.extend_low_u + | I64x2 ExtendHighU -> V128.I64x2_convert.extend_high_u + | F32x4 ConvertSI32x4 -> V128.F32x4_convert.convert_i32x4_s + | F32x4 ConvertUI32x4 -> V128.F32x4_convert.convert_i32x4_u + | F32x4 DemoteZeroF64x2 -> V128.F32x4_convert.demote_f64x2_zero + | F64x2 PromoteLowF32x4 -> V128.F64x2_convert.promote_low_f32x4 + | F64x2 ConvertSI32x4 -> V128.F64x2_convert.convert_i32x4_s + | F64x2 ConvertUI32x4 -> V128.F64x2_convert.convert_i32x4_u + | _ -> assert false + in fun v -> to_vec (f (of_vec 1 v)) let shiftop (op : shiftop) = let f = match op with @@ -240,6 +227,29 @@ struct | I64x2 Bitmask -> V128.I64x2.bitmask | _ -> . in I32 (f (of_vec 1 v)) + + let vtestop (op : vtestop) = + let f = match op with + | AnyTrue -> V128.I8x16.any_true + in fun v -> f (of_vec 1 v) + + let vunop (op : vunop) = + let f = match op with + | Not -> V128.V1x128.lognot + in fun v -> to_vec (f (of_vec 1 v)) + + let vbinop (op : vbinop) = + let f = match op with + | And -> V128.V1x128.and_ + | Or -> V128.V1x128.or_ + | Xor -> V128.V1x128.xor + | AndNot -> V128.V1x128.andnot + in fun v1 v2 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2)) + + let vternop (op : vternop) = + let f = match op with + | Bitselect -> V128.V1x128.bitselect + in fun v1 v2 v3 -> to_vec (f (of_vec 1 v1) (of_vec 2 v2) (of_vec 3 v3)) end module V128CvtOp = @@ -291,12 +301,14 @@ let op v128 = function let eval_testop = op V128Op.testop let eval_unop = op V128Op.unop let eval_binop = op V128Op.binop +let eval_relop = op V128Op.relop +let eval_cvtop = op V128Op.cvtop +let eval_shiftop = op V128Op.shiftop +let eval_bitmaskop = op V128Op.bitmaskop let eval_vtestop = op V128Op.vtestop let eval_vunop = op V128Op.vunop let eval_vbinop = op V128Op.vbinop let eval_vternop = op V128Op.vternop -let eval_shiftop = op V128Op.shiftop -let eval_bitmaskop = op V128Op.bitmaskop let eval_splatop = op V128CvtOp.splatop let eval_extractop = op V128CvtOp.extractop let eval_replaceop = op V128CvtOp.replaceop diff --git a/interpreter/exec/eval_vec.mli b/interpreter/exec/eval_vec.mli index 13679c87ad..be54f20b72 100644 --- a/interpreter/exec/eval_vec.mli +++ b/interpreter/exec/eval_vec.mli @@ -3,12 +3,14 @@ open Values val eval_testop : Ast.vec_testop -> vec -> bool val eval_unop : Ast.vec_unop -> vec -> vec val eval_binop : Ast.vec_binop -> vec -> vec -> vec +val eval_relop : Ast.vec_relop -> vec -> vec -> vec +val eval_cvtop : Ast.vec_cvtop -> vec -> vec +val eval_shiftop : Ast.vec_shiftop -> vec -> num -> vec +val eval_bitmaskop : Ast.vec_bitmaskop -> vec -> num val eval_vtestop : Ast.vec_vtestop -> vec -> bool val eval_vunop : Ast.vec_vunop -> vec -> vec val eval_vbinop : Ast.vec_vbinop -> vec -> vec -> vec val eval_vternop : Ast.vec_vternop -> vec -> vec -> vec -> vec -val eval_shiftop : Ast.vec_shiftop -> vec -> num -> vec -val eval_bitmaskop : Ast.vec_bitmaskop -> vec -> num val eval_splatop : Ast.vec_splatop -> num -> vec val eval_extractop : Ast.vec_extractop -> vec -> num val eval_replaceop : Ast.vec_replaceop -> vec -> num -> vec diff --git a/interpreter/script/js.ml b/interpreter/script/js.ml index cc14c0b75c..093da2463c 100644 --- a/interpreter/script/js.ml +++ b/interpreter/script/js.ml @@ -348,7 +348,7 @@ let assert_return ress ts at = [ VecConst (V128 mask @@ at) @@ at; VecBinaryBits (V128 V128Op.And) @@ at; VecConst (V128 expected @@ at) @@ at; - VecBinary (V128 (V128.I8x16 V128Op.Eq)) @@ at; + VecCompare (V128 (V128.I8x16 V128Op.Eq)) @@ at; (* If all lanes are non-zero, then they are equal *) VecTest (V128 (V128.I8x16 V128Op.AllTrue)) @@ at; Test (I32 I32Op.Eqz) @@ at; diff --git a/interpreter/syntax/ast.ml b/interpreter/syntax/ast.ml index a8a3283d52..b5e3ae6eea 100644 --- a/interpreter/syntax/ast.ml +++ b/interpreter/syntax/ast.ml @@ -56,22 +56,20 @@ module V128Op = struct type itestop = AllTrue type iunop = Abs | Neg | Popcnt - | ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU - | ExtAddPairwiseS | ExtAddPairwiseU - | TruncSatSF32x4 | TruncSatUF32x4 - | TruncSatSZeroF64x2 | TruncSatUZeroF64x2 - type funop = Abs | Neg | Sqrt - | Ceil | Floor | Trunc | Nearest - | ConvertSI32x4 | ConvertUI32x4 - | DemoteZeroF64x2 | PromoteLowF32x4 + type funop = Abs | Neg | Sqrt | Ceil | Floor | Trunc | Nearest type ibinop = Add | Sub | Mul | MinS | MinU | MaxS | MaxU | AvgrU - | Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU - | AddSatS | AddSatU | SubSatS | SubSatU - | DotS | Q15MulRSatS + | AddSatS | AddSatU | SubSatS | SubSatU | DotS | Q15MulRSatS | ExtMulLowS | ExtMulHighS | ExtMulLowU | ExtMulHighU | Swizzle | Shuffle of int list | NarrowS | NarrowU type fbinop = Add | Sub | Mul | Div | Min | Max | Pmin | Pmax - | Eq | Ne | Lt | Le | Gt | Ge + type irelop = Eq | Ne | LtS | LtU | LeS | LeU | GtS | GtU | GeS | GeU + type frelop = Eq | Ne | Lt | Le | Gt | Ge + type icvtop = ExtendLowS | ExtendLowU | ExtendHighS | ExtendHighU + | ExtAddPairwiseS | ExtAddPairwiseU + | TruncSatSF32x4 | TruncSatUF32x4 + | TruncSatSZeroF64x2 | TruncSatUZeroF64x2 + type fcvtop = DemoteZeroF64x2 | PromoteLowF32x4 + | ConvertSI32x4 | ConvertUI32x4 type ishiftop = Shl | ShrS | ShrU type ibitmaskop = Bitmask @@ -83,6 +81,8 @@ struct type testop = (itestop, itestop, itestop, itestop, void, void) V128.laneop type unop = (iunop, iunop, iunop, iunop, funop, funop) V128.laneop type binop = (ibinop, ibinop, ibinop, ibinop, fbinop, fbinop) V128.laneop + type relop = (irelop, irelop, irelop, irelop, frelop, frelop) V128.laneop + type cvtop = (icvtop, icvtop, icvtop, icvtop, fcvtop, fcvtop) V128.laneop type shiftop = (ishiftop, ishiftop, ishiftop, ishiftop, void, void) V128.laneop type bitmaskop = (ibitmaskop, ibitmaskop, ibitmaskop, ibitmaskop, void, void) V128.laneop @@ -102,15 +102,16 @@ type relop = (I32Op.relop, I64Op.relop, F32Op.relop, F64Op.relop) Values.op type cvtop = (I32Op.cvtop, I64Op.cvtop, F32Op.cvtop, F64Op.cvtop) Values.op type vec_testop = (V128Op.testop) Values.vecop +type vec_relop = (V128Op.relop) Values.vecop type vec_unop = (V128Op.unop) Values.vecop type vec_binop = (V128Op.binop) Values.vecop +type vec_cvtop = (V128Op.cvtop) Values.vecop +type vec_shiftop = (V128Op.shiftop) Values.vecop +type vec_bitmaskop = (V128Op.bitmaskop) Values.vecop type vec_vtestop = (V128Op.vtestop) Values.vecop type vec_vunop = (V128Op.vunop) Values.vecop type vec_vbinop = (V128Op.vbinop) Values.vecop type vec_vternop = (V128Op.vternop) Values.vecop -type vec_shiftop = (V128Op.shiftop) Values.vecop -type vec_bitmaskop = (V128Op.bitmaskop) Values.vecop - type vec_splatop = (V128Op.splatop) Values.vecop type vec_extractop = (V128Op.extractop) Values.vecop type vec_replaceop = (V128Op.replaceop) Values.vecop @@ -182,19 +183,21 @@ and instr' = | Unary of unop (* unary numeric operator *) | Binary of binop (* binary numeric operator *) | Convert of cvtop (* conversion *) - | VecConst of vec (* vector constant *) + | VecConst of vec (* constant *) | VecTest of vec_testop (* vector test *) + | VecCompare of vec_relop (* vector comparison *) | VecUnary of vec_unop (* unary vector operator *) | VecBinary of vec_binop (* binary vector operator *) + | VecConvert of vec_cvtop (* vector conversion *) + | VecShift of vec_shiftop (* vector shifts *) + | VecBitmask of vec_bitmaskop (* vector masking *) | VecTestBits of vec_vtestop (* vector bit test *) - | VecUnaryBits of vec_vunop (* unary vector bit operator *) - | VecBinaryBits of vec_vbinop (* binary vector bit operator *) - | VecTernaryBits of vec_vternop (* ternary vector bit operator *) - | VecShift of vec_shiftop (* shifts for vector value *) - | VecBitmask of vec_bitmaskop (* bitmask for vector value *) + | VecUnaryBits of vec_vunop (* unary bit vector operator *) + | VecBinaryBits of vec_vbinop (* binary bit vector operator *) + | VecTernaryBits of vec_vternop (* ternary bit vector operator *) | VecSplat of vec_splatop (* number to vector conversion *) - | VecExtract of vec_extractop (* extract lane from vector value*) - | VecReplace of vec_replaceop (* replace lane in vector value *) + | VecExtract of vec_extractop (* extract lane from vector *) + | VecReplace of vec_replaceop (* replace lane in vector *) (* Globals & Functions *) diff --git a/interpreter/syntax/free.ml b/interpreter/syntax/free.ml index e8aebafde2..78c09baf3f 100644 --- a/interpreter/syntax/free.ml +++ b/interpreter/syntax/free.ml @@ -87,8 +87,8 @@ let rec instr (e : instr) = | VecLoad _ | VecStore _ | VecLoadLane _ | VecStoreLane _ | MemorySize | MemoryGrow | MemoryCopy | MemoryFill -> memories zero - | VecConst _ - | VecTest _ | VecUnary _ | VecBinary _ | VecShift _ | VecBitmask _ + | VecConst _ | VecTest _ | VecUnary _ | VecBinary _ | VecCompare _ + | VecConvert _ | VecShift _ | VecBitmask _ | VecTestBits _ | VecUnaryBits _ | VecBinaryBits _ | VecTernaryBits _ | VecSplat _ | VecExtract _ | VecReplace _ -> memories zero diff --git a/interpreter/syntax/operators.ml b/interpreter/syntax/operators.ml index f2cb7b2f08..296bb1e77e 100644 --- a/interpreter/syntax/operators.ml +++ b/interpreter/syntax/operators.ml @@ -295,25 +295,25 @@ let i8x16_splat = VecSplat (V128 (I8x16 V128Op.Splat)) let i8x16_extract_lane_s i = VecExtract (V128 (I8x16 (V128Op.Extract (i, SX)))) let i8x16_extract_lane_u i = VecExtract (V128 (I8x16 (V128Op.Extract (i, ZX)))) let i8x16_replace_lane i = VecReplace (V128 (I8x16 (V128Op.Replace i))) -let i8x16_eq = VecBinary (V128 (I8x16 V128Op.Eq)) -let i8x16_ne = VecBinary (V128 (I8x16 V128Op.Ne)) -let i8x16_lt_s = VecBinary (V128 (I8x16 V128Op.LtS)) -let i8x16_lt_u = VecBinary (V128 (I8x16 V128Op.LtU)) -let i8x16_le_s = VecBinary (V128 (I8x16 V128Op.LeS)) -let i8x16_le_u = VecBinary (V128 (I8x16 V128Op.LeU)) -let i8x16_gt_s = VecBinary (V128 (I8x16 V128Op.GtS)) -let i8x16_gt_u = VecBinary (V128 (I8x16 V128Op.GtU)) -let i8x16_ge_s = VecBinary (V128 (I8x16 V128Op.GeS)) -let i8x16_ge_u = VecBinary (V128 (I8x16 V128Op.GeU)) +let i8x16_eq = VecCompare (V128 (I8x16 V128Op.Eq)) +let i8x16_ne = VecCompare (V128 (I8x16 V128Op.Ne)) +let i8x16_lt_s = VecCompare (V128 (I8x16 V128Op.LtS)) +let i8x16_lt_u = VecCompare (V128 (I8x16 V128Op.LtU)) +let i8x16_le_s = VecCompare (V128 (I8x16 V128Op.LeS)) +let i8x16_le_u = VecCompare (V128 (I8x16 V128Op.LeU)) +let i8x16_gt_s = VecCompare (V128 (I8x16 V128Op.GtS)) +let i8x16_gt_u = VecCompare (V128 (I8x16 V128Op.GtU)) +let i8x16_ge_s = VecCompare (V128 (I8x16 V128Op.GeS)) +let i8x16_ge_u = VecCompare (V128 (I8x16 V128Op.GeU)) let i8x16_neg = VecUnary (V128 (I8x16 V128Op.Neg)) let i8x16_bitmask = VecBitmask (V128 (I8x16 V128Op.Bitmask)) let i8x16_all_true = VecTest (V128 (I8x16 V128Op.AllTrue)) let i8x16_narrow_i16x8_s = VecBinary (V128 (I8x16 V128Op.NarrowS)) let i8x16_narrow_i16x8_u = VecBinary (V128 (I8x16 V128Op.NarrowU)) -let i16x8_extend_low_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtendLowS)) -let i16x8_extend_high_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtendHighS)) -let i16x8_extend_low_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtendLowU)) -let i16x8_extend_high_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtendHighU)) +let i16x8_extend_low_i8x16_s = VecConvert (V128 (I16x8 V128Op.ExtendLowS)) +let i16x8_extend_high_i8x16_s = VecConvert (V128 (I16x8 V128Op.ExtendHighS)) +let i16x8_extend_low_i8x16_u = VecConvert (V128 (I16x8 V128Op.ExtendLowU)) +let i16x8_extend_high_i8x16_u = VecConvert (V128 (I16x8 V128Op.ExtendHighU)) let i8x16_shl = VecShift (V128 (I8x16 V128Op.Shl)) let i8x16_shr_s = VecShift (V128 (I8x16 V128Op.ShrS)) let i8x16_shr_u = VecShift (V128 (I8x16 V128Op.ShrU)) @@ -335,16 +335,16 @@ let i16x8_splat = VecSplat (V128 (I16x8 V128Op.Splat)) let i16x8_extract_lane_s i = VecExtract (V128 (I16x8 (V128Op.Extract (i, SX)))) let i16x8_extract_lane_u i = VecExtract (V128 (I16x8 (V128Op.Extract (i, ZX)))) let i16x8_replace_lane i = VecReplace (V128 (I16x8 (V128Op.Replace i))) -let i16x8_eq = VecBinary (V128 (I16x8 V128Op.Eq)) -let i16x8_ne = VecBinary (V128 (I16x8 V128Op.Ne)) -let i16x8_lt_s = VecBinary (V128 (I16x8 V128Op.LtS)) -let i16x8_lt_u = VecBinary (V128 (I16x8 V128Op.LtU)) -let i16x8_le_s = VecBinary (V128 (I16x8 V128Op.LeS)) -let i16x8_le_u = VecBinary (V128 (I16x8 V128Op.LeU)) -let i16x8_gt_s = VecBinary (V128 (I16x8 V128Op.GtS)) -let i16x8_gt_u = VecBinary (V128 (I16x8 V128Op.GtU)) -let i16x8_ge_s = VecBinary (V128 (I16x8 V128Op.GeS)) -let i16x8_ge_u = VecBinary (V128 (I16x8 V128Op.GeU)) +let i16x8_eq = VecCompare (V128 (I16x8 V128Op.Eq)) +let i16x8_ne = VecCompare (V128 (I16x8 V128Op.Ne)) +let i16x8_lt_s = VecCompare (V128 (I16x8 V128Op.LtS)) +let i16x8_lt_u = VecCompare (V128 (I16x8 V128Op.LtU)) +let i16x8_le_s = VecCompare (V128 (I16x8 V128Op.LeS)) +let i16x8_le_u = VecCompare (V128 (I16x8 V128Op.LeU)) +let i16x8_gt_s = VecCompare (V128 (I16x8 V128Op.GtS)) +let i16x8_gt_u = VecCompare (V128 (I16x8 V128Op.GtU)) +let i16x8_ge_s = VecCompare (V128 (I16x8 V128Op.GeS)) +let i16x8_ge_u = VecCompare (V128 (I16x8 V128Op.GeU)) let i16x8_neg = VecUnary (V128 (I16x8 V128Op.Neg)) let i16x8_bitmask = VecBitmask (V128 (I16x8 V128Op.Bitmask)) let i16x8_all_true = VecTest (V128 (I16x8 V128Op.AllTrue)) @@ -371,30 +371,30 @@ let i16x8_extmul_high_i8x16_s = VecBinary (V128 (I16x8 V128Op.ExtMulHighS)) let i16x8_extmul_low_i8x16_u = VecBinary (V128 (I16x8 V128Op.ExtMulLowU)) let i16x8_extmul_high_i8x16_u = VecBinary (V128 (I16x8 V128Op.ExtMulHighU)) let i16x8_q15mulr_sat_s = VecBinary (V128 (I16x8 V128Op.Q15MulRSatS)) -let i16x8_extadd_pairwise_i8x16_s = VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseS)) -let i16x8_extadd_pairwise_i8x16_u = VecUnary (V128 (I16x8 V128Op.ExtAddPairwiseU)) +let i16x8_extadd_pairwise_i8x16_s = VecConvert (V128 (I16x8 V128Op.ExtAddPairwiseS)) +let i16x8_extadd_pairwise_i8x16_u = VecConvert (V128 (I16x8 V128Op.ExtAddPairwiseU)) let i32x4_splat = VecSplat (V128 (I32x4 V128Op.Splat)) let i32x4_extract_lane i = VecExtract (V128 (I32x4 (V128Op.Extract (i, ())))) let i32x4_replace_lane i = VecReplace (V128 (I32x4 (V128Op.Replace i))) -let i32x4_eq = VecBinary (V128 (I32x4 V128Op.Eq)) -let i32x4_ne = VecBinary (V128 (I32x4 V128Op.Ne)) -let i32x4_lt_s = VecBinary (V128 (I32x4 V128Op.LtS)) -let i32x4_lt_u = VecBinary (V128 (I32x4 V128Op.LtU)) -let i32x4_le_s = VecBinary (V128 (I32x4 V128Op.LeS)) -let i32x4_le_u = VecBinary (V128 (I32x4 V128Op.LeU)) -let i32x4_gt_s = VecBinary (V128 (I32x4 V128Op.GtS)) -let i32x4_gt_u = VecBinary (V128 (I32x4 V128Op.GtU)) -let i32x4_ge_s = VecBinary (V128 (I32x4 V128Op.GeS)) -let i32x4_ge_u = VecBinary (V128 (I32x4 V128Op.GeU)) +let i32x4_eq = VecCompare (V128 (I32x4 V128Op.Eq)) +let i32x4_ne = VecCompare (V128 (I32x4 V128Op.Ne)) +let i32x4_lt_s = VecCompare (V128 (I32x4 V128Op.LtS)) +let i32x4_lt_u = VecCompare (V128 (I32x4 V128Op.LtU)) +let i32x4_le_s = VecCompare (V128 (I32x4 V128Op.LeS)) +let i32x4_le_u = VecCompare (V128 (I32x4 V128Op.LeU)) +let i32x4_gt_s = VecCompare (V128 (I32x4 V128Op.GtS)) +let i32x4_gt_u = VecCompare (V128 (I32x4 V128Op.GtU)) +let i32x4_ge_s = VecCompare (V128 (I32x4 V128Op.GeS)) +let i32x4_ge_u = VecCompare (V128 (I32x4 V128Op.GeU)) let i32x4_abs = VecUnary (V128 (I32x4 V128Op.Abs)) let i32x4_neg = VecUnary (V128 (I32x4 V128Op.Neg)) let i32x4_bitmask = VecBitmask (V128 (I32x4 V128Op.Bitmask)) let i32x4_all_true = VecTest (V128 (I32x4 V128Op.AllTrue)) -let i32x4_extend_low_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtendLowS)) -let i32x4_extend_high_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtendHighS)) -let i32x4_extend_low_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtendLowU)) -let i32x4_extend_high_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtendHighU)) +let i32x4_extend_low_i16x8_s = VecConvert (V128 (I32x4 V128Op.ExtendLowS)) +let i32x4_extend_high_i16x8_s = VecConvert (V128 (I32x4 V128Op.ExtendHighS)) +let i32x4_extend_low_i16x8_u = VecConvert (V128 (I32x4 V128Op.ExtendLowU)) +let i32x4_extend_high_i16x8_u = VecConvert (V128 (I32x4 V128Op.ExtendHighU)) let i32x4_shl = VecShift (V128 (I32x4 V128Op.Shl)) let i32x4_shr_s = VecShift (V128 (I32x4 V128Op.ShrS)) let i32x4_shr_u = VecShift (V128 (I32x4 V128Op.ShrU)) @@ -406,30 +406,30 @@ let i32x4_max_s = VecBinary (V128 (I32x4 V128Op.MaxS)) let i32x4_max_u = VecBinary (V128 (I32x4 V128Op.MaxU)) let i32x4_mul = VecBinary (V128 (I32x4 V128Op.Mul)) let i32x4_dot_i16x8_s = VecBinary (V128 (I32x4 V128Op.DotS)) -let i32x4_trunc_sat_f32x4_s = VecUnary (V128 (I32x4 V128Op.TruncSatSF32x4)) -let i32x4_trunc_sat_f32x4_u = VecUnary (V128 (I32x4 V128Op.TruncSatUF32x4)) -let i32x4_trunc_sat_f64x2_s_zero = VecUnary (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) -let i32x4_trunc_sat_f64x2_u_zero = VecUnary (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) +let i32x4_trunc_sat_f32x4_s = VecConvert (V128 (I32x4 V128Op.TruncSatSF32x4)) +let i32x4_trunc_sat_f32x4_u = VecConvert (V128 (I32x4 V128Op.TruncSatUF32x4)) +let i32x4_trunc_sat_f64x2_s_zero = VecConvert (V128 (I32x4 V128Op.TruncSatSZeroF64x2)) +let i32x4_trunc_sat_f64x2_u_zero = VecConvert (V128 (I32x4 V128Op.TruncSatUZeroF64x2)) let i32x4_extmul_low_i16x8_s = VecBinary (V128 (I32x4 V128Op.ExtMulLowS)) let i32x4_extmul_high_i16x8_s = VecBinary (V128 (I32x4 V128Op.ExtMulHighS)) let i32x4_extmul_low_i16x8_u = VecBinary (V128 (I32x4 V128Op.ExtMulLowU)) let i32x4_extmul_high_i16x8_u = VecBinary (V128 (I32x4 V128Op.ExtMulHighU)) -let i32x4_extadd_pairwise_i16x8_s = VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseS)) -let i32x4_extadd_pairwise_i16x8_u = VecUnary (V128 (I32x4 V128Op.ExtAddPairwiseU)) +let i32x4_extadd_pairwise_i16x8_s = VecConvert (V128 (I32x4 V128Op.ExtAddPairwiseS)) +let i32x4_extadd_pairwise_i16x8_u = VecConvert (V128 (I32x4 V128Op.ExtAddPairwiseU)) let i64x2_splat = VecSplat (V128 (I64x2 V128Op.Splat)) let i64x2_extract_lane i = VecExtract (V128 (I64x2 (V128Op.Extract (i, ())))) let i64x2_replace_lane i = VecReplace (V128 (I64x2 (V128Op.Replace i))) -let i64x2_extend_low_i32x4_s = VecUnary (V128 (I64x2 V128Op.ExtendLowS)) -let i64x2_extend_high_i32x4_s = VecUnary (V128 (I64x2 V128Op.ExtendHighS)) -let i64x2_extend_low_i32x4_u = VecUnary (V128 (I64x2 V128Op.ExtendLowU)) -let i64x2_extend_high_i32x4_u = VecUnary (V128 (I64x2 V128Op.ExtendHighU)) -let i64x2_eq = VecBinary (V128 (I64x2 V128Op.Eq)) -let i64x2_ne = VecBinary (V128 (I64x2 V128Op.Ne)) -let i64x2_lt_s = VecBinary (V128 (I64x2 V128Op.LtS)) -let i64x2_le_s = VecBinary (V128 (I64x2 V128Op.LeS)) -let i64x2_gt_s = VecBinary (V128 (I64x2 V128Op.GtS)) -let i64x2_ge_s = VecBinary (V128 (I64x2 V128Op.GeS)) +let i64x2_extend_low_i32x4_s = VecConvert (V128 (I64x2 V128Op.ExtendLowS)) +let i64x2_extend_high_i32x4_s = VecConvert (V128 (I64x2 V128Op.ExtendHighS)) +let i64x2_extend_low_i32x4_u = VecConvert (V128 (I64x2 V128Op.ExtendLowU)) +let i64x2_extend_high_i32x4_u = VecConvert (V128 (I64x2 V128Op.ExtendHighU)) +let i64x2_eq = VecCompare (V128 (I64x2 V128Op.Eq)) +let i64x2_ne = VecCompare (V128 (I64x2 V128Op.Ne)) +let i64x2_lt_s = VecCompare (V128 (I64x2 V128Op.LtS)) +let i64x2_le_s = VecCompare (V128 (I64x2 V128Op.LeS)) +let i64x2_gt_s = VecCompare (V128 (I64x2 V128Op.GtS)) +let i64x2_ge_s = VecCompare (V128 (I64x2 V128Op.GeS)) let i64x2_abs = VecUnary (V128 (I64x2 V128Op.Abs)) let i64x2_neg = VecUnary (V128 (I64x2 V128Op.Neg)) let i64x2_bitmask = VecBitmask (V128 (I64x2 V128Op.Bitmask)) @@ -448,12 +448,12 @@ let i64x2_extmul_high_i32x4_u = VecBinary (V128 (I64x2 V128Op.ExtMulHighU)) let f32x4_splat = VecSplat (V128 (F32x4 V128Op.Splat)) let f32x4_extract_lane i = VecExtract (V128 (F32x4 (V128Op.Extract (i, ())))) let f32x4_replace_lane i = VecReplace (V128 (F32x4 (V128Op.Replace i))) -let f32x4_eq = VecBinary (V128 (F32x4 V128Op.Eq)) -let f32x4_ne = VecBinary (V128 (F32x4 V128Op.Ne)) -let f32x4_lt = VecBinary (V128 (F32x4 V128Op.Lt)) -let f32x4_le = VecBinary (V128 (F32x4 V128Op.Le)) -let f32x4_gt = VecBinary (V128 (F32x4 V128Op.Gt)) -let f32x4_ge = VecBinary (V128 (F32x4 V128Op.Ge)) +let f32x4_eq = VecCompare (V128 (F32x4 V128Op.Eq)) +let f32x4_ne = VecCompare (V128 (F32x4 V128Op.Ne)) +let f32x4_lt = VecCompare (V128 (F32x4 V128Op.Lt)) +let f32x4_le = VecCompare (V128 (F32x4 V128Op.Le)) +let f32x4_gt = VecCompare (V128 (F32x4 V128Op.Gt)) +let f32x4_ge = VecCompare (V128 (F32x4 V128Op.Ge)) let f32x4_abs = VecUnary (V128 (F32x4 V128Op.Abs)) let f32x4_neg = VecUnary (V128 (F32x4 V128Op.Neg)) let f32x4_sqrt = VecUnary (V128 (F32x4 V128Op.Sqrt)) @@ -469,19 +469,19 @@ let f32x4_min = VecBinary (V128 (F32x4 V128Op.Min)) let f32x4_max = VecBinary (V128 (F32x4 V128Op.Max)) let f32x4_pmin = VecBinary (V128 (F32x4 V128Op.Pmin)) let f32x4_pmax = VecBinary (V128 (F32x4 V128Op.Pmax)) -let f32x4_demote_f64x2_zero = VecUnary (V128 (F32x4 V128Op.DemoteZeroF64x2)) -let f32x4_convert_i32x4_s = VecUnary (V128 (F32x4 V128Op.ConvertSI32x4)) -let f32x4_convert_i32x4_u = VecUnary (V128 (F32x4 V128Op.ConvertUI32x4)) +let f32x4_demote_f64x2_zero = VecConvert (V128 (F32x4 V128Op.DemoteZeroF64x2)) +let f32x4_convert_i32x4_s = VecConvert (V128 (F32x4 V128Op.ConvertSI32x4)) +let f32x4_convert_i32x4_u = VecConvert (V128 (F32x4 V128Op.ConvertUI32x4)) let f64x2_splat = VecSplat (V128 (F64x2 V128Op.Splat)) let f64x2_extract_lane i = VecExtract (V128 (F64x2 (V128Op.Extract (i, ())))) let f64x2_replace_lane i = VecReplace (V128 (F64x2 (V128Op.Replace i))) -let f64x2_eq = VecBinary (V128 (F64x2 V128Op.Eq)) -let f64x2_ne = VecBinary (V128 (F64x2 V128Op.Ne)) -let f64x2_lt = VecBinary (V128 (F64x2 V128Op.Lt)) -let f64x2_le = VecBinary (V128 (F64x2 V128Op.Le)) -let f64x2_gt = VecBinary (V128 (F64x2 V128Op.Gt)) -let f64x2_ge = VecBinary (V128 (F64x2 V128Op.Ge)) +let f64x2_eq = VecCompare (V128 (F64x2 V128Op.Eq)) +let f64x2_ne = VecCompare (V128 (F64x2 V128Op.Ne)) +let f64x2_lt = VecCompare (V128 (F64x2 V128Op.Lt)) +let f64x2_le = VecCompare (V128 (F64x2 V128Op.Le)) +let f64x2_gt = VecCompare (V128 (F64x2 V128Op.Gt)) +let f64x2_ge = VecCompare (V128 (F64x2 V128Op.Ge)) let f64x2_neg = VecUnary (V128 (F64x2 V128Op.Neg)) let f64x2_sqrt = VecUnary (V128 (F64x2 V128Op.Sqrt)) let f64x2_ceil = VecUnary (V128 (F64x2 V128Op.Ceil)) @@ -497,6 +497,6 @@ let f64x2_max = VecBinary (V128 (F64x2 V128Op.Max)) let f64x2_abs = VecUnary (V128 (F64x2 V128Op.Abs)) let f64x2_pmin = VecBinary (V128 (F64x2 V128Op.Pmin)) let f64x2_pmax = VecBinary (V128 (F64x2 V128Op.Pmax)) -let f64x2_promote_low_f32x4 = VecUnary (V128 (F64x2 V128Op.PromoteLowF32x4)) -let f64x2_convert_low_i32x4_s = VecUnary (V128 (F64x2 V128Op.ConvertSI32x4)) -let f64x2_convert_low_i32x4_u = VecUnary (V128 (F64x2 V128Op.ConvertUI32x4)) +let f64x2_promote_low_f32x4 = VecConvert (V128 (F64x2 V128Op.PromoteLowF32x4)) +let f64x2_convert_low_i32x4_s = VecConvert (V128 (F64x2 V128Op.ConvertSI32x4)) +let f64x2_convert_low_i32x4_u = VecConvert (V128 (F64x2 V128Op.ConvertUI32x4)) diff --git a/interpreter/text/arrange.ml b/interpreter/text/arrange.ml index 4825660482..cdcd4f84db 100644 --- a/interpreter/text/arrange.ml +++ b/interpreter/text/arrange.ml @@ -222,16 +222,6 @@ struct | Neg -> "neg" | Abs -> "abs" | Popcnt -> "popcnt" - | ExtendLowS -> "extend_low_i" ^ half xxxx ^ "_s" - | ExtendLowU -> "extend_low_i" ^ half xxxx ^ "_u" - | ExtendHighS -> "extend_high_i" ^ half xxxx ^ "_s" - | ExtendHighU -> "extend_high_i" ^ half xxxx ^ "_u" - | ExtAddPairwiseS -> "extadd_pairwise_i" ^ half xxxx ^ "_s" - | ExtAddPairwiseU -> "extadd_pairwise_i" ^ half xxxx ^ "_u" - | TruncSatSF32x4 -> "trunc_sat_f32x4_s" - | TruncSatUF32x4 -> "trunc_sat_f32x4_u" - | TruncSatSZeroF64x2 -> "trunc_sat_f64x2_s_zero" - | TruncSatUZeroF64x2 -> "trunc_sat_f64x2_u_zero" let funop xxxx (op : funop) = match op with | Neg -> "neg" @@ -241,24 +231,8 @@ struct | Floor -> "floor" | Trunc -> "trunc" | Nearest -> "nearest" - | DemoteZeroF64x2 -> "demote_f64x2_zero" - | PromoteLowF32x4 -> "promote_low_f32x4" - | ConvertSI32x4 -> - "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_s" - | ConvertUI32x4 -> - "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_u" let ibinop xxxx (op : ibinop) = match op with - | Eq -> "eq" - | Ne -> "ne" - | LtS -> "lt_s" - | LtU -> "lt_u" - | GtS -> "gt_s" - | GtU -> "gt_u" - | LeS -> "le_s" - | LeU -> "le_u" - | GeS -> "ge_s" - | GeU -> "ge_u" | Add -> "add" | AddSatS -> "add_sat_s" | AddSatU -> "add_sat_u" @@ -283,12 +257,6 @@ struct | Swizzle -> "swizzle" let fbinop xxxx (op : fbinop) = match op with - | Eq -> "eq" - | Ne -> "ne" - | Lt -> "lt" - | Le -> "le" - | Gt -> "gt" - | Ge -> "ge" | Add -> "add" | Sub -> "sub" | Mul -> "mul" @@ -298,6 +266,46 @@ struct | Pmin -> "pmin" | Pmax -> "pmax" + let irelop xxxx (op : irelop) = match op with + | Eq -> "eq" + | Ne -> "ne" + | LtS -> "lt_s" + | LtU -> "lt_u" + | GtS -> "gt_s" + | GtU -> "gt_u" + | LeS -> "le_s" + | LeU -> "le_u" + | GeS -> "ge_s" + | GeU -> "ge_u" + + let frelop xxxx (op : frelop) = match op with + | Eq -> "eq" + | Ne -> "ne" + | Lt -> "lt" + | Le -> "le" + | Gt -> "gt" + | Ge -> "ge" + + let icvtop xxxx (op : icvtop) = match op with + | ExtendLowS -> "extend_low_i" ^ half xxxx ^ "_s" + | ExtendLowU -> "extend_low_i" ^ half xxxx ^ "_u" + | ExtendHighS -> "extend_high_i" ^ half xxxx ^ "_s" + | ExtendHighU -> "extend_high_i" ^ half xxxx ^ "_u" + | ExtAddPairwiseS -> "extadd_pairwise_i" ^ half xxxx ^ "_s" + | ExtAddPairwiseU -> "extadd_pairwise_i" ^ half xxxx ^ "_u" + | TruncSatSF32x4 -> "trunc_sat_f32x4_s" + | TruncSatUF32x4 -> "trunc_sat_f32x4_u" + | TruncSatSZeroF64x2 -> "trunc_sat_f64x2_s_zero" + | TruncSatUZeroF64x2 -> "trunc_sat_f64x2_u_zero" + + let fcvtop xxxx (op : fcvtop) = match op with + | DemoteZeroF64x2 -> "demote_f64x2_zero" + | PromoteLowF32x4 -> "promote_low_f32x4" + | ConvertSI32x4 -> + "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_s" + | ConvertUI32x4 -> + "convert_" ^ (if xxxx = "32x4" then "" else "low_") ^ "i32x4_u" + let ishiftop xxxx (op : ishiftop) = match op with | Shl -> "shl" | ShrS -> "shr_s" @@ -369,13 +377,14 @@ let cvtop = oper (IntOp.cvtop, FloatOp.cvtop) let vec_unop = vec_shape_oper (V128Op.iunop, V128Op.iunop, V128Op.funop) let vec_binop = vec_shape_oper (V128Op.ibinop, V128Op.ibinop, V128Op.fbinop) let vec_testop = vec_shape_oper (V128Op.itestop, V128Op.itestop, V128Op.voidop) +let vec_relop = vec_shape_oper (V128Op.irelop, V128Op.irelop, V128Op.frelop) +let vec_cvtop = vec_shape_oper (V128Op.icvtop, V128Op.icvtop, V128Op.fcvtop) +let vec_shiftop = vec_shape_oper (V128Op.ishiftop, V128Op.ishiftop, V128Op.voidop) +let vec_bitmaskop = vec_shape_oper (V128Op.ibitmaskop, V128Op.ibitmaskop, V128Op.voidop) let vec_vunop = vec_oper (V128Op.vunop) let vec_vbinop = vec_oper (V128Op.vbinop) let vec_vternop = vec_oper (V128Op.vternop) let vec_vtestop = vec_oper (V128Op.vtestop) -let vec_shiftop = vec_shape_oper (V128Op.ishiftop, V128Op.ishiftop, V128Op.voidop) -let vec_bitmaskop = vec_shape_oper (V128Op.ibitmaskop, V128Op.ibitmaskop, V128Op.voidop) - let vec_splatop = vec_shape_oper (V128Op.splatop, V128Op.splatop, V128Op.splatop) let vec_extractop = vec_shape_oper (V128Op.pextractop, V128Op.extractop, V128Op.extractop) let vec_replaceop = vec_shape_oper (V128Op.replaceop, V128Op.replaceop, V128Op.replaceop) @@ -482,12 +491,14 @@ let rec instr e = | VecTest op -> vec_testop op, [] | VecUnary op -> vec_unop op, [] | VecBinary op -> vec_binop op, [] + | VecCompare op -> vec_relop op, [] + | VecConvert op -> vec_cvtop op, [] + | VecShift op -> vec_shiftop op, [] + | VecBitmask op -> vec_bitmaskop op, [] | VecTestBits op -> vec_vtestop op, [] | VecUnaryBits op -> vec_vunop op, [] | VecBinaryBits op -> vec_vbinop op, [] | VecTernaryBits op -> vec_vternop op, [] - | VecShift op -> vec_shiftop op, [] - | VecBitmask op -> vec_bitmaskop op, [] | VecSplat op -> vec_splatop op, [] | VecExtract op -> vec_extractop op, [] | VecReplace op -> vec_replaceop op, [] diff --git a/interpreter/valid/valid.ml b/interpreter/valid/valid.ml index c65f86323a..780404e509 100644 --- a/interpreter/valid/valid.ml +++ b/interpreter/valid/valid.ml @@ -463,6 +463,22 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type let t = VecType (type_vec binop) in [t; t] --> [t] + | VecCompare relop -> + let t = VecType (type_vec relop) in + [t; t] --> [t] + + | VecConvert cvtop -> + let t = VecType (type_vec cvtop) in + [t] --> [t] + + | VecShift shiftop -> + let t = VecType (type_vec shiftop) in + [t; NumType I32Type] --> [VecType V128Type] + + | VecBitmask bitmaskop -> + let t = VecType (type_vec bitmaskop) in + [t] --> [NumType I32Type] + | VecTestBits vtestop -> let t = VecType (type_vec vtestop) in [t] --> [NumType I32Type] @@ -479,14 +495,6 @@ let rec check_instr (c : context) (e : instr) (s : infer_result_type) : op_type let t = VecType (type_vec vternop) in [t; t; t] --> [t] - | VecShift shiftop -> - let t = VecType (type_vec shiftop) in - [t; NumType I32Type] --> [VecType V128Type] - - | VecBitmask bitmaskop -> - let t = VecType (type_vec bitmaskop) in - [t] --> [NumType I32Type] - | VecSplat splatop -> let t1 = type_vec_lane splatop in let t2 = VecType (type_vec splatop) in From b3f039befa76bf72528ad8c0d2f4d5549f95e98b Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 11 Aug 2021 11:09:41 +0200 Subject: [PATCH 364/378] Rename \vs-ops --- .../core/appendix/gen-index-instructions.py | 38 ++++++------- document/core/appendix/index-instructions.rst | 38 ++++++------- document/core/exec/instructions.rst | 56 +++++++++---------- document/core/syntax/instructions.rst | 30 +++++----- document/core/text/instructions.rst | 10 ++-- document/core/util/macros.def | 10 ++-- document/core/valid/instructions.rst | 32 +++++------ 7 files changed, 107 insertions(+), 107 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 0e6f358f30..3f3b1eb594 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -416,13 +416,13 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), - Instruction(r'\V128.\VNOT', r'\hex{FD}~~\hex{4D}', r'[\V128] \to [\V128]', r'valid-vsunop', r'exec-vsunop', r'op-inot'), - Instruction(r'\V128.\VAND', r'\hex{FD}~~\hex{4E}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iand'), - Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~\hex{4F}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-iandnot'), - Instruction(r'\V128.\VOR', r'\hex{FD}~~\hex{50}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ior'), - Instruction(r'\V128.\VXOR', r'\hex{FD}~~\hex{51}', r'[\V128~\V128] \to [\V128]', r'valid-vsbinop', r'exec-vsbinop', r'op-ixor'), - Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~\hex{52}', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vsternop', r'exec-vsternop', r'op-ibitselect'), - Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~\hex{53}', r'[\V128] \to [\I32]', r'valid-vstestop', r'exec-vstestop'), + Instruction(r'\V128.\VNOT', r'\hex{FD}~~\hex{4D}', r'[\V128] \to [\V128]', r'valid-vvunop', r'exec-vvunop', r'op-inot'), + Instruction(r'\V128.\VAND', r'\hex{FD}~~\hex{4E}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iand'), + Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~\hex{4F}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iandnot'), + Instruction(r'\V128.\VOR', r'\hex{FD}~~\hex{50}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-ior'), + Instruction(r'\V128.\VXOR', r'\hex{FD}~~\hex{51}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-ixor'), + Instruction(r'\V128.\BITSELECT', r'\hex{FD}~~\hex{52}', r'[\V128~\V128~\V128] \to [\V128]', r'valid-vvternop', r'exec-vvternop', r'op-ibitselect'), + Instruction(r'\V128.\ANYTRUE', r'\hex{FD}~~\hex{53}', r'[\V128] \to [\I32]', r'valid-vvtestop', r'exec-vvtestop'), Instruction(r'\V128.\LOAD\K{8\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{54}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), Instruction(r'\V128.\LOAD\K{16\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{55}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), Instruction(r'\V128.\LOAD\K{32\_lane}~\memarg~\laneidx', r'\hex{FD}~~\hex{56}', r'[\I32~\V128] \to [\V128]', r'valid-load-lane', r'exec-load-lane'), @@ -446,9 +446,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F32X4.\VFLOOR', r'\hex{FD}~~\hex{68}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), Instruction(r'\F32X4.\VTRUNC', r'\hex{FD}~~\hex{69}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), Instruction(r'\F32X4.\VNEAREST', r'\hex{FD}~~\hex{6A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fnearest'), - Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~\hex{6B}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~\hex{6C}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~\hex{6D}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I8X16.\VSHL', r'\hex{FD}~~\hex{6B}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishl'), + Instruction(r'\I8X16.\VSHR\K{\_s}', r'\hex{FD}~~\hex{6C}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_s'), + Instruction(r'\I8X16.\VSHR\K{\_u}', r'\hex{FD}~~\hex{6D}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_u'), Instruction(r'\I8X16.\VADD', r'\hex{FD}~~\hex{6E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), Instruction(r'\I8X16.\VADD\K{\_sat\_s}', r'\hex{FD}~~\hex{6F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), Instruction(r'\I8X16.\VADD\K{\_sat\_u}', r'\hex{FD}~~\hex{70}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), @@ -478,9 +478,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{88}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{89}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{8A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~\hex{8B}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~\hex{8C}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~\hex{8D}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I16X8.\VSHL', r'\hex{FD}~~\hex{8B}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishl'), + Instruction(r'\I16X8.\VSHR\K{\_s}', r'\hex{FD}~~\hex{8C}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_s'), + Instruction(r'\I16X8.\VSHR\K{\_u}', r'\hex{FD}~~\hex{8D}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_u'), Instruction(r'\I16X8.\VADD', r'\hex{FD}~~\hex{8E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), Instruction(r'\I16X8.\VADD\K{\_sat\_s}', r'\hex{FD}~~\hex{8F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_s'), Instruction(r'\I16X8.\VADD\K{\_sat\_u}', r'\hex{FD}~~\hex{90}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd_sat_u'), @@ -506,9 +506,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{A8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{A9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{AA}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~\hex{AB}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~\hex{AC}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~\hex{AD}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I32X4.\VSHL', r'\hex{FD}~~\hex{AB}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishl'), + Instruction(r'\I32X4.\VSHR\K{\_s}', r'\hex{FD}~~\hex{AC}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_s'), + Instruction(r'\I32X4.\VSHR\K{\_u}', r'\hex{FD}~~\hex{AD}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_u'), Instruction(r'\I32X4.\VADD', r'\hex{FD}~~\hex{AE}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), Instruction(r'\I32X4.\VSUB', r'\hex{FD}~~\hex{B1}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I32X4.\VMUL', r'\hex{FD}~~\hex{B5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), @@ -529,9 +529,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{C8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{C9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{CA}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), - Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~\hex{CB}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishl'), - Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~\hex{CC}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_s'), - Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~\hex{CD}', r'[\V128~\I32] \to [\V128]', r'valid-vshiftop', r'exec-vshiftop', r'op-ishr_u'), + Instruction(r'\I64X2.\VSHL', r'\hex{FD}~~\hex{CB}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishl'), + Instruction(r'\I64X2.\VSHR\K{\_s}', r'\hex{FD}~~\hex{CC}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_s'), + Instruction(r'\I64X2.\VSHR\K{\_u}', r'\hex{FD}~~\hex{CD}', r'[\V128~\I32] \to [\V128]', r'valid-vishiftop', r'exec-vishiftop', r'op-ishr_u'), Instruction(r'\I64X2.\VADD', r'\hex{FD}~~\hex{CE}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iadd'), Instruction(r'\I64X2.\VSUB', r'\hex{FD}~~\hex{D1}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-isub'), Instruction(r'\I64X2.\VMUL', r'\hex{FD}~~\hex{D5}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imul'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index c3d6fb76a3..0a2e93832c 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -364,13 +364,13 @@ Instruction Binary Opcode T :math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` :math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` @@ -394,9 +394,9 @@ Instruction Binary Opcode T :math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -426,9 +426,9 @@ Instruction Binary Opcode T :math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -454,9 +454,9 @@ Instruction Binary Opcode T :math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` @@ -477,9 +477,9 @@ Instruction Binary Opcode T :math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` :math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 8e7bbd254b..70ce9a051b 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -283,54 +283,54 @@ Most SIMD instructions are defined in terms of generic numeric operators applied No formal reduction rule is required for this instruction, since |VCONST| instructions coincide with :ref:`values `. -.. _exec-vsunop: +.. _exec-vvunop: -:math:`\V128\K{.}\vsunop` +:math:`\V128\K{.}\vvunop` ......................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. Let :math:`c` be the result of computing :math:`\vsunop_{\I128}(c_1)`. +3. Let :math:`c` be the result of computing :math:`\vvunop_{\I128}(c_1)`. 4. Push the value :math:`\V128.\VCONST~c` to the stack. .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~\V128\K{.}\vsunop &\stepto& (\V128\K{.}\VCONST~c) - & (\iff c = \vsunop_{\I128}(c_1)) \\ + (\V128\K{.}\VCONST~c_1)~\V128\K{.}\vvunop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vvunop_{\I128}(c_1)) \\ \end{array} -.. _exec-vsbinop: +.. _exec-vvbinop: -:math:`\V128\K{.}\vsbinop` +:math:`\V128\K{.}\vvbinop` .......................... -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. 3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -4. Let :math:`c` be the result of computing :math:`\vsbinop_{\I128}(c_1, c_2)`. +4. Let :math:`c` be the result of computing :math:`\vvbinop_{\I128}(c_1, c_2)`. 5. Push the value :math:`\V128.\VCONST~c` to the stack. .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vsbinop &\stepto& (\V128\K{.}\VCONST~c) - & (\iff c = \vsbinop_{\I128}(c_1, c_2)) \\ + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~\V128\K{.}\vvbinop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vvbinop_{\I128}(c_1, c_2)) \\ \end{array} -.. _exec-vsternop: +.. _exec-vvternop: -:math:`\V128\K{.}\vsternop` +:math:`\V128\K{.}\vvternop` ........................... -1. Assert: due to :ref:`validation `, three values of :ref:`value type ` |V128| are on the top of the stack. +1. Assert: due to :ref:`validation `, three values of :ref:`value type ` |V128| are on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_3` from the stack. @@ -338,24 +338,24 @@ Most SIMD instructions are defined in terms of generic numeric operators applied 4. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -5. Let :math:`c` be the result of computing :math:`\vsternop_{\I128}(c_1, c_2, c_3)`. +5. Let :math:`c` be the result of computing :math:`\vvternop_{\I128}(c_1, c_2, c_3)`. 6. Push the value :math:`\V128.\VCONST~c` to the stack. .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~(\V128\K{.}\VCONST~c_3)~\V128\K{.}\vsternop &\stepto& (\V128\K{.}\VCONST~c) - & (\iff c = \vsternop_{\I128}(c_1, c_2, c_3)) \\ + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~(\V128\K{.}\VCONST~c_3)~\V128\K{.}\vvternop &\stepto& (\V128\K{.}\VCONST~c) + & (\iff c = \vvternop_{\I128}(c_1, c_2, c_3)) \\ \end{array} -.. _exec-vstestop: +.. _exec-vvtestop: .. _exec-simd-any_true: :math:`\V128\K{.}\ANYTRUE` .......................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -616,34 +616,34 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-vshiftop: +.. _exec-vishiftop: -:math:`t\K{x}N\K{.}\vshiftop` -............................. +:math:`t\K{x}N\K{.}\vishiftop` +.............................. -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |I32| is on the top of the stack. 2. Pop the value :math:`\I32.\CONST~s` from the stack. -3. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +3. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 4. Pop the value :math:`\V128.\VCONST~c_1` from the stack. 5. Let :math:`i^\ast` be the sequence :math:`\lanes_{t\K{x}N}(c_1)`. -6. Let :math:`c` be :math:`\lanes^{-1}_{t\K{x}N}(\vshiftop_{t}(i^\ast, s^N))`. +6. Let :math:`c` be :math:`\lanes^{-1}_{t\K{x}N}(\vishiftop_{t}(i^\ast, s^N))`. 7. Push the value :math:`\V128.\VCONST~c` to the stack. .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\I32\K{.}\CONST~s)~t\K{x}N\K{.}\vshiftop &\stepto& (\V128\K{.}\VCONST~c) + (\V128\K{.}\VCONST~c_1)~(\I32\K{.}\CONST~s)~t\K{x}N\K{.}\vishiftop &\stepto& (\V128\K{.}\VCONST~c) \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} (\iff & i^\ast = \lanes_{t\K{x}N}(c_1) \\ - \wedge & c = \lanes^{-1}_{t\K{x}N}(\vshiftop_{t}(i^\ast, s^N))) + \wedge & c = \lanes^{-1}_{t\K{x}N}(\vishiftop_{t}(i^\ast, s^N))) \end{array} \end{array} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 899131a0c7..ed95340265 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -176,14 +176,14 @@ Occasionally, it is convenient to group operators together according to the foll .. _syntax-laneidx: .. _syntax-shape: .. _syntax-side: -.. _syntax-vternop: -.. _syntax-vsunop: -.. _syntax-vsbinop: -.. _syntax-vsternop: +.. _syntax-vvunop: +.. _syntax-vvbinop: +.. _syntax-vvternop: +.. _syntax-vvtestop: .. _syntax-vitestop: .. _syntax-virelop: .. _syntax-vfrelop: -.. _syntax-vshiftop: +.. _syntax-vishiftop: .. _syntax-viunop: .. _syntax-vibinop: .. _syntax-viminmaxop: @@ -211,10 +211,10 @@ SIMD instructions provide basic operations over :ref:`values ` of \production{instruction} & \instr &::=& \dots \\&&|& \K{v128.}\VCONST~\i128 \\&&|& - \K{v128.}\vsunop \\&&|& - \K{v128.}\vsbinop \\&&|& - \K{v128.}\vsternop \\&&|& - \K{v128.}\vstestop \\&&|& + \K{v128.}\vvunop \\&&|& + \K{v128.}\vvbinop \\&&|& + \K{v128.}\vvternop \\&&|& + \K{v128.}\vvtestop \\&&|& \K{i8x16.}\SHUFFLE~\laneidx^{16} \\&&|& \K{i8x16.}\SWIZZLE \\&&|& \shape\K{.}\SPLAT \\&&|& @@ -246,7 +246,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8.}\VEXTEND\K{\_}\side^?\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\VEXTEND\K{\_}\side^?\K{\_i16x8\_}\sx \\&&|& \K{i64x2.}\VEXTEND\K{\_}\side^?\K{\_i32x4\_}\sx \\&&|& - \ishape\K{.}\vshiftop \\&&|& + \ishape\K{.}\vishiftop \\&&|& \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ \K{i16x8.}\viminmaxop ~|~ @@ -271,16 +271,16 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ - \production{SIMD unary operator} & \vsunop &::=& + \production{SIMD unary operator} & \vvunop &::=& \K{not} \\ - \production{SIMD binary operator} & \vsbinop &::=& + \production{SIMD binary operator} & \vvbinop &::=& \K{and} ~|~ \K{andnot} ~|~ \K{or} ~|~ \K{xor} \\ - \production{SIMD ternary operator} & \vsternop &::=& + \production{SIMD ternary operator} & \vvternop &::=& \K{bitselect} \\ - \production{SIMD test operator} & \vstestop &::=& + \production{SIMD test operator} & \vvtestop &::=& \K{any\_true} \\ \production{SIMD test operator} & \vitestop &::=& \K{all\_true} \\ @@ -298,7 +298,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{gt} ~|~ \K{le} ~|~ \K{ge} \\ - \production{SIMD integer shift operator} & \vshiftop &::=& + \production{SIMD integer shift operator} & \vishiftop &::=& \K{shl} ~|~ \K{shr\_s} ~|~ \K{shr\_u} \\ diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index d670619888..3a3ee3fc9c 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -701,9 +701,9 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \text{f64x2.ge} &\Rightarrow& \F64X2.\VGE\\ \end{array} -.. _text-vsunop: -.. _text-vsbinop: -.. _text-vsternop: +.. _text-vvunop: +.. _text-vvbinop: +.. _text-vvternop: .. math:: \begin{array}{llclll} @@ -718,11 +718,11 @@ SIMD const instructions have a mandatory :ref:`shape ` descri \end{array} .. _text-vitestop: -.. _text-vshiftop: +.. _text-vishiftop: .. _text-viunop: .. _text-vibinop: .. _text-viminmaxop: -.. _text-vsatbinop: +.. _text-visatbinop: .. math:: \begin{array}{llclll} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index cfba1b0cd8..d5ad36e471 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -516,11 +516,11 @@ .. |vextmul| mathdef:: \xref{syntax/instructions}{syntax-vextmul}{\X{vextmul}} .. |laneidx| mathdef:: \xref{syntax/instructions}{syntax-laneidx}{\X{laneidx}} -.. |vsunop| mathdef:: \xref{syntax/instructions}{syntax-vsunop}{\X{vsunop}} -.. |vsbinop| mathdef:: \xref{syntax/instructions}{syntax-vsbinop}{\X{vsbinop}} -.. |vsternop| mathdef:: \xref{syntax/instructions}{syntax-vsternop}{\X{vsternop}} -.. |vstestop| mathdef:: \xref{syntax/instructions}{syntax-vstestop}{\X{vstestop}} -.. |vshiftop| mathdef:: \xref{syntax/instructions}{syntax-vshiftop}{\X{vshiftop}} +.. |vvunop| mathdef:: \xref{syntax/instructions}{syntax-vvunop}{\X{vvunop}} +.. |vvbinop| mathdef:: \xref{syntax/instructions}{syntax-vvbinop}{\X{vvbinop}} +.. |vvternop| mathdef:: \xref{syntax/instructions}{syntax-vvternop}{\X{vvternop}} +.. |vvtestop| mathdef:: \xref{syntax/instructions}{syntax-vvtestop}{\X{vvtestop}} +.. |vishiftop| mathdef:: \xref{syntax/instructions}{syntax-vishiftop}{\X{vishiftop}} .. |viunop| mathdef:: \xref{syntax/instructions}{syntax-viunop}{\X{viunop}} .. |vibinop| mathdef:: \xref{syntax/instructions}{syntax-vibinop}{\X{vibinop}} .. |viminmaxop| mathdef:: \xref{syntax/instructions}{syntax-viminmaxop}{\X{viminmaxop}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index 3c5e7519ba..a3333ee9a4 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -292,9 +292,9 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vsunop: +.. _valid-vvunop: -:math:`\V128\K{.}\vsunop` +:math:`\V128\K{.}\vvunop` ......................... * The instruction is valid with type :math:`[\V128] \to [\V128]`. @@ -302,13 +302,13 @@ We also define an auxiliary function to get number of packed numeric types in a .. math:: \frac{ }{ - C \vdashinstr \V128\K{.}\vsunop : [\V128] \to [\V128] + C \vdashinstr \V128\K{.}\vvunop : [\V128] \to [\V128] } -.. _valid-vsbinop: +.. _valid-vvbinop: -:math:`\V128\K{.}\vsbinop` +:math:`\V128\K{.}\vvbinop` .......................... * The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. @@ -316,13 +316,13 @@ We also define an auxiliary function to get number of packed numeric types in a .. math:: \frac{ }{ - C \vdashinstr \V128\K{.}\vsbinop : [\V128~\V128] \to [\V128] + C \vdashinstr \V128\K{.}\vvbinop : [\V128~\V128] \to [\V128] } -.. _valid-vsternop: +.. _valid-vvternop: -:math:`\V128\K{.}\vsternop` +:math:`\V128\K{.}\vvternop` ........................... * The instruction is valid with type :math:`[\V128~\V128~\V128] \to [\V128]`. @@ -330,13 +330,13 @@ We also define an auxiliary function to get number of packed numeric types in a .. math:: \frac{ }{ - C \vdashinstr \V128\K{.}\vsternop : [\V128~\V128~\V128] \to [\V128] + C \vdashinstr \V128\K{.}\vvternop : [\V128~\V128~\V128] \to [\V128] } -.. _valid-vstestop: +.. _valid-vvtestop: -:math:`\V128\K{.}\vstestop` +:math:`\V128\K{.}\vvtestop` ........................... * The instruction is valid with type :math:`[\V128] \to [\I32]`. @@ -344,7 +344,7 @@ We also define an auxiliary function to get number of packed numeric types in a .. math:: \frac{ }{ - C \vdashinstr \V128\K{.}\vstestop : [\V128] \to [\I32] + C \vdashinstr \V128\K{.}\vvtestop : [\V128] \to [\I32] } @@ -473,17 +473,17 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-vshiftop: +.. _valid-vishiftop: -:math:`\ishape\K{.}\vshiftop` -............................. +:math:`\ishape\K{.}\vishiftop` +.............................. * The instruction is valid with type :math:`[\V128~\I32] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \ishape\K{.}\vshiftop : [\V128~\I32] \to [\V128] + C \vdashinstr \ishape\K{.}\vishiftop : [\V128~\I32] \to [\V128] } From 47f7b934a61806eec08d2ca6996d388f421d731b Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 11 Aug 2021 11:32:09 +0200 Subject: [PATCH 365/378] Eps --- document/core/exec/instructions.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 70ce9a051b..92905d22f7 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -774,7 +774,7 @@ Most SIMD instructions are defined in terms of generic numeric operators applied 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. If :math:`\K{low}` is part of the instruction, then: +3. If :math:`\side` is :math:`\K{low}`, then: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. From d1dc52c229cf1058088f05bbeb9c244b7e4d4616 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 11 Aug 2021 11:53:25 +0200 Subject: [PATCH 366/378] Merge cvtop reduction --- document/core/exec/instructions.rst | 51 +++++++++++------------------ 1 file changed, 20 insertions(+), 31 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 92905d22f7..180167f39d 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -767,26 +767,39 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^?` -.................................................................. +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero}^?` +.............................................................................. 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. If :math:`\side` is :math:`\K{low}`, then: +3. If the :math:`\K{zero}` suffix is present, then: + + a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. + +4. Else if :math:`\side` is :math:`\K{low}`, then: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. -4. Else: +5. Else: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. -5. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast))` +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast))` -6. Push the value :math:`\V128.\VCONST~c` onto the stack. +7. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: + \begin{array}{l} + \begin{array}{lcl@{\qquad}l} + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero} &\stepto& (\V128\K{.}\VCONST~c) \\ + \end{array} + \\ \qquad + \begin{array}[t]{@{}r@{~}l@{}} + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))~0^N) + \end{array} + \\[1ex] \begin{array}{lcl@{\qquad}l} (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} @@ -794,6 +807,7 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \begin{array}[t]{@{}r@{~}l@{}} (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[\side(0, N) \slice N])) \end{array} + \end{array} where: @@ -802,31 +816,6 @@ where: \K{high}(x, y) = y -:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero}` -................................................................. - -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. - -2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. - -3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. - -4. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast)~0^M)` - -5. Push the value :math:`\V128.\VCONST~c` onto the stack. - -.. math:: - \begin{array}{l} - \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero} &\stepto& (\V128\K{.}\VCONST~c) \\ - \end{array} - \\ \qquad - \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))~0^N) - \end{array} - \end{array} - - .. _exec-simd-dot: :math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` From 9382cc292271553bed1e83d720d1bc0a03829e08 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 11 Aug 2021 10:46:10 +0200 Subject: [PATCH 367/378] Rename simd->vec types in spec --- .../core/appendix/gen-index-instructions.py | 94 +- document/core/appendix/index-instructions.rst | 1036 ++++++++--------- document/core/appendix/index-types.rst | 2 +- document/core/binary/instructions.rst | 44 +- document/core/binary/types.rst | 14 +- document/core/exec/instructions.rst | 62 +- document/core/exec/numerics.rst | 8 +- document/core/exec/runtime.rst | 4 +- document/core/syntax/instructions.rst | 57 +- document/core/syntax/types.rst | 24 +- document/core/syntax/values.rst | 15 +- document/core/text/instructions.rst | 50 +- document/core/text/types.rst | 16 +- document/core/util/macros.def | 108 +- document/core/valid/instructions.rst | 34 +- 15 files changed, 785 insertions(+), 783 deletions(-) diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index 3f3b1eb594..3e59b3b6b8 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -352,28 +352,28 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\LOAD\K{\_splat}~\memarg', r'\hex{FD}~~\hex{0A}', r'[\I32] \to [\V128]', r'valid-load-splat', r'exec-load-splat'), Instruction(r'\V128.\STORE~\memarg', r'\hex{FD}~~\hex{0B}', r'[\I32~\V128] \to []', r'valid-store', r'exec-store'), Instruction(r'\V128.\VCONST~\i128', r'\hex{FD}~~\hex{0C}', r'[] \to [\V128]', r'valid-vconst', r'exec-vconst'), - Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~\hex{0D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-shuffle', r'exec-simd-shuffle'), - Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~\hex{0E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-swizzle'), - Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~\hex{0F}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~\hex{10}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~\hex{11}', r'[\I32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~\hex{12}', r'[\I64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~\hex{13}', r'[\F32] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~\hex{14}', r'[\F64] \to [\V128]', r'valid-simd-splat', r'exec-simd-splat'), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{15}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{16}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{17}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{18}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{19}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1A}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1B}', r'[\V128] \to [\I32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1C}', r'[\V128~\I32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1D}', r'[\V128] \to [\I64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1E}', r'[\V128~\I64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1F}', r'[\V128] \to [\F32]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{20}', r'[\V128~\F32] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), - Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{21}', r'[\V128] \to [\F64]', r'valid-simd-extract_lane', r'exec-simd-extract_lane'), - Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{22}', r'[\V128~\F64] \to [\V128]', r'valid-simd-replace_lane', r'exec-simd-replace_lane'), + Instruction(r'\I8X16.\SHUFFLE~\laneidx^{16}', r'\hex{FD}~~\hex{0D}', r'[\V128~\V128] \to [\V128]', r'valid-vec-shuffle', r'exec-vec-shuffle'), + Instruction(r'\I8X16.\SWIZZLE', r'\hex{FD}~~\hex{0E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vec-swizzle'), + Instruction(r'\I8X16.\SPLAT', r'\hex{FD}~~\hex{0F}', r'[\I32] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\I16X8.\SPLAT', r'\hex{FD}~~\hex{10}', r'[\I32] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\I32X4.\SPLAT', r'\hex{FD}~~\hex{11}', r'[\I32] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\I64X2.\SPLAT', r'\hex{FD}~~\hex{12}', r'[\I64] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\F32X4.\SPLAT', r'\hex{FD}~~\hex{13}', r'[\F32] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\F64X2.\SPLAT', r'\hex{FD}~~\hex{14}', r'[\F64] \to [\V128]', r'valid-vec-splat', r'exec-vec-splat'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{15}', r'[\V128] \to [\I32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I8X16.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{16}', r'[\V128] \to [\I32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I8X16.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{17}', r'[\V128~\I32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_s}~\laneidx', r'\hex{FD}~~\hex{18}', r'[\V128] \to [\I32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I16X8.\EXTRACTLANE\K{\_u}~\laneidx', r'\hex{FD}~~\hex{19}', r'[\V128] \to [\I32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I16X8.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1A}', r'[\V128~\I32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), + Instruction(r'\I32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1B}', r'[\V128] \to [\I32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1C}', r'[\V128~\I32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), + Instruction(r'\I64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1D}', r'[\V128] \to [\I64]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\I64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{1E}', r'[\V128~\I64] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), + Instruction(r'\F32X4.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{1F}', r'[\V128] \to [\F32]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{20}', r'[\V128~\F32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), + Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{21}', r'[\V128] \to [\F64]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), + Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{22}', r'[\V128~\F64] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), @@ -439,9 +439,9 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VNEG', r'\hex{FD}~~\hex{61}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I8X16.\VPOPCNT', r'\hex{FD}~~\hex{62}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ipopcnt'), Instruction(r'\I8X16.\ALLTRUE', r'\hex{FD}~~\hex{63}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), - Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~\hex{64}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~\hex{65}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~\hex{66}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I8X16.\BITMASK', r'\hex{FD}~~\hex{64}', r'[\V128] \to [\I32]', r'valid-vec-bitmask', r'exec-vec-bitmask'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_s}', r'\hex{FD}~~\hex{65}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vec-narrow'), + Instruction(r'\I8X16.\NARROW\K{\_i16x8\_u}', r'\hex{FD}~~\hex{66}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vec-narrow'), Instruction(r'\F32X4.\VCEIL', r'\hex{FD}~~\hex{67}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fceil'), Instruction(r'\F32X4.\VFLOOR', r'\hex{FD}~~\hex{68}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ffloor'), Instruction(r'\F32X4.\VTRUNC', r'\hex{FD}~~\hex{69}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), @@ -463,17 +463,17 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I8X16.\VMAX\K{\_u}', r'\hex{FD}~~\hex{79}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\F64X2.\VTRUNC', r'\hex{FD}~~\hex{7A}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ftrunc'), Instruction(r'\I8X16.\AVGR\K{\_u}', r'\hex{FD}~~\hex{7B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~\hex{7C}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), - Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~\hex{7D}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~\hex{7E}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), - Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~\hex{7F}', r'[\V128] \to [\V128]', r'valid-simd-extadd_pairwise', r'exec-simd-extadd_pairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}', r'\hex{FD}~~\hex{7C}', r'[\V128] \to [\V128]', r'valid-vec-extadd_pairwise', r'exec-vec-extadd_pairwise'), + Instruction(r'\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}', r'\hex{FD}~~\hex{7D}', r'[\V128] \to [\V128]', r'valid-vec-extadd_pairwise', r'exec-vec-extadd_pairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}', r'\hex{FD}~~\hex{7E}', r'[\V128] \to [\V128]', r'valid-vec-extadd_pairwise', r'exec-vec-extadd_pairwise'), + Instruction(r'\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}', r'\hex{FD}~~\hex{7F}', r'[\V128] \to [\V128]', r'valid-vec-extadd_pairwise', r'exec-vec-extadd_pairwise'), Instruction(r'\I16X8.\VABS', r'\hex{FD}~~\hex{80}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I16X8.\VNEG', r'\hex{FD}~~\hex{81}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I16X8.\Q15MULRSAT\K{\_s}', r'\hex{FD}~~\hex{82}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iq15mulrsat_s'), Instruction(r'\I16X8.\ALLTRUE', r'\hex{FD}~~\hex{83}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), - Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~\hex{84}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), - Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~\hex{85}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), - Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~\hex{86}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-simd-narrow'), + Instruction(r'\I16X8.\BITMASK', r'\hex{FD}~~\hex{84}', r'[\V128] \to [\I32]', r'valid-vec-bitmask', r'exec-vec-bitmask'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_s}', r'\hex{FD}~~\hex{85}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vec-narrow'), + Instruction(r'\I16X8.\NARROW\K{\_i32x4\_u}', r'\hex{FD}~~\hex{86}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vec-narrow'), Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{87}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{88}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I16X8.\VEXTEND\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{89}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -494,14 +494,14 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I16X8.\VMAX\K{\_s}', r'\hex{FD}~~\hex{98}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I16X8.\VMAX\K{\_u}', r'\hex{FD}~~\hex{99}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), Instruction(r'\I16X8.\AVGR\K{\_u}', r'\hex{FD}~~\hex{9B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-iavgr_u'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{9C}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{9D}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{9E}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{9F}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_s}', r'\hex{FD}~~\hex{9C}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_s}', r'\hex{FD}~~\hex{9D}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_low\_i8x16\_u}', r'\hex{FD}~~\hex{9E}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I16X8.\EXTMUL\K{\_high\_i8x16\_u}', r'\hex{FD}~~\hex{9F}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), Instruction(r'\I32X4.\VABS', r'\hex{FD}~~\hex{A0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I32X4.\VNEG', r'\hex{FD}~~\hex{A1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I32X4.\ALLTRUE', r'\hex{FD}~~\hex{A3}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), - Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~\hex{A4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I32X4.\BITMASK', r'\hex{FD}~~\hex{A4}', r'[\V128] \to [\I32]', r'valid-vec-bitmask', r'exec-vec-bitmask'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{A7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{A8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I32X4.\VEXTEND\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{A9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -516,15 +516,15 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I32X4.\VMIN\K{\_u}', r'\hex{FD}~~\hex{B7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imin_u'), Instruction(r'\I32X4.\VMAX\K{\_s}', r'\hex{FD}~~\hex{B8}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_s'), Instruction(r'\I32X4.\VMAX\K{\_u}', r'\hex{FD}~~\hex{B9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-imax_u'), - Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~\hex{BA}', r'[\V128~\V128] \to [\V128]', r'valid-simd-dot', r'exec-simd-dot'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{BC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{BD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{BE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{BF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I32X4.\DOT\K{\_i16x8\_s}', r'\hex{FD}~~\hex{BA}', r'[\V128~\V128] \to [\V128]', r'valid-vec-dot', r'exec-vec-dot'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_s}', r'\hex{FD}~~\hex{BC}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_s}', r'\hex{FD}~~\hex{BD}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_low\_i16x8\_u}', r'\hex{FD}~~\hex{BE}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I32X4.\EXTMUL\K{\_high\_i16x8\_u}', r'\hex{FD}~~\hex{BF}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), Instruction(r'\I64X2.\VABS', r'\hex{FD}~~\hex{C0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-iabs'), Instruction(r'\I64X2.\VNEG', r'\hex{FD}~~\hex{C1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-ineg'), Instruction(r'\I64X2.\ALLTRUE', r'\hex{FD}~~\hex{C3}', r'[\V128] \to [\I32]', r'valid-vtestop', r'exec-vtestop'), - Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~\hex{C4}', r'[\V128] \to [\I32]', r'valid-simd-bitmask', r'exec-simd-bitmask'), + Instruction(r'\I64X2.\BITMASK', r'\hex{FD}~~\hex{C4}', r'[\V128] \to [\I32]', r'valid-vec-bitmask', r'exec-vec-bitmask'), Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{C7}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{C8}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), Instruction(r'\I64X2.\VEXTEND\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{C9}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vcvtop'), @@ -541,10 +541,10 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\I64X2.\VGT\K{\_s}', r'\hex{FD}~~\hex{D9}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), Instruction(r'\I64X2.\VLE\K{\_s}', r'\hex{FD}~~\hex{DA}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), Instruction(r'\I64X2.\VGE\K{\_s}', r'\hex{FD}~~\hex{DB}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{DC}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{DD}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{DE}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), - Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{DF}', r'[\V128~\V128] \to [\V128]', r'valid-simd-extmul', r'exec-simd-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{DC}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_s}', r'\hex{FD}~~\hex{DD}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_low\_i32x4\_u}', r'\hex{FD}~~\hex{DE}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), + Instruction(r'\I64X2.\EXTMUL\K{\_high\_i32x4\_u}', r'\hex{FD}~~\hex{DF}', r'[\V128~\V128] \to [\V128]', r'valid-vec-extmul', r'exec-vec-extmul'), Instruction(r'\F32X4.\VABS', r'\hex{FD}~~\hex{E0}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fabs'), Instruction(r'\F32X4.\VNEG', r'\hex{FD}~~\hex{E1}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fneg'), Instruction(r'\F32X4.\VSQRT', r'\hex{FD}~~\hex{E3}', r'[\V128] \to [\V128]', r'valid-vunop', r'exec-vunop', r'op-fsqrt'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 0a2e93832c..9fe41696e1 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -6,521 +6,521 @@ Index of Instructions --------------------- -================================================= ========================== ============================================= ============================================== ================================================================== -Instruction Binary Opcode Type Validation Execution -================================================= ========================== ============================================= ============================================== ================================================================== -:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\ELSE` :math:`\hex{05}` -(reserved) :math:`\hex{06}` -(reserved) :math:`\hex{07}` -(reserved) :math:`\hex{08}` -(reserved) :math:`\hex{09}` -(reserved) :math:`\hex{0A}` -:math:`\END` :math:`\hex{0B}` -:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{12}` -(reserved) :math:`\hex{13}` -(reserved) :math:`\hex{14}` -(reserved) :math:`\hex{15}` -(reserved) :math:`\hex{16}` -(reserved) :math:`\hex{17}` -(reserved) :math:`\hex{18}` -(reserved) :math:`\hex{19}` -:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\SELECT~t` :math:`\hex{1C}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{1D}` -(reserved) :math:`\hex{1E}` -(reserved) :math:`\hex{1F}` -:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\LOCALSET~x` :math:`\hex{21}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\LOCALTEE~x` :math:`\hex{22}` :math:`[t] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALGET~x` :math:`\hex{23}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\GLOBALSET~x` :math:`\hex{24}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGET~x` :math:`\hex{25}` :math:`[\I32] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\TABLESET~x` :math:`\hex{26}` :math:`[\I32~t] \to []` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{27}` -:math:`\I32.\LOAD~\memarg` :math:`\hex{28}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD~\memarg` :math:`\hex{29}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\LOAD~\memarg` :math:`\hex{2A}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\LOAD~\memarg` :math:`\hex{2B}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_s}~\memarg` :math:`\hex{2C}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{8\_u}~\memarg` :math:`\hex{2D}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_s}~\memarg` :math:`\hex{2E}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\LOAD\K{16\_u}~\memarg` :math:`\hex{2F}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_s}~\memarg` :math:`\hex{30}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{8\_u}~\memarg` :math:`\hex{31}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_s}~\memarg` :math:`\hex{32}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{16\_u}~\memarg` :math:`\hex{33}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_s}~\memarg` :math:`\hex{34}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\LOAD\K{32\_u}~\memarg` :math:`\hex{35}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE~\memarg` :math:`\hex{36}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE~\memarg` :math:`\hex{37}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F32.\STORE~\memarg` :math:`\hex{38}` :math:`[\I32~\F32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\F64.\STORE~\memarg` :math:`\hex{39}` :math:`[\I32~\F64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{8}~\memarg` :math:`\hex{3A}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\STORE\K{16}~\memarg` :math:`\hex{3B}` :math:`[\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{8}~\memarg` :math:`\hex{3C}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EQ` :math:`\hex{46}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\NE` :math:`\hex{47}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_s}` :math:`\hex{48}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LT\K{\_u}` :math:`\hex{49}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_s}` :math:`\hex{4A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GT\K{\_u}` :math:`\hex{4B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_s}` :math:`\hex{4C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\LE\K{\_u}` :math:`\hex{4D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\GE` :math:`\hex{66}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CLZ` :math:`\hex{67}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\CTZ` :math:`\hex{68}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\POPCNT` :math:`\hex{69}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ADD` :math:`\hex{6A}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SUB` :math:`\hex{6B}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\MUL` :math:`\hex{6C}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_s}` :math:`\hex{6D}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\DIV\K{\_u}` :math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -(reserved) :math:`\hex{C5}` -(reserved) :math:`\hex{C6}` -(reserved) :math:`\hex{C7}` -(reserved) :math:`\hex{C8}` -(reserved) :math:`\hex{C9}` -(reserved) :math:`\hex{CA}` -(reserved) :math:`\hex{CB}` -(reserved) :math:`\hex{CC}` -(reserved) :math:`\hex{CD}` -(reserved) :math:`\hex{CE}` -(reserved) :math:`\hex{CF}` -:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` -:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` -(reserved) :math:`\hex{D3}` -(reserved) :math:`\hex{D4}` -(reserved) :math:`\hex{D5}` -(reserved) :math:`\hex{D6}` -(reserved) :math:`\hex{D7}` -(reserved) :math:`\hex{D8}` -(reserved) :math:`\hex{D9}` -(reserved) :math:`\hex{DA}` -(reserved) :math:`\hex{DB}` -(reserved) :math:`\hex{DC}` -(reserved) :math:`\hex{DD}` -(reserved) :math:`\hex{DE}` -(reserved) :math:`\hex{DF}` -(reserved) :math:`\hex{E0}` -(reserved) :math:`\hex{E1}` -(reserved) :math:`\hex{E2}` -(reserved) :math:`\hex{E3}` -(reserved) :math:`\hex{E4}` -(reserved) :math:`\hex{E5}` -(reserved) :math:`\hex{E6}` -(reserved) :math:`\hex{E7}` -(reserved) :math:`\hex{E8}` -(reserved) :math:`\hex{E9}` -(reserved) :math:`\hex{EA}` -(reserved) :math:`\hex{EB}` -(reserved) :math:`\hex{EC}` -(reserved) :math:`\hex{ED}` -(reserved) :math:`\hex{EE}` -(reserved) :math:`\hex{EF}` -(reserved) :math:`\hex{F0}` -(reserved) :math:`\hex{F1}` -(reserved) :math:`\hex{F2}` -(reserved) :math:`\hex{F3}` -(reserved) :math:`\hex{F4}` -(reserved) :math:`\hex{F5}` -(reserved) :math:`\hex{F6}` -(reserved) :math:`\hex{F7}` -(reserved) :math:`\hex{F8}` -(reserved) :math:`\hex{F9}` -(reserved) :math:`\hex{FA}` -(reserved) :math:`\hex{FB}` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{05}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{06}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{07}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\MEMORYINIT~x` :math:`\hex{FC}~\hex{08}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\DATADROP~x` :math:`\hex{FC}~\hex{09}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYCOPY` :math:`\hex{FC}~\hex{0A}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\MEMORYFILL` :math:`\hex{FC}~\hex{0B}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEINIT~x~y` :math:`\hex{FC}~\hex{0C}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` -:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~\hex{00}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` -:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~\hex{0E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~\hex{0F}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~\hex{10}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~\hex{11}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~\hex{12}` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~\hex{13}` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~\hex{14}` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{15}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{16}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{17}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{18}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{19}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1A}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1B}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1D}` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1E}` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1F}` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{20}` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{21}` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` -:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{22}` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\VEQ` :math:`\hex{FD}~~\hex{23}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNE` :math:`\hex{FD}~~\hex{24}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{25}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{26}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{27}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{28}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{29}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{2A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{2B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{2C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VEQ` :math:`\hex{FD}~~\hex{2D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNE` :math:`\hex{FD}~~\hex{2E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{2F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{30}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{31}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{32}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{33}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{34}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{35}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{36}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VEQ` :math:`\hex{FD}~~\hex{37}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNE` :math:`\hex{FD}~~\hex{38}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{39}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{3A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{3B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{3C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{3D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{3E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{3F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{40}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VEQ` :math:`\hex{FD}~~\hex{41}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNE` :math:`\hex{FD}~~\hex{42}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLT` :math:`\hex{FD}~~\hex{43}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGT` :math:`\hex{FD}~~\hex{44}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VLE` :math:`\hex{FD}~~\hex{45}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VGE` :math:`\hex{FD}~~\hex{46}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VEQ` :math:`\hex{FD}~~\hex{47}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNE` :math:`\hex{FD}~~\hex{48}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLT` :math:`\hex{FD}~~\hex{49}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{57}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{58}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{59}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5A}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5B}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5C}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5D}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~\hex{5E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~\hex{5F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VABS` :math:`\hex{FD}~~\hex{60}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VNEG` :math:`\hex{FD}~~\hex{61}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~\hex{62}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~\hex{63}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~\hex{64}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{65}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{66}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~\hex{67}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB` :math:`\hex{FD}~~\hex{71}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{72}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{73}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~\hex{74}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~\hex{75}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{76}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{77}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{78}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{79}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~\hex{7A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{7B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~\hex{7C}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~\hex{7D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{7E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{7F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VABS` :math:`\hex{FD}~~\hex{80}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VNEG` :math:`\hex{FD}~~\hex{81}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~\hex{82}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~\hex{83}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~\hex{84}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{85}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{86}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{87}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB` :math:`\hex{FD}~~\hex{91}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{92}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{93}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~\hex{94}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMUL` :math:`\hex{FD}~~\hex{95}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{96}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{97}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{98}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{99}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{9B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{9C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{9D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{9E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{9F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VABS` :math:`\hex{FD}~~\hex{A0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VNEG` :math:`\hex{FD}~~\hex{A1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~\hex{A3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~\hex{A4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{A7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{B6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{B7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{B8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{B9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{BA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{BC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{BD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{BE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{BF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VABS` :math:`\hex{FD}~~\hex{C0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNEG` :math:`\hex{FD}~~\hex{C1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~\hex{C3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~\hex{C4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{C7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VEQ` :math:`\hex{FD}~~\hex{D6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VNE` :math:`\hex{FD}~~\hex{D7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{D8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{D9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{DA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{DB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{DC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{DD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{DE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{DF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` -:math:`\F32X4.\VABS` :math:`\hex{FD}~~\hex{E0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VNEG` :math:`\hex{FD}~~\hex{E1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~\hex{E3}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VADD` :math:`\hex{FD}~~\hex{E4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VSUB` :math:`\hex{FD}~~\hex{E5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMUL` :math:`\hex{FD}~~\hex{E6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VDIV` :math:`\hex{FD}~~\hex{E7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMIN` :math:`\hex{FD}~~\hex{E8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VMAX` :math:`\hex{FD}~~\hex{E9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~\hex{EA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~\hex{EB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VABS` :math:`\hex{FD}~~\hex{EC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VNEG` :math:`\hex{FD}~~\hex{ED}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~\hex{EF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VADD` :math:`\hex{FD}~~\hex{F0}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VSUB` :math:`\hex{FD}~~\hex{F1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMUL` :math:`\hex{FD}~~\hex{F2}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VDIV` :math:`\hex{FD}~~\hex{F3}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMIN` :math:`\hex{FD}~~\hex{F4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VMAX` :math:`\hex{FD}~~\hex{F5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~\hex{F6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{FF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -================================================= ========================== ============================================= ============================================== ================================================================== +================================================= ========================== ============================================= ============================================= ================================================================== +Instruction Binary Opcode Type Validation Execution +================================================= ========================== ============================================= ============================================= ================================================================== +:math:`\UNREACHABLE` :math:`\hex{00}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\NOP` :math:`\hex{01}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\BLOCK~\X{bt}` :math:`\hex{02}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\LOOP~\X{bt}` :math:`\hex{03}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\IF~\X{bt}` :math:`\hex{04}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\ELSE` :math:`\hex{05}` +(reserved) :math:`\hex{06}` +(reserved) :math:`\hex{07}` +(reserved) :math:`\hex{08}` +(reserved) :math:`\hex{09}` +(reserved) :math:`\hex{0A}` +:math:`\END` :math:`\hex{0B}` +:math:`\BR~l` :math:`\hex{0C}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRIF~l` :math:`\hex{0D}` :math:`[t^\ast~\I32] \to [t^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\BRTABLE~l^\ast~l` :math:`\hex{0E}` :math:`[t_1^\ast~t^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\RETURN` :math:`\hex{0F}` :math:`[t_1^\ast~t^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALL~x` :math:`\hex{10}` :math:`[t_1^\ast] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +:math:`\CALLINDIRECT~x~y` :math:`\hex{11}` :math:`[t_1^\ast~\I32] \to [t_2^\ast]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{12}` +(reserved) :math:`\hex{13}` +(reserved) :math:`\hex{14}` +(reserved) :math:`\hex{15}` +(reserved) :math:`\hex{16}` +(reserved) :math:`\hex{17}` +(reserved) :math:`\hex{18}` +(reserved) :math:`\hex{19}` +:math:`\DROP` :math:`\hex{1A}` :math:`[t] \to []` :ref:`validation ` :ref:`execution ` +:math:`\SELECT` :math:`\hex{1B}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\SELECT~t` :math:`\hex{1C}` :math:`[t~t~\I32] \to [t]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{1D}` +(reserved) :math:`\hex{1E}` +(reserved) :math:`\hex{1F}` +:math:`\LOCALGET~x` :math:`\hex{20}` :math:`[] \to [t]` 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:ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{16}~\memarg` :math:`\hex{3D}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I64.\STORE\K{32}~\memarg` :math:`\hex{3E}` :math:`[\I32~\I64] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYSIZE` :math:`\hex{3F}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYGROW` :math:`\hex{40}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\CONST~\i32` :math:`\hex{41}` :math:`[] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64.\CONST~\i64` :math:`\hex{42}` :math:`[] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\F32.\CONST~\f32` :math:`\hex{43}` :math:`[] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F64.\CONST~\f64` :math:`\hex{44}` :math:`[] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\I32.\EQZ` :math:`\hex{45}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:ref:`operator ` +:math:`\I32.\GE\K{\_s}` :math:`\hex{4E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\GE\K{\_u}` :math:`\hex{4F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQZ` :math:`\hex{50}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EQ` :math:`\hex{51}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\NE` :math:`\hex{52}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_s}` :math:`\hex{53}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LT\K{\_u}` :math:`\hex{54}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_s}` :math:`\hex{55}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GT\K{\_u}` :math:`\hex{56}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_s}` :math:`\hex{57}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\LE\K{\_u}` :math:`\hex{58}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_s}` :math:`\hex{59}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\GE\K{\_u}` :math:`\hex{5A}` :math:`[\I64~\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\EQ` :math:`\hex{5B}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NE` :math:`\hex{5C}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LT` :math:`\hex{5D}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GT` :math:`\hex{5E}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\LE` :math:`\hex{5F}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\GE` :math:`\hex{60}` :math:`[\F32~\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\EQ` :math:`\hex{61}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NE` :math:`\hex{62}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LT` :math:`\hex{63}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\GT` :math:`\hex{64}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\LE` :math:`\hex{65}` :math:`[\F64~\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` 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:math:`\hex{6E}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_s}` :math:`\hex{6F}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REM\K{\_u}` :math:`\hex{70}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\AND` :math:`\hex{71}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\OR` :math:`\hex{72}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\XOR` :math:`\hex{73}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHL` :math:`\hex{74}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_s}` :math:`\hex{75}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\SHR\K{\_u}` :math:`\hex{76}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTL` :math:`\hex{77}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\ROTR` :math:`\hex{78}` :math:`[\I32~\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CLZ` :math:`\hex{79}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\CTZ` :math:`\hex{7A}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\POPCNT` :math:`\hex{7B}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ADD` :math:`\hex{7C}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SUB` :math:`\hex{7D}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\MUL` :math:`\hex{7E}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_s}` :math:`\hex{7F}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\DIV\K{\_u}` :math:`\hex{80}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_s}` :math:`\hex{81}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REM\K{\_u}` :math:`\hex{82}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\AND` :math:`\hex{83}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\OR` :math:`\hex{84}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\XOR` :math:`\hex{85}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHL` :math:`\hex{86}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_s}` :math:`\hex{87}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\SHR\K{\_u}` :math:`\hex{88}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTL` :math:`\hex{89}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\ROTR` :math:`\hex{8A}` :math:`[\I64~\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ABS` :math:`\hex{8B}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEG` :math:`\hex{8C}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CEIL` :math:`\hex{8D}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FLOOR` :math:`\hex{8E}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\TRUNC` :math:`\hex{8F}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\NEAREST` :math:`\hex{90}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SQRT` :math:`\hex{91}` :math:`[\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\ADD` :math:`\hex{92}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\SUB` :math:`\hex{93}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\MUL` :math:`\hex{94}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DIV` :math:`\hex{95}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMIN` :math:`\hex{96}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\FMAX` :math:`\hex{97}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\COPYSIGN` :math:`\hex{98}` :math:`[\F32~\F32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ABS` :math:`\hex{99}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEG` :math:`\hex{9A}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CEIL` :math:`\hex{9B}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FLOOR` :math:`\hex{9C}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\TRUNC` :math:`\hex{9D}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\NEAREST` :math:`\hex{9E}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SQRT` :math:`\hex{9F}` :math:`[\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\ADD` :math:`\hex{A0}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\SUB` :math:`\hex{A1}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\MUL` :math:`\hex{A2}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\DIV` :math:`\hex{A3}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMIN` :math:`\hex{A4}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\FMAX` :math:`\hex{A5}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\COPYSIGN` :math:`\hex{A6}` :math:`[\F64~\F64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\WRAP\K{\_}\I64` :math:`\hex{A7}` :math:`[\I64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{A8}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{A9}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{AA}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{AB}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_s}` :math:`\hex{AC}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{\_}\I32\K{\_u}` :math:`\hex{AD}` :math:`[\I32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_s}` :math:`\hex{AE}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F32\K{\_u}` :math:`\hex{AF}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_s}` :math:`\hex{B0}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_}\F64\K{\_u}` :math:`\hex{B1}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B2}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B3}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B4}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{B5}` :math:`[\I64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\DEMOTE\K{\_}\F64` :math:`\hex{B6}` :math:`[\F64] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_s}` :math:`\hex{B7}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I32\K{\_u}` :math:`\hex{B8}` :math:`[\I32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_s}` :math:`\hex{B9}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\CONVERT\K{\_}\I64\K{\_u}` :math:`\hex{BA}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\PROMOTE\K{\_}\F32` :math:`\hex{BB}` :math:`[\F32] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\REINTERPRET\K{\_}\F32` :math:`\hex{BC}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\REINTERPRET\K{\_}\F64` :math:`\hex{BD}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32.\REINTERPRET\K{\_}\I32` :math:`\hex{BE}` :math:`[\I32] \to [\F32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64.\REINTERPRET\K{\_}\I64` :math:`\hex{BF}` :math:`[\I64] \to [\F64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{8\_s}` :math:`\hex{C0}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\EXTEND\K{16\_s}` :math:`\hex{C1}` :math:`[\I32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{8\_s}` :math:`\hex{C2}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{16\_s}` :math:`\hex{C3}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\EXTEND\K{32\_s}` :math:`\hex{C4}` :math:`[\I64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +(reserved) :math:`\hex{C5}` +(reserved) :math:`\hex{C6}` +(reserved) :math:`\hex{C7}` +(reserved) :math:`\hex{C8}` +(reserved) :math:`\hex{C9}` +(reserved) :math:`\hex{CA}` +(reserved) :math:`\hex{CB}` +(reserved) :math:`\hex{CC}` +(reserved) :math:`\hex{CD}` +(reserved) :math:`\hex{CE}` +(reserved) :math:`\hex{CF}` +:math:`\REFNULL~t` :math:`\hex{D0}` :math:`[] \to [t]` :ref:`validation ` :ref:`execution ` +:math:`\REFISNULL` :math:`\hex{D1}` :math:`[t] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\REFFUNC~x` :math:`\hex{D2}` :math:`[] \to [\FUNCREF]` :ref:`validation ` :ref:`execution ` +(reserved) :math:`\hex{D3}` +(reserved) :math:`\hex{D4}` +(reserved) :math:`\hex{D5}` +(reserved) :math:`\hex{D6}` +(reserved) :math:`\hex{D7}` +(reserved) :math:`\hex{D8}` +(reserved) :math:`\hex{D9}` +(reserved) :math:`\hex{DA}` +(reserved) :math:`\hex{DB}` +(reserved) :math:`\hex{DC}` +(reserved) :math:`\hex{DD}` +(reserved) :math:`\hex{DE}` +(reserved) :math:`\hex{DF}` +(reserved) :math:`\hex{E0}` +(reserved) :math:`\hex{E1}` +(reserved) :math:`\hex{E2}` +(reserved) :math:`\hex{E3}` +(reserved) :math:`\hex{E4}` +(reserved) :math:`\hex{E5}` +(reserved) :math:`\hex{E6}` +(reserved) :math:`\hex{E7}` +(reserved) :math:`\hex{E8}` +(reserved) :math:`\hex{E9}` +(reserved) :math:`\hex{EA}` +(reserved) :math:`\hex{EB}` +(reserved) :math:`\hex{EC}` +(reserved) :math:`\hex{ED}` +(reserved) :math:`\hex{EE}` +(reserved) :math:`\hex{EF}` +(reserved) :math:`\hex{F0}` +(reserved) :math:`\hex{F1}` +(reserved) :math:`\hex{F2}` +(reserved) :math:`\hex{F3}` +(reserved) :math:`\hex{F4}` +(reserved) :math:`\hex{F5}` +(reserved) :math:`\hex{F6}` +(reserved) :math:`\hex{F7}` +(reserved) :math:`\hex{F8}` +(reserved) :math:`\hex{F9}` +(reserved) :math:`\hex{FA}` +(reserved) :math:`\hex{FB}` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{00}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{01}` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{02}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{03}` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~\hex{04}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~\hex{05}` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~\hex{06}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~\hex{07}` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\MEMORYINIT~x` :math:`\hex{FC}~\hex{08}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\DATADROP~x` :math:`\hex{FC}~\hex{09}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYCOPY` :math:`\hex{FC}~\hex{0A}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\MEMORYFILL` :math:`\hex{FC}~\hex{0B}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEINIT~x~y` :math:`\hex{FC}~\hex{0C}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\ELEMDROP~x` :math:`\hex{FC}~\hex{0D}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLECOPY~x~y` :math:`\hex{FC}~\hex{0E}` :math:`[\I32~\I32~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEGROW~x` :math:`\hex{FC}~\hex{0F}` :math:`[t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLESIZE~x` :math:`\hex{FC}~\hex{10}` :math:`[] \to []` :ref:`validation ` :ref:`execution ` +:math:`\TABLEFILL~x` :math:`\hex{FC}~\hex{11}` :math:`[\I32~t~\I32] \to []` :ref:`validation ` :ref:`execution ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~0` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~1` :math:`[\F32] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}` :math:`\hex{FC}~~2` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~3` :math:`[\F64] \to [\I32]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}` :math:`\hex{FC}~~4` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}` :math:`\hex{FC}~~5` :math:`[\F32] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}` :math:`\hex{FC}~~6` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}` :math:`\hex{FC}~~7` :math:`[\F64] \to [\I64]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\LOAD~\memarg` :math:`\hex{FD}~~\hex{00}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_s}~\memarg` :math:`\hex{FD}~~\hex{01}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{8x8\_u}~\memarg` :math:`\hex{FD}~~\hex{02}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_s}~\memarg` :math:`\hex{FD}~~\hex{03}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{16x4\_u}~\memarg` :math:`\hex{FD}~~\hex{04}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_s}~\memarg` :math:`\hex{FD}~~\hex{05}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{32x2\_u}~\memarg` :math:`\hex{FD}~~\hex{06}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{07}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{08}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{09}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\LOAD\K{\_splat}~\memarg` :math:`\hex{FD}~~\hex{0A}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE~\memarg` :math:`\hex{FD}~~\hex{0B}` :math:`[\I32~\V128] \to []` :ref:`validation ` :ref:`execution ` +:math:`\V128.\VCONST~\i128` :math:`\hex{FD}~~\hex{0C}` :math:`[] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SHUFFLE~\laneidx^{16}` :math:`\hex{FD}~~\hex{0D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SWIZZLE` :math:`\hex{FD}~~\hex{0E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\SPLAT` :math:`\hex{FD}~~\hex{0F}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\SPLAT` :math:`\hex{FD}~~\hex{10}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\SPLAT` :math:`\hex{FD}~~\hex{11}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\SPLAT` :math:`\hex{FD}~~\hex{12}` :math:`[\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\SPLAT` :math:`\hex{FD}~~\hex{13}` :math:`[\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\SPLAT` :math:`\hex{FD}~~\hex{14}` :math:`[\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{15}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{16}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{17}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_s}~\laneidx` :math:`\hex{FD}~~\hex{18}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTRACTLANE\K{\_u}~\laneidx` :math:`\hex{FD}~~\hex{19}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1A}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1B}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1D}` :math:`[\V128] \to [\I64]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{1E}` :math:`[\V128~\I64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{1F}` :math:`[\V128] \to [\F32]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{20}` :math:`[\V128~\F32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\EXTRACTLANE~\laneidx` :math:`\hex{FD}~~\hex{21}` :math:`[\V128] \to [\F64]` :ref:`validation ` :ref:`execution ` +:math:`\F64X2.\REPLACELANE~\laneidx` :math:`\hex{FD}~~\hex{22}` :math:`[\V128~\F64] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\VEQ` :math:`\hex{FD}~~\hex{23}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNE` :math:`\hex{FD}~~\hex{24}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{25}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{26}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{27}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{28}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{29}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{2A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{2B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{2C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VEQ` :math:`\hex{FD}~~\hex{2D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNE` :math:`\hex{FD}~~\hex{2E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{2F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{30}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{31}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{32}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{33}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{34}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{35}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{36}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VEQ` :math:`\hex{FD}~~\hex{37}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNE` :math:`\hex{FD}~~\hex{38}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{39}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLT\K{\_u}` :math:`\hex{FD}~~\hex{3A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{3B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGT\K{\_u}` :math:`\hex{FD}~~\hex{3C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{3D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VLE\K{\_u}` :math:`\hex{FD}~~\hex{3E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{3F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VGE\K{\_u}` :math:`\hex{FD}~~\hex{40}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VEQ` :math:`\hex{FD}~~\hex{41}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNE` :math:`\hex{FD}~~\hex{42}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLT` :math:`\hex{FD}~~\hex{43}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGT` :math:`\hex{FD}~~\hex{44}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VLE` :math:`\hex{FD}~~\hex{45}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VGE` :math:`\hex{FD}~~\hex{46}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VEQ` :math:`\hex{FD}~~\hex{47}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNE` :math:`\hex{FD}~~\hex{48}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLT` :math:`\hex{FD}~~\hex{49}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGT` :math:`\hex{FD}~~\hex{4A}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VLE` :math:`\hex{FD}~~\hex{4B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VGE` :math:`\hex{FD}~~\hex{4C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VNOT` :math:`\hex{FD}~~\hex{4D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VAND` :math:`\hex{FD}~~\hex{4E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VANDNOT` :math:`\hex{FD}~~\hex{4F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VOR` :math:`\hex{FD}~~\hex{50}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\VXOR` :math:`\hex{FD}~~\hex{51}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\BITSELECT` :math:`\hex{FD}~~\hex{52}` :math:`[\V128~\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\V128.\ANYTRUE` :math:`\hex{FD}~~\hex{53}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{54}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{55}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{56}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{57}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{8\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{58}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{16\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{59}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{32\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5A}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\STORE\K{64\_lane}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5B}` :math:`[\I32~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{32\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5C}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\V128.\LOAD\K{64\_zero}~\memarg~\laneidx` :math:`\hex{FD}~~\hex{5D}` :math:`[\I32] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VDEMOTE\K{\_f64x2\_zero}` :math:`\hex{FD}~~\hex{5E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPROMOTE\K{\_low\_f32x4}` :math:`\hex{FD}~~\hex{5F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VABS` :math:`\hex{FD}~~\hex{60}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VNEG` :math:`\hex{FD}~~\hex{61}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VPOPCNT` :math:`\hex{FD}~~\hex{62}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\ALLTRUE` :math:`\hex{FD}~~\hex{63}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\BITMASK` :math:`\hex{FD}~~\hex{64}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{65}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I8X16.\NARROW\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{66}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VCEIL` :math:`\hex{FD}~~\hex{67}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VFLOOR` :math:`\hex{FD}~~\hex{68}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VTRUNC` :math:`\hex{FD}~~\hex{69}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEAREST` :math:`\hex{FD}~~\hex{6A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHL` :math:`\hex{FD}~~\hex{6B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{6C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{6D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD` :math:`\hex{FD}~~\hex{6E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{6F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{70}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB` :math:`\hex{FD}~~\hex{71}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{72}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{73}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCEIL` :math:`\hex{FD}~~\hex{74}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VFLOOR` :math:`\hex{FD}~~\hex{75}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{76}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{77}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{78}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{79}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VTRUNC` :math:`\hex{FD}~~\hex{7A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I8X16.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{7B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}` :math:`\hex{FD}~~\hex{7C}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}` :math:`\hex{FD}~~\hex{7D}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{7E}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}` :math:`\hex{FD}~~\hex{7F}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VABS` :math:`\hex{FD}~~\hex{80}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VNEG` :math:`\hex{FD}~~\hex{81}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\Q15MULRSAT\K{\_s}` :math:`\hex{FD}~~\hex{82}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\ALLTRUE` :math:`\hex{FD}~~\hex{83}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\BITMASK` :math:`\hex{FD}~~\hex{84}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{85}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\NARROW\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{86}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{87}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{88}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{89}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VEXTEND\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{8A}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\VSHL` :math:`\hex{FD}~~\hex{8B}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{8C}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{8D}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD` :math:`\hex{FD}~~\hex{8E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_s}` :math:`\hex{FD}~~\hex{8F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VADD\K{\_sat\_u}` :math:`\hex{FD}~~\hex{90}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB` :math:`\hex{FD}~~\hex{91}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_s}` :math:`\hex{FD}~~\hex{92}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VSUB\K{\_sat\_u}` :math:`\hex{FD}~~\hex{93}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEAREST` :math:`\hex{FD}~~\hex{94}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMUL` :math:`\hex{FD}~~\hex{95}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{96}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{97}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{98}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{99}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\AVGR\K{\_u}` :math:`\hex{FD}~~\hex{9B}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_s}` :math:`\hex{FD}~~\hex{9C}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_s}` :math:`\hex{FD}~~\hex{9D}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_low\_i8x16\_u}` :math:`\hex{FD}~~\hex{9E}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I16X8.\EXTMUL\K{\_high\_i8x16\_u}` :math:`\hex{FD}~~\hex{9F}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VABS` :math:`\hex{FD}~~\hex{A0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VNEG` :math:`\hex{FD}~~\hex{A1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\ALLTRUE` :math:`\hex{FD}~~\hex{A3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\BITMASK` :math:`\hex{FD}~~\hex{A4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{A7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{A8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{A9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VEXTEND\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{AA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\VSHL` :math:`\hex{FD}~~\hex{AB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{AC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{AD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VADD` :math:`\hex{FD}~~\hex{AE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VSUB` :math:`\hex{FD}~~\hex{B1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMUL` :math:`\hex{FD}~~\hex{B5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_s}` :math:`\hex{FD}~~\hex{B6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMIN\K{\_u}` :math:`\hex{FD}~~\hex{B7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_s}` :math:`\hex{FD}~~\hex{B8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VMAX\K{\_u}` :math:`\hex{FD}~~\hex{B9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\DOT\K{\_i16x8\_s}` :math:`\hex{FD}~~\hex{BA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_s}` :math:`\hex{FD}~~\hex{BC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_s}` :math:`\hex{FD}~~\hex{BD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_low\_i16x8\_u}` :math:`\hex{FD}~~\hex{BE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I32X4.\EXTMUL\K{\_high\_i16x8\_u}` :math:`\hex{FD}~~\hex{BF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VABS` :math:`\hex{FD}~~\hex{C0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNEG` :math:`\hex{FD}~~\hex{C1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\ALLTRUE` :math:`\hex{FD}~~\hex{C3}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\BITMASK` :math:`\hex{FD}~~\hex{C4}` :math:`[\V128] \to [\I32]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{C7}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{C8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{C9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VEXTEND\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{CA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\VSHL` :math:`\hex{FD}~~\hex{CB}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_s}` :math:`\hex{FD}~~\hex{CC}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSHR\K{\_u}` :math:`\hex{FD}~~\hex{CD}` :math:`[\V128~\I32] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VADD` :math:`\hex{FD}~~\hex{CE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VSUB` :math:`\hex{FD}~~\hex{D1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VMUL` :math:`\hex{FD}~~\hex{D5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VEQ` :math:`\hex{FD}~~\hex{D6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VNE` :math:`\hex{FD}~~\hex{D7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLT\K{\_s}` :math:`\hex{FD}~~\hex{D8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGT\K{\_s}` :math:`\hex{FD}~~\hex{D9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VLE\K{\_s}` :math:`\hex{FD}~~\hex{DA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\VGE\K{\_s}` :math:`\hex{FD}~~\hex{DB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{DC}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_s}` :math:`\hex{FD}~~\hex{DD}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{DE}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\I64X2.\EXTMUL\K{\_high\_i32x4\_u}` :math:`\hex{FD}~~\hex{DF}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution ` +:math:`\F32X4.\VABS` :math:`\hex{FD}~~\hex{E0}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VNEG` :math:`\hex{FD}~~\hex{E1}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSQRT` :math:`\hex{FD}~~\hex{E3}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VADD` :math:`\hex{FD}~~\hex{E4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VSUB` :math:`\hex{FD}~~\hex{E5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMUL` :math:`\hex{FD}~~\hex{E6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VDIV` :math:`\hex{FD}~~\hex{E7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMIN` :math:`\hex{FD}~~\hex{E8}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VMAX` :math:`\hex{FD}~~\hex{E9}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMIN` :math:`\hex{FD}~~\hex{EA}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VPMAX` :math:`\hex{FD}~~\hex{EB}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VABS` :math:`\hex{FD}~~\hex{EC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VNEG` :math:`\hex{FD}~~\hex{ED}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSQRT` :math:`\hex{FD}~~\hex{EF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VADD` :math:`\hex{FD}~~\hex{F0}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VSUB` :math:`\hex{FD}~~\hex{F1}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMUL` :math:`\hex{FD}~~\hex{F2}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VDIV` :math:`\hex{FD}~~\hex{F3}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMIN` :math:`\hex{FD}~~\hex{F4}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VMAX` :math:`\hex{FD}~~\hex{F5}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMIN` :math:`\hex{FD}~~\hex{F6}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_u}` :math:`\hex{FD}~~\hex{FF}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +================================================= ========================== ============================================= ============================================= ================================================================== diff --git a/document/core/appendix/index-types.rst b/document/core/appendix/index-types.rst index a94bbd6f4e..a9eb5529da 100644 --- a/document/core/appendix/index-types.rst +++ b/document/core/appendix/index-types.rst @@ -12,7 +12,7 @@ Category Constructor :ref:`Number type ` |I64| :math:`\hex{7E}` (-2 as |Bs7|) :ref:`Number type ` |F32| :math:`\hex{7D}` (-3 as |Bs7|) :ref:`Number type ` |F64| :math:`\hex{7C}` (-4 as |Bs7|) -:ref:`Number type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) +:ref:`Number type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) (reserved) :math:`\hex{7A}` .. :math:`\hex{71}` :ref:`Reference type ` |FUNCREF| :math:`\hex{70}` (-16 as |Bs7|) :ref:`Reference type ` |EXTERNREF| :math:`\hex{6F}` (-17 as |Bs7|) diff --git a/document/core/binary/instructions.rst b/document/core/binary/instructions.rst index cd62498e49..e94805ccaa 100644 --- a/document/core/binary/instructions.rst +++ b/document/core/binary/instructions.rst @@ -461,17 +461,17 @@ whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer \end{array} -.. index:: simd instruction +.. index:: vector instruction pair: binary format; instruction -.. _binary-instr-simd: +.. _binary-instr-vec: -SIMD Instructions -~~~~~~~~~~~~~~~~~~~~ +Vector Instructions +~~~~~~~~~~~~~~~~~~~ -All variants of :ref:`SIMD instructions ` are represented by separate byte codes. +All variants of :ref:`vector instructions ` are represented by separate byte codes. They all have a one byte prefix, whereas the actual opcode is encoded by a variable-length :ref:`unsigned integer `. -SIMD loads and stores are followed by the encoding of their |memarg| immediate. +Vector loads and stores are followed by the encoding of their |memarg| immediate. .. _binary-laneidx: @@ -544,11 +544,11 @@ The |SHUFFLE| instruction is also followed by the encoding of 16 |laneidx| immed \hex{FD}~~34{:}\Bu32~~l{:}\Blaneidx &\Rightarrow& \F64X2.\REPLACELANE~l \\ \end{array} -All other SIMD instructions are plain opcodes without any immediates. +All other vector instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \production{instruction} & \Binstr &::=& \dots && \phantom{simdhaslongerinstructionnames} \\&&|& + \production{instruction} & \Binstr &::=& \dots && \phantom{vechaslongerinstructionnames} \\&&|& \hex{FD}~~14{:}\Bu32 &\Rightarrow& \I8X16.\SWIZZLE \\ &&|& \hex{FD}~~15{:}\Bu32 &\Rightarrow& \I8X16.\SPLAT \\ &&|& \hex{FD}~~16{:}\Bu32 &\Rightarrow& \I16X8.\SPLAT \\ &&|& @@ -562,7 +562,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~35{:}\Bu32 &\Rightarrow& \I8X16.\VEQ \\ &&|& \hex{FD}~~36{:}\Bu32 &\Rightarrow& \I8X16.\VNE \\ &&|& \hex{FD}~~37{:}\Bu32 &\Rightarrow& \I8X16.\VLT\K{\_s} \\ &&|& @@ -577,7 +577,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~45{:}\Bu32 &\Rightarrow& \I16X8.\VEQ \\ &&|& \hex{FD}~~46{:}\Bu32 &\Rightarrow& \I16X8.\VNE \\ &&|& \hex{FD}~~47{:}\Bu32 &\Rightarrow& \I16X8.\VLT\K{\_s} \\ &&|& @@ -592,7 +592,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~55{:}\Bu32 &\Rightarrow& \I32X4.\VEQ \\ &&|& \hex{FD}~~56{:}\Bu32 &\Rightarrow& \I32X4.\VNE \\ &&|& \hex{FD}~~57{:}\Bu32 &\Rightarrow& \I32X4.\VLT\K{\_s} \\ &&|& @@ -607,7 +607,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~214{:}\Bu32 &\Rightarrow& \I64X2.\VEQ \\ &&|& \hex{FD}~~215{:}\Bu32 &\Rightarrow& \I64X2.\VNE \\ &&|& \hex{FD}~~216{:}\Bu32 &\Rightarrow& \I64X2.\VLT\K{\_s} \\ &&|& @@ -620,7 +620,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~65{:}\Bu32 &\Rightarrow& \F32X4.\VEQ \\ &&|& \hex{FD}~~66{:}\Bu32 &\Rightarrow& \F32X4.\VNE \\ &&|& \hex{FD}~~67{:}\Bu32 &\Rightarrow& \F32X4.\VLT \\ &&|& @@ -631,7 +631,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~71{:}\Bu32 &\Rightarrow& \F64X2.\VEQ \\ &&|& \hex{FD}~~72{:}\Bu32 &\Rightarrow& \F64X2.\VNE \\ &&|& \hex{FD}~~73{:}\Bu32 &\Rightarrow& \F64X2.\VLT \\ &&|& @@ -646,7 +646,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~77{:}\Bu32 &\Rightarrow& \V128.\VNOT \\ &&|& \hex{FD}~~78{:}\Bu32 &\Rightarrow& \V128.\VAND \\ &&|& \hex{FD}~~79{:}\Bu32 &\Rightarrow& \V128.\VANDNOT \\ &&|& @@ -665,7 +665,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~96{:}\Bu32 &\Rightarrow& \I8X16.\VABS \\ &&|& \hex{FD}~~97{:}\Bu32 &\Rightarrow& \I8X16.\VNEG \\ &&|& \hex{FD}~~98{:}\Bu32 &\Rightarrow& \I8X16.\VPOPCNT \\ &&|& @@ -691,7 +691,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~124{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_s}\\ &&|& \hex{FD}~~125{:}\Bu32 &\Rightarrow& \I16X8.\EXTADDPAIRWISE\K{\_i8x16\_u}\\ &&|& \hex{FD}~~128{:}\Bu32 &\Rightarrow& \I16X8.\VABS \\ &&|& @@ -728,7 +728,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~126{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_s}\\ &&|& \hex{FD}~~127{:}\Bu32 &\Rightarrow& \I32X4.\EXTADDPAIRWISE\K{\_i16x8\_u}\\ &&|& \hex{FD}~~160{:}\Bu32 &\Rightarrow& \I32X4.\VABS \\ &&|& @@ -758,7 +758,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~192{:}\Bu32 &\Rightarrow& \I64X2.\VABS \\ &&|& \hex{FD}~~193{:}\Bu32 &\Rightarrow& \I64X2.\VNEG \\ &&|& \hex{FD}~~195{:}\Bu32 &\Rightarrow& \I64X2.\ALLTRUE \\ &&|& @@ -784,7 +784,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~103{:}\Bu32 &\Rightarrow& \F32X4.\VCEIL \\ &&|& \hex{FD}~~104{:}\Bu32 &\Rightarrow& \F32X4.\VFLOOR \\ &&|& \hex{FD}~~105{:}\Bu32 &\Rightarrow& \F32X4.\VTRUNC \\ &&|& @@ -804,7 +804,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~116{:}\Bu32 &\Rightarrow& \F64X2.\VCEIL \\ &&|& \hex{FD}~~117{:}\Bu32 &\Rightarrow& \F64X2.\VFLOOR \\ &&|& \hex{FD}~~122{:}\Bu32 &\Rightarrow& \F64X2.\VTRUNC \\ &&|& @@ -824,7 +824,7 @@ All other SIMD instructions are plain opcodes without any immediates. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{simdhaslongerinstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Binstr} &\phantom{::=}& \phantom{\dots} && \phantom{vechaslongerinstructionnames} \\[-2ex] &&|& \hex{FD}~~248{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_s} \\ &&|& \hex{FD}~~249{:}\Bu32 &\Rightarrow& \I32X4.\TRUNC\K{\_sat\_f32x4\_u} \\ &&|& \hex{FD}~~250{:}\Bu32 &\Rightarrow& \F32X4.\CONVERT\K{\_i32x4\_s} \\ &&|& diff --git a/document/core/binary/types.rst b/document/core/binary/types.rst index 6785de8633..4b291e8de3 100644 --- a/document/core/binary/types.rst +++ b/document/core/binary/types.rst @@ -29,18 +29,18 @@ Number Types \end{array} -.. index:: SIMD type - pair: binary format; SIMD type -.. _binary-simdtype: +.. index:: vector type + pair: binary format; vector type +.. _binary-vectype: -SIMD Types -~~~~~~~~~~ +Vector Types +~~~~~~~~~~~~ -:ref:`SIMD types ` are also encoded by a single byte. +:ref:`Vector types ` are also encoded by a single byte. .. math:: \begin{array}{llclll@{\qquad\qquad}l} - \production{SIMD type} & \Bsimdtype &::=& + \production{vector type} & \Bvectype &::=& \hex{7B} &\Rightarrow& \V128 \\ \end{array} diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 180167f39d..53ddbd9871 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -247,15 +247,15 @@ Reference Instructions \end{array} -.. index:: SIMD instruction +.. index:: vector instruction pair: execution; instruction single: abstract syntax; instruction -.. _exec-instr-simd: +.. _exec-instr-vec: -SIMD Instructions -~~~~~~~~~~~~~~~~~ +Vector Instructions +~~~~~~~~~~~~~~~~~~~ -Most SIMD instructions are defined in terms of generic numeric operators applied lane-wise based on the :ref:`shape `. +Most vector instructions are defined in terms of generic numeric operators applied lane-wise based on the :ref:`shape `. .. math:: \begin{array}{lll@{\qquad}l} @@ -350,7 +350,7 @@ Most SIMD instructions are defined in terms of generic numeric operators applied .. _exec-vvtestop: -.. _exec-simd-any_true: +.. _exec-vec-any_true: :math:`\V128\K{.}\ANYTRUE` .......................... @@ -370,7 +370,7 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-swizzle: +.. _exec-vec-swizzle: :math:`\K{i8x16.}\SWIZZLE` .......................... @@ -405,14 +405,14 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-shuffle: +.. _exec-vec-shuffle: :math:`\K{i8x16.}\SHUFFLE~x^\ast` ................................. -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. -2. Assert: due to :ref:`validation `, for all :math:`x_i` in :math:`x^\ast` it holds that :math:`x_i < 32`. +2. Assert: due to :ref:`validation `, for all :math:`x_i` in :math:`x^\ast` it holds that :math:`x_i < 32`. 3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -441,14 +441,14 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-splat: +.. _exec-vec-splat: :math:`\shape\K{.}\SPLAT` ......................... 1. Let :math:`t` be the type :math:`\unpacked(\shape)`. -2. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t` is on the top of the stack. +2. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t` is on the top of the stack. 3. Pop the value :math:`t.\CONST~c_1` from the stack. @@ -467,14 +467,14 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-extract_lane: +.. _exec-vec-extract_lane: :math:`t_1\K{x}N\K{.}\EXTRACTLANE\K{\_}\sx^?~x` ............................................... -1. Assert: due to :ref:`validation `, :math:`x < N`. +1. Assert: due to :ref:`validation `, :math:`x < N`. -2. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +2. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -499,20 +499,20 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-replace_lane: +.. _exec-vec-replace_lane: :math:`\shape\K{.}\REPLACELANE~x` ................................. -1. Assert: due to :ref:`validation `, :math:`x < \dim(\shape)`. +1. Assert: due to :ref:`validation `, :math:`x < \dim(\shape)`. 2. Let :math:`t_1` be the type :math:`\unpacked(\shape)`. -3. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t_1` is on the top of the stack. +3. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t_1` is on the top of the stack. 4. Pop the value :math:`t_1.\CONST~c_1` from the stack. -5. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +5. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 6. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -649,7 +649,7 @@ Most SIMD instructions are defined in terms of generic numeric operators applied .. _exec-vtestop: -.. _exec-simd-all_true: +.. _exec-vec-all_true: :math:`\shape\K{.}\ALLTRUE` ........................... @@ -678,12 +678,12 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-bitmask: +.. _exec-vec-bitmask: :math:`t\K{x}N\K{.}\BITMASK` ............................ -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. @@ -705,14 +705,14 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -.. _exec-simd-narrow: +.. _exec-vec-narrow: :math:`t_2\K{x}N\K{.}\NARROW\K{\_}t_1\K{x}M\K{\_}\sx` ..................................................... -1. Assert: due to :ref:`syntax `, :math:`N = 2\cdot M`. +1. Assert: due to :ref:`syntax `, :math:`N = 2\cdot M`. -2. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. +2. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| are on the top of the stack. 3. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -816,12 +816,12 @@ where: \K{high}(x, y) = y -.. _exec-simd-dot: +.. _exec-vec-dot: :math:`\K{i32x4.}\DOT\K{\_i16x8\_s}` .................................... -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -849,12 +849,12 @@ where: \end{array} -.. _exec-simd-extmul: +.. _exec-vec-extmul: :math:`t_2\K{x}N\K{.}\EXTMUL\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx` ................................................................ -1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_2` from the stack. @@ -894,12 +894,12 @@ where: \K{high}(x, y) = y -.. _exec-simd-extadd_pairwise: +.. _exec-vec-extadd_pairwise: :math:`t_2\K{x}N\K{.}\EXTADDPAIRWISE\_t_1\K{x}M\_\sx` ..................................................... -1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index b9c121b994..aa5a0486cb 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -180,13 +180,13 @@ When a number is stored into :ref:`memory `, it is converted into a Again these functions are invertable bijections. -.. index:: SIMD, shape +.. index:: vector numbers, shape .. _aux-lanes: -SIMD -.... +Vector numbers +.............. -SIMD values have the same underlying representation as an |i128|. They can also be interpreted as a sequence numeric values packed into a |V128| with a particular |shape|. +Vector numbers have the same underlying representation as an |i128|. They can also be interpreted as a sequence numeric values packed into a |V128| with a particular |shape|. .. math:: \begin{array}{l} diff --git a/document/core/exec/runtime.rst b/document/core/exec/runtime.rst index a0a9a3db8f..55f1f7655a 100644 --- a/document/core/exec/runtime.rst +++ b/document/core/exec/runtime.rst @@ -7,7 +7,7 @@ Runtime Structure :ref:`Store `, :ref:`stack `, and other *runtime structure* forming the WebAssembly abstract machine, such as :ref:`values ` or :ref:`module instances `, are made precise in terms of additional auxiliary syntax. -.. index:: ! value, number, reference, constant, number type, reference type, ! host address, value type, integer, floating-point, simd, ! default value +.. index:: ! value, number, reference, constant, number type, vector type, reference type, ! host address, value type, integer, floating-point, vector number, ! default value pair: abstract syntax; value .. _syntax-num: .. _syntax-ref: @@ -17,7 +17,7 @@ Runtime Structure Values ~~~~~~ -WebAssembly computations manipulate *values* of either the five basic :ref:`number types `, i.e., :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each and :ref:`SIMD data ` of 128 bit width, or of :ref:`reference type `. +WebAssembly computations manipulate *values* of either the five basic :ref:`number types `, i.e., :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each and :ref:`vector data ` of 128 bit width, or of :ref:`reference type `. In most places of the semantics, values of different types can occur. In order to avoid ambiguities, values are therefore represented with an abstract syntax that makes their type explicit. diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index ed95340265..932aa788c2 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -171,7 +171,7 @@ Occasionally, it is convenient to group operators together according to the foll \end{array} -.. index:: ! SIMD instruction, fixed-width SIMD, number, value, value type +.. index:: ! vector instruction, vector numbers, number, value, value type, SIMD pair: abstract syntax; instruction .. _syntax-laneidx: .. _syntax-shape: @@ -190,12 +190,12 @@ Occasionally, it is convenient to group operators together according to the foll .. _syntax-visatbinop: .. _syntax-vfunop: .. _syntax-vfbinop: -.. _syntax-instr-simd: +.. _syntax-instr-vec: -SIMD Instructions -~~~~~~~~~~~~~~~~~ +Vector Instructions +~~~~~~~~~~~~~~~~~~~ -SIMD instructions provide basic operations over :ref:`values ` of type |V128|. +Vector instructions (also known as *SIMD* instructions, single data multiple value) provide basic operations over :ref:`values ` of :ref:`vector type `. .. math:: \begin{array}{llcl} @@ -271,50 +271,50 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ - \production{SIMD unary operator} & \vvunop &::=& + \production{vector bitwise unary operator} & \vvunop &::=& \K{not} \\ - \production{SIMD binary operator} & \vvbinop &::=& + \production{vector bitwise binary operator} & \vvbinop &::=& \K{and} ~|~ \K{andnot} ~|~ \K{or} ~|~ \K{xor} \\ - \production{SIMD ternary operator} & \vvternop &::=& + \production{vector bitwise ternary operator} & \vvternop &::=& \K{bitselect} \\ - \production{SIMD test operator} & \vvtestop &::=& + \production{vector bitwise test operator} & \vvtestop &::=& \K{any\_true} \\ - \production{SIMD test operator} & \vitestop &::=& + \production{vector integer test operator} & \vitestop &::=& \K{all\_true} \\ - \production{SIMD integer relational operator} & \virelop &::=& + \production{vector integer relational operator} & \virelop &::=& \K{eq} ~|~ \K{ne} ~|~ \K{lt\_}\sx ~|~ \K{gt\_}\sx ~|~ \K{le\_}\sx ~|~ \K{ge\_}\sx \\ - \production{SIMD floating-point relational operator} & \vfrelop &::=& + \production{vector floating-point relational operator} & \vfrelop &::=& \K{eq} ~|~ \K{ne} ~|~ \K{lt} ~|~ \K{gt} ~|~ \K{le} ~|~ \K{ge} \\ - \production{SIMD integer shift operator} & \vishiftop &::=& - \K{shl} ~|~ - \K{shr\_s} ~|~ - \K{shr\_u} \\ - \production{SIMD integer unary operator} & \viunop &::=& + \production{vector integer unary operator} & \viunop &::=& \K{abs} ~|~ \K{neg} \\ - \production{SIMD integer binary operator} & \vibinop &::=& + \production{vector integer binary operator} & \vibinop &::=& \K{add} ~|~ \K{sub} \\ - \production{SIMD integer binary min/max operator} & \viminmaxop &::=& + \production{vector integer binary min/max operator} & \viminmaxop &::=& \K{min\_}\sx ~|~ \K{max\_}\sx \\ - \production{SIMD integer saturating binary operator} & \visatbinop &::=& + \production{vector integer saturating binary operator} & \visatbinop &::=& \K{add\_sat\_}\sx ~|~ \K{sub\_sat\_}\sx \\ - \production{SIMD floating-point unary operator} & \vfunop &::=& + \production{vector integer shift operator} & \vishiftop &::=& + \K{shl} ~|~ + \K{shr\_s} ~|~ + \K{shr\_u} \\ + \production{vector floating-point unary operator} & \vfunop &::=& \K{abs} ~|~ \K{neg} ~|~ \K{sqrt} ~|~ @@ -322,7 +322,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{floor} ~|~ \K{trunc} ~|~ \K{nearest} \\ - \production{SIMD floating-point binary operator} & \vfbinop &::=& + \production{vector floating-point binary operator} & \vfbinop &::=& \K{add} ~|~ \K{sub} ~|~ \K{mul} ~|~ @@ -333,9 +333,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{pmax} \\ \end{array} -.. _syntax-simd-shape: +.. _syntax-vec-shape: -SIMD instructions have a naming convention involving a prefix that +Vector instructions have a naming convention involving a prefix that determines how their operands will be interpreted. This prefix describes the *shape* of the operand, written :math:`t\K{x}N`, and consisting of a packed :ref:`numeric type ` :math:`t` and the number of *lanes* :math:`N` of that type. @@ -348,7 +348,7 @@ Operations are performed point-wise on the values of each lane. Instructions prefixed with :math:`\K{v128}` do not involve a specific interpretation, and treat the |V128| as an |i128| value or a vector of 128 individual bits. -SIMD instructions can be grouped into several subcategories: +Vector instructions can be grouped into several subcategories: * *Constants*: return a static constant. @@ -368,8 +368,8 @@ SIMD instructions can be grouped into several subcategories: * *Replace lanes*: consume a |V128| operand and a numeric value for a given lane, and produce a |V128| result. -Some SIMD instructions have a signedness annotation |sx| which distinguishes whether the elements in the operands are to be :ref:`interpreted ` as :ref:`unsigned ` or :ref:`signed ` integers. -For the other SIMD instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness. +Some vector instructions have a signedness annotation |sx| which distinguishes whether the elements in the operands are to be :ref:`interpreted ` as :ref:`unsigned ` or :ref:`signed ` integers. +For the other vector instructions, the use of two's complement for the signed interpretation means that they behave the same regardless of signedness. .. _syntax-vunop: @@ -579,7 +579,8 @@ They all take a *memory immediate* |memarg| that contains an address *offset* an Integer loads and stores can optionally specify a *storage size* that is smaller than the :ref:`bit width ` of the respective value type. In the case of loads, a sign extension mode |sx| is then required to select appropriate behavior. -SIMD loads can specify a shape that is half the :ref:`bit width ` of |V128|. Each lane is half its usual size, and the sign extension mode |sx| then specifies how the smaller lane is extended to the larger lane. Alternatively, SIMD loads can perform a *splat*, such that only a single lane of the specified storage size is loaded, and the result is duplicated to all lanes. +Vector loads can specify a shape that is half the :ref:`bit width ` of |V128|. Each lane is half its usual size, and the sign extension mode |sx| then specifies how the smaller lane is extended to the larger lane. +Alternatively, vector loads can perform a *splat*, such that only a single lane of the specified storage size is loaded, and the result is duplicated to all lanes. The static address offset is added to the dynamic address operand, yielding a 33 bit *effective address* that is the zero-based index at which the memory is accessed. All values are read and written in |LittleEndian|_ byte order. diff --git a/document/core/syntax/types.rst b/document/core/syntax/types.rst index 307f132330..2704508237 100644 --- a/document/core/syntax/types.rst +++ b/document/core/syntax/types.rst @@ -43,19 +43,19 @@ Conventions That is, :math:`|\I32| = |\F32| = 32` and :math:`|\I64| = |\F64| = 64`. -.. index:: ! SIMD type, integer, floating-point, IEEE 754, bit width, memory +.. index:: ! vector type, integer, floating-point, IEEE 754, bit width, memory, SIMD pair: abstract syntax; number type pair: number; type -.. _syntax-simdtype: +.. _syntax-vectype: -SIMD Types -~~~~~~~~~~ +Vector Types +~~~~~~~~~~~~ -*SIMD types* classify vectors of :ref:`numeric ` values processed by SIMD instructions (single instruction multiple data). +*Vector types* classify vectors of :ref:`numeric ` values processed by vector instructions (also known as *SIMD* instructions, single instruction multiple data). .. math:: \begin{array}{llll} - \production{SIMD type} & \simdtype &::=& + \production{vector type} & \vectype &::=& \V128 \\ \end{array} @@ -63,13 +63,13 @@ The type |V128| corresponds to a 128 bit vector of packed integer or floating-po can be interpreted as signed or unsigned integers, single or double precision floating-point values, or a single 128 bit type. The interpretation is determined by individual operations. -SIMD types, like :ref:`number types ` are *transparent*, meaning that their bit patterns can be observed. -Values of SIMD type can be stored in :ref:`memories `. +Vector types, like :ref:`number types ` are *transparent*, meaning that their bit patterns can be observed. +Values of vector type can be stored in :ref:`memories `. Conventions ........... -* The notation :math:`|t|` for :ref:`bit width ` extends to SIMD types as well, that is, :math:`|\V128| = 128`. +* The notation :math:`|t|` for :ref:`bit width ` extends to vector types as well, that is, :math:`|\V128| = 128`. .. index:: ! reference type, reference, table, function, function type, null @@ -96,7 +96,7 @@ Reference types are *opaque*, meaning that neither their size nor their bit patt Values of reference type can be stored in :ref:`tables `. -.. index:: ! value type, number type, SIMD type, reference type +.. index:: ! value type, number type, vector type, reference type pair: abstract syntax; value type pair: value; type .. _syntax-valtype: @@ -105,12 +105,12 @@ Value Types ~~~~~~~~~~~ *Value types* classify the individual values that WebAssembly code can compute with and the values that a variable accepts. -They are either :ref:`number types `, :ref:`SIMD types `, or :ref:`reference types `. +They are either :ref:`number types `, :ref:`vector types `, or :ref:`reference types `. .. math:: \begin{array}{llll} \production{value type} & \valtype &::=& - \numtype ~|~ \simdtype ~|~ \reftype \\ + \numtype ~|~ \vectype ~|~ \reftype \\ \end{array} Conventions diff --git a/document/core/syntax/values.rst b/document/core/syntax/values.rst index f8f0cd17d5..631b2ddd22 100644 --- a/document/core/syntax/values.rst +++ b/document/core/syntax/values.rst @@ -145,14 +145,17 @@ Conventions * The meta variable :math:`z` ranges over floating-point values where clear from context. -.. index:: ! simd, fixed-width, vector - pair: abstract syntax; packed simd number -.. _syntax-simd: -Fixed-Width SIMD -~~~~~~~~~~~~~~~~ +.. index:: ! vector numbers, integer, floating-point, lane, SIMD + pair: abstract syntax; vector +.. _syntax-vecnum: + +Vector Numbers +~~~~~~~~~~~~~~ + +*Vector numbers* are 128-bit values that are processed by vector instructions (also known as *SIMD* instructions, single instruction multiple data). +They are represented in the abstract syntax using |i128|. The interpretation of lane types (:ref:`integer ` or :ref:`floating-point ` numbers) and lane sizes are determined by the specific instruction operating on them. -Fixed-width SIMD are 128-bit values that are represented in the abstract syntax using |i128|. The interpretation of lane types (integers or floating-point numbers) and lane sizes are determined by the specific instruction operating on them. .. index:: ! name, byte, Unicode, UTF-8, character, binary format pair: abstract syntax; name diff --git a/document/core/text/instructions.rst b/document/core/text/instructions.rst index 3a3ee3fc9c..cc6951a3fd 100644 --- a/document/core/text/instructions.rst +++ b/document/core/text/instructions.rst @@ -533,18 +533,18 @@ Numeric Instructions \end{array} -.. index:: simd instruction +.. index:: vector instruction pair: text format; instruction -.. _text-instr-simd: +.. _text-instr-vec: -SIMD Instructions -~~~~~~~~~~~~~~~~~~~~ +Vector Instructions +~~~~~~~~~~~~~~~~~~~ -SIMD memory instructions have optional offset and alignment immediates, like the :ref:`memory instructions `. +Vector memory instructions have optional offset and alignment immediates, like the :ref:`memory instructions `. .. math:: \begin{array}{llclll} - \production{instruction} & \Tplaininstr_I &::=& \dots \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\ &&|& + \production{instruction} & \Tplaininstr_I &::=& \dots \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\ &&|& \text{v128.load}~~m{:}\Tmemarg_{16} &\Rightarrow& \V128.\LOAD~m \\ &&|& \text{v128.load8x8\_s}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{8x8\_s}~m \\ &&|& \text{v128.load8x8\_u}~~m{:}\Tmemarg_8 &\Rightarrow& \V128.\LOAD\K{8x8\_u}~m \\ &&|& @@ -569,11 +569,11 @@ SIMD memory instructions have optional offset and alignment immediates, like the \text{v128.store64\_lane}~~m{:}\Tmemarg_8~~laneidx{:}\Tu8 &\Rightarrow& \V128.\STORE\K{64\_lane}~m~laneidx \\ \end{array} -SIMD const instructions have a mandatory :ref:`shape ` descriptor, which determines how the following values are parsed. +Vector constant instructions have a mandatory :ref:`shape ` descriptor, which determines how the following values are parsed. .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{v128.const}~~\text{i8x16}~~(n{:}\Ti8)^{16} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i8}(n)^{16}) \\ &&|& \text{v128.const}~~\text{i16x8}~~(n{:}\Ti16)^{8} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i16}(n)^8) \\ &&|& \text{v128.const}~~\text{i32x4}~~(n{:}\Ti32)^{4} &\Rightarrow& \V128.\VCONST~\bytes_{i128}^{-1}(\bytes_{i32}(n)^4) \\ &&|& @@ -584,14 +584,14 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.shuffle}~~(laneidx{:}\Tu8)^{16} &\Rightarrow& \I8X16.\SHUFFLE~laneidx^{16} \\ &&|& \text{i8x16.swizzle} &\Rightarrow& \I8X16.\SWIZZLE \end{array} .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.splat} &\Rightarrow& \I8X16.\SPLAT\\ &&|& \text{i16x8.splat} &\Rightarrow& \I16X8.\SPLAT\\ &&|& \text{i32x4.splat} &\Rightarrow& \I32X4.\SPLAT\\ &&|& @@ -602,7 +602,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.extract\_lane\_s}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_s}~laneidx \\ &&|& \text{i8x16.extract\_lane\_u}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\EXTRACTLANE\K{\_u}~laneidx \\ &&|& \text{i8x16.replace\_lane}~~laneidx{:}\Tu8 &\Rightarrow& \I8X16.\REPLACELANE~laneidx \\ &&|& @@ -623,7 +623,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.eq} &\Rightarrow& \I8X16.\VEQ\\ &&|& \text{i8x16.ne} &\Rightarrow& \I8X16.\VNE\\ &&|& \text{i8x16.lt\_s} &\Rightarrow& \I8X16.\VLT\K{\_s}\\ &&|& @@ -638,7 +638,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i16x8.eq} &\Rightarrow& \I16X8.\VEQ\\ &&|& \text{i16x8.ne} &\Rightarrow& \I16X8.\VNE\\ &&|& \text{i16x8.lt\_s} &\Rightarrow& \I16X8.\VLT\K{\_s}\\ &&|& @@ -653,7 +653,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i32x4.eq} &\Rightarrow& \I32X4.\VEQ\\ &&|& \text{i32x4.ne} &\Rightarrow& \I32X4.\VNE\\ &&|& \text{i32x4.lt\_s} &\Rightarrow& \I32X4.\VLT\K{\_s}\\ &&|& @@ -668,7 +668,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i64x2.eq} &\Rightarrow& \I64X2.\VEQ\\ &&|& \text{i64x2.ne} &\Rightarrow& \I64X2.\VNE\\ &&|& \text{i64x2.lt\_s} &\Rightarrow& \I64X2.\VLT\K{\_s}\\ &&|& @@ -681,7 +681,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{f32x4.eq} &\Rightarrow& \F32X4.\VEQ\\ &&|& \text{f32x4.ne} &\Rightarrow& \F32X4.\VNE\\ &&|& \text{f32x4.lt} &\Rightarrow& \F32X4.\VLT\\ &&|& @@ -692,7 +692,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{f64x2.eq} &\Rightarrow& \F64X2.\VEQ\\ &&|& \text{f64x2.ne} &\Rightarrow& \F64X2.\VNE\\ &&|& \text{f64x2.lt} &\Rightarrow& \F64X2.\VLT\\ &&|& @@ -707,7 +707,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{v128.not} &\Rightarrow& \V128.\VNOT\\ &&|& \text{v128.and} &\Rightarrow& \V128.\VAND\\ &&|& \text{v128.andnot} &\Rightarrow& \V128.\VANDNOT\\ &&|& @@ -726,7 +726,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i8x16.abs} &\Rightarrow& \I8X16.\VABS\\ &&|& \text{i8x16.neg} &\Rightarrow& \I8X16.\VNEG\\ &&|& \text{i8x16.all\_true} &\Rightarrow& \I8X16.\ALLTRUE\\ &&|& @@ -752,7 +752,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i16x8.abs} &\Rightarrow& \I16X8.\VABS\\ &&|& \text{i16x8.neg} &\Rightarrow& \I16X8.\VNEG\\ &&|& \text{i16x8.all\_true} &\Rightarrow& \I16X8.\ALLTRUE\\ &&|& @@ -789,7 +789,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i32x4.abs} &\Rightarrow& \I32X4.\VABS\\ &&|& \text{i32x4.neg} &\Rightarrow& \I32X4.\VNEG\\ &&|& \text{i32x4.all\_true} &\Rightarrow& \I32X4.\ALLTRUE\\ &&|& @@ -818,7 +818,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i64x2.abs} &\Rightarrow& \I64X2.\VABS\\ &&|& \text{i64x2.neg} &\Rightarrow& \I64X2.\VNEG\\ &&|& \text{i64x2.all\_true} &\Rightarrow& \I64X2.\ALLTRUE\\ &&|& @@ -844,7 +844,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{f32x4.abs} &\Rightarrow& \F32X4.\VABS\\ &&|& \text{f32x4.neg} &\Rightarrow& \F32X4.\VNEG\\ &&|& \text{f32x4.sqrt} &\Rightarrow& \F32X4.\VSQRT\\ &&|& @@ -860,7 +860,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{f64x2.abs} &\Rightarrow& \F64X2.\VABS\\ &&|& \text{f64x2.neg} &\Rightarrow& \F64X2.\VNEG\\ &&|& \text{f64x2.sqrt} &\Rightarrow& \F64X2.\VSQRT\\ &&|& @@ -876,7 +876,7 @@ SIMD const instructions have a mandatory :ref:`shape ` descri .. math:: \begin{array}{llclll} - \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforsimdtext} && \phantom{simdhasreallylonginstructionnames} \\[-2ex] &&|& + \phantom{\production{instruction}} & \phantom{\Tplaininstr_I} &\phantom{::=}& \phantom{averylonginstructionnameforvectext} && \phantom{vechasreallylonginstructionnames} \\[-2ex] &&|& \text{i32x4.trunc\_sat\_f32x4\_s} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f32x4\_s}\\ &&|& \text{i32x4.trunc\_sat\_f32x4\_u} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f32x4\_u}\\ &&|& \text{i32x4.trunc\_sat\_f64x2\_s\_zero} &\Rightarrow& \I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}\\ &&|& diff --git a/document/core/text/types.rst b/document/core/text/types.rst index ee1527f627..5e63b7c9ca 100644 --- a/document/core/text/types.rst +++ b/document/core/text/types.rst @@ -22,16 +22,16 @@ Number Types \end{array} -.. index:: SIMD type - pair: text format; SIMD type -.. _text-simdtype: +.. index:: vector type + pair: text format; vector type +.. _text-vectype: -SIMD Types -~~~~~~~~~~ +Vector Types +~~~~~~~~~~~~ .. math:: \begin{array}{llcll@{\qquad\qquad}l} - \production{SIMD type} & \Tsimdtype &::=& + \production{vector type} & \Tvectype &::=& \text{v128} &\Rightarrow& \V128 \\ \end{array} @@ -55,7 +55,7 @@ Reference Types \end{array} -.. index:: value type, number type, SIMD type, reference type +.. index:: value type, number type, vector type, reference type pair: text format; value type .. _text-valtype: @@ -66,7 +66,7 @@ Value Types \begin{array}{llcll@{\qquad\qquad}l} \production{value type} & \Tvaltype &::=& t{:}\Tnumtype &\Rightarrow& t \\ &&|& - t{:}\Tsimdtype &\Rightarrow& t \\ &&|& + t{:}\Tvectype &\Rightarrow& t \\ &&|& t{:}\Treftype &\Rightarrow& t \\ \end{array} diff --git a/document/core/util/macros.def b/document/core/util/macros.def index d5ad36e471..2497baf3a5 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -206,7 +206,7 @@ .. Types, non-terminals .. |numtype| mathdef:: \xref{syntax/types}{syntax-numtype}{\X{numtype}} -.. |simdtype| mathdef:: \xref{syntax/types}{syntax-simdtype}{\X{simdtype}} +.. |vectype| mathdef:: \xref{syntax/types}{syntax-vectype}{\X{vectype}} .. |reftype| mathdef:: \xref{syntax/types}{syntax-reftype}{\X{reftype}} .. |valtype| mathdef:: \xref{syntax/types}{syntax-valtype}{\X{valtype}} .. |resulttype| mathdef:: \xref{syntax/types}{syntax-resulttype}{\X{resulttype}} @@ -435,55 +435,55 @@ .. |DEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{demote}} .. |REINTERPRET| mathdef:: \xref{syntax/instructions}{syntax-instr-numeric}{\K{reinterpret}} -.. |VCONST| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{const}} -.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shuffle}} -.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{swizzle}} -.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{splat}} -.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extract\_lane}} -.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{replace\_lane}} -.. |VNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{not}} -.. |VAND| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{and}} -.. |VANDNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{andnot}} -.. |VOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{or}} -.. |VXOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{xor}} -.. |BITSELECT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{bitselect}} -.. |VEQ| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{eq}} -.. |VNE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ne}} -.. |VLT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{lt}} -.. |VGT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{gt}} -.. |VLE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{le}} -.. |VGE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ge}} -.. |VABS| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{abs}} -.. |VNEG| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{neg}} -.. |VCEIL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{ceil}} -.. |VFLOOR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{floor}} -.. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{trunc}} -.. |VNEAREST| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{nearest}} -.. |VPOPCNT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{popcnt}} -.. |ANYTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{any\_true}} -.. |ALLTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{all\_true}} -.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{bitmask}} -.. |VSHL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shl}} -.. |VSHR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{shr}} -.. |VSQRT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{sqrt}} -.. |VADD| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{add}} -.. |VSUB| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{sub}} -.. |VMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{mul}} -.. |VDIV| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{div}} -.. |VMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{min}} -.. |VMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{max}} -.. |VPMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmin}} -.. |VPMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{pmax}} -.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{narrow}} -.. |VEXTEND| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extend}} -.. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{avgr}} -.. |DOT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{dot}} -.. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extmul}} -.. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{convert}} -.. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{q15mulr\_sat}} -.. |EXTADDPAIRWISE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{extadd\_pairwise}} -.. |VDEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{demote}} -.. |VPROMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-simd}{\K{promote}} +.. |VCONST| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{const}} +.. |SHUFFLE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{shuffle}} +.. |SWIZZLE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{swizzle}} +.. |SPLAT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{splat}} +.. |EXTRACTLANE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{extract\_lane}} +.. |REPLACELANE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{replace\_lane}} +.. |VNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{not}} +.. |VAND| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{and}} +.. |VANDNOT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{andnot}} +.. |VOR| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{or}} +.. |VXOR| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{xor}} +.. |BITSELECT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{bitselect}} +.. |VEQ| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{eq}} +.. |VNE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{ne}} +.. |VLT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{lt}} +.. |VGT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{gt}} +.. |VLE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{le}} +.. |VGE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{ge}} +.. |VABS| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{abs}} +.. |VNEG| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{neg}} +.. |VCEIL| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{ceil}} +.. |VFLOOR| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{floor}} +.. |VTRUNC| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{trunc}} +.. |VNEAREST| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{nearest}} +.. |VPOPCNT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{popcnt}} +.. |ANYTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{any\_true}} +.. |ALLTRUE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{all\_true}} +.. |BITMASK| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{bitmask}} +.. |VSHL| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{shl}} +.. |VSHR| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{shr}} +.. |VSQRT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{sqrt}} +.. |VADD| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{add}} +.. |VSUB| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{sub}} +.. |VMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{mul}} +.. |VDIV| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{div}} +.. |VMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{min}} +.. |VMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{max}} +.. |VPMIN| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{pmin}} +.. |VPMAX| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{pmax}} +.. |NARROW| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{narrow}} +.. |VEXTEND| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{extend}} +.. |AVGR| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{avgr}} +.. |DOT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{dot}} +.. |EXTMUL| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{extmul}} +.. |VCONVERT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{convert}} +.. |Q15MULRSAT| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{q15mulr\_sat}} +.. |EXTADDPAIRWISE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{extadd\_pairwise}} +.. |VDEMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{demote}} +.. |VPROMOTE| mathdef:: \xref{syntax/instructions}{syntax-instr-vec}{\K{promote}} .. Instructions, non-terminals @@ -593,7 +593,7 @@ .. Types, non-terminals .. |Bnumtype| mathdef:: \xref{binary/types}{binary-numtype}{\B{numtype}} -.. |Bsimdtype| mathdef:: \xref{binary/types}{binary-simdtype}{\B{simdtype}} +.. |Bvectype| mathdef:: \xref{binary/types}{binary-vectype}{\B{vectype}} .. |Breftype| mathdef:: \xref{binary/types}{binary-reftype}{\B{reftype}} .. |Bvaltype| mathdef:: \xref{binary/types}{binary-valtype}{\B{valtype}} .. |Bresulttype| mathdef:: \xref{binary/types}{binary-resulttype}{\B{resulttype}} @@ -667,8 +667,6 @@ .. |Binstr| mathdef:: \xref{binary/instructions}{binary-instr}{\B{instr}} .. |Bexpr| mathdef:: \xref{binary/instructions}{binary-expr}{\B{expr}} -.. SIMD - .. |Blaneidx| mathdef:: \xref{binary/instructions}{binary-laneidx}{\B{laneidx}} @@ -760,7 +758,7 @@ .. Types, non-terminals .. |Tnumtype| mathdef:: \xref{text/types}{text-numtype}{\T{numtype}} -.. |Tsimdtype| mathdef:: \xref{text/types}{text-simdtype}{\T{simdtype}} +.. |Tvectype| mathdef:: \xref{text/types}{text-vectype}{\T{vectype}} .. |Treftype| mathdef:: \xref{text/types}{text-reftype}{\T{reftype}} .. |Theaptype| mathdef:: \xref{text/types}{text-heaptype}{\T{heaptype}} .. |Tvaltype| mathdef:: \xref{text/types}{text-valtype}{\T{valtype}} @@ -1070,7 +1068,7 @@ .. Values & Results, non-terminals .. |num| mathdef:: \xref{exec/runtime}{syntax-num}{\X{num}} -.. |simd| mathdef:: \xref{exec/runtime}{syntax-simd}{\X{simd}} +.. |vecc| mathdef:: \xref{exec/runtime}{syntax-vecnum}{\X{vec}} .. |reff| mathdef:: \xref{exec/runtime}{syntax-ref}{\X{ref}} .. |val| mathdef:: \xref{exec/runtime}{syntax-val}{\X{val}} .. |result| mathdef:: \xref{exec/runtime}{syntax-result}{\X{result}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index a3333ee9a4..b917e53683 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -248,17 +248,17 @@ Reference Instructions C \vdashinstr \REFFUNC~x : [] \to [\FUNCREF] } -.. index:: simd instruction +.. index:: vector instruction pair: validation; instruction single: abstract syntax; instruction -.. _valid-instr-simd: +.. _valid-instr-vec: .. _aux-unpacked: -SIMD Instructions -~~~~~~~~~~~~~~~~~ +Vector Instructions +~~~~~~~~~~~~~~~~~~~ -SIMD instructions can have a prefix to describe the :ref:`shape ` of the operand. Packed numeric types, |I8| and |I16|, are not :ref:`value type `, we define an auxiliary function to map such packed types into value types: +Vector instructions can have a prefix to describe the :ref:`shape ` of the operand. Packed numeric types, |I8| and |I16|, are not :ref:`value type `, we define an auxiliary function to map such packed types into value types: .. math:: \begin{array}{lll@{\qquad}l} @@ -348,7 +348,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-swizzle: +.. _valid-vec-swizzle: :math:`\K{i8x16.}\SWIZZLE` .......................... @@ -362,7 +362,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-shuffle: +.. _valid-vec-shuffle: :math:`\K{i8x16.}\SHUFFLE~\laneidx^{16}` ........................................ @@ -379,7 +379,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-splat: +.. _valid-vec-splat: :math:`\shape\K{.}\SPLAT` ......................... @@ -395,7 +395,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-extract_lane: +.. _valid-vec-extract_lane: :math:`\shape\K{.}\EXTRACTLANE\K{\_}\sx^?~\laneidx` ................................................... @@ -412,7 +412,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-replace_lane: +.. _valid-vec-replace_lane: :math:`\shape\K{.}\REPLACELANE~\laneidx` ........................................ @@ -515,7 +515,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-narrow: +.. _valid-vec-narrow: :math:`\ishape_1\K{.}\NARROW\K{\_}\ishape_2\K{\_}\sx` ..................................................... @@ -529,7 +529,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-bitmask: +.. _valid-vec-bitmask: :math:`\ishape\K{.}\BITMASK` ............................ @@ -543,7 +543,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-dot: +.. _valid-vec-dot: :math:`\ishape_1\K{.}\DOT\K{\_}\ishape_2\K{\_s}` ................................................ @@ -557,7 +557,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-extmul: +.. _valid-vec-extmul: :math:`\ishape\K{.}\EXTMUL\K{\_}\side\K{\_}\ishape\K{\_}\sx` ............................................................ @@ -571,7 +571,7 @@ We also define an auxiliary function to get number of packed numeric types in a } -.. _valid-simd-extadd_pairwise: +.. _valid-vec-extadd_pairwise: :math:`\ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx` ......................................................... @@ -624,7 +624,7 @@ Parametric Instructions * Else: - * The instruction is valid with type :math:`[t~t~\I32] \to [t]`, for any :ref:`operand type ` :math:`t` that :ref:`matches ` some :ref:`number type ` or :ref:`SIMD type `. + * The instruction is valid with type :math:`[t~t~\I32] \to [t]`, for any :ref:`operand type ` :math:`t` that :ref:`matches ` some :ref:`number type ` or :ref:`vector type `. .. math:: \frac{ @@ -639,7 +639,7 @@ Parametric Instructions } \qquad \frac{ - \vdash t \leq \simdtype + \vdash t \leq \vectype }{ C \vdashinstr \SELECT : [t~t~\I32] \to [t] } From e2e5b9613712d6c0d73e4cecc435d87e1cf11d6f Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 12 Aug 2021 08:39:27 +0200 Subject: [PATCH 368/378] Review comments --- document/core/exec/instructions.rst | 75 +++++++++++++++++---------- document/core/syntax/instructions.rst | 14 ++--- document/core/util/macros.def | 2 +- document/core/valid/instructions.rst | 16 +++--- 4 files changed, 64 insertions(+), 43 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 180167f39d..4a7191ad5e 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -767,54 +767,73 @@ Most SIMD instructions are defined in terms of generic numeric operators applied \end{array} -:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero}^?` -.............................................................................. +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}\half\K{\_}t_1\K{x}M\K{\_}\sx^?` +.................................................................. 1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. 2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -3. If the :math:`\K{zero}` suffix is present, then: - - a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. - -4. Else if :math:`\side` is :math:`\K{low}`, then: +3. If :math:`\half` is :math:`\K{low}`, then: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. -5. Else: +4. Else: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[N \slice N]`. -6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast))` +5. Let :math:`j^\ast` be the result of computing :math:`\vcvtop^{\sx^?}_{|t_1|,|t_2|}(i^\ast)`. + +6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(j^\ast)`. 7. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx^?\K{\_zero} &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}\half\K{\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))~0^N) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[\half(0, N) \slice N])) \end{array} - \\[1ex] + \end{array} + +where: + +.. math:: + \begin{array}{lcl} + \K{low}(x, y) &=& x \\ + \K{high}(x, y) &=& y \\ + \end{array} + + +:math:`t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx\K{\_zero}` +............................................................... + +1. Assert: due to :ref:`validation `, a value of :ref:`value type ` |V128| is on the top of the stack. + +2. Pop the value :math:`\V128.\VCONST~c_1` from the stack. + +3. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)`. + +4. Let :math:`j^\ast` be the result of computing :math:`\vcvtop^{\sx}_{|t_1|,|t_2|}(i^\ast)` concatenated with the vector :math:`0^M`. + +5. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(j^\ast)`. + +6. Push the value :math:`\V128.\VCONST~c` onto the stack. + +.. math:: + \begin{array}{l} \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx^? &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~t_2\K{x}N\K{.}\vcvtop\K{\_}t_1\K{x}M\K{\_}\sx\K{\_zero} &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx^?}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1)[\side(0, N) \slice N])) + (\iff & c = \lanes^{-1}_{t_2\K{x}N}(\vcvtop^{\sx}_{|t_1|,|t_2|}(\lanes_{t_1\K{x}M}(c_1))~0^M) \end{array} \end{array} -where: - -.. math:: - \K{low}(x, y) = x - \K{high}(x, y) = y - .. _exec-simd-dot: @@ -851,7 +870,7 @@ where: .. _exec-simd-extmul: -:math:`t_2\K{x}N\K{.}\EXTMUL\K{\_}\side\K{\_}t_1\K{x}M\K{\_}\sx` +:math:`t_2\K{x}N\K{.}\EXTMUL\K{\_}\half\K{\_}t_1\K{x}M\K{\_}\sx` ................................................................ 1. Assert: due to :ref:`validation `, two values of :ref:`value type ` |V128| is on the top of the stack. @@ -860,7 +879,7 @@ where: 3. Pop the value :math:`\V128.\VCONST~c_1` from the stack. -4. If :math:`\side` is :math:`\K{low}`, then: +4. If :math:`\half` is :math:`\K{low}`, then: a. Let :math:`i^\ast` be the sequence :math:`\lanes_{t_1\K{x}M}(c_1)[0 \slice N]`. @@ -878,20 +897,22 @@ where: .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\K{\_}\side\K{\_}t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ + (\V128\K{.}\VCONST~c_1)~(\V128\K{.}\VCONST~c_2)~t_2\K{x}N\K{.}\EXTMUL\K{\_}\half\K{\_}t_1\K{x}M\_\sx &\stepto& (\V128\K{.}\VCONST~c) \\ \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[\side(0, N) \slice N] \\ - \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[\side(0, N) \slice N] \\ + (\iff & i^\ast = \lanes_{t_1\K{x}M}(c_1)[\half(0, N) \slice N] \\ + \wedge & j^\ast = \lanes_{t_1\K{x}M}(c_2)[\half(0, N) \slice N] \\ \wedge & c = \lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast))) \end{array} where: .. math:: - \K{low}(x, y) = x - \K{high}(x, y) = y + \begin{array}{lcl} + \K{low}(x, y) &=& x \\ + \K{high}(x, y) &=& y \\ + \end{array} .. _exec-simd-extadd_pairwise: diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index ed95340265..117747d5a8 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -205,7 +205,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{f32x4} ~|~ \K{f64x2} \\ \production{shape} & \shape &::=& \ishape ~|~ \fshape \\ - \production{side} & \side &::=& + \production{half} & \half &::=& \K{low} ~|~ \K{high} \\ \production{lane index} & \laneidx &::=& \u8 \\ \production{instruction} & \instr &::=& @@ -243,9 +243,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \ishape\K{.}\BITMASK \\ &&|& \K{i8x16.}\NARROW\K{\_i16x8\_}\sx ~|~ \K{i16x8.}\NARROW\K{\_i32x4\_}\sx \\&&|& - \K{i16x8.}\VEXTEND\K{\_}\side^?\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\VEXTEND\K{\_}\side^?\K{\_i16x8\_}\sx \\&&|& - \K{i64x2.}\VEXTEND\K{\_}\side^?\K{\_i32x4\_}\sx \\&&|& + \K{i16x8.}\VEXTEND\K{\_}\half\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\VEXTEND\K{\_}\half\K{\_i16x8\_}\sx \\&&|& + \K{i64x2.}\VEXTEND\K{\_}\half\K{\_i32x4\_}\sx \\&&|& \ishape\K{.}\vishiftop \\&&|& \ishape\K{.}\vibinop \\&&|& \K{i8x16.}\viminmaxop ~|~ @@ -258,9 +258,9 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i64x2.}\K{mul} \\&&|& \K{i8x16.}\AVGR\K{\_u} ~|~ \K{i16x8.}\AVGR\K{\_u} \\&&|& - \K{i16x8.}\EXTMUL\K{\_}\side^?\K{\_i8x16\_}\sx ~|~ - \K{i32x4.}\EXTMUL\K{\_}\side^?\K{\_i16x8\_}\sx ~|~ - \K{i64x2.}\EXTMUL\K{\_}\side^?\K{\_i32x4\_}\sx ~|~ + \K{i16x8.}\EXTMUL\K{\_}\half\K{\_i8x16\_}\sx ~|~ + \K{i32x4.}\EXTMUL\K{\_}\half\K{\_i16x8\_}\sx ~|~ + \K{i64x2.}\EXTMUL\K{\_}\half\K{\_i32x4\_}\sx ~|~ \K{i16x8.}\EXTADDPAIRWISE\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\EXTADDPAIRWISE\K{\_i16x8\_}\sx \\ &&|& \fshape\K{.}\vfbinop \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index d5ad36e471..5de235e2e0 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -533,7 +533,7 @@ .. |vtestop| mathdef:: \xref{syntax/instructions}{syntax-vtestop}{\X{vtestop}} .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} -.. |side| mathdef:: \xref{syntax/instructions}{syntax-side}{\X{side}} +.. |half| mathdef:: \xref{syntax/instructions}{syntax-half}{\X{half}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} .. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}} diff --git a/document/core/valid/instructions.rst b/document/core/valid/instructions.rst index a3333ee9a4..d5594f07b3 100644 --- a/document/core/valid/instructions.rst +++ b/document/core/valid/instructions.rst @@ -503,7 +503,7 @@ We also define an auxiliary function to get number of packed numeric types in a .. _valid-vcvtop: -:math:`\shape\K{.}\vcvtop\K{\_}\side^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^?` +:math:`\shape\K{.}\vcvtop\K{\_}\half^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^?` .......................................................................... * The instruction is valid with type :math:`[\V128] \to [\V128]`. @@ -511,7 +511,7 @@ We also define an auxiliary function to get number of packed numeric types in a .. math:: \frac{ }{ - C \vdashinstr \shape\K{.}\vcvtop\K{\_}\side^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^? : [\V128] \to [\V128] + C \vdashinstr \shape\K{.}\vcvtop\K{\_}\half^?\K{\_}\shape\K{\_}\sx^?\K{\_zero}^? : [\V128] \to [\V128] } @@ -559,29 +559,29 @@ We also define an auxiliary function to get number of packed numeric types in a .. _valid-simd-extmul: -:math:`\ishape\K{.}\EXTMUL\K{\_}\side\K{\_}\ishape\K{\_}\sx` -............................................................ +:math:`\ishape_1\K{.}\EXTMUL\K{\_}\half\K{\_}\ishape_2\K{\_}\sx` +................................................................ * The instruction is valid with type :math:`[\V128~\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \ishape\K{.}\EXTMUL\K{\_}\side\K{\_}\ishape\K{\_}\sx : [\V128~\V128] \to [\V128] + C \vdashinstr \ishape_1\K{.}\EXTMUL\K{\_}\half\K{\_}\ishape_2\K{\_}\sx : [\V128~\V128] \to [\V128] } .. _valid-simd-extadd_pairwise: -:math:`\ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx` -......................................................... +:math:`\ishape_1\K{.}\EXTADDPAIRWISE\K{\_}\ishape_2\K{\_}\sx` +............................................................. * The instruction is valid with type :math:`[\V128] \to [\V128]`. .. math:: \frac{ }{ - C \vdashinstr \ishape\K{.}\EXTADDPAIRWISE\K{\_}\ishape\K{\_}\sx : [\V128] \to [\V128] + C \vdashinstr \ishape_1\K{.}\EXTADDPAIRWISE\K{\_}\ishape_2\K{\_}\sx : [\V128] \to [\V128] } From 08aeb77e309024ccfa26893a5bf757a1c4b33e12 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 12 Aug 2021 16:58:15 +0200 Subject: [PATCH 369/378] Review comments --- document/core/exec/numerics.rst | 8 ++++---- document/core/syntax/instructions.rst | 2 +- document/core/syntax/values.rst | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/document/core/exec/numerics.rst b/document/core/exec/numerics.rst index aa5a0486cb..b604168740 100644 --- a/document/core/exec/numerics.rst +++ b/document/core/exec/numerics.rst @@ -180,13 +180,13 @@ When a number is stored into :ref:`memory `, it is converted into a Again these functions are invertable bijections. -.. index:: vector numbers, shape +.. index:: numeric vectors, shape .. _aux-lanes: -Vector numbers -.............. +Vectors +....... -Vector numbers have the same underlying representation as an |i128|. They can also be interpreted as a sequence numeric values packed into a |V128| with a particular |shape|. +Numeric vectors have the same underlying representation as an |i128|. They can also be interpreted as a sequence of numeric values packed into a |V128| with a particular |shape|. .. math:: \begin{array}{l} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 11c299fbc5..519df7a3a7 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -171,7 +171,7 @@ Occasionally, it is convenient to group operators together according to the foll \end{array} -.. index:: ! vector instruction, vector numbers, number, value, value type, SIMD +.. index:: ! vector instruction, numeric vectors, number, value, value type, SIMD pair: abstract syntax; instruction .. _syntax-laneidx: .. _syntax-shape: diff --git a/document/core/syntax/values.rst b/document/core/syntax/values.rst index 631b2ddd22..9dc1dd31d1 100644 --- a/document/core/syntax/values.rst +++ b/document/core/syntax/values.rst @@ -146,14 +146,14 @@ Conventions * The meta variable :math:`z` ranges over floating-point values where clear from context. -.. index:: ! vector numbers, integer, floating-point, lane, SIMD +.. index:: ! numeric vectors, integer, floating-point, lane, SIMD pair: abstract syntax; vector .. _syntax-vecnum: -Vector Numbers -~~~~~~~~~~~~~~ +Vectors +~~~~~~~ -*Vector numbers* are 128-bit values that are processed by vector instructions (also known as *SIMD* instructions, single instruction multiple data). +*Numeric vectors* are 128-bit values that are processed by vector instructions (also known as *SIMD* instructions, single instruction multiple data). They are represented in the abstract syntax using |i128|. The interpretation of lane types (:ref:`integer ` or :ref:`floating-point ` numbers) and lane sizes are determined by the specific instruction operating on them. From 6d7e83da76cd90fa3a7f2a26bcb241864c888147 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Thu, 12 Aug 2021 18:40:03 +0200 Subject: [PATCH 370/378] More comments --- document/core/exec/instructions.rst | 4 ++-- document/core/syntax/instructions.rst | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 4a7191ad5e..bbfcf9db66 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -852,7 +852,7 @@ where: 6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\I32X4}(j^\ast)`. -8. Push the value :math:`\V128.\VCONST~c` onto the stack. +7. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: \begin{array}{l} @@ -893,7 +893,7 @@ where: 6. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{t_2\K{x}N}(\imul_{t_2\K{x}N}(\extend^{\sx}_{|t_1|,|t_2|}(i^\ast), \extend^{\sx}_{|t_1|,|t_2|}(j^\ast)))` -8. Push the value :math:`\V128.\VCONST~c` onto the stack. +7. Push the value :math:`\V128.\VCONST~c` onto the stack. .. math:: \begin{array}{lcl@{\qquad}l} diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 117747d5a8..0213f67953 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -175,7 +175,7 @@ Occasionally, it is convenient to group operators together according to the foll pair: abstract syntax; instruction .. _syntax-laneidx: .. _syntax-shape: -.. _syntax-side: +.. _syntax-half: .. _syntax-vvunop: .. _syntax-vvbinop: .. _syntax-vvternop: @@ -260,7 +260,7 @@ SIMD instructions provide basic operations over :ref:`values ` of \K{i16x8.}\AVGR\K{\_u} \\&&|& \K{i16x8.}\EXTMUL\K{\_}\half\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\EXTMUL\K{\_}\half\K{\_i16x8\_}\sx ~|~ - \K{i64x2.}\EXTMUL\K{\_}\half\K{\_i32x4\_}\sx ~|~ + \K{i64x2.}\EXTMUL\K{\_}\half\K{\_i32x4\_}\sx \\ &&|& \K{i16x8.}\EXTADDPAIRWISE\K{\_i8x16\_}\sx ~|~ \K{i32x4.}\EXTADDPAIRWISE\K{\_i16x8\_}\sx \\ &&|& \fshape\K{.}\vfbinop \\&&|& From 02cf93904b947b71fa26f6ff2b1e6101bb9a37c1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 17 Aug 2021 12:01:03 -0700 Subject: [PATCH 371/378] Update BinarySIMD.md (#518) Add m:memarg to immediate column for v128.load32_zero and v128.load64_zero --- proposals/simd/BinarySIMD.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index ae63b844fa..d8c87cee97 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -226,8 +226,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.trunc_sat_f32x4_u` | `0xf9`| - | | `f32x4.convert_i32x4_s` | `0xfa`| - | | `f32x4.convert_i32x4_u` | `0xfb`| - | -| `v128.load32_zero` | `0x5c`| - | -| `v128.load64_zero` | `0x5d`| - | +| `v128.load32_zero` | `0x5c`| m:memarg | +| `v128.load64_zero` | `0x5d`| m:memarg | | `i16x8.extmul_low_i8x16_s` | `0x9c`| - | | `i16x8.extmul_high_i8x16_s` | `0x9d`| - | | `i16x8.extmul_low_i8x16_u` | `0x9e`| - | From a19f219858b22a1450ed6e2cc4331f3634652c2f Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Fri, 17 Sep 2021 14:19:11 -0700 Subject: [PATCH 372/378] Name memarg arguments Fixes #509. --- proposals/simd/SIMD.md | 44 +++++++++++++++++++++--------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index a463d101f1..9f2c802a4a 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -836,45 +836,45 @@ natural alignment. ### Load -* `v128.load(memarg) -> v128` +* `v128.load(m: memarg) -> v128` Load a `v128` vector from the given heap address. ```python -def S.load(memarg): +def S.load(m: memarg): return S.from_bytes(memory[memarg.offset:memarg.offset + 16]) ``` ### Load and Zero-Pad -* `v128.load32_zero(memarg) -> v128` -* `v128.load64_zero(memarg) -> v128` +* `v128.load32_zero(m: memarg) -> v128` +* `v128.load64_zero(m: memarg) -> v128` Load a single 32-bit or 64-bit element into the lowest bits of a `v128` vector, and initialize all other bits of the `v128` vector to zero. ```python -def S.load32_zero(memarg): +def S.load32_zero(m: memarg): return S.from_bytes(memory[memarg.offset:memarg.offset + 4]) ``` ```python -def S.load64_zero(memarg): +def S.load64_zero(m: memarg): return S.from_bytes(memory[memarg.offset:memarg.offset + 8]) ``` ### Load and Splat -* `v128.load8_splat(memarg) -> v128` -* `v128.load16_splat(memarg) -> v128` -* `v128.load32_splat(memarg) -> v128` -* `v128.load64_splat(memarg) -> v128` +* `v128.load8_splat(m: memarg) -> v128` +* `v128.load16_splat(m: memarg) -> v128` +* `v128.load32_splat(m: memarg) -> v128` +* `v128.load64_splat(m: memarg) -> v128` Load a single element and splat to all lanes of a `v128` vector. The natural alignment is the size of the element loaded. ```python -def S.load_splat(memarg): +def S.load_splat(m: memarg): val_bytes = memory[memarg.offset:memarg.offset + S.LaneBytes]) return S.splat(S.LaneType.from_bytes(val_bytes)) ``` @@ -891,39 +891,39 @@ mode operand `imm`. The values of all other lanes of `x` are bypassed as is. ### Load and Extend -* `v128.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane -* `v128.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane -* `v128.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane -* `v128.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane -* `v128.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane -* `v128.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane +* `v128.load8x8_s(m: memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane +* `v128.load8x8_u(m: memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane +* `v128.load16x4_s(m: memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane +* `v128.load16x4_u(m: memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane +* `v128.load32x2_s(m: memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane +* `v128.load32x2_u(m: memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane Fetch consecutive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. The natural alignment is 8 bytes. ```python -def S.load_extend(ext, memarg): +def S.load_extend(ext, m: memarg): result = S.New() bytes = memory[memarg.offset:memarg.offset + 8]) for i in range(S.Lanes): result[i] = ext(S.LaneType.from_bytes(bytes[(i * S.LaneBytes/2):((i+1) * S.LaneBytes/2)])) return result -def S.load_extend_s(memarg): +def S.load_extend_s(m: memarg): return S.load_extend(Sext, memarg) -def S.load_extend_u(memarg): +def S.load_extend_u(m: memarg): return S.load_extend(Zext, memarg) ``` ### Store -* `v128.store(memarg, data: v128)` +* `v128.store(m: memarg, data: v128)` Store a `v128` vector to the given heap address. ```python -def S.store(memarg, a): +def S.store(m: memarg, a): memory[memarg.offset:memarg.offset + 16] = bytes(a) ``` From a3e4b059dfb40ccd1ed9eaa3571c1682c3f4987c Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Mon, 4 Oct 2021 18:46:18 +0200 Subject: [PATCH 373/378] Add Changelog (#522) * Add Changelog * Comments * Split narrow * Regroup instructions --- document/core/appendix/changes.rst | 47 +++++++++++++++++-- .../core/appendix/gen-index-instructions.py | 4 +- document/core/appendix/index-instructions.rst | 4 +- document/core/syntax/instructions.rst | 19 ++++---- document/core/util/macros.def | 1 - 5 files changed, 55 insertions(+), 20 deletions(-) diff --git a/document/core/appendix/changes.rst b/document/core/appendix/changes.rst index 9488c1882e..66303ba219 100644 --- a/document/core/appendix/changes.rst +++ b/document/core/appendix/changes.rst @@ -104,17 +104,54 @@ Added instructions that modify ranges of memory or table entries [#proposal-reft * Active data and element segments boundaries are no longer checked at compile time but may trap instead +.. index:: instructions, SIMD, value type, vector type + +Vector instructions +................... + +Added vector type and instructions that manipulate multiple numeric values in parallel (also known as *SIMD*, single instruction multiple data) [#proposal-vectype]_ + +* New :ref:`value type `: |V128| + +* New :ref:`memory instructions `: :math:`\K{v128.}\LOAD`, :math:`\K{v128.}\LOAD{}\!N\!\K{x}\!M\!\K{\_}\sx`, :math:`\K{v128.}\LOAD{}N\K{\_zero}`, :math:`\K{v128.}\LOAD{}N\K{\_splat}`, :math:`\K{v128.}\LOAD{}N\K{\_lane}`, :math:`\K{v128.}\STORE`, :math:`\K{v128.}\STORE{}N\K{\_lane}` + +* New constant :ref:`vector instruction `: :math:`\K{v128.}\VCONST` + +* New unary :ref:`vector instructions `: :math:`\K{v128.not}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.abs}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.neg}`, :math:`\K{i8x16.popcnt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.abs}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.neg}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.sqrt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ceil}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.floor}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.trunc}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.nearest}` + +* New binary :ref:`vector instructions `: :math:`\K{v128.and}`, :math:`\K{v128.andnot}`, :math:`\K{v128.or}`, :math:`\K{v128.xor}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.add}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.sub}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.mul}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.add\_sat\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.sub\_sat\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.min\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.max\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.shl}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.shr\_}\sx`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.add}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.extmul\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i16x8.q15mulr\_sat\_s}`, :math:`\K{i32x4.dot\_i16x8\_s}`, :math:`\K{i16x8.extadd\_pairwise\_i8x16\_}\sx`, :math:`\K{i32x4.extadd\_pairwise\_i16x8\_}\sx`, :math:`\K{i8x16.avgr\_u}`, :math:`\K{i16x8.avgr\_u}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.sub}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.mul}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.div}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.min}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.max}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.pmin}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.pmax}` + +* New ternary :ref:`vector instruction `: :math:`\K{v128.bitselect}` + +* New test :ref:`vector instructions `: :math:`\K{v128.any\_true}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.all\_true}` + +* New relational :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.lt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.gt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.le\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ge\_}\sx`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.lt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.gt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.le}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ge}` + +* New conversion :ref:`vector instructions `::math:`\K{i32x4.trunc\_sat\_f32x4\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f64x2\_}\sx\K{\_zero}`, :math:`\K{f32x4.convert\_i32x4\_}\sx`, :math:`\K{f32x4.demote\_f64x2\_zero}`, :math:`\K{f64x2.convert\_low\_i32x4\_}\sx`, :math:`\K{f64x2.promote\_low\_f32x4}` + +* New lane access :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extract\_lane\_}\sx^?`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.replace\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.extract\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.replace\_lane}` + +* New lane splitting/combining :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extend\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` + +* New byte reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}` + +* New injection/projection :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.bitmask}` + + .. [#proposal-signext] - https://github.com/WebAssembly/spec/tree/master/proposals/sign-extension-ops/ + https://github.com/WebAssembly/spec/tree/main/proposals/sign-extension-ops/ .. [#proposal-cvtsat] - https://github.com/WebAssembly/spec/tree/master/proposals/nontrapping-float-to-int-conversion/ + https://github.com/WebAssembly/spec/tree/main/proposals/nontrapping-float-to-int-conversion/ .. [#proposal-multivalue] - https://github.com/WebAssembly/spec/tree/master/proposals/multi-value/ + https://github.com/WebAssembly/spec/tree/main/proposals/multi-value/ .. [#proposal-reftype] - https://github.com/WebAssembly/spec/tree/master/proposals/reference-types/ + https://github.com/WebAssembly/spec/tree/main/proposals/reference-types/ .. [#proposal-bulk] - https://github.com/WebAssembly/spec/tree/master/proposals/bulk-memory-operations/ + https://github.com/WebAssembly/spec/tree/main/proposals/bulk-memory-operations/ + +.. [#proposal-vectype] + https://github.com/WebAssembly/spec/tree/main/proposals/simd/ diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index cb427bcca6..9e8dbb8c3a 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -569,8 +569,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~\hex{F7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~\hex{F8}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~\hex{F9}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~\hex{FA}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~\hex{FB}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\F32X4.\VCONVERT\K{\_i32x4\_s}', r'\hex{FD}~~\hex{FA}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F32X4.\VCONVERT\K{\_i32x4\_u}', r'\hex{FD}~~\hex{FB}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~\hex{FC}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~\hex{FD}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{FE}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 9f4a4ec36f..0c43fe0f15 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -517,8 +517,8 @@ Instruction Binary Opcode T :math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VCONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VCONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 2096f12f64..5b869b33f7 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -268,7 +268,7 @@ Vector instructions (also known as *SIMD* instructions, single data multiple val \K{i32x4.}\VTRUNC\K{\_sat\_f64x2\_}\sx\K{\_zero} \\&&|& \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx ~|~ \K{f32x4.}\VDEMOTE\K{\_f64x2\_zero} \\&&|& - \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ + \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}\sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ \production{vector bitwise unary operator} & \vvunop &::=& @@ -312,8 +312,7 @@ Vector instructions (also known as *SIMD* instructions, single data multiple val \K{sub\_sat\_}\sx \\ \production{vector integer shift operator} & \vishiftop &::=& \K{shl} ~|~ - \K{shr\_s} ~|~ - \K{shr\_u} \\ + \K{shr\_}\sx \\ \production{vector floating-point unary operator} & \vfunop &::=& \K{abs} ~|~ \K{neg} ~|~ @@ -542,7 +541,7 @@ Instructions in this group are concerned with linear :ref:`memory `. \begin{array}{llcl} \production{memory immediate} & \memarg &::=& \{ \OFFSET~\u32, \ALIGN~\u32 \} \\ - \production{lane width} & \lanewidth &::=& + \production{lane width} & \X{ww} &::=& 8 ~|~ 16 ~|~ 32 ~|~ 64 \\ \production{instruction} & \instr &::=& \dots \\&&|& @@ -558,14 +557,14 @@ Instructions in this group are concerned with linear :ref:`memory `. \K{i}\X{nn}\K{.}\STORE\K{8}~\memarg ~|~ \K{i}\X{nn}\K{.}\STORE\K{16}~\memarg ~|~ \K{i64.}\STORE\K{32}~\memarg \\&&|& - \K{v128.}\LOAD\K{8x8}\_\sx~\memarg ~|~ - \K{v128.}\LOAD\K{16x4}\_\sx~\memarg ~|~ - \K{v128.}\LOAD\K{32x2}\_\sx~\memarg \\&&|& - \K{v128.}\LOAD\lanewidth\K{\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\K{8x8\_}\sx~\memarg ~|~ + \K{v128.}\LOAD\K{16x4\_}\sx~\memarg ~|~ + \K{v128.}\LOAD\K{32x2\_}\sx~\memarg \\&&|& \K{v128.}\LOAD\K{32\_zero}~\memarg ~|~ \K{v128.}\LOAD\K{64\_zero}~\memarg \\&&|& - \K{v128.}\LOAD\lanewidth\K{\_lane}~\memarg~\laneidx ~|~ - \K{v128.}\STORE\lanewidth\K{\_lane}~\memarg~\laneidx \\&&|& + \K{v128.}\LOAD\X{ww}\K{\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\X{ww}\K{\_lane}~\memarg~\laneidx ~|~ + \K{v128.}\STORE\X{ww}\K{\_lane}~\memarg~\laneidx \\&&|& \MEMORYSIZE \\&&|& \MEMORYGROW \\&&|& \MEMORYFILL \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 3a54480989..f6a26fba16 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -535,7 +535,6 @@ .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} .. |half| mathdef:: \xref{syntax/instructions}{syntax-half}{\X{half}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} -.. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}} .. |blocktype| mathdef:: \xref{syntax/instructions}{syntax-blocktype}{\X{blocktype}} From eda542170976cfe395bdb0d6d500638f73dc763d Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 11 Nov 2021 10:57:14 -0800 Subject: [PATCH 374/378] Fix some stale references to value types (#527) Based on comments from https://github.com/WebAssembly/spec/pull/1391. --- document/core/appendix/index-types.rst | 2 +- document/core/binary/conventions.rst | 9 ++++----- document/core/exec/runtime.rst | 8 +++++--- document/core/intro/overview.rst | 6 +++--- document/core/text/conventions.rst | 7 +++---- document/core/util/macros.def | 4 ++-- 6 files changed, 18 insertions(+), 18 deletions(-) diff --git a/document/core/appendix/index-types.rst b/document/core/appendix/index-types.rst index a9eb5529da..715233ceae 100644 --- a/document/core/appendix/index-types.rst +++ b/document/core/appendix/index-types.rst @@ -12,7 +12,7 @@ Category Constructor :ref:`Number type ` |I64| :math:`\hex{7E}` (-2 as |Bs7|) :ref:`Number type ` |F32| :math:`\hex{7D}` (-3 as |Bs7|) :ref:`Number type ` |F64| :math:`\hex{7C}` (-4 as |Bs7|) -:ref:`Number type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) +:ref:`Vector type ` |V128| :math:`\hex{7B}` (-5 as |Bs7|) (reserved) :math:`\hex{7A}` .. :math:`\hex{71}` :ref:`Reference type ` |FUNCREF| :math:`\hex{70}` (-16 as |Bs7|) :ref:`Reference type ` |EXTERNREF| :math:`\hex{6F}` (-17 as |Bs7|) diff --git a/document/core/binary/conventions.rst b/document/core/binary/conventions.rst index c38df8bae6..83c80399fa 100644 --- a/document/core/binary/conventions.rst +++ b/document/core/binary/conventions.rst @@ -63,21 +63,20 @@ In order to distinguish symbols of the binary syntax from symbols of the abstrac (This is a shorthand for a side condition requiring multiple different variables to be equal.) .. note:: - For example, the :ref:`binary grammar ` for :ref:`value types ` is given as follows: + For example, the :ref:`binary grammar ` for :ref:`number types ` is given as follows: .. math:: \begin{array}{llcll@{\qquad\qquad}l} - \production{value types} & \Bvaltype &::=& + \production{number types} & \Bnumtype &::=& \hex{7F} &\Rightarrow& \I32 \\ &&|& \hex{7E} &\Rightarrow& \I64 \\ &&|& \hex{7D} &\Rightarrow& \F32 \\ &&|& - \hex{7C} &\Rightarrow& \F64 \\ &&|& - \hex{7B} &\Rightarrow& \V128 \\ + \hex{7C} &\Rightarrow& \F64 \\ \end{array} Consequently, the byte :math:`\hex{7F}` encodes the type |I32|, :math:`\hex{7E}` encodes the type |I64|, and so forth. - No other byte value is allowed as the encoding of a value type. + No other byte value is allowed as the encoding of a number type. The :ref:`binary grammar ` for :ref:`limits ` is defined as follows: diff --git a/document/core/exec/runtime.rst b/document/core/exec/runtime.rst index 55f1f7655a..482eea0ad7 100644 --- a/document/core/exec/runtime.rst +++ b/document/core/exec/runtime.rst @@ -10,6 +10,7 @@ Runtime Structure .. index:: ! value, number, reference, constant, number type, vector type, reference type, ! host address, value type, integer, floating-point, vector number, ! default value pair: abstract syntax; value .. _syntax-num: +.. _syntax-vecc: .. _syntax-ref: .. _syntax-ref.extern: .. _syntax-val: @@ -17,7 +18,7 @@ Runtime Structure Values ~~~~~~ -WebAssembly computations manipulate *values* of either the five basic :ref:`number types `, i.e., :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each and :ref:`vector data ` of 128 bit width, or of :ref:`reference type `. +WebAssembly computations manipulate *values* of either the four basic :ref:`number types `, i.e., :ref:`integers ` and :ref:`floating-point data ` of 32 or 64 bit width each, of :ref:`vectors ` of 128 bit width, or of :ref:`reference type `. In most places of the semantics, values of different types can occur. In order to avoid ambiguities, values are therefore represented with an abstract syntax that makes their type explicit. @@ -33,14 +34,15 @@ or *external references* pointing to an uninterpreted form of :ref:`extern addre \I32.\CONST~\i32 \\&&|& \I64.\CONST~\i64 \\&&|& \F32.\CONST~\f32 \\&&|& - \F64.\CONST~\f64 \\ &&|& + \F64.\CONST~\f64 \\ + \production{(vector)} & \vecc &::=& \V128.\CONST~\i128 \\ \production{(reference)} & \reff &::=& \REFNULL~t \\&&|& \REFFUNCADDR~\funcaddr \\&&|& \REFEXTERNADDR~\externaddr \\ \production{(value)} & \val &::=& - \num ~|~ \reff \\ + \num ~|~ \vecc ~|~ \reff \\ \end{array} .. note:: diff --git a/document/core/intro/overview.rst b/document/core/intro/overview.rst index 3352a6e509..a10a3b5499 100644 --- a/document/core/intro/overview.rst +++ b/document/core/intro/overview.rst @@ -13,7 +13,7 @@ This language is structured around the following concepts. .. _value: **Values** - WebAssembly provides only four basic *value types*. + WebAssembly provides only four basic *number types*. These are integers and |IEEE754|_ numbers, each in 32 and 64 bit width. 32 bit integers also serve as Booleans and as memory addresses. @@ -23,8 +23,8 @@ This language is structured around the following concepts. Instead, integers are interpreted by respective operations as either unsigned or signed in two’s complement representation. - In addition to the basic value types above, there is a single 128 bit wide - value type representing different types of packed data. + In addition to these basic number types, there is a single 128 bit wide + vector type representing different types of packed data. The supported representations are 4 32-bit, or 2 64-bit |IEEE754|_ numbers, or different widths of packed integer values specifically 2 64-bit integers, 4 32-bit integers, 8 diff --git a/document/core/text/conventions.rst b/document/core/text/conventions.rst index 4acc92107f..ddcd8e7809 100644 --- a/document/core/text/conventions.rst +++ b/document/core/text/conventions.rst @@ -61,16 +61,15 @@ In order to distinguish symbols of the textual syntax from symbols of the abstra * A distinction is made between *lexical* and *syntactic* productions. For the latter, arbitrary :ref:`white space ` is allowed in any place where the grammar contains spaces. The productions defining :ref:`lexical syntax ` and the syntax of :Ref:`values ` are considered lexical, all others are syntactic. .. note:: - For example, the :ref:`textual grammar ` for :ref:`value types ` is given as follows: + For example, the :ref:`textual grammar ` for :ref:`number types ` is given as follows: .. math:: \begin{array}{llcll@{\qquad\qquad}l} - \production{value types} & \Tvaltype &::=& + \production{number types} & \Tnumtype &::=& \text{i32} &\Rightarrow& \I32 \\ &&|& \text{i64} &\Rightarrow& \I64 \\ &&|& \text{f32} &\Rightarrow& \F32 \\ &&|& - \text{f64} &\Rightarrow& \F64 \\ &&|& - \text{v128} &\Rightarrow& \V128 \\ + \text{f64} &\Rightarrow& \F64 \\ \end{array} The :ref:`textual grammar ` for :ref:`limits ` is defined as follows: diff --git a/document/core/util/macros.def b/document/core/util/macros.def index f6a26fba16..d66a8d6fee 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -1067,7 +1067,7 @@ .. Values & Results, non-terminals .. |num| mathdef:: \xref{exec/runtime}{syntax-num}{\X{num}} -.. |vecc| mathdef:: \xref{exec/runtime}{syntax-vecnum}{\X{vec}} +.. |vecc| mathdef:: \xref{exec/runtime}{syntax-vec}{\X{vec}} .. |reff| mathdef:: \xref{exec/runtime}{syntax-ref}{\X{ref}} .. |val| mathdef:: \xref{exec/runtime}{syntax-val}{\X{val}} .. |result| mathdef:: \xref{exec/runtime}{syntax-result}{\X{result}} @@ -1186,7 +1186,7 @@ .. |fsign| mathdef:: \xref{exec/numerics}{aux-fsign}{\F{fsign}} .. |fbias| mathdef:: \xref{exec/numerics}{aux-fbias}{\F{fbias}} .. |bytes| mathdef:: \xref{exec/numerics}{aux-bytes}{\F{bytes}} -.. |littleendian| mathdef:: \xref{exec/numerics}{aux-littleendian}{\F{little~endian}} +.. |littleendian| mathdef:: \xref{exec/numerics}{aux-littleendian}{\F{littleendian}} .. |signed| mathdef:: \xref{exec/numerics}{aux-signed}{\F{signed}} .. |bool| mathdef:: \xref{exec/numerics}{aux-bool}{\F{bool}} From 7ce9b415be37c81cf1e1f345514751d0c45f7637 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Mon, 15 Nov 2021 14:24:00 -0800 Subject: [PATCH 375/378] Make i8 and i16 work correctly on their own (#528) Previously, i8 and i16 was careless w.r.t. the top bits, because they were only used by v128, which uses Bytes.get/set that appropriate masks the top bits when storing into the byte array. With this change, i8 and i16 are self contained small integers implemented using int32. They are always stored signed-extended, e.g. INT8_MIN (-128) is stored as 0xffffff80. This requires adding sign-extension operation (Rep.sx) in a couple of places, that will make sure to extend the sign bit to the rest of the int32. Also add a small, non-exhaustive test for these small integers in a new file tests/smallint.ml. This is the first ml test we are adding (all previous tests are wasm/wast tests that we run using the interpreter), so there are some modifications to the Makefile to build and run this test (make smallinttest, make test will also run it). This test is in the tests/ folder to avoid a conflict with a Makefile goal test/x to run x.wast in ../test/core, otherwise it tries to run smallint.ml as a wast test. Co-authored-by: Andreas Rossberg --- interpreter/Makefile | 19 ++++-- interpreter/exec/ixx.ml | 85 ++++++++++++++------------ interpreter/tests/smallint.ml | 108 ++++++++++++++++++++++++++++++++++ 3 files changed, 172 insertions(+), 40 deletions(-) create mode 100644 interpreter/tests/smallint.ml diff --git a/interpreter/Makefile b/interpreter/Makefile index a1c1eebefc..4ff333d177 100644 --- a/interpreter/Makefile +++ b/interpreter/Makefile @@ -17,7 +17,7 @@ ZIP = $(NAME).zip JSLIB = wast.js WINMAKE = winmake.bat -DIRS = util syntax binary text valid runtime exec script host main +DIRS = util syntax binary text valid runtime exec script host main tests LIBS = bigarray FLAGS = -lexflags -ml -cflags '-w +a-4-27-42-44-45 -warn-error +a-3' OCBA = ocamlbuild $(FLAGS) $(DIRS:%=-I %) @@ -27,7 +27,7 @@ JS = # set to JS shell command to run JS tests # Main targets -.PHONY: default opt unopt libopt libunopt jslib all land zip +.PHONY: default opt unopt libopt libunopt jslib all land zip smallint default: opt debug: unopt @@ -39,6 +39,7 @@ jslib: $(JSLIB) all: unopt opt libunopt libopt test land: $(WINMAKE) all zip: $(ZIP) +smallint: smallint.native # Building executable @@ -66,6 +67,12 @@ main.byte: _tags main.native: _tags $(OCB) -quiet $@ +.PHONY: smallint.byte smallint.native +smallint.byte: _tags + $(OCB) -quiet $@ +smallint.native: _tags + $(OCB) -quiet $@ + # Building library @@ -131,10 +138,12 @@ TESTS = $(TESTFILES:%.wast=%) .PHONY: test debugtest partest -test: $(OPT) +test: $(OPT) smallint $(TESTDIR)/run.py --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) -debugtest: $(UNOPT) + ./smallint.native +debugtest: $(UNOPT) smallint $(TESTDIR)/run.py --wasm `pwd`/$(UNOPT) $(if $(JS),--js '$(JS)',) + ./smallint.native test/%: $(OPT) $(TESTDIR)/run.py --wasm `pwd`/$(OPT) $(if $(JS),--js '$(JS)',) $(TESTDIR)/$*.wast @@ -156,6 +165,8 @@ quiettest/%: $(OPT) ) || \ cat $(@F).out || rm $(@F).out || exit 1 +smallinttest: smallint + @./smallint.native # Miscellaneous targets diff --git a/interpreter/exec/ixx.ml b/interpreter/exec/ixx.ml index 27ab90a0c7..67cb94a968 100644 --- a/interpreter/exec/ixx.ml +++ b/interpreter/exec/ixx.ml @@ -149,16 +149,31 @@ struct let abs = Rep.abs let neg = Rep.neg + (* If bit (bitwidth - 1) is set, sx will sign-extend t to maintain the + * invariant that small ints are stored sign-extended inside a wider int. *) + let sx x = + let i = 64 - Rep.bitwidth in + Rep.of_int64 Int64.(shift_right (shift_left (Rep.to_int64 x) i) i) + (* add, sub, and mul are sign-agnostic and do not trap on overflow. *) - let add = Rep.add - let sub = Rep.sub - let mul = Rep.mul + let add x y = sx (Rep.add x y) + let sub x y = sx (Rep.sub x y) + + let mul x y = sx (Rep.mul x y) + + (* We don't override min_int and max_int since those are used + * by other functions (like parsing), and rely on it being + * min/max for int32 *) + (* The smallest signed |bitwidth|-bits int. *) + let low_int = Rep.shift_left Rep.minus_one (Rep.bitwidth - 1) + (* The largest signed |bitwidth|-bits int. *) + let high_int = Rep.logxor low_int Rep.minus_one (* result is truncated toward zero *) let div_s x y = if y = Rep.zero then raise DivideByZero - else if x = Rep.min_int && y = Rep.minus_one then + else if x = low_int && y = Rep.minus_one then raise Overflow else Rep.div x y @@ -191,10 +206,10 @@ struct (* WebAssembly's shifts mask the shift count according to the bitwidth. *) let shift f x y = - f x (Rep.to_int (Rep.logand y (Rep.of_int (Rep.bitwidth - 1)))) + f x Rep.(to_int (logand y (of_int (bitwidth - 1)))) let shl x y = - shift Rep.shift_left x y + sx (shift Rep.shift_left x y) let shr_s x y = shift Rep.shift_right x y @@ -202,12 +217,19 @@ struct (* Check if we are storing smaller ints. *) let needs_extend = shl one (Rep.of_int (Rep.bitwidth - 1)) <> Rep.min_int + (* + * When Int is used to store a smaller int, it is stored in signed extended + * form. Some instructions require the unsigned form, which requires masking + * away the top 32-bitwidth bits. + *) + let as_unsigned x = + if not needs_extend then x else + (* Mask with bottom #bitwidth bits set *) + let mask = Rep.(shift_right_logical minus_one (32 - bitwidth)) in + Rep.logand x mask + let shr_u x y = - (* If we are storing smaller ints, we need to mask out the high bits. *) - let mask = - if not needs_extend then Rep.minus_one else - Rep.lognot (Rep.shift_left Rep.minus_one (Rep.bitwidth)) - in shift Rep.shift_right_logical (Rep.logand x mask) y + sx (shift Rep.shift_right_logical (as_unsigned x) y) (* We must mask the count to implement rotates via shifts. *) let clamp_rotate_count n = @@ -215,11 +237,11 @@ struct let rotl x y = let n = clamp_rotate_count y in - or_ (Rep.shift_left x n) (Rep.shift_right_logical x (Rep.bitwidth - n)) + or_ (shl x (Rep.of_int n)) (shr_u x (Rep.of_int (Rep.bitwidth - n))) let rotr x y = let n = clamp_rotate_count y in - or_ (Rep.shift_right_logical x n) (Rep.shift_left x (Rep.bitwidth - n)) + or_ (shr_u x (Rep.of_int n)) (shl x (Rep.of_int (Rep.bitwidth - n))) (* clz is defined for all values, including all-zeros. *) let clz x = @@ -269,31 +291,22 @@ struct let ge_s x y = x >= y let ge_u x y = cmp_u x (>=) y - (* - * When Int is used to store a smaller int, it is stored in signed extended - * form. Some instructions require the unsigned form, which requires masking - * away the top 32-bitwidth bits. - *) - let as_unsigned x = - if Rep.bitwidth >= 32 then x else - (* Mask with bottom #bitwidth bits set *) - let mask = Rep.(shift_right_logical minus_one (32 - Rep.bitwidth)) in - Rep.logand x mask + let saturate_s x = sx (min (max x low_int) high_int) + let saturate_u x = sx (min (max x Rep.zero) (as_unsigned Rep.minus_one)) - (* We don't override min_int and max_int since those are used - * by other functions (like parsing), and rely on it being - * min/max for int32 *) - (* The smallest signed |bitwidth|-bits int. *) - let low_int = Rep.shift_left Rep.minus_one (Rep.bitwidth - 1) - (* The largest signed |bitwidth|-bits int. *) - let high_int = Rep.logxor low_int Rep.minus_one - let saturate_s x = min (max x low_int) high_int - let saturate_u x = min (max x Rep.zero) (as_unsigned Rep.minus_one) + (* add/sub for int, used for higher-precision arithmetic for I8 and I16 *) + let add_int x y = + assert (Rep.bitwidth < 32); + Rep.(of_int ((to_int x) + (to_int y))) + + let sub_int x y = + assert (Rep.bitwidth < 32); + Rep.(of_int ((to_int x) - (to_int y))) - let add_sat_s x y = saturate_s (add x y) - let add_sat_u x y = saturate_u (add (as_unsigned x) (as_unsigned y)) - let sub_sat_s x y = saturate_s (sub x y) - let sub_sat_u x y = saturate_u (sub (as_unsigned x) (as_unsigned y)) + let add_sat_s x y = saturate_s (add_int x y) + let add_sat_u x y = saturate_u (add_int (as_unsigned x) (as_unsigned y)) + let sub_sat_s x y = saturate_s (sub_int x y) + let sub_sat_u x y = saturate_u (sub_int (as_unsigned x) (as_unsigned y)) let q15mulr_sat_s x y = (* mul x64 y64 can overflow int64 when both are int32 min, but this is only diff --git a/interpreter/tests/smallint.ml b/interpreter/tests/smallint.ml new file mode 100644 index 0000000000..3fe21c7c61 --- /dev/null +++ b/interpreter/tests/smallint.ml @@ -0,0 +1,108 @@ +(* Simple, non-exhaustive tests for small ints (i8, i16). *) + +let s32max = 0x7fffffffl +let s32min = 0x80000000l +let u32max = 0xffffffffl +let u32min = 0l + +(* Smaller ints are stored sign extended in an Int32. *) +let s16max = 32767l +let s16min = -32768l +let u16max = u32max +let u16min = 0l + +let s8max = 127l +let s8min = -128l +let u8max = u32max +let u8min = 0l + +let assert_equal x y = + if x <> y then raise (Failure + (Printf.sprintf "Expected: %ld, but got %ld." x y)) + +let () = + (* test addition wrap around *) + assert_equal u32min (I32.add u32max 1l); + assert_equal u16min (I16.add u16max 1l); + assert_equal u8min (I8.add u8max 1l); + assert_equal s32min (I32.add s32max 1l); + assert_equal s16min (I16.add s16max 1l); + assert_equal s8min (I8.add s8max 1l); + + (* test subtraction wrap around *) + assert_equal u32max (I32.sub u32min 1l); + assert_equal u16max (I16.sub u16min 1l); + assert_equal u8max (I8.sub u8min 1l); + assert_equal s32max (I32.sub s32min 1l); + assert_equal s16max (I16.sub s16min 1l); + assert_equal s8max (I8.sub s8min 1l); + + (* test mul wrap around *) + assert_equal 1l (I32.mul u32max u32max); + assert_equal 1l (I16.mul u16max u16max); + assert_equal 1l (I8.mul u8max u8max); + assert_equal 1l (I32.mul s32max s32max); + assert_equal 1l (I16.mul s16max s16max); + assert_equal 1l (I8.mul s8max s8max); + + (* test add_sat_s *) + assert_equal s16max (I16.add_sat_s s16max 1l); + assert_equal s8max (I8.add_sat_s s8max 1l); + assert_equal u16max (I16.add_sat_u u16max 1l); + assert_equal u8max (I8.add_sat_u u8max 1l); + + (* test sub_sat_s *) + assert_equal s16min (I16.sub_sat_s s16min 1l); + assert_equal s8min (I8.sub_sat_s s8min 1l); + assert_equal 0l (I16.sub_sat_u 0l 1l); + assert_equal 0l (I8.sub_sat_u 0l 1l); + + (* test div wrap around *) + try + ignore (I32.div_s s32min (-1l)); + ignore (I16.div_s s16min (-1l)); + ignore (I8.div_s s8min (-1l)); + assert false + with Ixx.Overflow -> + (); + + (* test shifts overflow *) + assert_equal s16min (I16.shl 16384l 1l); + assert_equal s8min (I8.shl 64l 1l); + assert_equal 0x7fffl (I16.shr_u u16max 1l); + assert_equal 0x7fl (I8.shr_u u8max 1l); + (* check that the top bits are not messed with *) + assert_equal u16max (I16.shr_u u16max 0l); + assert_equal u8max (I8.shr_u u8max 0l); + + (* check rotation *) + assert_equal 1l (I16.rotl s16min 1l); + assert_equal 1l (I8.rotl s8min 1l); + assert_equal s16min (I16.rotl 0x4000l 1l); + assert_equal s8min (I8.rotl 0x40l 1l); + + assert_equal s32min (I32.rotr 1l 1l); + assert_equal s16min (I16.rotr 1l 1l); + assert_equal s8min (I8.rotr 1l 1l); + + assert_equal 1l (I32.rotr s32min 31l); + assert_equal 1l (I16.rotr s16min 15l); + assert_equal 1l (I8.rotr s8min 7l); + assert_equal 0x40000000l (I32.rotr s32min 1l); + assert_equal 0x4000l (I16.rotr s16min 1l); + assert_equal 0x40l (I8.rotr s8min 1l); + + (* check clz *) + assert_equal 0l (I16.clz s16min); + assert_equal 0l (I8.clz s8min); + assert_equal 1l (I16.clz s16max); + assert_equal 1l (I8.clz s8max); + + (* check popcnt *) + assert_equal 1l (I32.popcnt s32min); + assert_equal 1l (I16.popcnt s16min); + assert_equal 1l (I8.popcnt s8min); + assert_equal 16l (I16.popcnt (-1l)); + assert_equal 8l (I8.popcnt (-1l)); + assert_equal 15l (I16.popcnt s16max); + assert_equal 7l (I8.popcnt s8max); From a78b98a6899c9e91a13095e560767af6e99d98fd Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 16 Nov 2021 09:29:26 -0800 Subject: [PATCH 376/378] Remove long unnecessary comment (#530) --- interpreter/exec/ixx.ml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/interpreter/exec/ixx.ml b/interpreter/exec/ixx.ml index 67cb94a968..39b972c2d0 100644 --- a/interpreter/exec/ixx.ml +++ b/interpreter/exec/ixx.ml @@ -30,11 +30,6 @@ sig val of_int : int -> t val to_int : t -> int - (* Required for operations that need to extend to a larger type, such as - * avgr_u. Cast to int64, perform the operations, then convert back to t. - * We don't have such operations on I64, so using int64 is safe. We - * cannot use int, because on 32-bit platforms int cannot represent - * all values of int32. *) val of_int64: int64 -> t val to_int64: t -> int64 val to_string : t -> string From dbb628926de0b68da11e345c3257ed5b2ef32465 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 16 Nov 2021 09:32:12 -0800 Subject: [PATCH 377/378] Remove simd meeting notes --- meetings/meeting-4-24-19.md | 174 ------------------------------------ 1 file changed, 174 deletions(-) delete mode 100644 meetings/meeting-4-24-19.md diff --git a/meetings/meeting-4-24-19.md b/meetings/meeting-4-24-19.md deleted file mode 100644 index 6d4a4ffb96..0000000000 --- a/meetings/meeting-4-24-19.md +++ /dev/null @@ -1,174 +0,0 @@ -# WebAssembly SIMD Meeting - -- **When:** 4/23/2019 - -## Attendees: - -- Deepti Gandluri (DG) -- Peter Jensen (PJ) -- Petr Penzin (PP) -- Richard Winterton (RW) -- Thomas Lively (TL) -- Arun Purushan (AP) -- Marat Dukhan (MD) - -## Agenda: - -- SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72 -- C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108 -- SIMD Spec tests -- CG F2F Simd topics -- Future Meeting timings - - - - -## Details: -*SIMD Versioning proposal (Thomas) https://github.com/WebAssembly/simd/issues/72* - -TL: Versioning the proposal will be useful as there are multiple implementations, engines and toolchain. Churn on instructions are implemented/ buggy/ proposed etc. Early adopters expressed concern about mismatch in expectations. Toolchain and v8 has some ops missing. Tag versions of the proposal. Simple and lightweight. Examples: V1 v2 v3 etc saying latest version of llv matches v2 of spec through a tag. Latest version of v8 supports v2 etc. Feedback that proposal v8 centric. Can be changed. Looking for more feedback. - -AP: There seems to be some precedence to this from JS. We need to consider that. Agree that implementer references needs to be taken out. Timing to start was an open. Suggest we start when the implementations catch up rather than dropping instr. - -DG: Replace v8 with any implementor. Disagree to wait for implementor to catch up. Sooner is better. Ran into Dan Ernberg and had precedence to try to version based on spec version. Unclear on the issues, ccd him and we should await feedback. - -TL: Waiting is nice but, Sooner is better. V8 might not be implementing i64/f64 soon. Waiting for v8 to catch up is saying we are not going to version. Wouldnt Make sense to chakra and v8 to point to the same version as they dont implement the same. May be versions dont need to be linear order. Create a tag in the repo etc.. - -DG: May be it makes sense to stay away from implementer based tag. Implementor agnostic tag will be useful. 64x2 is yet to see test cases or use cases asking for it. Not sure if its a useful subset or not. - -TL: Users might want to match toolchain-engine-doc. If different engine implement different subset, useful to have separate tags for separate subsets. - -DG: Agree that we need different tags. Spec needs to be implementation agnostic. Users should be able to look up this info in a document may beThe details can reside in other documentation. Doesn't necessarily need to happen in the spec. v8/chakra release notes with ref to tags is better. Spec shouldnt have any implementation ref. - -TL: Maybe we don't need to modify the spec at all, just have documentation capturing the support info. - -DG: As long as we agree on what doc looks like, we dont need to version the spec. Versioning makes sense witht the branches. We need to have more conversations. For the time being we can have a document. - -RW: As long as there is a mapping from implementers to the spec, that would do. As long as we can have a mapping to what's implemented, its useful. Ie. color scheme/venn diagram with versioning somewhere in the document. - -TL: what if we check in a markdown file big table updated by all implementers. Ultra lightweight. - - -AR: Tomas will create a PR with a V8 column. Arun/Petr update chakra column. - -DG: has chakra implementation been tested? - -PP: Tested against its own tests with wabt . Toolchain some experiments on going. - -DG: Tomas has exhaustive tests on simd. May be its a good idea to run them in chakra. - -RW: Its in the emscripten tests already. May be we can add intrinsics too. - -TL : New Emscripten PR to add test mode for simd. Able to run entire emscriten test suite with simd enabled once it lands. I will cc some of you on that PR. - -AP: OK, we will pick it up and test against chakra. - - -*C/C++ intrinsics PR at Tool-conventions repo (Rich/Tomas) https://github.com/WebAssembly/tool-conventions/pull/108* - -RW: Pretty much covered. Belongs in emscripten at some point. Probably could move over to clang. Open question is where does it reside long term, in Clang or Emscripten? We can move over to clang in some point in future. - -TL: Are there any wasm pre existing headers in Clang? - -PP: No, not yet. This is simd128, wasm will have more ops. Also, there are WASM memory operations that would need intrinsics at some point. Should those be in a separate header? - -TL: We have compiler builtins for that stuff. No one has made any intrinsics TMK. That could go in there too. We might want separate -header for them. Makes sense to keep simd intrinsics separate from memory intrinsics. - -PP: Another difference bw emscripten and clang is clang doesn’t include tests for the intrinsics, only for builtins. - -TL: Clang tests are compiled but not executed, they only check that code is produced. That is why I want the libs folder. directory with headers. We might need to have them in both places. - -AP: Why is this needed to be duplicated? - -TL: Not sure emscripten going to use clang headers, it will use its own libc. - -AP: Why emscripten is not using it? - -RW: If you use emscripten sdk you not going to get all clang headers with it. - -TL: Switching to llvm backend in emscripten, once we have headers in clang, there will be an incentive to use clang headers. We might need to duplicate for now. - -PP: What is the difference between clang in emscripten. Fastcom clang and actual. - -TL: Fastcom is not based on trunk llvm, old llvm. And it has fastcomp backend compiles directly to llvm ir to js. It doesn't know anything about wasm. It transfers to asm js and then wasm. Working on deprecating that. - -RW: To get simd support in Emscripten we have to pull down simd branch Tomas created. - -TL: SIMD doesn't work with fastcomp. It works with the new backend. - -TL: WASM simd intrinsics are not merged to upstream yet. If you just use emscripten from emsdk, it uses fastcomp and does not support simd at all. - -*SIMD Spec tests* - -AP: We discussed internally and we might be able to help with simd spec tests - -DG: Any help will be appreciated. Google already working on toolchain and implementation and this will help to move the proposal forward quicker. Do you have a timeline on when it can be started. - -AP: Need to get back to you on this. They are already doing work on core spec and RW’s intrinsics. Need to sync and find out. - -DG: Sounds good. Really encouraging to see you might be able to help. After the in person meeting, we will start looking into some of these. There is enough work, we can work together. We have ref interpreter work and spec tests. We can collaborate. - -*CG F2F Simd topics* - -AP: Any simd topics to discuss at the F2F forum. Can we push for stage 2? Anything else that we need to be prepared with. - -DG: we are trying to get some FP numbers. So that we will include those in the spec tests. Confident that it is possible. Add agenda to simd proposal as an update to the simd proposal. Goal is pushing to Stage2. Who is attending? - -AP: not confirmed yet. - -PJ: Not going? - -DG: I should be going. Sharing simd stuff there. - -TL: will attend. - -RW: Not attending. - -PP: FP numbers ? We will think about getting some numbers. - -DG: It was the feedback that we got from the community. We had integer data from Webp is a codec team at google. - -AR: We may be able to look into some chakra data as well. - -PP: Will consider it. - -MD: Lack of FMA in simd proposal is a concern for ML applications. It can hit pref upto 2x - -DG: WebP team has the same feedback. We are considering to add it. If you can put together a pr with results we will be happy to review that. - -PP: We can prototype it. - -MD: Did my basic experiemnts and there is significant speedup. - -RW: I want to add sign extend and load extend. - -DG: Please create a PR - -AR: Rich to create a PR - -MD: There is not a simple way to sore parts of a simd reg. Ie store only in 64bit simd, in wasm it needs to be done in a roundabout way. - -RW: you want to store partial registers right? - -MD: yes. Currently it can be done only through extract. - -DG: Do you know how useful it is and how much overhead is causing? - -MD: We use it often, hard to quantify impact. Prefer to have these explicitly. - -PJ: SImdjs had load1, load2 load3 etc for partial load and store. - -DG: Yes. - -RW: Dont know the history of why we only wanted 128. Else we can just propose it. We seems to have a new list to add - -DG: FMA already has an issue, load extension RW to follow up. We cna have a new issue for partial stores and loads. -Future Meeting timings - -DG: Didnt hear from people in EU time zone with interest. Current slot seems to work for now. Let's continue until this is needed. - -Open: -RW: Fyi for TL . requested help with tianyou’s team with validation. - - From dc05aa14f8dc525c841269c03dfb799bfe838ecc Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 16 Nov 2021 09:33:09 -0800 Subject: [PATCH 378/378] Change README back to spec README --- README.md | 41 +++++++---------------------------------- 1 file changed, 7 insertions(+), 34 deletions(-) diff --git a/README.md b/README.md index 9799ffb3c4..ab9cd99590 100644 --- a/README.md +++ b/README.md @@ -1,41 +1,14 @@ -![Build Status](https://github.com/WebAssembly/simd/actions/workflows/main.yml/badge.svg) +![Build Status](https://github.com/WebAssembly/spec/actions/workflows/main.yml/badge.svg) -# SIMD proposal for WebAssembly - -This repository holds a proposal for adding 128-bit SIMD support to -WebAssembly. It is a copy of the -[WebAssembly/spec](https://github.com/WebAssembly/spec) repository with the -addition of a [proposals/simd](proposals/simd) directory. -The proposal describes how 128-bit packed SIMD types and operations can be -added to WebAssembly. It is based on [previous work on SIMD.js in the Ecma TC39 -ECMAScript committee](https://github.com/tc39/ecmascript_simd) and the -[portable SIMD specification](https://github.com/stoklund/portable-simd) that -resulted. - -The [proposed semantics](proposals/simd/SIMD.md) has the details. - -Note: Consult the [implementation status document](proposals/simd/ImplementationStatus.md) to get an idea of the state of implementation across toolchains and embedders. - -Usage documentation is being collected at https://emscripten.org/docs/porting/simd.html (make PRs [here](https://github.com/emscripten-core/emscripten/blob/master/site/source/docs/porting/simd.rst)) and may be moved to a more vendor-neutral location in the future. - -[Design issue](https://github.com/WebAssembly/proposals/issues/1) - - -Original README from upstream repo follows... # spec -This repository holds a prototypical reference implementation for WebAssembly, -which is currently serving as the official specification. Eventually, we expect -to produce a specification either written in human-readable prose or in a formal -specification language. - -It also holds the WebAssembly testsuite, which tests numerous aspects of -conformance to the spec. - -View the work-in-progress spec at [webassembly.github.io/spec](https://webassembly.github.io/spec/). +This repository holds the sources for the WebAssembly draft specification +(to seed a future +[WebAssembly Working Group](https://lists.w3.org/Archives/Public/public-new-work/2017Jun/0005.html)), +a reference implementation, and the official testsuite. -At this time, the contents of this repository are under development and known -to be "incomplet and inkorrect". +A formatted version of the spec is available here: +[webassembly.github.io/spec](https://webassembly.github.io/spec/), Participation is welcome. Discussions about new features, significant semantic changes, or any specification change likely to generate substantial discussion